| 0b5f9c005def154f9c21f9be0223b65b50d54368 |
|
29-Mar-2012 |
Rusty Russell <rusty@rustcorp.com.au> |
remove references to cpu_*_map in arch/
This has been obsolescent for a while; time for the final push.
In adjacent context, replaced old cpus_* with cpumask_*.
Signed-off-by: Rusty Russell <rusty@rustcorp.com.au>
Acked-by: David S. Miller <davem@davemloft.net> (arch/sparc)
Acked-by: Chris Metcalf <cmetcalf@tilera.com> (arch/tile)
Cc: user-mode-linux-devel@lists.sourceforge.net
Cc: Russell King <linux@arm.linux.org.uk>
Cc: linux-arm-kernel@lists.infradead.org
Cc: Richard Kuo <rkuo@codeaurora.org>
Cc: linux-hexagon@vger.kernel.org
Cc: Ralf Baechle <ralf@linux-mips.org>
Cc: linux-mips@linux-mips.org
Cc: Kyle McMartin <kyle@mcmartin.ca>
Cc: Helge Deller <deller@gmx.de>
Cc: sparclinux@vger.kernel.org
|
| b81947c646bfefdf98e2fde5d7d39cbbda8525d4 |
|
28-Mar-2012 |
David Howells <dhowells@redhat.com> |
Disintegrate asm/system.h for MIPS
Disintegrate asm/system.h for MIPS.
Signed-off-by: David Howells <dhowells@redhat.com>
Acked-by: Ralf Baechle <ralf@linux-mips.org>
cc: linux-mips@linux-mips.org
|
| 8b5690f8847490c1e3ea47266819833a13621253 |
|
22-Nov-2011 |
Yong Zhang <yong.zhang0@gmail.com> |
MIPS: irq: Remove IRQF_DISABLED
Since commit [e58aa3d2: genirq: Run irq handlers with interrupts disabled],
We run all interrupt handlers with interrupts disabled and we even check
and yell when an interrupt handler returns with interrupts enabled (see
commit [b738a50a: genirq: Warn when handler enables interrupts]).
So now this flag is a NOOP and can be removed.
[ralf@linux-mips.org: Fixed up conflicts in
arch/mips/alchemy/common/dbdma.c, arch/mips/cavium-octeon/smp.c and
arch/mips/kernel/perf_event.c.]
Signed-off-by: Yong Zhang <yong.zhang0@gmail.com>
To: linux-kernel@vger.kernel.org
Cc: tglx@linutronix.de
linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/2835/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
|
| ab75dc02c151c9d2a2fd446334d740b097a3b9db |
|
17-Nov-2011 |
Ralf Baechle <ralf@linux-mips.org> |
MIPS: Fix up inconsistency in panic() string argument.
Panic() invokes printk() to add a \n internally, so panic arguments should
not themselves end in \n. Panic invocations in arch/mips and elsewhere
are inconsistently sometimes terminating in \n, sometimes not.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
|
| 60063497a95e716c9a689af3be2687d261f115b4 |
|
27-Jul-2011 |
Arun Sharma <asharma@fb.com> |
atomic: use <linux/atomic.h>
This allows us to move duplicated code in <asm/atomic.h>
(atomic_inc_not_zero() for now) to <linux/atomic.h>
Signed-off-by: Arun Sharma <asharma@fb.com>
Reviewed-by: Eric Dumazet <eric.dumazet@gmail.com>
Cc: Ingo Molnar <mingo@elte.hu>
Cc: David Miller <davem@davemloft.net>
Cc: Eric Dumazet <eric.dumazet@gmail.com>
Acked-by: Mike Frysinger <vapier@gentoo.org>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
|
| 184748cc50b2dceb8287f9fb657eda48ff8fcfe7 |
|
05-Apr-2011 |
Peter Zijlstra <a.p.zijlstra@chello.nl> |
sched: Provide scheduler_ipi() callback in response to smp_send_reschedule()
For future rework of try_to_wake_up() we'd like to push part of that
function onto the CPU the task is actually going to run on.
In order to do so we need a generic callback from the existing scheduler IPI.
This patch introduces such a generic callback: scheduler_ipi() and
implements it as a NOP.
BenH notes: PowerPC might use this IPI on offline CPUs under rare conditions!
Acked-by: Russell King <rmk+kernel@arm.linux.org.uk>
Acked-by: Martin Schwidefsky <schwidefsky@de.ibm.com>
Acked-by: Chris Metcalf <cmetcalf@tilera.com>
Acked-by: Jesper Nilsson <jesper.nilsson@axis.com>
Acked-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Reviewed-by: Frank Rowand <frank.rowand@am.sony.com>
Cc: Mike Galbraith <efault@gmx.de>
Cc: Nick Piggin <npiggin@kernel.dk>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
Signed-off-by: Peter Zijlstra <a.p.zijlstra@chello.nl>
Link: http://lkml.kernel.org/r/20110405152728.744338123@chello.nl
|
| e4ec7989b4e55d9275ebac66230b7dac6dcb1fae |
|
27-Mar-2011 |
Thomas Gleixner <tglx@linutronix.de> |
MIPS: Convert the irq functions to the new names
Scripted with coccinelle.
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
|
| 930cd54b3bd78e52991a89b39b5ef58355ad2b6d |
|
23-Mar-2011 |
Thomas Gleixner <tglx@linutronix.de> |
MIPS: SMTC: Cleanup the hook mess and use irq_data
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
To: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/2194/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
|
| 2a2b2212986a4072d11e521a63672e3219173437 |
|
23-Mar-2011 |
Thomas Gleixner <tglx@linutronix.de> |
MIPS: SMTC: Use irq_data in smtc_forward_irq()
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
To: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/2193/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
|
| df9ee29270c11dba7d0fe0b83ce47a4d8e8d2101 |
|
07-Oct-2010 |
David Howells <dhowells@redhat.com> |
Fix IRQ flag handling naming
Fix the IRQ flag handling naming. In linux/irqflags.h under one configuration,
it maps:
local_irq_enable() -> raw_local_irq_enable()
local_irq_disable() -> raw_local_irq_disable()
local_irq_save() -> raw_local_irq_save()
...
and under the other configuration, it maps:
raw_local_irq_enable() -> local_irq_enable()
raw_local_irq_disable() -> local_irq_disable()
raw_local_irq_save() -> local_irq_save()
...
This is quite confusing. There should be one set of names expected of the
arch, and this should be wrapped to give another set of names that are expected
by users of this facility.
Change this to have the arch provide:
flags = arch_local_save_flags()
flags = arch_local_irq_save()
arch_local_irq_restore(flags)
arch_local_irq_disable()
arch_local_irq_enable()
arch_irqs_disabled_flags(flags)
arch_irqs_disabled()
arch_safe_halt()
Then linux/irqflags.h wraps these to provide:
raw_local_save_flags(flags)
raw_local_irq_save(flags)
raw_local_irq_restore(flags)
raw_local_irq_disable()
raw_local_irq_enable()
raw_irqs_disabled_flags(flags)
raw_irqs_disabled()
raw_safe_halt()
with type checking on the flags 'arguments', and then wraps those to provide:
local_save_flags(flags)
local_irq_save(flags)
local_irq_restore(flags)
local_irq_disable()
local_irq_enable()
irqs_disabled_flags(flags)
irqs_disabled()
safe_halt()
with tracing included if enabled.
The arch functions can now all be inline functions rather than some of them
having to be macros.
Signed-off-by: David Howells <dhowells@redhat.com> [X86, FRV, MN10300]
Signed-off-by: Chris Metcalf <cmetcalf@tilera.com> [Tile]
Signed-off-by: Michal Simek <monstr@monstr.eu> [Microblaze]
Tested-by: Catalin Marinas <catalin.marinas@arm.com> [ARM]
Acked-by: Thomas Gleixner <tglx@linutronix.de>
Acked-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com> [AVR]
Acked-by: Tony Luck <tony.luck@intel.com> [IA-64]
Acked-by: Hirokazu Takata <takata@linux-m32r.org> [M32R]
Acked-by: Greg Ungerer <gerg@uclinux.org> [M68K/M68KNOMMU]
Acked-by: Ralf Baechle <ralf@linux-mips.org> [MIPS]
Acked-by: Kyle McMartin <kyle@mcmartin.ca> [PA-RISC]
Acked-by: Paul Mackerras <paulus@samba.org> [PowerPC]
Acked-by: Martin Schwidefsky <schwidefsky@de.ibm.com> [S390]
Acked-by: Chen Liqin <liqin.chen@sunplusct.com> [Score]
Acked-by: Matt Fleming <matt@console-pimps.org> [SH]
Acked-by: David S. Miller <davem@davemloft.net> [Sparc]
Acked-by: Chris Zankel <chris@zankel.net> [Xtensa]
Reviewed-by: Richard Henderson <rth@twiddle.net> [Alpha]
Reviewed-by: Yoshinori Sato <ysato@users.sourceforge.jp> [H8300]
Cc: starvik@axis.com [CRIS]
Cc: jesper.nilsson@axis.com [CRIS]
Cc: linux-cris-kernel@axis.com
|
| fa90c87297a1bebd8356e41d71518b37ada56583 |
|
14-Jul-2010 |
Kulikov Vasiliy <segooon@gmail.com> |
MIPS: SMTC: Use %p to format pointers
While at it, drop 0x prefix.
Signed-off-by: Kulikov Vasiliy <segooon@gmail.com>
To: kernel-janitors@vger.kernel.org
Cc: Chris Dearman <chris@mips.com>
Cc: "Robert P. J. Day" <rpjday@crashcourse.ca>
Cc: Rusty Russell <rusty@rustcorp.com.au>
Cc: André Goddard Rosa <andre.goddard@gmail.com>
Cc: linux-mips@linux-mips.org
Cc: linux-kernel@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/1458/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
|
| 52553664033078102f5f430c861ccd0863b1b708 |
|
27-Feb-2010 |
Robert P. J. Day <rpjday@crashcourse.ca> |
MIPS: Initialize an atomic_t properly with ATOMIC_INIT(0).
Signed-off-by: Robert P. J. Day <rpjday@crashcourse.ca>
To: linux-mips@linux-mips.org
Patchwork: http://patchwork.linux-mips.org/patch/1008/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
|
| 5a0e3ad6af8660be21ca98a971cd00f331318c05 |
|
24-Mar-2010 |
Tejun Heo <tj@kernel.org> |
include cleanup: Update gfp.h and slab.h includes to prepare for breaking implicit slab.h inclusion from percpu.h
percpu.h is included by sched.h and module.h and thus ends up being
included when building most .c files. percpu.h includes slab.h which
in turn includes gfp.h making everything defined by the two files
universally available and complicating inclusion dependencies.
percpu.h -> slab.h dependency is about to be removed. Prepare for
this change by updating users of gfp and slab facilities include those
headers directly instead of assuming availability. As this conversion
needs to touch large number of source files, the following script is
used as the basis of conversion.
http://userweb.kernel.org/~tj/misc/slabh-sweep.py
The script does the followings.
* Scan files for gfp and slab usages and update includes such that
only the necessary includes are there. ie. if only gfp is used,
gfp.h, if slab is used, slab.h.
* When the script inserts a new include, it looks at the include
blocks and try to put the new include such that its order conforms
to its surrounding. It's put in the include block which contains
core kernel includes, in the same order that the rest are ordered -
alphabetical, Christmas tree, rev-Xmas-tree or at the end if there
doesn't seem to be any matching order.
* If the script can't find a place to put a new include (mostly
because the file doesn't have fitting include block), it prints out
an error message indicating which .h file needs to be added to the
file.
The conversion was done in the following steps.
1. The initial automatic conversion of all .c files updated slightly
over 4000 files, deleting around 700 includes and adding ~480 gfp.h
and ~3000 slab.h inclusions. The script emitted errors for ~400
files.
2. Each error was manually checked. Some didn't need the inclusion,
some needed manual addition while adding it to implementation .h or
embedding .c file was more appropriate for others. This step added
inclusions to around 150 files.
3. The script was run again and the output was compared to the edits
from #2 to make sure no file was left behind.
4. Several build tests were done and a couple of problems were fixed.
e.g. lib/decompress_*.c used malloc/free() wrappers around slab
APIs requiring slab.h to be added manually.
5. The script was run on all .h files but without automatically
editing them as sprinkling gfp.h and slab.h inclusions around .h
files could easily lead to inclusion dependency hell. Most gfp.h
inclusion directives were ignored as stuff from gfp.h was usually
wildly available and often used in preprocessor macros. Each
slab.h inclusion directive was examined and added manually as
necessary.
6. percpu.h was updated not to include slab.h.
7. Build test were done on the following configurations and failures
were fixed. CONFIG_GCOV_KERNEL was turned off for all tests (as my
distributed build env didn't work with gcov compiles) and a few
more options had to be turned off depending on archs to make things
build (like ipr on powerpc/64 which failed due to missing writeq).
* x86 and x86_64 UP and SMP allmodconfig and a custom test config.
* powerpc and powerpc64 SMP allmodconfig
* sparc and sparc64 SMP allmodconfig
* ia64 SMP allmodconfig
* s390 SMP allmodconfig
* alpha SMP allmodconfig
* um on x86_64 SMP allmodconfig
8. percpu.h modifications were reverted so that it could be applied as
a separate patch and serve as bisection point.
Given the fact that I had only a couple of failures from tests on step
6, I'm fairly confident about the coverage of this conversion patch.
If there is a breakage, it's likely to be something in one of the arch
headers which should be easily discoverable easily on most builds of
the specific arch.
Signed-off-by: Tejun Heo <tj@kernel.org>
Guess-its-ok-by: Christoph Lameter <cl@linux-foundation.org>
Cc: Ingo Molnar <mingo@redhat.com>
Cc: Lee Schermerhorn <Lee.Schermerhorn@hp.com>
|
| 8f99a162653531ef25a3dd0f92bfb6332cd2b295 |
|
20-Nov-2009 |
Wu Zhangjin <wuzhangjin@gmail.com> |
MIPS: Tracing: Add IRQENTRY_EXIT section for MIPS
This patch add a new section for MIPS to record the block of the hardirq
handling for function graph tracer(print_graph_irq) via adding the
__irq_entry annotation to the the entrypoints of the hardirqs(the block
with irq_enter()...irq_exit()).
Thanks goes to Steven & Frederic Weisbecker for their feedbacks.
Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com>
Cc: Steven Rostedt <rostedt@goodmis.org>
Cc: Nicholas Mc Guire <der.herr@hofr.at>
Cc: zhangfx@lemote.com
Cc: Wu Zhangjin <wuzhangjin@gmail.com>
Cc: Ingo Molnar <mingo@elte.hu>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Frederic Weisbecker <fweisbec@gmail.com>
Cc: linux-kernel@vger.kernel.org
Cc: linux-mips@linux-mips.org
Reviewed-by: Frederic Weisbecker <fweisbec@gmail.com>
Patchwork: http://patchwork.linux-mips.org/patch/676/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
|
| af901ca181d92aac3a7dc265144a9081a86d8f39 |
|
14-Nov-2009 |
André Goddard Rosa <andre.goddard@gmail.com> |
tree-wide: fix assorted typos all over the place
That is "success", "unknown", "through", "performance", "[re|un]mapping"
, "access", "default", "reasonable", "[con]currently", "temperature"
, "channel", "[un]used", "application", "example","hierarchy", "therefore"
, "[over|under]flow", "contiguous", "threshold", "enough" and others.
Signed-off-by: André Goddard Rosa <andre.goddard@gmail.com>
Signed-off-by: Jiri Kosina <jkosina@suse.cz>
|
| 2e41f91d9e90e34254746fefcb7bb678a3c9d541 |
|
10-Jul-2009 |
Jaidev Patwardhan <jaidev@mips.com> |
MIPS: SMTC: Avoid queing multiple reschedule IPIs
Signed-off-by: Chris Dearman <chris@mips.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
|
| b265158399ad825411f3d471cacc46b00d0e4841 |
|
21-Sep-2009 |
Julia Lawall <julia@diku.dk> |
MIPS: SMTC: Remove duplicate structure field initialization
The definition of the irq_ipi structure has two initializations of the
flags field. This combines them.
[Ralf: The issue was originally introduced by commit
be4894196d79455f420dd7bb78be7dc73bec115c (linux-mips.org) rsp.
033890b084adfa367c544864451d7730552ce8bf (kernel.org). The original
intention of the code was to initialize .flags with both flags ored together.
The broken C code as actually implemented will be compiled by an equally
broken gcc to use only the last initialization, that is IRQF_PERCPU
which means this turned into an SMTC bug for 2.6.23 and newer.]
The semantic match that finds this problem is as follows:
(http://coccinelle.lip6.fr/)
// <smpl>
@r@
identifier I, s, fld;
position p0,p;
expression E;
@@
struct I s =@p0 { ... .fld@p = E, ...};
@s@
identifier I, s, r.fld;
position r.p0,p;
expression E;
@@
struct I s =@p0 { ... .fld@p = E, ...};
@script:python@
p0 << r.p0;
fld << r.fld;
ps << s.p;
pr << r.p;
@@
if int(ps[0].line)!=int(pr[0].line) or int(ps[0].column)!=int(pr[0].column):
cocci.print_main(fld,p0)
// </smpl>
Signed-off-by: Julia Lawall <julia@diku.dk>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
|
| 4037ac6e2cb4e3148c25124b431eead4e704a4ff |
|
24-Sep-2009 |
Rusty Russell <rusty@rustcorp.com.au> |
cpumask: Use accessors for cpu_*_mask: mips
Use the accessors rather than frobbing bits directly (the new versions
are const).
Signed-off-by: Rusty Russell <rusty@rustcorp.com.au>
Signed-off-by: Mike Travis <travis@sgi.com>
|
| 982f6ffeeed5ef6104cfd72e517ff9e7a9270fda |
|
17-Sep-2009 |
Ralf Baechle <ralf@linux-mips.org> |
MIPS: Remove useless zero initializations.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
|
| d8e5f9fe5dab0e07985f2456cb6cc57788f53131 |
|
09-Jul-2009 |
Kurt Martin <kurt@mips.com> |
MIPS: SMTC: Move cross VPE writes to after a TC is assigned to VPE.
Signed-off-by: Chris Dearman <chris@mips.com>
Signed-off-by: Raghu Gandham <raghu@mips.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
|
| 631330f5847b3f8a7ea67d689e9f7c56833ccaa6 |
|
19-Jun-2009 |
Ralf Baechle <ralf@linux-mips.org> |
MIPS: Build fix - include <linux/smp.h> into all smp_processor_id() users.
Some of the were relying into smp.h being dragged in by another header
which of course is fragile. <asm/cpu-info.h> uses smp_processor_id()
only in macros and including smp.h there leads to an include loop, so
don't change cpu-info.h.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
|
| dbc1d911b4392982d5ec69eaed6b617758a148d9 |
|
17-Jun-2009 |
Ralf Baechle <ralf@linux-mips.org> |
MIPS: SMTC: Fix formatting difference to linux-mips.org code
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
|
| d2287f5ebea9ff2487d614719775f0b03fce15f6 |
|
15-Jan-2009 |
Mike Travis <travis@sgi.com> |
irq: update all arches for new irq_desc, fix
Impact: fix build errors
Since the SPARSE IRQS changes redefined how the kstat irqs are
organized, arch's must use the new accessor function:
kstat_incr_irqs_this_cpu(irq, DESC);
If CONFIG_SPARSE_IRQS is set, then DESC is a pointer to the
irq_desc which has a pointer to the kstat_irqs. If not, then
the .irqs field of struct kernel_stat is used instead.
Signed-off-by: Mike Travis <travis@sgi.com>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
|
| e65e49d0f3714f4a6a42f6f6a19926ba33fcda75 |
|
13-Jan-2009 |
Mike Travis <travis@sgi.com> |
irq: update all arches for new irq_desc
Impact: cleanup, update to new cpumask API
Irq_desc.affinity and irq_desc.pending_mask are now cpumask_var_t's
so access to them should be using the new cpumask API.
Signed-off-by: Mike Travis <travis@sgi.com>
|
| 98a79d6a50181ca1ecf7400eda01d5dc1bc0dbf0 |
|
13-Dec-2008 |
Rusty Russell <rusty@rustcorp.com.au> |
cpumask: centralize cpu_online_map and cpu_possible_map
Impact: cleanup
Each SMP arch defines these themselves. Move them to a central
location.
Twists:
1) Some archs (m32, parisc, s390) set possible_map to all 1, so we add a
CONFIG_INIT_ALL_POSSIBLE for this rather than break them.
2) mips and sparc32 '#define cpu_possible_map phys_cpu_present_map'.
Those archs simply have phys_cpu_present_map replaced everywhere.
3) Alpha defined cpu_possible_map to cpu_present_map; this is tricky
so I just manipulate them both in sync.
4) IA64, cris and m32r have gratuitous 'extern cpumask_t cpu_possible_map'
declarations.
Signed-off-by: Rusty Russell <rusty@rustcorp.com.au>
Reviewed-by: Grant Grundler <grundler@parisc-linux.org>
Tested-by: Tony Luck <tony.luck@intel.com>
Acked-by: Ingo Molnar <mingo@elte.hu>
Cc: Mike Travis <travis@sgi.com>
Cc: ink@jurassic.park.msu.ru
Cc: rmk@arm.linux.org.uk
Cc: starvik@axis.com
Cc: tony.luck@intel.com
Cc: takata@linux-m32r.org
Cc: ralf@linux-mips.org
Cc: grundler@parisc-linux.org
Cc: paulus@samba.org
Cc: schwidefsky@de.ibm.com
Cc: lethal@linux-sh.org
Cc: wli@holomorphy.com
Cc: davem@davemloft.net
Cc: jdike@addtoit.com
Cc: mingo@redhat.com
|
| 8531a35e5e275b17c57c39b7911bc2b37025f28c |
|
09-Sep-2008 |
Kevin D. Kissell <kevink@paralogos.com> |
[MIPS] SMTC: Fix SMTC dyntick support.
Rework of SMTC support to make it work with the new clock event system,
allowing "tickless" operation, and to make it compatible with the use of
the "wait_irqoff" idle loop. The new clocking scheme means that the
previously optional IPI instant replay mechanism is now required, and has
been made more robust.
Signed-off-by: Kevin D. Kissell <kevink@paralogos.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
|
| d2bb01b042a38219fbddaafc214c5beb96248d2f |
|
09-Sep-2008 |
Kevin D. Kissell <kevink@paralogos.com> |
[MIPS] SMTC: Close tiny holes in the SMTC IPI replay system.
Signed-off-by: Kevin D. Kissell <kevink@paralogos.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
|
| b7e4226e4f427b59dc8e9c45a2a1a1ed1353a140 |
|
01-Oct-2008 |
Ralf Baechle <ralf@linux-mips.org> |
[MIPS] Build fix: Fix irq flags type
Though from a hardware perspective it would be sensible to use only a
32-bit unsigned int type Linux defines interrupt flags to be stored in
an unsigned long and nothing else.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
|
| 2f304c0a0a55072b80957580f1b66256a615d8da |
|
17-Jun-2008 |
Jens Axboe <jens.axboe@oracle.com> |
mips: convert to generic helpers for IPI function calls
This converts mips to use the new helpers for smp_call_function() and
friends, and adds support for smp_call_function_single(). Not tested,
but it compiles.
mips shares the same IPI for smp_call_function() and
smp_call_function_single(), since not all mips platforms have enough
available IPIs to support seperate setups.
Cc: Ralf Baechle <ralf@linux-mips.org>
Signed-off-by: Jens Axboe <jens.axboe@oracle.com>
|
| 39b8d5254246ac56342b72f812255c8f7a74dca9 |
|
28-Apr-2008 |
Ralf Baechle <ralf@linux-mips.org> |
[MIPS] Add support for MIPS CMP platform.
Signed-off-by: Chris Dearman <chris@mips.com>
Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
|
| 0bfa130e741f8f73a7bbf6a89aad4816e9094a71 |
|
14-Sep-2007 |
Chris Dearman <chris@mips.com> |
[MIPS] Remove TLB sanitation code
It is not being used by Malta and shouldn't be needed for MIPSsim.
Signed-off-by: Chris Dearman <chris@mips.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
|
| 603e82edf78ad6c0f836023f8db585620211947b |
|
03-Feb-2008 |
Joe Perches <joe@perches.com> |
arch/mips/: Spelling fixes
Signed-off-by: Joe Perches <joe@perches.com>
Signed-off-by: Adrian Bunk <bunk@kernel.org>
|
| 87353d8ac39c52784da605ecbe965ecdfad609ad |
|
19-Nov-2007 |
Ralf Baechle <ralf@linux-mips.org> |
[MIPS] SMP: Call platform methods via ops structure.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
|
| be5f1f2114665508a722e3924a3a7f477c502841 |
|
21-Mar-2007 |
Kevin D. Kissell <kevink@mips.com> |
[MIPS] SMTC: Allow control over TC assignment to vpe0.
Modify the SMTC initialization code to allow boot-time specification not
only of how many VPEs and TCs to use, but also how many TCs out of the
allowed pool are to be bound to VPE 0. The new boot option is "vpe0tcs=N",
where N is an integer. Using it in combination with the existing options
allows arbitrary assignments across the 2 VPEs of a 34K. e.g. "maxtcs=3
vpe0tcs=1" forces VPE0 to have 1 TC, while VPE1 has 2, and "maxtcs=4
vpe0tcs=3" forces VPE0 to have 3 TCs, while VPE1 gets 1. If no vpe0tcs
option is specified, the traditional algorithm of evenly dividing TCs
between available VPEs, with the odd "slop" going to VPE0, is retained.
The reason for doing this is to allow a finer balancing of TCs which can
handle I/O interrupts on Malta (those on VPE 0) and those which cannot.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
|
| b5eb551145395382ddf302548991a5fbaabc5341 |
|
03-Oct-2007 |
Ralf Baechle <ralf@linux-mips.org> |
[MIPS] Kill num_online_cpus() loops.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
|
| 21a151d8ca3aa74ee79f9791a9d4dc370d3e0636 |
|
12-Oct-2007 |
Ralf Baechle <ralf@linux-mips.org> |
[MIPS] checkfiles: Fix "need space after that ','" errors.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
|
| 49a89efbbbcc178a39555c43bd59a7593c429664 |
|
12-Oct-2007 |
Ralf Baechle <ralf@linux-mips.org> |
[MIPS] Fix "no space between function name and open parenthesis" warnings.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
|
| ea5804015c0ce67741eb4b156a071fb4f415345f |
|
12-Oct-2007 |
Ralf Baechle <ralf@linux-mips.org> |
[MIPS] Dyntick support for SMTC:
The kernel currently only supports broadcasting of the timer interrupt
from a single timer, not multicasting into two multicast groups of
processors. So the implemented mechanism for SMTC works by broadcasting
the cp0 compare interrupt on VPE 0 and ignoring it on any additional VPEs.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
|
| 7bcf7717b6a047c272410d0cd00213185fe6b99d |
|
12-Oct-2007 |
Ralf Baechle <ralf@linux-mips.org> |
[MIPS] Implement clockevents for R4000-style cp0 count/compare interrupt
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
|
| 91a2fcc88634663e9e13dcdfad0e4a860e64aeee |
|
12-Oct-2007 |
Ralf Baechle <ralf@linux-mips.org> |
[MIPS] Consolidate all variants of MIPS cp0 timer interrupt handlers.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
|
| d87d0c930a1591617e4c7c78296b4ba029150188 |
|
12-Oct-2007 |
Ralf Baechle <ralf@linux-mips.org> |
[MIPS] SMTC: Microoptimize atomic_postincrement for non-weak consistency.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
|
| f571eff0a24ed97a919f2b61bb4afdeab4b43002 |
|
03-Aug-2007 |
Kevin D. Kissell <kevink@mips.com> |
[MIPS] IRQ Affinity Support for SMTC on Malta Platform
Signed-off-by: Kevin D. Kissell <kevink@mips.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
|
| 1146fe30504a1edd8a434f500e1be139492570c9 |
|
21-Sep-2007 |
Ralf Baechle <ralf@linux-mips.org> |
[MIPS] SMTC: Make ack_bad_irq() safe with no IM backstop.
Issue reported and original patch by Kevin Kissel, cleaner (imho)
implementation by me.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
|
| fe56b954eadefb8b93b7d6b9244af38a352c8799 |
|
06-Aug-2007 |
Ralf Baechle <ralf@linux-mips.org> |
[MIPS] SMTC: Move MIPS_CPU_IPI_IRQ definition into header.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
|
| e119d49ab51385d8163246db8cce74a46cd3b863 |
|
28-Jul-2007 |
Ralf Baechle <ralf@linux-mips.org> |
[MIPS] SMTC: Fix modpost warning.
WARNING: vmlinux.o(.text+0xcf54): Section mismatch: reference to .init.text:smp_bootstrap (between 'smtc_boot_secondary' and 'ipi_interrupt')
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
|
| 07cc0c9e65d3e262f871ea357dd77b41950b1ca5 |
|
27-Jul-2007 |
Ralf Baechle <ralf@linux-mips.org> |
[MIPS] MT: Enable coexistence of AP/SP with VSMP and SMTC.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
|
| efaa534ed191662270e3be143c8a038a7492ce8f |
|
27-Jul-2007 |
Ralf Baechle <ralf@linux-mips.org> |
[MIPS] SMTC: smtc_timer_broadcast ignores its arguments, make it void.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
|
| 97aef63c9f403e4a3d07e3da9e468add0cd93385 |
|
27-Jul-2007 |
Ralf Baechle <ralf@linux-mips.org> |
[MIPS] SMTC: Declare static what should be static.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
|
| 033890b084adfa367c544864451d7730552ce8bf |
|
27-Jul-2007 |
Ralf Baechle <ralf@linux-mips.org> |
[MIPS] SMTC: Statically initialize irq_ipi[].
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
|
| 8f8771a057bff0d3911459d0bdadf03ec1dd3c89 |
|
10-Jul-2007 |
Ralf Baechle <ralf@linux-mips.org> |
[MIPS] SMTC: Use current_cpu_data instead of cpu_data[smp_processor_id]
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
|
| 8e15a0e35fdaf19e1aeb7923571e928bd6123cfd |
|
21-Jun-2007 |
Chris Dearman <chris@mips.com> |
[MIPS] Count timer interrupts correctly.
Signed-off-by: Chris Dearman <chris@mips.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
|
| 3b1d4ed5353af04d6aa20be2701727b9cdb2ac61 |
|
20-Jun-2007 |
Ralf Baechle <ralf@linux-mips.org> |
[MIPS] Don't drag a platform specific header into generic arch code.
For some platforms it's definitions may conflict. So that's the one-liner.
The rest is 10 square kilometers of collateral damage fixup this include
used to paper over.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
|
| ef36fc3c5b37111d41827d00536364667a923235 |
|
31-May-2007 |
Ralf Baechle <ralf@linux-mips.org> |
[MIPS] SMTC: Fix warning.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
|
| c9f4f06d3191bd91c1a081b54a6c8e913e7b8a83 |
|
09-May-2007 |
Roman Zippel <zippel@linux-m68k.org> |
wrap access to thread_info
Recently a few direct accesses to the thread_info in the task structure snuck
back, so this wraps them with the appropriate wrapper.
Signed-off-by: Roman Zippel <zippel@linux-m68k.org>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
|
| 8a1e97ee2e025f116765c92409a3cf8f6cb07ad6 |
|
30-Mar-2007 |
Ralf Baechle <ralf@linux-mips.org> |
[MIPS] SMTC: Fix recursion in instant IPI replay code.
local_irq_restore -> raw_local_irq_restore -> irq_restore_epilog ->
smtc_ipi_replay -> smtc_ipi_dq -> spin_unlock_irqrestore ->
_spin_unlock_irqrestore -> local_irq_restore
The recursion does abort when there is no more IPI queued for a CPU, so
this isn't usually fatal which is why we got away with this for so long
until this was discovered by code inspection.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
|
| 20bb25d10fe5569df8f3f186a36e5548582854d9 |
|
27-Mar-2007 |
Ralf Baechle <ralf@linux-mips.org> |
[MIPS] SMTC: Fix false trigger of debug code on single VPE.
Make smtc_setup_irq() update the list of interrupts which need to be
watched by the debug code itself. Also there is no need to initialize the
IPI swint when running with a single VPE, so don't initialize it.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
|
| ae036b790891565c5b4b64e616ed497138d1f8d6 |
|
27-Mar-2007 |
Ralf Baechle <ralf@linux-mips.org> |
[MIPS] SMTC: irq_{enter,leave} and kstats keeping for relayed timer ints.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
|
| c68644d3304d217d50b8f0a179d4aa7e5a85a5bc |
|
26-Feb-2007 |
Ralf Baechle <ralf@linux-mips.org> |
[MIPS] Make SMTC_IDLE_HOOK_DEBUG a proper option in Kconfig.debug.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
|
| 5868756dcbf4b585c3c485e43fc36844c038cef5 |
|
05-Feb-2007 |
Ralf Baechle <ralf@linux-mips.org> |
[MIPS] SMTC: Make a bunch of functions and variables static.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
|
| e0daad449c5195fa4552c60392eeee4e5c58d31c |
|
05-Feb-2007 |
Ralf Baechle <ralf@linux-mips.org> |
[MIPS] Whitespace cleanups.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
|
| 418451c17870e56a176aeb4be1bed810f634fb5a |
|
06-Feb-2007 |
Ralf Baechle <ralf@linux-mips.org> |
[MIPS] SMTC: remove unused atomic_postclear
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
|
| 97dcb82de6cc99a5669eb8e342efc24cceb1e77e |
|
07-Jan-2007 |
Atsushi Nemoto <anemo@mba.ocn.ne.jp> |
[MIPS] Define MIPS_CPU_IRQ_BASE in generic header
The irq_base for {mips,rm7k,rm9k}_cpu_irq_init() are constant on all
platforms and are same value on most platforms (0 or 16, depends on
CONFIG_I8259). Define them in asm-mips/mach-generic/irq.h and make
them customizable. This will save a few cycle on each CPU interrupt.
A good side effect is removing some dependencies to MALTA in generic
SMTC code.
Although MIPS_CPU_IRQ_BASE is customizable, this patch changes irq
mappings on DDB5477, EMMA2RH and MIPS_SIM, since really customizing
them might cause some header dependency problem and there seems no
good reason to customize it. So currently only VR41XX is using custom
MIPS_CPU_IRQ_BASE value, which is 0 regardless of CONFIG_I8259.
Testing this patch on those platforms is greatly appreciated. Thank
you.
Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
|
| ec43c01420fc1da8bf0b19f0ceb24d7d3c7f47f3 |
|
24-Jan-2007 |
Ralf Baechle <ralf@linux-mips.org> |
[MIPS] SMTC: Fix module build by exporting symbol
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
|
| a0b6218037b5cf50737a7dc0fc5464ea3f8781cd |
|
19-Jan-2007 |
Ralf Baechle <ralf@linux-mips.org> |
[MIPS] SMTC: Fix TLB sizing bug for TLB of 64 >= entries
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
|
| ac8be955049dab828a68b9c68a75144832f8289f |
|
20-Jan-2007 |
Ralf Baechle <ralf@linux-mips.org> |
[MIPS] SMTC: Instant IPI replay.
SMTC pseudo-interrupts between TCs are deferred and queued if the target
TC is interrupt-inhibited (IXMT). In the first SMTC prototypes, these
queued IPIs were serviced on return to user mode, or on entry into the
kernel idle loop. The INSTANT_REPLAY option dispatches them as part of
local_irq_restore() processing, which adds runtime overhead (hence the
option to turn it off), but ensures that IPIs are handled promptly even
under heavy I/O interrupt load.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
|
| c80697b3a0d05dd87eeeb55c4dd1c3dae047293e |
|
17-Jan-2007 |
Ralf Baechle <ralf@linux-mips.org> |
[MIPS] SMTC: Fix cp0 hazard.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
|
| 1417836e81c0ab8f5a0bfeafa90d3eaa41b2a067 |
|
13-Nov-2006 |
Atsushi Nemoto <anemo@mba.ocn.ne.jp> |
[MIPS] use generic_handle_irq, handle_level_irq, handle_percpu_irq
Further incorporation of generic irq framework. Replacing __do_IRQ()
by proper flow handler would make the irq handling path a bit simpler
and faster.
* use generic_handle_irq() instead of __do_IRQ().
* use handle_level_irq for obvious level-type irq chips.
* use handle_percpu_irq for irqs marked as IRQ_PER_CPU.
* setup .eoi routine for irq chips possibly used with handle_percpu_irq.
Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
|
| 64c590b7a62ae1272fe4afd7b915de314591f35e |
|
01-Nov-2006 |
Ralf Baechle <ralf@linux-mips.org> |
[MIPS] SMTC: Synchronize cp0 counters on bootup.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
|
| 937a801576f954bd030d7c4a5a94571710d87c0b |
|
07-Oct-2006 |
Ralf Baechle <ralf@linux-mips.org> |
[MIPS] Complete fixes after removal of pt_regs argument to int handlers.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
|
| 54d0a216f40e060ba4265bb851cc36b3ca55d1a8 |
|
09-Jul-2006 |
Ralf Baechle <ralf@linux-mips.org> |
[MIPS] Replace board_timer_setup function pointer by plat_timer_setup.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
---
|
| 4bf42d4272d83b42e1492215a34d42dae8e6fccc |
|
08-Jul-2006 |
Ralf Baechle <ralf@linux-mips.org> |
[MIPS] SMTC: Reformat to Linux style.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
|
| f40298fddcc3c8115c6135c9733f5a0de52dcea9 |
|
02-Jul-2006 |
Thomas Gleixner <tglx@linutronix.de> |
[PATCH] irq-flags: MIPS: Use the new IRQF_ constants
Use the new IRQF_ constants and remove the SA_INTERRUPT define
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Cc: Ingo Molnar <mingo@elte.hu>
Cc: "David S. Miller" <davem@davemloft.net>
Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Cc: Ralf Baechle <ralf@linux-mips.org>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
|
| 34af946a22724c4e2b204957f2b24b22a0fb121c |
|
27-Jun-2006 |
Ingo Molnar <mingo@elte.hu> |
[PATCH] spin/rwlock init cleanups
locking init cleanups:
- convert " = SPIN_LOCK_UNLOCKED" to spin_lock_init() or DEFINE_SPINLOCK()
- convert rwlocks in a similar manner
this patch was generated automatically.
Motivation:
- cleanliness
- lockdep needs control of lock initialization, which the open-coded
variants do not give
- it's also useful for -rt and for lock debugging in general
Signed-off-by: Ingo Molnar <mingo@elte.hu>
Signed-off-by: Arjan van de Ven <arjan@linux.intel.com>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
|
| 41c594ab65fc89573af296d192aa5235d09717ab |
|
05-Apr-2006 |
Ralf Baechle <ralf@linux-mips.org> |
[MIPS] MT: Improved multithreading support.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
|