/external/smali/dexlib2/src/main/java/org/jf/dexlib2/builder/ |
H A D | MutableMethodImplementation.java | 929 return new BuilderStartLocal(startLocal.getRegister(), startLocal.getNameReference(), 934 return new BuilderEndLocal(endLocal.getRegister()); 938 return new BuilderRestartLocal(restartLocal.getRegister());
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/external/llvm/include/llvm/CodeGen/ |
H A D | SelectionDAG.h | 474 SDValue getRegister(unsigned Reg, EVT VT); 488 getRegister(Reg, N.getValueType()), N); 497 SDValue Ops[] = { Chain, getRegister(Reg, N.getValueType()), N, Glue }; 513 SDValue Ops[] = { Chain, getRegister(Reg, VT) }; 523 SDValue Ops[] = { Chain, getRegister(Reg, VT), Glue };
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/external/chromium_org/third_party/mesa/src/src/gallium/drivers/radeon/ |
H A D | AMDGPUISelLowering.cpp | 325 return DAG.getRegister(VirtualRegister, VT);
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H A D | SIISelLowering.cpp | 367 unsigned Reg = dstClass->getRegister(SGPRIndex);
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/external/dexmaker/src/dx/java/com/android/dx/dex/file/ |
H A D | DebugInfoDecoder.java | 547 if (decodedEntry.reg != origEntry.getRegister()) {
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/external/llvm/lib/Target/AArch64/ |
H A D | AArch64AsmPrinter.cpp | 258 unsigned RegToPrint = RC->getRegister(RI->getEncodingValue(Reg));
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H A D | AArch64ISelLowering.cpp | 2417 Ops.push_back(DAG.getRegister(RegsToPass[i].first, 2522 RetOps.push_back(DAG.getRegister(VA.getLocReg(), VA.getLocVT())); 2644 Chain, FuncTLVGet, DAG.getRegister(AArch64::X0, MVT::i64), 2699 Ops.push_back(DAG.getRegister(AArch64::X0, PtrVT)); 3930 Res.first = AArch64::FPR128RegClass.getRegister(RegNo); 3964 Result = DAG.getRegister(AArch64::XZR, MVT::i64); 3966 Result = DAG.getRegister(AArch64::WZR, MVT::i32); 7418 Inc = DAG.getRegister(AArch64::XZR, MVT::i64); 7542 Inc = DAG.getRegister(AArch64::XZR, MVT::i64);
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/external/llvm/lib/Target/MSP430/ |
H A D | MSP430ISelDAGToDAG.cpp | 259 AM.Base.Reg = CurDAG->getRegister(0, VT);
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H A D | MSP430ISelLowering.cpp | 556 RetOps.push_back(DAG.getRegister(VA.getLocReg(), VA.getLocVT())); 688 Ops.push_back(DAG.getRegister(RegsToPass[i].first,
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/external/mesa3d/src/gallium/drivers/radeon/ |
H A D | AMDGPUISelLowering.cpp | 325 return DAG.getRegister(VirtualRegister, VT);
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H A D | SIISelLowering.cpp | 367 unsigned Reg = dstClass->getRegister(SGPRIndex);
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/external/llvm/lib/Target/Mips/ |
H A D | MipsSEISelDAGToDAG.cpp | 709 CurDAG->getRegister(Mips::ZERO_64, MVT::i64), 787 CurDAG->getRegister(Mips::HWR29, MVT::i32));
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H A D | MipsISelLowering.cpp | 87 return DAG.getRegister(FI->getGlobalBaseReg(), Ty); 532 SDValue FCC0 = DAG.getRegister(Mips::FCC0, MVT::i32); 1524 SDValue FCC0 = DAG.getRegister(Mips::FCC0, MVT::i32); 1589 SDValue GPReg = DAG.getRegister(Mips::GP, MVT::i32); 1919 DAG.getRegister(OffsetReg, Ty), 1920 DAG.getRegister(AddrReg, getPointerTy()), 2363 Ops.push_back(CLI.DAG.getRegister(RegsToPass[i].first, 2839 RetOps.push_back(DAG.getRegister(VA.getLocReg(), VA.getLocVT())); 2857 RetOps.push_back(DAG.getRegister(V0, getPointerTy())); 3568 SDValue Store = DAG.getStore(Chain, DL, DAG.getRegister(VRe [all...] |
/external/llvm/lib/Target/X86/MCTargetDesc/ |
H A D | X86AsmBackend.cpp | 482 assert(MRI.getLLVMRegNum(Inst.getRegister(), true) == 530 unsigned Reg = MRI.getLLVMRegNum(Inst.getRegister(), true);
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/external/llvm/utils/TableGen/ |
H A D | AsmWriterEmitter.cpp | 916 if (!CGA->ResultOperands[i].getRegister()) { 922 "::" + CGA->ResultOperands[i].getRegister()->getName();
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/external/llvm/lib/Target/PowerPC/ |
H A D | PPCISelLowering.cpp | 1347 Base = DAG.getRegister(Subtarget.isPPC64() ? PPC::ZERO8 : PPC::ZERO, 1398 Base = DAG.getRegister(Subtarget.isPPC64() ? PPC::ZERO8 : PPC::ZERO, 1548 DAG.getRegister(PPC::X2, MVT::i64)); 1569 DAG.getRegister(PPC::X2, MVT::i64)); 1612 SDValue TLSReg = DAG.getRegister(is64bit ? PPC::X13 : PPC::R2, 1624 SDValue GOTReg = DAG.getRegister(PPC::X2, MVT::i64); 1636 SDValue GOTReg = DAG.getRegister(PPC::X2, MVT::i64); 1647 SDValue ParmReg = DAG.getRegister(PPC::X3, MVT::i64); 1659 SDValue GOTReg = DAG.getRegister(PPC::X2, MVT::i64); 1670 SDValue ParmReg = DAG.getRegister(PP [all...] |
H A D | PPCISelDAGToDAG.cpp | 287 return CurDAG->getRegister(GlobalBaseReg, 897 SDValue CR7Reg = CurDAG->getRegister(PPC::CR7, MVT::i32); 1257 SDValue CR0Reg = CurDAG->getRegister(PPC::CR0, MVT::i32);
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/external/libcxxabi/src/Unwind/ |
H A D | CompactUnwinder.hpp | 604 registers.setIP(registers.getRegister(UNW_ARM64_LR));
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/external/llvm/lib/Target/XCore/ |
H A D | XCoreISelLowering.cpp | 870 DAG.getRegister(StackReg, MVT::i32), 871 DAG.getRegister(HandlerReg, MVT::i32)); 1217 Ops.push_back(DAG.getRegister(RegsToPass[i].first, 1525 RetOps.push_back(DAG.getRegister(VA.getLocReg(), VA.getLocVT()));
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/external/llvm/lib/Target/SystemZ/ |
H A D | SystemZISelDAGToDAG.cpp | 581 Base = CurDAG->getRegister(0, VT); 609 Index = CurDAG->getRegister(0, VT);
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/external/llvm/lib/Target/R600/ |
H A D | R600ISelLowering.cpp | 598 unsigned Reg = AMDGPU::R600_TReg32RegClass.getRegister(RegIndex); 631 unsigned Reg = AMDGPU::R600_TReg32RegClass.getRegister(RegIndex); 655 unsigned RegisterI = AMDGPU::R600_TReg32RegClass.getRegister(2 * ijb); 656 unsigned RegisterJ = AMDGPU::R600_TReg32RegClass.getRegister(2 * ijb + 1); 2123 Src = DAG.getRegister(AMDGPU::ALU_CONST, MVT::f32); 2168 Src = DAG.getRegister(ImmReg, MVT::i32);
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H A D | SIISelLowering.cpp | 663 AMDGPU::SReg_32RegClass.getRegister(NumUserSGPRs + 0), VT); 666 AMDGPU::SReg_32RegClass.getRegister(NumUserSGPRs + 1), VT); 669 AMDGPU::SReg_32RegClass.getRegister(NumUserSGPRs + 2), VT);
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H A D | AMDGPUISelDAGToDAG.cpp | 642 Base = CurDAG->getRegister(AMDGPU::INDIRECT_BASE_ADDR, MVT::i32);
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/external/llvm/lib/Target/Hexagon/ |
H A D | HexagonISelLowering.cpp | 342 RetOps.push_back(DAG.getRegister(VA.getLocReg(), VA.getLocVT())); 590 Ops.push_back(DAG.getRegister(RegsToPass[i].first, 1533 DAG.getRegister(Hexagon::R30, getPointerTy()),
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/external/llvm/lib/Target/ARM/ |
H A D | ARMISelLowering.cpp | 1737 Ops.push_back(DAG.getRegister(RegsToPass[i].first, 2130 RetOps.push_back(DAG.getRegister(VA.getLocReg(), VA.getLocVT())); 2136 RetOps.push_back(DAG.getRegister(VA.getLocReg(), VA.getLocVT())); 2151 RetOps.push_back(DAG.getRegister(VA.getLocReg(), VA.getLocVT())); 2162 RetOps.push_back(DAG.getRegister(VA.getLocReg(), VA.getLocVT())); 3283 SDValue CCR = DAG.getRegister(ARM::CPSR, MVT::i32); 3313 SDValue CCR = DAG.getRegister(ARM::CPSR, MVT::i32); 3453 SDValue CCR = DAG.getRegister(ARM::CPSR, MVT::i32); 3494 SDValue CCR = DAG.getRegister(ARM::CPSR, MVT::i32); 3606 SDValue CCR = DAG.getRegister(AR [all...] |