Searched refs:AddrMode (Results 26 - 42 of 42) sorted by relevance
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| /external/chromium_org/v8/src/arm64/ |
| H A D | assembler-arm64-inl.h | 460 MemOperand::MemOperand(Register base, int64_t offset, AddrMode addrmode)
494 MemOperand::MemOperand(Register base, const Operand& offset, AddrMode addrmode)
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| H A D | simulator-arm64.cc | 1565 AddrMode addrmode) {
1668 AddrMode addrmode) {
1826 AddrMode addrmode) {
1846 AddrMode addrmode) {
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| /external/llvm/lib/Target/ARM/ |
| H A D | ARMBaseInstrInfo.cpp | 155 unsigned AddrMode = (TSFlags & ARMII::AddrModeMask); local
167 switch (AddrMode) {
2001 unsigned AddrMode = (Desc.TSFlags & ARMII::AddrModeMask); local
2006 AddrMode = ARMII::AddrMode2;
2049 switch (AddrMode) {
2109 if (AddrMode == ARMII::AddrMode_i12)
2122 if (AddrMode == ARMII::AddrMode_i12)
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| H A D | ARMISelLowering.cpp | 9896 bool ARMTargetLowering::isLegalT2ScaledAddressingMode(const AddrMode &AM,
9931 bool ARMTargetLowering::isLegalAddressingMode(const AddrMode &AM,
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| /external/vixl/src/a64/ |
| H A D | simulator-a64.cc | 775 AddrMode addrmode) {
840 AddrMode addrmode) {
920 AddrMode addrmode) {
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| H A D | assembler-a64.cc | 271 MemOperand::MemOperand(Register base, ptrdiff_t offset, AddrMode addrmode)
304 MemOperand::MemOperand(Register base, const Operand& offset, AddrMode addrmode)
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| /external/chromium_org/v8/src/arm/ |
| H A D | assembler-arm.cc | 311 MemOperand::MemOperand(Register rn, int32_t offset, AddrMode am) {
319 MemOperand::MemOperand(Register rn, Register rm, AddrMode am) {
329 ShiftOp shift_op, int shift_imm, AddrMode am) {
339 NeonMemOperand::NeonMemOperand(Register rn, AddrMode am, int align) {
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| /external/llvm/lib/CodeGen/ |
| H A D | TargetLoweringBase.cpp | 1428 bool TargetLoweringBase::isLegalAddressingMode(const AddrMode &AM,
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| /external/llvm/lib/Target/Hexagon/ |
| H A D | HexagonISelLowering.cpp | 1631 bool HexagonTargetLowering::isLegalAddressingMode(const AddrMode &AM,
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| /external/llvm/lib/Target/XCore/ |
| H A D | XCoreISelLowering.cpp | 1910 XCoreTargetLowering::isLegalAddressingMode(const AddrMode &AM,
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| /external/llvm/lib/Target/NVPTX/ |
| H A D | NVPTXISelLowering.cpp | 2557 bool NVPTXTargetLowering::isLegalAddressingMode(const AddrMode &AM,
2560 // AddrMode - This represents an addressing mode of:
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| /external/llvm/lib/Target/AArch64/ |
| H A D | AArch64ISelLowering.cpp | 6190 bool AArch64TargetLowering::isLegalAddressingMode(const AddrMode &AM,
6241 int AArch64TargetLowering::getScalingFactorCost(const AddrMode &AM,
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| /external/llvm/lib/Target/Mips/ |
| H A D | MipsISelLowering.cpp | 3217 bool MipsTargetLowering::isLegalAddressingMode(const AddrMode &AM,
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| /external/llvm/lib/Target/SystemZ/ |
| H A D | SystemZISelLowering.cpp | 353 bool SystemZTargetLowering::isLegalAddressingMode(const AddrMode &AM,
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| /external/llvm/lib/Target/X86/ |
| H A D | X86ISelLowering.cpp | 16646 bool X86TargetLowering::isLegalAddressingMode(const AddrMode &AM,
22787 int X86TargetLowering::getScalingFactorCost(const AddrMode &AM,
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| /external/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | DAGCombiner.cpp | 7556 TargetLowering::AddrMode AM;
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| /external/llvm/lib/Target/PowerPC/ |
| H A D | PPCISelLowering.cpp | 8744 bool PPCTargetLowering::isLegalAddressingMode(const AddrMode &AM,
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