| /external/llvm/lib/Target/ARM/ |
| H A D | ARMRegisterInfo.cpp | 19 ARMRegisterInfo::ARMRegisterInfo(const ARMSubtarget &sti) argument
20 : ARMBaseRegisterInfo(sti) {
|
| H A D | Thumb2RegisterInfo.cpp | 28 Thumb2RegisterInfo::Thumb2RegisterInfo(const ARMSubtarget &sti) argument
29 : ARMBaseRegisterInfo(sti) {
|
| H A D | Thumb1FrameLowering.h | 26 explicit Thumb1FrameLowering(const ARMSubtarget &sti);
|
| H A D | ARMFrameLowering.h | 27 explicit ARMFrameLowering(const ARMSubtarget &sti);
|
| H A D | ARMBaseRegisterInfo.cpp | 46 ARMBaseRegisterInfo::ARMBaseRegisterInfo(const ARMSubtarget &sti) argument
47 : ARMGenRegisterInfo(ARM::LR, 0, 0, ARM::PC), STI(sti), BasePtr(ARM::R6) {
|
| H A D | Thumb1FrameLowering.cpp | 24 Thumb1FrameLowering::Thumb1FrameLowering(const ARMSubtarget &sti) argument
25 : ARMFrameLowering(sti) {}
|
| H A D | Thumb1RegisterInfo.cpp | 41 Thumb1RegisterInfo::Thumb1RegisterInfo(const ARMSubtarget &sti) argument
42 : ARMBaseRegisterInfo(sti) {
|
| H A D | ARMFrameLowering.cpp | 42 ARMFrameLowering::ARMFrameLowering(const ARMSubtarget &sti) argument
43 : TargetFrameLowering(StackGrowsDown, sti.getStackAlignment(), 0, 4),
44 STI(sti) {}
|
| /external/llvm/lib/Target/Mips/ |
| H A D | MipsFrameLowering.h | 28 explicit MipsFrameLowering(const MipsSubtarget &sti, unsigned Alignment) argument
29 : TargetFrameLowering(StackGrowsDown, Alignment, 0, Alignment), STI(sti) {}
|
| /external/llvm/lib/Target/Sparc/InstPrinter/ |
| H A D | SparcInstPrinter.h | 30 const MCSubtargetInfo &sti)
31 : MCInstPrinter(MAI, MII, MRI), STI(sti) {}
27 SparcInstPrinter(const MCAsmInfo &MAI, const MCInstrInfo &MII, const MCRegisterInfo &MRI, const MCSubtargetInfo &sti) argument
|
| /external/llvm/include/llvm/CodeGen/ |
| H A D | TargetSchedule.h | 51 void init(const MCSchedModel &sm, const TargetSubtargetInfo *sti,
|
| /external/llvm/lib/Target/AArch64/ |
| H A D | AArch64RegisterInfo.h | 34 AArch64RegisterInfo(const AArch64InstrInfo *tii, const AArch64Subtarget *sti);
|
| H A D | AArch64RegisterInfo.cpp | 37 const AArch64Subtarget *sti)
38 : AArch64GenRegisterInfo(AArch64::LR), TII(tii), STI(sti) {}
36 AArch64RegisterInfo(const AArch64InstrInfo *tii, const AArch64Subtarget *sti) argument
|
| /external/chromium_org/third_party/mesa/src/src/gallium/drivers/radeon/MCTargetDesc/ |
| H A D | SIMCCodeEmitter.cpp | 67 SIMCCodeEmitter(const MCInstrInfo &mcii, const MCSubtargetInfo &sti, argument
69 : MCII(mcii), STI(sti), Ctx(ctx) { }
|
| H A D | R600MCCodeEmitter.cpp | 48 R600MCCodeEmitter(const MCInstrInfo &mcii, const MCSubtargetInfo &sti, argument
50 : MCII(mcii), STI(sti), Ctx(ctx) { }
|
| /external/llvm/lib/CodeGen/ |
| H A D | TargetSchedule.cpp | 55 const TargetSubtargetInfo *sti,
58 STI = sti;
54 init(const MCSchedModel &sm, const TargetSubtargetInfo *sti, const TargetInstrInfo *tii) argument
|
| /external/mesa3d/src/gallium/drivers/radeon/MCTargetDesc/ |
| H A D | SIMCCodeEmitter.cpp | 67 SIMCCodeEmitter(const MCInstrInfo &mcii, const MCSubtargetInfo &sti, argument
69 : MCII(mcii), STI(sti), Ctx(ctx) { }
|
| H A D | R600MCCodeEmitter.cpp | 48 R600MCCodeEmitter(const MCInstrInfo &mcii, const MCSubtargetInfo &sti, argument
50 : MCII(mcii), STI(sti), Ctx(ctx) { }
|
| /external/qemu-pc-bios/bochs/bios/ |
| H A D | apmbios.S | 228 sti
|
| H A D | rombios.c | 1549 sti
2921 sti ;; enable higher priority interrupts local
3072 sti ;; enable higher priority interrupts local
3224 sti ;; enable higher priority interrupts local
3749 sti
4054 sti
4491 sti local
4694 sti
6455 sti ;; enable higher priority interrupts local
6595 sti ;; enabl local
[all...] |
| /external/qemu/target-i386/ |
| H A D | helper.h | 69 DEF_HELPER_1(sti, void, env)
|
| /external/llvm/lib/Target/Sparc/AsmParser/ |
| H A D | SparcAsmParser.cpp | 81 SparcAsmParser(MCSubtargetInfo &sti, MCAsmParser &parser, argument
84 : MCTargetAsmParser(), STI(sti), Parser(parser) {
|
| /external/llvm/lib/Target/SystemZ/AsmParser/ |
| H A D | SystemZAsmParser.cpp | 331 SystemZAsmParser(MCSubtargetInfo &sti, MCAsmParser &parser, argument
334 : MCTargetAsmParser(), STI(sti), Parser(parser) {
|
| /external/llvm/lib/Target/AArch64/MCTargetDesc/ |
| H A D | AArch64MCCodeEmitter.cpp | 41 AArch64MCCodeEmitter(const MCInstrInfo &mcii, const MCSubtargetInfo &sti, argument
|
| /external/llvm/lib/Target/SystemZ/ |
| H A D | SystemZInstrInfo.cpp | 43 SystemZInstrInfo::SystemZInstrInfo(SystemZSubtarget &sti) argument
45 RI(), STI(sti) {
|