Searched refs:SDValue (Results 1 - 25 of 108) sorted by relevance

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/external/llvm/lib/Target/Mips/
H A DMipsISelDAGToDAG.h57 virtual bool selectAddrRegImm(SDValue Addr, SDValue &Base,
58 SDValue &Offset) const;
62 virtual bool selectAddrRegReg(SDValue Addr, SDValue &Base,
63 SDValue &Offset) const;
66 virtual bool selectAddrDefault(SDValue Addr, SDValue &Base,
67 SDValue &Offset) const;
70 virtual bool selectIntAddr(SDValue Add
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H A DMipsSEISelDAGToDAG.h33 unsigned getMSACtrlReg(const SDValue RegIdx) const;
40 SDNode *selectAddESubE(unsigned MOp, SDValue InFlag, SDValue CmpLHS,
43 bool selectAddrFrameIndex(SDValue Addr, SDValue &Base, SDValue &Offset) const;
44 bool selectAddrFrameIndexOffset(SDValue Addr, SDValue &Base, SDValue &Offset,
47 bool selectAddrRegImm(SDValue Add
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H A DMipsISelDAGToDAG.cpp68 bool MipsDAGToDAGISel::selectAddrRegImm(SDValue Addr, SDValue &Base,
69 SDValue &Offset) const {
74 bool MipsDAGToDAGISel::selectAddrRegReg(SDValue Addr, SDValue &Base,
75 SDValue &Offset) const {
80 bool MipsDAGToDAGISel::selectAddrDefault(SDValue Addr, SDValue &Base,
81 SDValue &Offset) const {
86 bool MipsDAGToDAGISel::selectIntAddr(SDValue Add
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H A DMipsSEISelLowering.h36 SDValue LowerOperation(SDValue Op, SelectionDAG &DAG) const override;
38 SDValue PerformDAGCombine(SDNode *N, DAGCombinerInfo &DCI) const override;
57 getOpndList(SmallVectorImpl<SDValue> &Ops,
58 std::deque< std::pair<unsigned, SDValue> > &RegsToPass,
60 CallLoweringInfo &CLI, SDValue Callee,
61 SDValue Chain) const override;
63 SDValue lowerLOAD(SDValue Op, SelectionDAG &DAG) const;
64 SDValue lowerSTOR
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/external/llvm/lib/CodeGen/SelectionDAG/
H A DLegalizeTypes.h86 SmallDenseMap<SDValue, SDValue, 8> PromotedIntegers;
90 SmallDenseMap<SDValue, std::pair<SDValue, SDValue>, 8> ExpandedIntegers;
94 SmallDenseMap<SDValue, SDValue, 8> SoftenedFloats;
98 SmallDenseMap<SDValue, std::pair<SDValue, SDValue>,
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/external/llvm/include/llvm/Target/
H A DTargetSelectionDAGInfo.h47 /// SDValue if the target declines to use custom code and a different
56 virtual SDValue
58 SDValue Chain,
59 SDValue Op1, SDValue Op2,
60 SDValue Op3, unsigned Align, bool isVolatile,
64 return SDValue();
71 /// SDValue if the target declines to use custom code and a different
73 virtual SDValue
75 SDValue Chai
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/external/llvm/lib/Target/SystemZ/
H A DSystemZSelectionDAGInfo.h28 SDValue EmitTargetCodeForMemcpy(SelectionDAG &DAG, SDLoc DL, SDValue Chain,
29 SDValue Dst, SDValue Src,
30 SDValue Size, unsigned Align,
35 SDValue EmitTargetCodeForMemset(SelectionDAG &DAG, SDLoc DL,
36 SDValue Chain, SDValue Dst, SDValue Byte,
37 SDValue Siz
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H A DSystemZISelLowering.h224 void LowerAsmOperandForConstraint(SDValue Op,
226 std::vector<SDValue> &Ops,
231 SDValue LowerOperation(SDValue Op, SelectionDAG &DAG) const override;
234 SDValue LowerFormalArguments(SDValue Chain, CallingConv::ID CallConv,
238 SmallVectorImpl<SDValue> &InVals) const override;
239 SDValue LowerCall(CallLoweringInfo &CLI,
240 SmallVectorImpl<SDValue> &InVals) const override;
242 SDValue LowerRetur
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/external/llvm/lib/Target/R600/
H A DR600ISelLowering.h29 SDValue LowerOperation(SDValue Op, SelectionDAG &DAG) const override;
30 SDValue PerformDAGCombine(SDNode *N, DAGCombinerInfo &DCI) const override;
32 SmallVectorImpl<SDValue> &Results,
34 SDValue LowerFormalArguments(
35 SDValue Chain,
40 SmallVectorImpl<SDValue> &InVals) const override;
48 SDValue LowerImplicitParameter(SelectionDAG &DAG, EVT VT,
53 SDValue OptimizeSwizzle(SDValue BuildVecto
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H A DAMDGPUISelLowering.h32 SDValue LowerConstantInitializer(const Constant* Init, const GlobalValue *GV,
33 const SDValue &InitPtr,
34 SDValue Chain,
36 SDValue LowerFrameIndex(SDValue Op, SelectionDAG &DAG) const;
37 SDValue LowerEXTRACT_SUBVECTOR(SDValue Op, SelectionDAG &DAG) const;
38 SDValue LowerCONCAT_VECTORS(SDValue Op, SelectionDAG &DAG) const;
39 SDValue LowerINTRINSIC_WO_CHAI
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H A DSIISelLowering.h24 SDValue LowerParameter(SelectionDAG &DAG, EVT VT, EVT MemVT, SDLoc DL,
25 SDValue Chain, unsigned Offset, bool Signed) const;
26 SDValue LowerSampleIntrinsic(unsigned Opcode, const SDValue &Op,
28 SDValue LowerLOAD(SDValue Op, SelectionDAG &DAG) const;
29 SDValue LowerSELECT(SDValue Op, SelectionDAG &DAG) const;
30 SDValue LowerSTORE(SDValue O
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/external/llvm/lib/Target/MSP430/
H A DMSP430ISelLowering.h76 SDValue LowerOperation(SDValue Op, SelectionDAG &DAG) const override;
82 SDValue LowerShifts(SDValue Op, SelectionDAG &DAG) const;
83 SDValue LowerGlobalAddress(SDValue Op, SelectionDAG &DAG) const;
84 SDValue LowerBlockAddress(SDValue Op, SelectionDAG &DAG) const;
85 SDValue LowerExternalSymbol(SDValue O
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/external/llvm/lib/Target/XCore/
H A DXCoreISelLowering.h100 bool isZExtFree(SDValue Val, EVT VT2) const override;
107 SDValue LowerOperation(SDValue Op, SelectionDAG &DAG) const override;
112 void ReplaceNodeResults(SDNode *N, SmallVectorImpl<SDValue>&Results,
130 SDValue LowerCCCArguments(SDValue Chain,
135 SmallVectorImpl<SDValue> &InVals) const;
136 SDValue LowerCCCCallTo(SDValue Chain, SDValue Calle
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H A DXCoreSelectionDAGInfo.h28 SDValue
30 SDValue Chain,
31 SDValue Op1, SDValue Op2,
32 SDValue Op3, unsigned Align, bool isVolatile,
/external/chromium_org/third_party/mesa/src/src/gallium/drivers/radeon/
H A DAMDGPUISelLowering.h27 SDValue LowerINTRINSIC_WO_CHAIN(SDValue Op, SelectionDAG &DAG) const;
28 SDValue LowerUDIVREM(SDValue Op, SelectionDAG &DAG) const;
35 SDValue CreateLiveInRegister(SelectionDAG &DAG, const TargetRegisterClass *RC,
38 bool isHWTrueValue(SDValue Op) const;
39 bool isHWFalseValue(SDValue Op) const;
44 virtual SDValue LowerFormalArguments(SDValue Chain, CallingConv::ID CallConv,
48 SmallVectorImpl<SDValue>
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H A DR600ISelLowering.h29 virtual SDValue LowerOperation(SDValue Op, SelectionDAG &DAG) const;
38 SDValue LowerImplicitParameter(SelectionDAG &DAG, EVT VT,
44 SDValue LowerBR_CC(SDValue Op, SelectionDAG &DAG) const;
47 SDValue LowerROTL(SDValue Op, SelectionDAG &DAG) const;
49 SDValue LowerSELECT_CC(SDValue Op, SelectionDAG &DAG) const;
50 SDValue LowerSETC
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/external/mesa3d/src/gallium/drivers/radeon/
H A DAMDGPUISelLowering.h27 SDValue LowerINTRINSIC_WO_CHAIN(SDValue Op, SelectionDAG &DAG) const;
28 SDValue LowerUDIVREM(SDValue Op, SelectionDAG &DAG) const;
35 SDValue CreateLiveInRegister(SelectionDAG &DAG, const TargetRegisterClass *RC,
38 bool isHWTrueValue(SDValue Op) const;
39 bool isHWFalseValue(SDValue Op) const;
44 virtual SDValue LowerFormalArguments(SDValue Chain, CallingConv::ID CallConv,
48 SmallVectorImpl<SDValue>
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H A DR600ISelLowering.h29 virtual SDValue LowerOperation(SDValue Op, SelectionDAG &DAG) const;
38 SDValue LowerImplicitParameter(SelectionDAG &DAG, EVT VT,
44 SDValue LowerBR_CC(SDValue Op, SelectionDAG &DAG) const;
47 SDValue LowerROTL(SDValue Op, SelectionDAG &DAG) const;
49 SDValue LowerSELECT_CC(SDValue Op, SelectionDAG &DAG) const;
50 SDValue LowerSETC
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/external/llvm/lib/Target/AArch64/
H A DAArch64ISelLowering.h209 void computeKnownBitsForTargetNode(const SDValue Op, APInt &KnownZero,
228 SDValue LowerOperation(SDValue Op, SelectionDAG &DAG) const override;
232 SDValue PerformDAGCombine(SDNode *N, DAGCombinerInfo &DCI) const override;
263 SDValue ReconstructShuffle(SDValue Op, SelectionDAG &DAG) const;
280 bool isZExtFree(SDValue Val, EVT VT2) const override;
339 SDValue
340 LowerFormalArguments(SDValue Chain, CallingConv::ID CallConv, bool isVarArg,
343 SmallVectorImpl<SDValue>
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H A DAArch64SelectionDAGInfo.h26 SDValue EmitTargetCodeForMemset(SelectionDAG &DAG, SDLoc dl, SDValue Chain,
27 SDValue Dst, SDValue Src, SDValue Size,
/external/llvm/lib/Target/ARM/
H A DARMSelectionDAGInfo.h43 SDValue EmitTargetCodeForMemcpy(SelectionDAG &DAG, SDLoc dl,
44 SDValue Chain,
45 SDValue Dst, SDValue Src,
46 SDValue Size, unsigned Align,
52 SDValue EmitTargetCodeForMemset(SelectionDAG &DAG, SDLoc dl,
53 SDValue Chain,
54 SDValue Op1, SDValue Op2,
55 SDValue Op
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/external/llvm/lib/Target/X86/
H A DX86SelectionDAGInfo.h30 SDValue EmitTargetCodeForMemset(SelectionDAG &DAG, SDLoc dl,
31 SDValue Chain,
32 SDValue Dst, SDValue Src,
33 SDValue Size, unsigned Align,
37 SDValue EmitTargetCodeForMemcpy(SelectionDAG &DAG, SDLoc dl,
38 SDValue Chain,
39 SDValue Dst, SDValue Src,
40 SDValue Siz
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/external/llvm/lib/Target/Hexagon/
H A DHexagonSelectionDAGInfo.h26 SDValue EmitTargetCodeForMemcpy(SelectionDAG &DAG, SDLoc dl,
27 SDValue Chain,
28 SDValue Dst, SDValue Src,
29 SDValue Size, unsigned Align,
H A DHexagonSelectionDAGInfo.cpp27 SDValue
29 EmitTargetCodeForMemcpy(SelectionDAG &DAG, SDLoc dl, SDValue Chain,
30 SDValue Dst, SDValue Src, SDValue Size, unsigned Align,
44 return SDValue();
/external/llvm/lib/Target/PowerPC/
H A DPPCISelLowering.h339 SDValue get_VSPLTI_elt(SDNode *N, unsigned ByteSize, SelectionDAG &DAG);
361 bool getPreIndexedAddressParts(SDNode *N, SDValue &Base,
362 SDValue &Offset,
369 bool SelectAddressRegReg(SDValue N, SDValue &Base, SDValue &Index,
376 bool SelectAddressRegImm(SDValue N, SDValue &Disp, SDValue &Base,
381 bool SelectAddressRegRegOnly(SDValue
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