| /external/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | SDNodeDbgValue.h | 92 unsigned getResNo() { assert (kind==SDNODE); return u.s.ResNo; } function in class:llvm::SDDbgValue
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| H A D | SelectionDAGPrinter.cpp | 71 std::advance(NI, I.getNode()->getOperand(I.getOperand()).getResNo());
131 GW.emitEdge(nullptr, -1, G->getRoot().getNode(), G->getRoot().getResNo(),
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| H A D | InstrEmitter.cpp | 115 User->getOperand(2).getResNo() == ResNo) {
125 if (Op.getNode() != Node || Op.getResNo() != ResNo)
127 MVT VT = Node->getSimpleValueType(Op.getResNo());
198 User->getOperand(2).getResNo() == ResNo) {
247 User->getOperand(2).getResNo() == i) {
284 unsigned VReg = getDstOfOnlyCopyToRegUse(Op.getNode(), Op.getResNo());
660 SDValue Op = SDValue(Node, SD->getResNo());
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| H A D | ResourcePriorityQueue.cpp | 136 MVT VT = Op.getNode()->getSimpleValueType(Op.getResNo());
345 MVT VT = Op.getNode()->getSimpleValueType(Op.getResNo());
499 MVT VT = Op.getNode()->getSimpleValueType(Op.getResNo());
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| H A D | SelectionDAGDumper.cpp | 588 if (unsigned RN = N->getOperand(i).getResNo())
658 if (unsigned RN = getOperand(i).getResNo())
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| H A D | ScheduleDAGSDNodes.cpp | 122 unsigned ResNo = User->getOperand(2).getResNo();
634 unsigned DefIdx = Use->getOperand(OpIdx).getResNo();
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| H A D | SelectionDAG.cpp | 372 ID.AddInteger(Op.getResNo());
382 ID.AddInteger(Op.getResNo());
2030 if (Op.getResNo() != 1)
2156 if (ISD::isZEXTLoad(Op.getNode()) && Op.getResNo() == 0) {
2441 if (Op.getResNo() != 1)
2533 if (Op.getResNo() == 0) {
5808 assert(From->getNumValues() == 1 && FromN.getResNo() == 0 &&
5892 setRoot(SDValue(To, getRoot().getResNo()));
5920 const SDValue &ToOp = To[Use.getResNo()];
5932 setRoot(SDValue(To[getRoot().getResNo()]));
[all...] |
| H A D | SelectionDAGBuilder.cpp | 778 getCopyToParts(DAG, dl, Val.getValue(Val.getResNo() + Value),
998 Val.getResNo(), IsIndirect,
1218 SDValue(RetOp.getNode(), RetOp.getResNo() + i),
1251 SDValue(RetOp.getNode(), RetOp.getResNo() + j),
2915 TrueVal.getNode()->getValueType(TrueVal.getResNo()+i),
2918 TrueVal.getResNo() + i),
2920 FalseVal.getResNo() + i));
3280 SDValue(Agg.getNode(), Agg.getResNo() + i);
3286 SDValue(Val.getNode(), Val.getResNo() + i - LinearIndex);
3291 SDValue(Agg.getNode(), Agg.getResNo()
[all...] |
| H A D | LegalizeVectorOps.cpp | 181 return Result.getValue(Op.getResNo());
582 return (Op.getResNo() ? NewChain : Value);
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| H A D | ScheduleDAGFast.cpp | 232 EVT VT = Op.getNode()->getValueType(Op.getResNo());
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| H A D | LegalizeTypes.cpp | 92 if (UI.getUse().getResNo() == i)
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| H A D | DAGCombiner.cpp | 4869 if (UI.getUse().getResNo() != N0.getResNo())
4904 if (Use.getResNo() == 0 && Use.getUser()->getOpcode() == ISD::CopyToReg) {
6143 return Elt.getOperand(Elt.getResNo()).getNode();
8535 if (UI.getUse().getResNo() != 0)
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| /external/llvm/utils/TableGen/ |
| H A D | DAGISelMatcher.cpp | 393 if (CT->getResNo() >= getOpcode().getNumResults())
396 MVT::SimpleValueType NodeType = getOpcode().getKnownType(CT->getResNo());
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| H A D | DAGISelMatcherOpt.cpp | 53 CT->getResNo() == 0) // CheckChildType checks res #0
436 CTM->getResNo() != 0 ||
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| H A D | DAGISelMatcherEmitter.cpp | 363 assert(cast<CheckTypeMatcher>(N)->getResNo() == 0 &&
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| H A D | DAGISelMatcher.h | 537 unsigned getResNo() const { return ResNo; } function in class:llvm::CheckTypeMatcher
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| /external/llvm/include/llvm/CodeGen/ |
| H A D | SelectionDAGNodes.h | 127 unsigned getResNo() const { return ResNo; } function in class:llvm::SDValue
218 (unsigned)((uintptr_t)Val.getNode() >> 9)) + Val.getResNo();
277 /// getResNo - Convenience function for get().getResNo().
278 unsigned getResNo() const { return Val.getResNo(); } function in class:llvm::SDUse
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| /external/llvm/lib/Target/Hexagon/ |
| H A D | HexagonISelDAGToDAG.cpp | 935 N0.getNode()->getValueType(N0.getResNo()) == MVT::i1 &&
936 N00.getNode()->getValueType(N00.getResNo()) == MVT::i32) {
959 N0.getNode()->getValueType(N0.getResNo()) == MVT::i1 &&
960 N00.getNode()->getValueType(N00.getResNo()) == MVT::i32) {
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| /external/llvm/lib/Target/X86/ |
| H A D | X86ISelDAGToDAG.cpp | 1091 if (N.getResNo() != 0) break;
1878 if (FlagUI.getUse().getResNo() != 1) continue;
1934 if (StoredVal.getResNo() != 0) return false;
1988 if (UI.getUse().getResNo() != 0)
2573 (N0.getResNo() == 0 && N0.getNode()->getOpcode() == X86ISD::AND)) &&
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| H A D | X86ISelLowering.cpp | 11689 if (Op.getResNo() != 0 || NeedOF || NeedCF) {
12478 if (Op.getResNo() == 1 &&
12492 if (Op.getResNo() == 2 && Opc == X86ISD::UMUL)
12846 Cond.getOperand(0).getResNo() == 1 &&
18231 if (Op.getResNo() == 0)
19024 if (UI.getUse().getResNo() != InputVector.getResNo())
19881 Op.getOpcode() != X86ISD::RDSEED) || Op.getResNo() != 0)
21761 SDValue NewEFLAGS = SDValue(NewSub.getNode(), EFLAGS.getResNo());
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| /external/llvm/lib/Target/Mips/ |
| H A D | MipsSEISelLowering.cpp | 411 if (MultHi.getResNo() != 1 || MultLo.getResNo() != 0)
483 if (MultHi.getResNo() != 1 || MultLo.getResNo() != 0)
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| /external/llvm/lib/Target/AArch64/ |
| H A D | AArch64ISelLowering.cpp | 2857 if (LHS.getResNo() == 1 && isa<ConstantSDNode>(RHS) &&
3183 if (CC.getResNo() == 1 &&
7386 if (UI.getUse().getResNo() == 1) // Ignore uses of the chain result.
7399 || UI.getUse().getResNo() != Addr.getResNo())
7466 UI.getUse().getResNo() != Addr.getResNo())
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| /external/llvm/lib/Target/ARM/ |
| H A D | ARMISelLowering.cpp | 3304 if (Cond.getResNo() == 1 &&
8455 Op0.getResNo() == 0 && Op1.getResNo() == 1)
8839 UI.getUse().getResNo() != Addr.getResNo())
8990 if (UI.getUse().getResNo() == NumVecs)
9014 unsigned ResNo = UI.getUse().getResNo();
10207 if (Op.getResNo() == 0)
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| /external/llvm/lib/Target/R600/ |
| H A D | SIISelLowering.cpp | 1283 int OpClassID = Desc.OpInfo[Op.getResNo()].RegClass;
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| /external/llvm/lib/Target/XCore/ |
| H A D | XCoreISelLowering.cpp | 1851 if (Op.getResNo() == 1) {
|