| b5d25dd849a8b843f05bdc92c5f06bbd321b8eb6 |
14-Nov-2012 |
Vinson Lee <vlee@freedesktop.org> |
i915: Fix wrong sizeof argument in i915_update_tex_unit.
The bug was found by Coverity.
NOTE: This is a candidate for the stable branches.
Signed-off-by: Vinson Lee <vlee@freedesktop.org>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
(cherry picked from commit 10f214e5b248e5dd5f323c689549cd66d2f6ad22)
915_texstate.c
|
| 0470fa395fef898b3e13203bb5fa62bd854799af |
27-Sep-2012 |
Matt Turner <mattst88@gmail.com> |
build: Set visibility CFLAGS in dri/i915
(cherry picked from commit 381d120b8af9e25d3bcb829a250e602b61d0971a)
akefile.am
|
| 89e76252ca3fd015544f76d0f528babe9c723938 |
01-Oct-2012 |
Matt Turner <mattst88@gmail.com> |
dri drivers: Link dricommon before dynamic libraries
I think libtool should be handling this for us, but the build fails for
Jordan because libdricommon (a static library, which uses expat) appears
before -lexpat on the linker command.
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Tested-by: Jordan Justen <jordan.l.justen@intel.com>
(cherry picked from commit 31ab61cac10bf75210134b6d8a354ac3cbd3b4da)
Conflicts:
src/mesa/drivers/dri/i965/Makefile.am
akefile.am
|
| 7c60a95a0e4e4e8b31c9028a5edc22dca791dcb7 |
27-Sep-2012 |
Ian Romanick <ian.d.romanick@intel.com> |
i915: Don't free the intel_context structure when intelCreateContext fails.
intelDestroyContext will eventually be called, and it will clean things up.
NOTE: This is a candidate for the 9.0 branch.
Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=53618
(cherry picked from commit de958de71b1450952e021af4e729c87406353db6)
915_context.c
|
| b0d23b66cf2514949650bdfa9c918ab2fb1d8986 |
27-Aug-2012 |
Eric Anholt <eric@anholt.net> |
intel: Move RenderMode fallback func to i915 driver.
The Fallback field of the context struct doesn't work that way on i965, and
it's the only caller of FALLBACK() in the driver.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
830_state.c
915_state.c
|
| 174d44a9c4d39a030fe3528acf07f9ac9aa617a1 |
22-Aug-2012 |
Kenneth Graunke <kenneth@whitecape.org> |
mesa: Use a new, more specific hook for shader uniform changes.
Gallium drivers and i965 don't require special notification when
sampler uniforms change. They simply see the _NEW_TEXTURE and adjust
their indirection tables. These drivers don't want ProgramStringNotify:
it simply causes pointless recompiles.
Unfortunately, i915 still requires shader recompiles and needs
ProgramStringNotify. Rather than trying to fix that, simply change the
hook to a new, more specific one: ShaderUniformChange. On i915, this
translates to ProgramStringNotify; others simply ignore it.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Eric Anholt <eric@anholt.net>
915_fragprog.c
|
| db273724c9484d513f5caa34729475d2873d9f7b |
07-Aug-2012 |
Ian Romanick <ian.d.romanick@intel.com> |
i915: Validate API and version in i915CreateContext
v2: Use base-10 for versions like gl_context::Version. Suggested by Ken.
Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
915_context.c
915_context.h
|
| 79198063b8adb23536b291081f8df8571926950e |
12-Jul-2012 |
Eric Anholt <eric@anholt.net> |
intel: Rename INTEL_DEBUG=fall to INTEL_DEBUG=perf.
I want to introduce some more debug output for performance surprises that
includes fallbacks, but aren't necessarily software rasterization. Leave
INTEL_DEBUG=fall in place for those that have used that flag before.
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
915_program.c
ntel_tris.c
|
| 94f22fbe787214580a1a13a774114d2650c166cb |
08-Aug-2012 |
Tapani Pälli <tapani.palli@intel.com> |
intel: use _mesa_meta_Clear with OpenGL ES 1.1 v2
Patch changes i915 and i965 drivers to use fixed function version of
meta clear when running on ES 1.1. This fixes rendering errors seen with
Google Maps, Angry Birds and Gallery3D on Android platform.
Change 88128516d43be5d25288ff5b64db63cda83c04b3 exposes all extensions
internally to be available independent of GL flavour, therefore check
against ARB_fragment_shader does not work.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=50333
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Eric Anholt <eric@anholt.net>
ntel_clear.c
|
| c37efbfe4c415b6fd2d4f968220d7c9b62f11ecf |
12-Jun-2012 |
Pauli Nieminen <pauli.nieminen@linux.intel.com> |
mesa: Move DepthMode to texture object
GL_DEPTH_TEXTURE_MODE isn't meant to be part of sampler state based on
compatibility profile specifications.
OpenGL specification 4.1 compatibility 20100725 3.9.2:
"... The values accepted in the pname parameter
are TEXTURE_WRAP_S, TEXTURE_WRAP_T, TEXTURE_WRAP_R, TEXTURE_MIN_-
FILTER, TEXTURE_MAG_FILTER, TEXTURE_BORDER_COLOR, TEXTURE_MIN_-
LOD, TEXTURE_MAX_LOD, TEXTURE_LOD_BIAS, TEXTURE_COMPARE_MODE, and
TEXTURE_COMPARE_FUNC. Texture state listed in table 6.25 but not listed here and
in the sampler state in table 6.26 is not part of the sampler state, and remains in the
texture object."
The list of states is in Table 6.24 "Textures (state per texture
object)" instead of 6.25 mentioned in the specification text.
Same can be found from 3.3 compatibility specification.
Signed-off-by: Pauli Nieminen <pauli.nieminen@linux.intel.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
915_texstate.c
|
| c738ea1191cd1b5a0dc60b0e6d05fd918083e961 |
18-Jul-2012 |
Paul Berry <stereotype441@gmail.com> |
intel: Make more consistent use of _mesa_is_{user,winsys}_fbo()
A lot of code was still differentiating between between winsys and
user fbos by testing the fbo's name against zero. This converts
everything in the i915 and 965 drivers over to use _mesa_is_user_fbo()
and _mesa_is_winsys_fbo().
Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
830_vtbl.c
ntel_tris.c
|
| 735070c45b403a9631415b09e9fd519f601f0229 |
21-Jul-2012 |
Chad Versace <chad.versace@linux.intel.com> |
i830: Fix stack corruption
Found by compiler warning:
i830_texstate.c:131:28: warning: argument to 'sizeof' in 'memset' call
is the same expression as the destination; did you mean to
dereference it? [-Wsizeof-pointer-memaccess]
memset(state, 0, sizeof(state));
~~~~~ ^~~~~
On 64-bit systems, memset here would write an extra 4 bytes.
Note: This is a candidate for the stable branches.
Reviewed-by: Brian Paul <brianp@vmware.com>
Signed-off-by: Chad Versace <chad.versace@linux.intel.com>
830_texstate.c
|
| 02ebad900db4ef1ac42cbfb41b433919a4c857a2 |
05-Jul-2012 |
Kristian Høgsberg <krh@bitplanet.net> |
intel: Add offset field to miptree
This lets us specify an offset into the bo where the miptree starts,
which will let us set up a texture for a single plane in a planar buffer.
Signed-off-by: Kristian Høgsberg <krh@bitplanet.net>
Reviewed-by: Eric Anholt <eric@anholt.net>
915_texstate.c
|
| e426949cf1c328d5686b1048cdcec54a4fbca986 |
11-Jun-2012 |
Eric Anholt <eric@anholt.net> |
make: Fold ASM_CFLAGS into DEFINES.
Every place that uses ASM_FLAGS already uses DEFINES. Not including
it in DEFINES is just a way to screw up potential users, as I've done
several times while working on the build system.
akefile.am
|
| f92b2e5e90f456491fc15b3b9612381a83726606 |
11-May-2012 |
Kurt Roeckx <kurt@roeckx.be> |
i830: Fix crash for GL_STENCIL_TEST in i830Enable()
commit 87f12bb2d95236c7b025d1a8be56b5ab1683d702 tried to fix rb->mt
being NULL, but change this case wrong.
NOTE: This is a candidate for the 8.0 branch.
Signed-off-by: Kurt Roeckx <kurt@roeckx.be>
Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
830_state.c
|
| 88128516d43be5d25288ff5b64db63cda83c04b3 |
24-May-2012 |
Kenneth Graunke <kenneth@whitecape.org> |
i965: Gut the separate OpenGL ES extension enabling.
We should just set the bits of functionality that we support; the
GL/ES1/ES2 flags in extensions.c will take care of advertising the
appropriate extensions for the current API.
This enables the GL_EXT_texture_compression_dxt1 extension on ES1/ES2
when libtxc_dxtn is installed or the force_s3tc driconf option is set.
The main extension code set this up properly, but the ES-specific code
failed to do so.
Otherwise, the extension strings reported by es1_info, es2_info, and
glxinfo all remain the same.
This patch manually disables the ARB_framebuffer_object bit on ES
to preserve the behavior of 1c0f5d8324c4db2720247989ddc4a45315b55a85.
v2: Rebase, fix the i915 Makefile, and unconditionally set the
OES_draw_texture bit as core Mesa will only apply it to ES1 now.
Tested-by: Daniel Charles <daniel.charles@intel.com> [v1]
Reviewed-by: Chad Versace <chad.versace@linux.intel.com> [v1]
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
akefile.sources
ntel_extensions_es.c
|
| 03c9044c2edf8301779fe5d0173d7e6d1e7ee1c2 |
21-May-2012 |
Eric Anholt <eric@anholt.net> |
i915: Drop gen4+ code from the forked clear code.
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Chad Versace <chad.versace@linux.intel.com>
ntel_clear.c
|
| 11892ea986b5fdad345ce7c09f97e0389e546509 |
18-May-2012 |
Eric Anholt <eric@anholt.net> |
intel: Fork the intel_clear.c file between i915 and i965.
This logic is wasted on i965 when we want to just always do GLSL tri
clears.
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Chad Versace <chad.versace@linux.intel.com>
ntel_clear.c
|
| 4433b0302d0aa9dc61002e8bb4fd1b752b0be338 |
20-Apr-2012 |
Brian Paul <brianp@vmware.com> |
intel: use _mesa_is_winsys/user_fbo() helpers
Reviewed-by: Eric Anholt <eric@anholt.net>
830_state.c
915_state.c
|
| e4c97f1e607f857fb7f397f9e00f37c00ffff295 |
13-Apr-2012 |
Dylan Noblesmith <nobled@dreamwidth.org> |
autoconf: pass -Wall to automake
And fix these warning that appear at autoreconf time:
"`:='-style assignments are not portable"
v2: Fix the recently-converted-to-automake r600.
akefile.sources
|
| c6532875493ffe7de9c37924c70ebf6d0472e23d |
17-Mar-2012 |
Yuanhan Liu <yuanhan.liu@linux.intel.com> |
i915: set SPRITE_POINT_ENABLE bit correctly
When SPRITE_POINT_ENABLE bit is set, the texture coord would be
replaced, and this is only needed when we called something like
glTexEnvi(GL_POINT_SPRITE, GL_COORD_REPLACE, GL_TRUE).
And more, we currently handle varying inputs as texture coord,
we would be careful when setting this bit and set it just when
needed, or you will find the value of varying input is not right
and changed.
Thus we do set SPRITE_POINT_ENABLE bit only when all enabled tex
coord units need do CoordReplace. Or fallback is needed to make
sure the rendering is right.
With handling the bit setup at i915_update_sprite_point_enable(),
we don't need the relative code at i915Enable then.
This patch would _really_ fix the webglc point-size.html test case and
of course, not regress piglit point-sprite and glean-pointSprite
testcase.
NOTE: This is a candidate for stable release branches.
v2: fallback just when all enabled tex coord units need do
CoordReplace (Eric)
v3: move the sprite point validate code at I915InvalidateState (Eric)
v4: sprite point enable bit update based on _NEW_PROGRAM, too
add relative _NEW-state comments to show what state is being used(Eric)
Signed-off-by: Yuanhan Liu <yuanhan.liu@linux.intel.com>
915_context.c
915_context.h
915_state.c
ntel_tris.c
|
| 67d3ff760a33f3f98b89d3a6422bb85c199a9963 |
06-Mar-2012 |
Eric Anholt <eric@anholt.net> |
intel: Drop the INTEL_STRICT_CONFORMANCE environment variable.
If you want to test the graphics driver, you want to test it under the
conditions that users will see, not some set of additional fallbacks.
If you want to test swrast, run the swrast driver (or no_rast=true)
instead.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
ntel_tris.c
|
| dfce56ba4dd444cdb1148425a2cc0662bb79932d |
20-Mar-2012 |
Kenneth Graunke <kenneth@whitecape.org> |
Add Makefile.in to toplevel .gitignore
To avoid redundancies, this patch also removes Makefile.in from the
other .gitignore files.
Acked-by: Eric Anholt <eric@anholt.net>
gitignore
|
| b41ab3b42c989926389e599d5794412a628f277f |
16-Mar-2012 |
Paul Berry <stereotype441@gmail.com> |
Add .deps/, .libs/, and *.la to toplevel .gitignore
To avoid redundancies, this patch also removes .deps, .libs, and *.la
from .gitignore files in subdirectories.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
gitignore
|
| 40c995c1fd7865f1b25765aa783fdadbf948b3dd |
29-Feb-2012 |
Yuanhan Liu <yuanhan.liu@linux.intel.com> |
i915: fallback for NPOT cubemap texture
Although some hardware support NPOT cubemap, but it seems we don't know
the right layout for NPOT cubemap. Thus seems we need do fallback for
other platforms as well.
See comments inline the code for more detailed info.
v2: give a more detailed info about why we need fallback for other
platfroms as well.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=46666
NOTE: This is a candidate for stable release branches.
Signed-off-by: Yuanhan Liu <yuanhan.liu@linux.intel.com>
915_texstate.c
|
| 22d6268df7c560f8705736a3dc381dd7d528b1e8 |
12-Mar-2012 |
Brian Paul <brianp@vmware.com> |
i915: remove occurances of _DD_NEW_x flags
Just use the corresponding _NEW_x flags intead. The _DD_NEW_x flags
will be removed in a following patch.
Reviewed-by: José Fonseca <jfonseca@vmware.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
ntel_tris.h
|
| cf2f9ef015c312ecaa6656519602ae535f7ce9d7 |
06-Mar-2012 |
Yuanhan Liu <yuanhan.liu@linux.intel.com> |
i915: move the FALLBACK_DRAW_OFFSET check outside the drawing rect check
We have to do fallback when the 'Clipped Drawing Rectangle X/Y Max'
exceed the hardware's limit no matter the drawing rectangle offset
changed or not.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=46665
NOTE: This is a candidate for stable release branches.
Signed-off-by: Yuanhan Liu <yuanhan.liu@linux.intel.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
915_vtbl.c
|
| 058fc6521e3bc483bc948cc90dc5ee3b08d6ec64 |
23-Feb-2012 |
Yuanhan Liu <yuanhan.liu@linux.intel.com> |
i915: fix wrong rendering of gl_PointSize on Pineview
The current code would ignore the point size specified by gl_PointSize
builtin variable in vertex shader on Pineview. This patch servers as
fixing that.
This patch fixes the following issues on Pineview:
webglc: https://cvs.khronos.org/svn/repos/registry/trunk/public/webgl/sdk/tests/conformance/rendering/point-size.html
piglit: glsl-vs-point-size
NOTE: This is a candidate for stable release branches.
v2: pick Eric's nice tip for fixing this issue in hardware rendering.
v3: the last arg of EMIT_ATTR specify the size in _byte_. (Eric)
Signed-off-by: Yuanhan Liu <yuanhan.liu@linux.intel.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
915_fragprog.c
|
| 489ac8e73a2432d29597a62cd83f09b9d1848533 |
03-Mar-2012 |
Kurt Roeckx <kurt@roeckx.be> |
i915: Fix i830 polygon stipple from PBOs.
This is a direct port of the i915 patch in
a856da63247a4b403f6350914f732e14d1530ed1.
Fixes glean's pbo test.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=41372
Reviewed-by: Eric Anholt <eric@anholt.net>
NOTE: This is a candidate for release branches.
830_state.c
|
| 024ece7523f1735d2fca0067c0a3bdcf53fde8f9 |
03-Mar-2012 |
Kurt Roeckx <kurt@roeckx.be> |
i915: Compute maximum number of verts using the actual batchbuffer size.
We were looking at the size of batch.map for how big the batchbuffer
was, but on 865 we just use a single-page batchbuffer due to hardware
limits.
v2: Removed check for sizeof map < bo->size, since that's always false.
[change by anholt]
NOTE: This is a candidate for release branches.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=41495
ntel_render.c
|
| 33b07893e92dcee495908c549be872887096c894 |
09-Nov-2011 |
Chris Wilson <chris@chris-wilson.co.uk> |
i830: Compute initial number of vertices from remaining batch space
In order to prevent an overflow of the batch buffer when emitting
triangles, we need to limit the initial primitive to fit within the
current batch. To do we need to measure the remaining space and thence
compute the maximum number of vertices that fit into that space.
Reported-by: Kurt Roeckx <kurt@roeckx.be>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=41495
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Eric Anholt <eric@anholt.net>
NOTE: This is a candidate for release branches.
ntel_render.c
|
| 7d13a6e64bf88566875a8f68e0aac9b937e30feb |
02-Feb-2012 |
Alban Browaeys <prahal@yahoo.com> |
dri/i915: Fix off-by-one in i830 clip region size.
The hardware, like i915, uses an inclusive bounds on min and max for
the drawing rectangle, but we were providing a number for exclusive.
The number of bits used by the hardware only covers this value going
up to the maximum size, so when we programmed 2048 as the maximum
inclusive X, it saw a maximum X of 0 and clipped all rendering. This
caused rendering failures in gnome-shell.
Fixes piglit fbo-maxsize.
v2: dropped changes to the blitter, which does use an exclusive x2, y2.
[change by anholt]
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=45558
Reviewed-by: Eric Anholt <eric@anholt.net>
NOTE: This is a candidate for release branches.
830_vtbl.c
|
| 4d4f2daefabdc4ca1dd778a9265475c65ef52936 |
02-Mar-2012 |
Eric Anholt <eric@anholt.net> |
i915: Fix piglit fbo-nodepth-test on i830.
This is a direct port of fc4fba52cf7e9616c70dd76b4d6bdba6582e157b from
i915, and fixes GPU hangs when running piglit.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=41372
Reviewed-by: Eric Anholt <eric@anholt.net>
NOTE: This is a candidate for release branches.
830_state.c
830_vtbl.c
|
| 630ab0d27ba693602205479ea481c5b2a9e26346 |
20-Feb-2012 |
Brian Paul <brianp@vmware.com> |
mesa: remove last of MAX_WIDTH, MAX_HEIGHT
Define new MAX_VIEWPORT_WIDTH/HEIGHT and MAX_RENDERBUFFER_SIZE values
instead.
ntel_decode.c
|
| 6b0a07f9ce844a8a96e2583bd37ed8453bf151c6 |
11-Feb-2012 |
Paul Berry <stereotype441@gmail.com> |
i915: Fix type of "specoffset" variable.
Commit 2e5a1a2 (intel: Convert from GLboolean to 'bool' from
stdbool.h.) converted the "specoffset" local variable (in
intel_tris.c) from a GLboolean to a bool. However, GLboolean was the
wrong type for specoffset--it should have been a GLuint (to match the
declaration of specoffset in struct intel_context).
This patch changes specoffset to the proper type.
Fixes piglit test general/two-sided-lighting-separate-specular.
This is a candidate for stable branches.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=45917
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
ntel_tris.c
|
| 61b9ccd9e298ca1d3db55aee0cb2ff78662d6fa6 |
20-Dec-2011 |
Eric Anholt <eric@anholt.net> |
intel: Use libdrm's decode functionality instead of the gpu-tools copy.
While typing out the new decode, I added a fallback mode for dumping
when we fail to re-map the BO after execution. This should get us a
minimal dump when trying to dump a batch that results in a GPU hang.
akefile.sources
|
| 10c85526a23ab6c01a67562a885597ad65883be6 |
29-Jan-2012 |
Matt Turner <mattst88@gmail.com> |
dri: don't link with DRICORE_LIB_DEPS
DRI_LIB_DEPS is sufficient since it includes DRICORE_LIB_DEPS
akefile.am
|
| 796f44d77906342e5912e7da6bdba1ba86bab9f0 |
20-Jan-2012 |
Eric Anholt <eric@anholt.net> |
intel: Pass the gl_renderbuffer to render_target_supported() vtable method.
I'm going to want to go looking at it for an integer texture fix.
NOTE: This is a candidate for the 8.0 branch.
830_vtbl.c
915_vtbl.c
|
| 45389caf0583fafbc56340fc66008382db4df950 |
25-Jan-2012 |
Eric Anholt <eric@anholt.net> |
dri: Move the compile of the common files to a convenience library.
Reviewed-by: Matt Turner <mattst88@gmail.com>
akefile.am
|
| 29ea1c44612b25806e71d55b88e7e8385af940a6 |
25-Jan-2012 |
Eric Anholt <eric@anholt.net> |
i915: Fix driver after automakeification.
akefile.am
|
| 924de7dc96f4607cb3d833637b5f69f4b9e2a6d0 |
16-Jan-2012 |
Brian Paul <brianp@vmware.com> |
intel: use intel_rb_format() to get renderbuffer format
This will make future changes cleaner and less invasive.
830_vtbl.c
915_vtbl.c
|
| 3c87dfce403ad3c2fed7998b16bea34dcb0c9fde |
15-Jan-2012 |
Matt Turner <mattst88@gmail.com> |
automake: src/mesa/drivers/dri/i915
gitignore
ndroid.mk
akefile
akefile.am
akefile.sources
|
| 8a472427559ea33186c71dfbab8254651fec3077 |
17-Jan-2012 |
Ian Romanick <ian.d.romanick@intel.com> |
intel: Set depth to 6 for cubemaps
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=41216
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=43212
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=43250
Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Chad Versace <chad.versace@linux.intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Cc: Jin Yang <jin.a.yang@intel.com>
915_tex_layout.c
|
| b49b1e46425b7ba475b9d78e418dd1fc177786d3 |
22-Dec-2011 |
Mathias Fröhlich <Mathias.Froehlich@web.de> |
i915: Convert to use GLbitfield64 directly.
Signed-off-by: Mathias Froehlich <Mathias.Froehlich@web.de>
Reviewed-by: Brian Paul <brianp@vmare.com>
830_context.h
830_vtbl.c
|
| dca6a28a14f22d77273d79d44f57b0d853c0242d |
31-Oct-2011 |
Mathias Fröhlich <Mathias.Froehlich@web.de> |
mesa: Make gl_program::InputsRead 64 bits.
Make gl_program::InputsRead a 64 bits bitfield.
Adapt the intel and radeon driver to handle a 64 bits
InputsRead value.
Signed-off-by: Mathias Froehlich <Mathias.Froehlich@web.de>
Reviewed-by: Eric Anholt <eric@anholt.net>
915_fragprog.c
|
| d2cd621086fdf620a96d599bac0873ff58ddf137 |
26-Nov-2011 |
Chia-I Wu <olv@lunarg.com> |
android: pass -std=c99 by default
Several modules expect a C99 compiler already. It is also the default for
Makefile build.
ndroid.mk
|
| 8d15268a61fe400668495e6cb42c4d15e8b17cbb |
23-Nov-2011 |
Eric Anholt <eric@anholt.net> |
i915: Fix complete texturing regression since 27505a105a
I had notes to myself to test gen3 and gen4, and then I tested gen4
and called it good. Turns out I forgot to actually call the new
function on gen3.
915_context.c
|
| 87f12bb2d95236c7b025d1a8be56b5ab1683d702 |
22-Nov-2011 |
Eric Anholt <eric@anholt.net> |
i915: Fix build since hiz merge.
v2: Guard against rb->mt being NULL, since we may enter the draw
regions path before intel_prepare_render() has been called to set
them.
Reviewed-by: Chad Versace <chad.versace@linux.intel.com> (v1)
akefile.sources
830_state.c
830_vtbl.c
915_tex_layout.c
915_vtbl.c
/external/mesa3d/src/mesa/drivers/dri/intel/intel_resolve_map.c
|
| 27505a105a4bf8b7329b87d29e1625e545508e4e |
16-Nov-2011 |
Eric Anholt <eric@anholt.net> |
i915: Move the texture format setup for this driver out of shared code.
The i965 driver is now enabling all of these formats on its own from
the surface format table.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
830_context.c
915_context.c
|
| 6661b7596f3b26a773ccde79f018179713b6b6e0 |
15-Nov-2011 |
Eric Anholt <eric@anholt.net> |
intel: Add the context to the render_target_supported() vtbl method.
We're going to want to provide different answers per chipset
generation.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
830_vtbl.c
915_vtbl.c
|
| c0151839473c83a2d0eea6285a649c1674466752 |
17-Nov-2011 |
Chad Versace <chad.versace@linux.intel.com> |
intel: Remove unused HiZ functions
Remove the following functions:
i830_hiz_resolve_noop
i915_hiz_resolve_noop
brw_hiz_resolve_noop
My original strategy for how intel->vtbl.resolve_*buffer was used has
substantially changed. The above functions are no longer called in the
current strategy.
Reviewed-by: Eric Anholt <eric@anholt.net>
Signed-off-by: Chad Versace <chad.versace@linux.intel.com>
830_vtbl.c
915_vtbl.c
|
| 2e53f3018f69d07b885c5885a1f865339700a189 |
28-Oct-2011 |
Kristian Høgsberg <krh@bitplanet.net> |
dri: Remove unused dri texmem.c
830_state.c
915_state.c
|
| db364a8af0d19e4032ac44635834737017e1051c |
22-Oct-2011 |
Eric Anholt <eric@anholt.net> |
i915: Move the always_flush_cache code to triangle emit.
This could have broken always_flush_cache on i965, since
reserved_space doesn't reflect the size of the workaround flushes, and
we might run out of space. This should make always_flush_cache more
useful on pre-i965, anyway (since the point is to flush around each
draw call, even within a batchbuffer).
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Acked-by: Paul Berry <stereotype441@gmail.com>
ntel_tris.c
|
| 483ea0a76fd2cde8fd5d4c303f1576ae15c21de5 |
19-Oct-2011 |
Brian Paul <brianp@vmware.com> |
i915: make i830/i915_hiz_resolve_noop() static
830_vtbl.c
915_vtbl.c
|
| 7b0f748efa5af84668cc3609a0070163bfa22607 |
20-Sep-2011 |
Chad Versace <chad@chad-versace.us> |
intel: Add HiZ operations to intel_context::vtbl for all drivers
Add the following to the vtbl:
hiz_resolve_depthbuffer
hiz_resolve_hizbuffer
For all drivers for which HiZ is not enabled, the methods are set to be
no-ops. If HiZ is enabled, the methods are currently to set to empty
stubs.
Reviewed-by: Eric Anholt <eric@anholt.net>
Signed-off-by: Chad Versace <chad@chad-versace.us>
830_vtbl.c
915_vtbl.c
|
| 2e5a1a254ed81b1d3efa6064f48183eefac784d0 |
07-Oct-2011 |
Kenneth Graunke <kenneth@whitecape.org> |
intel: Convert from GLboolean to 'bool' from stdbool.h.
I initially produced the patch using this bash command:
for file in {intel,i915,i965}/*.{c,cpp,h}; do [ ! -h $file ] && sed -i
's/GLboolean/bool/g' $file && sed -i 's/GL_TRUE/true/g' $file && sed -i
's/GL_FALSE/false/g' $file; done
Then I manually added #include <stdbool.h> to fix compilation errors,
and converted a few functions back to GLboolean that were used in core
Mesa's function pointer table to avoid "incompatible pointer" warnings.
Finally, I cleaned up some whitespace issues introduced by the change.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Acked-by: Chad Versace <chad@chad-versace.us>
Acked-by: Paul Berry <stereotype441@gmail.com>
830_context.c
830_context.h
830_state.c
830_texblend.c
830_texstate.c
830_vtbl.c
915_context.c
915_context.h
915_debug.c
915_fragprog.c
915_texstate.c
915_vtbl.c
ntel_render.c
ntel_tris.c
|
| 53f858637319f0efa47dd9acdb547e7913f3f86b |
07-Oct-2011 |
Chad Versace <chad@chad-versace.us> |
i915,i830: Remove dead HiZ assertions in *update_draw_buffer()
i915 and i830 hardware doesn't have HiZ, so remove all HiZ related
assertions from *update_draw_buffer().
I've removed the dead format checks completely rather than replace them
with more appropriate checks. This doesn't reduce "assertion coverage",
however, because when I added these HiZ related assertions in c8fdf66
there were no pre-existing checks there.
Signed-off-by: Chad Versace <chad@chad-versace.us>
830_vtbl.c
915_vtbl.c
|
| 3db309aecee57d7e0055a49a0e12a491a554347b |
01-Oct-2011 |
Stéphane Marchesin <marcheu@chromium.org> |
configure: replace pkg-config calls with $(PKG_CONFIG) in the makefiles.
Us poor souls who cross compile mesa want to be able to specify which pkg-config to pick, or at least just change one place.
Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
akefile
|
| c8e65652800aa0cfd95c0e57b5b25afff701c3e8 |
04-Oct-2011 |
Brian Paul <brianp@vmware.com> |
i915: don't include texstore.h
830_texblend.c
|
| 67582e6eef789324b527b4753065aea366145f4e |
30-Sep-2011 |
Chris Wilson <chris@chris-wilson.co.uk> |
i915: out-of-bounds write in calc_live_regs()
From a Coverity defect report.
src/mesa/drivers/dri/i915/i915_fragprog.c
301 /*
302 * TODO: consider moving this into core
303 */
304 static bool calc_live_regs( struct i915_fragment_program *p )
305 {
306 const struct gl_fragment_program *program = &p->FragProg;
307 GLuint regsUsed = 0xffff0000;
-> 308 uint8_t live_components[16] = { 0, };
309 GLint i;
310
311 for (i = program->Base.NumInstructions - 1; i >= 0; i--) {
312 struct prog_instruction *inst =
&program->Base.Instructions[i];
313 int opArgs = _mesa_num_inst_src_regs(inst->Opcode);
314 int a;
315
316 /* Register is written to: unmark as live for this and
preceeding ops */
317 if (inst->DstReg.File == PROGRAM_TEMPORARY) {
-> 318 if (inst->DstReg.Index > 16)
319 return false;
320
-> 321 live_components[inst->DstReg.Index] &= ~inst->DstReg.WriteMask;
322 if (live_components[inst->DstReg.Index] == 0)
323 regsUsed &= ~(1 << inst->DstReg.Index);
324 }
325
326 for (a = 0; a < opArgs; a++) {
327 /* Register is read from: mark as live for this and preceeding ops */
328 if (inst->SrcReg[a].File == PROGRAM_TEMPORARY) {
329 unsigned c;
330
331 if (inst->SrcReg[a].Index > 16)
332 return false;
333
334 regsUsed |= 1 << inst->SrcReg[a].Index;
335
336 for (c = 0; c < 4; c++) {
337 const unsigned field = GET_SWZ(inst->SrcReg[a].Swizzle, c);
338
339 if (field <= SWIZZLE_W)
340 live_components[inst->SrcReg[a].Index] |= (1U << field);
341 }
342 }
343 }
344
345 p->usedRegs[i] = regsUsed;
346 }
Reported-by: Vinson Lee <vlee@vmware.com>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=40022
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
915_fragprog.c
|
| 8004a1cb95b8a195f3f4bbaa8d39d2f3297167de |
22-Sep-2011 |
Eric Anholt <eric@anholt.net> |
intel: Rename region->buffer to region->bo, and remove accessor function.
We call all the other drm_intel_bo pointers in intel/*.h "bo", so this
one was rather out of place.
Acked-by: Kenneth Graunke <kenneth@whitecape.org>
830_texstate.c
830_vtbl.c
915_texstate.c
915_vtbl.c
|
| d7cdbc3c5415d2dd5eee58834b13714a89eacf2b |
24-Sep-2011 |
Kenneth Graunke <kenneth@whitecape.org> |
intel: Remove pointless boolean return value from *_miptree_layout.
i915_miptree_layout, i945_miptree_layout, and brw_miptree_layout always
just return GL_TRUE, so there's really no point to it. Change them to
void functions and remove the (dead) error checking code.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Yuanhan Liu <yuanhan.liu@linux.intel.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
915_tex_layout.c
|
| 2e1cc883b380c3e038b7f2890bf80ed1736a9f18 |
09-Sep-2011 |
Ian Romanick <ian.d.romanick@intel.com> |
mesa: Replace _mesa_rgba_logicop_enabled(ctx) with ctx->Color.ColorLogicOpEnabled
Since GL_EXT_blend_logic_op is removed, _mesa_rgba_logicop_enabled(ctx)
just returns ctx->Color.ColorLogicOpEnabled. That seems kind of silly.
Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Marek Olšák <maraeo@gmail.com>
830_state.c
915_state.c
|
| 36a91e45f755af164232ef908419bc4cb64ba45b |
26-Aug-2011 |
Ian Romanick <ian.d.romanick@intel.com> |
intel: Silence several "warning: unused parameter"
The intel_context and tiling parameters were not used by any if the
i9[14]5_miptree_layout or the functions they call, and the tiling parameter was
not used by brw_miptree_layout. Remove the unnecessary parameters.
915_tex_layout.c
|
| 9fe197c62611815ebe74248033271ad9fd07ae06 |
21-Aug-2011 |
Chia-I Wu <olv@lunarg.com> |
intel: add support for __DRI_IMAGE_FORMAT_ABGR8888
It maps to MESA_FORMAT_RGBA8888_REV. Surfaces of the format can only be
sampled from but not render to.
Only i915 is tested.
Reviewed-by: Eric Anholt <eric@anholt.net>
[olv: add a check in intel_image_target_renderbuffer_storage]
915_texstate.c
|
| 820789ac69a72f6ea8081db6f82827da6c7d7110 |
21-Aug-2011 |
Chia-I Wu <olv@lunarg.com> |
intel: rename intel_extensions_es2.c to intel_extensions_es.c
We'd like to add intelInitExtensionsES1 to it later.
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
akefile.sources
ntel_extensions_es.c
ntel_extensions_es2.c
|
| 644929849ccc1134bb89f1e084761c4febdc4ced |
30-Aug-2011 |
Chia-I Wu <olv@lunarg.com> |
i915: build i915_dri.so for Android
Simple demos such as test-opengl-gl_basic work. SurfaceFlinger does not
work yet due to missing GL_OES_draw_texture support (and maybe more).
Reviewed-by: Chad Versace <chad@chad-versace.us>
ndroid.mk
|
| 47ba5c482f6c87971c8ad878dbfd9e7a4fc3e17c |
30-Aug-2011 |
Chia-I Wu <olv@lunarg.com> |
i915: factor our source lists into Makefile.sources
In preparation for porting i915 to Android, factor its source lists into
a shared makefile. This prevents duplication of source lists, and hence
prevents the Android build from breaking as often.
Reviewed-by: Chad Versace <chad@chad-versace.us>
akefile
akefile.sources
|
| 488fe51cf823ccd137c667f1e92dd86f8323b723 |
01-Sep-2011 |
Bryan Cain <bryancain3@gmail.com> |
mesa: Replace the EmitNoIfs compiler flag with a MaxIfDepth flag.
This is a better, more fine-grained way of lowering if statements. Fixes the
game And Yet It Moves on nv50.
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
915_context.c
|
| 6118bbd0a67773d9247f3252a0643657bbd898a0 |
25-Aug-2011 |
Ian Romanick <ian.d.romanick@intel.com> |
mesa/tnl_dd: Remove unused header file t_dd_rendertmp.h
Acked-by: Kristian Høgsberg <krh@bitplanet.net>
Acked-by: Marek Olšák <maraeo@gmail.com>
Acked-by: Alan Coopersmith <alan.coopersmith@oracle.com>
Acked-by: Jakob Bornecrantz <jakob@vmware.com>
Acked-by: Dave Airlie <airlied@redhat.com>
Build-Tested-by: Jakob Bornecrantz <jakob@vmware.com>
Tested-by: Eugeni Dodonov <eugeni.dodonov@intel.com>
ntel_tris.c
|
| 09eeb0ff27005c0ffccd5cdbe46862e181a4ee6c |
10-Aug-2011 |
Carl Simonson <simonsonc@gmail.com> |
i830: Add missing vtable entry for i830 from the hiz work.
830_vtbl.c
|
| a9e97d022cb68266639eb54947517454c8ffe45e |
05-Aug-2011 |
Eric Anholt <eric@anholt.net> |
intel: Fix warnings from gl_constant_parameter changes.
915_fragprog.c
|
| 0290a018a50bd4a3180af3233f145f4de7b63706 |
10-Feb-2011 |
Ian Romanick <ian.d.romanick@intel.com> |
i915: Only emit program errors when INTEL_DEBUG=wm or INTEL_DEBUG=fallbacks
This makes piglit a lot more happy. The errors are logged when
INTEL_DEBUG=fallbacks because the application is about to hit a big
software fallback. We frequently ask people to run applications that
are hitting software fallbacks with INTEL_DEBUG=fallbacks so the we
can help them debug the reason for the software fallback.
Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Eric Anholt <eric@anholt.net>
915_program.c
|
| 3bb2f0dde1cd813a0b5e0b45be376f4d6606aeb8 |
26-Jul-2011 |
Ian Romanick <ian.d.romanick@intel.com> |
i915: Fail without crashing if a Mesa IR program uses too many registers
This can only happen in GLSL shaders because assembly shaders that use
too many temps are rejected by core Mesa. It is easiest to make this
happen with shaders that contain flow-control that could not be lowered.
Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Eric Anholt <eric@anholt.net>
915_fragprog.c
|
| cb5e0ba2aa97df28a9faeb7ca0d2f0cdfcf4e507 |
13-Jul-2011 |
Eric Anholt <eric@anholt.net> |
i915: Simplify intel_wpos_* with a helper function.
915_fragprog.c
ntel_tris.c
|
| fceda4342cadc22ce86877a19bf82b86eb022d79 |
13-Jul-2011 |
Eric Anholt <eric@anholt.net> |
i915: Include gl_FragCoord.w data, not just xyz.
Fixes piglit fragcoord_w test.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=34323
915_fragprog.c
|
| af9548d3358884b408fb4c3cc69028befc5abe1d |
12-Jul-2011 |
Eric Anholt <eric@anholt.net> |
i915: Add support for HW rendering with no color draw buffer.
This is useful for shadow map generation. Tested with glsl-bug-22603,
which rendered the depth textures with fallbacks before.
Acked-by: Chad Versace <chad@chad-versace.us>
915_vtbl.c
|
| debf751aeaf0f02b9a7fc0e242ae3b97dde8416f |
12-Jul-2011 |
Eric Anholt <eric@anholt.net> |
i915: Fix incorrect depth scaling when enabling/disabling depth buffers.
We were updating our new viewport using the old buffers' _WindowMap.m.
We can do less math and avoid using that deprecated matrix by just
folding the viewport calculation right in to the driver.
Fixes piglit fbo-depthtex.
915_state.c
|
| 79fee3a76b7f4f63d01266fc3a3cd6ca44d1e513 |
12-Jul-2011 |
Eric Anholt <eric@anholt.net> |
i915: Make stencil test for no-stencil handling match depth test.
i915_update_draw_buffers() already handles the fallback bit for
missing stencil region, so here we just need to handle whether the GL
thinks we have stencil data or not (and disable the test if so).
915_state.c
915_vtbl.c
|
| fc4fba52cf7e9616c70dd76b4d6bdba6582e157b |
12-Jul-2011 |
Eric Anholt <eric@anholt.net> |
i915: Disable the depth test whenever we don't have a depth buffer.
We were disabling it once at the moment we changed draw buffers, but
later enabling of depth test could turn it back on. Fixes
fbo-nodepth-test.
Note that ctx->DrawBuffer has to be checked because during context
create we get called while it's still unset. However, we know we'll
get an intel_draw_buffer() after that, so it's safe to make a silly
choice at this point.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=30080
915_state.c
915_vtbl.c
|
| 4c47fce92e381cb182b51ce6d0727c0a1365e8b0 |
12-Jul-2011 |
Eric Anholt <eric@anholt.net> |
i915: Remove i965 paths from i915_update_drawbuffer() and i830's too.
Reviewed-by: Chad Versace <chad@chad-versace.us>
830_vtbl.c
915_vtbl.c
|
| f34ec6169dc8b96e3958a42b51c9048c5f42ed80 |
12-Jul-2011 |
Eric Anholt <eric@anholt.net> |
intel: Move intel_draw_buffers() code into each driver.
The illusion of shared code here wasn't fooling anybody. It was
tempting to keep i830 and i915 still shared, but I think I actually
want to make them diverge shortly.
Reviewed-by: Chad Versace <chad@chad-versace.us>
830_vtbl.c
915_vtbl.c
|
| f7a85f603b0da0770c27b200bff6e239e3aeae95 |
13-Jul-2011 |
Stéphane Marchesin <marcheu@chromium.org> |
Merge branch 'master' of ssh://git.freedesktop.org/git/mesa/mesa
|
| 556a47a2621073185be83a0a721a8ba93392bedb |
13-Jul-2011 |
Eric Anholt <eric@anholt.net> |
i915: Add support for gl_FragData[0] for output color.
We advertised ARB_draw_buffers, but either fell back to software when
using this output, or assertion failed. Fixes glsl-fs-fragdata-1, and
failures in some webgl conformance tests.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=39024
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=34906
915_fragprog.c
|
| f2fd0d63046c41559c5dfca9ebdc5d33c0ae4177 |
12-Jul-2011 |
Eric Anholt <eric@anholt.net> |
i915: Fix NPOT compressed textures on 915.
We were failing at rounding, misplacing the non-baselevels. Fixes:
3DFX_texture_compression_FXT1/fbo-generate-mipmaps
ARB_texture_compression/fbo-generate-mipmaps
EXT_texture_compression_s3tc/fbo-generate-mipmaps
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
915_tex_layout.c
|
| 6aae729d6ec3cb2d5677120742c1180e38815482 |
11-Jul-2011 |
Eric Anholt <eric@anholt.net> |
i915: Fix depth texturing since 86e62b2357447b7c97f434be4834f4b50aa0764d
The 965 driver already had the X8_Z24 case, but 915 was missing it.
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
915_texstate.c
|
| 9a82d89a8fafde1b65c0843e022e99864b6d56b1 |
11-Jul-2011 |
Eric Anholt <eric@anholt.net> |
i915: Use _mesa_get_format_name to describe translate_tex_format() fail.
I don't want to go count up to what format number 29 is.
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
830_texstate.c
915_texstate.c
|
| 6e6b38860488a0b2b282866f095cea9860503a14 |
11-Jul-2011 |
Eric Anholt <eric@anholt.net> |
i915: Fix map/unmap mismatches from leaving INTEL_FALLBACK during TNL.
The first rendering after context create didn't know of the color
buffer yet, triggering a sw fallback. The intel_prepare_render() from
intelSpanRenderStart then found the buffer and turned off fallbacks,
but intelSpanRenderFinish was never called and things were left
mapped. By checking buffers before making the call on whether to do
the fallback pipeline or not, we avoid the fallback change inside of
the rendering pipeline.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=31561
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
ntel_tris.c
|
| 35d5d5df72a2747262e00e521e650c8974d6c64d |
06-May-2011 |
Eric Anholt <eric@anholt.net> |
intel: Make our context structure be a ralloc context.
This will let me hang cached compiler structs off of the context
without having to worry about cleaning them up at destroy time.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
830_context.c
915_context.c
|
| 3c0c6248795806bb9e66bb89a7adc8fc0cf266d7 |
07-Jul-2011 |
Stéphane Marchesin <marcheu@chromium.org> |
Revert "i915: Eliminate redundant CONSTANTS updates"
This reverts commit 87641cffd97f328e846604d314c21582f426a19a.
915_program.c
|
| b904321ed018c661271fb1fc3eefd1af0ec61c7f |
29-Jun-2011 |
Eric Anholt <eric@anholt.net> |
intel: Rely on intel_region_reference()'s support of *dst != NULL.
Reviewed-by: Chad Versace <chad@chad-versace.us>
830_vtbl.c
915_vtbl.c
|
| 3541cc0d40f86d8ea63a876b7215831335ec677d |
22-Jun-2011 |
Eric Anholt <eric@anholt.net> |
i965: Don't bother telling swrast_setup about state updates until fallback.
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
830_vtbl.c
915_vtbl.c
|
| 6cf3d1cace770a3b4a0bff0d44db3b9e1da4cb09 |
22-Jun-2011 |
Eric Anholt <eric@anholt.net> |
i965: Don't bother telling tnl about state updates unless we fall back.
This was sucking up 1% of the CPU on 3DMMES.
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
830_vtbl.c
915_vtbl.c
|
| afbe605eff5af3739a76705a04a3c97a53c81b0d |
09-Jun-2011 |
Eric Anholt <eric@anholt.net> |
i915: Drop dead argument to translate_texture_format().
830_texstate.c
915_texstate.c
|
| b17aab5753a6d14c9e757bedb186963b2dae8823 |
31-May-2011 |
Eric Anholt <eric@anholt.net> |
intel: Move the draw_x/draw_y to the renderbuffer where it belongs.
It was originally located in the region because the tracking of
depth/color buffers was on the regions, and getting back to the irb
would have been tricky. Now, we're keying off of the renderbuffer in
more places, which means we can move these fields where they belong.
This could fix potential rendering failure with a single texture
having multiple images attached to different renderbuffers across
shareCtx (as far as I can tell, this was the only failure we could
cause, since anything else should trigger intel_render_texture in
between, for example a BindFramebuffer).
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Chad Versace <chad@chad-versace.us>
830_vtbl.c
915_vtbl.c
|
| 873379a8818eed9ab16c24728b7091a3a3705c5b |
03-Jun-2011 |
Johannes Obermayr <johannesobermayr@gmx.de> |
dri/nouveau: Fix build with --enable-shared-dricore.
- Based on the work of Себастьян Gliţa Κατινα <cglita@yahoo.com>
- Split Makefile.template into Makefile.defines and Makefile.targets
- Adapt other drivers to new situation
- Fixes https://bugs.freedesktop.org/show_bug.cgi?id=35441
Signed-off-by: Brian Paul <brianp@vmware.com>
akefile
|
| a9e65097855468529242f9076bd6ef2a6c8062c1 |
23-May-2011 |
Chad Versace <chad@chad-versace.us> |
intel: Add is_hiz_depth_format() to intel_contex.vtbl
Given a format, is_hiz_depth_format() indicates if HiZ can be enabled on
a depthbuffer of that format.
Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Signed-off-by: Chad Versace <chad@chad-versace.us>
915_vtbl.c
|
| 1f32c665c8af0622e2bbf451edb999ffbcd7d0fe |
20-Apr-2011 |
Eric Anholt <eric@anholt.net> |
intel: Add support for ARB_sampler_objects.
This extension support consists of replacing
"gl_texture_obj->Sampler." with "_mesa_get_samplerobj(ctx, unit)->".
One instance of referencing the texture's base sampler remains in the
initial miptree allocation, where I'm not sure we have a clear
association with any texture unit.
Tested with piglit ARB_sampler_objects/sampler-objects.
Reviewed-by: Brian Paul <brianp@vmware.com>
830_texstate.c
915_texstate.c
|
| d439491a77cf9f25ea7a7f9c2309d2542d87f83e |
16-Apr-2011 |
Ian Romanick <ian.d.romanick@intel.com> |
i915: Gut all remaining bits of hardware fog
None of this ever gets used. Fog is always calculated by a fragment
program. Even though the fixed-function fog unit is never used, state
updates are still sent to the hardware. Removing those spurious state
updates can't hurt performance.
Reviewed-by: Eric Anholt <eric@anholt.net>
Acked-by: Corbin Simpson <MostAwesomeDude@gmail.com>
Acked-by: Alex Deucher <alexdeucher@gmail.com>
915_context.c
915_context.h
915_state.c
915_vtbl.c
|
| 499f7c0114cca195c9569c202ae099ef0277b010 |
16-Apr-2011 |
Ian Romanick <ian.d.romanick@intel.com> |
i915: i915_context::vertex_fog is always I915_FOG_NONE, so kill it
Reviewed-by: Eric Anholt <eric@anholt.net>
Acked-by: Corbin Simpson <MostAwesomeDude@gmail.com>
Acked-by: Alex Deucher <alexdeucher@gmail.com>
915_context.h
915_fragprog.c
915_state.c
|
| c41cb17037777de6e4ae596e56a16239429486e9 |
16-Apr-2011 |
Ian Romanick <ian.d.romanick@intel.com> |
i915: There's always a fragment program
Fragment programs are generated by core Mesa for fixed-function.
Because of this, there's no reason to handle cases where there is no
fragment program for fog.
Reviewed-by: Eric Anholt <eric@anholt.net>
Acked-by: Corbin Simpson <MostAwesomeDude@gmail.com>
Acked-by: Alex Deucher <alexdeucher@gmail.com>
915_state.c
|
| 8fc5ed18bc0d299a4495b28f02e63b1b75326bbc |
16-Apr-2011 |
Ian Romanick <ian.d.romanick@intel.com> |
i915: Delete disabled try_pixel_fog paths
Reviewed-by: Eric Anholt <eric@anholt.net>
Acked-by: Corbin Simpson <MostAwesomeDude@gmail.com>
Acked-by: Alex Deucher <alexdeucher@gmail.com>
915_state.c
|
| df7555e763b9a4d989788e9b1cd25e8740649e79 |
16-Apr-2011 |
Ian Romanick <ian.d.romanick@intel.com> |
i915: gl_fragment_program::FogOption is always GL_NONE so don't check it
Reviewed-by: Eric Anholt <eric@anholt.net>
Acked-by: Corbin Simpson <MostAwesomeDude@gmail.com>
Acked-by: Alex Deucher <alexdeucher@gmail.com>
915_fragprog.c
915_state.c
|
| ecfaab88b2577bd0395bc05d75a036126806a9c4 |
10-Apr-2011 |
Brian Paul <brianp@vmware.com> |
mesa: move sampler state into new gl_sampler_object type
gl_texture_object contains an instance of this type for the regular
texture object sampling state. glGenSamplers() generates new instances
of gl_sampler_object which can override that state with glBindSampler().
830_texstate.c
915_texstate.c
|
| 7d41857566d900aee3319f06c272049e6211acc1 |
29-Mar-2011 |
Marek Olšák <maraeo@gmail.com> |
intel: fix build
broken with e5c6a92a12b5cd7db205d72039f58d302b0be9d5
(mesa: implement clamping controls (ARB_color_buffer_float))
915_fragprog.c
|
| b094dff50a05e56f5415d31daa5e4542f321c858 |
10-Mar-2011 |
Chris Wilson <chris@chris-wilson.co.uk> |
i915: Detect allocation failure of batch buffer
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
915_vtbl.c
|
| e5c6a92a12b5cd7db205d72039f58d302b0be9d5 |
15-Feb-2011 |
Marek Olšák <maraeo@gmail.com> |
mesa: implement clamping controls (ARB_color_buffer_float)
Squashed commit of the following:
Author: Marek Olšák <maraeo@gmail.com>
mesa: fix getteximage so that it doesn't clamp values
mesa: update the compute_version function
mesa: add display list support for ARB_color_buffer_float
mesa: fix glGet query with GL_ALPHA_TEST_REF and ARB_color_buffer_float
commit b2f6ddf907935b2594d2831ddab38cf57a1729ce
Author: Luca Barbieri <luca@luca-barbieri.com>
Date: Tue Aug 31 16:50:57 2010 +0200
mesa: document known possible deviations from ARB_color_buffer_float
commit 5458935be800c1b19d1c9d1569dc4fa30a97e8b8
Author: Luca Barbieri <luca@luca-barbieri.com>
Date: Tue Aug 24 21:54:56 2010 +0200
mesa: expose GL_ARB_color_buffer_float
commit aef5c3c6be6edd076e955e37c80905bc447f8a82
Author: Luca Barbieri <luca@luca-barbieri.com>
Date: Thu Aug 26 18:12:34 2010 +0200
mesa, mesa/st: handle read color clamping properly
(I'll squash the st/mesa part to a separate commit. -Marek)
We set IMAGE_CLAMP_BIT in the caller based on _ClampReadColor, where
the operation mandates it.
TODO: did I get the set of operations mandating it right?
commit 3a9cb5e59b676b6148c50907ce6eef5441677e36
Author: Luca Barbieri <luca@luca-barbieri.com>
Date: Thu Aug 26 18:09:41 2010 +0200
mesa: respect color clamping in texenv programs (v2)
Changes in v2:
- Fix attributes other than vertex color sometimes getting clamped
commit de26f9e47e886e176aab6e5a2c3d4481efb64362
Author: Luca Barbieri <luca@luca-barbieri.com>
Date: Thu Aug 26 18:05:53 2010 +0200
mesa: restore color clamps on glPopAttrib
commit a55ac3c300c189616627c05d924c40a8b55bfafa
Author: Luca Barbieri <luca@luca-barbieri.com>
Date: Thu Aug 26 18:04:26 2010 +0200
mesa: clamp color queries if and only if fragment clamping is enabled
commit 9940a3e31c2fb76cc3d28b15ea78dde369825107
Author: Luca Barbieri <luca@luca-barbieri.com>
Date: Wed Aug 25 00:00:16 2010 +0200
mesa: introduce derived _ClampXxxColor state resolving FIXED_ONLY
To do this, we make ClampColor call FLUSH_VERTICES with the appropriate
_NEW flag.
We introduce _NEW_FRAG_CLAMP since fragment clamping has wide-ranging
effects, despite being in the Color attrib group.
This may be easily changed by s/_NEW_FRAG_CLAMP/_NEW_COLOR/g
commit 6244c446e3beed5473b4e811d10787e4019f59d6
Author: Luca Barbieri <luca@luca-barbieri.com>
Date: Thu Aug 26 17:58:24 2010 +0200
mesa: add unclamped color parameters
915_fragprog.c
|
| decc6e2a32ef49e673c081f30e19b8970155d887 |
11-Mar-2011 |
Brian Paul <brianp@vmware.com> |
mesa: replace NEED_SECONDARY_COLOR(), RGBA_LOGICOP_ENABLED() with inlines
and rename them.
830_state.c
915_state.c
|
| a8bde5c47e1e8df13b408e44a2ae79edffd5ebed |
07-Mar-2011 |
Henri Verbeet <hverbeet@gmail.com> |
i915: Only invert wpos when rendering to the system framebuffer.
ntel_tris.c
|
| a99b23752b0182c64ebe1dc9c18ab821550771ff |
07-Mar-2011 |
Henri Verbeet <hverbeet@gmail.com> |
i915: Derive the gl_fragment_program from i915_fragment_program.
Instead of using the current gl_fragment_program. These aren't necessarily
the same, for example when translate_program() is called by
i915ValidateFragmentProgram().
915_fragprog.c
|
| 19ac5fa50dbb2f80eb0d47866b1474e3bd7a84dc |
23-Feb-2011 |
Chris Wilson <chris@chris-wilson.co.uk> |
i915: And remember assign the new value to the state reg...
Fixes regression from 298ebb78de8a6b6edf0aa0fe8d784d00bbc2930e.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=34589
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
915_state.c
|
| 2c6793fb6bc89df16c23f727bcb072a157ab8d10 |
25-Nov-2010 |
Chris Wilson <chris@chris-wilson.co.uk> |
i915: Emit a single relocation per vbo
Reducing the number of relocations has lots of nice knock-on effects,
not least including reducing batch buffer size, auxilliary array sizes
(vmalloced and copied into the kernel), processing of uncached
relocations etc.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
915_context.h
915_fragprog.c
915_reg.h
915_vtbl.c
ntel_tris.c
|
| 298ebb78de8a6b6edf0aa0fe8d784d00bbc2930e |
26-Nov-2010 |
Chris Wilson <chris@chris-wilson.co.uk> |
i915: Suppress emission of redundant stencil updates
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
915_state.c
|
| 7c97e288fb6a105ea60c377aef4472cc33ca01bc |
26-Nov-2010 |
Chris Wilson <chris@chris-wilson.co.uk> |
i915: Separate BLEND from general context state.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
915_context.h
915_state.c
915_vtbl.c
|
| 4f82585e279276e08c719d55218cd64a2c880a6b |
26-Nov-2010 |
Chris Wilson <chris@chris-wilson.co.uk> |
i915: Only flag context changes if the actual state is changed
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
915_state.c
|
| 0b0cad38c57fbe59710cb4058866b2e68f6d471a |
25-Nov-2010 |
Chris Wilson <chris@chris-wilson.co.uk> |
i915: suppress repeated sampler state emission
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
915_context.h
915_vtbl.c
|
| 87641cffd97f328e846604d314c21582f426a19a |
25-Nov-2010 |
Chris Wilson <chris@chris-wilson.co.uk> |
i915: Eliminate redundant CONSTANTS updates
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
915_program.c
|
| 8d68a90e225d831a395ba788e425cb717eec1f9a |
10-Feb-2011 |
Chris Wilson <chris@chris-wilson.co.uk> |
intel: use pwrite for batch
It's faster. Not only is the memcpy more efficiently performed in the
kernel (making up for the system call overhead), but by not using mmap
we remove the greater overhead of tracking the vma of every batch.
And it means we can read back from the batch buffer without incurring
the cost of a uncached read through the GTT.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
830_vtbl.c
915_vtbl.c
ntel_render.c
ntel_tris.c
|
| 4c1dc1c4d772b06578567f14419fdd4f27843825 |
10-Feb-2011 |
Ian Romanick <ian.d.romanick@intel.com> |
i915: Force lowering of all types of indirect array accesses in the FS
NOTE: This is a candidate for the 7.9 and 7.10 branches.
915_context.c
|
| 53b8b6884355da3737d1ff714f1fadc69d1745e4 |
10-Feb-2011 |
Ian Romanick <ian.d.romanick@intel.com> |
i915: Calculate partial result to temp register first
Previously the SNE and SEQ instructions would calculate the partial
result to the destination register. This would cause problems if the
destination register was also one of the source registers.
Fixes piglit tests glsl-fs-any, glsl-fs-struct-equal,
glsl-fs-struct-notequal, glsl-fs-vec4-operator-equal,
glsl-fs-vec4-operator-notequal.
NOTE: This is a candidate for the 7.9 and 7.10 branches.
915_fragprog.c
|
| a04582739e77b58cea9e2aa523109e878bf90b6a |
01-Feb-2011 |
Ian Romanick <ian.d.romanick@intel.com> |
i915: Only mark a register as available if all components are written
Previously a register would be marked as available if any component
was written. This caused shaders such as this:
0: TEX TEMP[0].xyz, INPUT[14].xyyy, texture[0], 2D;
1: MUL TEMP[1], UNIFORM[0], TEMP[0].xxxx;
2: MAD TEMP[2], UNIFORM[1], TEMP[0].yyyy, TEMP[1];
3: MAD TEMP[1], UNIFORM[2], TEMP[0].zzzz, TEMP[2];
4: ADD TEMP[0].xyz, TEMP[1].xyzx, UNIFORM[3].xyzx;
5: TEX TEMP[1].w, INPUT[14].xyyy, texture[0], 2D;
6: MOV TEMP[0].w, TEMP[1].wwww;
7: MOV OUTPUT[2], TEMP[0];
8: END
to produce incorrect code such as this:
BEGIN
DCL S[0]
DCL T_TEX0
R[0] = MOV T_TEX0.xyyy
U[0] = TEXLD S[0],R[0]
R[0].xyz = MOV U[0]
R[1] = MUL CONST[0], R[0].xxxx
R[2] = MAD CONST[1], R[0].yyyy, R[1]
R[1] = MAD CONST[2], R[0].zzzz, R[2]
R[0].xyz = ADD R[1].xyzx, CONST[3].xyzx
R[0] = MOV T_TEX0.xyyy
U[0] = TEXLD S[0],R[0]
R[1].w = MOV U[0]
R[0].w = MOV R[1].wwww
oC = MOV R[0]
END
Note that T_TEX0 is copied to R[0], but the xyz components of R[0] are
still expected to hold a calculated value.
Fixes piglit tests draw-elements-vs-inputs, fp-kill, and
glsl-fs-color-matrix. It also fixes Meego bugzilla #13005.
NOTE: This is a candidate for the 7.9 and 7.10 branches.
915_fragprog.c
|
| 2fb0aebd4a248d2a0725099cd5646253c30c1dc3 |
20-Jan-2011 |
Ian Romanick <ian.d.romanick@intel.com> |
intel: Fix typeos from 3d028024 and 790ff232
...and remove egg from face.
915_context.c
|
| 790ff232e2607a83e6207d06900a5e3de613d161 |
20-Jan-2011 |
Ian Romanick <ian.d.romanick@intel.com> |
i915: Set correct values for range/precision of fragment shader types
915_context.c
|
| 74713e2d293f9e796a4053a5a99ee5cb7df5c740 |
11-Jan-2011 |
Brian Paul <brianp@vmware.com> |
mesa: begin implementation of GL_ARB_draw_buffers_blend
830_state.c
915_state.c
|
| 5b3eb7538cd9ceb967b6e9e765896183e7c2c4d4 |
10-Jan-2011 |
Eric Anholt <eric@anholt.net> |
Revert "intel: Always allocate miptrees from level 0, not tObj->BaseLevel."
This reverts commit 7ce6517f3ac41bf770ab39aba4509d4f535ef663.
This reverts commit d60145d06d999c5c76000499e6fa9351e11d17fa.
I was wrong about which generations supported baselevel adjustment --
it's just gen4, nothing earlier. This meant that i915 would have
never used the mag filter when baselevel != 0. Not a severe bug, but
not an intentional regression. I think we can fix the performance
issue another way.
915_tex_layout.c
|
| 5df51c2bb00871b338ec8455bd4ce5feea163f63 |
08-Jan-2011 |
Eric Anholt <eric@anholt.net> |
i915: Drop old checks for the settexoffset hack.
830_vtbl.c
915_vtbl.c
|
| a7bf7230564ac282cc957207224d16f322fa73d8 |
08-Jan-2011 |
Eric Anholt <eric@anholt.net> |
intel: Add a vtbl hook for determining if a format is renderable.
By relying on just intel_span_supports_format, some formats that
aren't supported pre-gen4 were not reporting FBO incomplete. And we
also complained in stderr when it happened on i915 because draw_region
gets called before framebuffer completeness validation.
830_vtbl.c
915_vtbl.c
|
| d60145d06d999c5c76000499e6fa9351e11d17fa |
06-Jan-2011 |
Eric Anholt <eric@anholt.net> |
i915: Fix build for previous commit.
915_tex_layout.c
|
| 1b18b45d79e065e4e05a1e89e9d756d96258ded5 |
06-Jan-2011 |
Eric Anholt <eric@anholt.net> |
intel: Clarify first_level/last_level vs baselevel/maxlevel by deletion.
This has always been ugly about our texture code -- object base/max
level vs intel object first/last level vs image level vs miptree
first/last level. We now get rid of intelObj->first_level which is
just tObj->BaseLevel, and make intelObj->_MaxLevel clearly based off
of tObj->_MaxLevel instead of duplicating its code (incorrectly, as
image->MaxLog2 only considers width/height and not depth!)
830_texstate.c
915_texstate.c
|
| 39cc0ee3eaf0d0cae70d91ae33961053782662c8 |
05-Jan-2011 |
Eric Anholt <eric@anholt.net> |
i915: Enable LOD preclamping on 8xx like on 915/965.
Fixes lodclamp-between and lodclamp-between-max.
830_reg.h
830_texstate.c
|
| 973e821a633031fe5a8608b50beabb10af21430e |
05-Jan-2011 |
Eric Anholt <eric@anholt.net> |
i915: Implement min/max lod clamping in hardware on 8xx.
This avoids 8xx-specific texture relayout for min/max lod changes.
One step closer to avoiding relayout for base/maxlevel changes!
830_reg.h
830_texstate.c
|
| 2bd11ea11921bcd180b354342a8786c5b7ddd6b3 |
15-Dec-2010 |
Shuang He <shuang.he@intel.com> |
i915: Fix INTEL_DEBUG=wm segmentation fault
The program should be disassembled after it's uploaded
915_fragprog.c
|
| c27285610c9f9b50d06bf0f2725da195937cb48d |
13-Dec-2010 |
Eric Anholt <eric@anholt.net> |
i965: Add support for using the BLT ring on gen6.
830_vtbl.c
915_vtbl.c
|
| c92550be64abd454560556599cd95b237f4375b1 |
01-Dec-2010 |
Ian Romanick <ian.d.romanick@intel.com> |
i915: Correctly generate unconditional KIL instructions
Fixes piglit test glsl-fs-discard-03.
NOTE: This is a candidate for the 7.9 branch.
915_fragprog.c
|
| b6dbc06742af4cbd86869243640c35aa7025766c |
25-Nov-2010 |
Ian Romanick <ian.d.romanick@intel.com> |
i915: Request that POW instructions be lowered
915_context.c
|
| e42ce160b1854dae395c1c393eb546a4fe902c7f |
03-Nov-2010 |
Eric Anholt <eric@anholt.net> |
i965: Remove dead intel_structs.h file.
ntel_structs.h
|
| f9995b30756140724f41daf963fa06167912be7f |
12-Oct-2010 |
Kristian Høgsberg <krh@bitplanet.net> |
Drop GLcontext typedef and use struct gl_context instead
830_context.c
830_context.h
830_state.c
830_texblend.c
830_texstate.c
830_vtbl.c
915_context.c
915_context.h
915_fragprog.c
915_program.c
915_program.h
915_state.c
915_texstate.c
915_vtbl.c
ntel_render.c
ntel_tris.c
ntel_tris.h
|
| d3491e775fb07f891463b2185d74bbad62f3ed24 |
12-Oct-2010 |
Kristian Høgsberg <krh@bitplanet.net> |
Rename GLvisual and __GLcontextModes to struct gl_config
830_context.c
830_context.h
915_context.c
915_context.h
|
| 220c0834a45d1dfa71f192b17d9a9b959a5a807e |
09-Oct-2010 |
Vinson Lee <vlee@vmware.com> |
i915: Silence unused variable warning in non-debug builds.
Fixes this GCC warning.
i915_vtbl.c: In function 'i915_assert_not_dirty':
i915_vtbl.c:670: warning: unused variable 'dirty'
915_vtbl.c
|
| 0f4984a0fb5a59efe8e3d954e9deb5ec83177e90 |
09-Oct-2010 |
Vinson Lee <vlee@vmware.com> |
i915: Silence unused variable warning in non-debug builds.
Fixes this GCC warning.
i830_vtbl.c: In function 'i830_assert_not_dirty':
i830_vtbl.c:704: warning: unused variable 'i830'
830_vtbl.c
|
| f831212eabe25ea2603be13d8d40b12477012acc |
30-Sep-2010 |
Nicolas Kaiser <nikai@nikai.net> |
dri/i915: remove duplicated include
Remove duplicated include.
Signed-off-by: Brian Paul <brianp@vmware.com>
915_context.c
|
| 02984e3536bf9a4f149916b45d727659c8dc9a7c |
18-Sep-2010 |
Ian Romanick <ian.d.romanick@intel.com> |
Remove GL_EXT_cull_vertex
This is only used in the i915 driver where it provides little benefit
for very few applications that use it with fixed function TNL.
ntel_render.c
|
| f46523e0bcdfe447b4a9a35fe1561490fa32c3f0 |
24-Sep-2010 |
Eric Anholt <eric@anholt.net> |
i915: Remove a dead if (0) block.
915_context.c
|
| 55aaee602078a8a57681cd4c205a71048fd184fe |
10-Sep-2010 |
Ian Romanick <ian.d.romanick@intel.com> |
intel: Remove noise opcode support from i915 and i965 drivers
With recent changes to the GLSL compiler, these opcode should never be
seen in these drivers.
915_fragprog.c
|
| 2b70dbfe091af5ae7c788e16275e1af2cb1c284c |
10-Sep-2010 |
Ian Romanick <ian.d.romanick@intel.com> |
glsl2: Add EmitNoNoise flag, use it to remove noise opcodes
915_context.c
|
| 6d3a2c97f4a78e85545286e0e126cd3a27bd1cbd |
05-Sep-2010 |
Luca Barbieri <luca@luca-barbieri.com> |
glsl: make compiler options per-target
This allows us to specify different options, especially useful for chips
without unified shaders.
Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
915_context.c
|
| 11726c4e867c78c4b7aca2ea04d1dfa19ae622fb |
19-Aug-2010 |
Vinson Lee <vlee@vmware.com> |
i915: Remove unnecessary header from i830_context.c.
830_context.c
|
| 02e16398292825924d4c7ffb884961275dbadacd |
18-Aug-2010 |
Eric Anholt <eric@anholt.net> |
i915: Add support for SSG opcode.
Fixes glsl-fs-sign and many of the tests of trig builtins.
915_fragprog.c
|
| e43b250fc076aea9e4b5319fdf409e95b28ac8fc |
18-Aug-2010 |
Eric Anholt <eric@anholt.net> |
i915: Add support for reading output regs in the FS.
Fixes glsl-unused-varying and many others, since we produce an output
reg read any time gl_FragColor is written inside an if statement.
915_fragprog.c
|
| 66690864efb9ab1077f87744e1afec3231f244f6 |
18-Aug-2010 |
Eric Anholt <eric@anholt.net> |
i915: Add support for OPCODE_DP2.
Fixes glsl-fs-dot-vec2.
915_fragprog.c
|
| 6c03c576cc49bbb008de66d374f4302ff0fe0390 |
17-Aug-2010 |
Ian Romanick <ian.d.romanick@intel.com> |
Merge branch 'glsl2'
Conflicts:
src/mesa/program/prog_optimize.c
|
| 443a7e4e9a360acbc3e662c098be436f180bf81d |
14-Aug-2010 |
Ian Romanick <ian.d.romanick@intel.com> |
Merge branch 'master' into glsl2
|
| facf368df29b6889e9566aaa642aa1937e6dfc56 |
08-Aug-2010 |
Vinson Lee <vlee@vmware.com> |
dri: Add missing header m_xform.h.
This is a follow-up patch to commit
f4511c4835879090ce7e6afe3ac26b98fb91899a.
Files that include tnl_dd/t_dd_dmatmp.h now need to also include
m_xform.h as t_context.h no longer includes it.
ntel_render.c
|
| 7d349f588af88f9c5cfe37a331bcef6292a9111e |
27-Jul-2010 |
Kristian Høgsberg <krh@bitplanet.net> |
intel: Remove unused intel/server files
akefile
|
| afe125e0a18ac3886c45c7e6b02b122fb2d327b5 |
27-Jul-2010 |
Eric Anholt <eric@anholt.net> |
Merge remote branch 'origin/master' into glsl2
This pulls in multiple i965 driver fixes which will help ensure better
testing coverage during development, and also gets past the conflicts
of the src/mesa/shader -> src/mesa/program move.
Conflicts:
src/mesa/Makefile
src/mesa/main/shaderapi.c
src/mesa/main/shaderobj.h
|
| 95c08920ea3d040360e5cc51d8a852d21a0329ee |
19-Jul-2010 |
Eric Anholt <eric@anholt.net> |
i915: Ask the compiler to flatten out all the if statements that it can.
915_context.c
|
| ec2b92f98c2e7f161521b447cc1d9a36bce3707c |
11-Jun-2010 |
Brian Paul <brianp@vmware.com> |
mesa: rename src/mesa/shader/ to src/mesa/program/
915_fragprog.c
|
| 34474fa4119378ef9fbb9fb557cc19c0a1ca1f7e |
07-Jun-2010 |
Eric Anholt <eric@anholt.net> |
intel: Change dri_bo_* to drm_intel_bo* to consistently use new API.
The slightly less mechanical change of converting the emit_reloc calls
will follow.
830_context.h
830_texstate.c
830_vtbl.c
915_context.h
915_texstate.c
915_vtbl.c
ntel_tris.c
|
| 6d741627b00677d269537ad36e5f2ecd31fd98b5 |
05-Jun-2010 |
Chris Wilson <chris@chris-wilson.co.uk> |
i915: Only emit a MI_FLUSH when the drawing rectangle offset changes.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
915_context.h
915_vtbl.c
|
| add3260157368458501709d08a3f913ed448234f |
05-Jun-2010 |
Chris Wilson <chris@chris-wilson.co.uk> |
i915: Fix off-by-one for drawing rectangle.
The drawing rectangle is given in *inclusive* pixel values, so the range
is only [0,2047]. Hence when rendering to a 2048 wide target, such as an
extended desktop, we would issue an illegal instruction zeroing the draw
area.
Fixes:
Bug 27408: Primary and Secondary display blanks in extended
desktop mode with Compiz enabled
https://bugs.freedesktop.org/show_bug.cgi?id=27408
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
915_vtbl.c
|
| ff74c2ced5e7234902d43712a3759f91fd534a91 |
05-Jun-2010 |
Chris Wilson <chris@chris-wilson.co.uk> |
i915: Inhibit render cache flush when changing drawing rectangle offset.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
915_vtbl.c
|
| b80a728f8a86cbd1efce9611d822ab73b5baeab9 |
04-Jun-2010 |
Eric Anholt <eric@anholt.net> |
i915: Clamp minimum lod to maximum texture level too.
Otherwise, we'd run into minlod > maxlod, and the sampler would give
us the undefined we asked for.
Bug #24846. Fixes OGLC texlod.c.
915_texstate.c
|
| db2993faa0211b60efd46016de5d07110cb9777a |
11-May-2010 |
Kristian Høgsberg <krh@bitplanet.net> |
intel: Drop viewport hack when we can
830_state.c
915_state.c
|
| 0bf1ddd60a3660974ad54e410533eeb481949364 |
11-May-2010 |
Vinson Lee <vlee@vmware.com> |
i915: Drop intelFlush().
This was missed in commit c4775a27e3aaa2006b98f225387499b79bc609ef.
Fixes i915 build.
ntel_tris.c
|
| 0870e4a2022cff79805613ae7cd4b9237a2f564c |
02-May-2010 |
Kristian Høgsberg <krh@bitplanet.net> |
Merge branch 'gles2-2'
Conflicts:
src/mesa/drivers/dri/common/dri_util.h
|
| a5107b0a5cb1ac9f112aa498f57c13580bd56cb3 |
27-Apr-2010 |
Kristian Høgsberg <krh@bitplanet.net> |
intel: Only register ES2 extensions for ES2 contexts
akefile
ntel_extensions_es2.c
|
| 4b69100bdcf26dbb5be4d600b7ca5f5cdf6e8f20 |
27-Apr-2010 |
Kristian Høgsberg <krh@bitplanet.net> |
dri: Add DRI entrypoints to create a context for a given API
830_context.c
915_context.c
915_context.h
|
| 7d8f0fc28239c8023d2d44cbd4c979aa86c31873 |
29-Apr-2010 |
Eric Anholt <eric@anholt.net> |
i965: Fix cube map layouts on Ironlake.
We were doubling up the offsets for the mipmap levels for CPU access.
Instead of reimplementing i945_miptree_layout_2d with 6 cube images
separated by qpitch, share that function and provide the level offsets
later.
Fixes piglit cubemap and fbo-cubemap.
915_tex_layout.c
|
| 1407daf9bc9e0452a171aaca2ab8e389ccca5462 |
20-Apr-2010 |
Eric Anholt <eric@anholt.net> |
i915: Map sampler indices to texture units correctly for fragment shaders.
Fixes hang with "gst-launch-0.10 videotestsrc ! video/x-raw-rgb !
glupload ! gleffects effect=heat ! glimagesink" which uses 2 samplers
pointing at GL_TEXTURE1 and GL_TEXTURE2, and piglit
glsl-fs-sampler-numbering.
915_fragprog.c
|
| ac3529eec4d08c2d9633d7b1bba8413cc507f3c1 |
12-Apr-2010 |
Eric Anholt <eric@anholt.net> |
i915: Add missing break; after handling the stub NOISE instructions.
Bug #27348
915_fragprog.c
|
| edad36cff96f6d68ab8256fbe8106a313583a8c0 |
26-Apr-2010 |
Eric Anholt <eric@anholt.net> |
i915: Add debugging for just prorgam compile under INTEL_DEBUG=wm
915_fragprog.c
|
| 891ad6ec1ad71d26e0d06fa620fe392d29de26c9 |
26-Apr-2010 |
Eric Anholt <eric@anholt.net> |
i915: Provide counts in the error messages for program limits.
915_fragprog.c
915_program.c
|
| 2b6488326967c3e58737d90df8883a2c6c76a6c4 |
12-Apr-2010 |
Jakob Bornecrantz <wallbraker@gmail.com> |
i915: Fix comments about cube layouts
915_tex_layout.c
|
| ff6bce552a1522160c64d10677a36a7ad6cf5f88 |
30-Mar-2010 |
Kristian Høgsberg <krh@bitplanet.net> |
intel: Remove redundant fields from struct intel_context
All these pointers are in the __DRIcontext struct, which we point to.
915_state.c
ntel_tris.c
|
| 182c42c8da6edfa66819eef02f4dea310c1f68d7 |
22-Mar-2010 |
Brian Paul <brianp@vmware.com> |
Merge branch '7.8'
Conflicts:
src/gallium/drivers/cell/ppu/cell_screen.c
src/mesa/state_tracker/st_cb_drawpixels.c
|
| 062a208814ad65d330f403c46d4bed88648f334f |
19-Mar-2010 |
Ian Romanick <ian.d.romanick@intel.com> |
intel: Use bit-wise not instead of logical not (i830 path)
The assertion is checking that the low-order bits of offset are not
set. It does this by anding the inverted offset mask with the
offset. This is clearly intended to be a bit-wise "invert".
Fixes bug #25984.
ntel_tris.c
|
| fda5078324e0a940a2ddfdd1c63ffceb47c5a717 |
18-Mar-2010 |
Ian Romanick <ian.d.romanick@intel.com> |
Use bit-wise not instead of logical not.
The assertion is checking that the low-order bits of offset are not
set. It does this by anding the inverted offset mask with the
offset. This is clearly intended to be a bit-wise "invert".
Fixes bug #25984.
ntel_tris.c
|
| 362c1bf75eb74de5b4655c481b74f79718ed4a34 |
17-Mar-2010 |
Eric Anholt <eric@anholt.net> |
intel: Replace mt->pitch with mt->region->pitch.
The pitch is not really an inherent part of the miptree, since it's
not part of any of the layout calculations, and it's dictated by the
libdrm-allocated region pitch now.
830_texstate.c
915_tex_layout.c
915_texstate.c
|
| 419f0f9d0426bc1eb40ceb60e7764af4013947a0 |
06-Mar-2010 |
George Sapountzis <gsapountzis@gmail.com> |
dri: drop MINIGLX_SOURCES (2)
erver/intel_dri.c
|
| 8953bfce0eb7e56f13d4527ef86cdf4cf2db037f |
06-Mar-2010 |
George Sapountzis <gsapountzis@gmail.com> |
dri: drop MINIGLX_SOURCES
akefile
|
| a232cc59e3f8ac8462c23b1a83e0ba60b451e681 |
05-Mar-2010 |
Eric Anholt <eric@anholt.net> |
intel: Remove support for the DRI1 TFP extension.
830_texstate.c
915_texstate.c
|
| 41d3fdc380655b701fab2537bdc7e254b6155286 |
03-Mar-2010 |
Eric Anholt <eric@anholt.net> |
i915: Fix up i830 for tiled drawing offsets.
Corresponds to b87406e55f029d29594ae76a4b39a4fe1007fe4f.
830_context.h
830_vtbl.c
|
| 0384214923216b4bb7340070d08fcda2cbb79a93 |
27-Feb-2010 |
Ian Romanick <ian.d.romanick@intel.com> |
Remove stray defines of HAVE_RGBA
Now that color-index support is removed from t_dd_tritmp.h and
t_dd_unfilled.h, drivers no longer need define HAVE_RGBA.
Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
ntel_tris.c
|
| b87406e55f029d29594ae76a4b39a4fe1007fe4f |
03-Mar-2010 |
Eric Anholt <eric@anholt.net> |
i915: Use x,y drawing offsets instead of changing buffer offsets.
This should fix rendering into mipmaps of tiled textures.
915_context.h
915_vtbl.c
ntel_tris.c
|
| 415b7c7775dd7240abd2c929ea3335304a790d39 |
22-Feb-2010 |
Chris Wilson <chris@chris-wilson.co.uk> |
i915: Fix logic !gen >= 3
The effect of this was that all objects were aligned to 128 bytes
on all generations, rather than just gen2.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
ntel_tris.c
|
| ac6ce53af7f67d01afd8e33d297f95c21aa3405e |
22-Feb-2010 |
Chris Wilson <chris@chris-wilson.co.uk> |
i915: Remove superfluous MI_NOOP from vertex emission
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
ntel_tris.c
|
| 298be2b028263b2c343a707662c6fbfa18293cb2 |
19-Feb-2010 |
Kristian Høgsberg <krh@bitplanet.net> |
Replace the _mesa_*printf() wrappers with the plain libc versions
915_context.c
915_debug.c
915_debug_fp.c
915_tex_layout.c
ntel_tris.c
|
| 0032525242950bae197b267794193cdcb611c376 |
18-Feb-2010 |
Jesse Barnes <jbarnes@virtuousgeek.org> |
i915: update render buffers at prepare_render time
We need to do this before we emit any state dependent on the current
render buffers.
915_vtbl.c
|
| 4ac9c80e5beea26e13ccf12ce6bd9ee051c229f5 |
05-Feb-2010 |
Brian Paul <brianp@vmware.com> |
mesa: change ctx->Driver.ProgramStringNotify() to return GLboolean
GL_TRUE indicates that the driver accepts the program.
GL_FALSE indicates the program can't be compiled/translated by the
driver for some reason (too many resources used, etc).
Propogate this result up to the GL API: set GL_INVALID_OPERATION
error if glProgramString() was called. Set shader program link
status to GL_FALSE if glLinkProgram() was called.
At this point, drivers still don't do any program checking and
always return GL_TRUE.
915_fragprog.c
|
| c641703f21c858464ca34a1f99c79ccfd9a85d70 |
31-Jan-2010 |
Vinson Lee <vlee@vmware.com> |
i915: Remove unnecessary headers.
915_vtbl.c
ntel_tris.c
|
| c9886d535e4ac5ae108b1015a9682f4ddd297536 |
28-Jan-2010 |
Eric Anholt <eric@anholt.net> |
i915: Remove unused initial and current state, now that there's nothing else.
830_context.h
830_state.c
830_vtbl.c
915_context.h
915_state.c
915_vtbl.c
|
| f9439e4a4696b8bc5fcdf3ac664f5e8d446f6621 |
28-Jan-2010 |
Eric Anholt <eric@anholt.net> |
intel: Remove long-disabled meta readpixels, and associated meta support.
akefile
830_context.c
830_context.h
830_metaops.c
830_vtbl.c
915_context.c
915_context.h
915_metaops.c
915_vtbl.c
|
| 9b22427911ad27efc1f36faee9462c6082d0417c |
25-Jan-2010 |
Brian Paul <brianp@vmware.com> |
Merge branch 'mesa_7_7_branch'
Conflicts:
src/mesa/drivers/dri/intel/intel_screen.c
src/mesa/drivers/dri/intel/intel_swapbuffers.c
src/mesa/drivers/dri/r300/r300_emit.c
src/mesa/drivers/dri/r300/r300_ioctl.c
src/mesa/drivers/dri/r300/r300_tex.c
src/mesa/drivers/dri/r300/r300_texstate.c
|
| 329c1b59106cf4ada27eaa4694600dc281d8c0de |
23-Jan-2010 |
Vinson Lee <vlee@vmware.com> |
i915: Remove unnecessary headers.
830_context.c
915_context.c
915_debug_fp.c
915_vtbl.c
ntel_tris.c
|
| 4736e1cbbd4e2cf7fa4c67a728d520edc67e920f |
21-Jan-2010 |
Chia-I Wu <olvaffe@gmail.com> |
dri: Remove unnecessary glapi headers.
They are not used at all.
830_vtbl.c
915_vtbl.c
|
| 46f55798269013063d57ae83a8444a64aeb64a51 |
05-Jan-2010 |
Eric Anholt <eric@anholt.net> |
intel: Remove leftover symlinks from DRI1 removal.
ntel_swapbuffers.c
|
| ae44b92f61b78c9991060a8dd7fa7327d428c138 |
05-Jan-2010 |
Kristian Høgsberg <krh@bitplanet.net> |
Merge branch 'remove-intel-dri1'
* remove-intel-dri1:
intel: intelScreenContext() is no longer used
intel: Remove remaining dri2.enabled tests
intel: Drop more cliprect bookkeeping
intel: Remove struct intel_framebuffer
intel: Remove client-side vblank code
intel: Drop intelWindowMoved()
intel: Drop batchbuffer cliprect_mode tracking
intel: Drop DRI1 static regions
intel: Use depth buffer from ctx.DrawBuffer in copypix_src_region()
intel: Drop LOCK/UNLOCK_HARDWARE()
intel: Drop DRI1 SwapBuffer implementation
intel: Drop DRI1 CopySubBuffer implementation
intel: Drop DRI1 support
Push __driDriverExtensions out of dri_util.c and into the drivers
Remove leftover __DRI{screen,drawable,context}Private references
Check for libdrm_$chipset.pc when needed
|
| f6c2d1f94ffa8f87b22ed1ff5c465d0e9aa1489e |
05-Jan-2010 |
Brian Paul <brianp@vmware.com> |
mesa: make texture BorderColor a union of float/int/uint
When we have integer-valued texture formats, the texture border color
must also store integer and uint values.
With GL 3.0, the new glTexParameterIiv() and glTexParameterIuiv() functions
can set the border color to int or uint values.
830_texstate.c
915_texstate.c
|
| 5ac16495a2772886100789f04e1a7d65068e9a40 |
05-Jan-2010 |
Brian Paul <brianp@vmware.com> |
Merge branch 'mesa_7_7_branch'
Conflicts:
docs/relnotes.html
src/gallium/drivers/llvmpipe/lp_tex_sample_c.c
src/gallium/drivers/r300/r300_cs.h
src/mesa/drivers/dri/i965/brw_wm_surface_state.c
src/mesa/main/enums.c
|
| b434a816d7a4b298e16a8b51b54e5a2d5ea28da8 |
30-Dec-2009 |
Eric Anholt <eric@anholt.net> |
i915: Use _MaxLevel on principle in texture setup.
It was OK before because we proceed to clamp the value to hardware
limits, but given that other use of MaxLevel has been a trap, let's
avoid it.
915_texstate.c
|
| 2861d9200be15cc44e8825387d3bd79086523c67 |
02-Jan-2010 |
Kristian Høgsberg <krh@bitplanet.net> |
intel: Drop more cliprect bookkeeping
830_vtbl.c
915_vtbl.c
|
| a6e1d3edac90016ca9662ca0a9707a2d4fba1726 |
02-Jan-2010 |
Kristian Høgsberg <krh@bitplanet.net> |
intel: Remove client-side vblank code
akefile
|
| 5203b7227ccb6b618fa42f08434d4a3cf123dca2 |
02-Jan-2010 |
Kristian Høgsberg <krh@bitplanet.net> |
intel: Drop batchbuffer cliprect_mode tracking
830_vtbl.c
915_vtbl.c
ntel_tris.c
|
| d61f07318c8678901b948fdaa8ccdf37aa3203e9 |
01-Jan-2010 |
Kristian Høgsberg <krh@bitplanet.net> |
Remove leftover __DRI{screen,drawable,context}Private references
As part of the DRI driver interface rewrite I merged __DRIscreenPrivate
and __DRIscreen, and likewise for __DRIdrawablePrivate and
__DRIcontextPrivate. I left typedefs in place though, to avoid renaming
all the *Private use internal to the driver. That was probably a
mistake, and it turns out a one-line find+sed combo can do the mass
rename. Better late than never.
830_context.c
830_context.h
915_context.c
915_context.h
|
| 8616cec5c9889e6166839b33baa8db52f04d409c |
01-Jan-2010 |
Kristian Høgsberg <krh@bitplanet.net> |
Check for libdrm_$chipset.pc when needed
This adds missing pkg-config lookup for intel and moves the radeon
lookup into a case...esac so it's only looked up when one or more of
the radeon drivers are enabled.
akefile
|
| 25024d948298a9f3f3210a0b91486f79a3917b0f |
31-Dec-2009 |
Brian Paul <brianp@vmware.com> |
Merge branch 'mesa_7_7_branch'
Conflicts:
configs/darwin
src/gallium/auxiliary/util/u_clear.h
src/gallium/state_trackers/xorg/xorg_exa_tgsi.c
src/mesa/drivers/dri/i965/brw_draw_upload.c
|
| c67bb15d4e3da430d511444bd7d159ccb0c84b73 |
29-Dec-2009 |
Vinson Lee <vlee@vmware.com> |
intel: Silence compiler warnings.
ntel_render.c
|
| d0b7ff551ab25153e3023871af3daa65b394a828 |
27-Dec-2009 |
Brian Paul <brianp@vmware.com> |
Merge branch 'mesa_7_6_branch' into mesa_7_7_branch
Conflicts:
src/gallium/auxiliary/util/u_network.c
src/gallium/auxiliary/util/u_network.h
src/gallium/drivers/i915/i915_state.c
src/gallium/drivers/trace/tr_rbug.c
src/gallium/state_trackers/vega/bezier.c
src/gallium/state_trackers/vega/vg_context.c
src/gallium/state_trackers/xorg/xorg_crtc.c
src/gallium/state_trackers/xorg/xorg_driver.c
src/gallium/winsys/xlib/xlib_brw_context.c
src/mesa/main/mtypes.h
|
| 309c156bae59124be17137d0f559d2c054231f7c |
27-Dec-2009 |
Vinson Lee <vlee@vmware.com> |
i915: Fix assert.
915_program.c
|
| f67748038935e609aa85450b20d550b4813c9429 |
17-Dec-2009 |
Eric Anholt <eric@anholt.net> |
intel: Replace some gen3 IS_* checks with context structure usage.
Shaves 400 bytes or so from i915_dri.so.
915_vtbl.c
ntel_tris.c
|
| e3202a8cc7178373e8e5af60c090550aef29392c |
22-Dec-2009 |
Eric Anholt <eric@anholt.net> |
i915: Fix use of uninitialized variable in OPCODE_NOISE stub.
We don't actually care which register is used since we're just
swizzling (0,0,0,0), but it should be a valid variable number.
Detected by clang.
915_fragprog.c
|
| d203dbc73d3b036937e0404b580fb04d23e10652 |
22-Dec-2009 |
Eric Anholt <eric@anholt.net> |
mesa: Replace CLAMP_SELF() macro with more obvious CLAMP() usage.
The same code is generated, and readers and static analyzers are
happier.
830_state.c
915_state.c
|
| 9eb7fc6661a1d46c06cec8584b898e3e690af6fa |
22-Dec-2009 |
Brian Paul <brianp@vmware.com> |
Merge branch 'mesa_7_7_branch'
Conflicts:
src/mesa/main/version.h
src/mesa/state_tracker/st_atom_shader.c
|
| a087eb590d780cb82b49464e05ffc85123adce7e |
11-Dec-2009 |
Brian Paul <brianp@vmware.com> |
Merge branch 'mesa_7_7_branch'
Conflicts:
src/gallium/state_trackers/xorg/xorg_xv.c
src/mesa/drivers/dri/intel/intel_span.c
|
| b605f4ff11c894500f2d0273c5d4653ff413448d |
11-Dec-2009 |
Brian Paul <brianp@vmware.com> |
Merge branch 'mesa_7_6_branch' into mesa_7_7_branch
|
| cb1dcb55f9884431a5e2b90e9208b42558a95611 |
11-Dec-2009 |
Vinson Lee <vlee@vmware.com> |
i915: Add missing break statement in i915_debug_packet.
915_debug.c
|
| e624b77eb2d594cde053c73a530836e05227126a |
09-Dec-2009 |
Ian Romanick <ian.d.romanick@intel.com> |
intel: Remove ARGB internal_format == GL_RGB hacks
Now that XRGB is supported, we don't need to hack around cases of an RGBA
format buffer with an internal format of GL_RGB.
830_texstate.c
915_texstate.c
|
| 3078bd136d6ee1d9ad16b4c834cad23b005304a4 |
08-Dec-2009 |
Ian Romanick <ian.d.romanick@intel.com> |
intel: Axe intel_renderbuffer::texformat
Since the texformat branch merge, the value of intel_renderbuffer::texformat
is just a copy of gl_renderbuffer::Format.
830_vtbl.c
915_vtbl.c
|
| 51e945ec9c0b803f5e998f87449fb02a7c39ae65 |
10-Dec-2009 |
Eric Anholt <eric@anholt.net> |
intel: Attempt to fix up after "Update vertex texture code."
The MaxCombinedTextureImageUnits is the total number of samplers that can
be bound between vertex, geometry, and fragment, not 0. This should report
the correct value on 965 now. Other DRI drivers may also need updating if
their MaxVertexTextureImageUnits != 0 (for example, if using the sw vertex
pipeline).
It's not clear to me if there's going to be a valid value for this
limit other than MaxTextureImageUnits + MaxVertexTextureImageUnits (+
MaxGeometryTextureImageUnits eventually). If not, then we should probably
just move this into the core at Get time.
Bug #25518 (wine regression). Fixes piglit vp-combined-image-units.
915_context.c
|
| 6785d6741db987469293d737e9b18f94d189b62e |
19-Dec-2009 |
Eric Anholt <eric@anholt.net> |
i915: Fix GL_TEXTURE_MAX_LEVEL support (piglit levelclamp test).
915_texstate.c
|
| b51e0fafdf6a39df1b0d1208595c92d5fa9ceba6 |
19-Dec-2009 |
Eric Anholt <eric@anholt.net> |
i915: Clean up some unnecessary x/y miptree code.
The base of the texture is always the base of the miptree. If it wasn't,
we'd have issues with this code due to miptrees not walking the same
direction for all LODs.
915_texstate.c
|
| 06d3732a9094030fc33120f16f162e0d405f132c |
01-Dec-2009 |
Keith Whitwell <keithw@vmware.com> |
Merge commit 'origin/mesa_7_7_branch'
Conflicts:
src/gallium/drivers/svga/svga_screen_texture.c
src/gallium/state_trackers/xorg/xorg_composite.c
src/gallium/state_trackers/xorg/xorg_exa.c
src/gallium/state_trackers/xorg/xorg_renderer.c
src/gallium/state_trackers/xorg/xorg_xv.c
src/mesa/main/texgetimage.c
src/mesa/main/version.h
|
| 650e02003fbb5511ec758d993b7ec0a302ee2235 |
01-Dec-2009 |
Ian Romanick <ian.d.romanick@intel.com> |
Merge branch 'mesa_7_6_branch' into mesa_7_7_branch
Conflicts:
progs/util/shaderutil.c
src/mesa/drivers/dri/r600/r600_context.c
src/mesa/main/version.h
|
| 587a52e95bbe96788e8b96b63f091bb3022fc048 |
30-Nov-2009 |
Ian Romanick <ian.d.romanick@intel.com> |
i915: Actually put i915PointParameterfv in the driver function table. Duh.
915_state.c
|
| 533b7660073f2c1cd1a19105d4989ec11bfdcd87 |
30-Nov-2009 |
Ian Romanick <ian.d.romanick@intel.com> |
i915: Fallback bit define missed on previous commit
915_context.h
|
| 718f31b830b2c4edad8b7e04804ff23e1db93e5a |
30-Nov-2009 |
Ian Romanick <ian.d.romanick@intel.com> |
i915: Round point sizes instead of truncate.
915_state.c
|
| d8d49716cf5d5cabebadc32d7717eec787c75ff1 |
30-Nov-2009 |
Ian Romanick <ian.d.romanick@intel.com> |
i915: Enable point sprite coordinate generation
Support still isn't completely correct, but it's better. piglit
point-sprite now passes. However, glean's pointSprite test fails. In
that test the texture on the sprite is somehow inverted as though
GL_POINT_SPRITE_COORD_ORIGIN were set to GL_LOWER_LEFT. i915 hardware
shouldn't be able to do that!
I believe there are also problems when not all texture units have
GL_COORD_REPLACE set. The hardware enable seems to be all or nothing.
Fixes bug #25313.
915_state.c
|
| ee64347979b4e22976910cb97869887f7de4241c |
18-Nov-2009 |
Eric Anholt <eric@anholt.net> |
intel: Remove our special color packing macros and just use colormac.h.
830_texstate.c
915_texstate.c
|
| a376e5c48237be0300bce6702ed947086d3ee23f |
18-Nov-2009 |
Eric Anholt <eric@anholt.net> |
intel: Consistently use no_batch_wrap in intel_context struct.
830_vtbl.c
915_vtbl.c
|
| cc39fcad89db2a4fc96b64915d42e5b1ac59d345 |
18-Nov-2009 |
Eric Anholt <eric@anholt.net> |
i915: Remove dead meta_draw_quad code.
ntel_tris.c
|
| df582ca767a38f185f9b4c449e7ed4266c414ae2 |
18-Nov-2009 |
Eric Anholt <eric@anholt.net> |
tnl: Replace deprecated TexCoordPtr with AttribPtr[_TNL_ATTRIB_TEX*]
830_vtbl.c
915_fragprog.c
|
| 8e0f40d28777f1ae599a95312788fe29a0515a0d |
04-Nov-2009 |
Eric Anholt <eric@anholt.net> |
intel: Use PIPE_CONTROL on gen4 hardware for doing pipeline flushing.
This should do all the things that MI_FLUSH did, but it can be pipelined
so that further rendering isn't blocked on the flush completion unless
necessary.
830_vtbl.c
915_vtbl.c
|
| bcbfda71b03303d3f008a6f3cf8cb7d9667bf8d2 |
02-Nov-2009 |
Brian Paul <brianp@vmware.com> |
intel: avoid unnecessary front buffer flushing/updating
Before, if we just called glXMakeCurrent() and didn't render anything we'd
still trigger a flushFrontBuffer() call.
Now only set the intel->front_buffer_dirty field at state validation time
just before we draw something.
NOTE: additional calls to intel_check_front_buffer_rendering() might be
needed if I missed some rendering paths.
ntel_tris.c
|
| 4a253431abf43a0638afb43605b44a8742b72a60 |
30-Oct-2009 |
Brian Paul <brianp@vmware.com> |
intel: update intel_create_renderbuffer(format), add XRGB support
Pass a gl_format to intel_create_renderbuffer() instead of GLenum.
Add cases for MESA_FORMAT_XRGB8888 textures and renderbuffers.
However, we don't yet create any renderbuffers or textures with that
format. It seems the default alpha value is zero instead of one.
Need to investigate that first.
830_texstate.c
830_vtbl.c
915_texstate.c
915_vtbl.c
|
| 8a9afe71b8d89a2a967cb37f5b5b00d86de387bc |
29-Oct-2009 |
Eric Anholt <eric@anholt.net> |
i915: Fix 1D texture mapping in the t coordinate.
Fixes piglit tex1d-2dborder test.
915_texstate.c
|
| 4b377ae292f75645ef356bd3bfac407230faf73a |
29-Oct-2009 |
Eric Anholt <eric@anholt.net> |
i915: Correct and make use of the defines for 32-bit depth texture modes.
Previously, S8_Z24 depth textures would always be treated as intensity.
Fixes piglit depth-tex-modes.
915_reg.h
915_texstate.c
|
| f8f40b53a6a4551630e25bfd7f6e12334bb0f3f8 |
29-Oct-2009 |
Eric Anholt <eric@anholt.net> |
i915: Implement min/max LOD clamping with the hardware.
This gets us expected behavior for clamping between mipmap levels, and
avoids relayout of textures for doing clamping.
Fixes piglit lodclamp-between.
915_texstate.c
|
| 1f196b786d6bd0c6a5dbdc638574ff716cc3d4de |
29-Oct-2009 |
Brian Paul <brianp@vmware.com> |
Merge branch 'texformat-rework'
Conflicts:
src/mesa/drivers/dri/radeon/radeon_fbo.c
src/mesa/drivers/dri/s3v/s3v_tex.c
src/mesa/drivers/dri/s3v/s3v_xmesa.c
src/mesa/drivers/dri/trident/trident_context.c
src/mesa/main/debug.c
src/mesa/main/mipmap.c
src/mesa/main/texformat.c
src/mesa/main/texgetimage.c
|
| 4f9f5a78408dbd86b2f9c25ee8a15581b9122fcc |
27-Oct-2009 |
Eric Anholt <eric@anholt.net> |
i915: Fix driver for the miptree x/y offset changes.
Bug #24734.
830_texstate.c
915_texstate.c
|
| 70b17db918a2784296434877a43b4c4036be792a |
27-Oct-2009 |
Eric Anholt <eric@anholt.net> |
i915: Fix driver for the miptree x/y offset changes.
Bug #24734.
830_texstate.c
915_texstate.c
|
| ab9d1011f5549502a4b960c2067cde69856a2719 |
23-Oct-2009 |
Brian Paul <brianp@vmware.com> |
Merge branch 'mesa_7_6_branch'
|
| ea659f891740fab1943eca219ffbdd5ed3d1906c |
23-Oct-2009 |
Brian Paul <brianp@vmware.com> |
intel: Fallback field is a bitmask, use GLbitfield
ntel_tris.c
|
| 3c685608664900562919136fbc33ac16060a27c3 |
22-Oct-2009 |
Brian Paul <brianp@vmware.com> |
i915: replace MESA_FORMAT_Z24_S8 with MESA_FORMAT_S8_Z24
And change parameter type.
915_texstate.c
|
| f094b86bb5ab93aedc03df5cf5bdf51ab9d37045 |
16-Oct-2009 |
Brian Paul <brianp@vmware.com> |
mesa: lift default symlinks target into Makefile.template
Driver Makefiles can still add symlink dependencies/rules if needed.
akefile
|
| e6594a22f298833eeb6881795b24d03d2fd8e898 |
13-Oct-2009 |
Brian Paul <brianp@vmware.com> |
intel: pass zslice to intel_miptree_image_offset()
This lets us get rid of intel_miptree_depth_offsets() and simplify all
of the calling code.
830_texstate.c
915_texstate.c
|
| 45e76d2665b38ba3787548310efc59e969124c01 |
09-Oct-2009 |
Brian Paul <brianp@vmware.com> |
mesa: remove a bunch of gl_renderbuffer fields
_ActualFormat is replaced by Format (MESA_FORMAT_x).
ColorEncoding, ComponentType, RedBits, GreenBits, BlueBits, etc. are
all replaced by MESA_FORMAT_x queries.
915_texstate.c
|
| 3e34a2a2b97e7c93955deedb7c12b73bccd6662d |
06-Oct-2009 |
Brian Paul <brianp@vmware.com> |
drivers: don't include texformat.h
And remove other unneeded #includes while we're at it.
830_texblend.c
830_texstate.c
830_vtbl.c
915_texstate.c
915_vtbl.c
|
| 862a2a55b35d1dec9224b025a6e7a0cf8593a6a7 |
29-Jul-2009 |
Eric Anholt <eric@anholt.net> |
i915: Add optional support for ARB_fragment_shader under a driconf option.
Other vendors have enabled ARB_fragment_shader as part of OpenGL 2.0
enablement even on hardware like the 915 with no dynamic branching or
dFdx/dFdy support. But for now we'll leave it disabled because we don't
do any flattening of ifs or loops, which is rather restrictive.
This support is not complete, and may be unstable depending on your shaders.
It passes 10/15 of the piglit glsl tests, but hangs on glean glsl1.
915_fragprog.c
|
| 67f4d626d39f2c340fa1632d3e4344c547301508 |
30-Jul-2009 |
Eric Anholt <eric@anholt.net> |
i915: Add support or fallbacks for GLSL fragment shader opcodes.
915_fragprog.c
|
| f9f31b25740887373806cb489e5480dc9b261805 |
01-Oct-2009 |
Eric Anholt <eric@anholt.net> |
i915: Add support for varying inputs.
915_context.c
915_fragprog.c
|
| 7d4b7460b0e565d0574c00d1d40c426cfebc290d |
29-Jul-2009 |
Eric Anholt <eric@anholt.net> |
i915: Enable ARB_vertex_shader for both i915 and i830.
Since the TNL is all done in software anyway, it should be the same to
the user who's probably using ARB_vertex_program otherwise, but gives them
a nicer programming environment.
ntel_tris.c
|
| 96a3c69d48bb7c021181e061d010cca08198ae4c |
30-Jul-2009 |
Eric Anholt <eric@anholt.net> |
i915: Increase maximum program size to the hardware limits.
This fixes potential heap trashing if the program of choice exceeds limits,
and fixes the native instructions limit being lower than what can be
used by valid programs.
915_context.h
915_program.c
|
| 61b512c47c9888f3ff117faf3aceccfb52d59c3a |
30-Jul-2009 |
Eric Anholt <eric@anholt.net> |
i915: Update and translate the fragment program along with state updates.
Previously, we were doing it in the midst of the pipeline run, which gave
an opportunity to enable/disable fallbacks, which is certainly the wrong
time to be doing so. This manifested itself in a NULL dereference for PutRow
after transitioning out of a fallback during a run_pipeline in glean glsl1.
915_context.c
915_fragprog.c
915_program.c
915_program.h
|
| d6fbf87575a59e24c5d47b8b6b8700ee4583709b |
30-Jul-2009 |
Eric Anholt <eric@anholt.net> |
Revert "i915: don't validate PS program when falling back to software"
This reverts commit e7044d552c6d16389447880b8744a51de1cf0199. It
prevented the driver from ever recovering from a software fallback due
to a program error. The original bug it claimed to fix doesn't appear to
exist post-revert.
915_vtbl.c
|
| 4ff816751f74b0645c198372937eec589c458a60 |
30-Jul-2009 |
Eric Anholt <eric@anholt.net> |
i915: Bail when the fragment program has too many total instructions.
Previously, we'd go trashing the heap.
915_program.c
|
| 994d1db079b4947e6f10ab22a4b366a676382345 |
30-Jul-2009 |
Eric Anholt <eric@anholt.net> |
i915: Let i915_program_error take a format string, and don't use _mesa_problem.
It's misleading to report things like the program having too many native
instructions as a Mesa implementation error, when the program may just be
too big for the hardware.
915_fragprog.c
915_program.c
915_program.h
|
| 1f7c914ad0beea8a29c1a171c7cd1a12f2efe0fa |
01-Oct-2009 |
Brian Paul <brianp@vmware.com> |
mesa: replace gl_texture_format with gl_format
Now gl_texture_image::TexFormat is a simple MESA_FORMAT_x enum.
ctx->Driver.ChooseTexture format also returns a MESA_FORMAT_x.
gl_texture_format will go away next.
830_texstate.c
830_vtbl.c
915_texstate.c
915_vtbl.c
|
| e885cb48a0b9292b3df9204f1c2783bf1fe29a28 |
28-Sep-2009 |
Eric Anholt <eric@anholt.net> |
intel: Drop my generatemipmap code in favor of the new shared code.
akefile
ntel_generatemipmap.c
|
| afd6141934a0fb52fc1739a2a9992db3ac34682b |
01-Sep-2009 |
Eric Anholt <eric@anholt.net> |
intel: Add support for ARB_sync.
We currently weasel out of supporting the timeout parameter, but otherwise
this extension looks ready, and should make the common case happy.
akefile
/external/mesa3d/src/mesa/drivers/dri/intel/intel_syncobj.c
|
| c2ef10803d6c30e13f8f762cc874e3bccc8a2881 |
28-Aug-2009 |
Eric Anholt <eric@anholt.net> |
i915: Fix undefined symbol as of eabe12df44a41e97fb5736959e8864ddbd01be14
915_context.c
|
| eabe12df44a41e97fb5736959e8864ddbd01be14 |
24-Aug-2009 |
Ian Romanick <ian.d.romanick@intel.com> |
ARB prog: Change handling of program parameter limits
Several changes are made to program parameter limits. Several of the
non-NATIVE limits are set higher. All of the NATIVE limits are set to
zero in the core Mesa code. Each driver must set the actual value in
its context creation routine. If the NATIVE value remains zero, this
indicates that hardware shaders may not be supported.
Each of the preceeding changes matches the bahavior of Apple's shader
assembler, so it seems safe.
Finally, we limit the value of MaxEnvParams to be no greater than
MaxNativeAttribs. At least one case has been found where an
application does the wrong thing if MaxNativeAttribs < MaxEnvParams.
See also bugzilla #23490.
915_context.c
|
| de80eeea0eebf00ee678b1a0fbd5fe67b00a8636 |
04-Aug-2009 |
Eric Anholt <eric@anholt.net> |
intel: Add support for EXT_provoking_vertex.
830_context.h
830_reg.h
830_state.c
830_vtbl.c
915_context.c
915_context.h
915_reg.h
915_state.c
915_vtbl.c
|
| 246729162ccc7e2672aa6cc957053ce3a8975a2c |
29-Jul-2009 |
Eric Anholt <eric@anholt.net> |
i915: Add support for EXT_stencil_two_side and ATI_separate_stencil.
Passes tests/stencil_twoside and glean/stencil2.
915_context.c
915_context.h
915_reg.h
915_state.c
915_vtbl.c
|
| 94008088c1e6758a44a2f48c5a94db1f072d255a |
29-Jun-2009 |
Eric Anholt <eric@anholt.net> |
intel: Move note_unlock() implementation to the one place it's needed.
830_vtbl.c
915_vtbl.c
|
| 3927874d9c7fafb61651d0fc69547c8e010181f5 |
29-Jun-2009 |
Eric Anholt <eric@anholt.net> |
intel: Make LOCK_HARDWARE recursive to avoid hand-rolling recursiveness.
ntel_tris.c
|
| dcfe0d66bfff9a55741aee298b7ffb051a48f0d3 |
20-Jun-2009 |
Eric Anholt <eric@anholt.net> |
intel: Move intel_pixel_read.c to shared for use with i965.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_pixel_read.c
|
| b30dc2c66aeaad6661eef515a08a3da89aa07cb2 |
10-Jun-2009 |
Eric Anholt <eric@anholt.net> |
i915: Add an option for testing the effect of early Z in classic mode.
The early Z stuff is supposed to be unsafe without some more work in the
enable/disable path (in particular, how do we want to get it disabled on
the way out to the X Server?), but at the moment is 6% in OA.
915_reg.h
915_vtbl.c
|
| 1ba96651e12b3c74fb9c8f5a61b183ef36a27b1e |
03-Jun-2009 |
Eric Anholt <eric@anholt.net> |
intel: Add support for tiled textures.
This is about a 30% performance win in OA with high settings on my GM45,
and experiments with 915GM indicate that it'll be around a 20% win there.
Currently, 915-class hardware is seriously hurt by the fact that we use
fence regs to control the tiling even for 3D instructions that could live
without them, so we spend a bunch of time waiting on previous rendering in
order to pull fences off. Thus, the texture_tiling driconf option defaults
off there for now.
915_tex_layout.c
|
| 165ae5e2fb57bdb64b4cf01271b4effeb811f675 |
04-Jun-2009 |
Eric Anholt <eric@anholt.net> |
i915: Don't rely on fence regs when we don't have to.
We're on the way to telling the kernel about when we need fence regs on our
objects or not, and this will cut the number of places needing them.
830_reg.h
830_texstate.c
830_vtbl.c
915_reg.h
915_texstate.c
915_vtbl.c
|
| 1b6f7fb7d5a9756c97e2ac2f5390b0d2333acf55 |
04-Jun-2009 |
Eric Anholt <eric@anholt.net> |
i915: Remove some long-dead i830 code.
830_vtbl.c
|
| 0e83e8f51af07a3066519f169f07d9afbf23252e |
27-May-2009 |
Eric Anholt <eric@anholt.net> |
i915: Restore the Viewport and DepthRange functions on 8xx.
Fixes failed viewport updates on glxgears (and other apps) resize since
e41780fedc2c1f22b43118da30a0103fa68b769f.
Bug #20473.
830_state.c
|
| b197a8ade3e1e6c67743111f12f27e0a4a985cd9 |
12-May-2009 |
Steinar H. Gunderson <sgunderson@bigfoot.com> |
i915: Fix 945 cube map layout for the small mipmaps along the bottom.
Bug #21691.
915_tex_layout.c
|
| 5c5a46884899ea25cdf25545d6ab3d9a74eafa3a |
15-May-2009 |
Eric Anholt <eric@anholt.net> |
i915: Only use the new 945 cube layout for compressed textures.
The docs actually explain this, but not in a terribly clear manner.
This nearly fixes the piglit cubemap testcase, except that something's
going wrong with the nearest filtering at 2x2 sizes in the testcase.
Looks good by visual inspection, though.
Bug #21692
915_tex_layout.c
|
| 0fc5fa85bf858ba2ad88995f65cc48b2dab1298d |
12-May-2009 |
Eric Anholt <eric@anholt.net> |
i915: Fix driver after HW glGenerateMipmap commit.
akefile
|
| 1d663ae2925ffadf419ddbea9eca8d5706ea6510 |
08-May-2009 |
Eric Anholt <eric@anholt.net> |
intel: Add a metaops version of glGenerateMipmapEXT/SGIS_generate_mipmaps.
In addition to being HW accelerated, it avoids the incorrect
(black) rendering of the mipmaps that SW was doing in fbo-generatemipmap.
Improves the performance of the mipmap generation and drawing in
fbo-generatemipmap by 30%.
ntel_generatemipmap.c
|
| b9196c1fa39dd566c5d7ab340e353b77714edb5f |
01-May-2009 |
Brian Paul <brianp@vmware.com> |
Merge branch 'const-buffer-changes'
Conflicts:
src/mesa/drivers/dri/i965/brw_curbe.c
src/mesa/drivers/dri/i965/brw_vs_emit.c
src/mesa/drivers/dri/i965/brw_wm_glsl.c
|
| ae69a046505d8c94cd3a59a9376310a904c35b3c |
23-Apr-2009 |
Roland Scheidegger <sroland@vmware.com> |
i915: fix fix for anisotropic filtering
forgot to commit the changes to actually support 4x aniso filtering...
915_texstate.c
|
| 50853be894aa3edd1e9271f7d625f319209e340f |
22-Apr-2009 |
Roland Scheidegger <sroland@vmware.com> |
intel: fix max anisotropy supported
i915 actually supports up to 4 (according to header file - not tested),
i965 up to 16 (code already handled this but slightly broken), so don't use 2
for all chips, even though angular dependency is very high.
830_context.c
915_context.c
|
| a36dd5d54e3de5662c694e764d1c49795ddb6814 |
22-Apr-2009 |
Brian Paul <brianp@vmware.com> |
i915: check the new _NEW_PROGRAM_CONSTANT flag
915_context.c
|
| eb0d46490332091b2ee247f32a1f08a04e1fe00f |
17-Apr-2009 |
Brian Paul <brianp@vmware.com> |
Merge branch 'register-negate'
|
| f17ea143cbe214eb4b249b56264a378f839dc3a6 |
16-Apr-2009 |
Eric Anholt <eric@anholt.net> |
i915: Remove dead i830TexEnv and i915TexEnv.
These LOD bias updates are covered by the texture state uploads in
*_texstate.c now.
akefile
830_context.c
830_tex.c
915_context.c
915_tex.c
|
| 2c30fd84dfa052949a117c78d932b58c1f88b446 |
10-Apr-2009 |
Eric Anholt <eric@anholt.net> |
intel: Add support for argb1555, argb4444 FBOs and fix rgb565 fbo readpixels.
Also enable them all regardless of screen bpp, as 32 bpp what I've been
testing against, and haven't been able to detect any screen bpp-specific
troubles with them.
830_vtbl.c
915_vtbl.c
|
| bbae8791d148d275632dfc8e105aa2df52820468 |
10-Apr-2009 |
Eric Anholt <eric@anholt.net> |
i915: Use DEBUG_WM (like 965) for printing the fragment program out.
This is nice when paired with INTEL_DEBUG=batch for debugging what's going
out to the hardware.
915_fragprog.c
|
| 7db7ff878d3e5a6b345228e6eaee4797bb68b360 |
15-Apr-2009 |
Brian Paul <brianp@vmware.com> |
mesa: merge the prog_src_register::NegateBase and NegateAbs fields
There's really no need for two negation fields. This came from the
GL_NV_fragment_program extension. The new, unified Negate bitfield applies
after the absolute value step.
915_fragprog.c
|
| 79c55e55f808d77cb0dff7cda826719d5fda3c7d |
12-Mar-2009 |
Brian Paul <brianp@vmware.com> |
dri: use BorderColor instead of _BorderChan
830_texstate.c
915_texstate.c
|
| 66175aac7609ad314f25fbdff0d3958af310dc24 |
18-Mar-2009 |
Eric Anholt <eric@anholt.net> |
Fix DRI2 accelerated EXT_texture_from_pixmap with GL_RGB format.
This requires upgrading the interface so that the argument to
glXBindTexImageEXT isn't just dropped on the floor. Note that this only
fixes the accelerated path on Intel, as Mesa's texture format support is
missing x8r8g8b8 support (right now, GL_RGB textures get uploaded as a8r8gb8,
but in this case we're not doing the upload so we can't really work around it
that way).
Fixes bugs with compositors trying to use shaders that use alpha channels, on
windows without a valid alpha channel. Bug #19910 and likely others as well.
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
830_texstate.c
915_texstate.c
|
| 6b9c1446b35cb33d73bd8ea7aeed8d219d0a9989 |
13-Mar-2009 |
Brian Paul <brianp@vmware.com> |
i915: move declarations before code
830_vtbl.c
ntel_tris.c
|
| 34683150878e0af0859c94d0c1f0c4bf8395b042 |
05-Mar-2009 |
Robert Ellison <papillo@vmware.com> |
i965: add software fallback for conformant 3D textures and GL_CLAMP
The i965 hardware cannot do GL_CLAMP behavior on textures; an earlier
commit forced a software fallback if strict conformance was required
(i.e. the INTEL_STRICT_CONFORMANCE environment variable was set) and
2D textures were used, but it was somewhat flawed - it could trigger
the software fallback even if 2D textures weren't enabled, as long
as one texture unit was enabled.
This fixes that, and adds software fallback for GL_CLAMP behavior with
1D and 3D textures.
It also adds support for a particular setting of the INTEL_STRICT_CONFORMANCE
environment variable, which forces software fallbacks to be taken *all*
the time. This is helpful with debugging. The value is:
export INTEL_STRICT_CONFORMANCE=2
ntel_tris.c
|
| 8d475822e6e19fa79719c856a2db5b6a205db1b9 |
28-Feb-2009 |
Brian Paul <brianp@vmware.com> |
mesa: rename, reorder FRAG_RESULT_x tokens
s/FRAG_RESULT_DEPR/FRAG_RESULT_DEPTH/
s/FRAG_RESULT_COLR/FRAG_RESULT/COLOR/
Remove FRAG_RESULT_COLH (NV half-precision) output since we never used it.
Next, we might merge the COLOR and DATA outputs (COLOR0, COLOR1, etc).
915_fragprog.c
|
| 60953059ea2319eae4d737831824dbce08ee1725 |
11-Feb-2009 |
Eric Anholt <eric@anholt.net> |
intel: Clean up several 965 memory leaks on context destroy.
830_context.c
915_context.c
|
| 4b37b1129ea7fed915d353c39d4b74dbdbb7f0a5 |
29-Jan-2009 |
Brian Paul <brianp@vmware.com> |
i915: updated render to texture/fbo test
915_state.c
|
| ac0dfbdf0f5e5dea08ec717ae8c4e1e141b15c05 |
30-Jan-2009 |
Eric Anholt <eric@anholt.net> |
i915: Only call CalcViewport from DrawBuffers instead of Viewport.
This saves an inadvertent round-trip to the X Server on DrawBuffers, which was
hurting some metaops.
915_state.c
|
| bc968e515dff20fc3cbcd01066886ba66f707a1b |
30-Jan-2009 |
Ian Romanick <ian.d.romanick@intel.com> |
Remove stale symlinks to intel/intel_depthstencil.c
ntel_depthstencil.c
|
| 425c803c039735aaaeb70f1613268fd4909862dc |
28-Jan-2009 |
Ian Romanick <idr@freedesktop.org> |
intel: Fix up some extension string issues
Move the remaining extension string enables to intel_extensions.c.
Make sure that GL_NV_texture_env_combine4 is not enabled on i830.
915_context.c
|
| 8aa209c766b79144db499063dd1c8482562b07bf |
28-Jan-2009 |
Ian Romanick <idr@freedesktop.org> |
Make GL_ARB_draw_buffers mandatory
Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
830_context.c
915_context.c
|
| 3cf7f9887ae9f26c006f88071cd69343e2c591e4 |
27-Jan-2009 |
Brian Paul <brianp@vmware.com> |
i915: rename some functions
915_state.c
|
| d0c8ed73cc6f2b08906a18a8d60e3bc364e5e48f |
27-Jan-2009 |
Brian Paul <brianp@vmware.com> |
intel: replace i915/intel_state.c and i965/intel_state.c with shared file
/external/mesa3d/src/mesa/drivers/dri/intel/intel_state.c
|
| 69fd665b6491ece8c948784014ab52839c3aeb8b |
27-Jan-2009 |
Brian Paul <brianp@vmware.com> |
intel: whitespace changes
/external/mesa3d/src/mesa/drivers/dri/intel/intel_state.c
|
| 84c8b5bbf980deea6322009354c3331dc5d5eb57 |
27-Jan-2009 |
Brian Paul <brianp@vmware.com> |
intel: move some driver functions around
A step toward consolidating i915/intel_state.c and i965/intel_state.c
915_state.c
/external/mesa3d/src/mesa/drivers/dri/intel/intel_state.c
|
| 4006c5e4526a1cdb910500764590e39d32750967 |
26-Jan-2009 |
Brian Paul <brianp@vmware.com> |
intel: move intelInitExtensions() and related code into new intel_extensions.c
akefile
/external/mesa3d/src/mesa/drivers/dri/intel/intel_extensions.c
|
| 4451eb2e7533a41f67ed21d05a8d9ab5efec77e9 |
26-Jan-2009 |
Brian Paul <brianp@vmware.com> |
intel: move glClear-related code into new intel_clear.c file
akefile
ntel_clear.c
|
| 6fcebbe719eab1f8e292c8dcd6c3e898b0f8d261 |
26-Jan-2009 |
Brian Paul <brianp@vmware.com> |
intel: Move swap-related functions from intel_buffers.c to new intel_swapbuffers.c
akefile
ntel_swapbuffers.c
|
| f8a7e497acf17cfdefe401815c7063aaf39d4200 |
22-Jan-2009 |
Brian Paul <brianp@vmware.com> |
intel: remove/disable the "paired depth/stencil" code
We only allow combined depth+stencil renderbuffers so the complicated code
for splitting and combining separate depth and stencil buffers is no longer
needed.
akefile
|
| b8bd0b0ddc357f9b430bb6ddeb60c5a2179d3791 |
13-Jan-2009 |
Eric Anholt <eric@anholt.net> |
i915: Add decode for PS in batchbuffers.
915_fragprog.c
|
| 194d039f1efee0e666c2d1b1116fd5adea8cb942 |
21-Jan-2009 |
Kristian Høgsberg <krh@redhat.com> |
[intel] Remove remaining references to intel_wait_flips().
Oops.
ntel_tris.c
|
| 8fb727548a652c47d8cf9593e2ae412ef2040119 |
07-Jan-2009 |
Eric Anholt <eric@anholt.net> |
mesa: Remove _Active and _UseTexEnvProgram flags from fragment programs.
There was a note in state.c about _Active deserving to die, and there were
potential issues with it due to i965 forgetting to set _UseTexEnvProgram.
Removing both simplifies things.
Reviewed-by: Brian Paul <brianp@vmware.com>
915_context.c
915_state.c
|
| 0c4346e63258bcaaae6f3045bc44d0e24073dd0e |
30-Dec-2008 |
Xiang, Haihao <haihao.xiang@intel.com> |
intel: disable ATI_texture_env_combine3 for i830( and related device).
Thanks to Eric for pointing it out.
915_context.c
|
| 129b6bc4e33257dd27aa9b50c6fa934ccb14376e |
24-Dec-2008 |
Xiang, Haihao <haihao.xiang@intel.com> |
i915: separate the fog term from the specular color term.
Previously fog parameter and specular color are packed into the
same dword. Note specular color should be packed in BGRA for device,
so if fog parameter and specular color all are present, fog parameter
will dirty the alpha term of specular color. This fixes rendering
issue when playing 'Yo Frankie' on 915/945.
915_fragprog.c
|
| cb453244caa15342bf229ee5ae16a78d038b8bdc |
17-Dec-2008 |
Xiang, Haihao <haihao.xiang@intel.com> |
i915: check WRAP_T instead of WRAP_R for cube map texture.
915_texstate.c
|
| df73363ed1aa34cc0dc5feefb3933309591fa015 |
18-Dec-2008 |
Xiang, Haihao <haihao.xiang@intel.com> |
i915: fix abort issue. (bug #19147)
830_vtbl.c
915_vtbl.c
|
| c8b505d8260cccf289c947c629471df8f5c81c0d |
11-Dec-2008 |
Xiang, Haihao <haihao.xiang@intel.com> |
i915: fallback for cube map texture.
The i915 (and related graphics cores) only support TEXCOORDMODE_CLAMP and
TEXCOORDMODE_CUBE when using cube map texture coordinates, so fall back to
software rendering for other modes to avoid potential gpu hang issue. This
fixes scorched3d issue on 945GM(see bug 14539).
915_texstate.c
|
| cd031749a75883a6fbf8fb7bf989b77a7c705819 |
28-Nov-2008 |
Dave Airlie <airlied@redhat.com> |
intel: restore old vertex submit paths for i8xx hardware.
Intel docs state that only 830/845 have VBOs, 855/865 don't. So
lets just not use them on i8xx at all.
This restores the old pre-vbo code and uses it on all 8xx hw.
ntel_render.c
ntel_tris.c
|
| 2adef553f2549e30b4a1894e7f9077ac339ea61c |
14-Nov-2008 |
Eric Anholt <eric@anholt.net> |
i915: Don't overwrite i915's Viewport function from generic code.
Instead, have i965 and i915 both call the generic function from their Viewport.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_state.c
|
| 1412ca0be24461cad36de865851484464fac3bfe |
20-Nov-2008 |
airlied <airlied@unused-12-215.bne.redhat.com> |
intel: fix i830 comment + backwards VB offsets.
According to Keith the docs have these offsets the other way around
ntel_tris.c
|
| 0cade4de4f74f6b0e86fb6622e2fc370c73fd840 |
20-Oct-2008 |
Eric Anholt <eric@anholt.net> |
intel: Don't keep intel->pClipRects, and instead just calculate it when needed.
This avoids issues with dereferencing stale cliprects around intel_draw_buffer
time. Additionally, take advantage of cliprects staying constant for FBOs and
DRI2, and emit cliprects in the batchbuffer instead of having to flush batch
each time they change.
830_context.h
830_vtbl.c
915_context.h
915_vtbl.c
|
| b4bf9acc32ac8693b1fdf80f351523a468ba6bd1 |
21-Oct-2008 |
Xiang, Haihao <haihao.xiang@intel.com> |
i915: fix carsh in i830_emit_state. (bug #17766)
830_vtbl.c
|
| c238098bbcfb644ea01b33d3274b949d84822512 |
13-Oct-2008 |
Xiang, Haihao <haihao.xiang@intel.com> |
i915: Texture instructions use r/t/oC/oD register as texture coordinate.
Fix http://bugs.freedesktop.org/show_bug.cgi?id=16287.
915_program.c
|
| 9aec1288eeae8e87adc9a99f377be536892941b2 |
09-Oct-2008 |
Eric Anholt <eric@anholt.net> |
i915: Accelerate depth textures with border color.
The fallback was introduced to fix bug #16697, but made the test it was
fixing run excessively long.
915_texstate.c
|
| 91d0020eecb78ef2984fd0afafc5d555c0e957d8 |
05-Oct-2008 |
Eric Anholt <eric@anholt.net> |
i915: Refine the texture indirect lookup accounting.
Without this, we would reject programs which sampled multiple times from
registers defined in the same phase (block of instructions with the same
texture indirection count), as each sample would count as a new phase
beginning. Instead, keep track of which phases registers were written in,
and only bump phase when we're reading from one generated in this phase.
On the other hand, we failed to count oC or oD texture samples as being new
phases.
Bug #17865.
915_context.h
915_program.c
|
| 4741dbcbbc2514de370a760f4b78a17491014555 |
02-Oct-2008 |
Ian Romanick <ian.d.romanick@intel.com> |
Unify ARB_depth_texture and SGIX_depth_texture
The ARB extension is a superset of the older SGIX extension. Any
hardware that can support the SGIX version can also support the ARB
version. In Mesa, any driver that supports one also supports the
other. This unification just simplifies some bits of code.
915_context.c
|
| 7d99ddcb2bb09f1f54d91e6e20e42d217a5bccdf |
26-Sep-2008 |
Eric Anholt <eric@anholt.net> |
intel: Fix a number of memory leaks on context destroy.
830_vtbl.c
915_vtbl.c
|
| b9532f078a2fbf459b0403b6f656711f80ff83c2 |
21-Sep-2008 |
Eric Anholt <eric@anholt.net> |
i915: fix crash in flush_prim -> wait_flips -> flush_batch -> flush_prim.
ntel_tris.c
|
| ecadb51bbcb972a79f3ed79e65a7986b9396e757 |
18-Sep-2008 |
Brian Paul <brian.paul@tungstengraphics.com> |
mesa: added "main/" prefix to includes, remove some -I paths from Makefile.template
830_context.c
830_metaops.c
830_state.c
830_tex.c
830_texblend.c
830_texstate.c
830_vtbl.c
915_context.c
915_debug.c
915_fragprog.c
915_metaops.c
915_program.c
915_state.c
915_tex.c
915_tex_layout.c
915_texstate.c
915_vtbl.c
ntel_render.c
ntel_tris.c
ntel_tris.h
/external/mesa3d/src/mesa/drivers/dri/intel/intel_pixel_read.c
/external/mesa3d/src/mesa/drivers/dri/intel/intel_state.c
|
| 87ccb9504dfda502746c3a00eb607f1837dd265d |
13-Sep-2008 |
Guillaume Melquiond <guillaume.melquiond@gmail.com> |
i915: fix himask constant init for 64-bit build
915_debug.c
|
| 35fd72756a05463568d94862f4fcd234903e1204 |
08-Sep-2008 |
Eric Anholt <eric@anholt.net> |
intel: track move of bo_exec from drivers to bufmgr.
akefile
830_metaops.c
830_tex.c
830_texblend.c
915_metaops.c
915_tex.c
ntel_ioctl.c
/external/mesa3d/src/mesa/drivers/dri/intel/intel_pixel_read.c
|
| 3628185f566e178a12b493fb89abf52b4b281f99 |
06-Sep-2008 |
Eric Anholt <eric@anholt.net> |
intel: track bufmgr move to libdrm_intel and bufmgr_fake irq emit/wait change.
akefile
830_texstate.c
915_texstate.c
|
| 0adfd1021035e90995a25ec5f20b736e55075d92 |
04-Sep-2008 |
Xiang, Haihao <haihao.xiang@intel.com> |
intel: Fix depth_stencil texture.
915_texstate.c
|
| f75843a517bd188639e6866db2a7b04de3524e16 |
24-Aug-2008 |
Dave Airlie <airlied@linux.ie> |
Revert "Revert "Merge branch 'drm-gem'""
This reverts commit 7c81124d7c4a4d1da9f48cbf7e82ab1a3a970a7a.
akefile
830_context.c
830_reg.h
830_vtbl.c
915_context.c
915_reg.h
915_vtbl.c
ntel_bufmgr_ttm.c
ntel_render.c
ntel_tris.c
ntel_tris.h
/external/mesa3d/src/mesa/drivers/dri/intel/intel_pixel_read.c
|
| 7c81124d7c4a4d1da9f48cbf7e82ab1a3a970a7a |
24-Aug-2008 |
Dave Airlie <airlied@linux.ie> |
Revert "Merge branch 'drm-gem'"
This reverts commit 53675e5c05c0598b7ea206d5c27dbcae786a2c03.
Conflicts:
src/mesa/drivers/dri/i965/brw_wm_surface_state.c
akefile
830_context.c
830_reg.h
830_vtbl.c
915_context.c
915_reg.h
915_vtbl.c
ntel_bufmgr_ttm.c
ntel_render.c
ntel_tris.c
ntel_tris.h
/external/mesa3d/src/mesa/drivers/dri/intel/intel_pixel_read.c
|
| d2796939f18815935c8fe1effb01fa9765d6c7d8 |
08-Aug-2008 |
Eric Anholt <eric@anholt.net> |
intel-gem: Update to new check_aperture API for classic mode.
To do this, I had to clean up some of 965 state upload stuff. We may end
up over-emitting state in the aperture overflow case, but that should be rare,
and I'd rather have the simplification of state management.
830_vtbl.c
915_vtbl.c
ntel_tris.c
|
| 1e645b365900cf1c71ca5594bd6b549a1f203040 |
26-Jul-2008 |
Ian Romanick <ian.d.romanick@intel.com> |
Merge branch 'master' into drm-gem
Conflicts:
src/mesa/drivers/dri/common/dri_bufmgr.c
src/mesa/drivers/dri/i965/brw_wm_surface_state.c
|
| 29cb89d0c2cb17e2fa38563fc93794a6ebd75cf9 |
16-Jul-2008 |
Ian Romanick <ian.d.romanick@intel.com> |
intel: Clean-up ARB_texture_env_crossbar
Enable support for ARB_texture_env_crossbar in the master extension
list instead of in every single device-specific list.
830_context.c
915_context.c
|
| 946abd9b5a55f999ef21f807769f5fb81b10a426 |
14-Jul-2008 |
Eric Anholt <eric@anholt.net> |
i915: fix build after previous commit.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_pixel_read.c
|
| 75e4db18049f3284197c9a8deabd9dd74aa7920e |
09-Jul-2008 |
Xiang, Haihao <haihao.xiang@intel.com> |
i915: fall back to software rendering when shadow comparison is
enabled for 1D texture. fix #12176
915_texstate.c
|
| 93f701bc3619864ac6f067d37212e96545a57e16 |
26-Jun-2008 |
Eric Anholt <eric@anholt.net> |
intel: Replace sprinkled intel_batchbuffer_flush with MI_FLUSH or nothing.
Most of these were to ensure that caches got synchronized between 2d (or meta)
rendering and later use of the target as a source, such as for texture
miptree setup. Those are replaced with intel_batchbuffer_emit_mi_flush(),
which just drops an MI_FLUSH. Most of the remainder were to ensure that
REFERENCES_CLIPRECTS batchbuffers got flushed before the lock was dropped.
Those are now replaced by automatically flushing those when dropping the lock.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_pixel_read.c
|
| f6abe8f0f2fba3073b58b96ed38aae163c765b4a |
24-Jun-2008 |
Eric Anholt <eric@anholt.net> |
Merge commit 'origin/master' into drm-gem
|
| 744357e29c6a51b9e1770e0340eee5105f6b5585 |
24-Jun-2008 |
Eric Anholt <eric@anholt.net> |
intel: Same pixel function init for everyone now.
830_context.c
915_context.c
|
| eda68cccc072c10f94c096b9877d09a787069631 |
24-Jun-2008 |
Eric Anholt <eric@anholt.net> |
i915: Add support for accelerated glBitmap, shared from 965.
akefile
/external/mesa3d/src/mesa/drivers/dri/intel/intel_pixel_bitmap.c
|
| a42dac187973cbc17be6c59db89264cbc935ab91 |
24-Jun-2008 |
Eric Anholt <eric@anholt.net> |
i915: Accumulate the VB into a local buffer and subdata it in.
This lets GEM use pwrite, for an additional 4% or so speedup.
830_vtbl.c
915_vtbl.c
ntel_tris.c
ntel_tris.h
|
| 62d66caeba786f01f6159c980fda79606afe4c61 |
21-Jun-2008 |
Eric Anholt <eric@anholt.net> |
i915: Convert to using VBs instead of inline prims.
830_reg.h
830_vtbl.c
915_reg.h
915_vtbl.c
ntel_render.c
ntel_tris.c
ntel_tris.h
|
| bbe80af457316826f56ada767d26e8c1db7f1130 |
18-Jun-2008 |
Eric Anholt <eric@anholt.net> |
i915: Restore the accelerated PBO pixel path functions after GEM changes.
The fencing code is not required, and waiting on the fences defeated one of
the purposes of the extension, which is to allow asynchronous readpixels.
akefile
830_context.c
915_context.c
/external/mesa3d/src/mesa/drivers/dri/intel/intel_pixel_read.c
|
| 654258a4fe5e7114022c6e02f2844fc469fcc6f3 |
18-Jun-2008 |
Eric Anholt <eric@anholt.net> |
Merge commit 'origin/master' into drm-gem
|
| 64adeb163d7da6d75b5664cd2ee3783cadaf63d8 |
17-Jun-2008 |
Eric Anholt <eric@anholt.net> |
[intel] Fix no_rast option on non-965.
The no_rast fallback was getting partially overwritten by later TNL init,
resulting in a segfault when things were in a mixed-up state.
830_context.c
915_context.c
|
| 407ce3da3c53c9ebba0fbf827d7b0f610122d44b |
11-Jun-2008 |
Eric Anholt <eric@anholt.net> |
[intel-gem] Chase domain flag renaming in the DRM.
This is an API breakage only.
830_vtbl.c
915_vtbl.c
|
| 9e95fad02e1d8690deba91a8f30d722f039366ff |
04-Jun-2008 |
Xiang, Haihao <haihao.xiang@intel.com> |
i915: Fix GL_DEPTH_TEXTURE_MODE issue. (bug #16221)
915_texstate.c
|
| 4b5b008d54e86ac4f0a2176429d062100978ca8c |
03-Jun-2008 |
Eric Anholt <eric@anholt.net> |
[intel] Convert drivers to using libdrm bufmgr code.
akefile
ntel_bufmgr_fake.c
ntel_bufmgr_gem.c
ntel_bufmgr_ttm.c
|
| a74bf4ef345d880d7d296313fed0240781d2ebd8 |
23-May-2008 |
Eric Anholt <eric@anholt.net> |
Emit a flush after the swapbuffers blit, so contents end up on the screen.
Otherwise, since the MI_FLUSH at the end of every batch had been removed,
non-automatic-flushing chips (965) wouldn't get flushed and apps with static
rendering would get partial screen contents until the server's blockhandler
flush kicked in.
830_reg.h
915_reg.h
|
| ab50ddaa9173ae108833db0edb209045788efc41 |
07-May-2008 |
Eric Anholt <eric@anholt.net> |
GEM: Make dri_emit_reloc take GEM domain flags instead of TTM flags.
The GEM flags are much more descriptive for what we need. Since this makes
bufmgr_fake rather device-specific, move it to the intel common directory.
We've wanted to do device-specific stuff to it before.
akefile
830_vtbl.c
915_vtbl.c
ntel_bufmgr_fake.c
|
| 87ccc03736166db9ef85f3eee3723b82f395d3cf |
05-May-2008 |
Keith Packard <keithp@keithp.com> |
Add intel_bufmgr_gem.c to i915
ntel_bufmgr_gem.c
|
| 367b1e35dc1dbeda65709b0ab4f7983d0c7a6cc2 |
05-May-2008 |
Keith Packard <keithp@keithp.com> |
Temporarily disable intel pixel ops on i915 for GEM
Instead of attempting to fix these for GEM, just disable until GEM is
working.
akefile
830_context.c
915_context.c
|
| eb10cdc838fc31ea2cf59f556f6f7d8b072f5bae |
02-May-2008 |
Eric Anholt <eric@anholt.net> |
[intel] Fix build for GEM. TTM is now disabled, and fencing is gone.
Fencing was used in two places: ensuring that we didn't get too many frames
ahead of ourselves, and glFinish. glFinish will be satisfied by waiting on
buffers like we would do for CPU access on them. The "don't get too far ahead"
is now the responsibility of the execution manager (kernel).
akefile
|
| 6acb94f89e3314132190d235634a5e3423826757 |
02-May-2008 |
Eric Anholt <eric@anholt.net> |
[intel] Merge intel_ioctl.h. Not sure how this slipped by in the .c merge.
ntel_ioctl.h
|
| f2a6404ef39b4985788aaf9ec8b540704e5aa92b |
17-Apr-2008 |
Dave Airlie <airlied@redhat.com> |
i915: check for depth region before accounting its buffer size
fd.o bz #15573
915_vtbl.c
|
| 96338dd1470bb088cbbe50d629cd30175245a784 |
16-Apr-2008 |
Dave Airlie <airlied@panoply-rh.(none)> |
intel: fix _mesa_error ctx I introduced at lsat minute
830_vtbl.c
915_vtbl.c
|
| 7cc7ff7051d427ff45b4d7d3664e2eecd13d0e13 |
16-Apr-2008 |
Dave Airlie <airlied@panoply-rh.(none)> |
intel/fake_bufmgr: Attempt to restrict references to objects in a batchbuffer > aperture size.
So with compiz on Intel hw with fake bufmgr, opening 4 firefox windows at 1680x1050 and hitting alt-tab, could cause the batchbuffer to try and reference more than the 32MB of RAM allocated.
Fix 1:
Fix 1 is to pre-verify the list of buffers against the current batchbuffer and if it can't possibly fit in the aperture to flush the batchbuffer to the hardware
and try again. If the buffers still can't fit well then you are hosed as I'm not sure there is a nice way to tell anyone.
Fix 2:
Next problem was that even with a simple check for total < aperture, we ran
into fragmentation issues, this meant that half way down a set of buffers,
we would fail as no blocks were available. Fix this by nuking the memory
manager from orbit and letting it start again and relayout the blocks in a
manner that fits.
Fix 3:
Finally the initial problem we were seeing was a memcpy to a NULL backing store.
We seem to end up with a texture at some point that never gets mapped but ends up with data in it. compiz al-tab icons have this property. So I created a card dirty bit that memcpy's any buffer that is !static and is written to back to memory. This probably is wrong but it makes compiz work for now.
Caveats:
965 support is still fail.
915_vtbl.c
|
| d30d9e42b758db452bfdb482b619a5f4c6d01037 |
31-Mar-2008 |
Xiang, Haihao <haihao.xiang@intel.com> |
i915: texture object's lod bias. fix bug #15192
830_tex.c
830_texstate.c
915_tex.c
915_texstate.c
|
| d24a5254c2d4062017cad173eca15398cf4115bf |
26-Mar-2008 |
Zou Nan hai <nanhai.zou@intel.com> |
[i915] don't use 4x4 filter for 1D shadowmap
915_texstate.c
|
| 0e34dcc6dfb466537f0e74d6c267d2f8bf795b66 |
25-Mar-2008 |
Xiang, Haihao <haihao.xiang@intel.com> |
intel: fix the issue "VBO: Cannot allocate memory for a BO" on
965 after merging intel_context.c from i915 and i965. fix bug# 15152.
830_vtbl.c
915_vtbl.c
|
| 7233eabaf0072b7c50e4f26ec33738b5b89aad20 |
20-Mar-2008 |
Zou Nan hai <nanhai.zou@intel.com> |
[i915] GL_DEPTH_TEXTURE_MODE fix
915_texstate.c
|
| c62f504eb6030097b679233a75f87cca1b0e617d |
19-Mar-2008 |
Zou Nan hai <nanhai.zou@intel.com> |
[i915] fix fragment.position
ntel_tris.c
|
| b790b24ff9204eb6f305b14bd40bb903e65dd541 |
19-Mar-2008 |
Eric Anholt <eric@anholt.net> |
[i915] Bug #13634: Fix bugs in 945 cube mipmap layout.
The most egregious, and the one the bug report and failure in the cubemap
demo were about was introduced with intel_mipmap_pitch_align(), where a
"* 2" for the pitch calculation was lost. The base size < 32 case also
failed to align, which may have caused problems with render to texture.
Another bug would have broken 2x2/1x1 base mipmap levels by placing the
data where the hardware wouldn't look for it.
Other bugs remain with the layout of the small mipmap faces (hardware looks
for them in X,Y,Z,-X,-Y,-Z order along the bottom row, but we lay them out
X,-X,Y,-Y,Z,-Z).
915_tex_layout.c
|
| c2814f2a3fbfa0e4ba6c45347fcadd3722b005ff |
19-Mar-2008 |
Eric Anholt <eric@anholt.net> |
[i915] Add comments about how cube texture layout works.
915_tex_layout.c
|
| 45adf29ed0bd47e21bed824ab9afcc7b9dcbb60d |
19-Mar-2008 |
Eric Anholt <eric@anholt.net> |
[i915] Move miptree layout code into separate functions per target.
Also clean up some other miscellaneous formatting nits while I'm at it.
915_tex_layout.c
|
| 363d8785192e299963df520d53c221f494c8026c |
18-Mar-2008 |
Eric Anholt <eric@anholt.net> |
[945] Remove conditional in 945 3D mipmap layout checking for cube layout.
915_tex_layout.c
|
| f94d317d7aea8043b179a0ba64308606375500d7 |
14-Mar-2008 |
Xiang, Haihao <haihao.xiang@intel.com> |
intel: fix abort issue with shadowtex demo when use
DEPTH_STENCIL texture. (bug#14952).
915_texstate.c
|
| fcb7cb9e72ecac7c165a3a6ed7a033e2e6793a26 |
13-Mar-2008 |
Zou Nan hai <nanhai.zou@intel.com> |
[i965] multiple rendering target support
830_vtbl.c
915_vtbl.c
|
| 7381ccab449c65d843580f76426f87ab6b1649ce |
25-Feb-2008 |
Kristian Høgsberg <krh@redhat.com> |
intel: Add missing include file to silence last couple of warnings.
915_context.c
|
| 54bd506c0fcfd7dffa31bea22f3c0175ec41b9b0 |
25-Feb-2008 |
Kristian Høgsberg <krh@redhat.com> |
intel: Initialize color and spec arrays in LOCAL_VARS macro.
Avoids spamming compilation output with tons of warnings about
use of possibly uninitialized variables.
ntel_tris.c
|
| dd1d66fc4ab5d7064113a2017a431c3461598b91 |
23-Feb-2008 |
Kristian Høgsberg <krh@redhat.com> |
intel: Merge intel_context.c from i915 and i965.
830_context.c
915_context.c
ntel_render.c
|
| c99fa92ff84e927c82e1231d96921fda9a2b0852 |
22-Feb-2008 |
Kristian Høgsberg <krh@redhat.com> |
Merge {i915,i965}/intel_context.h as intel/intel_context.h
ntel_context.h
/external/mesa3d/src/mesa/drivers/dri/intel/intel_context.c
|
| 1c718c0d78cf4eae9e02b03a0abbec384db948a6 |
22-Feb-2008 |
Alan Hourihane <alanh@tungstengraphics.com> |
Use drm_i915_sarea instead of drmI830Sarea and remove i830_common.h
ntel_context.h
/external/mesa3d/src/mesa/drivers/dri/intel/intel_context.c
|
| 39bcbe0921e8a31b55ebee8726d2091fc5e0dd22 |
15-Feb-2008 |
Adam Jackson <ajax@redhat.com> |
Add E7221 variant to i915.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_context.c
|
| 7eef52e975e852207ee840c74cd822c8f8c90a01 |
15-Feb-2008 |
Xiang, Haihao <haihao.xiang@intel.com> |
i915: set fogcoord to (f,0,0,1). fix #10788 issue on 915.
915_fragprog.c
|
| c5c73c1b605611faf0f06df9b5d08d8984388238 |
21-Jan-2008 |
Kristian Høgsberg <krh@temari.boston.redhat.com> |
Hook up i915 driver to new DRI2 infrastructure.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_context.c
|
| 822b2481ffc0d3e2ca9d24e9443634af2760777c |
13-Feb-2008 |
Eric Anholt <eric@anholt.net> |
[intel] Fix 965 rendering with non-TTM by merging intel_ioctl between 915/965.
The 965 path wasn't setting pClipRects for batch submission since it didn't
want kernel cliprect handling before. The 915 path also grew the INTEL_NO_HW=1
option for testing just driver overhead.
ntel_context.h
ntel_ioctl.c
/external/mesa3d/src/mesa/drivers/dri/intel/intel_context.c
|
| 700a77fb48f364f85e013cf5fb68c04eb83317e7 |
07-Feb-2008 |
Eric Anholt <eric@anholt.net> |
[915] Fix COS function using same plan as SIN.
The previous COS function failed badly outside of [-pi/2, pi/2].
915_fragprog.c
|
| 2551a5ee80ab523006618c79766e2409b2a62d84 |
07-Feb-2008 |
Eric Anholt <eric@anholt.net> |
[915] Use a quartic term to improve the accuracy of SIN results.
This is described in the link in the comment, and is the same technique that
r300 uses.
915_fragprog.c
|
| d98abcbef0bd4200fc0fd30fc0524bf452df3572 |
06-Feb-2008 |
Eric Anholt <eric@anholt.net> |
[915] Fix fp SIN function, and use a quadratic approximation instead of Taylor.
The Taylor series notably fails at producing sin(pi) == 0, which leads to
discontinuity every 2*pi. The quadratic gets us sin(pi) == 0 behavior, at the
expense of going from 2.4% THD with working Taylor series to 3.8% THD (easily
seen on comparative graphs of the two). However, our previous implementation
was producing sin(pi) < -1 and worse, so any reasonable approximation is an
improvement. This also fixes the repeating behavior, where the previous
implementation would repeat sin(x) for x>pi as sin(x % pi) and the opposite
for x < -pi.
915_fragprog.c
|
| 46eb02b60920a920b782bacb15f01b44e18f888d |
22-Jan-2008 |
Kristian Høgsberg <krh@temari.boston.redhat.com> |
[intel] Clean up references to screen buffer metrics.
The screen wide info such as pitch and cpp are obsoleted by the FBO
changes, so clean up the last few references to those, except for
setting up the legacy screen regions.
830_state.c
915_state.c
|
| a0e453a5eca7ed4b57a7f4c1e418d368815e3957 |
17-Jan-2008 |
Eric Anholt <eric@anholt.net> |
[intel] Make the no_rast option be standard driconf instead of INTEL_NO_RAST.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_context.c
|
| 8517079cbcbbf31291b05420f3b776df712dfd47 |
14-Jan-2008 |
Eric Anholt <eric@anholt.net> |
[i915] Fix driver from cliprects changes, and clean up state emission.
The fix for pageflipping with cliprects ended up causing a batch flush at
an inopportune time, which is fixed by moving it up.
Additionally, the recovery code for handling batch wraps at bad times is
replaced by just checking for the space up front, and using a no_batch_wrap
assert like on 965 to make sure that we weren't wrong about how much space that
was.
830_vtbl.c
915_vtbl.c
ntel_context.h
ntel_tris.c
|
| ffa8b18c7cce5041d2006e669fe633156a6b2d05 |
15-Jan-2008 |
Eric Anholt <eric@anholt.net> |
[i915] Fix recursive lock hang in intelContendedLock handling.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_context.c
|
| a04b632350e5d0e9994fc667afc59407a39da0ba |
10-Jan-2008 |
Eric Anholt <eric@anholt.net> |
[intel] Add more cliprect modes to cover other meanings for batch emits.
The previous change gave us only two modes, one which looped over the batch
per cliprect (3d drawing) and one that didn't (state updeast).
However, we really want 4:
- Batch doesn't care about cliprects (state updates)
- Batch needs DRAWING_RECTANGLE looping per cliprect (3d drawing)
- Batch needs to be executed just once (region fills, copies, etc.)
- Batch already includes cliprect handling, and must be flushed by unlock time
(copybuffers, clears).
All callers should now be fixed to use one of these states for any batchbuffer
emits. Thanks to Keith Whitwell for pointing out the failure.
830_vtbl.c
915_vtbl.c
ntel_render.c
ntel_tris.c
/external/mesa3d/src/mesa/drivers/dri/intel/intel_context.c
|
| e131c46b20241737ceba4856dbe01dcca6dd2c03 |
09-Jan-2008 |
Kristian Høgsberg <krh@temari.boston.redhat.com> |
[intel] Simplify intelCreateBuffer() a bit.
Drop a bunch of unused arguments from intel_create_renderbuffer() and
introduce intel_renderbuffer_set_region() to set the region for
a renderbuffer.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_context.c
|
| 5f86ae057a645c03dc1e0c51c2fb1b2628a50e0a |
09-Jan-2008 |
Eric Anholt <eric@anholt.net> |
[intel] Rename lost_hardware vtbl entry to new_batch.
Both drivers have ended up relying on lost_hardware being called after each
batch buffer, so update the name. This removes one of the calls on 965 whic
h was outside of the batchbuffer handling code and just duplicating what had
already happened through batchbuffer handling.
830_vtbl.c
915_vtbl.c
ntel_context.h
ntel_ioctl.c
|
| beddf653a914903156712aa472b5deaddb7bbaed |
09-Jan-2008 |
Eric Anholt <eric@anholt.net> |
[intel] Clean up cliprect handling in intel drivers.
In particular, batch buffers are no longer flushed when switching from
CLIPRECTS to NO_CLIPRECTS or vice versa, and 965 just uses DRM cliprect
handling for primitives instead of trying to sneak in its own to avoid the
DRM stuff. The disadvantage is that we will re-execute state updates per
cliprect, but the advantage is that we will be able to accumulate larger
batch buffers, which were proving to be a major overhead.
ntel_tris.c
|
| 7ce12b0863f1cc03bdd7c65c0c0733b2ff903e40 |
09-Jan-2008 |
Eric Anholt <eric@anholt.net> |
[intel] Remove the dead intel->need_flush member.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_pixel_bitmap.c
|
| 3369cd9a6f943365242d7832e69788d4aede9a8f |
07-Jan-2008 |
Xiang, Haihao <haihao.xiang@intel.com> |
i915: Keith Whitwell's swizzling TEX patch. fix #8283
915_context.h
915_fragprog.c
915_program.c
915_program.h
|
| 601a6b872c33bfe3cb4ea03a5a8ba5ebe92dedaf |
07-Jan-2008 |
Brian <brian.paul@tungstengraphics.com> |
Replace gl_framebuffer's _ColorDrawBufferMask with _ColorDrawBufferIndexes
Each array element is now a BUFFER_x token rather than a BUFFER_BIT_x bitmask.
The number of active color buffers is specified by _NumColorDrawBuffers.
This builds on the previous DrawBuffer changes and will help with drivers
implementing GL_ARB_draw_buffers.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_context.c
|
| ff73c783cc47361ff0dd819c82d067b4b85870dd |
06-Jan-2008 |
Brian <brian.paul@tungstengraphics.com> |
Simplify ctx->_NumColorDrawBuffers, _ColorDrawBuffers and fix bug 13835.
These fields are no longer indexed by shader output. Now, we just have
a simple array of renderbuffer pointers.
If the shader writes to gl_FragData[i], send those colors to the N
_ColorDrawBuffers. Otherwise, replicate the single gl_FragColor (or
the fixed-function color) to the N _ColorDrawBuffers.
A few more changes and simplifications can follow from this...
/external/mesa3d/src/mesa/drivers/dri/intel/intel_state.c
|
| e7044d552c6d16389447880b8744a51de1cf0199 |
04-Jan-2008 |
Xiang, Haihao <haihao.xiang@intel.com> |
i915: don't validate PS program when falling back to software
rendering. fix #12786
915_vtbl.c
|
| 15653b5d88c0f88f49c2d5497b4fb9e045f53560 |
03-Jan-2008 |
Zou Nan hai <nanhai.zou@intel.com> |
fix fd.o bug #13761
MRD computation is now changed in mesa core
/external/mesa3d/src/mesa/drivers/dri/intel/intel_context.c
|
| 60d762aa625095a8c1f9597d8530bb5a6fa61b4c |
02-Jan-2008 |
Xiang, Haihao <haihao.xiang@intel.com> |
i915: Needn't adjust pixel centers. fix #12944
ntel_tris.c
/external/mesa3d/src/mesa/drivers/dri/intel/intel_state.c
|
| b422e5ad3716d32f2434ca38819f4a877c7eeeeb |
25-Dec-2007 |
Xiang, Haihao <haihao.xiang@intel.com> |
i915: apply commit a0a5e8cfc04c14873441b50f7d594ef11806b9a8 from 965.
fix #11925
915_texstate.c
ntel_context.h
/external/mesa3d/src/mesa/drivers/dri/intel/intel_state.c
|
| 26473140b9c5e6aa962961c836f79fd5aa6cd246 |
22-Dec-2007 |
Roland Scheidegger <sroland@tungstengraphics.com> |
fix GL_LINE_LOOP with drivers using own render pipeline stage (#12410, #13527)
primitive needs to include the begin/end flags (broken since vbo-0.2). Should
fix missing first/last line segment on gamma, i810, i915, mga, r200, radeon,
s3v, savage, unichrome (r300 already correct). Tested on r200, fixes #13527.
ntel_render.c
|
| 9e68e191ac9d32f2f93e840a66127e724b442756 |
20-Dec-2007 |
Eric Anholt <eric@anholt.net> |
[intel] Move some pixel path support from drivers to shared.
ntel_pixel.h
/external/mesa3d/src/mesa/drivers/dri/intel/intel_pixel.c
/external/mesa3d/src/mesa/drivers/dri/intel/intel_pixel_copy.c
/external/mesa3d/src/mesa/drivers/dri/intel/intel_pixel_draw.c
|
| f8830a1bf788909a18b6089eb159a38c19bf48d6 |
21-Dec-2007 |
Xiang, Haihao <haihao.xiang@intel.com> |
intel: cast a pointer to unsigned long, avoid potential error.
ntel_ioctl.c
|
| 101abee6c4fc2c9284ff2ba6f9f9138327d6963d |
19-Dec-2007 |
Eric Anholt <eric@anholt.net> |
[intel] Fix and reenable (software) SGIS_generate_mipmap
The core problem was that _mesa_generate_mipmap was not respecting RowStride
of the source image. Additionally, the intel private data associated with the
images (level and face) was not being initialized for the
_mesa_generate_mipmap-generated images.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_context.c
|
| fcd1e9dad6949e02380593a166432dbac311c80e |
20-Dec-2007 |
Eric Anholt <eric@anholt.net> |
[i915] Move meta_draw_quad into the vtbl with other meta operations.
ntel_context.h
ntel_tris.c
ntel_tris.h
/external/mesa3d/src/mesa/drivers/dri/intel/intel_pixel_copy.c
/external/mesa3d/src/mesa/drivers/dri/intel/intel_pixel_draw.c
|
| e54329233522591bbe8aad8a3fd6bcdc1e430f03 |
20-Dec-2007 |
Xiang, Haihao <haihao.xiang@intel.com> |
i915: avoid dead lock in intel_meta_draw_poly. fix #13696
ntel_tris.c
|
| 4878f12189c52e1cafe9240183d0e371a1f287d3 |
18-Dec-2007 |
Eric Anholt <eric@anholt.net> |
[915] Free dri_bufmgr after mesa context data.
Fixes a crash when buffer objects are left around until context destroy.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_context.c
|
| a856da63247a4b403f6350914f732e14d1530ed1 |
18-Dec-2007 |
Eric Anholt <eric@anholt.net> |
[915] Make polygon stipple use pre-unpacked pixel data.
This fixes a crash when stippling using data from a PBO.
915_state.c
|
| a183efc132c8db1bb42525ac177ffff96f69a59b |
18-Dec-2007 |
Keith Packard <keithp@keithp.com> |
[Intel] Centralize mipmap pitch computations.
mipmap pitches must account for the device alignment requirements, which
used to be fairly simple; just align to a 4-byte boundary. However, to allow
textures to be drawn to under TTM, they now need to be aligned to a 64-byte
boundary. Placing all of the alignment constraints in a single function
allows this new constraint to be applied uniformly.
There was some pitch constraining code in intel_miptree_create, but that was
modifying the pitch long after the miptree had been layed out, so it only
served to wreck the mipmap and cause rendering errors.
915_tex_layout.c
|
| dbfe05ca24d3b111482c079cc7a40da160b6074c |
14-Dec-2007 |
Eric Anholt <eric@anholt.net> |
[intel] Enable INTEL_DEBUG=bufmgr output in TTM mode as well as classic.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_context.c
|
| 7c71ef3a3d0cf2620525f468960cdc76a0fb0d33 |
12-Dec-2007 |
Eric Anholt <eric@anholt.net> |
[intel] Move bufmgr back to context instead of screen, fixing glthreads.
Putting the bufmgr in the screen is not thread-safe since the emit_reloc
changes. It also led to a significant performance hit from pthread usage
for the attempted thread-safety (up to 12% of a cpu spent on refcounting
protection in single-threaded 965). The motivation had been to allow
multi-context bufmgr sharing in classic mode, but it wasn't worth the cost.
ntel_context.h
ntel_ioctl.c
ntel_ioctl.h
/external/mesa3d/src/mesa/drivers/dri/intel/intel_context.c
/external/mesa3d/src/mesa/drivers/dri/intel/intel_pixel_copy.c
/external/mesa3d/src/mesa/drivers/dri/intel/intel_pixel_draw.c
|
| e3a6e60040b7f6ea7965e52f8f9881ed31e0347c |
08-Dec-2007 |
Eric Anholt <eric@anholt.net> |
[965] Convert the driver to dri_bufmgr interface and enable TTM.
This is currently believed to work but be a significant performance loss.
Performance recovery should be soon to follow.
The dri_bo_fake_disable_backing_store() call was added to allow backing store
disable like bufmgr_fake.c did, which is a significant performance win (though
it's missing the no-fence-subdata part).
This commit is a squash merge of the 965-ttm branch, which had some history
I wanted to avoid pulling due to noisiness and brokenness at many points
for git-bisecting.
ntel_context.h
|
| e2ca788ae700aae75bf8d024c1374c38cc5574f9 |
07-Dec-2007 |
Xiang, Haihao <haihao.xiang@intel.com> |
i915: fix the error in the previos commit.
915_vtbl.c
|
| c1a3ac0e45d6b69d5567f80b76815b2e6997128d |
07-Dec-2007 |
Xiang, Haihao <haihao.xiang@intel.com> |
i915: Check the program size when uploading a program. fix bug 13494
915_vtbl.c
|
| 2af613e0b8e6f89cc7528ff5a969e18f077e61fc |
30-Nov-2007 |
Michel Dänzer <michel@tungstengraphics.com> |
i915: Fix up state changes for i8xx.
830_vtbl.c
|
| 1df7a82688c4f41b06ef04d997654afb4e05071b |
29-Nov-2007 |
Eric Anholt <eric@anholt.net> |
[i915] Make INTEL_DEBUG=bufmgr actually do things for bufmgr_fake.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_context.c
|
| a8fee3a498c8c4966d57a5273408477f3aa3ce73 |
15-Nov-2007 |
Keith Whitwell <keith@tungstengraphics.com> |
i915: Catch cases where not all state is emitted for a new batchbuffer.
This could lead to incorrect rendering or even lockups.
915_vtbl.c
ntel_context.h
ntel_tris.c
|
| 7dd5ced962e78df68cb902b88b95b7a842a310ab |
25-Nov-2007 |
Michel Dänzer <michel@tungstengraphics.com> |
intel: Fix relative symlinks.
erver/intel_dri.c
|
| f00a64999c197e6a96e65fd00f64224a6f22c9fa |
17-Nov-2007 |
Eric Anholt <eric@anholt.net> |
[intel] Add 965 support to shared intel_blit.c
This requires that regions grow a marker of whether they are tiled or not,
because fence (surface) registers are ignored by the 965 2D engine.
akefile
/external/mesa3d/src/mesa/drivers/dri/intel/intel_pixel_copy.c
/external/mesa3d/src/mesa/drivers/dri/intel/intel_pixel_draw.c
/external/mesa3d/src/mesa/drivers/dri/intel/intel_pixel_read.c
|
| 5ef6803b7a902e7faa0e77408a43eabc408ff547 |
17-Nov-2007 |
Eric Anholt <eric@anholt.net> |
[intel] Move additional code to be shared from intel_context.h to intel/.
ntel_context.h
|
| 5cdf3972ded710b8638a0090ade4e3dd408e4845 |
17-Nov-2007 |
Eric Anholt <eric@anholt.net> |
[intel] Move intel_tex.h into place, forgotten in the previous commit.
ntel_tex.h
|
| 3bd07ba0d4f759e3a17e2a5ed51086b44705a482 |
16-Nov-2007 |
Eric Anholt <eric@anholt.net> |
[i915] Add INTEL_DEBUG=sync debug flag to wait for fences after making them.
ntel_context.h
/external/mesa3d/src/mesa/drivers/dri/intel/intel_context.c
|
| df3c530bedd0ee59e0ae5c18a916f78fd3f7559a |
10-Nov-2007 |
Eric Anholt <eric@anholt.net> |
[i915] Push locking in intelClearWithTris down inside meta_draw_poly.
The lock coverage and checks for cliprects were unneeded since the batchbuffer
will have INTEL_BATCH_CLIPRECTS anyway. It appeared to be a leftover from
intelClearWithBlit.
This makes the locking requirements of i915 meta_draw_quad match i965
meta_draw_quad.
ntel_tris.c
|
| 9724dc1ac7ddd6f547a8aa6d57fa51ed1040db3a |
10-Nov-2007 |
Eric Anholt <eric@anholt.net> |
[i915] Remove old frontbuffer rotation hack.
This was replaced in previous releases of xserver/dri/libGL by reporting the
damage to the frontbuffer so that the server and driver could handle it
appropriately.
akefile
830_context.h
915_metaops.c
ntel_context.h
ntel_rotate.c
ntel_rotate.h
/external/mesa3d/src/mesa/drivers/dri/intel/intel_context.c
|
| 77a5bcaff43df8d54e0e0ef833726e4b41d7eb36 |
07-Nov-2007 |
Eric Anholt <eric@anholt.net> |
[intel] Move over files that will be shared with 965-fbo work.
ntel_batchbuffer.h
ntel_blit.h
ntel_buffer_objects.h
ntel_buffers.h
ntel_bufmgr_ttm.c
ntel_bufmgr_ttm.h
ntel_depthstencil.c
ntel_depthstencil.h
ntel_fbo.h
ntel_mipmap_tree.h
ntel_regions.h
ntel_screen.h
ntel_span.h
/external/mesa3d/src/mesa/drivers/dri/intel/intel_batchbuffer.c
/external/mesa3d/src/mesa/drivers/dri/intel/intel_blit.c
/external/mesa3d/src/mesa/drivers/dri/intel/intel_buffer_objects.c
/external/mesa3d/src/mesa/drivers/dri/intel/intel_buffers.c
/external/mesa3d/src/mesa/drivers/dri/intel/intel_fbo.c
/external/mesa3d/src/mesa/drivers/dri/intel/intel_mipmap_tree.c
/external/mesa3d/src/mesa/drivers/dri/intel/intel_regions.c
/external/mesa3d/src/mesa/drivers/dri/intel/intel_screen.c
/external/mesa3d/src/mesa/drivers/dri/intel/intel_span.c
/external/mesa3d/src/mesa/drivers/dri/intel/intel_tex.c
/external/mesa3d/src/mesa/drivers/dri/intel/intel_tex_copy.c
/external/mesa3d/src/mesa/drivers/dri/intel/intel_tex_format.c
/external/mesa3d/src/mesa/drivers/dri/intel/intel_tex_image.c
/external/mesa3d/src/mesa/drivers/dri/intel/intel_tex_subimage.c
/external/mesa3d/src/mesa/drivers/dri/intel/intel_tex_validate.c
|
| 1b880c7e3c216a4f5417aacb702e5a0124d12110 |
01-Nov-2007 |
Dave Airlie <airlied@redhat.com> |
i915: make i915 use the cached mappings for batch/buffer objects.
This should restore gears speed on 9xx hardware
/external/mesa3d/src/mesa/drivers/dri/intel/intel_batchbuffer.c
/external/mesa3d/src/mesa/drivers/dri/intel/intel_buffer_objects.c
|
| 3177b4e2cf7d2fff7428cb6057bebbe60ff5cc6c |
30-Oct-2007 |
Michel Dänzer <michel@tungstengraphics.com> |
More vblank cleanups.
* Fix crash at context creation in most drivers supporting vblank.
* Don't pass vblank sequence or flags to functions that get passed the drawable
private already.
* Attempt to initialize vblank related drawable private fields just once
per drawable. May need more work in some drivers.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_blit.c
/external/mesa3d/src/mesa/drivers/dri/intel/intel_buffers.c
|
| dc1264970e585c0939606922b3e964db4b9c28b3 |
29-Oct-2007 |
Eric Anholt <eric@anholt.net> |
[i915] Include header to pick up intel_ttm_bo_create_from_handle() proto.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_regions.c
|
| b0edb9c38a6c63175e4fafdbb54102c4f4a94e2c |
29-Oct-2007 |
Eric Anholt <eric@anholt.net> |
Merge branch 'origin'
|
| 38fdb47d26055e19d50cd407266b56ed4317ae0a |
29-Oct-2007 |
Jesse Barnes <jesse.barnes@intel.com> |
Refactor and fix core vblank support
Consolidate support for synchronizing to and retrieving vblank counters. Also
fix the core vblank code to return monotonic MSC counters, which are required
by some GLX extensions. Adding support for multiple pipes to a low level
driver is fairly easy, the Intel 965 driver provides simple example code (see
intel_buffers.c:intelWindowMoved()).
The new code bumps the media stream counter extension version to 2 and adds a
new getDrawableMSC callback. This callback takes a drawablePrivate pointer,
which is used to calculate the MSC value seen by clients based on the actual
vblank counter(s) returned from the kernel. The new drawable private fields
are as follows:
- vblSeq - used for tracking vblank counts for buffer swapping
- vblFlags - flags (e.g. current pipe), updated by low level driver
- msc_base - MSC counter from the last time the current pipe changed
- vblank_base - kernel DRM vblank counter from the last time the pipe changed
Using the above variables, the core vblank code (in vblank.c) can calculate a
monotonic MSC value. The low level DRI drivers are responsible for updating
the current pipe (by setting VBLANK_FLAG_SECONDARY for example in vblFlags)
along with msc_base and vblank_base whenever the pipe associated with a given
drawable changes (again, see intelWindowMoved for an example of this).
Drivers should fill in the GetDrawableMSC DriverAPIRec field to point to
driDrawableGetMSC32 and add code for pipe switching as outlined above to fully
support the new scheme.
ntel_fbo.h
/external/mesa3d/src/mesa/drivers/dri/intel/intel_buffers.c
/external/mesa3d/src/mesa/drivers/dri/intel/intel_context.c
/external/mesa3d/src/mesa/drivers/dri/intel/intel_screen.c
|
| 950fff0f9a330c50a627ced2e8cff2fb4689bee0 |
18-Oct-2007 |
Michel Dänzer <michel@tungstengraphics.com> |
i915: Add some sanity checks to blit command debugging code.
915_debug.c
|
| b4531121330fa85a072f129d11e8432b5294c789 |
17-Oct-2007 |
Michel Dänzer <michel@tungstengraphics.com> |
i915: Don't emit 'empty' blit rectangles.
The hardware seems to interpret them differently and produce unexpected
results...
/external/mesa3d/src/mesa/drivers/dri/intel/intel_blit.c
|
| 919f617d08a34d01dd916b08ca4f315bae84f21c |
16-Oct-2007 |
Eric Anholt <eric@anholt.net> |
Replace symlink generation from i915 with files in intel/ and symlinks there.
akefile
erver/i830_common.h
erver/i830_dri.h
erver/intel.h
erver/intel_dri.c
|
| 3feefeeb35c73ba6a8e0d81506891988bfcda5ef |
16-Oct-2007 |
Michel Dänzer <michel@tungstengraphics.com> |
i915: Make sure extensions that require TTM actually work.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_screen.c
|
| 70eb456a7626b7315e787f6019a405db359e0b5e |
16-Oct-2007 |
Dave Airlie <airlied@linux.ie> |
i915: fixup TTM interfaces to follow drm changes
ntel_bufmgr_ttm.c
|
| 9c4d104e98bb2cc8d5719d00445db0617c8f5de1 |
16-Oct-2007 |
Michel Dänzer <michel@tungstengraphics.com> |
i915: Re-enable __DRItexOffsetExtension.
This seems to have got lost somehow during the recent DRI interface changes.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_screen.c
|
| f9c6dfc4d12451c21f39f38b048758cbee5723cf |
13-Oct-2007 |
Kristian Høgsberg <krh@redhat.com> |
Merge branch 'dri2'
Conflicts:
src/mesa/drivers/dri/i915/intel_screen.c
|
| bf805d3bf5bf191aa669b6155316a78917cf9b0e |
12-Oct-2007 |
Dave Airlie <airlied@redhat.com> |
Merge branch 'master' into i915-superioctl
|
| 9e06cf00cfb24528653913fc90eded4d370c1149 |
12-Oct-2007 |
Dave Airlie <airlied@redhat.com> |
i915: only enable TTM path if drm minor is > 11 for superioctl
/external/mesa3d/src/mesa/drivers/dri/intel/intel_screen.c
|
| 7fc5c0307af98e1a0ff7e9081b07f940d1e3f916 |
12-Oct-2007 |
Dave Airlie <airlied@redhat.com> |
i915: fixup reloc header defines
ntel_bufmgr_ttm.c
|
| a2494462cb7d557a7643452c720e0ab8fa9f4f63 |
11-Oct-2007 |
Kristian Høgsberg <krh@redhat.com> |
Drop no longer implemented MESA allocate extension from i915.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_screen.c
|
| ccff0cb26378ce370fc8697a2a2ada138d2e119e |
08-Jun-2007 |
Kristian Høgsberg <krh@redhat.com> |
Add a version field to __DRIextension.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_screen.c
|
| f968f67e6214416f04b8875ce59a94a02f464c81 |
17-May-2007 |
Kristian Høgsberg <krh@hinata.boston.redhat.com> |
Add a DRI_ReadDrawable marker extension to signal read drawable capability.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_screen.c
|
| 106a6f29bbdc71982afd629bdf89369cefd1459e |
17-May-2007 |
Kristian Høgsberg <krh@hinata.boston.redhat.com> |
Move media stream counter entry points to new extension.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_screen.c
|
| a7a0a2beb54dcb78d7e0ab64cf2f5a6ede8191a4 |
16-May-2007 |
Kristian Høgsberg <krh@hinata.boston.redhat.com> |
Move GLX_MESA_swap_frame_usage DRI entry points to the new mechanism.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_screen.c
|
| 78a6aa57a0155d72280dd91c05513c847bf76f3b |
16-May-2007 |
Kristian Høgsberg <krh@hinata.boston.redhat.com> |
Move GLX_MESA_allocate_memory related functions to new extension mechanism.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_screen.c
|
| efaf90b03e8b69e04909bce071f8ef6b65cc0e9d |
15-May-2007 |
Kristian Høgsberg <krh@hinata.boston.redhat.com> |
Move swap_interval to new extension mechanism.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_context.c
/external/mesa3d/src/mesa/drivers/dri/intel/intel_screen.c
|
| ac3e838fa748c8c8a6ffc04d1ab13da71f75f103 |
15-May-2007 |
Kristian Høgsberg <krh@hinata.boston.redhat.com> |
Move the copySubBuffer extension over to the new mechanism.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_screen.c
|
| 64106d0d9aeefa6974317042b6bc3e5eaabac5a2 |
14-May-2007 |
Kristian Høgsberg <krh@hinata.boston.redhat.com> |
Pull createNewScreen entry point into dri_util.c.
This pulls the top level createNewScreen entry point out of the drivers
and rewrites __driUtilCreateNewScreen in dri_util.c to be the new entry point.
The change moves more logic into the common/ layer and changes the
createNewScreen entry point to only be defined in one place.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_screen.c
|
| efd03a278ae55b454509e9659c42899133983ebd |
14-May-2007 |
Kristian Høgsberg <krh@hinata.boston.redhat.com> |
Replace open-coded major, minor, and patch version fields with __DRIversionRec.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_buffers.c
/external/mesa3d/src/mesa/drivers/dri/intel/intel_screen.c
|
| aac367f48afc62176faf67aa6f329fbeae2004b4 |
11-May-2007 |
Kristian Høgsberg <krh@hinata.boston.redhat.com> |
Remove screenConfigs from __DRIscreen.
The screenConfigs field of __DRIscreen points back to the containing
__GLXscreenConfigs struct. This is a serious abstraction violation; it
assumes that the loader is libGL and that there *is* a __GLXscreenConfigs
type in the loader.
Using the containerOf macro, we can get from the __DRIscreen pointer to
the containing __GLXscreenConfigs struct, at a place in the stack
where the above is a valid assumption. Besides, the __DRI* structs shouldn't
hold state other than the private pointer.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_screen.c
|
| b068af2f3b890bec26a186e9d0bdd3d44c17cd4d |
10-Oct-2007 |
Kristian Høgsberg <krh@redhat.com> |
Key drm_i915_flip_t typedef off of the ioctl #define instead.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_buffers.c
|
| aceccda56b08338e217991e54607f1c9f18fc3e6 |
10-May-2007 |
Kristian Høgsberg <krh@hinata.boston.redhat.com> |
Drop __DRInativeDisplay and pass in __DRIscreen pointers instead.
Many DRI entry points took a __DRInativeDisplay pointer and a screen
index as arguments. The only use for the native display pointer was to
pass it back to the loader when looking up the __DRIscreen for the given
screen index.
Instead, let's just pass in the __DRIscreen pointer directly, which
let's drop the __DRInativeDisplay type and the getScreen function.
The assumption is now that the loader will be able to retrieve context
from the __DRIscreen pointer when necessary.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_screen.c
|
| 8909f1131ab4d9d117d79aee617eceabf3ea60c8 |
09-Oct-2007 |
Dave Airlie <airlied@redhat.com> |
i915: workout max relocs from batch buffer size
ntel_bufmgr_ttm.c
ntel_bufmgr_ttm.h
/external/mesa3d/src/mesa/drivers/dri/intel/intel_screen.c
|
| 7e83c15fa01c04c12b7aab9dd2e7ab0ae193b1c3 |
08-Oct-2007 |
Dave Airlie <airlied@redhat.com> |
i915: fixup up bufmgr to pass num buffers to kernel
remove unneeded entry points
ntel_bufmgr_ttm.c
ntel_ioctl.c
ntel_ioctl.h
/external/mesa3d/src/mesa/drivers/dri/intel/intel_batchbuffer.c
|
| 0ba57d02cd4a9e37bb5367a5c345c5f41038eb27 |
05-Oct-2007 |
Dave Airlie <airlied@redhat.com> |
i915: drop complex list handling for now
If this proves a win later we can add it back but at the moment
I don't think it's required yet
ntel_bufmgr_ttm.c
|
| 4611b9398e6164ea419bf587e759a354be4c58b4 |
05-Oct-2007 |
Dave Airlie <airlied@redhat.com> |
i915: clean up lists on teardown
also fix a use of uninitialised pointer
ntel_bufmgr_ttm.c
|
| 4e1c76de0bf767857737116a0ec908cb8d35083e |
04-Oct-2007 |
Dave Airlie <airlied@redhat.com> |
i915: add copyrights to new files
ntel_bufmgr_ttm.c
|
| 8e21bb516f87bfdde90d0f469ede4192435b9235 |
04-Oct-2007 |
Dave Airlie <airlied@redhat.com> |
i915: increase batchbuffer back to 16k
ntel_batchbuffer.h
|
| 77e0523fb7769df4bf43747e136b1653b2421b97 |
04-Oct-2007 |
Eric Anholt <eric@anholt.net> |
[965] Replace various alignment code with a shared ALIGN() macro.
In the process, fix some alignment issues:
- Scratch space allocation was aligned into units of 1KB, while the allocation
wanted units of bytes, so we never allocated enough space for scratch.
- GRF register count was programmed as ALIGN(val - 1, 16) / 16 instead of
ALIGN(val, 16) / 16 - 1, which overcounted for val != 16n+1.
ntel_context.h
|
| 6bac9478c39fbe7955d10a21a2d7743697427a56 |
04-Oct-2007 |
Eric Anholt <eric@anholt.net> |
Replace duplicated intel_reg.h with a shared header.
915_reg.h
ntel_context.h
ntel_reg.h
/external/mesa3d/src/mesa/drivers/dri/intel/intel_batchbuffer.c
/external/mesa3d/src/mesa/drivers/dri/intel/intel_blit.c
|
| c4a9a708884c2f790e04aaaa4a4cb2993ff33089 |
04-Oct-2007 |
Dave Airlie <airlied@redhat.com> |
i915: add superioctl support to the ttm codepaths.
gears now runs for about 10-15 seconds with some artifacts before falling
over.
ntel_batchbuffer.h
ntel_bufmgr_ttm.c
ntel_bufmgr_ttm.h
ntel_ioctl.c
ntel_ioctl.h
/external/mesa3d/src/mesa/drivers/dri/intel/intel_batchbuffer.c
/external/mesa3d/src/mesa/drivers/dri/intel/intel_regions.c
/external/mesa3d/src/mesa/drivers/dri/intel/intel_screen.c
|
| 58cdd1dc520d211b65f05fd06b5ba472f552853c |
03-Oct-2007 |
Michel Dänzer <michel@tungstengraphics.com> |
i915: Only align texture pitch to 64 bytes when textures can be render targets.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_mipmap_tree.c
|
| 1bc84102ad4df377df6c8bf5734b886b7683b939 |
03-Oct-2007 |
Michel Dänzer <michel@tungstengraphics.com> |
i915: Work around texture pitch related performance drops on i915 at least.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_mipmap_tree.c
|
| fa031c8914d685e153b4ab886f43fdbfbbd0a30b |
03-Oct-2007 |
Dave Airlie <airlied@redhat.com> |
i915: add superioctl initial support inside bufmgr ttm
akefile
ntel_batchbuffer.h
ntel_bufmgr_ttm.c
ntel_ioctl.c
/external/mesa3d/src/mesa/drivers/dri/intel/intel_batchbuffer.c
/external/mesa3d/src/mesa/drivers/dri/intel/intel_regions.c
/external/mesa3d/src/mesa/drivers/dri/intel/intel_screen.c
|
| 4cd3ef58a989f61ff22669648e4117426c6e603c |
03-Oct-2007 |
Dave Airlie <airlied@redhat.com> |
i915/drmbuf: attempt to push relocations into buffer manager
This moves the relocations into the buffer manager in prepration for
a superioctl move.
akefile
ntel_batchbuffer.h
/external/mesa3d/src/mesa/drivers/dri/intel/intel_batchbuffer.c
|
| d99f6c4a2aa8207a2fbacd9b3a5ec87dd25ba496 |
28-Sep-2007 |
Jesse Barnes <jesse.barnes@intel.com> |
Go back to using old drm_i915_flip_t field name
This field shouldn't have been renamed in the first place. Go back to using
the old name so that the tree is backward and forward compatible again.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_buffers.c
|
| 35331a511fcd023a7b6f0eb298098d872b856a9f |
28-Sep-2007 |
Eric Anholt <eric@anholt.net> |
[965] Add batchbuffer dumping under INTEL_DEBUG=bat, like 915.
akefile
ntel_decode.c
ntel_decode.h
/external/mesa3d/src/mesa/drivers/dri/intel/intel_batchbuffer.c
|
| e886ae4c58bc98897d6901e3f30deea008bc7f8a |
28-Sep-2007 |
Eric Anholt <eric@anholt.net> |
Revert "WIP 965 conversion to dri_bufmgr."
This reverts commit b2f1aa2389473ed09170713301b042661d70a48e.
Somehow I ended up with my branch's save-this-while-I-work-on-master commit
actually on master.
akefile
ntel_batchbuffer.h
/external/mesa3d/src/mesa/drivers/dri/intel/intel_batchbuffer.c
|
| b2f1aa2389473ed09170713301b042661d70a48e |
27-Sep-2007 |
Eric Anholt <eric@anholt.net> |
WIP 965 conversion to dri_bufmgr.
akefile
ntel_batchbuffer.h
/external/mesa3d/src/mesa/drivers/dri/intel/intel_batchbuffer.c
|
| 67f6449743d006084df85693085eca79a966ad17 |
27-Sep-2007 |
Dave Airlie <airlied@linux.ie> |
i915/i965 merge serer directories along lines for radeon/r200
erver/i830_common.h
|
| c8cb87d35686c155143ed3e511e1ea674d8371a3 |
24-Sep-2007 |
Eric Anholt <eric@anholt.net> |
Remove leftover code for i915_texprog.c noticed in crossbar review.
915_context.h
915_program.c
/external/mesa3d/src/mesa/drivers/dri/intel/intel_context.c
|
| 8cf9085bc7b96819d2bec1e749e15af58eefb2f3 |
24-Sep-2007 |
Eric Anholt <eric@anholt.net> |
Move i915tex driver into place as just i915.
akefile
830_context.c
830_context.h
830_metaops.c
830_reg.h
830_state.c
830_tex.c
830_texblend.c
830_texstate.c
830_vtbl.c
915_context.c
915_context.h
915_debug.c
915_debug.h
915_debug_fp.c
915_fragprog.c
915_metaops.c
915_program.c
915_program.h
915_reg.h
915_state.c
915_tex.c
915_tex_layout.c
915_texstate.c
915_vtbl.c
ntel_batchbuffer.h
ntel_blit.h
ntel_buffer_objects.h
ntel_buffers.h
ntel_context.h
ntel_decode.c
ntel_decode.h
ntel_depthstencil.c
ntel_depthstencil.h
ntel_fbo.h
ntel_ioctl.c
ntel_ioctl.h
ntel_mipmap_tree.h
ntel_pixel.h
ntel_reg.h
ntel_regions.h
ntel_render.c
ntel_rotate.c
ntel_rotate.h
ntel_screen.h
ntel_span.h
ntel_structs.h
ntel_tex.h
ntel_tris.c
ntel_tris.h
erver/i830_common.h
erver/i830_dri.h
erver/intel.h
erver/intel_dri.c
/external/mesa3d/src/mesa/drivers/dri/intel/intel_batchbuffer.c
/external/mesa3d/src/mesa/drivers/dri/intel/intel_blit.c
/external/mesa3d/src/mesa/drivers/dri/intel/intel_buffer_objects.c
/external/mesa3d/src/mesa/drivers/dri/intel/intel_buffers.c
/external/mesa3d/src/mesa/drivers/dri/intel/intel_context.c
/external/mesa3d/src/mesa/drivers/dri/intel/intel_fbo.c
/external/mesa3d/src/mesa/drivers/dri/intel/intel_mipmap_tree.c
/external/mesa3d/src/mesa/drivers/dri/intel/intel_pixel.c
/external/mesa3d/src/mesa/drivers/dri/intel/intel_pixel_bitmap.c
/external/mesa3d/src/mesa/drivers/dri/intel/intel_pixel_copy.c
/external/mesa3d/src/mesa/drivers/dri/intel/intel_pixel_draw.c
/external/mesa3d/src/mesa/drivers/dri/intel/intel_pixel_read.c
/external/mesa3d/src/mesa/drivers/dri/intel/intel_regions.c
/external/mesa3d/src/mesa/drivers/dri/intel/intel_screen.c
/external/mesa3d/src/mesa/drivers/dri/intel/intel_span.c
/external/mesa3d/src/mesa/drivers/dri/intel/intel_state.c
/external/mesa3d/src/mesa/drivers/dri/intel/intel_tex.c
/external/mesa3d/src/mesa/drivers/dri/intel/intel_tex_copy.c
/external/mesa3d/src/mesa/drivers/dri/intel/intel_tex_format.c
/external/mesa3d/src/mesa/drivers/dri/intel/intel_tex_image.c
/external/mesa3d/src/mesa/drivers/dri/intel/intel_tex_layout.c
/external/mesa3d/src/mesa/drivers/dri/intel/intel_tex_subimage.c
/external/mesa3d/src/mesa/drivers/dri/intel/intel_tex_validate.c
|
| 8fba8d2018643444fc17c590f3e8732e1a76c6b8 |
24-Sep-2007 |
Eric Anholt <eric@anholt.net> |
Remove the old i915 driver now that i915tex works without TTM.
akefile
830_context.c
830_context.h
830_metaops.c
830_reg.h
830_state.c
830_tex.c
830_texblend.c
830_texstate.c
830_vtbl.c
915_context.c
915_context.h
915_debug.c
915_fragprog.c
915_metaops.c
915_program.c
915_program.h
915_reg.h
915_state.c
915_tex.c
915_texprog.c
915_texstate.c
915_vtbl.c
ntel_batchbuffer.h
ntel_context.h
ntel_ioctl.c
ntel_ioctl.h
ntel_reg.h
ntel_render.c
ntel_rotate.c
ntel_rotate.h
ntel_screen.h
ntel_span.h
ntel_tex.h
ntel_texmem.c
ntel_tris.c
ntel_tris.h
erver/i830_common.h
erver/i830_dri.h
erver/intel.h
erver/intel_dri.c
/external/mesa3d/src/mesa/drivers/dri/intel/intel_batchbuffer.c
/external/mesa3d/src/mesa/drivers/dri/intel/intel_context.c
/external/mesa3d/src/mesa/drivers/dri/intel/intel_pixel.c
/external/mesa3d/src/mesa/drivers/dri/intel/intel_screen.c
/external/mesa3d/src/mesa/drivers/dri/intel/intel_span.c
/external/mesa3d/src/mesa/drivers/dri/intel/intel_state.c
/external/mesa3d/src/mesa/drivers/dri/intel/intel_tex.c
|
| 9070e6b9970a6aeabfff07b259e0e1660980cc59 |
20-Jun-2007 |
Eric Anholt <eric@anholt.net> |
i915: Quiet valgrind by initializing the seq value the kernel writes into.
Also, add a couple of comments to the wait/emit IRQ functions.
ntel_ioctl.c
|
| ba5290e836d5fd6e80dc460f75f6b032e2510382 |
12-Sep-2007 |
Jesse Barnes <jesse.barnes@intel.com> |
Remove unused plane->pipe mapping fields from SAREA private.
erver/i830_common.h
|
| acfeb3b6ea93bcb5b18e6f51a0727e39da608d76 |
11-Sep-2007 |
Brian <brian.paul@tungstengraphics.com> |
Fix-up #includes to remove some -I options.
eg: #include "shader/program.h" and remove -I$(TOP)/src/mesa/program
915_fragprog.c
|
| 78b7e49c846c535f6907c18a9982d07c9e9feabb |
11-Sep-2007 |
Jesse Barnes <jesse.barnes@intel.com> |
intel: disentangle planes & pipes
This is the Mesa portion of the pipe & plane disambiguation. Mesa needs to use
the new assumptions about plane vs. pipe mappings and should use the new SAREA
field names to avoid confusion.
erver/i830_common.h
/external/mesa3d/src/mesa/drivers/dri/intel/intel_context.c
|
| c9e4aa2b303f9056564724ece0e2733a54d9f569 |
13-Aug-2007 |
Xiang, Haihao <haihao.xiang@intel.com> |
i915: satisfy certain alignment restrictions for small
compressed texture
915_texstate.c
/external/mesa3d/src/mesa/drivers/dri/intel/intel_tex.c
|
| ab02552cdddf9322bfaf874f85d74e7c174a0f3b |
29-Jul-2007 |
Roland Scheidegger <sroland@tungstengraphics.com> |
fix cos/sin range reduction for i915 driver too
915_fragprog.c
|
| 10f5a6ac85fb5f78069b7314e40a2a23e2636192 |
29-Jul-2007 |
Roland Scheidegger <sroland@tungstengraphics.com> |
fix fallback crashes when driver can't handle frag prog for i915 driver too (untested)
830_vtbl.c
915_vtbl.c
ntel_context.h
ntel_render.c
|
| fb3b9060d48934ca4faa72e966c00aee627ce96d |
16-Jul-2007 |
Roland Scheidegger <sroland@tungstengraphics.com> |
fix segfault with i915 drivers in swrast drawpixels path when resizing windows
/external/mesa3d/src/mesa/drivers/dri/intel/intel_pixel.c
|
| 0bf2479aef5def4d01bfc55b08992f41664f1431 |
07-Jul-2007 |
Brian <brian.paul@tungstengraphics.com> |
Add case for GL_QUADS in i915_reduced_primitive_state().
The t_dd_tritemp.h code can emit GL_QUADS primitives. We need to catch
that case to determine if polygon stipple should be enabled.
Fixes bug reported by Carlos Diógenes on 4 July 2007.
915_vtbl.c
|
| 171dcdfa27dda30916a7f9bfed89577feee5d350 |
21-Jun-2007 |
Brian <brian@i915.localnet.net> |
Another round of fixing attribute interpolation for glDraw/CopyPixels.
Need to turn off FRAG_BIT_COL0 in swrast->_ActiveAttribMask when doing
glRead/CopyPixels to prevent the user's colors from getting overwritten
when a fragment program is active.
This was happening in the DRI drivers when MaintainTexEnv program was
used (the texenv fragment program was enabled when _swrast_DrawPixels was
called).
This still isn't an ideal solution, but fixes things for now.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_pixel.c
|
| a4af3e5ab3fa0f45c25673c93d802cdff087145c |
20-Jun-2007 |
Brian <brian@i915.localnet.net> |
Effectively disable _TexEnvProgram before calling _swrast_DrawPixels().
It's OK to use _TexEnvProgram regardless of the texture state, but if fog
is also enabled, the fragment program is lacking the actual fog computation
so fogging doesn't appear.
Fixing this might involve a new _MaintainFogProgram field and related code.
For now, just disable the _TexEnvProgram and let swrast handle everything.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_pixel.c
|
| 8331d9d7aa7cde7126d38d4e1eb5fe8a168077f3 |
05-Jun-2007 |
Wang Zhenyu <zhenyu.z.wang@intel.com> |
Add PCI IDs for the G33, Q33, and Q35 chipsets.
915_texstate.c
ntel_context.h
/external/mesa3d/src/mesa/drivers/dri/intel/intel_context.c
/external/mesa3d/src/mesa/drivers/dri/intel/intel_screen.c
/external/mesa3d/src/mesa/drivers/dri/intel/intel_tex.c
|
| a74eec5af5397b612d60dd4b0d81666027f19bb0 |
30-May-2007 |
Wang Zhenyu <zhenyu.z.wang@intel.com> |
i915: Add support for 945GME chip
915_texstate.c
ntel_context.h
/external/mesa3d/src/mesa/drivers/dri/intel/intel_context.c
/external/mesa3d/src/mesa/drivers/dri/intel/intel_screen.c
/external/mesa3d/src/mesa/drivers/dri/intel/intel_tex.c
|
| a194bc3a8527ed41eead88632cc79ecabe4c81ac |
23-May-2007 |
Brian <brian.paul@tungstengraphics.com> |
Replace initInitState() with _mesa_init_driver_state().
830_state.c
915_state.c
ntel_context.h
/external/mesa3d/src/mesa/drivers/dri/intel/intel_context.c
|
| 1078ef83eb3458363bf9709a7c697b39020266ea |
22-May-2007 |
Roland Scheidegger <sroland@tungstengraphics.com> |
i915/i915tex: minor cleanup (remove unneeded function call
915_fragprog.c
|
| 25551bdfad8541337a4e59e7e3764fa9b876cb19 |
19-May-2007 |
Roland Scheidegger <sroland@tungstengraphics.com> |
fix copy & paste bug of previous commit, breaking dxt5 formats
/external/mesa3d/src/mesa/drivers/dri/intel/intel_tex.c
|
| 3ad9c551b95c6fd8787f6f007bda34df446b53ab |
19-May-2007 |
Roland Scheidegger <sroland@tungstengraphics.com> |
fix small s3tc mipmaps (#10968)
make sure that always whole blocks are uploaded.
(May still not work correctly if the top mip map is not at least a full block,
that is 4 pixels wide - not sure, but probably doesn't happen in real world)
915_texstate.c
/external/mesa3d/src/mesa/drivers/dri/intel/intel_tex.c
|
| 516259d609d1f9c598fefb38d82103211c9463db |
09-May-2007 |
Brian <brian@yutani.localnet.net> |
Clean-up in I830AllocVidMem(), s/int/unsigned long/ for ret variable.
erver/intel_dri.c
|
| 4a7c45118d5f122a4550f259424b6820fe3945eb |
17-Apr-2007 |
Brian <brian@yutani.localnet.net> |
just clean-ups
915_state.c
|
| 96e05da1c959b3dad7250ccfad1bf540bbec2fbf |
16-Apr-2007 |
Brian <brian@yutani.localnet.net> |
remove _tnl_arb_vertex_program_stage
/external/mesa3d/src/mesa/drivers/dri/intel/intel_context.c
|
| 159ecba4b335f09cb9345c67f48187db796f8955 |
10-Apr-2007 |
Michel Dänzer <michel@tungstengraphics.com> |
i915: Bring test for vsync to pipe B in line with i915tex.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_context.c
|
| ac32b644eec8d4f88d0dd2ec352fcab4871192a2 |
05-Apr-2007 |
Brian <brian@yutani.localnet.net> |
include points.h to fix warnings
/external/mesa3d/src/mesa/drivers/dri/intel/intel_context.c
|
| 40ae3943f2ced65cdb77091f7dd31b57a0f422dd |
04-Apr-2007 |
Xiang, Haihao <haihao.xiang@intel.com> |
i810/i915/i915tex: reinitialize the context point state
/external/mesa3d/src/mesa/drivers/dri/intel/intel_context.c
|
| 3e45db67294faaf0a06c42bdd6dbdb96f87c8801 |
27-Mar-2007 |
Brian <brian@nostromo.localnet.net> |
Restore the UseTexEnvProgram logic.
Was removed during glsl-compiler work. Still need to go back and revisit this
because of the interaction with fragment shaders...
915_context.c
915_state.c
915_vtbl.c
|
| 23d31efc167f09d47635352f697ffcb087d3ebbd |
21-Mar-2007 |
Brian <brian@yutani.localnet.net> |
merge from master
|
| 77544d7b7d7c6fd03c0df81dca07f1bb3a67c119 |
18-Mar-2007 |
Keith Whitwell <keith@tungstengraphics.com> |
fix off-by-one in load_state_immediate
915_state.c
915_vtbl.c
|
| c9e39aeaef0135d6d1aa92a3dc5b3c91fa17904d |
18-Mar-2007 |
Keith Whitwell <keith@tungstengraphics.com> |
fix typo in subrect_disable packet
915_reg.h
|
| 2cf5fd48d1586f961910a14324a457854cb66221 |
09-Mar-2007 |
Brian <brian@yutani.localnet.net> |
Merge branch 'origin' into glsl-compiler-1
Conflicts:
src/mesa/main/context.c
|
| a510bc3ee1a696da120c09ee4ec33dc033f671ac |
06-Mar-2007 |
Brian <brian@yutani.localnet.net> |
Fix/improve framebuffer object reference counting.
Use _mesa_reference_framebuffer() and _mesa_unreference_framebuffer() functions
to be sure reference counting is done correctly. Additional assertions are
done too. Note _mesa_dereference_framebuffer() renamed to "unreference" as
that's more accurate.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_screen.c
|
| 1c70cde8881f794782780cbd695da0882f78c769 |
06-Mar-2007 |
Xiang, Haihao <haihao.xiang@intel.com> |
fix for bug#10182
call _mesa_dereference_framebuffer instead of _mesa_dereference_framebuffer
in i810, i915, i915tex, i965 drivers.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_screen.c
|
| 064ae479a770bf434958d673baf6f7530f642697 |
23-Feb-2007 |
Brian <brian@yutani.localnet.net> |
Update DRI drivers for new glsl compiler.
Mostly:
- update #includes
- update STATE_* token code
915_context.c
915_fragprog.c
915_program.c
915_state.c
915_vtbl.c
|
| 29c471aafc6a3fef23d553e31a555d1782854a77 |
22-Feb-2007 |
Brian <brian@yutani.localnet.net> |
Merge branch 'origin' into glsl-compiler-1
Conflicts:
src/mesa/main/state.c
src/mesa/shader/program.c
src/mesa/shader/program.h
src/mesa/shader/programopt.c
src/mesa/shader/slang/slang_execute.c
src/mesa/sources
src/mesa/swrast/s_arbshader.c
src/mesa/swrast/s_context.c
src/mesa/swrast/s_span.c
src/mesa/swrast/s_zoom.c
src/mesa/tnl/t_context.c
src/mesa/tnl/t_save_api.c
src/mesa/tnl/t_vb_arbprogram.c
src/mesa/tnl/t_vp_build.c
src/mesa/tnl/t_vtx_eval.c
|
| b59657ad965f9471574e914b861bb1d2a17d772e |
02-Feb-2007 |
Keith Whitwell <keith@tungstengraphics.com> |
Merge branch 'vbo-0.2'
Conflicts:
src/mesa/main/texcompress_s3tc.c
src/mesa/tnl/t_array_api.c
|
| 2dfb3a217f730d6783fb2ac8b73248dc682f923c |
02-Feb-2007 |
Zou Nan hai <nanhai.zou@intel.com> |
Fix fd.o #9686, when fall into vertex fog,
fog factors are precomputed in t_vb_fog.c compute_fog_blend_factors,
which is incompatible with appended fragment fog code.
That will make GoogleEarth display abnormally.
always use pixel fog.
915_state.c
|
| 6a3fdc3a1ea6c306d9543791bf172dd1052d7382 |
16-Jan-2007 |
Keith Whitwell <keith@tungstengraphics.com> |
Merge branch 'master' of git+ssh://keithw@git.freedesktop.org/git/mesa/mesa into vbo-0.2
Conflicts:
src/mesa/array_cache/sources
src/mesa/drivers/dri/i965/brw_context.c
src/mesa/drivers/dri/i965/brw_draw.c
src/mesa/drivers/dri/i965/brw_fallback.c
src/mesa/drivers/dri/i965/brw_vs_emit.c
src/mesa/drivers/dri/i965/brw_vs_tnl.c
src/mesa/drivers/dri/mach64/mach64_context.c
src/mesa/main/extensions.c
src/mesa/main/getstring.c
src/mesa/tnl/sources
src/mesa/tnl/t_save_api.c
src/mesa/tnl/t_save_playback.c
src/mesa/tnl/t_vtx_api.c
src/mesa/tnl/t_vtx_exec.c
src/mesa/vbo/vbo_attrib.h
src/mesa/vbo/vbo_exec_api.c
src/mesa/vbo/vbo_save_api.c
src/mesa/vbo/vbo_save_draw.c
|
| 4b4632f94c726c19d3c1efd05ceb5770a430cefd |
15-Dec-2006 |
Brian <brian@yutani.localnet.net> |
vertex/fragment program field changes
915_context.c
915_vtbl.c
|
| c0815bc01fc27185d2f6bedefe49a286dedcbed9 |
27-Nov-2006 |
Brian Paul <brian.paul@tungstengraphics.com> |
remove assertions to match i915tex code (bug 8726)
830_metaops.c
|
| d78f65cd6cf04dafcf50b4014de9d28546badcfb |
02-Nov-2006 |
Brian Paul <brian.paul@tungstengraphics.com> |
Fix fragment program fog problems found with Glean.
1. add PROGRAM_CONSTANT to switch() in src_vector().
2. use _mesa_append_fog_code() to handle fog options in i915ProgramStringNotify().
3. Re-enable some vertex attribute emit code that was previously disabled in i915ValidateFragmentProgram().
915_fragprog.c
|
| 67a101759ec0b84e4f30fbb329e86ac5031cf7e7 |
02-Nov-2006 |
Brian Paul <brian.paul@tungstengraphics.com> |
Call _mesa_problem() from i915_program_error() so we get a nice error message.
915_program.c
|
| 94249ca333eef997f865d0e0862b913cec061c6c |
02-Nov-2006 |
Brian Paul <brian.paul@tungstengraphics.com> |
remove GetBufferSize = NULL; assignment
/external/mesa3d/src/mesa/drivers/dri/intel/intel_context.c
|
| 7a9c7c1133d5cf17d032c8568e8f040a7c171a72 |
02-Nov-2006 |
Brian Paul <brian.paul@tungstengraphics.com> |
Use RGBA_LOGICOP_ENABLED() instead of ctx->Color._LogicOpEnabled since we often
need to check for this condition before the later field has been computed.
Fixes logicop bug #8860.
830_state.c
915_state.c
|
| 6d104cb932080c5c0d951fbc0ec6d30fb7ebef45 |
02-Nov-2006 |
Alan Hourihane <alanh@tungstengraphics.com> |
merge current trunk into vbo branch
830_metaops.c
915_fragprog.c
915_metaops.c
ntel_ioctl.c
ntel_ioctl.h
/external/mesa3d/src/mesa/drivers/dri/intel/intel_batchbuffer.c
|
| a5676795cfe2e24979b5da65c2f499049ab009d9 |
01-Nov-2006 |
Brian Paul <brian.paul@tungstengraphics.com> |
Remove x/y/width/height parameters from Clear functions.
ntel_ioctl.c
ntel_ioctl.h
|
| 9669804fe476f3497ac7e76e1e7b3e62d547fb6e |
01-Nov-2006 |
Brian Paul <brian.paul@tungstengraphics.com> |
Don't use the x/y/width/height params passed to Clear(). Get them
after locking. Next: remove the params altogether.
830_metaops.c
915_metaops.c
ntel_ioctl.c
/external/mesa3d/src/mesa/drivers/dri/intel/intel_batchbuffer.c
|
| 57f09b6e5eccd32ee34f82eab94cdeb7a7243c91 |
01-Nov-2006 |
Keith Whitwell <keith@tungstengraphics.com> |
fix compiler warnings
915_fragprog.c
|
| fd60b2d5368e3385c1ba70c6d5d122b10ff20646 |
01-Nov-2006 |
Keith Whitwell <keith@tungstengraphics.com> |
Patch from <haihao.xiang@intel.com> -- pass program string
notification callback through to tnl/ module, fixes glean crash.
915_fragprog.c
|
| 48f5deab94be832a782a440f55a7bc742d50a62f |
30-Oct-2006 |
Keith Whitwell <keith@tungstengraphics.com> |
switch several dri drivers over
915_context.c
/external/mesa3d/src/mesa/drivers/dri/intel/intel_context.c
|
| 1c1c7fb3610026345e956ad7845e101802f72033 |
17-Oct-2006 |
Brian Paul <brian.paul@tungstengraphics.com> |
remove obsolete intelBufferSize(), bump driver date
/external/mesa3d/src/mesa/drivers/dri/intel/intel_context.c
|
| d40f20aebc6f9995b9fdb70cd5123b0c28d45589 |
17-Oct-2006 |
Brian Paul <brian.paul@tungstengraphics.com> |
Init _UseTexEnvProgram to fix failed assertion in i915_render_start() - this may be temporary
915_context.c
|
| 16345022de1f443c7746f9f735bb495415e7a5ff |
16-Oct-2006 |
Brian Paul <brian.paul@tungstengraphics.com> |
Updates to intelWindowMoved():
Only need to call _mesa_resize_framebuffer() when we've detected a window
size change.
Set the drawFb->Initalized flag to GL_TRUE to avoid obsolete
Driver.GetBufferSize/ResizeBuffer calls in the Mesa code.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_context.c
|
| 694a5b81a7d51208ae4dce0b4d5c163123aec123 |
15-Oct-2006 |
Brian Paul <brian.paul@tungstengraphics.com> |
minor clean-up: s/intel->driDrawable/dPriv/
/external/mesa3d/src/mesa/drivers/dri/intel/intel_context.c
|
| a391384bad9e960989dc8c793386081afc55592c |
15-Oct-2006 |
Brian Paul <brian.paul@tungstengraphics.com> |
Remove a bunch of "ctx->Driver.function = _swrast_Function" lines since
default/fallback functions are already plugged in by the call to
_mesa_init_driver_functions().
/external/mesa3d/src/mesa/drivers/dri/intel/intel_context.c
/external/mesa3d/src/mesa/drivers/dri/intel/intel_pixel.c
|
| 2b6d2e4dcbdc253e8148888d1a7e60d8466ba4e8 |
15-Oct-2006 |
Brian Paul <brian.paul@tungstengraphics.com> |
Remove Driver.ResizeBuffers = _mesa_resize_framebuffer lines.
This is already done by the preceeding call to _mesa_init_driver_functions()
which plugs in default functions like that.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_context.c
|
| d886423b3c0b800656ba5d4c6480bba90f8e5981 |
10-Oct-2006 |
Keith Whitwell <keith@tungstengraphics.com> |
Use the mesa-provided texenv program rather than rolling our own.
Turn on texture crossbar support.
915_context.c
915_fragprog.c
915_texprog.c
915_vtbl.c
|
| 46929c93d8c3b1a9682c24b3f3f6d6ed1878e422 |
29-Sep-2006 |
Michel Dänzer <michel@daenzer.net> |
i915: Fix wait for scheduled swap on secondary display.
ntel_context.h
|
| af866291da0856482bd10d1c8e7ee907af2a0d39 |
28-Sep-2006 |
Michel Dänzer <michel@daenzer.net> |
Synchronize drawable to the pipe where the bigger part can be visible.
This requires the DDX driver to set the corresponding fields in the SAREA,
so check its minor version.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_context.c
|
| 4abf2706e938a2c5d68c66985140bcad360eba3c |
28-Sep-2006 |
Michel Dänzer <michel@daenzer.net> |
Add new I830 SAREA fields.
erver/i830_common.h
|
| 941c8667394a3ea5b4793d988796e0f397390626 |
28-Sep-2006 |
Michel Dänzer <michel@daenzer.net> |
i915: Handle DRM_VBLANK_SECONDARY when scheduling buffer swaps.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_batchbuffer.c
|
| c2f1a1857e553f4d11fc0715bb586f69ac147df0 |
28-Sep-2006 |
Michel Dänzer <michel@daenzer.net> |
i915: Attempt to schedule buffer swap on target vertical blank when possible.
This has some advantages over the traditional way of first waiting for the
target vertical blank and then emitting the buffer swap, e.g.
* glXSwapBuffers returns immediately, only the next time the driver needs the
hardware lock will it block until the target vertical blank. This should
allow applications that don't intermix rendering and other processing to
start processing for the next frame right away.
* It's less likely to produce tearing.
ntel_context.h
/external/mesa3d/src/mesa/drivers/dri/intel/intel_batchbuffer.c
|
| 24bb3b399847bdb11f0008820c2c1bad1e21d499 |
28-Sep-2006 |
Michel Dänzer <michel@daenzer.net> |
Make driDrawableInitVBlank() initialize the sequence number.
This prevents the first wait for vertical blank from timing out when the X
server has been running for a long time.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_context.c
|
| 7b803d649a02fa071b6f82f28e2308e7845d11c4 |
22-Sep-2006 |
Brian Paul <brian.paul@tungstengraphics.com> |
fix the broken fallback string/debug stuff
ntel_tris.c
|
| 5174e7c18162d54bfa5985ce66dcbc5c2150ed7d |
22-Sep-2006 |
Brian Paul <brian.paul@tungstengraphics.com> |
remove extra indentation
ntel_tris.c
|
| d016d4e70f518a0221d63eddca482d56398ffe35 |
07-Sep-2006 |
Eric Anholt <anholt@FreeBSD.org> |
Fix a leak of the screen's option cache on cleanup (copied from radeon).
/external/mesa3d/src/mesa/drivers/dri/intel/intel_screen.c
|
| 5b4e7cdca4be195bbce4620f26b8e7f644862b79 |
02-Sep-2006 |
Roland Scheidegger <rscheidegger@gmx.ch> |
fix the presumably broken check for the allow_large_textures and vblank_mode options (same as bug 8042).
830_context.c
915_context.c
/external/mesa3d/src/mesa/drivers/dri/intel/intel_context.c
|
| e5bc35dd97bcc814069447d388db84da59990ddc |
28-Aug-2006 |
Brian Paul <brian.paul@tungstengraphics.com> |
remove unused var
/external/mesa3d/src/mesa/drivers/dri/intel/intel_context.c
|
| e365b82be110246b8c05193efc8479e681f618f3 |
28-Aug-2006 |
Brian Paul <brian.paul@tungstengraphics.com> |
fix the check for force_s3tc_enable (bug 8042)
/external/mesa3d/src/mesa/drivers/dri/intel/intel_context.c
|
| 092d14be92259d4210e3a2b5d4b5e18886bb4d4a |
26-Aug-2006 |
Alan Hourihane <alanh@tungstengraphics.com> |
Fix bug 8010 - locking issues.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_batchbuffer.c
|
| bd87c303e94659941a7c623d0b836e3ff317cfb4 |
18-Aug-2006 |
Alan Hourihane <alanh@tungstengraphics.com> |
Fix writemasks on texture arb fp instructions.
Cleanup invarient state emission.
830_context.h
830_metaops.c
830_vtbl.c
915_context.h
915_metaops.c
915_program.c
915_state.c
915_vtbl.c
ntel_context.h
/external/mesa3d/src/mesa/drivers/dri/intel/intel_batchbuffer.c
/external/mesa3d/src/mesa/drivers/dri/intel/intel_context.c
|
| 122629f27925a9dc50029bebc5079f87f416a7e1 |
20-Jul-2006 |
Brian Paul <brian.paul@tungstengraphics.com> |
Some structure renaming. Prefix vertex/fragment-related structs with
"gl_" to match other structs.
915_context.h
915_fragprog.c
ntel_tris.c
|
| 0b994ef5893c0fb59b36f2a723f74aa7c35e8502 |
15-Jun-2006 |
Keith Whitwell <keith@tungstengraphics.com> |
Call _mesa_resize_framebuffer() within intelWindowMoved(). Fixes
googleearth glitches.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_context.c
|
| 6254d5904366ae17cb707ee70ff1ce76092f9c81 |
12-Jun-2006 |
Alan Hourihane <alanh@tungstengraphics.com> |
fire vertices before context destruction.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_context.c
|
| d9736db6676948e06712d4bcba46b7040452f870 |
23-May-2006 |
Brian Paul <brian.paul@tungstengraphics.com> |
Add const qualifiers in a number of places.
ntel_tris.c
|
| a6f7f10efadb3c3e1aea6502b1c444189ba77124 |
23-May-2006 |
Brian Paul <brian.paul@tungstengraphics.com> |
prototype i915_udpate_fog() to silence warning
915_context.h
|
| 71b2504e0390fa19f133647c8686d830f8f40eb6 |
08-May-2006 |
Keith Whitwell <keith@tungstengraphics.com> |
updates to dri drivers for recent stencil changes
ntel_ioctl.c
|
| 86740f1593d8fba66a368f98037897f7570a71aa |
05-May-2006 |
Dave Airlie <airliedfreedesktop.org> |
remove temporary code from keithw, this in theory isn't used at the moment
anyways unless INTEL_BATCH is turned on
/external/mesa3d/src/mesa/drivers/dri/intel/intel_batchbuffer.c
|
| 2364d9abd3d95ef29cc7c169033f31f40863e5f0 |
05-May-2006 |
Dave Airlie <airliedfreedesktop.org> |
Fix i915 driver after stencil changes in Mesa 6.5
ntel_ioctl.c
|
| bb38cadb1c5f2dc13096a091bdaf61dc3e3cfa4d |
11-Apr-2006 |
Michal Krol <mjkrol@gmail.org> |
More GLSL code:
- use macros to access and modify render inputs bit-field;
- un-alias generic vertex attributes for ARB vertex calls;
- use MAX_VERTEX_PROGRAM_ATTRIBS (NV code) or MAX_VERTEX_ATTRIBS
(ARB code) in place of VERT_ATTRIB_MAX;
- define VERT_ATTRIB_GENERIC0..15 for un-aliased vertex
attributes for ARB_vertex_shader;
- fix generic attribute index range check in arbprogparse.c;
- interface GLSL varyings between vertex and fragment shader;
- use 64-bit optimised bitset (bitset.h) for render inputs;
830_context.h
830_vtbl.c
915_texprog.c
|
| e2af1da1d3578f23e67ab9e259a9d59fec34f25a |
07-Apr-2006 |
Alan Hourihane <alanh@tungstengraphics.com> |
Fix some warnings on x86_64
830_context.c
915_context.c
ntel_batchbuffer.h
ntel_context.h
ntel_ioctl.c
/external/mesa3d/src/mesa/drivers/dri/intel/intel_batchbuffer.c
/external/mesa3d/src/mesa/drivers/dri/intel/intel_pixel.c
/external/mesa3d/src/mesa/drivers/dri/intel/intel_tex.c
|
| a1a9858ca31e47b1e567b2ba94ffbf01c20231a6 |
06-Apr-2006 |
Brian Paul <brian.paul@tungstengraphics.com> |
update a couple MESA_FORMAT_Zxxx occurances
915_texstate.c
|
| a9bcf751030895494fc098f8d0ff56b2496bd993 |
06-Apr-2006 |
Brian Paul <brian.paul@tungstengraphics.com> |
Replace MESA_FORMAT_DEPTH_COMPONENT_FLOAT32 with 32-bit integer format.
This allows render to depth texture (we don't support floating pt. Z buffers).
Rename MESA_FORMAT_DEPTH_COMPONENT16/32 as MESA_FORMAT_Z16/32.
Software fallback for glCopyTexImage now uses integer temporary image instead
of float, eliminates a lot of float/int conversions.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_tex.c
|
| e80b9c24f4211dd99729eebbd4ed69f89a42cf40 |
05-Apr-2006 |
Dave Airlie <airliedfreedesktop.org> |
add tiling/fence support for the miniglx driver
erver/intel.h
erver/intel_dri.c
|
| 2e7af79f48a7bfa37c682ba8ab3426b4701fe58c |
05-Apr-2006 |
Dave Airlie <airliedfreedesktop.org> |
don't waste the reserved memory, take an approximation of the pool
allocator from the X.org driver - not as complicated
erver/intel_dri.c
|
| 027bb77e02cf38c553d1396a348783ddc1b7913c |
04-Apr-2006 |
Alan Hourihane <alanh@tungstengraphics.com> |
We always have a back buffer. Fixes visual problems.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_screen.c
|
| edd270228708e586f07d24f2b61d7014bfcf9f58 |
03-Apr-2006 |
Dave Airlie <airliedfreedesktop.org> |
add miniglx sources to i915
akefile
|
| 5bb5a1908f675360c4629b366a2cd2aa5791bcb8 |
03-Apr-2006 |
Dave Airlie <airliedfreedesktop.org> |
add pitch support and use new Width
erver/intel_dri.c
|
| 482d9dd21ddb7293a430ee1b34b6087391b064e1 |
01-Apr-2006 |
Eric Anholt <anholt@FreeBSD.org> |
Don't index box by the box's index within numClipRects; just dereference it.
Fixes drawing with more than one cliprect. (Keith Packard)
/external/mesa3d/src/mesa/drivers/dri/intel/intel_batchbuffer.c
|
| 9e8659f346d432b6e51a47e749995bb93ec40a1c |
01-Apr-2006 |
Eric Anholt <anholt@FreeBSD.org> |
Call driUpdateFramebufferSize when we've found an updated DRI drawable stamp,
like other drivers. Failure to do so resulted in incorrect buffer sizes for
resized windows.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_context.c
|
| f2ad1b60c0da11283b399008f491792790cea294 |
31-Mar-2006 |
Brian Paul <brian.paul@tungstengraphics.com> |
Dave Reveman's patch for GLX_MESA_copy_sub_buffer support
ntel_batchbuffer.h
ntel_screen.h
/external/mesa3d/src/mesa/drivers/dri/intel/intel_batchbuffer.c
/external/mesa3d/src/mesa/drivers/dri/intel/intel_context.c
/external/mesa3d/src/mesa/drivers/dri/intel/intel_screen.c
|
| aba49671500b4192ea92c658ccaef514407d508b |
31-Mar-2006 |
Eric Anholt <anholt@FreeBSD.org> |
The pitches of the driRenderbuffers are in bytes, so no need to multiply by cpp.
Fixes software fallbacks. (Keith Packard)
/external/mesa3d/src/mesa/drivers/dri/intel/intel_span.c
|
| 4ecb9f05321f20fd293b6cdeb26a7d0aab4e728f |
30-Mar-2006 |
Dave Airlie <airliedfreedesktop.org> |
Fix up some incorrect pointers and clear screen
erver/intel_dri.c
|
| 8b186e36957ca9a91a65e4a55655fb7b7f61b1ab |
30-Mar-2006 |
Dave Airlie <airliedfreedesktop.org> |
add initial miniglx files for i915, not integrated yet
erver/intel.h
erver/intel_dri.c
|
| e94be8d5c0b28c4eecf8492cb07ae9dff9026ada |
17-Feb-2006 |
Keith Whitwell <keith@tungstengraphics.com> |
Fix STENCIL_WRITE_MASK defn for bug 5902
830_reg.h
915_reg.h
|
| b77a225250ce1855b8a6d577b53ca836c33e671b |
08-Feb-2006 |
Alan Hourihane <alanh@tungstengraphics.com> |
Check DDX for 1.5.0
/external/mesa3d/src/mesa/drivers/dri/intel/intel_screen.c
|
| 4cd0e24f86a5e3fa67774be546f922ca241cb0ea |
06-Feb-2006 |
Dave Airlie <airliedfreedesktop.org> |
add vblank support to i915 driver
ntel_context.h
ntel_ioctl.c
ntel_ioctl.h
/external/mesa3d/src/mesa/drivers/dri/intel/intel_batchbuffer.c
/external/mesa3d/src/mesa/drivers/dri/intel/intel_context.c
/external/mesa3d/src/mesa/drivers/dri/intel/intel_screen.c
|
| e7276b7fa597f7914f7e10a2e50dae36ae50e10b |
03-Feb-2006 |
Roland Scheidegger <rscheidegger@gmx.ch> |
replace the texture level hack used in radeon/r200 to allow larger textures with different methods to calculate the announced maximum texture sizes. Default is still the same (that is, radeon/r200 default to not announce anything which might not fit, i830/i915 default to 1 texture must fit). Bug #5785.
830_context.c
915_context.c
/external/mesa3d/src/mesa/drivers/dri/intel/intel_screen.c
|
| f3134ca7add4a1894f119defde76fbe625a173a3 |
24-Jan-2006 |
Alan Hourihane <alanh@tungstengraphics.com> |
use front.size instead of sPriv->fbSize
/external/mesa3d/src/mesa/drivers/dri/intel/intel_screen.c
|
| f7360cd42d320b39889b1d9277284ad00e2c1f3d |
24-Jan-2006 |
Alan Hourihane <alanh@tungstengraphics.com> |
use screen->front.map instead of pFB from libdri
/external/mesa3d/src/mesa/drivers/dri/intel/intel_screen.c
|
| 39c492bb14d706ffa8bf04f78048c05de735492b |
23-Jan-2006 |
Alan Hourihane <alanh@tungstengraphics.com> |
Add Intel 945GM support
Add rotation support
(Tungsten Graphics)
akefile
830_context.h
830_metaops.c
830_state.c
830_tex.c
830_vtbl.c
915_context.h
915_metaops.c
915_reg.h
915_state.c
915_tex.c
915_texstate.c
915_vtbl.c
ntel_batchbuffer.h
ntel_context.h
ntel_ioctl.c
ntel_ioctl.h
ntel_rotate.c
ntel_rotate.h
ntel_screen.h
ntel_tex.h
ntel_texmem.c
erver/i830_common.h
erver/i830_dri.h
/external/mesa3d/src/mesa/drivers/dri/intel/intel_batchbuffer.c
/external/mesa3d/src/mesa/drivers/dri/intel/intel_context.c
/external/mesa3d/src/mesa/drivers/dri/intel/intel_pixel.c
/external/mesa3d/src/mesa/drivers/dri/intel/intel_screen.c
/external/mesa3d/src/mesa/drivers/dri/intel/intel_state.c
/external/mesa3d/src/mesa/drivers/dri/intel/intel_tex.c
|
| cabecbd3146bf010bb478c9474b34d77afc7431b |
30-Dec-2005 |
Keith Whitwell <keith@tungstengraphics.com> |
recalculate state on drawable changes
/external/mesa3d/src/mesa/drivers/dri/intel/intel_context.c
/external/mesa3d/src/mesa/drivers/dri/intel/intel_state.c
|
| e6e1c3fc11cb421ce3a703b81e8fe7057c5134a9 |
22-Nov-2005 |
Keith Whitwell <keith@tungstengraphics.com> |
Use correct enums for program output variables. Fixes
fp/tri-depthwrite.
915_fragprog.c
|
| 1a61462318c00f61faaa88111248d89eceac1c77 |
20-Nov-2005 |
Brian Paul <brian.paul@tungstengraphics.com> |
s/Saturate/SaturateMode/
915_fragprog.c
|
| e31ac052236ea615b4995f9ec301d8af4b864531 |
20-Nov-2005 |
Brian Paul <brian.paul@tungstengraphics.com> |
Make Saturate a 2-bit field again, renamed to SaturateMode with three
possible values: SATURATE_OFF, SATURATE_ZERO_ONE and SATURATE_PLUS_MINUS_ONE.
915_fragprog.c
|
| 47e511c36d5e24b1b82fc8fb47970c83f45cc148 |
19-Nov-2005 |
Brian Paul <brian.paul@tungstengraphics.com> |
remove #include arbfragparse.h, s/PI/M_PI/
915_fragprog.c
|
| de99760bf3511d05185799c4fb4347f9e5f420f4 |
12-Nov-2005 |
Brian Paul <brian.paul@tungstengraphics.com> |
Move stuff common to vertex/fragment_program into the base class, including:
Instructions, InputsRead, OutputsWritten, and Parameters.
Also, added debug functions: _mesa_print_instruction(),
_mesa_print_program_parameters() and revamp _mesa_print_program().
915_fragprog.c
ntel_tris.c
|
| 9ba4ef3102196844d663b82565c87765fa240e16 |
05-Nov-2005 |
Brian Paul <brian.paul@tungstengraphics.com> |
s/TexSrcIdx/TexSrcTarget/
915_fragprog.c
|
| 7e807510d8c3e88ee7ae6c697393201cf08f992f |
05-Nov-2005 |
Brian Paul <brian.paul@tungstengraphics.com> |
Unify vertex/fragment program instuctions.
Based on patch by Ian (#4967) but also unify instruction opcodes.
915_fragprog.c
|
| 05051037101dfa053798cf5ad91d1975fd1aa6a7 |
01-Nov-2005 |
Brian Paul <brian.paul@tungstengraphics.com> |
Re-org and clean-up of vertx/fragment program limits (instructions,
temporaries, parameters, etc).
glGetProgramivARB() now returns all the right things.
Updated i915 and r300 code to initialize program native limits and
current program's native instruction/temporary/etc counts.
915_context.c
915_program.c
|
| a9fc8ba756dd25a07dc19058fe60f65bda82a055 |
05-Oct-2005 |
Brian Paul <brian.paul@tungstengraphics.com> |
In gl_texture_image replace IntFormat with InternalFormat and Format with
_BaseFormat to be consistant with gl_renderbuffer.
830_texstate.c
915_texprog.c
915_texstate.c
/external/mesa3d/src/mesa/drivers/dri/intel/intel_tex.c
|
| 878c371e6cf6eb28afacc482d8aeaa0119f00d5b |
13-Sep-2005 |
Brian Paul <brian.paul@tungstengraphics.com> |
Replace ctx->Driver.StencilOp/Func/Mask() functions with
ctx->Driver.Stencil*Separate() functions.
830_state.c
915_state.c
/external/mesa3d/src/mesa/drivers/dri/intel/intel_context.c
|
| 402b2bea640ebf69f78d8122f98435dd3bbeb7df |
10-Sep-2005 |
Brian Paul <brian.paul@tungstengraphics.com> |
Add offset and pitch fields to intelRegion. Remove frontOffset, frontPitch,
backOffset, backPitch, depthOffset, depthPitch, textureOffset fields.
830_metaops.c
830_state.c
915_metaops.c
915_state.c
ntel_ioctl.c
ntel_screen.h
/external/mesa3d/src/mesa/drivers/dri/intel/intel_batchbuffer.c
/external/mesa3d/src/mesa/drivers/dri/intel/intel_pixel.c
/external/mesa3d/src/mesa/drivers/dri/intel/intel_screen.c
/external/mesa3d/src/mesa/drivers/dri/intel/intel_state.c
/external/mesa3d/src/mesa/drivers/dri/intel/intel_tex.c
|
| 036a99452d26167b70cadafb97b7e77ebdafd78c |
10-Sep-2005 |
Roland Scheidegger <rscheidegger@gmx.ch> |
add _tnl_arb_vertex_program_stage to all drivers which already have _tnl_vertex_program_stage. Fixes crashes when using vertex programs. Tested on r200 only (fix by Keith Whitwell)
/external/mesa3d/src/mesa/drivers/dri/intel/intel_context.c
|
| a3dd2ce29e2d7f1003d420b49ec678500645e728 |
10-Sep-2005 |
Brian Paul <brian.paul@tungstengraphics.com> |
remove the redundant textureSize field, use tex.size instead, it's always the same value
830_context.c
830_texstate.c
915_context.c
915_texstate.c
ntel_screen.h
/external/mesa3d/src/mesa/drivers/dri/intel/intel_screen.c
/external/mesa3d/src/mesa/drivers/dri/intel/intel_tex.c
|
| b15f46a093b2be2a6c630d8f3a2848627a34d728 |
08-Sep-2005 |
Keith Whitwell <keith@tungstengraphics.com> |
Treat NegateBase as a bitfield, not a boolean.
915_fragprog.c
|
| 61ba6b5a74625a01e07ae267c6e4ebf192434e40 |
05-Sep-2005 |
Brian Paul <brian.paul@tungstengraphics.com> |
Add new void *addr and __DRIdrawablePrivate parameters to
driNewRenderbuffer().
/external/mesa3d/src/mesa/drivers/dri/intel/intel_screen.c
|
| eae73dbd916d3109224fdb938120acd1abb6b646 |
04-Sep-2005 |
Brian Paul <brian.paul@tungstengraphics.com> |
Use InitPointers helper
/external/mesa3d/src/mesa/drivers/dri/intel/intel_span.c
|
| 2b81c8999f32999ee2e5822c4828c7325e3fe1ca |
03-Sep-2005 |
Brian Paul <brian.paul@tungstengraphics.com> |
SetBuffer, renderbuffer changes
ntel_context.h
/external/mesa3d/src/mesa/drivers/dri/intel/intel_screen.c
/external/mesa3d/src/mesa/drivers/dri/intel/intel_span.c
/external/mesa3d/src/mesa/drivers/dri/intel/intel_state.c
|
| f1d269060b050bbf3d7cc751c3c7333d795fb215 |
01-Sep-2005 |
Brian Paul <brian.paul@tungstengraphics.com> |
use char* instead of GLubyte* in i915_program_error() to silence warnings
915_program.c
915_program.h
|
| 513a553d4af8016a91479cddff3c0397ddd95279 |
31-Aug-2005 |
Brian Paul <brian.paul@tungstengraphics.com> |
silence fprintf and casting warnings
ntel_ioctl.c
|
| 2735b33638309a306257f13bec52389292cf8ab7 |
25-Aug-2005 |
Brian Paul <brian.paul@tungstengraphics.com> |
remove stray references to ctx->Depth.OcclusionTest
830_metaops.c
/external/mesa3d/src/mesa/drivers/dri/intel/intel_pixel.c
|
| dabec11d277e68b6940e741651e61102767240b9 |
15-Aug-2005 |
Alan Hourihane <alanh@tungstengraphics.com> |
Add Egberts fixes for 64bit architectures
Add additional checks for the *DRIRec info structure passed in from the
device driver. This ensures that things fallback to indirect rendering if
the DDX driver has had modifications (i.e. removal of the drmAddress field).
/external/mesa3d/src/mesa/drivers/dri/intel/intel_screen.c
|
| 69dc32cfac945bf664ddfbd6f0116404f893e66e |
14-Aug-2005 |
Alan Hourihane <alanh@tungstengraphics.com> |
Add a check which compares the passed in size of the DDX driver private DRI
structure to the 3D drivers view of it, and abort if they don't match.
This traps the case with the drmAddress removal in the DDX driver.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_screen.c
|
| 928218a283b5a3d72350d94543ea8d256bd7b7c5 |
05-Aug-2005 |
Alan Hourihane <alanh@tungstengraphics.com> |
remove the drmAddress
erver/i830_dri.h
|
| df68d11b47ffda570b77de6a11bf1afc311f86b2 |
29-Jul-2005 |
Jon Smirl <jonsmirl@gmail.com> |
Fix a == vs !- typo for glx_enable_extension
/external/mesa3d/src/mesa/drivers/dri/intel/intel_screen.c
|
| f7c9eafa856623d5ce72afb8b20b7ccbcc3e671d |
28-Jul-2005 |
Ian Romanick <idr@us.ibm.com> |
glxEnableExtension is a platform-specific function exported by the loader.
Therefore, drivers should not require it to run.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_screen.c
|
| 1585c234e0db4bfb7cd85c4111594f6da1582e6f |
28-Jul-2005 |
Ian Romanick <idr@us.ibm.com> |
Major rip-up of internal function insertion interface. The old
_glapi_add_entrypoint has been replaced by a new routine called
_glapi_add_dispatch. This new routine dynamically assignes dispatch offsets
to functions added. This allows IHVs to add support for extension functions
that do not have assigned dispatch offsets.
It also means that a driver has no idea what offset will be assigned to a
function. The vast majority of the changes in this commit account for that.
An additional table, driDispatchRemapTable, is added. Functions not in the
Linux OpenGL ABI (i.e., anything not in GL 1.2 + ARB_multitexture) has a
fixed offset in this new table. The entry in this table specifies the
offset in of the function in the real dispatch table.
The internal interface was also bumped from version 20050725 to 20050727.
This has been tested with various programs in progs/demos on:
radeon (Radeon Mobility M6)
r128 (Rage 128 Pro)
mga (G400)
830_context.c
915_context.c
/external/mesa3d/src/mesa/drivers/dri/intel/intel_context.c
/external/mesa3d/src/mesa/drivers/dri/intel/intel_screen.c
|
| a7df74ea024d5897040124784ed908e4c4ea4fe4 |
27-Jul-2005 |
Alan Hourihane <alanh@tungstengraphics.com> |
typo
/external/mesa3d/src/mesa/drivers/dri/intel/intel_screen.c
|
| 36d6e9df16face24cb173a311a74b6bb6eb3425f |
27-Jul-2005 |
Alan Hourihane <alanh@tungstengraphics.com> |
support GLX_DIRECT_COLOR in 1.4.0
/external/mesa3d/src/mesa/drivers/dri/intel/intel_screen.c
|
| 13613986004fcd43e8079b23d8128c2d572bca76 |
26-Jul-2005 |
Alan Hourihane <alanh@tungstengraphics.com> |
Bump the required ddx to 1.4.0 as drmAddress has been removed so that 32/64bit
combinations work.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_screen.c
|
| 5f1ba3e21b62cee1a4f900a2e6964728f3eeea9b |
26-Jul-2005 |
Ian Romanick <idr@us.ibm.com> |
Fixes the glXGetProcAddress portion of the interface. Most of the functions
that are currently obtained via glXGetProcAddress and all of the XF86DRI
functions are replaced with a funciton table. This table will be passed to
__driCreateNewScreen.
One of the functions in the table is getProcAddress. This allows some
loaders to expose functionality not in all loaders. This will be immediatly
used for glxEnableExtension (formerly known to drivers as
__glXScrEnableExtension). libGL (and in the future libglx) expose this
function so that drivers can enable GLX extensions. libEGL should exposed
eglEnableExtension to enable EGL extensions. The same function cannot be
used for both because the extensions have different names and (possibly)
different semantics. Drivers can optionally use one, both, or neither.
The key parts are in the __DRIinterfaceMethodsRec structure in
dri_interface.h. A pointer to one of these structures is passed into
__driCreateNewScreen. Because of this, the version of the API is bumped to
20050725. Since the previous version(s) were never in a release, their
existance is erased.
I was actually a little surprised by how much code this cuts from the
drivers. A lot of glXGetProcAddress calls disappear, and a lot of
version checks go with them. Nice.
The one thing I'm not sure of is removing __glXInitialize. For some
reason that function was in the glXGetProcAddress table, but *nothing*
in the Mesa tree used it. Did something with DRI conf. use this
function? It seems odd...
/external/mesa3d/src/mesa/drivers/dri/intel/intel_screen.c
|
| c39bf5e273a4995a279ae2af59fc29e06ab47e29 |
24-Jul-2005 |
Ian Romanick <idr@us.ibm.com> |
All elements of pre-DRI_NEW_INTERFACE_ONLY are removed. This allows
1,402 lines of code to be removed from Mesa (drivers and libGL). The
big winner is dri_util.c.
Primary changes are:
1. Remove all "deprecated" entry-points from the various structures in
dri_interface.h.
2. Rename the remaining fields to removed "version numbers." So,
bindContext3 becomes bindContext. Functions with "New" in the name
(e.g., CreateNewContext) were *not* changed, but that is an option.
Having "New" in the name is less annoying to me than having "3" in the name.
3. Remove all compatibility code that handles cases where the driver or
the loader is too old to support the latest interfaces.
4. Append the API version to the __driCreateNewScreen function name.
This is currently done by hand. In the future (i.e., the next time we
make an incompatible change to the interface) we'll want to come up with
a better way to do this. This prevents old loaders from being able to load
new (incompatible) drivers.
5. Bump the API version to 20050722. All drivers (by way of dri_util.c)
require this version.
6. All drivers are *required* to expose GLX_SGIX_fbconfig and
GLX_OML_swap_method (or the moral equivalents). Support for these
functions in implicit in the use of the "new" interface.
7. Some cases still exist that need to be compiled differently in a loader
or core Mesa versus in a driver. These are identified by the define
IN_DRI_DRIVER.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_screen.c
|
| cf5b2f7419b28cdd533c60e205d5a90d96e85c8e |
01-Jul-2005 |
Roland Scheidegger <rscheidegger@gmx.ch> |
remove common macros used in the span functions of most drivers from the individual drivers and put them in common code. It is still possible for a driver to define its own macros if it has special needs. This affects CLIPPIXEL, CLIPSPAN, HW_CLIPLOOP, HW_ENDCLIPLOOP, and for drivers using the spantmp2 template also GET_SRC_PTR and GET_DST_PTR.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_span.c
|
| c212abf99af494f024b0b981a83350f7ac9821ef |
30-Jun-2005 |
Ian Romanick <idr@us.ibm.com> |
Replace add_newer_entrypoints (src/mesa/main/context.c) with
device-specific code. A new Python script
(src/mesa/glapi/extension_helper.py) generates a list of all
entry-points for all known extensions. Each driver the selects only
the extensions that it needs and enables the via either
driInitExtensions or driInitSingleExtension.
This code has been compile-tested on a drivers, but has only been
run-tested on mga and i915 (on i830 hardware).
These changes were discussed at length on the mesa3d-dev mailing list.
http://marc.theaimsgroup.com/?t=111947074700001&r=1&w=2
830_context.c
915_context.c
/external/mesa3d/src/mesa/drivers/dri/intel/intel_context.c
|
| 628b18b8cac5e691e7145deb1026e91d3cf03094 |
31-May-2005 |
Alan Hourihane <alanh@tungstengraphics.com> |
Add Intel(R) 945G support (Keith Whitwell, Tungsten Graphics)
915_texstate.c
ntel_context.h
/external/mesa3d/src/mesa/drivers/dri/intel/intel_context.c
/external/mesa3d/src/mesa/drivers/dri/intel/intel_screen.c
|
| b70a47736ad42bf10a9d6d051204fb140c1c67e8 |
20-May-2005 |
Ian Romanick <idr@us.ibm.com> |
Add support for modes with a depth-buffer but no stencil-buffer. This
eliminates various "3D driver claims to not support visual" messages in
16-bit color mode.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_screen.c
|
| 2860e5f5360aeb06f1f6f973e696d53a3da3f398 |
18-May-2005 |
Keith Whitwell <keith@tungstengraphics.com> |
Disable leftover debug statements
ntel_tris.c
|
| e57d5c47428313a846f587e02693fc4fb2e30dc6 |
10-May-2005 |
Keith Whitwell <keith@tungstengraphics.com> |
fix some valgrind complaints
ntel_ioctl.c
/external/mesa3d/src/mesa/drivers/dri/intel/intel_screen.c
|
| ab81d1fd999b1696df4c733a86b651e4c38b9bcc |
10-May-2005 |
Keith Whitwell <keith@tungstengraphics.com> |
don't be fooled into emitting padding for wpos when not used
915_fragprog.c
915_program.c
|
| 948fa3b295d384592ebc9396413a38aba4edf4a6 |
10-May-2005 |
Keith Whitwell <keith@tungstengraphics.com> |
get fog working with _TexEnvProgram
915_fragprog.c
915_state.c
915_vtbl.c
|
| 435eff8b852f59e13554a57f83a48bf8035ec794 |
09-May-2005 |
Keith Whitwell <keith@tungstengraphics.com> |
i915 will use _TexEnvProgram (if active)
915_context.c
915_context.h
915_fragprog.c
915_state.c
915_vtbl.c
ntel_tris.c
|
| ff6723e3264df15d443a0d6af8baafbab141089c |
09-May-2005 |
Keith Whitwell <keith@tungstengraphics.com> |
check for null DrawBuffer values
/external/mesa3d/src/mesa/drivers/dri/intel/intel_context.c
/external/mesa3d/src/mesa/drivers/dri/intel/intel_pixel.c
/external/mesa3d/src/mesa/drivers/dri/intel/intel_state.c
|
| 1180fc13db5fba0a3ec95630f520128f628c58ac |
09-May-2005 |
Keith Whitwell <keith@tungstengraphics.com> |
Fallback (rather than fail) on unknown program targets.
915_fragprog.c
|
| e7769cb34898ca20adb5b0e329161e6321403fc9 |
05-May-2005 |
Adam Jackson <ajax@freedesktop.org> |
Refactor COMMON_SOURCES up to Makefile.template
akefile
|
| b3e878ad900b9ab9d417fb31175a116c9dc1edc8 |
05-May-2005 |
Adam Jackson <ajax@freedesktop.org> |
Add drirenderbuffer.c to COMMON_SOURCES
akefile
|
| e4b2356c07d31fbeeabb13b2fb47db703b473080 |
04-May-2005 |
Brian Paul <brian.paul@tungstengraphics.com> |
Major check-in of changes for GL_EXT_framebuffer_object extension.
Main driver impacts:
- new code for creating the Mesa GLframebuffer
- new span/pixel read/write code
Some drivers not yet updated/tested.
830_metaops.c
915_metaops.c
ntel_ioctl.c
ntel_span.h
/external/mesa3d/src/mesa/drivers/dri/intel/intel_batchbuffer.c
/external/mesa3d/src/mesa/drivers/dri/intel/intel_context.c
/external/mesa3d/src/mesa/drivers/dri/intel/intel_screen.c
/external/mesa3d/src/mesa/drivers/dri/intel/intel_span.c
/external/mesa3d/src/mesa/drivers/dri/intel/intel_state.c
|
| bf87f864934e174b3493592d5d107f012aac0842 |
23-Apr-2005 |
Keith Whitwell <keith@tungstengraphics.com> |
First pass at updating these drivers with pipeline_stage struct changes.
ntel_render.c
|
| 7c26b61f9366a397e353d7b7f1f1d1f6d0dcd0c7 |
21-Apr-2005 |
Keith Whitwell <keith@tungstengraphics.com> |
Reduce the size of mesa's internal fragment and vertex program
representations by switching to packed structures for registers and
instructions.
915_fragprog.c
|
| ddfa61ee194b9d4ec88d499c71cd6810e7f6a022 |
20-Jan-2005 |
Alan Hourihane <alanh@tungstengraphics.com> |
Enclose passed macro values in brackets to ensure correct read/write span
values.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_span.c
|
| 7e3379b1a0f1837e432323f60885e5c8e38c2699 |
07-Jan-2005 |
Ian Romanick <idr@us.ibm.com> |
Revert some accidental cross-merge changes. Remove i915GetString. Migrate
a couple extensions that appeared in both device-specific card_extensions
strings to the shared one.
830_context.c
915_context.c
/external/mesa3d/src/mesa/drivers/dri/intel/intel_context.c
|
| a2db56b34b7fe0fb58441d293ba56b8ed48141a8 |
06-Jan-2005 |
Alan Hourihane <alanh@tungstengraphics.com> |
Add Intel i915GM support, and these extensions.
* GL_ARB_texture_cube_map
* GL_EXT_blend_equation_separate
* GL_ATI_blend_equation_separate
* GL_ARB_point_parameters
* GL_NV_blend_square
* GL_EXT_cull_vertex
* GL_ARB_depth_texture
* GL_SGIX_depth_texture
* GL_ARB_shadow
* GL_EXT_shadow_funcs
* GL_3DFX_texture_compression_FXT1
(Keith Whitwell, Tungsten Graphics)
830_reg.h
830_state.c
915_context.c
915_metaops.c
915_reg.h
915_state.c
915_tex.c
915_texprog.c
915_texstate.c
ntel_context.h
ntel_ioctl.c
/external/mesa3d/src/mesa/drivers/dri/intel/intel_context.c
/external/mesa3d/src/mesa/drivers/dri/intel/intel_screen.c
/external/mesa3d/src/mesa/drivers/dri/intel/intel_state.c
/external/mesa3d/src/mesa/drivers/dri/intel/intel_tex.c
|
| d9fcfa27976788365c2b7846e13d3081bb3aa9d1 |
27-Dec-2004 |
Adam Jackson <ajax@freedesktop.org> |
Bug #1859: Initialize 'size' before first use in intelTryReadPixels()
/external/mesa3d/src/mesa/drivers/dri/intel/intel_pixel.c
|
| d16aa9859c9f5a3a7bf74a13dbbdd20688d3ad84 |
16-Dec-2004 |
Adam Jackson <ajax@freedesktop.org> |
Also PUBLICize the config option table
/external/mesa3d/src/mesa/drivers/dri/intel/intel_screen.c
|
| 3d7aec70c983ed12beac0ad0aa528ac270b6b01a |
16-Dec-2004 |
Adam Jackson <ajax@freedesktop.org> |
Mark __driCreateNewScreen PUBLIC
/external/mesa3d/src/mesa/drivers/dri/intel/intel_screen.c
|
| fc84bec654cced24883696bf97db2b52c86bc721 |
14-Dec-2004 |
Alan Hourihane <alanh@tungstengraphics.com> |
fix warning
830_context.c
|
| 38b317d508a2a3a4cc6d700ebca80c3b06c913e2 |
14-Dec-2004 |
Alan Hourihane <alanh@tungstengraphics.com> |
uint*t -> u_int*t changes
830_state.c
830_texblend.c
915_fragprog.c
ntel_context.h
ntel_ioctl.c
/external/mesa3d/src/mesa/drivers/dri/intel/intel_screen.c
|
| 65a66f5bc37383c00423c21baf8ba9d6771e0259 |
27-Nov-2004 |
Brian Paul <brian.paul@tungstengraphics.com> |
Remove _mesa_ResizeBuffersMESA() call from _mesa_set_viewport().
Now, the driver's Viewport routine should call _mesa_ResizeBuffersMESA()
if necessary.
Cleaned up code related to GLframebuffer width/height initialization.
Set initial viewport/scissor params in _mesa_make_current2(), instead of
in the drivers' MakeCurrent functions.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_context.c
|
| d09209f5530e8bba78e4e0ec62b2027c588cc8f3 |
08-Oct-2004 |
Eric Anholt <anholt@FreeBSD.org> |
Add Roland Scheidegger's S3TC patch. This patch does not implement the
(patented) S3TC/DXTC algorithms, but adds an option to dlopen a library module
providing functions to do so. Because it uses dlopen, it is only enabled if
USE_EXTERNAL_DXTN_LIB=1 is defined (which is only in linux-dri config, so far).
It adds support for S3TC to several DRI drivers, and adds a DRI config option to
force enabling S3TC even if the software compression/decompression is
unavailable. This may allow people to use apps that require S3TC even though
they don't have a license to implement the patented material themselves, if
those apps use precompressed textures.
Ideally we would get permission from the current holder of the patents to
implement the algorithm in Mesa, at which point the dlopen mess could go away.
Until then, this allows some to run applications they couldn't otherwise, and
hopefully will provide us with more push to get the final step of getting that
permission done.
830_texstate.c
915_texstate.c
ntel_context.h
ntel_screen.h
/external/mesa3d/src/mesa/drivers/dri/intel/intel_context.c
/external/mesa3d/src/mesa/drivers/dri/intel/intel_screen.c
/external/mesa3d/src/mesa/drivers/dri/intel/intel_tex.c
|
| 53f82c5aadbb15585754bfacf3237093eccdb2ce |
02-Oct-2004 |
Brian Paul <brian.paul@tungstengraphics.com> |
added support for GL_ARB_draw_buffers
/external/mesa3d/src/mesa/drivers/dri/intel/intel_context.c
/external/mesa3d/src/mesa/drivers/dri/intel/intel_state.c
|
| c59270e2b82abe9bcb0af6a1593b81772f6306d3 |
19-Sep-2004 |
Ian Romanick <idr@us.ibm.com> |
Add GL_ARB_texture_cube_map support for i830. Most of the code was
lifted from the i915 side. i830 will now report version 1.3! Hurrah!
With the exception of GL_EXT_texture_compression_s3tc, the i830 driver
now supports all the extensions that its Windows counterpart supports.
830_context.c
830_context.h
830_reg.h
830_texstate.c
830_vtbl.c
915_context.c
/external/mesa3d/src/mesa/drivers/dri/intel/intel_context.c
|
| b9bbe780313d584974307389a67ca94ad65de3c0 |
19-Sep-2004 |
Ian Romanick <idr@us.ibm.com> |
Added GL_ARB_point_parameters support for i830.
830_vtbl.c
915_context.c
/external/mesa3d/src/mesa/drivers/dri/intel/intel_context.c
|
| be3359bad5930a7aa27237d48aa67e6c7b11975b |
19-Sep-2004 |
Ian Romanick <idr@us.ibm.com> |
Merge in all the i830 functional differences from the old i830 driver.
830_context.c
830_context.h
830_metaops.c
830_state.c
830_texblend.c
915_context.c
/external/mesa3d/src/mesa/drivers/dri/intel/intel_context.c
|
| 535408addad103421f8cc82705385de754871963 |
31-Aug-2004 |
Keith Whitwell <keith@tungstengraphics.com> |
The i915 driver was merged after EMIT_*_BGR bug was fixed. This brings
the driver into line with the correct meaning of those symbols
and fixes color corruptions.
830_vtbl.c
915_fragprog.c
915_texprog.c
|
| 1cdfb6911638c65fd7659152d55b2f14e6adade9 |
14-Aug-2004 |
Dave Airlie <airliedfreedesktop.org> |
bring over change from xorg trunk - let build on non-i386
ntel_tris.c
|
| 56999adb21648d2578ed562269f5a8df6c79aeff |
14-Aug-2004 |
Dave Airlie <airliedfreedesktop.org> |
bring over build fix from xorg tree
ntel_context.h
|
| 782a32b847d097c33a8fc44d3443be08f967e616 |
20-Jul-2004 |
Brian Paul <brian.paul@tungstengraphics.com> |
fix compare w/ zero warnings (bug 988766)
915_debug.c
|
| 84e6b16d8fcaaf676474488d369d2df0c2117160 |
15-Jul-2004 |
Dave Airlie <airliedfreedesktop.org> |
add debugging for compresssed textures
/external/mesa3d/src/mesa/drivers/dri/intel/intel_tex.c
|
| c058917343e51610ddc4f1ad32e3f02d7c131129 |
15-Jul-2004 |
Dave Airlie <airliedfreedesktop.org> |
fix up heights for i830/i915 texture compression
830_texstate.c
915_texstate.c
|
| 78e19b5f9891705e845f2d21a4f7370504fd0d31 |
15-Jul-2004 |
Dave Airlie <airliedfreedesktop.org> |
move config options to same place as other drivers (again for S3TC patch later)
/external/mesa3d/src/mesa/drivers/dri/intel/intel_context.c
/external/mesa3d/src/mesa/drivers/dri/intel/intel_screen.c
|
| 620c998b165da6b26b61b6f750bf97339798e48c |
15-Jul-2004 |
Dave Airlie <airliedfreedesktop.org> |
use a switch statement makes integrating the s3tc patch easier
/external/mesa3d/src/mesa/drivers/dri/intel/intel_tex.c
|
| 11a03a18addacb2c893786830331029e7ab79f93 |
15-Jul-2004 |
Dave Airlie <airliedfreedesktop.org> |
enable FXT1 texture compression for ixxx chipsets
commented out Keiths extensions strings
830_context.c
830_texstate.c
915_texstate.c
/external/mesa3d/src/mesa/drivers/dri/intel/intel_context.c
/external/mesa3d/src/mesa/drivers/dri/intel/intel_tex.c
|
| 43942fd5e32b2c7e64959ba2ab5901a4ef79f228 |
15-Jul-2004 |
Dave Airlie <airliedfreedesktop.org> |
move over changes to intel driver from i830 driver for modes
/external/mesa3d/src/mesa/drivers/dri/intel/intel_screen.c
|
| 550009441375e55bda3896eba7375b9228c7fdec |
06-Jul-2004 |
Jon Smirl <jonsmirl@gmail.com> |
Convert miniglx to use Ian's fancy new driver config code.
This removes the miniglx driver function InitContextModes().
All of the server directories were edited to remove the implementations.
ntel_ioctl.c
|
| aaebfc88c08c79cd70f1e0d1d262a25e9ded47d1 |
04-Jul-2004 |
Jon Smirl <jonsmirl@gmail.com> |
Patch removes _SOLO definition needed for mesa-solo. mesa-solo
uses the NEW_INTERFACE now so _SOLO isn't necessary anymore.
Tested with the hardware that I own.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_screen.c
|
| 3d38361b718d490e1e7fda64519952ec887cd149 |
01-Jul-2004 |
Keith Whitwell <keith@tungstengraphics.com> |
Rename the various function types in t_context.h to include a tnl_ prefix.
ntel_tris.c
|
| c3c8c71846fb507b57282128d53ba9666e66fe03 |
01-Jul-2004 |
Keith Whitwell <keith@tungstengraphics.com> |
Remove __driRegisterExtensions
/external/mesa3d/src/mesa/drivers/dri/intel/intel_screen.c
|
| 869fc59b63ee99ced26fbfa02492abb8cd16586d |
01-Jul-2004 |
Alan Hourihane <alanh@tungstengraphics.com> |
fix for older gcc's (from freedesktop bug id #419)
830_vtbl.c
915_vtbl.c
|
| 1e93e197f962a3133eba08c91aa39874ee4cbaba |
18-Jun-2004 |
Keith Whitwell <keith@tungstengraphics.com> |
Use correct macros for packing pixel colors -- this bug is probably
present in many of the other drivers as well.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_span.c
|
| 594c3f67ac8fceb061e47b090ec4d149c55a1940 |
18-Jun-2004 |
Keith Whitwell <keith@tungstengraphics.com> |
add missing license texts
830_context.c
830_context.h
830_metaops.c
830_reg.h
830_state.c
830_tex.c
830_texblend.c
830_texstate.c
830_vtbl.c
915_context.c
915_context.h
915_debug.c
915_fragprog.c
915_metaops.c
915_program.c
915_program.h
915_reg.h
915_state.c
915_tex.c
915_texprog.c
915_texstate.c
915_vtbl.c
ntel_batchbuffer.h
ntel_context.h
ntel_ioctl.c
ntel_ioctl.h
ntel_reg.h
ntel_render.c
ntel_screen.h
ntel_span.h
ntel_tex.h
ntel_tris.c
ntel_tris.h
/external/mesa3d/src/mesa/drivers/dri/intel/intel_batchbuffer.c
/external/mesa3d/src/mesa/drivers/dri/intel/intel_context.c
/external/mesa3d/src/mesa/drivers/dri/intel/intel_pixel.c
/external/mesa3d/src/mesa/drivers/dri/intel/intel_screen.c
/external/mesa3d/src/mesa/drivers/dri/intel/intel_span.c
/external/mesa3d/src/mesa/drivers/dri/intel/intel_state.c
/external/mesa3d/src/mesa/drivers/dri/intel/intel_tex.c
|
| 6d43ce54024ede3ef91fc00d00bf19b815f6396e |
16-Jun-2004 |
Keith Whitwell <keith@tungstengraphics.com> |
Fix batch.ptr when dropping a batchbuffer segment due to zero cliprects.
ntel_ioctl.c
|
| 7cbc9663240bf43c5715607c2b1e53a0e04af71c |
11-Jun-2004 |
Alan Hourihane <alanh@tungstengraphics.com> |
re-enable rect texture
830_context.c
915_context.c
|
| 41b58954e1742493452b91d9ecdb761db5de3bed |
10-Jun-2004 |
Keith Whitwell <keith@tungstengraphics.com> |
New driver for i915 as well as older i830/i845/i865 chipsets.
akefile
830_context.c
830_context.h
830_metaops.c
830_reg.h
830_state.c
830_tex.c
830_texblend.c
830_texstate.c
830_vtbl.c
915_context.c
915_context.h
915_debug.c
915_fragprog.c
915_metaops.c
915_program.c
915_program.h
915_reg.h
915_state.c
915_tex.c
915_texprog.c
915_texstate.c
915_vtbl.c
ntel_batchbuffer.h
ntel_context.h
ntel_ioctl.c
ntel_ioctl.h
ntel_reg.h
ntel_render.c
ntel_screen.h
ntel_span.h
ntel_tex.h
ntel_tris.c
ntel_tris.h
erver/i830_common.h
erver/i830_dri.h
/external/mesa3d/src/mesa/drivers/dri/intel/intel_batchbuffer.c
/external/mesa3d/src/mesa/drivers/dri/intel/intel_context.c
/external/mesa3d/src/mesa/drivers/dri/intel/intel_pixel.c
/external/mesa3d/src/mesa/drivers/dri/intel/intel_screen.c
/external/mesa3d/src/mesa/drivers/dri/intel/intel_span.c
/external/mesa3d/src/mesa/drivers/dri/intel/intel_state.c
/external/mesa3d/src/mesa/drivers/dri/intel/intel_tex.c
|