Searched defs:MO (Results 101 - 125 of 147) sorted by relevance

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/external/llvm/lib/Target/Hexagon/
H A DHexagonVLIWPacketizer.cpp356 MachineOperand MO = MI->getOperand(0); local
357 if (MO.isReg() && MO.isUse() && (MO.getReg() == DepReg)) {
/external/llvm/lib/Target/Mips/
H A DMipsDelaySlotFiller.cpp270 const MachineOperand &MO = Filler->getOperand(I); local
273 if (!MO.isReg() || !MO.isDef() || !(R = MO.getReg()))
353 const MachineOperand &MO = MI.getOperand(I); local
355 if (MO.isReg() && MO.getReg())
356 HasHazard |= checkRegDefsUses(NewDefs, NewUses, MO.getReg(), MO.isDef());
H A DMipsSEISelDAGToDAG.cpp108 MachineOperand &MO = *U; local
110 MachineInstr *MI = MO.getParent();
117 MO.setReg(ZeroReg);
H A DMipsAsmPrinter.cpp87 bool MipsAsmPrinter::lowerOperand(const MachineOperand &MO, MCOperand &MCOp) { argument
88 MCOp = MCInstLowering.LowerOperand(MO);
445 const MachineOperand &MO = MI->getOperand(OpNum); local
451 if ((MO.getType()) != MachineOperand::MO_Immediate)
453 O << "0x" << StringRef(utohexstr(MO.getImm())).lower();
456 if ((MO.getType()) != MachineOperand::MO_Immediate)
458 O << "0x" << StringRef(utohexstr(MO.getImm() & 0xffff)).lower();
461 if ((MO.getType()) != MachineOperand::MO_Immediate)
463 O << MO.getImm();
466 if ((MO
519 const MachineOperand &MO = MI->getOperand(RegOp); local
552 const MachineOperand &MO = MI->getOperand(OpNum); local
562 const MachineOperand &MO = MI->getOperand(opNum); local
625 const MachineOperand &MO = MI->getOperand(opNum); local
634 const MachineOperand &MO = MI->getOperand(opNum); local
665 const MachineOperand &MO = MI->getOperand(opNum); local
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/external/llvm/lib/Target/PowerPC/
H A DPPCAsmPrinter.cpp146 const MachineOperand &MO = MI->getOperand(OpNo); local
148 switch (MO.getType()) {
150 const char *RegName = PPCInstPrinter::getRegisterName(MO.getReg());
158 O << MO.getImm();
162 O << *MO.getMBB()->getSymbol();
166 << '_' << MO.getIndex();
169 O << *GetBlockAddressSymbol(MO.getBlockAddress());
173 const GlobalValue *GV = MO.getGlobal();
206 printOffset(MO.getOffset(), O);
211 O << "<unknown operand type: " << (unsigned)MO
342 const MachineOperand &MO = MI->getOperand(1); local
373 const MachineOperand &MO = MI->getOperand(2); local
414 const MachineOperand &MO = MI->getOperand(1); local
451 const MachineOperand &MO = MI->getOperand(2); local
481 const MachineOperand &MO = MI->getOperand(2); local
500 const MachineOperand &MO = MI->getOperand(1); local
532 const MachineOperand &MO = MI->getOperand(2); local
548 const MachineOperand &MO = MI->getOperand(2); local
569 const MachineOperand &MO = MI->getOperand(2); local
584 const MachineOperand &MO = MI->getOperand(2); local
600 const MachineOperand &MO = MI->getOperand(2); local
621 const MachineOperand &MO = MI->getOperand(2); local
636 const MachineOperand &MO = MI->getOperand(2); local
652 const MachineOperand &MO = MI->getOperand(2); local
707 const MachineOperand &MO = MI->getOperand(OpNum); local
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H A DPPCFrameLowering.cpp283 const MachineOperand &MO = Ret.getOperand(I); local
284 if (!MO.isReg() || !PPC::VRRCRegClass.contains(MO.getReg()))
286 unsigned RegNo = TRI->getEncodingValue(MO.getReg());
472 MachineOperand &MO = MBBI->getOperand(I); local
473 if (!MO.isReg())
476 switch (MO.getReg()) {
478 MO.setReg(FPReg);
481 MO.setReg(FP8Reg);
484 MO
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/external/llvm/lib/Target/R600/
H A DR600ControlFlowFinalizer.cpp285 const MachineOperand &MO = *I; local
286 if (!MO.isReg())
288 if (MO.isDef()) {
289 unsigned Reg = MO.getReg();
297 if (MO.isUse()) {
298 unsigned Reg = MO.getReg();
403 MachineOperand &MO = BI->getOperand(i); local
404 if (MO.isReg() && MO.isInternalRead())
405 MO
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/external/llvm/lib/Target/Sparc/
H A DSparcAsmPrinter.cpp181 const MachineOperand &MO = MI->getOperand(0); local
182 assert(MO.getReg() != SP::O7 &&
185 MCOperand MCRegOP = MCOperand::CreateReg(MO.getReg());
237 // sethi %hi(_GLOBAL_OFFSET_TABLE_+(<SethiLabel>-<StartLabel>)), <MO>
239 // or <MO>, %lo(_GLOBAL_OFFSET_TABLE_+(<EndLabel>-<StartLabel>))), <MO>
240 // add <MO>, %o7, <MO>
300 const MachineOperand &MO = MI->getOperand (opNum); local
301 SparcMCExpr::VariantKind TF = (SparcMCExpr::VariantKind) MO
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/external/llvm/lib/Target/X86/
H A DX86MCInstLower.cpp49 MCSymbol *GetSymbolFromOperand(const MachineOperand &MO) const;
50 MCOperand LowerSymbolOperand(const MachineOperand &MO, MCSymbol *Sym) const;
74 GetSymbolFromOperand(const MachineOperand &MO) const {
76 assert((MO.isGlobal() || MO.isSymbol() || MO.isMBB()) && "Isn't a symbol reference");
81 switch (MO.getTargetFlags()) {
101 if (MO.isGlobal()) {
102 const GlobalValue *GV = MO.getGlobal();
104 } else if (MO
168 LowerSymbolOperand(const MachineOperand &MO, MCSymbol *Sym) const argument
349 const MachineOperand &MO = MI->getOperand(i); local
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/external/mesa3d/src/gallium/drivers/radeon/MCTargetDesc/
H A DR600MCCodeEmitter.cpp57 virtual uint64_t getMachineOpValue(const MCInst &MI, const MCOperand &MO,
236 const MCOperand &MO = MI.getOperand(OpIdx); local
245 if (MO.isReg()) {
246 unsigned reg = MO.getReg();
264 if (MO.isReg()) {
265 EmitByte(getHWRegChan(MO.getReg()), OS);
273 (MO.isReg() &&
274 (MO.getReg() == AMDGPU::NEG_ONE || MO.getReg() == AMDGPU::NEG_HALF)))){
300 const MCOperand &MO local
620 getMachineOpValue(const MCInst &MI, const MCOperand &MO, SmallVectorImpl<MCFixup> &Fixup) const argument
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/external/llvm/include/llvm/CodeGen/
H A DMachineRegisterInfo.h89 static MachineOperand *getNextOperandForReg(const MachineOperand *MO) { argument
90 assert(MO && MO->isReg() && "This is not a register operand!");
91 return MO->Contents.Reg.Next;
187 void addRegOperandToUseList(MachineOperand *MO);
190 void removeRegOperandFromUseList(MachineOperand *MO);
/external/llvm/lib/CodeGen/
H A DBranchFolding.cpp160 MachineOperand &MO = I->getOperand(i); local
161 if (!MO.isReg() || !MO.isUse())
163 unsigned Reg = MO.getReg();
1499 const MachineOperand &MO = Loc->getOperand(i); local
1500 if (!MO.isReg())
1502 unsigned Reg = MO.getReg();
1505 if (MO.isUse()) {
1509 if (!MO.isDead())
1535 const MachineOperand &MO local
1567 const MachineOperand &MO = PI->getOperand(i); local
1647 MachineOperand &MO = TIB->getOperand(i); local
1703 MachineOperand &MO = TIB->getOperand(i); local
1715 MachineOperand &MO = TIB->getOperand(i); local
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H A DInlineSpiller.cpp862 MachineOperand &MO = MI->getOperand(i); local
863 if (MO.isReg() && MO.isUse() && MO.getReg() == VirtReg.reg)
864 MO.setIsUndef();
916 MachineOperand &MO = MI->getOperand(Ops[i].second); local
917 if (MO.isReg() && MO.isUse() && MO.getReg() == VirtReg.reg) {
918 MO
1052 MachineOperand *MO = I->findRegisterDefOperand(VReg); local
1089 MachineOperand &MO = MI->getOperand(Idx); local
1154 MachineOperand &MO = FoldMI->getOperand(i - 1); local
1289 MachineOperand &MO = Ops[i].first->getOperand(Ops[i].second); local
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H A DLiveDebugVariables.cpp575 for (MachineOperand &MO : MRI.use_nodbg_operands(LI->reg)) {
576 MachineInstr *MI = MO.getParent();
578 if (MO.getSubReg() || !MI->isCopy())
771 MachineOperand MO = MachineOperand::CreateReg(LI->reg, false); local
772 MO.setSubReg(locations[OldLocNo].getSubReg());
773 NewLocNo = getLocationNo(MO);
H A DLiveIntervalAnalysis.cpp212 for (MIOperands MO(MI); MO.isValid(); ++MO) {
213 if (!MO->isRegMask())
216 RegMaskBits.push_back(MO->getRegMask());
755 for (MIOperands MO(MI); MO.isValid(); ++MO) {
756 if (MO->isRegMask())
758 if (!MO
1131 const MachineOperand &MO = *OI; local
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H A DMachineBasicBlock.cpp614 MachineOperand &MO = MI->getOperand(i); local
615 if (MO.getMBB() == fromMBB)
616 MO.setMBB(this);
866 MachineOperand &MO = I->getOperand(ni); local
867 unsigned Reg = MO.getReg();
869 if (MO.isUndef())
H A DMachineLICM.cpp416 const MachineOperand &MO = MI->getOperand(i); local
417 if (MO.isFI()) {
419 int FI = MO.getIndex();
430 if (MO.isRegMask()) {
431 PhysRegClobbers.setBitsNotInMask(MO.getRegMask());
435 if (!MO.isReg())
437 unsigned Reg = MO.getReg();
443 if (!MO.isDef()) {
451 if (MO.isImplicit()) {
454 if (!MO
541 const MachineOperand &MO = TI->getOperand(i); local
570 const MachineOperand &MO = MI->getOperand(j); local
600 MachineOperand &MO = MI->getOperand(i); local
776 isOperandKill(const MachineOperand &MO, MachineRegisterInfo *MRI) argument
818 const MachineOperand &MO = MI->getOperand(i); local
850 const MachineOperand &MO = MI->getOperand(i); local
927 const MachineOperand &MO = I.getOperand(i); local
1021 const MachineOperand &MO = UseMI.getOperand(i); local
1106 const MachineOperand &MO = MI->getOperand(i); local
1183 const MachineOperand &MO = MI.getOperand(i); local
1339 const MachineOperand &MO = MI->getOperand(i); local
1442 MachineOperand &MO = MI->getOperand(i); local
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H A DRegisterPressure.cpp327 void collect(const MachineOperand &MO) { argument
328 if (!MO.isReg() || !MO.getReg())
330 if (MO.readsReg())
331 pushRegUnits(MO.getReg(), Uses);
332 if (MO.isDef()) {
333 if (MO.isDead()) {
335 pushRegUnits(MO.getReg(), DeadDefs);
338 pushRegUnits(MO.getReg(), Defs);
H A DSplitKit.cpp135 for (MachineOperand &MO : MRI.use_nodbg_operands(CurLI->reg))
136 if (!MO.isUndef())
137 UseSlots.push_back(LIS.getInstructionIndex(MO.getParent()).getRegSlot());
974 MachineOperand &MO = *RI; local
975 MachineInstr *MI = MO.getParent();
980 MO.setReg(0);
988 if (MO.isDef() || MO.isUndef())
989 Idx = Idx.getRegSlot(MO.isEarlyClobber());
994 MO
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H A DTwoAddressInstructionPass.cpp195 const MachineOperand &MO = MI->getOperand(i); local
196 if (!MO.isReg())
198 unsigned MOReg = MO.getReg();
201 if (MO.isUse() && MOReg != SavedReg)
202 UseRegs.insert(MO.getReg());
203 if (!MO.isDef())
205 if (MO.isImplicit())
211 DefReg = MO.getReg();
268 MachineOperand &MO = OtherMI->getOperand(i); local
269 if (!MO
436 const MachineOperand &MO = MI.getOperand(i); local
800 const MachineOperand &MO = MI->getOperand(i); local
843 const MachineOperand &MO = OtherMI->getOperand(i); local
984 const MachineOperand &MO = KillMI->getOperand(i); local
1023 const MachineOperand &MO = OtherMI->getOperand(i); local
1231 MachineOperand &MO = MI.getOperand(i); local
1426 MachineOperand &MO = MI->getOperand(SrcIdx); local
1453 MachineOperand &MO = MI->getOperand(i); local
1491 MachineOperand &MO = MI->getOperand(i); local
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/external/llvm/lib/Target/AArch64/InstPrinter/
H A DAArch64InstPrinter.cpp941 const MCOperand &MO = MI->getOperand(OpNum); local
942 if (MO.isImm()) {
943 unsigned Val = (MO.getImm() & 0xfff);
944 assert(Val == MO.getImm() && "Add/sub immediate out of range!");
954 assert(MO.isExpr() && "Unexpected operand type!");
955 O << *MO.getExpr();
1065 const MCOperand MO = MI->getOperand(OpNum); local
1066 if (MO.isImm()) {
1067 O << "#" << (MO.getImm() * Scale);
1069 assert(MO
1100 const MCOperand &MO = MI->getOperand(OpNum); local
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/external/llvm/lib/Target/ARM/
H A DARMAsmPrinter.cpp128 const MachineOperand &MO = MI->getOperand(OpNum); local
129 unsigned TF = MO.getTargetFlags();
131 switch (MO.getType()) {
134 unsigned Reg = MO.getReg();
136 assert(!MO.getSubReg() && "Subregs should be eliminated!");
146 int64_t Imm = MO.getImm();
158 O << *MO.getMBB()->getSymbol();
161 const GlobalValue *GV = MO.getGlobal();
170 printOffset(MO.getOffset(), O);
176 O << *GetCPISymbol(MO
257 const MachineOperand &MO = MI->getOperand(OpNum); local
317 const MachineOperand &MO = MI->getOperand(OpNum); local
331 const MachineOperand &MO = MI->getOperand(RegOp); local
357 const MachineOperand &MO = MI->getOperand(OpNum); local
395 const MachineOperand &MO = MI->getOperand(OpNum); local
1061 const MachineOperand &MO = MI->getOperand(i); local
[all...]
H A DARMCodeEmitter.cpp102 const MachineOperand &MO,
153 const MachineOperand &MO) const;
247 const MachineOperand &MO = MI.getOperand(Op); local
249 if (!MO.isReg()) {
250 emitConstPoolAddress(MO.getIndex(), ARM::reloc_arm_cp_entry);
253 unsigned Reg = II->getRegisterInfo().getEncodingValue(MO.getReg());
285 const MachineOperand &MO = MI.getOperand(Op); local
287 if (!MO.isReg()) {
288 emitConstPoolAddress(MO.getIndex(), ARM::reloc_arm_cp_entry);
291 unsigned Reg = II->getRegisterInfo().getEncodingValue(MO
417 getMovi32Value(const MachineInstr &MI, const MachineOperand &MO, unsigned Reloc) argument
919 getMachineSoRegOpValue(const MachineInstr &MI, const MCInstrDesc &MCID, const MachineOperand &MO, unsigned OpIdx) argument
992 const MachineOperand &MO = MI.getOperand(i-1); local
1078 const MachineOperand &MO = MI.getOperand(OpIdx); local
1290 const MachineOperand &MO = MI.getOperand(i); local
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H A DARMExpandPseudoInsts.cpp82 const MachineOperand &MO = OldMI.getOperand(i); local
83 assert(MO.isReg() && MO.getReg());
84 if (MO.isUse())
85 UseMI.addOperand(MO);
87 DefMI.addOperand(MO);
429 MachineOperand MO = MI.getOperand(SrcOpIdx); local
430 MO.setImplicit(true);
431 MIB.addOperand(MO);
550 MachineOperand MO local
619 IsAnAddressOperand(const MachineOperand &MO) argument
661 const MachineOperand &MO = MI.getOperand(isCC ? 2 : 1); local
[all...]
/external/llvm/lib/Target/ARM/MCTargetDesc/
H A DARMMCCodeEmitter.cpp74 unsigned getMachineOpValue(const MCInst &MI,const MCOperand &MO,
277 const MCOperand &MO = MI.getOperand(Op); local
279 // We expect MO to be an immediate or an expression,
282 if (MO.isExpr()) {
283 const MCExpr *Expr = MO.getExpr();
294 unsigned SoImm = MO.getImm();
509 getMachineOpValue(const MCInst &MI, const MCOperand &MO, argument
512 if (MO.isReg()) {
513 unsigned Reg = MO.getReg();
526 } else if (MO
541 const MCOperand &MO = MI.getOperand(OpIdx); local
571 const MCOperand &MO = MI.getOperand(OpIdx); local
608 const MCOperand MO = MI.getOperand(OpIdx); local
621 const MCOperand MO = MI.getOperand(OpIdx); local
633 const MCOperand MO = MI.getOperand(OpIdx); local
645 const MCOperand MO = MI.getOperand(OpIdx); local
657 const MCOperand MO = MI.getOperand(OpIdx); local
700 const MCOperand MO = MI.getOperand(OpIdx); local
716 const MCOperand MO = MI.getOperand(OpIdx); local
731 const MCOperand MO = MI.getOperand(OpIdx); local
745 const MCOperand MO = MI.getOperand(OpIdx); local
774 const MCOperand MO = MI.getOperand(OpIdx); local
815 const MCOperand MO = MI.getOperand(OpIdx); local
835 const MCOperand MO = MI.getOperand(OpIdx); local
869 const MCOperand &MO = MI.getOperand(OpIdx); local
953 const MCOperand &MO = MI.getOperand(OpIdx); local
990 const MCOperand &MO = MI.getOperand(OpIdx); local
1003 const MCOperand &MO = MI.getOperand(OpIdx); local
1057 const MCOperand &MO = MI.getOperand(OpIdx); local
1095 const MCOperand &MO = MI.getOperand(OpIdx); local
1109 const MCOperand &MO = MI.getOperand(OpIdx); local
1131 const MCOperand &MO = MI.getOperand(OpIdx); local
1145 const MCOperand &MO = MI.getOperand(OpIdx); local
1166 const MCOperand &MO = MI.getOperand(OpIdx); local
1217 const MCOperand &MO = MI.getOperand(OpIdx); local
1229 const MCOperand MO = MI.getOperand(OpIdx); local
1246 const MCOperand &MO = MI.getOperand(OpIdx); local
1289 const MCOperand &MO = MI.getOperand(OpIdx); local
1335 const MCOperand &MO = MI.getOperand(OpIdx); local
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