Searched defs:MRI (Results 101 - 125 of 177) sorted by relevance

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/external/llvm/include/llvm/CodeGen/
H A DMachineTraceMetrics.h71 const MachineRegisterInfo *MRI; member in class:llvm::MachineTraceMetrics
/external/llvm/lib/CodeGen/
H A DMachineCSE.cpp46 MachineRegisterInfo *MRI; member in class:__anon25762::MachineCSE
125 if (!MRI->hasOneNonDBGUse(Reg))
129 MachineInstr *DefMI = MRI->getVRegDef(Reg);
141 // RC = TRI->getMatchingSuperRegClass(MRI->getRegClass(SrcReg), RC,
151 const TargetRegisterClass *RC = MRI->getRegClass(Reg);
152 if (!MRI->constrainRegClass(SrcReg, RC))
157 MRI->clearKillFlags(SrcReg);
225 if (!MRI->isConstantPhysReg(Reg, *MBB->getParent()))
277 if (MRI->isAllocatable(PhysDefs[i]) || MRI
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H A DMachineSSAUpdater.cpp43 MRI = &MF.getRegInfo();
59 VRC = MRI->getRegClass(VR);
117 MachineRegisterInfo *MRI,
119 unsigned NewVR = MRI->createVirtualRegister(RC);
153 VRC, MRI, TII);
189 Loc, VRC, MRI, TII);
290 Updater->VRC, Updater->MRI,
301 Updater->VRC, Updater->MRI,
324 return InstrIsPHI(Updater->MRI->getVRegDef(Val));
114 InsertNewDef(unsigned Opcode, MachineBasicBlock *BB, MachineBasicBlock::iterator I, const TargetRegisterClass *RC, MachineRegisterInfo *MRI, const TargetInstrInfo *TII) argument
H A DMachineSink.cpp49 MachineRegisterInfo *MRI; // Machine register information member in class:__anon25775::MachineSinking
123 !MRI->hasOneNonDBGUse(SrcReg))
126 const TargetRegisterClass *SRC = MRI->getRegClass(SrcReg);
127 const TargetRegisterClass *DRC = MRI->getRegClass(DstReg);
131 MachineInstr *DefMI = MRI->getVRegDef(SrcReg);
136 MRI->replaceRegWith(DstReg, SrcReg);
156 if (MRI->use_nodbg_empty(Reg))
175 for (MachineOperand &MO : MRI->use_nodbg_operands(Reg)) {
188 for (MachineOperand &MO : MRI->use_nodbg_operands(Reg)) {
219 MRI
399 AvoidsSinking(MachineInstr *MI, MachineRegisterInfo *MRI) argument
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H A DPHIElimination.cpp51 MachineRegisterInfo *MRI; // Machine register information member in class:__anon25782::PHIElimination
128 MRI = &MF.getRegInfo();
135 MRI->leaveSSA();
157 if (MRI->use_nodbg_empty(DefReg)) {
201 const MachineRegisterInfo *MRI) {
202 for (MachineInstr &DI : MRI->def_instructions(VirtReg))
211 const MachineRegisterInfo *MRI) {
213 if (!isImplicitlyDefined(MPhi->getOperand(i).getReg(), MRI))
244 if (isSourceDefinedByImplicitDef(MPhi, MRI))
361 isImplicitlyDefined(SrcReg, MRI);
200 isImplicitlyDefined(unsigned VirtReg, const MachineRegisterInfo *MRI) argument
210 isSourceDefinedByImplicitDef(const MachineInstr *MPhi, const MachineRegisterInfo *MRI) argument
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H A DEarlyIfConversion.cpp84 MachineRegisterInfo *MRI; member in class:__anon25739::SSAIfConv
158 MRI = &MF.getRegInfo();
245 MachineInstr *DefMI = MRI->getVRegDef(Reg);
484 unsigned DstReg = MRI->createVirtualRegister(MRI->getRegClass(PHIDst));
584 MachineRegisterInfo *MRI; member in class:__anon25740::EarlyIfConverter
789 MRI = &MF.getRegInfo();
H A DLiveVariables.cpp133 assert(MRI->getVRegDef(reg) && "Register use before def!");
168 if (MBB == MRI->getVRegDef(reg)->getParent()) return;
179 MarkVirtRegAliveInBlock(VRInfo, MRI->getVRegDef(reg)->getParent(), *PI);
502 MRI = &mf.getRegInfo();
516 if (!MRI->isSSA())
588 else if (!MRI->isReserved(MOReg))
601 else if (!MRI->isReserved(MOReg))
617 MarkVirtRegAliveInBlock(getVarInfo(*I),MRI->getVRegDef(*I)->getParent(),
653 if (VirtRegInfo[Reg].Kills[j] == MRI->getVRegDef(Reg))
717 MachineRegisterInfo &MRI) {
715 isLiveIn(const MachineBasicBlock &MBB, unsigned Reg, MachineRegisterInfo &MRI) argument
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H A DMachineModuleInfo.cpp254 const MCRegisterInfo &MRI,
256 : ImmutablePass(ID), Context(&MAI, &MRI, MOFI, nullptr, false) {
253 MachineModuleInfo(const MCAsmInfo &MAI, const MCRegisterInfo &MRI, const MCObjectFileInfo *MOFI) argument
H A DPeepholeOptimizer.cpp109 MachineRegisterInfo *MRI; member in class:__anon25783::PeepholeOptimizer
181 const MachineRegisterInfo *MRI; member in class:__anon25783::ValueTracker
211 /// \p MRI useful to perform some complex checks.
214 const MachineRegisterInfo *MRI = nullptr)
216 UseAdvancedTracking(UseAdvancedTracking), MRI(MRI) {
273 if (MRI->hasOneNonDBGUse(SrcReg))
279 const TargetRegisterClass *DstRC = MRI->getRegClass(DstReg);
290 getSubClassWithSubReg(MRI->getRegClass(SrcReg), SubIdx) != nullptr;
295 for (MachineInstr &UI : MRI
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H A DRegAllocFast.cpp58 MachineRegisterInfo *MRI; member in class:__anon25790::RAFast
227 MachineRegisterInfo::reg_nodbg_iterator I = MRI->reg_nodbg_begin(MO.getReg());
230 return ++I == MRI->reg_nodbg_end();
288 const TargetRegisterClass *RC = MRI->getRegClass(LRI->VirtReg);
516 const TargetRegisterClass *RC = MRI->getRegClass(VirtReg);
520 !RC->contains(Hint) || !MRI->isAllocatable(Hint)))
593 MRI->hasOneNonDBGUse(VirtReg)) {
594 const MachineInstr &UseMI = *MRI->use_instr_nodbg_begin(VirtReg);
626 const TargetRegisterClass *RC = MRI->getRegClass(VirtReg);
797 if (MRI
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H A DTailDuplication.cpp67 MachineRegisterInfo *MRI; member in class:__anon25829::TailDuplicatePass
140 MRI = &MF.getRegInfo();
144 PreRegAlloc = MRI->isSSA();
146 if (MRI->tracksLiveness() && TRI->trackLivenessAfterRegAlloc(MF))
250 MachineInstr *DefMI = MRI->getVRegDef(VReg);
267 MachineRegisterInfo::use_iterator UI = MRI->use_begin(VReg);
268 while (UI != MRI->use_end()) {
298 if (MRI->hasOneNonDBGUse(Src) &&
299 MRI->constrainRegClass(Src, MRI
343 isDefLiveOut(unsigned Reg, MachineBasicBlock *BB, const MachineRegisterInfo *MRI) argument
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H A DTargetInstrInfo.cpp328 const MachineRegisterInfo *MRI) const {
360 const MachineRegisterInfo &MRI = MI->getParent()->getParent()->getRegInfo(); local
361 const TargetRegisterClass *RC = MRI.getRegClass(FoldReg);
366 if (RC->hasSubClassEq(MRI.getRegClass(LiveReg)))
564 const MachineRegisterInfo &MRI = MF.getRegInfo(); local
618 if (!MRI.isConstantPhysReg(Reg, MF))
/external/llvm/lib/MC/MCParser/
H A DCOFFAsmParser.cpp733 const MCRegisterInfo *MRI = getContext().getRegisterInfo(); local
753 int SEHRegNo = MRI->getSEHRegNum(LLVMRegNo);
/external/llvm/lib/Target/AArch64/
H A DAArch64A57FPLoadBalancing.cpp111 MachineRegisterInfo *MRI; member in class:__anon25928::AArch64A57FPLoadBalancing
299 MRI = &F.getRegInfo();
557 MRI->setPhysRegUsed(Reg);
H A DAArch64ConditionalCompares.cpp144 MachineRegisterInfo *MRI; member in class:__anon25935::SSACCmpConv
196 MRI = &MF.getRegInfo();
266 return MRI->use_nodbg_empty(DstReg);
596 MRI->createVirtualRegister(TII->getRegClass(MCID, 0, TRI, *MF));
604 MRI->constrainRegClass(HeadCond[2].getReg(),
651 MRI->constrainRegClass(CmpMI->getOperand(FirstOp).getReg(),
654 MRI->constrainRegClass(CmpMI->getOperand(FirstOp + 1).getReg(),
729 MachineRegisterInfo *MRI; member in class:__anon25936::AArch64ConditionalCompares
898 MRI = &MF.getRegInfo();
/external/llvm/lib/Target/AArch64/MCTargetDesc/
H A DAArch64AsmBackend.cpp301 const MCRegisterInfo &MRI; member in class:__anon25956::DarwinAArch64AsmBackend
311 DarwinAArch64AsmBackend(const Target &T, const MCRegisterInfo &MRI) argument
312 : AArch64AsmBackend(T), MRI(MRI) {}
374 assert(getXRegFromWReg(MRI.getLLVMRegNum(Inst.getRegister(), true)) ==
386 unsigned LRReg = MRI.getLLVMRegNum(LRPush.getRegister(), true);
387 unsigned FPReg = MRI.getLLVMRegNum(FPPush.getRegister(), true);
408 unsigned Reg1 = MRI.getLLVMRegNum(Inst.getRegister(), true);
415 unsigned Reg2 = MRI.getLLVMRegNum(Inst2.getRegister(), true);
546 const MCRegisterInfo &MRI,
545 createAArch64leAsmBackend(const Target &T, const MCRegisterInfo &MRI, StringRef TT, StringRef CPU) argument
557 createAArch64beAsmBackend(const Target &T, const MCRegisterInfo &MRI, StringRef TT, StringRef CPU) argument
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H A DAArch64MCCodeEmitter.cpp207 const MCRegisterInfo &MRI,
206 createAArch64MCCodeEmitter(const MCInstrInfo &MCII, const MCRegisterInfo &MRI, const MCSubtargetInfo &STI, MCContext &Ctx) argument
/external/llvm/lib/Target/ARM/
H A DA15SDOptimizer.cpp57 MachineRegisterInfo *MRI; member in struct:__anon25963::A15SDOptimizer
140 return MRI->getRegClass(Reg)->hasSuperClassEq(TRC);
158 MachineInstr *MI = MRI->getVRegDef(SReg);
225 II = MRI->use_instr_begin(Reg), EE = MRI->use_instr_end();
257 MachineInstr *DPRMI = MRI->getVRegDef(MI->getOperand(1).getReg());
258 MachineInstr *SPRMI = MRI->getVRegDef(MI->getOperand(2).getReg());
277 MRI->getRegClass(MI->getOperand(1).getReg());
278 if (TRC->hasSuperClassEq(MRI->getRegClass(FullReg))) {
309 MachineInstr *Def = MRI
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H A DMLxExpansionPass.cpp53 MachineRegisterInfo *MRI; member in struct:__anon26004::MLxExpansion
95 MachineInstr *DefMI = MRI->getVRegDef(Reg);
102 DefMI = MRI->getVRegDef(Reg);
108 DefMI = MRI->getVRegDef(Reg);
120 !MRI->hasOneNonDBGUse(Reg))
124 MachineInstr *UseMI = &*MRI->use_instr_nodbg_begin(Reg);
131 !MRI->hasOneNonDBGUse(Reg))
133 UseMI = &*MRI->use_instr_nodbg_begin(Reg);
149 MachineInstr *DefMI = MRI->getVRegDef(Reg);
160 DefMI = MRI
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/external/llvm/lib/Target/Hexagon/
H A DHexagonNewValueJump.cpp246 MachineRegisterInfo &MRI = MF.getRegInfo(); local
248 MachineInstr *def = MRI.getVRegDef(cmpOp2);
/external/llvm/lib/Target/Mips/
H A DMipsSEFrameLowering.cpp69 MachineRegisterInfo &MRI; member in class:__anon26056::ExpandPseudo
74 : MF(MF_), MRI(MF.getRegInfo()) {}
135 unsigned VR = MRI.createVirtualRegister(RC);
155 unsigned VR = MRI.createVirtualRegister(RC);
178 unsigned VR0 = MRI.createVirtualRegister(RC);
179 unsigned VR1 = MRI.createVirtualRegister(RC);
208 unsigned VR0 = MRI.createVirtualRegister(RC);
209 unsigned VR1 = MRI.createVirtualRegister(RC);
245 unsigned VR0 = MRI.createVirtualRegister(RC);
246 unsigned VR1 = MRI
299 const MCRegisterInfo *MRI = MMI.getContext().getRegisterInfo(); local
514 MachineRegisterInfo &MRI = MF.getRegInfo(); local
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/external/llvm/lib/Target/NVPTX/
H A DNVPTXAsmPrinter.h253 const MachineRegisterInfo *MRI; member in class:llvm::NVPTXAsmPrinter
/external/llvm/lib/Target/R600/
H A DAMDGPUInstrInfo.cpp278 const MachineRegisterInfo &MRI = MF.getRegInfo(); local
286 if (MRI.livein_empty()) {
291 for (MachineRegisterInfo::livein_iterator LI = MRI.livein_begin(),
292 LE = MRI.livein_end();
/external/llvm/lib/CodeGen/SelectionDAG/
H A DSelectionDAGBuilder.cpp832 const MachineRegisterInfo &MRI = DAG.getMachineFunction().getRegInfo(); local
833 const TargetRegisterClass *RC = MRI.getRegClass(Regs.front());
/external/llvm/lib/MC/MCAnalysis/
H A DMCModuleYAML.cpp34 // 1- Generate an MII/MRI method using a tablegen StringMatcher
35 // 2- Write an MII/MRI method using std::lower_bound and the assumption that
45 // can be made against having {MII,MRI}::getName).
48 // the Right Thing (tm) and move the functionality to MII/MRI.
57 const MCRegisterInfo &MRI; member in class:llvm::__anon25873::InstrRegInfoHolder
58 InstrRegInfoHolder(const MCInstrInfo &MII, const MCRegisterInfo &MRI) argument
60 RegEnumValueByName(NextPowerOf2(MRI.getNumRegs())), MII(MII), MRI(MRI) {
63 for (int i = 0, e = MRI
439 mcmodule2yaml(raw_ostream &OS, const MCModule &MCM, const MCInstrInfo &MII, const MCRegisterInfo &MRI) argument
448 yaml2mcmodule(std::unique_ptr<MCModule> &MCM, StringRef YamlContent, const MCInstrInfo &MII, const MCRegisterInfo &MRI) argument
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