/external/llvm/lib/Target/ARM/ |
H A D | Thumb1InstrInfo.h | 45 void storeRegToStackSlot(MachineBasicBlock &MBB,
|
H A D | Thumb2InstrInfo.h | 47 void storeRegToStackSlot(MachineBasicBlock &MBB,
|
H A D | Thumb1InstrInfo.cpp | 51 storeRegToStackSlot(MachineBasicBlock &MBB, MachineBasicBlock::iterator I, function in class:Thumb1InstrInfo
|
H A D | Thumb2InstrInfo.cpp | 126 storeRegToStackSlot(MachineBasicBlock &MBB, MachineBasicBlock::iterator I, function in class:Thumb2InstrInfo 165 ARMBaseInstrInfo::storeRegToStackSlot(MBB, I, SrcReg, isKill, FI, RC, TRI);
|
/external/llvm/lib/Target/MSP430/ |
H A D | MSP430InstrInfo.h | 60 void storeRegToStackSlot(MachineBasicBlock &MBB,
|
H A D | MSP430InstrInfo.cpp | 37 void MSP430InstrInfo::storeRegToStackSlot(MachineBasicBlock &MBB, function in class:MSP430InstrInfo
|
/external/llvm/lib/Target/Sparc/ |
H A D | SparcInstrInfo.h | 83 void storeRegToStackSlot(MachineBasicBlock &MBB,
|
/external/llvm/lib/Target/XCore/ |
H A D | XCoreInstrInfo.h | 70 void storeRegToStackSlot(MachineBasicBlock &MBB,
|
/external/llvm/lib/Target/Mips/ |
H A D | MipsInstrInfo.h | 90 void storeRegToStackSlot(MachineBasicBlock &MBB,
|
/external/chromium_org/third_party/mesa/src/src/gallium/drivers/radeon/ |
H A D | AMDGPUInstrInfo.cpp | 122 AMDGPUInstrInfo::storeRegToStackSlot(MachineBasicBlock &MBB, function in class:AMDGPUInstrInfo
|
H A D | AMDGPUInstrInfo.h | 78 void storeRegToStackSlot(MachineBasicBlock &MBB,
|
/external/llvm/lib/CodeGen/ |
H A D | Spiller.cpp | 145 tii->storeRegToStackSlot(*mi->getParent(), std::next(miItr), NewVReg,
|
H A D | RegisterScavenging.cpp | 417 TII->storeRegToStackSlot(*MBB, I, SReg, true, Scavenged[SI].FrameIndex,
|
/external/llvm/lib/Target/R600/ |
H A D | AMDGPUInstrInfo.h | 84 void storeRegToStackSlot(MachineBasicBlock &MBB,
|
H A D | SIInstrInfo.h | 70 void storeRegToStackSlot(MachineBasicBlock &MBB,
|
H A D | AMDGPUInstrInfo.cpp | 106 AMDGPUInstrInfo::storeRegToStackSlot(MachineBasicBlock &MBB, function in class:AMDGPUInstrInfo
|
/external/mesa3d/src/gallium/drivers/radeon/ |
H A D | AMDGPUInstrInfo.cpp | 122 AMDGPUInstrInfo::storeRegToStackSlot(MachineBasicBlock &MBB, function in class:AMDGPUInstrInfo
|
H A D | AMDGPUInstrInfo.h | 78 void storeRegToStackSlot(MachineBasicBlock &MBB,
|
/external/llvm/lib/Target/Hexagon/ |
H A D | HexagonFrameLowering.cpp | 259 TII.storeRegToStackSlot(MBB, MI, SuperReg, true, 267 TII.storeRegToStackSlot(MBB, MI, Reg, true, CSI[i].getFrameIdx(), RC,
|
H A D | HexagonInstrInfo.h | 83 void storeRegToStackSlot(MachineBasicBlock &MBB,
|
/external/llvm/lib/Target/AArch64/ |
H A D | AArch64InstrInfo.h | 111 void storeRegToStackSlot(MachineBasicBlock &MBB,
|
/external/llvm/lib/Target/PowerPC/ |
H A D | PPCInstrInfo.h | 154 void storeRegToStackSlot(MachineBasicBlock &MBB,
|
/external/llvm/lib/Target/SystemZ/ |
H A D | SystemZInstrInfo.h | 172 void storeRegToStackSlot(MachineBasicBlock &MBB,
|
/external/llvm/lib/Target/X86/ |
H A D | X86InstrInfo.h | 268 void storeRegToStackSlot(MachineBasicBlock &MBB,
|
/external/llvm/include/llvm/Target/ |
H A D | TargetInstrInfo.h | 521 /// storeRegToStackSlot - Store the specified register of the given register 526 virtual void storeRegToStackSlot(MachineBasicBlock &MBB, function in class:llvm::TargetInstrInfo 532 "TargetInstrInfo::storeRegToStackSlot!");
|