| /external/mesa3d/src/gallium/drivers/radeon/ |
| H A D | AMDGPUInstrInfo.cpp | 132 AMDGPUInstrInfo::loadRegFromStackSlot(MachineBasicBlock &MBB, function in class:AMDGPUInstrInfo
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| H A D | AMDGPUInstrInfo.h | 83 void loadRegFromStackSlot(MachineBasicBlock &MBB,
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| /external/llvm/include/llvm/Target/ |
| H A D | TargetInstrInfo.h | 535 /// loadRegFromStackSlot - Load the specified register of the given register
539 virtual void loadRegFromStackSlot(MachineBasicBlock &MBB, function in class:llvm::TargetInstrInfo
545 "TargetInstrInfo::loadRegFromStackSlot!");
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| /external/llvm/lib/CodeGen/ |
| H A D | InlineSpiller.cpp | 1179 TII.loadRegFromStackSlot(MBB, MI, NewVReg, StackSlot,
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| H A D | PrologEpilogInserter.cpp | 384 TII.loadRegFromStackSlot(*MBB, I, Reg, CSI[i].getFrameIdx(), RC, TRI);
386 "loadRegFromStackSlot didn't insert any code!");
387 // Insert in reverse order. loadRegFromStackSlot can insert
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| H A D | RegAllocFast.cpp | 630 TII->loadRegFromStackSlot(*MBB, MI, LRI->PhysReg, FrameIndex, RC, TRI);
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| H A D | RegisterScavenging.cpp | 425 TII->loadRegFromStackSlot(*MBB, UseMI, SReg, Scavenged[SI].FrameIndex,
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| H A D | Spiller.cpp | 136 tii->loadRegFromStackSlot(*mi->getParent(), miItr, NewVReg, ss, trc,
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| H A D | TargetInstrInfo.cpp | 506 loadRegFromStackSlot(*MBB, Pos, MO.getReg(), FI, RC, TRI);
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| /external/llvm/lib/Target/AArch64/ |
| H A D | AArch64InstrInfo.cpp | 1680 void AArch64InstrInfo::loadRegFromStackSlot(
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| H A D | AArch64InstrInfo.h | 117 void loadRegFromStackSlot(MachineBasicBlock &MBB,
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| /external/llvm/lib/Target/ARM/ |
| H A D | ARMBaseInstrInfo.cpp | 987 loadRegFromStackSlot(MachineBasicBlock &MBB, MachineBasicBlock::iterator I, function in class:ARMBaseInstrInfo
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| H A D | ARMBaseInstrInfo.h | 117 void loadRegFromStackSlot(MachineBasicBlock &MBB,
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| H A D | Thumb1InstrInfo.cpp | 79 loadRegFromStackSlot(MachineBasicBlock &MBB, MachineBasicBlock::iterator I, function in class:Thumb1InstrInfo
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| H A D | Thumb1InstrInfo.h | 51 void loadRegFromStackSlot(MachineBasicBlock &MBB,
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| H A D | Thumb2InstrInfo.cpp | 169 loadRegFromStackSlot(MachineBasicBlock &MBB, MachineBasicBlock::iterator I, function in class:Thumb2InstrInfo
209 ARMBaseInstrInfo::loadRegFromStackSlot(MBB, I, DestReg, FI, RC, TRI);
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| H A D | Thumb2InstrInfo.h | 53 void loadRegFromStackSlot(MachineBasicBlock &MBB,
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| /external/llvm/lib/Target/Hexagon/ |
| H A D | HexagonFrameLowering.cpp | 313 TII.loadRegFromStackSlot(MBB, MI, SuperReg, CSI[i+1].getFrameIdx(),
321 TII.loadRegFromStackSlot(MBB, MI, Reg, CSI[i].getFrameIdx(), RC, TRI);
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| H A D | HexagonInstrInfo.cpp | 520 loadRegFromStackSlot(MachineBasicBlock &MBB, MachineBasicBlock::iterator I, function in class:HexagonInstrInfo
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| H A D | HexagonInstrInfo.h | 94 void loadRegFromStackSlot(MachineBasicBlock &MBB,
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| /external/llvm/lib/Target/MSP430/ |
| H A D | MSP430InstrInfo.cpp | 65 void MSP430InstrInfo::loadRegFromStackSlot(MachineBasicBlock &MBB, function in class:MSP430InstrInfo
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| H A D | MSP430InstrInfo.h | 66 void loadRegFromStackSlot(MachineBasicBlock &MBB,
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| /external/llvm/lib/Target/Mips/ |
| H A D | MipsInstrInfo.h | 98 void loadRegFromStackSlot(MachineBasicBlock &MBB,
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| H A D | MipsSEFrameLowering.cpp | 433 TII.loadRegFromStackSlot(MBB, I, ehDataReg(J), MipsFI->getEhDataRegFI(J),
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| /external/llvm/lib/Target/PowerPC/ |
| H A D | PPCFrameLowering.cpp | 1565 TII.loadRegFromStackSlot(MBB, I, Reg, CSI[i].getFrameIdx(),
1568 "loadRegFromStackSlot didn't insert any code!");
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