25d2bf3845e9a6faaef8d808c1255ec57dc71dba |
|
20-Jun-2012 |
Eric Anholt <eric@anholt.net> |
i965: Bind UBOs as surfaces like we do for pull constants. v2: Comment fix, drop extraneous parens (review by Kenneth) Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
/external/mesa3d/src/mesa/drivers/dri/i965/brw_vs_surface_state.c
|
5bffbd7ba2ba2ff21469b2a69a0ed67f0802fec7 |
|
20-Jun-2012 |
Eric Anholt <eric@anholt.net> |
i965: Add an offset argument to constant buffer setup. We'll use this for UBO surfaces. Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
/external/mesa3d/src/mesa/drivers/dri/i965/brw_vs_surface_state.c
|
6ca50f381c9cbc87bbb864d2710f3cfa46a95ead |
|
21-Feb-2012 |
Eric Anholt <eric@anholt.net> |
i965: Correct the size of the state batch space allocated for binding tables. In the gen6 GS case, we were under-counting and so other state would get smashed. In the VS case, we were over-counting, so everything was fine. Reviewed-by: Kenneth Graunke <kenneth@whitecape.org> Tested-by: Kenneth Graunke <kenneth@whitecape.org>
/external/mesa3d/src/mesa/drivers/dri/i965/brw_vs_surface_state.c
|
07e00b3040d6da381595c65db5afe597f20d99fc |
|
15-Feb-2012 |
Eric Anholt <eric@anholt.net> |
i965: Split the VS binding table to a separate table. This is a step toward making the samplers/binding tables reflect sampler uniform mappings instead of embedding those in the programs. No significant performance difference on the microbenchmark (n=10). Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
/external/mesa3d/src/mesa/drivers/dri/i965/brw_vs_surface_state.c
|
91043c21f9b82054060311aabb617dd6e5058602 |
|
07-Nov-2011 |
Kenneth Graunke <kenneth@whitecape.org> |
i965: Clean up code for VS pull constant surface creation. Like for the WM pull constants, we can merge the former prepare/emit stages into one tracked state atom. Furthermore, the code that used to handle the binding table was removed in the last commit, leaving some rather silly looking short functions that can easily be folded in. Signed-off-by: Kenneth Graunke <kenneth@whitecape.org> Reviewed-by: Eric Anholt <eric@anholt.net>
/external/mesa3d/src/mesa/drivers/dri/i965/brw_vs_surface_state.c
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e7c29c5de82f6de3d30ed1143d9672dd2e25f0e7 |
|
31-Oct-2011 |
Kenneth Graunke <kenneth@whitecape.org> |
i965: Use a single binding table for all pipeline stages. Although the hardware supports separate binding tables for each pipeline stage, we don't see much advantage over a single shared table. Consider the contents of the binding table: - Textures (16) - Draw buffers (8) - Pull constant buffers (1 for VS, 1 for WM) OpenGL's texture bindings are global: the same set of textures is available to all shader targets. So our binding table entries for textures would be exactly the same in every table. There are only two pull constant buffers (not many), and although draw buffers aren't interesting to the VS, it shouldn't hurt to have them in the table. The hardware supports up to 254 binding table entries, and we currently only use 26. Signed-off-by: Kenneth Graunke <kenneth@whitecape.org> Reviewed-by: Eric Anholt <eric@anholt.net> Reviewed-by: Paul Berry <stereotype441@gmail.com>
/external/mesa3d/src/mesa/drivers/dri/i965/brw_vs_surface_state.c
|
6ba9090ea05e817bd38c1fcc63c53168b16593c7 |
|
01-Nov-2011 |
Kenneth Graunke <kenneth@whitecape.org> |
i965: Use 0 for the number of binding table entries in 3DSTATE_(VS|WM). These fields control how many entries the hardware prefetches into the state cache, so they only impact performance, not correctness. However, it's not clear how to use this in a way that's beneficial. According to the documentation, kernels "using a large number" of entries may wish to program this to zero to avoid thrashing the cache; it's unclear how many is too many. Also, Ironlake's WM was missing this feature entirely---the count had to be zero. The dirty bit tracking to handle this complicates the surface state and binding table setup; removing it should simplify things and make future refactoring easier. So just set 0 for the number of entries rather than trying to compute and track it. Appears to have no impact on Nexuiz and OpenArena on Sandybridge. Signed-off-by: Kenneth Graunke <kenneth@whitecape.org> Reviewed-by: Eric Anholt <eric@anholt.net> Reviewed-by: Paul Berry <stereotype441@gmail.com>
/external/mesa3d/src/mesa/drivers/dri/i965/brw_vs_surface_state.c
|
0983c6869bead0c31c62e5b1dda7f70898d43971 |
|
01-Nov-2011 |
Kenneth Graunke <kenneth@whitecape.org> |
i965: Remove outdated comment about CACHE_NEW_SURF_BIND dirty bit. The comment states that brw_update_vs_constant_surface produces a CACHE_NEW_SURF_BIND dirty bit, but it doesn't. In fact, that bit no longer even exists. Signed-off-by: Kenneth Graunke <kenneth@whitecape.org> Reviewed-by: Eric Anholt <eric@anholt.net> Reviewed-by: Paul Berry <stereotype441@gmail.com>
/external/mesa3d/src/mesa/drivers/dri/i965/brw_vs_surface_state.c
|
d1d86dc55c852815e8b32c264b8c469fab0ca745 |
|
08-Nov-2011 |
Kenneth Graunke <kenneth@whitecape.org> |
i965: Remove BRW_NEW_NR_VS_SURFACES dirty bit from brw_vs_surfaces. brw_vs_surfaces _produces_ the BRW_NEW_NR_VS_SURFACES dirty bit, so it makes no sense for it to subscribe to it. Fixes an assertion failure in many piglit tests when INTEL_DEBUG is set: brw_state_upload.c:484: void brw_upload_state(struct brw_context *): Assertion `!check_state(&examined, &generated)' failed. One such piglit test is vs-uniform-array-mat2-col-rd.shader_test. Signed-off-by: Kenneth Graunke <kenneth@whitecape.org> Reviewed-by: Eric Anholt <eric@anholt.net> Reviewed-by: Paul Berry <stereotype441@gmail.com>
/external/mesa3d/src/mesa/drivers/dri/i965/brw_vs_surface_state.c
|
c3e3903a9089043b280c461a72dab5158dc25d32 |
|
01-Nov-2011 |
Kenneth Graunke <kenneth@whitecape.org> |
i965: Use new vtable entries for surface state updating functions. Now that we have vtable entries in place, we should use them. This allows us to drop the cut and pasted Gen7 brw_tracked_state atoms as they now do exactly the same thing as their brw_wm_surface_state counterparts. Signed-off-by: Kenneth Graunke <kenneth@whitecape.org> Reviewed-by: Eric Anholt <eric@anholt.net>
/external/mesa3d/src/mesa/drivers/dri/i965/brw_vs_surface_state.c
|
395a8605fa80aeef48f6d9e90d9a7c38c259120d |
|
22-Oct-2011 |
Eric Anholt <eric@anholt.net> |
i965: Move VS pull constant upload to emit() time. Only needed by the emit() for VS surfaces. Reviewed-by: Kenneth Graunke <kenneth@whitecape.org> Acked-by: Paul Berry <stereotype441@gmail.com>
/external/mesa3d/src/mesa/drivers/dri/i965/brw_vs_surface_state.c
|
c933b33dc8e45c0ae01e901930842e615960677e |
|
22-Oct-2011 |
Eric Anholt <eric@anholt.net> |
i965: Fold prepare() and emit() of VS surface state setup together. This rearranges the code a bit, and makes the upload of the binding table take only as many surfaces as there are in use. Reviewed-by: Kenneth Graunke <kenneth@whitecape.org> Acked-by: Paul Berry <stereotype441@gmail.com>
/external/mesa3d/src/mesa/drivers/dri/i965/brw_vs_surface_state.c
|
eaf4d3e6e2493a6e0b20d1205a5fb33ce500c9c2 |
|
22-Oct-2011 |
Eric Anholt <eric@anholt.net> |
i965: Remove the validated BO list, now that it's unused. Reviewed-by: Kenneth Graunke <kenneth@whitecape.org> Acked-by: Paul Berry <stereotype441@gmail.com>
/external/mesa3d/src/mesa/drivers/dri/i965/brw_vs_surface_state.c
|
d646d069296982cfee14803fa882fdc4ff1b5abc |
|
04-Oct-2011 |
Brian Paul <brianp@vmware.com> |
i965: remove unneeded includes of texstore.h
/external/mesa3d/src/mesa/drivers/dri/i965/brw_vs_surface_state.c
|
8654931d117f178fa575d3fdc5bbff9f8bf9e816 |
|
22-Aug-2011 |
Eric Anholt <eric@anholt.net> |
i965: Make the old VS backend record pull constant references in pull_params[]. We'll be using that to track things for the new VS backend, and this will avoid cluttering brw_vs_surface_state.c for it. Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
/external/mesa3d/src/mesa/drivers/dri/i965/brw_vs_surface_state.c
|
d375df220fae47f38944c4832bcbd5f5d568884c |
|
23-Jun-2011 |
Eric Anholt <eric@anholt.net> |
i965: Add a type argument to brw_state_batch(). I want to make brw_state_dump.c handle more than just the last statechange, so I want to keep track of what's in the batch state. By using AUB file numbering for most of these packets, this may be reusable for aub dumping. Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
/external/mesa3d/src/mesa/drivers/dri/i965/brw_vs_surface_state.c
|
4ef8464068bc96ea9af71bbd18d121358db303b2 |
|
07-Jun-2011 |
Kenneth Graunke <kenneth@whitecape.org> |
i965/gen7: Call gen7_create_constant_surface instead of brw_[...]. Fixes 17 piglit tests: - glsl-vs-arrays-3 - glsl-vs-texturematrix-2 - glsl-vs-uniform-array-2 - arl - nv-arl - nv-init-zero-addr - vp-address-01 - vp-arl-constant-array - vp-arl-constant-array-huge - vp-arl-constant-array-huge-offset - vp-arl-constant-array-huge-offset-neg - vp-arl-constant-array-huge-relative-offset - vp-arl-constant-array-huge-varying - vp-arl-env-array - vp-arl-local-array - vp-arl-neg-array - vp-arl-neg-array-2 Fixes 4 glean tests: - glsl1-constant array of vec4 with variable indexing, vertex shader - glsl1-constant array with variable indexing, vertex shader - glsl1-constant array with variable indexing, vertex shader (2) - vp1-ARL test Signed-off-by: Kenneth Graunke <kenneth@whitecape.org> Reviewed-by: Eric Anholt <eric@anholt.net>
/external/mesa3d/src/mesa/drivers/dri/i965/brw_vs_surface_state.c
|
e0e2c045965f7bd4becae3dce8394f8455184e0d |
|
22-Feb-2011 |
Kenneth Graunke <kenneth@whitecape.org> |
i965: Split BRW_NEW_BINDING_TABLE dirty bit into one per stage. Ivybridge can update each stage's binding table pointer independently, so we want separate dirty bits. Previous generations can simply subscribe to all three dirty bits and emit as usual. Signed-off-by: Kenneth Graunke <kenneth@whitecape.org> Reviewed-by: Eric Anholt <eric@anholt.net>
/external/mesa3d/src/mesa/drivers/dri/i965/brw_vs_surface_state.c
|
3f55683927278e57f3ef8a151d15f4cffdc060dc |
|
10-Feb-2011 |
Chris Wilson <chris@chris-wilson.co.uk> |
i965: drop state_bo references to batch_bo As we use state relocations and we know that all the state belongs to the same bo, we can drop the multiple references to the same bo. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
/external/mesa3d/src/mesa/drivers/dri/i965/brw_vs_surface_state.c
|
bf15ad37824652b2df61dac5991aa0d4eaa0c436 |
|
23-Dec-2010 |
Eric Anholt <eric@anholt.net> |
i965: Keep around a copy of the VS constant surface dumping code. Just like everywhere else, I never trust my constant uploads to correctly put constants in the right places, even though that's so rarely where the issue is.
/external/mesa3d/src/mesa/drivers/dri/i965/brw_vs_surface_state.c
|
f9995b30756140724f41daf963fa06167912be7f |
|
12-Oct-2010 |
Kristian Høgsberg <krh@bitplanet.net> |
Drop GLcontext typedef and use struct gl_context instead
/external/mesa3d/src/mesa/drivers/dri/i965/brw_vs_surface_state.c
|
ca12aefdacd22fb42e3f1d3852db4c12de886554 |
|
24-Jun-2010 |
Brian Paul <brianp@vmware.com> |
Merge branch 'shader-file-reorg' 1. Move all GL entrypoint functions and files into src/mesa/main/ This includes the ARB vp/vp, NV vp/fp, ATI fragshader and GLSL bits that were in src/mesa/shader/ 2. Move src/mesa/shader/slang/ to src/mesa/slang/ to reduce the tree depth 3. Rename src/mesa/shader/ to src/mesa/program/ since all the remaining files are concerned with GPU programs. 4. Misc code refactoring. In particular, I got rid of most of the GLSL-related ctx->Driver hook functions. None of the drivers used them. Conflicts: src/mesa/drivers/dri/i965/brw_context.c
|
108264e859b4f435e9608472dc2e388aa200183c |
|
11-Jun-2010 |
Eric Anholt <eric@anholt.net> |
i965: Remove the surface key used to generate constant surfaces. We had to fill out all that junk when using the cache, but no more.
/external/mesa3d/src/mesa/drivers/dri/i965/brw_vs_surface_state.c
|
27bc2de5461c1d66c8e005b35de77e7b9e214754 |
|
11-Jun-2010 |
Eric Anholt <eric@anholt.net> |
i965: Use the state base address to avoid relocations. This makes the binding table code simpler, and is required for gen6, which requires binding table addresses to be under 64k offset from the surface state base addr. No significant change in performance on firefox-talos-gfx.
/external/mesa3d/src/mesa/drivers/dri/i965/brw_vs_surface_state.c
|
178414eba402f9087ea505e7ef19f1becdd7a36d |
|
11-Jun-2010 |
Eric Anholt <eric@anholt.net> |
i965: Remove caching of surface state objects. It turns out that computing a 56 byte key to look up a 20-byte object out of a hash table was some sort of a bad idea. Whoops. before: [ # ] backend test min(s) median(s) stddev. count [ 0] gl firefox-talos-gfx 37.799 38.203 0.39% 6/6 after: [ 0] gl firefox-talos-gfx 34.761 34.784 0.17% 5/6
/external/mesa3d/src/mesa/drivers/dri/i965/brw_vs_surface_state.c
|
73de09f265cb1c66d70fd9eb92021882bfbbbef6 |
|
07-Jun-2010 |
Eric Anholt <eric@anholt.net> |
i965: Convert the binding table to streamed indirect state. This slightly reduces reduces cairo-gl firefox-talos-gfx runtime on my Ironlake: before: [ # ] backend test min(s) median(s) stddev. count [ 0] gl firefox-talos-gfx 38.236 38.383 0.43% 5/6 after: [ 0] gl firefox-talos-gfx 37.799 38.203 0.39% 6/6 It turns out the cost of caching these objects and looking them up in the cache again is greater than the cost of just computing the object again, particularly when the overhead of having a separate BO to pin is removed. (Those that are paying close attention will note that this is a reversal of the path I was moving the driver in a couple of years ago. The major thing that has changed is that back then all state was recomputed when we wrapped the streaming state buffer, including recompiling our precious programs. Now, we're uncaching just the objects that are cheap to compute, and retaining caching of expensive objects)
/external/mesa3d/src/mesa/drivers/dri/i965/brw_vs_surface_state.c
|
118a47623a11a374df371d52ed0294224e6a62dc |
|
11-Jun-2010 |
Eric Anholt <eric@anholt.net> |
i965: Split constant buffer setup from its surface state/binding state. This was bothering me when redoing the binding tables.
/external/mesa3d/src/mesa/drivers/dri/i965/brw_vs_surface_state.c
|
ec2b92f98c2e7f161521b447cc1d9a36bce3707c |
|
11-Jun-2010 |
Brian Paul <brianp@vmware.com> |
mesa: rename src/mesa/shader/ to src/mesa/program/
/external/mesa3d/src/mesa/drivers/dri/i965/brw_vs_surface_state.c
|
34474fa4119378ef9fbb9fb557cc19c0a1ca1f7e |
|
07-Jun-2010 |
Eric Anholt <eric@anholt.net> |
intel: Change dri_bo_* to drm_intel_bo* to consistently use new API. The slightly less mechanical change of converting the emit_reloc calls will follow.
/external/mesa3d/src/mesa/drivers/dri/i965/brw_vs_surface_state.c
|
20952f0378247f69849b6e37a7374bc9c94437a0 |
|
05-Mar-2010 |
Eric Anholt <eric@anholt.net> |
i965: Remove the paths for making a const surface object for a NULL BO.
/external/mesa3d/src/mesa/drivers/dri/i965/brw_vs_surface_state.c
|
bb35000b4b6dfe60048b2f5d60bc102c4a7fd791 |
|
05-Mar-2010 |
Eric Anholt <eric@anholt.net> |
intel: Remove non-kernel-exec-fencing support. Shaves 60k off the driver from removing the broken spans code. This means we now require 2.6.29, which seems fair given that it's a year old and we've removed support for non-KMS already in the last release of 2D.
/external/mesa3d/src/mesa/drivers/dri/i965/brw_vs_surface_state.c
|
5e1851b144a97bd577409dd5c6f3f6f45b4ff56f |
|
20-Jan-2010 |
Eric Anholt <eric@anholt.net> |
i965: Remove unnecessary malloc/free in VS binding table setup.
/external/mesa3d/src/mesa/drivers/dri/i965/brw_vs_surface_state.c
|
9b22427911ad27efc1f36faee9462c6082d0417c |
|
25-Jan-2010 |
Brian Paul <brianp@vmware.com> |
Merge branch 'mesa_7_7_branch' Conflicts: src/mesa/drivers/dri/intel/intel_screen.c src/mesa/drivers/dri/intel/intel_swapbuffers.c src/mesa/drivers/dri/r300/r300_emit.c src/mesa/drivers/dri/r300/r300_ioctl.c src/mesa/drivers/dri/r300/r300_tex.c src/mesa/drivers/dri/r300/r300_texstate.c
|
634ec5c2abf05a9a8c27d9199ded5d1ad91e538a |
|
23-Jan-2010 |
Vinson Lee <vlee@vmware.com> |
i965: Remove unnecessary headers.
/external/mesa3d/src/mesa/drivers/dri/i965/brw_vs_surface_state.c
|
62a96f74c9a1fd07301d349e4181a7212fc7d45c |
|
18-Jan-2010 |
Eric Anholt <eric@anholt.net> |
i965: Allow for variable-sized auxdata in the state cache. Everything has been constant-sized until now, but constant buffer handling changes will make us want some additional variable sized array.
/external/mesa3d/src/mesa/drivers/dri/i965/brw_vs_surface_state.c
|
ded0ec1ea5db8e08b0bec8ac0d9d30f98e360003 |
|
12-Nov-2009 |
Eric Anholt <eric@anholt.net> |
i965: Use bo_map instead of subdata to upload the bits of constant buffer. Saves CPU time, resulting in a 2.5% FPS win on ETQW.
/external/mesa3d/src/mesa/drivers/dri/i965/brw_vs_surface_state.c
|
e42b156fac6deed21328b89192faca6f4fe904f1 |
|
11-Nov-2009 |
Eric Anholt <eric@anholt.net> |
Merge remote branch 'origin/mesa_7_6_branch'
|
1220aba99bc78290bb89ade649719508e3031e4b |
|
10-Nov-2009 |
Eric Anholt <eric@anholt.net> |
i965: Fix VS constant buffer value loading. Previously, we'd load linearly from ParameterValues[0] for the constants, though ParameterValues[1] may not equal ParameterValues[0] + 4. Additionally, the STATE_VAL type paramters didn't get updated. Fixes piglit vp-constant-array-huge.vpfp and ET:QW object locations. Bug #23226.
/external/mesa3d/src/mesa/drivers/dri/i965/brw_vs_surface_state.c
|
3e34a2a2b97e7c93955deedb7c12b73bccd6662d |
|
06-Oct-2009 |
Brian Paul <brianp@vmware.com> |
drivers: don't include texformat.h And remove other unneeded #includes while we're at it.
/external/mesa3d/src/mesa/drivers/dri/i965/brw_vs_surface_state.c
|
9490d86808300e5819941a40784e272c290e05ee |
|
05-May-2009 |
Eric Anholt <eric@anholt.net> |
i965: Disentangle VS constant surface state from WM surface state. Also, only create VS surface state if there's a VS constant buffer to be uploaded, and set the contents of the buffer at the same time as creation.
/external/mesa3d/src/mesa/drivers/dri/i965/brw_vs_surface_state.c
|