Searched refs:AddrMode (Results 1 - 25 of 42) sorted by path

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/external/chromium_org/v8/src/arm/
H A Dassembler-arm.cc311 MemOperand::MemOperand(Register rn, int32_t offset, AddrMode am) {
319 MemOperand::MemOperand(Register rn, Register rm, AddrMode am) {
329 ShiftOp shift_op, int shift_imm, AddrMode am) {
339 NeonMemOperand::NeonMemOperand(Register rn, AddrMode am, int align) {
H A Dassembler-arm.h564 explicit MemOperand(Register rn, int32_t offset = 0, AddrMode am = Offset);
569 explicit MemOperand(Register rn, Register rm, AddrMode am = Offset);
575 ShiftOp shift_op, int shift_imm, AddrMode am = Offset);
578 AddrMode am = Offset)) {
595 AddrMode am() const { return am_; }
607 AddrMode am_; // bits P, U, and W
619 explicit NeonMemOperand(Register rn, AddrMode am = Offset, int align = 0);
H A Dconstants-arm.h260 enum AddrMode { enum in namespace:v8::internal
/external/chromium_org/v8/src/arm64/
H A Dassembler-arm64-inl.h460 MemOperand::MemOperand(Register base, int64_t offset, AddrMode addrmode)
494 MemOperand::MemOperand(Register base, const Operand& offset, AddrMode addrmode)
H A Dassembler-arm64.h703 AddrMode addrmode = Offset);
714 AddrMode addrmode = Offset);
719 AddrMode addrmode() const { return addrmode_; }
746 AddrMode addrmode_;
H A Dinstructions-arm64.h72 enum AddrMode { enum in namespace:v8::internal
H A Dsimulator-arm64.cc1565 AddrMode addrmode) {
1668 AddrMode addrmode) {
1826 AddrMode addrmode) {
1846 AddrMode addrmode) {
H A Dsimulator-arm64.h667 AddrMode addrmode);
668 void LoadStorePairHelper(Instruction* instr, AddrMode addrmode);
670 AddrMode addrmode);
673 AddrMode addrmode);
/external/llvm/include/llvm/Target/
H A DTargetLowering.h1249 struct AddrMode {
1254 AddrMode() : BaseGV(nullptr), BaseOffs(0), HasBaseReg(false), Scale(0) {}
1263 virtual bool isLegalAddressingMode(const AddrMode &AM, Type *Ty) const;
1271 virtual int getScalingFactorCost(const AddrMode &AM, Type *Ty) const {
/external/llvm/lib/CodeGen/
H A DBasicTargetTransformInfo.cpp151 TargetLoweringBase::AddrMode AM;
162 TargetLoweringBase::AddrMode AM;
H A DCodeGenPrepare.cpp1037 /// ExtAddrMode - This is an extended version of TargetLowering::AddrMode
1039 struct ExtAddrMode : public TargetLowering::AddrMode {
1509 /// AddrMode - This is the addressing mode that we're building up. This is
1511 ExtAddrMode &AddrMode; member in class:__anon25735::AddressingModeMatcher
1531 : AddrModeInsts(AMI), TLI(T), AccessTy(AT), MemoryInst(MI), AddrMode(AM),
1574 /// Return true and update AddrMode if this addr mode is legal for the target,
1589 if (AddrMode.Scale != 0 && AddrMode.ScaledReg != ScaleReg)
1592 ExtAddrMode TestAddrMode = AddrMode;
1604 AddrMode
2500 ExtAddrMode AddrMode; local
[all...]
H A DTargetLoweringBase.cpp1428 bool TargetLoweringBase::isLegalAddressingMode(const AddrMode &AM,
/external/llvm/lib/CodeGen/SelectionDAG/
H A DDAGCombiner.cpp7556 TargetLowering::AddrMode AM;
/external/llvm/lib/Target/AArch64/
H A DAArch64ISelLowering.cpp6190 bool AArch64TargetLowering::isLegalAddressingMode(const AddrMode &AM,
6241 int AArch64TargetLowering::getScalingFactorCost(const AddrMode &AM,
H A DAArch64ISelLowering.h295 bool isLegalAddressingMode(const AddrMode &AM, Type *Ty) const override;
302 int getScalingFactorCost(const AddrMode &AM, Type *Ty) const override;
/external/llvm/lib/Target/ARM/
H A DARMBaseInstrInfo.cpp155 unsigned AddrMode = (TSFlags & ARMII::AddrModeMask); local
167 switch (AddrMode) {
2001 unsigned AddrMode = (Desc.TSFlags & ARMII::AddrModeMask); local
2006 AddrMode = ARMII::AddrMode2;
2049 switch (AddrMode) {
2109 if (AddrMode == ARMII::AddrMode_i12)
2122 if (AddrMode == ARMII::AddrMode_i12)
H A DARMBaseRegisterInfo.cpp446 unsigned AddrMode = (Desc.TSFlags & ARMII::AddrModeMask); local
450 switch (AddrMode) {
636 unsigned AddrMode = (Desc.TSFlags & ARMII::AddrModeMask); local
645 if (AddrMode == ARMII::AddrMode4 || AddrMode == ARMII::AddrMode6)
651 switch (AddrMode) {
H A DARMISelLowering.cpp9896 bool ARMTargetLowering::isLegalT2ScaledAddressingMode(const AddrMode &AM,
9931 bool ARMTargetLowering::isLegalAddressingMode(const AddrMode &AM,
H A DARMISelLowering.h289 bool isLegalAddressingMode(const AddrMode &AM, Type *Ty) const override;
290 bool isLegalT2ScaledAddressingMode(const AddrMode &AM, EVT VT) const;
H A DThumb1RegisterInfo.cpp353 unsigned AddrMode = (Desc.TSFlags & ARMII::AddrModeMask);
437 if (AddrMode != ARMII::AddrModeT1_s)
H A DThumb2InstrInfo.cpp442 unsigned AddrMode = (Desc.TSFlags & ARMII::AddrModeMask);
447 AddrMode = ARMII::AddrModeT2_i12; // FIXME. mode for thumb2?
517 if (AddrMode == ARMII::AddrMode4 || AddrMode == ARMII::AddrMode6)
523 if (AddrMode == ARMII::AddrModeT2_so) {
533 AddrMode = ARMII::AddrModeT2_i12;
538 if (AddrMode == ARMII::AddrModeT2_i8 || AddrMode == ARMII::AddrModeT2_i12) {
552 } else if (AddrMode == ARMII::AddrMode5) {
566 } else if (AddrMode
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/external/llvm/lib/Target/ARM/MCTargetDesc/
H A DARMBaseInfo.h235 enum AddrMode { enum in namespace:llvm::ARMII
255 inline static const char *AddrModeToString(AddrMode addrmode) {
325 AddrModeMask = 0x1f, // The AddrMode enums are declared in ARMBaseInfo.h
/external/llvm/lib/Target/Hexagon/
H A DHexagonISelLowering.cpp1631 bool HexagonTargetLowering::isLegalAddressingMode(const AddrMode &AM,
H A DHexagonISelLowering.h166 bool isLegalAddressingMode(const AddrMode &AM, Type *Ty) const override;
/external/llvm/lib/Target/Hexagon/MCTargetDesc/
H A DHexagonBaseInfo.h62 enum AddrMode { enum in namespace:llvm::HexagonII

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