| 593a05ca1e177fc584cba399bf66fbf437ba75d9 |
11-Aug-2014 |
Petar Jovanovic <petar.jovanovic@imgtec.com> |
Add support for scalarizing cttz_zero_undef
Follow up to r214266. Add missing case in ScalarizeVectorResult() for
cttz_zero_undef.
Differential Revision: http://reviews.llvm.org/D4813
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215330 91177308-0d34-0410-b5e6-96231b3b80d8
(cherry picked from commit cddb0cfe383207ccec0cc797db401854e5f0c672)
Change-Id: I998526c9a9a77cb340c92ad6b292e7e5a9ba5767
egalizeVectorTypes.cpp
|
| f06aaf11fff0e6fa12d4ee959569a263bf7bd779 |
30-Jul-2014 |
Petar Jovanovic <petar.jovanovic@imgtec.com> |
Add support for scalarizing ctlz_zero_undef
Fix the missing case in ScalarizeVectorResult() that was exposed with
libclcore.bc in Android.
Differential Revision: http://reviews.llvm.org/D4645
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@214266 91177308-0d34-0410-b5e6-96231b3b80d8
(cherry picked from commit 63045274494a5adfedbd4de7280386948f7ca9b9)
Change-Id: I38fc81e0ceefd2cfdd65d7619a62124dc4ceac6f
egalizeVectorTypes.cpp
|
| aa9f408cef5714fc0bc0ec61fa4016a3ba0a8c61 |
12-Sep-2014 |
Benjamin Kramer <benny.kra@googlemail.com> |
Legalizer: Use the scalar bit width when promoting bit counting instrs on
vectors.
e.g. when promoting ctlz from <2 x i32> to <2 x i64> we have to fixup
the result by 32 bits, not 64. PR20917.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@217671 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeIntegerTypes.cpp
|
| cd81d94322a39503e4a3e87b6ee03d4fcb3465fb |
21-Jul-2014 |
Stephen Hines <srhines@google.com> |
Update LLVM for rebase to r212749.
Includes a cherry-pick of:
r212948 - fixes a small issue with atomic calls
Change-Id: Ib97bd980b59f18142a69506400911a6009d9df18
AGCombiner.cpp
astISel.cpp
egalizeDAG.cpp
egalizeIntegerTypes.cpp
egalizeTypes.cpp
egalizeTypes.h
egalizeTypesGeneric.cpp
egalizeVectorOps.cpp
egalizeVectorTypes.cpp
esourcePriorityQueue.cpp
cheduleDAGRRList.cpp
cheduleDAGVLIW.cpp
electionDAG.cpp
electionDAGBuilder.cpp
electionDAGBuilder.h
electionDAGDumper.cpp
electionDAGISel.cpp
argetLowering.cpp
argetSelectionDAGInfo.cpp
|
| dce4a407a24b04eebc6a376f8e62b41aaa7b071f |
29-May-2014 |
Stephen Hines <srhines@google.com> |
Update LLVM for 3.5 rebase (r209712).
Change-Id: I149556c940fb7dc92d075273c87ff584f400941f
AGCombiner.cpp
astISel.cpp
unctionLoweringInfo.cpp
nstrEmitter.cpp
egalizeDAG.cpp
egalizeFloatTypes.cpp
egalizeIntegerTypes.cpp
egalizeTypes.cpp
egalizeTypes.h
egalizeTypesGeneric.cpp
egalizeVectorOps.cpp
egalizeVectorTypes.cpp
esourcePriorityQueue.cpp
DNodeDbgValue.h
cheduleDAGFast.cpp
cheduleDAGRRList.cpp
cheduleDAGSDNodes.cpp
cheduleDAGSDNodes.h
cheduleDAGVLIW.cpp
electionDAG.cpp
electionDAGBuilder.cpp
electionDAGBuilder.h
electionDAGDumper.cpp
electionDAGISel.cpp
electionDAGPrinter.cpp
argetLowering.cpp
|
| 36b56886974eae4f9c5ebc96befd3e7bfe5de338 |
24-Apr-2014 |
Stephen Hines <srhines@google.com> |
Update to LLVM 3.5a.
Change-Id: Ifadecab779f128e62e430c2b4f6ddd84953ed617
ndroid.mk
AGCombiner.cpp
astISel.cpp
unctionLoweringInfo.cpp
nstrEmitter.cpp
egalizeDAG.cpp
egalizeIntegerTypes.cpp
egalizeTypes.cpp
egalizeTypes.h
egalizeTypesGeneric.cpp
egalizeVectorOps.cpp
egalizeVectorTypes.cpp
esourcePriorityQueue.cpp
DNodeDbgValue.h
cheduleDAGFast.cpp
cheduleDAGRRList.cpp
cheduleDAGSDNodes.cpp
cheduleDAGSDNodes.h
cheduleDAGVLIW.cpp
electionDAG.cpp
electionDAGBuilder.cpp
electionDAGBuilder.h
electionDAGDumper.cpp
electionDAGISel.cpp
electionDAGPrinter.cpp
argetLowering.cpp
argetSelectionDAGInfo.cpp
|
| ce9904c6ea8fd669978a8eefb854b330eb9828ff |
12-Feb-2014 |
Stephen Hines <srhines@google.com> |
Merge remote-tracking branch 'upstream/release_34' into merge-20140211
Conflicts:
lib/Linker/LinkModules.cpp
lib/Support/Unix/Signals.inc
Change-Id: Ia54f291fa5dc828052d2412736e8495c1282aa64
|
| 77e30195a006a022b1554933bc766b604692b9d1 |
15-Dec-2013 |
Bill Wendling <isanbard@gmail.com> |
Merging r197047:
------------------------------------------------------------------------
r197047 | d0k | 2013-12-11 08:36:09 -0800 (Wed, 11 Dec 2013) | 3 lines
SelectionDAG: Fix a typo.
Found by "cppcheck". PR18208.
------------------------------------------------------------------------
git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_34@197355 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| b1eb9dd018475d45d9a8f705441f8f6c86a8f986 |
10-Dec-2013 |
Bill Wendling <isanbard@gmail.com> |
Merging r196858:
------------------------------------------------------------------------
r196858 | nadav | 2013-12-09 17:13:59 -0800 (Mon, 09 Dec 2013) | 1 line
Fix PR18162 - Incorrect assertion assumed that the SDValue resno is zero.
------------------------------------------------------------------------
git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_34@196886 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| aee5c3e1052b2e144fdc6461bd602cdc502a93cc |
05-Dec-2013 |
Bill Wendling <isanbard@gmail.com> |
Revert r191049 and r191059. They were causing failures. See PR17975.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_34@196521 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 1349899ba424eb4655c890bdfecb514682627a8d |
25-Nov-2013 |
Bill Wendling <isanbard@gmail.com> |
Merging r195670:
------------------------------------------------------------------------
r195670 | void | 2013-11-25 10:05:22 -0800 (Mon, 25 Nov 2013) | 5 lines
Unrevert r195599 with testcase fix.
I'm not sure how it was checking for the wrong values...
PR18023.
------------------------------------------------------------------------
git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_34@195672 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| ddc3c964657cc0be4994ddfaf056d5ec6bb11e5b |
25-Nov-2013 |
Bill Wendling <isanbard@gmail.com> |
Merging r195636:
------------------------------------------------------------------------
r195636 | aemerson | 2013-11-25 03:24:18 -0800 (Mon, 25 Nov 2013) | 2 lines
Revert r195599 as it broke the builds.
------------------------------------------------------------------------
git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_34@195671 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 975e958dbc12ba412385b721100fc1c830b0e3ab |
25-Nov-2013 |
Daniel Sanders <daniel.sanders@imgtec.com> |
Merging r195635:
------------------------------------------------------------------------
r195635 | dsanders | 2013-11-25 11:14:43 +0000 (Mon, 25 Nov 2013) | 19 lines
Fixed tryFoldToZero() for vector types that need expansion.
Summary:
Moved the requirement for SelectionDAG::getConstant() to return legally
typed nodes slightly earlier. There were two optional DAGCombine passes
that were missed out and were required to produce type-legal DAGs.
Simplified a code-path in tryFoldToZero() to use SelectionDAG::getConstant().
This provides support for both promoted and expanded vector types whereas the
previous code only supported promoted vector types.
Fixes a "Type for zero vector elements is not legal" assertion detected by
an llvm-stress generated test.
Reviewers: resistor
CC: llvm-commits
Differential Revision: http://llvm-reviews.chandlerc.com/D2251
------------------------------------------------------------------------
git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_34@195651 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
electionDAGISel.cpp
|
| f02a188899769cde2315c964f0fbed1d024b7514 |
25-Nov-2013 |
Bill Wendling <isanbard@gmail.com> |
Merging r195491:
------------------------------------------------------------------------
r195491 | probinson | 2013-11-22 11:11:24 -0800 (Fri, 22 Nov 2013) | 11 lines
Teach ISel not to optimize 'optnone' functions (revised).
Improvements over r195317:
- Set/restore EnableFastISel flag instead of just running FastISel within
SelectAllBasicBlocks; the flag is checked in various places, and
FastISel won't run properly if those places don't do the right thing.
- Test looks for normal ISel versus FastISel behavior, and not
something more subtle that doesn't work everywhere.
Based on work by Andrea Di Biagio.
------------------------------------------------------------------------
git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_34@195604 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| e1679735d6df98bd71808f3c34a32599de0f40a1 |
25-Nov-2013 |
Bill Wendling <isanbard@gmail.com> |
Merging r195599:
------------------------------------------------------------------------
r195599 | void | 2013-11-24 21:01:21 -0800 (Sun, 24 Nov 2013) | 4 lines
Don't look past volatile loads.
A volatile load should block us from trying to coalesce stores.
PR18023
------------------------------------------------------------------------
git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_34@195600 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| f0061998dd1256df1ba933e80fdad2f594ea3f50 |
22-Nov-2013 |
Bill Wendling <isanbard@gmail.com> |
Merging r195398:
------------------------------------------------------------------------
r195398 | tstellar | 2013-11-21 16:41:05 -0800 (Thu, 21 Nov 2013) | 7 lines
SelectionDAG: Optimize expansion of vec_type = BITCAST scalar_type
The legalizer can now do this type of expansion for more
type combinations without loading and storing to and
from the stack.
NOTE: This is a candidate for the 3.4 branch.
------------------------------------------------------------------------
git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_34@195414 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeTypes.h
egalizeTypesGeneric.cpp
|
| f62b274a93d4014d56fa3a656f4fac6e7d827358 |
22-Nov-2013 |
Bill Wendling <isanbard@gmail.com> |
Merging r195397:
------------------------------------------------------------------------
r195397 | tstellar | 2013-11-21 16:39:23 -0800 (Thu, 21 Nov 2013) | 11 lines
Split SETCC if VSELECT requires splitting too.
This patch is a rewrite of the original patch commited in r194542. Instead of
relying on the type legalizer to do the splitting for us, we now peform the
splitting ourselves in the DAG combiner. This is necessary for the case where
the vector mask is a legal type after promotion and still wouldn't require
splitting.
Patch by: Juergen Ributzka
NOTE: This is a candidate for the 3.4 branch.
------------------------------------------------------------------------
git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_34@195413 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
egalizeTypesGeneric.cpp
|
| ee287ca22abcce9f769618c107ff3f46aa2d0cba |
22-Nov-2013 |
Bill Wendling <isanbard@gmail.com> |
Merging r195156:
------------------------------------------------------------------------
r195156 | ributzka | 2013-11-19 13:20:17 -0800 (Tue, 19 Nov 2013) | 3 lines
[DAG] Refactor vector splitting code in SelectionDAG. No functional change intended.
Reviewed by Tom
------------------------------------------------------------------------
git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_34@195412 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeTypes.cpp
egalizeTypes.h
egalizeTypesGeneric.cpp
egalizeVectorTypes.cpp
electionDAG.cpp
electionDAGISel.cpp
|
| 54075bbea7e70fea6cdb9e5e89b066118c1d314b |
21-Nov-2013 |
Bill Wendling <isanbard@gmail.com> |
Merging r195339:
------------------------------------------------------------------------
r195339 | chapuni | 2013-11-21 02:55:15 -0800 (Thu, 21 Nov 2013) | 5 lines
Revert r195317 (and r195333), "Teach ISel not to optimize 'optnone' functions."
It broke, at least, i686 target. It is reproducible with "llc -mtriple=i686-unknown".
FYI, it didn't appear to add either "-O0" or "-fast-isel".
------------------------------------------------------------------------
git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_34@195375 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 4e2d2f091e88dd83d1685173d2c0692d8ae155e6 |
21-Nov-2013 |
Daniel Sanders <daniel.sanders@imgtec.com> |
Merging r195355:
------------------------------------------------------------------------
r195355 | dsanders | 2013-11-21 13:24:49 +0000 (Thu, 21 Nov 2013) | 20 lines
Add support for legalizing SETNE/SETEQ by inverting the condition code and the result of the comparison.
Summary:
LegalizeSetCCCondCode can now legalize SETEQ and SETNE by returning the inverse
condition and requesting that the caller invert the result of the condition.
The caller of LegalizeSetCCCondCode must handle the inverted CC, and they do
so as follows:
SETCC, BR_CC:
Invert the result of the SETCC with SelectionDAG::getNOT()
SELECT_CC:
Swap the true/false operands.
This is necessary for MSA which lacks an integer SETNE instruction.
Reviewers: resistor
CC: llvm-commits
Differential Revision: http://llvm-reviews.chandlerc.com/D2229
------------------------------------------------------------------------
git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_34@195363 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 0a0da619eb7a072836cf2c5debee1c5c7c8f5496 |
21-Nov-2013 |
Bill Wendling <isanbard@gmail.com> |
Merging r195317:
------------------------------------------------------------------------
r195317 | probinson | 2013-11-20 22:33:32 -0800 (Wed, 20 Nov 2013) | 4 lines
Teach ISel not to optimize 'optnone' functions.
Based on work by Andrea Di Biagio.
------------------------------------------------------------------------
git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_34@195321 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| c00090b16b2b35f2d042d965945c4246d13321b5 |
19-Nov-2013 |
Bill Wendling <isanbard@gmail.com> |
Merging r195103:
------------------------------------------------------------------------
r195103 | atrick | 2013-11-18 21:05:43 -0800 (Mon, 18 Nov 2013) | 1 line
Fix patchpoint comments.
------------------------------------------------------------------------
git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_34@195115 91177308-0d34-0410-b5e6-96231b3b80d8
nstrEmitter.cpp
|
| d5ae5b018644345ba0fc48a47030ef1105e1abfd |
17-Nov-2013 |
Benjamin Kramer <benny.kra@googlemail.com> |
DAGCombiner: Partially revert r192795, getNOT was fixed not to create illegal constants.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194959 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| ca1b7799aaeeeb0c6af80fa31fb8f74e79ab2967 |
17-Nov-2013 |
Matt Arsenault <Matthew.Arsenault@amd.com> |
Use more getZExtOrTruncs
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194945 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
egalizeTypes.cpp
|
| 91053d585abf6b20b770532d007a8b7648d0621f |
17-Nov-2013 |
Matt Arsenault <Matthew.Arsenault@amd.com> |
Use getZExtOrTrunc instead of repeating the same logic.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194944 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 94437c9691d538cc5d3862660c79fce2a32e2279 |
17-Nov-2013 |
Matt Arsenault <Matthew.Arsenault@amd.com> |
Use right address space pointer size
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194940 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| e6e811277f045ee3d61cd62622d71005c47eb48d |
16-Nov-2013 |
Matt Arsenault <Matthew.Arsenault@amd.com> |
Fix assert on unaligned access to global with different address space size.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194934 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 4fe5b640ee935f983db9445dc9fdb4009d4fa639 |
16-Nov-2013 |
Matt Arsenault <Matthew.Arsenault@amd.com> |
Fix codegen for null different sized pointer.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194932 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| cc7052343e5e955d4e2f48885c06360f9003390a |
15-Nov-2013 |
Bob Wilson <bob.wilson@apple.com> |
Avoid illegal integer promotion in fastisel
Stop folding constant adds into GEP when the type size doesn't match.
Otherwise, the adds' operands are effectively being promoted, changing the
conditions of an overflow. Results are different when:
sext(a) + sext(b) != sext(a + b)
Problem originally found on x86-64, but also fixed issues with ARM and PPC,
which used similar code.
<rdar://problem/15292280>
Patch by Duncan Exon Smith!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194840 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
|
| ea28aafa83fc2b6dd632041278c9a18e5a2b2b41 |
15-Nov-2013 |
Daniel Sanders <daniel.sanders@imgtec.com> |
Fix illegal DAG produced by SelectionDAG::getConstant() for v2i64 type
Summary:
When getConstant() is called for an expanded vector type, it is split into
multiple scalar constants which are then combined using appropriate build_vector
and bitcast operations.
In addition to the usual big/little endian differences, the case where the
element-order of the vector does not have the same endianness as the elements
themselves is also accounted for. For example, for v4i32 on big-endian MIPS,
the byte-order of the vector is <3210,7654,BA98,FEDC>. For little-endian, it is
<0123,4567,89AB,CDEF>.
Handling this case turns out to be a nop since getConstant() returns a splatted
vector (so reversing the element order doesn't change the value)
This fixes a number of cases in MIPS MSA where calling getConstant() during
operation legalization introduces illegal types (e.g. to legalize v2i64 UNDEF
into a v2i64 BUILD_VECTOR of illegal i64 zeros). It should also handle bigger
differences between illegal and legal types such as legalizing v2i64 into v8i16.
lowerMSASplatImm() in the MIPS backend no longer needs to avoid calling
getConstant() so this function has been updated in the same patch.
For the sake of transparency, the steps I've taken since the review are:
* Added 'virtual' to isVectorEltOrderLittleEndian() as requested. This revealed
that the MIPS tests were falsely passing because a polymorphic function was
not actually polymorphic in the reviewed patch.
* Fixed the tests that were now failing. This involved deleting the code to
handle the MIPS MSA element-order (which was previously doing an byte-order
swap instead of an element-order swap). This left
isVectorEltOrderLittleEndian() unused and it was deleted.
* Fixed build failures caused by rebasing beyond r194467-r194472. These build
failures involved the bset, bneg, and bclr instructions added in these commits
using lowerMSASplatImm() in a way that was no longer valid after this patch.
Some of these were fixed by calling SelectionDAG::getConstant() instead,
others were fixed by a new function getBuildVectorSplat() that provided the
removed functionality of lowerMSASplatImm() in a more sensible way.
Reviewers: bkramer
Reviewed By: bkramer
CC: llvm-commits
Differential Revision: http://llvm-reviews.chandlerc.com/D1973
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194811 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
electionDAGISel.cpp
|
| 509a492442b7e889d615d3b451629c81a810aef1 |
15-Nov-2013 |
Matt Arsenault <Matthew.Arsenault@amd.com> |
Add target hook to prevent folding some bitcasted loads.
This is to avoid this transformation in some cases:
fold (conv (load x)) -> (load (conv*)x)
On architectures that don't natively support some vector
loads efficiently casting the load to a smaller vector of
larger types and loading is more efficient.
Patch by Micah Villmow.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194783 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 59d3ae6cdc4316ad338cd848251f33a236ccb36c |
15-Nov-2013 |
Matt Arsenault <Matthew.Arsenault@amd.com> |
Add addrspacecast instruction.
Patch by Michele Scandale!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194760 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
electionDAGBuilder.cpp
electionDAGBuilder.h
electionDAGDumper.cpp
|
| 72cf01cc7c8f668a17e7fdfe6aaed50e164cac1b |
14-Nov-2013 |
Andrew Trick <atrick@apple.com> |
Minor extension to llvm.experimental.patchpoint: don't require a call.
If a null call target is provided, don't emit a dummy call. This
allows the runtime to reserve as little nop space as it needs without
the requirement of emitting a call.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194676 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| c7e77f91fecd662b198939a9a8ee0a0cc3828fc4 |
13-Nov-2013 |
Juergen Ributzka <juergen@apple.com> |
SelectionDAG: Teach the legalizer to split SETCC if VSELECT needs splitting too.
This patch reapplies r193676 with an additional fix for the Hexagon backend. The
SystemZ backend has already been fixed by r194148.
The Type Legalizer recognizes that VSELECT needs to be split, because the type
is to wide for the given target. The same does not always apply to SETCC,
because less space is required to encode the result of a comparison. As a result
VSELECT is split and SETCC is unrolled into scalar comparisons.
This commit fixes the issue by checking for VSELECT-SETCC patterns in the DAG
Combiner. If a matching pattern is found, then the result mask of SETCC is
promoted to the expected vector mask type for the given target. Now the type
legalizer will split both VSELECT and SETCC.
This allows the following X86 DAG Combine code to sucessfully detect the MIN/MAX
pattern. This fixes PR16695, PR17002, and <rdar://problem/14594431>.
Reviewed by Nadav
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194542 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
egalizeTypesGeneric.cpp
|
| 028e4d27b1afc62be0687e9c3b57992c36852938 |
11-Nov-2013 |
Daniel Sanders <daniel.sanders@imgtec.com> |
Vector forms of SHL, SRA, and SRL can be constant folded using SimplifyVBinOp too
Reviewers: dsanders
Reviewed By: dsanders
CC: llvm-commits, nadav
Differential Revision: http://llvm-reviews.chandlerc.com/D1958
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194393 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| d4f5a615674aaabeee4e444e708d1fa00a41495e |
09-Nov-2013 |
Juergen Ributzka <juergen@apple.com> |
[Stackmap] Materialize the jump address within the patchpoint noop slide.
This patch moves the jump address materialization inside the noop slide. This
enables patching of the materialization itself or its complete removal. This
patch also adds the ability to define scratch registers that can be used safely
by the code called from the patchpoint intrinsic. At least one scratch register
is required, because that one is used for the materialization of the jump
address. This patch depends on D2009.
Differential Revision: http://llvm-reviews.chandlerc.com/D2074
Reviewed by Andy
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194306 91177308-0d34-0410-b5e6-96231b3b80d8
nstrEmitter.cpp
electionDAGBuilder.cpp
|
| 623d2e618f4e672c47edff9ec63ed6d733ac81d3 |
09-Nov-2013 |
Juergen Ributzka <juergen@apple.com> |
[Stackmap] Add AnyReg calling convention support for patchpoint intrinsic.
The idea of the AnyReg Calling Convention is to provide the call arguments in
registers, but not to force them to be placed in a paticular order into a
specified set of registers. Instead it is up tp the register allocator to assign
any register as it sees fit. The same applies to the return value (if
applicable).
Differential Revision: http://llvm-reviews.chandlerc.com/D2009
Reviewed by Andy
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194293 91177308-0d34-0410-b5e6-96231b3b80d8
nstrEmitter.cpp
electionDAGBuilder.cpp
electionDAGBuilder.h
|
| dc8224def3d88915b0ff830687815a9a0aad5f63 |
05-Nov-2013 |
Andrew Trick <atrick@apple.com> |
Slightly change the way stackmap and patchpoint intrinsics are lowered.
MorphNodeTo is not safe to call during DAG building. It eagerly
deletes dependent DAG nodes which invalidates the NodeMap. We could
expose a safe interface for morphing nodes, but I don't think it's
worth it. Just create a new MachineNode and replaceAllUsesWith.
My understaning of the SD design has been that we want to support
early target opcode selection. That isn't very well supported, but
generally works. It seems reasonable to rely on this feature even if
it isn't widely used.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194102 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| 26cc826a0e4693b861776d6b349d41d0e5c2678e |
01-Nov-2013 |
Juergen Ributzka <juergen@apple.com> |
[Stackmap] Remove erroneous assert.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@193871 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| 307cfaeaf0bc629357725fb0c471e45319d48ff1 |
01-Nov-2013 |
Aaron Ballman <aaron@aaronballman.com> |
Commenting out this assert because it is causing the build bots to fail. This effectively reverts r193861, but needs to be fixed as part of r193769.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@193862 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| 8d13de3f0900e674920921bfb2d1b4c1893c0f27 |
01-Nov-2013 |
Aaron Ballman <aaron@aaronballman.com> |
Fixing an order of evaluation error in an assert.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@193861 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| 3d74dea4bddc84d1881efc21eb5eefbddbfa9aed |
31-Oct-2013 |
Andrew Trick <atrick@apple.com> |
Add support for stack map generation in the X86 backend.
Originally implemented by Lang Hames.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@193811 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| 2343e3b228c02896f4779962a91aaa659356fe2a |
31-Oct-2013 |
Andrew Trick <atrick@apple.com> |
Lower stackmap intrinsics directly to their target opcode in the DAG builder.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@193769 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
electionDAGBuilder.h
argetLowering.cpp
|
| cf940ceff73f567876f1a1f62d3acbf67c43ea90 |
31-Oct-2013 |
Andrew Trick <atrick@apple.com> |
whitespace
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@193765 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.h
|
| 0e536ee4cae5f7359e8a8db99edadc39a5c12132 |
31-Oct-2013 |
Jim Grosbach <grosbach@apple.com> |
Legalize: Improve legalization of long vector extends.
When an extend more than doubles the size of the elements (e.g., a zext
from v16i8 to v16i32), the normal legalization method of splitting the
vectors will run into problems as by the time the destination vector is
legal, the source vector is illegal. The end result is the operation
often becoming scalarized, with the typical horrible performance. For
example, on x86_64, the simple input of:
define void @bar(<16 x i8> %a, <16 x i32>* %p) nounwind {
%tmp = zext <16 x i8> %a to <16 x i32>
store <16 x i32> %tmp, <16 x i32>*%p
ret void
}
Generates:
.section __TEXT,__text,regular,pure_instructions
.section __TEXT,__const
.align 5
LCPI0_0:
.long 255 ## 0xff
.long 255 ## 0xff
.long 255 ## 0xff
.long 255 ## 0xff
.long 255 ## 0xff
.long 255 ## 0xff
.long 255 ## 0xff
.long 255 ## 0xff
.section __TEXT,__text,regular,pure_instructions
.globl _bar
.align 4, 0x90
_bar:
vpunpckhbw %xmm0, %xmm0, %xmm1
vpunpckhwd %xmm0, %xmm1, %xmm2
vpmovzxwd %xmm1, %xmm1
vinsertf128 $1, %xmm2, %ymm1, %ymm1
vmovaps LCPI0_0(%rip), %ymm2
vandps %ymm2, %ymm1, %ymm1
vpmovzxbw %xmm0, %xmm3
vpunpckhwd %xmm0, %xmm3, %xmm3
vpmovzxbd %xmm0, %xmm0
vinsertf128 $1, %xmm3, %ymm0, %ymm0
vandps %ymm2, %ymm0, %ymm0
vmovaps %ymm0, (%rdi)
vmovaps %ymm1, 32(%rdi)
vzeroupper
ret
So instead we can check if there are legal types that enable us to split
more cleverly when the input vector is already legal such that we don't
turn it into an illegal type. If the extend is such that it's more than
doubling the size of the input we check if
- the number of vector elements is even,
- the source type is legal,
- the type of a split source is illegal,
- the type of an extended (by doubling element size) source is legal, and
- the type of that extended source when split is legal.
If the conditions are met, instead of just splitting both the
destination and the source types, we create an extend that only goes up
one "step" (doubling the element width), and the continue legalizing the
rest of the operation normally. The result is that this operates as a
new, more effecient, termination condition for the loop of "split the
operation until the destination type is legal."
With this change, the above example now compiles to:
_bar:
vpxor %xmm1, %xmm1, %xmm1
vpunpcklbw %xmm1, %xmm0, %xmm2
vpunpckhwd %xmm1, %xmm2, %xmm3
vpunpcklwd %xmm1, %xmm2, %xmm2
vinsertf128 $1, %xmm3, %ymm2, %ymm2
vpunpckhbw %xmm1, %xmm0, %xmm0
vpunpckhwd %xmm1, %xmm0, %xmm3
vpunpcklwd %xmm1, %xmm0, %xmm0
vinsertf128 $1, %xmm3, %ymm0, %ymm0
vmovaps %ymm0, 32(%rdi)
vmovaps %ymm2, (%rdi)
vzeroupper
ret
This generalizes a custom lowering that was added a while back to the
ARM backend. That lowering is no longer necessary, and is removed. The
testcases for it, however, provide excellent ARM tests for this change
and so remain.
rdar://14735100
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@193727 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeTypes.h
egalizeVectorTypes.cpp
|
| 4f17f88071260cecffd96c272098549ac5887523 |
31-Oct-2013 |
Matt Arsenault <Matthew.Arsenault@amd.com> |
Fix CodeGen for unaligned loads with address spaces
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@193721 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 9a5df73e32819c45884feee6bd49e7ebe911f977 |
30-Oct-2013 |
Juergen Ributzka <juergen@apple.com> |
Revert "SelectionDAG: Teach the legalizer to split SETCC if VSELECT needs splitting too."
Now Hexagon and SystemZ are not happy with it :-(
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@193677 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
egalizeTypesGeneric.cpp
|
| 4eced19c505bb32dc210a18e87624f64d011894c |
30-Oct-2013 |
Juergen Ributzka <juergen@apple.com> |
SelectionDAG: Teach the legalizer to split SETCC if VSELECT needs splitting too.
The Type Legalizer recognizes that VSELECT needs to be split, because the type
is to wide for the given target. The same does not always apply to SETCC,
because less space is required to encode the result of a comparison. As a result
VSELECT is split and SETCC is unrolled into scalar comparisons.
This commit fixes the issue by checking for VSELECT-SETCC patterns in the DAG
Combiner. If a matching pattern is found, then the result mask of SETCC is
promoted to the expected vector mask type for the given target. This mask has
usually the same size as the VSELECT return type (except for Intel KNL). Now the
type legalizer will split both VSELECT and SETCC.
This allows the following X86 DAG Combine code to sucessfully detect the MIN/MAX
pattern. This fixes PR16695, PR17002, and <rdar://problem/14594431>.
Reviewed by Nadav
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@193676 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
egalizeTypesGeneric.cpp
|
| 18a988e3a76eb0f8783d115618e48466854f5901 |
29-Oct-2013 |
Alp Toker <alp@nuanti.com> |
Fix "existant" typos
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@193579 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| a7be36c8eb4717e44b05e00008544b883fc87de9 |
28-Oct-2013 |
Richard Sandiford <rsandifo@linux.vnet.ibm.com> |
[DAGCombiner] Respect volatility when checking for aliases
Making useAA() default to true for SystemZ showed that the combiner alias
analysis wasn't handling volatile accesses. This hit many of the SystemZ
tests, but I arbitrarily picked one for the purpose of this patch.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@193518 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 66589dcc8fb5dcf0894a9a80a8dee890a4f3a379 |
28-Oct-2013 |
Richard Sandiford <rsandifo@linux.vnet.ibm.com> |
Keep TBAA info when rewriting SelectionDAG loads and stores
Most SelectionDAG code drops the TBAA info when creating a new form of a
load and store (e.g. during legalization, or when converting a plain
load to an extending one). This patch tries to catch all cases where
the TBAA information can legitimately be carried over.
The patch adds alternative forms of getLoad() and getExtLoad() that take
a MachineMemOperand instead of individual fields. (The corresponding
getTruncStore() already exists.) The idea is to use the MachineMemOperand
forms when all fields are carried over (size, pointer info, isVolatile,
isNonTemporal, alignment and TBAA info). If some adjustment is being
made, e.g. to narrow the load, then we still pass the individual fields
but also pass the TBAA info.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@193517 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
egalizeDAG.cpp
egalizeFloatTypes.cpp
egalizeIntegerTypes.cpp
egalizeTypesGeneric.cpp
egalizeVectorOps.cpp
egalizeVectorTypes.cpp
electionDAG.cpp
|
| 5a42ae81f742aaab826b7a72cb0a9a7e5a957a07 |
25-Oct-2013 |
Tim Northover <tnorthover@apple.com> |
LegalizeDAG: allow libcalls for max/min atomic operations
ARM processors without ldrex/strex need to be able to make libcalls for all
atomic operations, including the newer min/max versions.
The alternative would probably be expanding these operations in terms of
cmpxchg (as x86 does always), but in the configurations where this matters
code-size tends to be paramount so the libcall is more desirable.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@193398 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 97541d400e5011fd8ab5d2eb2a736c301d85b232 |
25-Oct-2013 |
Nadav Rotem <nrotem@apple.com> |
Optimize concat_vectors(X, undef) -> scalar_to_vector(X).
This optimization is not SSE specific so I am moving it to DAGco.
The new scalar_to_vector dag node exposed a missing pattern in the AArch64 target that I needed to add.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@193393 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| d0716b064744598ba7df33b8b47de0375c450570 |
23-Oct-2013 |
Tom Stellard <thomas.stellard@amd.com> |
SelectionDAG: Pass along the original argument/element type in ISD::InputArg
For some targets, it is useful to be able to look at the original
type of an argument without having to dig through the original IR.
This also fixes a bug in SelectionDAGBuilder where InputArg.PartOffset
was not taking into account the offset of structure elements.
Patch by: Justin Holewinski
Tom Stellard:
- Changed the type of ArgVT to EVT, so it can store non-simple types
like v3i32.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@193214 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| 8c955ea858b0c99c856c7c10a3eee7576d13abd1 |
22-Oct-2013 |
Wan Xiaofei <xiaofei.wan@intel.com> |
Using FoldingSet in SelectionDAG::getVTList.
VTList has a long life cycle through the module and getVTList is frequently called. In current getVTList, sequential search over a std::vector is used, this is inefficient in big module.
This patch use FoldingSet to implement hashing mechanism when searching.
Reviewer: Nadav Rotem
Test : Pass unit tests & LNT test suite
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@193150 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| ff71812dfaf30015a9abc5cb4712e67b96fe075e |
21-Oct-2013 |
Matt Arsenault <Matthew.Arsenault@amd.com> |
Fix CodeGen for different size address space GEPs
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@193111 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| 599c0afb244e61fed389ea0d4b5479fbc380dfbf |
21-Oct-2013 |
Matt Arsenault <Matthew.Arsenault@amd.com> |
Reuse variable
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@193107 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| 6cd04fdaae8c604aca3696ba120bde26a2ee9b67 |
18-Oct-2013 |
Bill Schmidt <wschmidt@linux.vnet.ibm.com> |
[PATCH] Fix PR17168 (DAG scheduler inserts DBG_VALUE before PHI with fast-isel)
PR17168 describes a test case that fails when compiling for debug with
fast-isel. Investigation showed that the test was failing because a DBG_VALUE
machine instruction was placed prior to a PHI.
For this problem to occur requires the following:
* Compile for debug
* Compile with fast-isel
* In a block B, fast-isel must partially succeed before punting to DAG-isel
* B must start with a PHI
* The first unhandled node in the DAG must not generate a machine instruction
* A debug value with an order less than that of that first node exists
When all of these circumstances apply, the existing test that an instruction
was not inserted won't fire. Currently it tests whether the block is empty,
or whether the last instruction generated is a phi. When fast-isel has
partially succeeded, the last instruction generated will not be a phi.
Instead, we need to check whether the current insert position is immediately
following a phi. This patch adds that check, and adds the test case from the
PR as a regression test.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192976 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGSDNodes.cpp
|
| 641bea117d2f5e68c11156b9eea1c9270825dfb9 |
18-Oct-2013 |
David Majnemer <david.majnemer@gmail.com> |
CodeGen: Emit a libcall if the target doesn't support 16-byte wide atomics
There are targets that support i128 sized scalars but cannot emit
instructions that modify them directly. The proper thing to do is to
emit a libcall.
This fixes PR17481.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192957 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
egalizeIntegerTypes.cpp
|
| f9a5e40b90e5a98cfae5c0f8a42eedd71c849dbc |
17-Oct-2013 |
Richard Sandiford <rsandifo@linux.vnet.ibm.com> |
Replace sra with srl if a single sign bit is required
E.g. (and (sra (i32 x) 31) 2) -> (and (srl (i32 x) 30) 2).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192884 91177308-0d34-0410-b5e6-96231b3b80d8
argetLowering.cpp
|
| 888cbad774acdff580611f6b07daaf96e825b7e7 |
17-Oct-2013 |
Andrea Di Biagio <Andrea_DiBiagio@sn.scee.net> |
Fix edge condition in DAGCombiner to improve codegen of shift sequences.
When canonicalizing dags according to the rule
(shl (zext (shr X, c1) ), c1) ==> (zext (shl (shr X, c1), c1))
remember to add the new shl dag to the DAGCombiner worklist of nodes.
If we don't explicitly add it to the worklist of nodes to visit, we
may not trigger later on the rule that folds the shift left + logical
shift right into a AND instruction with bitmask.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192883 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| adbd3ae1dfa7530d23653b6fd910d28de8217fbd |
17-Oct-2013 |
Jack Carter <jack.carter@imgtec.com> |
[projects/test-suite] White space and long line fixes.
No functionality changes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192863 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 72a3ee742296aa68fda0118d0e1fa649be756938 |
16-Oct-2013 |
Benjamin Kramer <benny.kra@googlemail.com> |
DAGCombiner: Don't fold xor into not if getNOT would introduce an illegal constant.
This happens e.g. with <2 x i64> -1 on x86_32. It cannot be generated directly
because i64 is illegal. It would be nice if getNOT would handle this
transparently, but I don't see a way to generate a legal constant there right
now. Fixes PR17487.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192795 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 5d7e93c0d44a96a416d2f1d1518954d8fed73f40 |
16-Oct-2013 |
Richard Sandiford <rsandifo@linux.vnet.ibm.com> |
Handle (shl (anyext (shr ...))) in SimpilfyDemandedBits
This is really an extension of the current (shl (shr ...)) -> shl optimization.
The main difference is that certain upper bits must also not be demanded.
The motivating examples are the first two in the testcase, which occur
in llvmpipe output.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192783 91177308-0d34-0410-b5e6-96231b3b80d8
argetLowering.cpp
|
| 54de36b39d9e6fe61e1fe697737056c567e7008a |
14-Oct-2013 |
David Blaikie <dblaikie@gmail.com> |
Fix indenting.
That wasn't confusing /at all/...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192617 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
|
| 55240a5ddbaebc44c9acb0353c18a394b06f348f |
14-Oct-2013 |
Elena Demikhovsky <elena.demikhovsky@intel.com> |
Fixed a bug in dynamic allocation memory on stack.
The alignment of allocated space was wrong, see Bugzila 17345.
Done by Zvi Rackover <zvi.rackover@intel.com>.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192573 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 833a29c296da0a6af622448569dcbe01b5cae6c7 |
13-Oct-2013 |
Will Dietz <wdietz2@illinois.edu> |
TargetLowering: Don't index into empty string.
(This is triggered by current lit tests)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192549 91177308-0d34-0410-b5e6-96231b3b80d8
argetLowering.cpp
|
| 83f743a4d5b4298893adaada0270ff2d832a50c7 |
11-Oct-2013 |
Quentin Colombet <qcolombet@apple.com> |
[DAGCombiner] Reapply load slicing (192471) with a test that explicitly set sse4.2 support.
This should fix the buildbots.
Original commit message:
[DAGCombiner] Slice a big load in two loads when the element are next to each
other in memory and the target has paired load and performs post-isel loads
combining.
E.g., this optimization will transform something like this:
a = load i64* addr
b = trunc i64 a to i32
c = lshr i64 a, 32
d = trunc i64 c to i32
into:
b = load i32* addr1
d = load i32* addr2
Where addr1 = addr2 +/- sizeof(i32), if the target supports paired load and
performs post-isel loads combining.
One should overload TargetLowering::hasPairedLoad to provide this information.
The default is false.
<rdar://problem/14477220>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192476 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 4351741a3b36bfe1ac1b385334fc5fa6f6ef5a11 |
11-Oct-2013 |
Quentin Colombet <qcolombet@apple.com> |
[DAGCombiner] Revert load slicing (r192471), until I figure out why it fails on ubuntu.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192474 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| c34693f6efc670b71e11f3479844c36d9696b535 |
11-Oct-2013 |
Quentin Colombet <qcolombet@apple.com> |
[DAGCombiner] Slice a big load in two loads when the element are next to each
other in memory and the target has paired load and performs post-isel loads
combining.
E.g., this optimization will transform something like this:
a = load i64* addr
b = trunc i64 a to i32
c = lshr i64 a, 32
d = trunc i64 c to i32
into:
b = load i32* addr1
d = load i32* addr2
Where addr1 = addr2 +/- sizeof(i32), if the target supports paired load and
performs post-isel loads combining.
One should overload TargetLowering::hasPairedLoad to provide this information.
The default is false.
<rdar://problem/14477220>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192471 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 828c9e73baacf0b0f68932718659681223b6b3c4 |
10-Oct-2013 |
Matt Arsenault <Matthew.Arsenault@amd.com> |
Use getPointerSizeInBits() rather than 8 * getPointerSize()
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192386 91177308-0d34-0410-b5e6-96231b3b80d8
argetLowering.cpp
|
| 32e3150faba95187c76b211e27d6496a21bee360 |
07-Oct-2013 |
Craig Topper <craig.topper@gmail.com> |
Fix some assert messages to say the correct opcode name. Looks like one assert got copy and pasted to many places.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192078 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 936910d9293f7118056498c75c7bca79a7fc579c |
05-Oct-2013 |
Craig Topper <craig.topper@gmail.com> |
Add OPC_CheckChildSame0-3 to the DAG isel matcher. This replaces sequences of MoveChild, CheckSame, MoveParent. Saves 846 bytes from the X86 DAG isel matcher, ~300 from ARM, ~840 from Hexagon.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192026 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| eacbfd1d512b97b5551ce9f30bf85ba000d9da42 |
05-Oct-2013 |
Adrian Prantl <aprantl@apple.com> |
Debug info: Don't crash in SelectionDAGISel when a vreg that is being
pointed to by a dbg_value belonging to a function argument is eliminated
during instruction selection.
rdar://problem/15094721.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192011 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 03c8f8fbd539e539796b0bd9824797f3240261d7 |
05-Oct-2013 |
Hal Finkel <hfinkel@anl.gov> |
Fix DAGCombiner::visitFP_EXTEND to ignore indexed loads
DAGCombiner::visitFP_EXTEND will apply the following transformation:
fold (fpext (load x)) -> (fpext (fptrunc (extload x)))
but the implementation does not handle indexed loads (pre/post inc.), but did
not specifically ignore them either (unlike for extending loads, which it
already ignored), causing an assert when the transformation was applied to an
indexed load. This is the minimal fix for correctness (causing the
transformation to be skipped for indexed loads).
Unfortunately, I don't have an in-tree test case.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191989 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 596cfd045fa05c249083b5ff7cdb5e32f4d92b97 |
04-Oct-2013 |
Craig Topper <craig.topper@gmail.com> |
Revert r191940 to see if it fixes the build bots.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191941 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| d3562956789dbd0571a7e46052bee64b153fa7c4 |
04-Oct-2013 |
Craig Topper <craig.topper@gmail.com> |
Add OPC_CheckChildSame0-3 to the DAG isel matcher. This replaces sequences of MoveChild, CheckSame, MoveParent. Saves 846 bytes from the X86 DAG isel matcher, ~300 from ARM, ~840 from Hexagon.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191940 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| b70a05a871a9ce44231a5f6308271f333c4ad110 |
03-Oct-2013 |
Jin-Gu Kang <jaykang10@imrc.kist.re.kr> |
Added checking code whehter target supports specific dag combining about rotate
or not. The corresponding dag patterns are as following:
"DAGCombier::MatchRotate" function in DAGCombiner.cpp
Pattern1
// fold (or (shl (*ext x), (*ext y)),
// (srl (*ext x), (*ext (sub 32, y)))) ->
// (*ext (rotl x, y))
// fold (or (shl (*ext x), (*ext y)),
// (srl (*ext x), (*ext (sub 32, y)))) ->
// (*ext (rotr x, (sub 32, y)))
pattern2
// fold (or (shl (*ext x), (*ext (sub 32, y))),
// (srl (*ext x), (*ext y))) ->
// (*ext (rotl x, y))
// fold (or (shl (*ext x), (*ext (sub 32, y))),
// (srl (*ext x), (*ext y))) ->
// (*ext (rotr x, (sub 32, y)))
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191905 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 8819c84aed10777ba91d4e862229882b8da0b272 |
01-Oct-2013 |
Rafael Espindola <rafael.espindola@gmail.com> |
Remove several unused variables.
Patch by Alp Toker.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191757 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
electionDAGISel.cpp
|
| 20a3bc600c62b2519a1b6be7e752a8ac00deac3b |
01-Oct-2013 |
Tom Stellard <thomas.stellard@amd.com> |
SelectionDAG: Clarify comments from r191600
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191724 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| fd40d514ec7e95fe4a59a7a467c887b026364ff2 |
29-Sep-2013 |
Benjamin Kramer <benny.kra@googlemail.com> |
Allocate AtomicSDNode operands in SelectionDAG's allocator to stop leakage.
SDNode destructors are never called. As an optimization use AtomicSDNode's
internal storage if we have a small number of operands.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191636 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| f80a63fa23862e578de919f4b44d4fcdee68fd0d |
28-Sep-2013 |
Robert Wilhelm <robert.wilhelm@gmx.net> |
Fix spelling intruction -> instruction.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191610 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGRRList.cpp
|
| 8034d7100652091c20101554a3b6d6afa545e696 |
28-Sep-2013 |
Tom Stellard <thomas.stellard@amd.com> |
SelectionDAG: Silence unused variable warning on release builds
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191604 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| bbafe422d6f9036b03992ee5eacb5d09644c3267 |
28-Sep-2013 |
Tom Stellard <thomas.stellard@amd.com> |
SelectionDAG: Improve legalization of SELECT_CC with illegal condition codes
SelectionDAG will now attempt to inverse an illegal conditon in order to
find a legal one and if that doesn't work, it will attempt to swap the
operands using the inverted condition.
There are no new test cases for this, but a nubmer of the existing R600
tests hit this path.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191602 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 12d43f9baf83b6a2cc444c89bb688ebfe01a9fa1 |
28-Sep-2013 |
Tom Stellard <thomas.stellard@amd.com> |
SelectionDAG: Try to expand all condition codes using getCCSwappedOperands()
This is useful for targets like R600, which only support GT, GE, NE, and EQ
condition codes as it removes the need to handle unsupported condition
codes in target specific code.
There are no tests with this commit, but R600 has been updated to take
advantage of this new feature, so its existing selectcc tests are now
testing the swapped operands path.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191601 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
electionDAG.cpp
argetLowering.cpp
|
| 8a9879a4481667b18eee4a0f8b254b3810878539 |
28-Sep-2013 |
Tom Stellard <thomas.stellard@amd.com> |
SelectionDAG: Clean up LegalizeSetCCCondCode() function
Interpreting the results of this function is not very intuitive, so I
cleaned it up to make it more clear whether or not a SETCC op was
legalized and how it was legalized (either by swapping LHS and RHS or
replacing with AND/OR).
This patch does change functionality in the LHS and RHS swapping case,
but unfortunately there are no in-tree tests for this. However, this
patch is a prerequisite for R600 to take advantage of the LHS and RHS
swapping, so tests will be added in subsequent commits.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191600 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| a9f113d0662faba063742d0ed82709c1f9087710 |
27-Sep-2013 |
Andrea Di Biagio <Andrea_DiBiagio@sn.scee.net> |
Re-apply the change from r191393 with fix for pr17380.
This change fixes the problem reported in pr17380 and re-add the dagcombine
transformation ensuring that the value types are always legal if the
transformation is triggered after Legalization took place.
Added the test case from pr17380.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191509 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 6c73cf5a8aef28e4274a0d843940fdee0d9f7329 |
26-Sep-2013 |
Andrea Di Biagio <Andrea_DiBiagio@sn.scee.net> |
Revert r191393 since it caused pr17380.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191438 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 268c743a3ba44ada364938bc5ff9b1be219df54f |
26-Sep-2013 |
Amara Emerson <amara.emerson@arm.com> |
[ARM] Use the load-acquire/store-release instructions optimally in AArch32.
Patch by Artyom Skrobov.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191428 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| b6ac11cd03e9dd97b45dc97787171f942ef8e344 |
26-Sep-2013 |
Andrew Trick <atrick@apple.com> |
Added temp flag -misched-bench for staging in default changes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191423 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 7394a7c0c27d498fe7ff0760eeefdb83bb54a795 |
26-Sep-2013 |
Andrew Trick <atrick@apple.com> |
whitespace
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191422 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 2ce3ac8dd8c8e43f0a1a4db1a11f452b087ca24d |
25-Sep-2013 |
Andrea Di Biagio <Andrea_DiBiagio@sn.scee.net> |
Teach DAGCombiner how to canonicalize dags according to the rule
(shl (zext (shr A, X)), X) => (zext (shl (shr A, X), X)).
The rule only triggers when there are no other uses of the
zext to avoid materializing more instructions.
This helps the DAGCombiner understand that the shl/shr
sequence can then be converted into an and instruction.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191393 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 85509802eba15c82ff486f512a0b559699dc6999 |
25-Sep-2013 |
Eli Friedman <eli.friedman@gmail.com> |
Add missing check to SETCC optimization.
PR17338.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191337 91177308-0d34-0410-b5e6-96231b3b80d8
argetLowering.cpp
|
| cd216b2c7359b21de08e568792ae01106407b351 |
24-Sep-2013 |
Benjamin Kramer <benny.kra@googlemail.com> |
DAGCombiner: Unify rotate matching for extended and unextended amounts.
No functionality change, lots of indentation changes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191303 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 477fc628b3c9ce1c970d4a678dd5607b15242cc8 |
24-Sep-2013 |
Jiangning Liu <jiangning.liu@arm.com> |
Initial support for Neon scalar instructions.
Patch by Ana Pazos.
1.Added support for v1ix and v1fx types.
2.Added Scalar Pairwise Reduce instructions.
3.Added initial implementation of Scalar Arithmetic instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191263 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeIntegerTypes.cpp
|
| eed779ff68c9a4612ea229f4fbd23a5258458889 |
24-Sep-2013 |
Michael Gottesman <mgottesman@apple.com> |
[stackprotector] Allow for copies from vreg -> vreg to be in a terminator sequence.
Sometimes a copy from a vreg -> vreg sneaks into the middle of a terminator
sequence. It is safe to slice this into the stack protector success bb.
This fixes PR16979.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191260 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 670711e66217d32a751f0dfc7bb88006bfb05012 |
23-Sep-2013 |
Kay Tiong Khoo <kkhoo@perfwizard.com> |
fix typo: than -> then
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191214 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 3e84ad28d4d3ceee25771b1e30315c20b7608c39 |
22-Sep-2013 |
Tim Northover <tnorthover@apple.com> |
ISelDAG: spot chain cycles involving MachineNodes
Previously, the DAGISel function WalkChainUsers was spotting that it
had entered already-selected territory by whether a node was a
MachineNode (amongst other things). Since it's fairly common practice
to insert MachineNodes during ISelLowering, this was not the correct
check.
Looking around, it seems that other nodes get their NodeId set to -1
upon selection, so this makes sure the same thing happens to all
MachineNodes and uses that characteristic to determine whether we
should stop looking for a loop during selection.
This should fix PR15840.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191165 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 189c6235e7d783928c94cbfe4bccb39e4bd0b84f |
21-Sep-2013 |
Juergen Ributzka <juergen@apple.com> |
Revert "SelectionDAG: Teach the legalizer to split SETCC if VSELECT needs splitting too."
This reverts commit r191130.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191138 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
egalizeTypesGeneric.cpp
|
| 1941431f8a0f61fb5d5e3175cc49efd5dd19033c |
21-Sep-2013 |
Juergen Ributzka <juergen@apple.com> |
SelectionDAG: Teach the legalizer to split SETCC if VSELECT needs splitting too.
The Type Legalizer recognizes that VSELECT needs to be split, because the type
is to wide for the given target. The same does not always apply to SETCC,
because less space is required to encode the result of a comparison. As a result
VSELECT is split and SETCC is unrolled into scalar comparisons.
This commit fixes the issue by checking for VSELECT-SETCC patterns in the DAG
Combiner. If a matching pattern is found, then the result mask of SETCC is
promoted to the expected vector mask for the given target. This mask has usually
te same size as the VSELECT return type (except for Intel KNL). Now the type
legalizer will split both VSELECT and SETCC.
This allows the following X86 DAG Combine code to sucessfully detect the MIN/MAX
pattern. This fixes PR16695, PR17002, and <rdar://problem/14594431>.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191130 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
egalizeTypesGeneric.cpp
|
| c2286720de4f665dc2750d54c3748d331f81e105 |
20-Sep-2013 |
David Blaikie <dblaikie@gmail.com> |
Add braces to suppress Clang's dangling-else warning.
These violations were introduced in r191049
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191059 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| ceb3b4649086c4aa6aa535440748c5860093f6e6 |
20-Sep-2013 |
Kai Nacke <kai.nacke@redstar.de> |
PR16726: extend rol/ror matching
C-like languages promote types like unsigned short to unsigned int before
performing an arithmetic operation. Currently the rotate matcher in the
DAGCombiner does not consider this situation.
This commit extends the DAGCombiner in the way that the pattern
(or (shl ([az]ext x), (*ext y)), (srl ([az]ext x), (*ext (sub 32, y))))
is folded into
([az]ext (rotl x, y))
The matching is restricted to aext and zext because in this cases the upper
bits are either undefined or known. Test case is included.
This fixes PR16726.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191049 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 7cb98c9cb7688ad775d4dee07ca66570f1c030d1 |
20-Sep-2013 |
Kai Nacke <kai.nacke@redstar.de> |
Revert PR16726: extend rol/ror matching
There is a buildbot failure. Need to investigate this.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191048 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| a5950e0149871671847c051c95113460f161e384 |
20-Sep-2013 |
Kai Nacke <kai.nacke@redstar.de> |
PR16726: extend rol/ror matching
C-like languages promote types like unsigned short to unsigned int before
performing an arithmetic operation. Currently the rotate matcher in the
DAGCombiner does not consider this situation.
This commit extends the DAGCombiner in the way that the pattern
(or (shl ([az]ext x), (*ext y)), (srl ([az]ext x), (*ext (sub 32, y))))
is folded into
([az]ext (rotl x, y))
The matching is restricted to aext and zext because in this cases the upper
bits are either undefined or known. Test case is included.
This fixes PR16726.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191045 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 530d09a22bd2f5c638ae1932bed560c8a46e399e |
19-Sep-2013 |
Benjamin Kramer <benny.kra@googlemail.com> |
DAGCombiner: Don't fold vector muls with constants that look like a splat of a power of 2 but differ in bit width.
PR17283.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191000 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 0a4371a2073d8841768cf3e8cf65601a8d7cc4fc |
19-Sep-2013 |
Adrian Prantl <aprantl@apple.com> |
Debug info: Get rid of the VLA indirection hack in FastISel.
Use the DIVariable::isIndirect() flag set by the frontend instead of
guessing whether to set the machine location's indirection bit.
Paired commit with CFE.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190961 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
|
| 496f02481dd9abdee85c61d88f07963ea27b9e38 |
17-Sep-2013 |
Serge Pavlov <sepavloff@gmail.com> |
Added documentation to getMemsetStores.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190866 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 24e1b39a24ca7b8866a636498173f3959b561058 |
17-Sep-2013 |
Quentin Colombet <qcolombet@apple.com> |
[SelectionDAG] Teach the vector scalarizer about TRUNCATE.
When a truncate node defines a legal vector type but uses an illegal
vector type, the legalization process was splitting the vector until
<1 x vector> type, but then it was failing to scalarize the node because
it did not know how to handle TRUNCATE.
<rdar://problem/14989896>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190830 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeTypes.h
egalizeVectorTypes.cpp
|
| 818833f27929d650b4323774cd3660860588f687 |
17-Sep-2013 |
Adrian Prantl <aprantl@apple.com> |
Debug info: Fix PR16736 and rdar://problem/14990587.
A DBG_VALUE is register-indirect iff the first operand is a register
_and_ the second operand is an immediate.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190821 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
electionDAGISel.cpp
|
| 77364b7a200682e84f75171f30f8a77005b87e94 |
15-Sep-2013 |
Hal Finkel <hfinkel@anl.gov> |
Prevent assert in CombinerGlobalAA with null values
DAGCombiner::isAlias can be called with SrcValue1 or SrcValue2 null, and we
can't use AA in this case (if we try, then the casting code in AA will assert).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190763 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 6fc4f7e2b67f89913e6b94888577a09918187e7d |
12-Sep-2013 |
Matt Arsenault <Matthew.Arsenault@amd.com> |
Remove pointless assertion after r190376
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190565 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeVectorOps.cpp
|
| 55c06ae7afa3f862a6bb4a4441fe485c135f5b5e |
11-Sep-2013 |
Benjamin Kramer <benny.kra@googlemail.com> |
Revert "Give internal classes hidden visibility."
It works with clang, but GCC has different rules so we can't make all of those
hidden. This reverts commit r190534.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190536 91177308-0d34-0410-b5e6-96231b3b80d8
nstrEmitter.h
DNodeDbgValue.h
cheduleDAGSDNodes.h
electionDAGBuilder.h
|
| 15f387c93ef8d5c23f110143996c8b9b4a089864 |
11-Sep-2013 |
Benjamin Kramer <benny.kra@googlemail.com> |
Give internal classes hidden visibility.
Worth 100k on a linux/x86_64 Release+Asserts clang.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190534 91177308-0d34-0410-b5e6-96231b3b80d8
nstrEmitter.h
DNodeDbgValue.h
cheduleDAGSDNodes.h
electionDAGBuilder.h
|
| 3b389cb74e13a5631c9650115aafd2af4580ce83 |
11-Sep-2013 |
Eli Friedman <eli.friedman@gmail.com> |
Rename variables for consistency.
No functional change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190466 91177308-0d34-0410-b5e6-96231b3b80d8
esourcePriorityQueue.cpp
|
| ae43dac30037395cce2b54af0a02500985813183 |
11-Sep-2013 |
Eli Friedman <eli.friedman@gmail.com> |
Fix unused variables.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190448 91177308-0d34-0410-b5e6-96231b3b80d8
esourcePriorityQueue.cpp
|
| c6c08508cab2fc4f52e9ab44dce272e240661e06 |
10-Sep-2013 |
Matt Arsenault <Matthew.Arsenault@amd.com> |
Don't use getSetCCResultType for creating a vselect
The vselect mask isn't a setcc.
This breaks in the case when the result of getSetCCResultType
is larger than the vector operands
e.g. %tmp = select i1 %cmp <2 x i8> %a, <2 x i8> %b
when getSetCCResultType returns <2 x i32>, the assertion
that the (MaskTy.getSizeInBits() == Op1.getValueType().getSizeInBits())
is hit.
No test since I don't think I can hit this with any of the current
targets. The R600/SI implementation would break, since it returns a
vector of i1 for this, but it doesn't reach ExpandSELECT for other
reasons.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190376 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeVectorOps.cpp
|
| 3af4d250676623b88436b89212108eb4fff897d3 |
10-Sep-2013 |
Jack Carter <jack.carter@imgtec.com> |
white spaces and long lines
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190358 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| db3a9e64f856e3a233a427da1f3969fd3a65a438 |
09-Sep-2013 |
Bob Wilson <bob.wilson@apple.com> |
Revert patches to add case-range support for PR1255.
The work on this project was left in an unfinished and inconsistent state.
Hopefully someone will eventually get a chance to implement this feature, but
in the meantime, it is better to put things back the way the were. I have
left support in the bitcode reader to handle the case-range bitcode format,
so that we do not lose bitcode compatibility with the llvm 3.3 release.
This reverts the following commits: 155464, 156374, 156377, 156613, 156704,
156757, 156804 156808, 156985, 157046, 157112, 157183, 157315, 157384, 157575,
157576, 157586, 157612, 157810, 157814, 157815, 157880, 157881, 157882, 157884,
157887, 157901, 158979, 157987, 157989, 158986, 158997, 159076, 159101, 159100,
159200, 159201, 159207, 159527, 159532, 159540, 159583, 159618, 159658, 159659,
159660, 159661, 159703, 159704, 160076, 167356, 172025, 186736
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190328 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
electionDAGBuilder.h
|
| a5eeb9da054bd76b38e18bedb9015bbaf20605e0 |
06-Sep-2013 |
Tim Northover <tnorthover@apple.com> |
SelectionDAG: create correct BooleanContent constants
Occasionally DAGCombiner can spot that a SETCC operation is completely
redundant and reduce it to "all true" or "all false". If this happens to a
vector, the value produced has to take account of what a normal comparison
would have produced, which may be an all-1s bitmask.
The fix in SelectionDAG.cpp is tested, however, as far as I can see the code in
TargetLowering.cpp is possibly unreachable and almost certainly irrelevant when
triggered so there are no tests. However, I believe it's still clearly the
right change and may save someone else some hassle if it suddenly becomes
reachable. So I'm doing it anyway.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190147 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
argetLowering.cpp
|
| 253acef7a5ea2fbba7848d2257ae3cce2ea02ce0 |
29-Aug-2013 |
Hal Finkel <hfinkel@anl.gov> |
Use TargetSubtargetInfo::useAA() in DAGCombine
This uses the TargetSubtargetInfo::useAA() function to control the defaults of
the -combiner-alias-analysis and -combiner-global-alias-analysis options.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@189564 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 2b884bcbce3ec76bd065d2dd9a6597f13e9fdd57 |
29-Aug-2013 |
Juergen Ributzka <juergen@apple.com> |
Fix a typo and coding style of a previous commit. No functional change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@189526 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 5d8c2e460cac05dedf3466d630995f1475317fc9 |
27-Aug-2013 |
Tim Northover <tnorthover@apple.com> |
DAGCombiner: make sure or/shl/srl really has zero high bits before forming bswap
We want to convert code like (or (srl N, 8), (shl N, 8)) into (srl (bswap N),
const), but this is only valid if the bits above 16 on the source pattern are
0, the checks we were doing on this were slightly wrong before.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@189348 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 15cfa585eb86328bb626d0375e1b71873a83beb9 |
27-Aug-2013 |
Owen Anderson <resistor@mac.com> |
Remove an over-zealous assertion. A pointer type could be illegal if the target is prepared to custom-legalize pointer operands. This assertion was evaluated before the target would have a chance to do so, making it impossible.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@189299 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeTypesGeneric.cpp
|
| edd08f74289c6ba3b3f8e730e4ab825ef9bd6492 |
26-Aug-2013 |
Tom Stellard <thomas.stellard@amd.com> |
SelectionDAG: Remove unnecessary uses of TargetLowering::getPointerTy()
If we have a binary operation like ISD:ADD, we can set the result type
equal to the result type of one of its operands rather than using
TargetLowering::getPointerTy().
Also, any use of DAG.getIntPtrConstant(C) as an operand for a binary
operation can be replaced with:
DAG.getConstant(C, OtherOperand.getValueType());
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@189227 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
egalizeDAG.cpp
egalizeIntegerTypes.cpp
egalizeTypesGeneric.cpp
egalizeVectorOps.cpp
egalizeVectorTypes.cpp
electionDAGBuilder.cpp
|
| c52565157d23c7b8a374b74044a5458ea67d6cb5 |
26-Aug-2013 |
Tom Stellard <thomas.stellard@amd.com> |
SelectionDAG: Use correct pointer size when splitting vector stores
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@189224 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeVectorTypes.cpp
|
| da25cd3e6de8f21005590c2de49868f883cf2410 |
26-Aug-2013 |
Tom Stellard <thomas.stellard@amd.com> |
SelectionDAG: Use correct pointer size when lowering function arguments v2
This adds minimal support to the SelectionDAG for handling address spaces
with different pointer sizes. The SelectionDAG should now correctly
lower pointer function arguments to the correct size as well as generate
the correct code when lowering getelementptr.
This patch also updates the R600 DataLayout to use 32-bit pointers for
the local address space.
v2:
- Add more helper functions to TargetLoweringBase
- Use CHECK-LABEL for tests
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@189221 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| 0b6962f4be35aca7054ff68ef9bbbb2e03617d31 |
24-Aug-2013 |
Benjamin Kramer <benny.kra@googlemail.com> |
Add a function object to compare the first or second component of a std::pair.
Replace instances of this scattered around the code base.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@189169 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGSDNodes.cpp
|
| 58a9b4388bcace0f332205f960c6c8705fb5a24b |
23-Aug-2013 |
Michael Gottesman <mgottesman@apple.com> |
[stack protector] Work around an issue with the BMOVPCB_CALL instruction on ARM by disabling does not return on __stack_chk_fail.
This is to fix the bots while I look to see if there is something I can do here.
rdar://14811848
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@189076 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| 021f3280fe791722c668cb96b02f473f2f76f925 |
22-Aug-2013 |
Michael Gottesman <mgottesman@apple.com> |
[stackprotector] When finding the split point to splice off the end of a parentmbb into a successmbb, include any DBG_VALUE MI.
Fix for PR16954.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188987 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| d00968a7a52b23a0d9fc5c1c4b07aceb2cd15006 |
22-Aug-2013 |
Tom Stellard <thomas.stellard@amd.com> |
SelectionDAG: Make sure stores are always added to the LegalizedNodes list
When truncated vector stores were being custom lowered in
VectorLegalizer::LegalizeOp(), the old (illegal) and new (legal) node pair
was not being added to LegalizedNodes list. Instead of the legalized
result being passed to VectorLegalizer::TranslateLegalizeResult(),
the result was being passed back into VectorLegalizer::LegalizeOp(),
which ended up adding a (new, new) pair to the list instead.
This was causing an assertion failure when a custom lowered truncated
vector store was the last instruction a basic block and the VectorLegalizer
was unable to find it in the LegalizedNodes list when updating the
DAG root.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188953 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeVectorOps.cpp
|
| 915e936de270c3c57df1382b683001adc2c0d695 |
21-Aug-2013 |
Juergen Ributzka <juergen@apple.com> |
Teach BaseIndexOffset::match to identify base pointers in loops.
The small utility function that pattern matches Base + Index +
Offset patterns for loads and stores fails to recognize the base
pointer for loads/stores from/into an array at offset 0 inside a
loop. As a result DAGCombiner::MergeConsecutiveStores was not able
to merge all stores.
This commit fixes the issue by adding an additional pattern match
and also a test case.
Reviewer: Nadav
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188936 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 8c20158fb0e1e5d747077f065eb0170c5af1fbfa |
20-Aug-2013 |
Richard Sandiford <rsandifo@linux.vnet.ibm.com> |
[SystemZ] Use SRST to optimize memchr
SystemZTargetLowering::emitStringWrapper() previously loaded the character
into R0 before the loop and made R0 live on entry. I'd forgotten that
allocatable registers weren't allowed to be live across blocks at this stage,
and it confused LiveVariables enough to cause a miscompilation of f3 in
memchr-02.ll.
This patch instead loads R0 in the loop and leaves LICM to hoist it
after RA. This is actually what I'd tried originally, but I went for
the manual optimisation after noticing that R0 often wasn't being hoisted.
This bug forced me to go back and look at why, now fixed as r188774.
We should also try to optimize null checks so that they test the CC result
of the SRST directly. The select between null and the SRST GPR result could
then usually be deleted as dead.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188779 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
electionDAGBuilder.h
|
| 1a6de17273c58129880d8de8094ecc935721b1a1 |
20-Aug-2013 |
Michael Gottesman <mgottesman@apple.com> |
Remove unused variables that crept in.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188761 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 657484f494edbac571ce2a91b8ac227e5011321d |
20-Aug-2013 |
Michael Gottesman <mgottesman@apple.com> |
Teach selectiondag how to handle the stackprotectorcheck intrinsic.
Previously, generation of stack protectors was done exclusively in the
pre-SelectionDAG Codegen LLVM IR Pass "Stack Protector". This necessitated
splitting basic blocks at the IR level to create the success/failure basic
blocks in the tail of the basic block in question. As a result of this,
calls that would have qualified for the sibling call optimization were no
longer eligible for optimization since said calls were no longer right in
the "tail position" (i.e. the immediate predecessor of a ReturnInst
instruction).
Then it was noticed that since the sibling call optimization causes the
callee to reuse the caller's stack, if we could delay the generation of
the stack protector check until later in CodeGen after the sibling call
decision was made, we get both the tail call optimization and the stack
protector check!
A few goals in solving this problem were:
1. Preserve the architecture independence of stack protector generation.
2. Preserve the normal IR level stack protector check for platforms like
OpenBSD for which we support platform specific stack protector
generation.
The main problem that guided the present solution is that one can not
solve this problem in an architecture independent manner at the IR level
only. This is because:
1. The decision on whether or not to perform a sibling call on certain
platforms (for instance i386) requires lower level information
related to available registers that can not be known at the IR level.
2. Even if the previous point were not true, the decision on whether to
perform a tail call is done in LowerCallTo in SelectionDAG which
occurs after the Stack Protector Pass. As a result, one would need to
put the relevant callinst into the stack protector check success
basic block (where the return inst is placed) and then move it back
later at SelectionDAG/MI time before the stack protector check if the
tail call optimization failed. The MI level option was nixed
immediately since it would require platform specific pattern
matching. The SelectionDAG level option was nixed because
SelectionDAG only processes one IR level basic block at a time
implying one could not create a DAG Combine to move the callinst.
To get around this problem a few things were realized:
1. While one can not handle multiple IR level basic blocks at the
SelectionDAG Level, one can generate multiple machine basic blocks
for one IR level basic block. This is how we handle bit tests and
switches.
2. At the MI level, tail calls are represented via a special return
MIInst called "tcreturn". Thus if we know the basic block in which we
wish to insert the stack protector check, we get the correct behavior
by always inserting the stack protector check right before the return
statement. This is a "magical transformation" since no matter where
the stack protector check intrinsic is, we always insert the stack
protector check code at the end of the BB.
Given the aforementioned constraints, the following solution was devised:
1. On platforms that do not support SelectionDAG stack protector check
generation, allow for the normal IR level stack protector check
generation to continue.
2. On platforms that do support SelectionDAG stack protector check
generation:
a. Use the IR level stack protector pass to decide if a stack
protector is required/which BB we insert the stack protector check
in by reusing the logic already therein. If we wish to generate a
stack protector check in a basic block, we place a special IR
intrinsic called llvm.stackprotectorcheck right before the BB's
returninst or if there is a callinst that could potentially be
sibling call optimized, before the call inst.
b. Then when a BB with said intrinsic is processed, we codegen the BB
normally via SelectBasicBlock. In said process, when we visit the
stack protector check, we do not actually emit anything into the
BB. Instead, we just initialize the stack protector descriptor
class (which involves stashing information/creating the success
mbbb and the failure mbb if we have not created one for this
function yet) and export the guard variable that we are going to
compare.
c. After we finish selecting the basic block, in FinishBasicBlock if
the StackProtectorDescriptor attached to the SelectionDAGBuilder is
initialized, we first find a splice point in the parent basic block
before the terminator and then splice the terminator of said basic
block into the success basic block. Then we code-gen a new tail for
the parent basic block consisting of the two loads, the comparison,
and finally two branches to the success/failure basic blocks. We
conclude by code-gening the failure basic block if we have not
code-gened it already (all stack protector checks we generate in
the same function, use the same failure basic block).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188755 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
electionDAGBuilder.h
electionDAGISel.cpp
|
| 66d1fa6f4b443ac9f8bcea5d1f71a73ada733a42 |
20-Aug-2013 |
Hal Finkel <hfinkel@anl.gov> |
Add a llvm.copysign intrinsic
This adds a llvm.copysign intrinsic; We already have Libfunc recognition for
copysign (which is turned into the FCOPYSIGN SDAG node). In order to
autovectorize calls to copysign in the loop vectorizer, we need a corresponding
intrinsic as well.
In addition to the expected changes to the language reference, the loop
vectorizer, BasicTTI, and the SDAG builder (the intrinsic is transformed into
an FCOPYSIGN node, just like the function call), this also adds FCOPYSIGN to a
few lists in LegalizeVector{Ops,Types} so that vector copysigns can be
expanded.
In TargetLoweringBase::initActions, I've made the default action for FCOPYSIGN
be Expand for vector types. This seems correct for all in-tree targets, and I
think is the right thing to do because, previously, there was no way to generate
vector-values FCOPYSIGN nodes (and most targets don't specify an action for
vector-typed FCOPYSIGN).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188728 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeVectorOps.cpp
egalizeVectorTypes.cpp
electionDAGBuilder.cpp
|
| d345395ec97a303ffd420c3e761af7b9e3e4c338 |
19-Aug-2013 |
Paul Redmond <paul.redmond@intel.com> |
Improve the widening of integral binary vector operations
- split WidenVecRes_Binary into WidenVecRes_Binary and WidenVecRes_BinaryCanTrap
- WidenVecRes_BinaryCanTrap preserves the original behaviour for operations
that can trap
- WidenVecRes_Binary simply widens the operation and improves codegen for
3-element vectors by allowing widening and promotion on x86 (matches the
behaviour of unary and ternary operation widening)
- use WidenVecRes_Binary for operations on integers.
Reviewed by: nrotem
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188699 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeTypes.h
egalizeVectorTypes.cpp
|
| a0e735ee16f439675c1842e47ba3149aa226bdc0 |
19-Aug-2013 |
Hal Finkel <hfinkel@anl.gov> |
Add ExpandFloatOp_FCOPYSIGN to handle ppcf128-related expansions
We had previously been asserting when faced with a FCOPYSIGN f64, ppcf128 node
because there was no way to expand the FCOPYSIGN node. Because ppcf128 is the
sum of two doubles, and the first double must have the larger magnitude, we
can take the sign from the first double. As a result, in addition to fixing the
crash, this is also an optimization.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188655 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeFloatTypes.cpp
egalizeTypes.h
|
| b49860ef030cb2dba0386278ee8737eecc4e7272 |
17-Aug-2013 |
Jim Grosbach <grosbach@apple.com> |
ARM: Fix more fast-isel verifier failures.
Teach the generic instruction selection helper functions to constrain
the register classes of their input operands. For non-physical register
references, the generic code needs to be careful not to mess that up
when replacing references to result registers. As the comment indicates
for MachineRegisterInfo::replaceRegWith(), it's important to call
constrainRegClass() first.
rdar://12594152
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188593 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 19262ee0725a09b7c621a3d2eb66ba1513ae932a |
16-Aug-2013 |
Richard Sandiford <rsandifo@linux.vnet.ibm.com> |
[SystemZ] Use SRST to implement strlen and strnlen
It would also make sense to use it for memchr; I'm working on that now.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188547 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
electionDAGBuilder.h
|
| 4fc7355a21e1fa838406e15459aaf54a58fcf909 |
16-Aug-2013 |
Richard Sandiford <rsandifo@linux.vnet.ibm.com> |
[SystemZ] Use MVST to implement strcpy and stpcpy
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188546 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
electionDAGBuilder.h
|
| e1b2af731e2a45344a7c502232f66c55cd746da0 |
16-Aug-2013 |
Richard Sandiford <rsandifo@linux.vnet.ibm.com> |
[SystemZ] Use CLST to implement strcmp
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188544 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
electionDAGBuilder.h
|
| 6a079fef4fad3e6c2e07c9e1d0776e20a0b05b1e |
16-Aug-2013 |
Richard Sandiford <rsandifo@linux.vnet.ibm.com> |
[SystemZ] Fix handling of 64-bit memcmp results
Generalize r188163 to cope with return types other than MVT::i32, just
as the existing visitMemCmpCall code did. I've split this out into a
subroutine so that it can be used for other upcoming patches.
I also noticed that I'd used the wrong API to record the out chain.
It's a load that uses DAG.getRoot() rather than getRoot(), so the out
chain should go on PendingLoads. I don't have a testcase for that because
we don't do any interesting scheduling on z yet.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188540 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
electionDAGBuilder.h
|
| 0ff1190888f5b24f64a196392c452800447186d8 |
15-Aug-2013 |
Craig Topper <craig.topper@gmail.com> |
Replace getValueType().getSimpleVT() with getSimpleValueType().
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188442 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
egalizeDAG.cpp
electionDAG.cpp
electionDAGBuilder.cpp
electionDAGISel.cpp
|
| 51a0280d296405cb1fdb268e5387867e0db2e46e |
13-Aug-2013 |
Jim Grosbach <grosbach@apple.com> |
DAG: Combine (and (setne X, 0), (setne X, -1)) -> (setuge (add X, 1), 2)
A common idiom is to use zero and all-ones as sentinal values and to
check for both in a single conditional ("x != 0 && x != (unsigned)-1").
That generates code, for i32, like:
testl %edi, %edi
setne %al
cmpl $-1, %edi
setne %cl
andb %al, %cl
With this transform, we generate the simpler:
incl %edi
cmpl $1, %edi
seta %al
Similar improvements for other integer sizes and on other platforms. In
general, combining the two setcc instructions into one is better.
rdar://14689217
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188315 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 3add0679d24a00c4a585809c6ce54486f6a458f5 |
13-Aug-2013 |
Michael Gottesman <mgottesman@apple.com> |
Update makeLibCall to return both the call and the chain associated with the libcall instead of just the call. This allows us to specify libcalls that return void.
LowerCallTo returns a pair with the return value of the call as the first
element and the chain associated with the return value as the second element. If
we lower a call that has a void return value, LowerCallTo returns an SDValue
with a NULL SDNode and the chain for the call. Thus makeLibCall by just
returning the first value makes it impossible for you to set up the chain so
that the call is not eliminated as dead code.
I also updated all references to makeLibCall to reflect the new return type.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188300 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeFloatTypes.cpp
egalizeIntegerTypes.cpp
egalizeTypes.cpp
argetLowering.cpp
|
| b0a50ade8b59816324783733e9ac8eb2aa7e73d6 |
12-Aug-2013 |
Michael Gottesman <mgottesman@apple.com> |
Fixed SelectionDAGBuilder.h C++ filetype declaration to use the canonical C++ instead of c++.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188203 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.h
|
| ac168b8bc8773a083a10902f64e4ae57a925aee4 |
12-Aug-2013 |
Richard Sandiford <rsandifo@linux.vnet.ibm.com> |
[SystemZ] Use CLC and IPM to implement memcmp
For now this is restricted to fixed-length comparisons with a length
in the range [1, 256], as for memcpy() and MVC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188163 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| ad445a60d0d899d235f75d8b4e01c5f75cdf4f23 |
09-Aug-2013 |
Craig Topper <craig.topper@gmail.com> |
Change asserts at the top of getVectorShuffle to check that LHS and RHS have the same type as the result.
Previously the asserts were only checking that RHS and LHS were the same type and had the same element type as the result. All downstream code for ISD::VECTOR_SHUFFLE requires the types to be the same.
Also removed one unnecessary check of matched element counts that was present in the code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188051 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| eee2a11ee38307ea3b0bbd43c33e5fad182f0951 |
08-Aug-2013 |
Craig Topper <craig.topper@gmail.com> |
Remove AllUndef check from one of the loops in getVectorShuffle. It was already handled by the 'AllLHS && AllRHS' check after the previous loop.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187965 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 01d22aaa78b831ad4837f928e0554be7e65addaa |
08-Aug-2013 |
Craig Topper <craig.topper@gmail.com> |
Optimize mask generation for one of the DAG combiner shufflevector cases.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187961 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 41418d17cced656f91038b2482bc9d173b4974b0 |
08-Aug-2013 |
Hal Finkel <hfinkel@anl.gov> |
Add ISD::FROUND for libm round()
All libm floating-point rounding functions, except for round(), had their own
ISD nodes. Recent PowerPC cores have an instruction for round(), and so here I'm
adding ISD::FROUND so that round() can be custom lowered as well.
For the most part, this is straightforward. I've added an intrinsic
and a matching ISD node just like those for nearbyint() and friends. The
SelectionDAG pattern I've named frnd (because ISD::FP_ROUND has already claimed
fround).
This will be used by the PowerPC backend in a follow-up commit.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187926 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
egalizeFloatTypes.cpp
egalizeTypes.h
egalizeVectorOps.cpp
egalizeVectorTypes.cpp
electionDAGBuilder.cpp
electionDAGDumper.cpp
|
| fab2daa4a1127ecb217abe2b07c1769122b6fee1 |
08-Aug-2013 |
Stephen Hines <srhines@google.com> |
Merge commit '10251753b6897adcd22cc981c0cc42f348c109de' into merge-20130807
Conflicts:
lib/Archive/ArchiveReader.cpp
lib/Support/Unix/PathV2.inc
Change-Id: I29d8c1e321a4a380b6013f00bac6a8e4b593cc4e
|
| 425b76c2314ff7ee7ad507011bdda1988ae481ef |
06-Aug-2013 |
Tom Stellard <thomas.stellard@amd.com> |
TargetLowering: Add getVectorIdxTy() function v2
This virtual function can be implemented by targets to specify the type
to use for the index operand of INSERT_VECTOR_ELT, EXTRACT_VECTOR_ELT,
INSERT_SUBVECTOR, EXTRACT_SUBVECTOR. The default implementation returns
the result from TargetLowering::getPointerTy()
The previous code was using TargetLowering::getPointerTy() for vector
indices, because this is guaranteed to be legal on all targets. However,
using TargetLowering::getPointerTy() can be a problem for targets with
pointer sizes that differ across address spaces. On such targets,
when vectors need to be loaded or stored to an address space other than the
default 'zero' address space (which is the address space assumed by
TargetLowering::getPointerTy()), having an index that
is a different size than the pointer can lead to inefficient
pointer calculations, (e.g. 64-bit adds for a 32-bit address space).
There is no intended functionality change with this patch.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187748 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
egalizeDAG.cpp
egalizeIntegerTypes.cpp
egalizeTypesGeneric.cpp
egalizeVectorOps.cpp
egalizeVectorTypes.cpp
electionDAG.cpp
electionDAGBuilder.cpp
|
| 1a54c57cf654e001c078c7064123d30e6c03e349 |
31-Jul-2013 |
Eric Christopher <echristo@gmail.com> |
Fix crashing on invalid inline asm with matching constraints.
For a testcase like the following:
typedef unsigned long uint64_t;
typedef struct {
uint64_t lo;
uint64_t hi;
} blob128_t;
void add_128_to_128(const blob128_t *in, blob128_t *res) {
asm ("PAND %1, %0" : "+Q"(*res) : "Q"(*in));
}
where we'll fail to allocate the register for the output constraint,
our matching input constraint will not find a register to match,
and could try to search past the end of the current operands array.
On the idea that we'd like to attempt to keep compilation going
to find more errors in the module, change the error cases when
we're visiting inline asm IR to return immediately and avoid
trying to create a node in the DAG. This leaves us with only
a single error message per inline asm instruction, but allows us
to safely keep going in the general case.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187470 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| b0bee810e7f980ccb4c0ee56aed948716a51d0ab |
31-Jul-2013 |
Eric Christopher <echristo@gmail.com> |
Reflow this to be easier to read.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187459 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| 75c9433b49b1e4e2d7e61249c3cd0e3ce910d5c8 |
30-Jul-2013 |
Quentin Colombet <qcolombet@apple.com> |
[DAGCombiner] insert_vector_elt: Avoid building a vector twice.
This patch prevents the following combine when the input vector is used more
than once.
insert_vector_elt (build_vector elt0, ..., eltN), NewEltIdx, idx
=>
build_vector elt0, ..., NewEltIdx, ..., eltN
The reasons are:
- Building a vector may be expensive, so try to reuse the existing part of a
vector instead of creating a new one (think big vectors).
- elt0 to eltN now have two users instead of one. This may prevent some other
optimizations.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187396 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 81e480463d8bb57776d03cebfd083762909023f1 |
27-Jul-2013 |
Nick Lewycky <nicholas@mxc.ca> |
Reimplement isPotentiallyReachable to make nocapture deduction much stronger.
Adds unit tests for it too.
Split BasicBlockUtils into an analysis-half and a transforms-half, and put the
analysis bits into a new Analysis/CFG.{h,cpp}. Promote isPotentiallyReachable
into llvm::isPotentiallyReachable and move it into Analysis/CFG.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187283 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 320185fa5f5838b3892962f6e91083e9729cd946 |
26-Jul-2013 |
Justin Holewinski <jholewinski@nvidia.com> |
Add a target legalize hook for SplitVectorOperand (again)
CustomLowerNode was not being called during SplitVectorOperand,
meaning custom legalization could not be used by targets.
This also adds a test case for NVPTX that depends on this custom
legalization.
Differential Revision: http://llvm-reviews.chandlerc.com/D1195
Attempt to fix the buildbots by making the X86 test I just added platform independent
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187202 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeVectorTypes.cpp
|
| c735c1c2aed2cbaeb61296f4269535b5d13d8b0a |
26-Jul-2013 |
Rafael Espindola <rafael.espindola@gmail.com> |
Revert "Add a target legalize hook for SplitVectorOperand"
This reverts commit 187198. It broke the bots.
The soft float test probably needs a -triple because of name differences.
On the hard float test I am getting a "roundss $1, %xmm0, %xmm0", instead of
"vroundss $1, %xmm0, %xmm0, %xmm0".
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187201 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeVectorTypes.cpp
|
| 5a24ed951b7f5e553a7e4e1415da5be247db443e |
26-Jul-2013 |
Justin Holewinski <jholewinski@nvidia.com> |
Add a target legalize hook for SplitVectorOperand
CustomLowerNode was not being called during SplitVectorOperand,
meaning custom legalization could not be used by targets.
This also adds a test case for NVPTX that depends on this custom
legalization.
Differential Revision: http://llvm-reviews.chandlerc.com/D1195
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187198 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeVectorTypes.cpp
|
| 1f67c63cb23ba5d405452d72bb8892df6b7ccd4f |
24-Jul-2013 |
Tom Stellard <thomas.stellard@amd.com> |
DAGCombiner: Pass the correct type to TargetLowering::isF(Abs|Neg)Free
This commit also implements these functions for R600 and removes a test
case that was relying on the buggy behavior.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187007 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 3b5c6eaa2a3512ef98095ff537588360a6268630 |
17-Jul-2013 |
Michael Gottesman <mgottesman@apple.com> |
Add -*- C++ -*- to InstrEmitter.h.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186527 91177308-0d34-0410-b5e6-96231b3b80d8
nstrEmitter.h
|
| d1654a769c06d20595398565de055b5ab3ede1f9 |
15-Jul-2013 |
Hal Finkel <hfinkel@anl.gov> |
Remove invalid assert in DAGTypeLegalizer::RemapValue
There is a comment at the top of DAGTypeLegalizer::PerformExpensiveChecks
which, in part, says:
// Note that these invariants may not hold momentarily when processing a node:
// the node being processed may be put in a map before being marked Processed.
Unfortunately, this assert would be valid only if the above-mentioned invariant
held unconditionally. This was causing llc to assert when, in fact,
everything was fine.
Thanks to Richard Sandiford for investigating this issue!
Fixes PR16562.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186338 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeTypes.cpp
|
| 3c70fcf02b367f517e93c1bd4ce237966383ebf8 |
15-Jul-2013 |
Craig Topper <craig.topper@gmail.com> |
Add 'const' qualifier to some arrays.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186312 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGRRList.cpp
|
| a0ec3f9b7b826b9b40b80199923b664bad808cce |
14-Jul-2013 |
Craig Topper <craig.topper@gmail.com> |
Use SmallVectorImpl& instead of SmallVector to avoid repeating small vector size.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186274 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
egalizeTypes.h
egalizeVectorTypes.cpp
cheduleDAGFast.cpp
cheduleDAGRRList.cpp
cheduleDAGSDNodes.cpp
electionDAG.cpp
|
| 6c64fba6336a00e56d2428c45400c406b586f7f7 |
13-Jul-2013 |
Craig Topper <craig.topper@gmail.com> |
Pass SmallVector by const reference instead of by value.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186243 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 75d13065fda4b470f272311520f5dfe6c11460ce |
10-Jul-2013 |
Stephen Lin <stephenwlin@gmail.com> |
Remove trailing whitespac
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186032 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 45ff709caf46d9f472c9229493853dec27477935 |
10-Jul-2013 |
Adrian Prantl <aprantl@apple.com> |
Un-break the buildbot by tweaking the indirection flag.
Pulled in a testcase from the debuginfo-test suite.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185993 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
|
| 893ae83f421c20cf34622b355c5aaba32b2c019a |
10-Jul-2013 |
Adrian Prantl <aprantl@apple.com> |
Document a known limitation of the status quo.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185992 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| 3517640443f0b5224e2a6414c246ac60016ee9d4 |
09-Jul-2013 |
Adrian Prantl <aprantl@apple.com> |
Reapply an improved version of r180816/180817.
Change the informal convention of DBG_VALUE machine instructions so that
we can express a register-indirect address with an offset of 0.
The old convention was that a DBG_VALUE is a register-indirect value if
the offset (operand 1) is nonzero. The new convention is that a DBG_VALUE
is register-indirect if the first operand is a register and the second
operand is an immediate. For plain register values the combination reg,
reg is used. MachineInstrBuilder::BuildMI knows how to build the new
DBG_VALUES.
rdar://problem/13658587
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185966 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
nstrEmitter.cpp
electionDAGBuilder.cpp
electionDAGISel.cpp
|
| b9c8c40acbe120ebf44d2a81382ceee100bcd331 |
09-Jul-2013 |
Hal Finkel <hfinkel@anl.gov> |
WidenVecRes_BUILD_VECTOR must use the first operand's type
Because integer BUILD_VECTOR operands may have a larger type than the result's
vector element type, and all operands must have the same type, when widening a
BUILD_VECTOR node by adding UNDEFs, we cannot use the vector element type, but
rather must use the type of the existing operands.
Another bug found by llvm-stress.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185960 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeVectorTypes.cpp
|
| e54885af9b54bfc7436a928a48d3db1ef88a2a70 |
09-Jul-2013 |
Stephen Lin <stephenwlin@gmail.com> |
AArch64/PowerPC/SystemZ/X86: This patch fixes the interface, usage, and all
in-tree implementations of TargetLoweringBase::isFMAFasterThanMulAndAdd in
order to resolve the following issues with fmuladd (i.e. optional FMA)
intrinsics:
1. On X86(-64) targets, ISD::FMA nodes are formed when lowering fmuladd
intrinsics even if the subtarget does not support FMA instructions, leading
to laughably bad code generation in some situations.
2. On AArch64 targets, ISD::FMA nodes are formed for operations on fp128,
resulting in a call to a software fp128 FMA implementation.
3. On PowerPC targets, FMAs are not generated from fmuladd intrinsics on types
like v2f32, v8f32, v4f64, etc., even though they promote, split, scalarize,
etc. to types that support hardware FMAs.
The function has also been slightly renamed for consistency and to force a
merge/build conflict for any out-of-tree target implementing it. To resolve,
see comments and fixed in-tree examples.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185956 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
electionDAGBuilder.cpp
|
| bd6f1f6896275e04ce46c9ef82fd96e2e6c125dd |
09-Jul-2013 |
Hal Finkel <hfinkel@anl.gov> |
DAGCombine tryFoldToZero cannot create illegal types after type legalization
When folding sub x, x (and other similar constructs), where x is a vector, the
result is a vector of zeros. After type legalization, make sure that the input
zero elements have a legal type. This type may be larger than the result's
vector element type.
This was another bug found by llvm-stress.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185949 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| b49401533082fa0e8625c7cbaa0813db6c4c9bd5 |
09-Jul-2013 |
Stephen Lin <stephenwlin@gmail.com> |
Style fixes: remove unnecessary braces for one-statement if blocks, no else after return, etc. No funcionality change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185893 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 6c75160b875799a9303879e11022edf4ba44c3f9 |
08-Jul-2013 |
Hal Finkel <hfinkel@anl.gov> |
Improve the comment from r185794 (re: PromoteIntRes_BUILD_VECTOR)
In response to Duncan's review, I believe that the original comment was not as
clear as it could be. Hopefully, this is better.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185824 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeIntegerTypes.cpp
|
| 63e7a38c8980d70197ecdb9ba54b79b87c7b064d |
08-Jul-2013 |
Hal Finkel <hfinkel@anl.gov> |
Fix PromoteIntRes_BUILD_VECTOR crash with i1 vectors
This fixes a bug (found by llvm-stress) in
DAGTypeLegalizer::PromoteIntRes_BUILD_VECTOR where it assumed that the result
type would always be larger than the original operands. This is not always
true, however, with boolean vectors. For example, promoting a node of type v8i1
(where the operands will be of type i32, the type to which i1 is promoted) will
yield a node with a result vector element type of i16 (and operands of type
i32). As a result, we cannot blindly assume that we can ANY_EXTEND the operands
to the result type.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185794 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeIntegerTypes.cpp
|
| 155615d7dc4e4fbfd3b7273720a76356468edf46 |
08-Jul-2013 |
Stephen Lin <stephenwlin@gmail.com> |
Remove trailing whitespace from SelectionDAG/*.cpp
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185780 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
astISel.cpp
egalizeDAG.cpp
egalizeFloatTypes.cpp
egalizeIntegerTypes.cpp
egalizeTypesGeneric.cpp
egalizeVectorOps.cpp
electionDAG.cpp
electionDAGBuilder.cpp
argetLowering.cpp
|
| 09f8ca3986cbe89d897765926462476f345a25d0 |
06-Jul-2013 |
Stephen Lin <stephenwlin@gmail.com> |
SelectionDAGBuilder: style fixes (add space between end parentheses and open brace)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185768 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| f4eeab452ad4093986359c78a57321df12df99b0 |
06-Jul-2013 |
Benjamin Kramer <benny.kra@googlemail.com> |
DAGCombiner: Don't drop extension behavior when shrinking a load when unsafe.
ReduceLoadWidth unconditionally drops extensions from loads. Limit it to the
case when all of the bits the extension would otherwise produce are dropped by
the shrink. It would be possible to shrink the load in more cases by merging
the extensions, but this isn't trivial and a very rare case. I left a TODO for
that case.
Fixes PR16551.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185755 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| e5a81a130f26b0b2651ad6a22e3748703b11cb46 |
06-Jul-2013 |
Tim Northover <tnorthover@apple.com> |
Stop putting operations after a tail call.
This prevents the emission of DAG-generated vreg definitions after a
tail call be dropping them entirely (on the grounds that nothing could
use them anyway, and they interfere with O0 CodeGen).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185754 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| f349a6e9e6ee0b589c403e0c5785266da121d05c |
04-Jul-2013 |
Jakob Stoklund Olesen <stoklund@2pi.dk> |
Remove the EXCEPTIONADDR, EHSELECTION, and LSDAADDR ISD opcodes.
These exception-related opcodes are not used any longer.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185625 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
electionDAGDumper.cpp
|
| 1ab111ed01457887a8dece6fb36336aff41cc703 |
04-Jul-2013 |
Jakob Stoklund Olesen <stoklund@2pi.dk> |
Typo.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185618 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
|
| 918b7c82f8f53241a5bb354931abfe53634bfc4c |
04-Jul-2013 |
Jakob Stoklund Olesen <stoklund@2pi.dk> |
Simplify landing pad lowering.
Stop using the ISD::EXCEPTIONADDR and ISD::EHSELECTION when lowering
landing pad arguments. These nodes were previously legalized into
CopyFromReg nodes, but that never worked properly because the
CopyFromReg node weren't guaranteed to be scheduled at the top of the
basic block.
This meant the exception pointer and selector registers could be
clobbered before being copied to a virtual register.
This patch copies the two physical registers to virtual registers at
the beginning of the basic block, and lowers the landingpad instruction
directly to two CopyFromReg nodes reading the *virtual* registers. This
is safe because virtual registers don't get clobbered.
A future patch will remove the ISD::EXCEPTIONADDR and ISD::EHSELECTION
nodes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185617 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
electionDAGISel.cpp
|
| ef22e0e0b583e727f01ae70d51a143172eb31814 |
04-Jul-2013 |
Jakob Stoklund Olesen <stoklund@2pi.dk> |
FastISel can only apend to basic blocks.
Compute the insertion point from the end of the basic block instead of
skipping labels from the front.
This caused failures in landing pads when live-in copies where inserted
before instruction selection.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185616 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
|
| c93822901aef17aaf8bb1303f27b47025fd1d582 |
04-Jul-2013 |
Jakob Stoklund Olesen <stoklund@2pi.dk> |
Revert r185595-185596 which broke buildbots.
Revert "Simplify landing pad lowering."
Revert "Remove the EXCEPTIONADDR, EHSELECTION, and LSDAADDR ISD opcodes."
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185600 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
electionDAGBuilder.cpp
electionDAGDumper.cpp
electionDAGISel.cpp
|
| 62204220e1dc2dc21256adf765728ae257b33eac |
04-Jul-2013 |
Jakob Stoklund Olesen <stoklund@2pi.dk> |
Remove the EXCEPTIONADDR, EHSELECTION, and LSDAADDR ISD opcodes.
These exception-related opcodes are not used any longer.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185596 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
electionDAGDumper.cpp
|
| 9c0e9217325db888331c23ad7c332c09d64b02d4 |
04-Jul-2013 |
Jakob Stoklund Olesen <stoklund@2pi.dk> |
Simplify landing pad lowering.
Stop using the ISD::EXCEPTIONADDR and ISD::EHSELECTION when lowering
landing pad arguments. These nodes were previously legalized into
CopyFromReg nodes, but that never worked properly because the
CopyFromReg node weren't guaranteed to be scheduled at the top of the
basic block.
This meant the exception pointer and selector registers could be
clobbered before being copied to a virtual register.
This patch copies the two physical registers to virtual registers at
the beginning of the basic block, and lowers the landingpad instruction
directly to two CopyFromReg nodes reading the *virtual* registers. This
is safe because virtual registers don't get clobbered.
A future patch will remove the ISD::EXCEPTIONADDR and ISD::EHSELECTION
nodes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185595 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
electionDAGISel.cpp
|
| 32bdf82b9fbe88687be160863a6d221fe692c58b |
03-Jul-2013 |
Craig Topper <craig.topper@gmail.com> |
Use SmallVectorImpl::const_iterator instead of SmallVector to avoid specifying the vector size.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185514 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| f22fd3f7b557a967b1edc1fa9ae770006a39e97c |
03-Jul-2013 |
Craig Topper <craig.topper@gmail.com> |
Use SmallVectorImpl instead of SmallVector for iterators and references to avoid specifying the vector size unnecessarily.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185512 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
electionDAGBuilder.cpp
|
| 5bce67a95feb136389ca630cc5dd6a81e97ff1eb |
02-Jul-2013 |
Tim Northover <tnorthover@apple.com> |
DAGCombiner: fix use-counting issue when forming zextload
DAGCombiner was counting all uses of a load node when considering whether it's
worth combining into a zextload. Really, it wants to ignore the chain and just
count real uses.
rdar://problem/13896307
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185419 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 48b4d4f6474ace31c05507f3988c55de9601cc5b |
01-Jul-2013 |
Michael Gottesman <mgottesman@apple.com> |
Added c++ mode selector to head of SelectionDAGBuilder.h so editors open it in c++ mode instead of c mode.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185348 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.h
|
| dfccd9ee98cd6590bd82fa6edf24d510d953a2a0 |
28-Jun-2013 |
Lang Hames <lhames@gmail.com> |
Add missing case to switch statement - DAGTypeLegalizer::ExpandIntegerResult
should expand ATOMIC_CMP_SWAP nodes the same way that it does for ATOMIC_SWAP.
Since ATOMIC_LOADs on some targets (e.g. older ARM variants) get legalized to
ATOMIC_CMP_SWAPs, the missing case had been causing i64 atomic loads to crash
during isel.
<rdar://problem/14074644>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185186 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeIntegerTypes.cpp
|
| cbafae6d33031a72ba8219c28cb0e852511f79a3 |
28-Jun-2013 |
Manman Ren <mren@apple.com> |
Debug Info: clean up usage of Verify.
No functionality change.
It should suffice to check the type of a debug info metadata, instead of
calling Verify. For cases where we know the type of a DI metadata, use
assert.
Also update testing cases to make them conform to the format of DI classes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185135 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
unctionLoweringInfo.cpp
electionDAGBuilder.cpp
electionDAGDumper.cpp
|
| d8026708ef9c1ebb326426d207cf79cba7ff09b3 |
26-Jun-2013 |
Elena Demikhovsky <elena.demikhovsky@intel.com> |
Fixed a comment.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184933 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 87070fe1073b1e95748d987af0810d02aac43603 |
26-Jun-2013 |
Elena Demikhovsky <elena.demikhovsky@intel.com> |
Optimized integer vector multiplication operation by replacing it with shift/xor/sub when it is possible. Fixed a bug in SDIV, where the const operand is not a splat constant vector.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184931 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 5b3fca50a08865f0db55fc92ad1c037a04e12177 |
22-Jun-2013 |
Chad Rosier <mcrosier@apple.com> |
The getRegForInlineAsmConstraint function should only accept MVT value types.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184642 91177308-0d34-0410-b5e6-96231b3b80d8
argetLowering.cpp
|
| 1948910e3186d31bc0d213ecd0d7e87bb2c2760d |
22-Jun-2013 |
David Blaikie <dblaikie@gmail.com> |
DebugInfo: Don't lose unreferenced non-trivial by-value parameters
A FastISel optimization was causing us to emit no information for such
parameters & when they go missing we end up emitting a different
function type. By avoiding that shortcut we not only get types correct
(very important) but also location information (handy) - even if it's
only live at the start of a function & may be clobbered later.
Reviewed/discussion by Evan Cheng & Dan Gohman.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184604 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
|
| 2da863984bdd0123fa53ab3f5439d239a5a9e419 |
21-Jun-2013 |
Michael Liao <michael.liao@intel.com> |
Fix PR16360
When (srl (anyextend x), c) is folded into (anyextend (srl x, c)), the
high bits are not cleared. Add 'and' to clear off them.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184575 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| ba54bca472a15d0657e1b88776f7069042b60b4e |
19-Jun-2013 |
Bill Wendling <isanbard@gmail.com> |
Access the TargetLoweringInfo from the TargetMachine object instead of caching it. The TLI may change between functions. No functionality change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184360 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
electionDAGBuilder.cpp
electionDAGBuilder.h
electionDAGISel.cpp
|
| d626d33246c897a10d40e01b8658fa05c36b1e5f |
19-Jun-2013 |
Bill Wendling <isanbard@gmail.com> |
Don't cache the TLI object since we have access to it through TargetMachine already.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184346 91177308-0d34-0410-b5e6-96231b3b80d8
unctionLoweringInfo.cpp
|
| a3fb49cd851cd3b593fc653dc3ba4434c2e1232f |
18-Jun-2013 |
Quentin Colombet <qcolombet@apple.com> |
During SelectionDAG building explicitly set a node to constant zero when the
value is zero.
This allows optmizations to kick in more easily.
Fix some test cases so that they remain meaningful (i.e., not completely dead
coded) when optimizations apply.
<rdar://problem/14096009> superfluous multiply by high part of zero-extended
value.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184222 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| 6d9dbd5526e3161db884fc4fe99c278bb59ccc19 |
16-Jun-2013 |
David Blaikie <dblaikie@gmail.com> |
Debug Info: Simplify Frame Index handling in DBG_VALUE Machine Instructions
Rather than using the full power of target-specific addressing modes in
DBG_VALUEs with Frame Indicies, simply use Frame Index + Offset. This
reduces the complexity of debug info handling down to two
representations of values (reg+offset and frame index+offset) rather
than three or four.
Ideally we could ensure that frame indicies had been eliminated by the
time we reached an assembly or dwarf generation, but I haven't spent the
time to figure out where the FIs are leaking through into that & whether
there's a good place to convert them. Some FI+offset=>reg+offset
conversion is done (see PrologEpilogInserter, for example) which is
necessary for some SelectionDAG assumptions about registers, I believe,
but it might be possible to make this a more thorough conversion &
ensure there are no remaining FIs no matter how instruction selection
is performed.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184066 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
nstrEmitter.cpp
electionDAGBuilder.cpp
electionDAGISel.cpp
|
| 7e6d620336d75c75086905184c451c6a2a21d6a3 |
15-Jun-2013 |
Stephen Lin <stephenwlin@gmail.com> |
SelectionDAG: slightly refactor DAGCombiner::visitSELECT_CC to avoid redudant checks...
This doesn't really effect performance due to all the relevant calls being transparent but is clearer.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184027 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| b05e4778f0871cbb02f61e4d55ad7375738a1d01 |
15-Jun-2013 |
Matt Arsenault <Matthew.Arsenault@amd.com> |
Introduce getSelect usage and use more getSelectCC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184012 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
egalizeDAG.cpp
egalizeFloatTypes.cpp
egalizeIntegerTypes.cpp
egalizeVectorOps.cpp
egalizeVectorTypes.cpp
|
| a553bede23578dbf5233a28b1e67183d0911096c |
14-Jun-2013 |
Stephen Lin <stephenwlin@gmail.com> |
SelectionDAG: minor fix to order of operands in comments to match the code
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184008 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 38103d1012cb8a51da8866134886a0a8f35f4e30 |
14-Jun-2013 |
Stephen Lin <stephenwlin@gmail.com> |
SelectionDAG: Fix incorrect condition checks in some cases of folding FADD/FMUL combinations; also improve accuracy of comments
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183993 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 1878f9a7874b1ff569d745c0269f49d3daf7203d |
12-Jun-2013 |
Stephen Hines <srhines@google.com> |
Merge commit '100fbdd06be7590b23c4707a98cd605bdb519498' into merge_20130612
|
| a2f8d37fb791d197e7b0b8e6edfa6535f6b21602 |
09-Jun-2013 |
David Majnemer <david.majnemer@gmail.com> |
TargetLowering: Clean up method description comments
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183623 91177308-0d34-0410-b5e6-96231b3b80d8
argetLowering.cpp
|
| 6a2e7ac0b6647a409394e58b385e579ea62b5cba |
06-Jun-2013 |
Bill Wendling <isanbard@gmail.com> |
Cache the TargetLowering info object as a pointer.
Caching it as a pointer allows us to reset it if the TargetMachine object
changes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183361 91177308-0d34-0410-b5e6-96231b3b80d8
esourcePriorityQueue.cpp
cheduleDAGRRList.cpp
electionDAGBuilder.cpp
electionDAGISel.cpp
|
| 384ceb8446bebe4425e65d1035256eee3b4cfa6d |
06-Jun-2013 |
Bill Wendling <isanbard@gmail.com> |
Don't cache the TargetLoweringInfo object inside of the FunctionLowering object.
The TargetLoweringInfo object is owned by the TargetMachine. In the future, the
TargetMachine object may change, which may also change the TargetLoweringInfo
object.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183356 91177308-0d34-0410-b5e6-96231b3b80d8
unctionLoweringInfo.cpp
electionDAGISel.cpp
|
| 6e0b2a0cb0d398f175a5294bf0ad5488c714e8c2 |
30-May-2013 |
Andrew Trick <atrick@apple.com> |
Order CALLSEQ_START and CALLSEQ_END nodes.
Fixes PR16146: gdb.base__call-ar-st.exp fails after
pre-RA-sched=source fixes.
Patch by Xiaoyi Guo!
This also fixes an unsupported dbg.value test case. Codegen was
previously incorrect but the test was passing by luck.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182885 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 520b6e3fa5c9c01ed66e70c925e78d518504a983 |
28-May-2013 |
Benjamin Kramer <benny.kra@googlemail.com> |
Simplify code. No functionality change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182779 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeVectorTypes.cpp
|
| e4fae84b0b13bd5d66cf619fd2108dbb6064395d |
28-May-2013 |
Benjamin Kramer <benny.kra@googlemail.com> |
Remove double semicolons.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182778 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeTypes.cpp
egalizeVectorOps.cpp
egalizeVectorTypes.cpp
|
| b704d23062aa78b00999b75dcdcb628d4d84ee3f |
27-May-2013 |
Preston Gurd <preston.gurd@intel.com> |
Convert sqrt functions into sqrt instructions when -ffast-math is in effect.
When -ffast-math is in effect (on Linux, at least), clang defines
__FINITE_MATH_ONLY__ > 0 when including <math.h>. This causes the
preprocessor to include <bits/math-finite.h>, which renames the sqrt functions.
For instance, "sqrt" is renamed as "__sqrt_finite".
This patch adds the 3 new names in such a way that they will be treated
as equivalent to their respective original names.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182739 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| 9edb37feb5984b25494651ee4307fd2284d3538b |
26-May-2013 |
Andrew Trick <atrick@apple.com> |
Fix PR16143: Insert DEBUG_VALUE before terminator.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182717 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGSDNodes.cpp
|
| dd0fb018a7cd2214c7bc5c6c767f626f99b47ba9 |
25-May-2013 |
Andrew Trick <atrick@apple.com> |
Track IR ordering of SelectionDAG nodes 3/4.
Remove the old IR ordering mechanism and switch to new one. Fix unit
test failures.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182704 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeTypes.cpp
DNodeOrdering.h
cheduleDAGRRList.cpp
cheduleDAGSDNodes.cpp
electionDAG.cpp
electionDAGBuilder.cpp
electionDAGBuilder.h
electionDAGISel.cpp
|
| ac6d9bec671252dd1e596fa71180ff6b39d06b5d |
25-May-2013 |
Andrew Trick <atrick@apple.com> |
Track IR ordering of SelectionDAG nodes 2/4.
Change SelectionDAG::getXXXNode() interfaces as well as call sites of
these functions to pass in SDLoc instead of DebugLoc.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182703 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
egalizeDAG.cpp
egalizeFloatTypes.cpp
egalizeIntegerTypes.cpp
egalizeTypes.cpp
egalizeTypes.h
egalizeTypesGeneric.cpp
egalizeVectorOps.cpp
egalizeVectorTypes.cpp
electionDAG.cpp
electionDAGBuilder.cpp
electionDAGBuilder.h
electionDAGDumper.cpp
electionDAGISel.cpp
argetLowering.cpp
|
| ea5db0c315f1ab8ee3be52e0e765c32d3efff024 |
25-May-2013 |
Andrew Trick <atrick@apple.com> |
Track IR ordering of SelectionDAG nodes 1/4.
Use a field in the SelectionDAGNode object to track its IR ordering.
This adds fields and utility classes without changing existing
interfaces or functionality.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182701 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
electionDAGBuilder.h
|
| c6af2432c802d241c8fffbe0371c023e6c58844e |
25-May-2013 |
Michael J. Spencer <bigcheesegs@gmail.com> |
Replace Count{Leading,Trailing}Zeros_{32,64} with count{Leading,Trailing}Zeros.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182680 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
electionDAGBuilder.cpp
|
| 5da4e4f3b10148e811de82ec57b3f82c15411a81 |
22-May-2013 |
Adrian Prantl <aprantl@apple.com> |
Unify formatting of debug output.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182495 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
electionDAGBuilder.cpp
|
| c2b7f5fa511420b99dd8238ab4ba769a6a6015a5 |
21-May-2013 |
Justin Holewinski <jholewinski@nvidia.com> |
Drop @llvm.annotation and @llvm.ptr.annotation intrinsics during codegen.
The intrinsic calls are dropped, but the annotated value is propagated.
Fixes PR 15253
Original patch by Zeng Bin!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182387 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| f19b8b018be4b0478f741bf35287db3488fda8d6 |
21-May-2013 |
Benjamin Kramer <benny.kra@googlemail.com> |
DAGCombine: Avoid an edge case where it tried to create an i0 type for (x & 0) == 0.
Fixes PR16083.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182357 91177308-0d34-0410-b5e6-96231b3b80d8
argetLowering.cpp
|
| 225ed7069caae9ece32d8bd3d15c6e41e21cc04b |
18-May-2013 |
Matt Arsenault <Matthew.Arsenault@amd.com> |
Add LLVMContext argument to getSetCCResultType
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182180 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
egalizeDAG.cpp
egalizeFloatTypes.cpp
egalizeIntegerTypes.cpp
egalizeTypes.h
egalizeVectorOps.cpp
egalizeVectorTypes.cpp
electionDAGBuilder.cpp
argetLowering.cpp
|
| 9aa8fdfddb7a01f52d887176823dfc4e3f9a81a1 |
17-May-2013 |
Matt Arsenault <Matthew.Arsenault@amd.com> |
Replace redundant code
Use EVT::changeExtendedVectorElementTypeToInteger instead of doing the
same thing that it does
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182165 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 63f3ca5da75a614c603c04757edeaac123879d39 |
17-May-2013 |
Matt Arsenault <Matthew.Arsenault@amd.com> |
Add missing -*- C++ -*- to headers
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182164 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeTypes.h
|
| df68803890ecae2e8cfabdaa9122cb2ccbf5b89c |
17-May-2013 |
Adrian Prantl <aprantl@apple.com> |
Generate debug info for by-value struct args even if they are not used.
radar://problem/13865940
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182062 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| 8401ed21aa7c8ca022aad4b83fc9c63c0b824720 |
16-May-2013 |
Benjamin Kramer <benny.kra@googlemail.com> |
DAGCombine: Also shrink eq compares where the constant is exactly as large as the smaller type.
if ((x & 255) == 255)
before: movzbl %al, %eax
cmpl $255, %eax
after: cmpb $-1, %al
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182038 91177308-0d34-0410-b5e6-96231b3b80d8
argetLowering.cpp
|
| 71da6755c8b0a7444be5531798556c00f4dad101 |
15-May-2013 |
Hal Finkel <hfinkel@anl.gov> |
Fix legalization of SETCC with promoted integer intrinsics
If the input operands to SETCC are promoted, we need to make sure that we
either use the promoted form of both operands (or neither); a mixture is not
allowed. This can happen, for example, if a target has a custom promoted
i1-returning intrinsic (where i1 is not a legal type). In this case, we need to
use the promoted form of both operands.
This change only augments the behavior of the existing logic in the case where
the input types (which may or may not have already been legalized) disagree,
and should not affect existing target code because this case would otherwise
cause an assert in the SETCC operand promotion code.
This will be covered by (essentially all of the) tests for the new PPCCTRLoops
infrastructure.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181926 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeIntegerTypes.cpp
|
| a753ff72b2dfcd9c09451a124373e0a8ed1a1d47 |
13-May-2013 |
Bob Wilson <bob.wilson@apple.com> |
Remove redundant variable introduced by r181682.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181721 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 3778c04b2e3bc879cb7f175ba4d42f23fb9cef76 |
13-May-2013 |
Hao Liu <Hao.Liu@arm.com> |
Fix PR15950 A bug in DAG Combiner about undef mask
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181682 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 768ebcdf631baa1b18dc65a5983a237b307a99c2 |
10-May-2013 |
Benjamin Kramer <benny.kra@googlemail.com> |
DAGCombiner: Generate a correct constant for vector types when folding (xor (and)) into (and (not)).
PR15948.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181597 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 58dcd200b7f0ea01160b6159e0363cc96b1b83d9 |
10-May-2013 |
Owen Anderson <resistor@mac.com> |
Teach SelectionDAG to constant fold all-constant FMA nodes the same way that it constant folds FADD, FMUL, etc.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181555 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 363160a6be82df343fa60aa09d9d8f8f44605529 |
08-May-2013 |
David Majnemer <david.majnemer@gmail.com> |
DAGCombiner: Simplify inverted bit tests
Fold (xor (and x, y), y) -> (and (not x), y)
This removes an opportunity for a constant to appear twice.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181395 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 798925bac73b9320e7b32001478921910ac781d2 |
07-May-2013 |
Matt Arsenault <Matthew.Arsenault@amd.com> |
Fix vselect when getSetCCResultType returns a different type from the operands
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181348 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeVectorOps.cpp
|
| 2720248ae5b0201a7bdba57f3625869b578f2a5d |
06-May-2013 |
Michael Kuperstein <michael.m.kuperstein@intel.com> |
Fix slightly too aggressive conact_vector optimization.
(Would sometimes optimize away conacts used to extend a vector with undef values)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181186 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 5c332dbd30d9398ed25b30c3080506f7b8e92290 |
05-May-2013 |
Dmitri Gribenko <gribozavr@gmail.com> |
Add ArrayRef constructor from None, and do the cleanups that this constructor enables
Patch by Robert Wilhelm.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181138 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 38578c4919ea18ceb27e29988b2d857afe6215bf |
03-May-2013 |
Stephen Hines <srhines@google.com> |
Merge remote-tracking branch 'upstream/master' into merge-20130502
Conflicts:
lib/Support/Unix/Signals.inc
unittests/Transforms/Utils/Cloning.cpp
Change-Id: I027581a4390ec3ce4cd8d33da8b5f4c0c7d372c8
|
| f0b0755b6ea0b5c55bbf51ddd29439c01c7102e5 |
01-May-2013 |
Chad Rosier <mcrosier@apple.com> |
[inline asm] Return an undef SDValue of the expected value type, rather than
report a fatal error. This allows us to continue processing the translation
unit. Test case to come on the clang side because we need an inline asm
diagnostics handler in place.
rdar://13446483
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180873 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| b2ed5fac0693e949ffdbf45266f5d53839211b63 |
01-May-2013 |
Nadav Rotem <nrotem@apple.com> |
Optimize away nop CONCAT_VECTOR nodes.
Optimize CONCAT_VECTOR nodes that merge EXTRACT_SUBVECTOR values that extract from the same vector.
rdar://13402653
PR15866
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180871 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 3484da9479a4daff3efc7febe004e1f4d69b3b4a |
01-May-2013 |
Stephen Lin <stephenwlin@gmail.com> |
Only pass 'returned' to target-specific lowering code when the value of entire register is guaranteed to be preserved.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180825 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| 86a87d9ba1faf153e0e6eaddfd3e95595c83bcb1 |
01-May-2013 |
Adrian Prantl <aprantl@apple.com> |
Temporarily revert "Change the informal convention of DBG_VALUE so that we can express a"
because it breaks some buildbots.
This reverts commit 180816.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180819 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
nstrEmitter.cpp
electionDAGBuilder.cpp
electionDAGISel.cpp
|
| a2b56692c8b824b8cc4a0927bb555f3718e9bee8 |
01-May-2013 |
Adrian Prantl <aprantl@apple.com> |
Change the informal convention of DBG_VALUE so that we can express a
register-indirect address with an offset of 0.
It used to be that a DBG_VALUE is a register-indirect value if the offset
(operand 1) is nonzero. The new convention is that a DBG_VALUE is
register-indirect if the first operand is a register and the second
operand is an immediate. For plain registers use the combination reg, reg.
rdar://problem/13658587
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180816 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
nstrEmitter.cpp
electionDAGBuilder.cpp
electionDAGISel.cpp
|
| 730a570c8c1b84f650ae92bacd61c88cfef9c6a4 |
26-Apr-2013 |
Silviu Baranga <silviu.baranga@arm.com> |
Re-write the address propagation code for pre-indexed loads/stores to take into account some previously misssed cases (PRE_DEC addressing mode, the offset and base address are swapped, etc). This should fix PR15581.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180609 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 6242fda42ad13eebc908e744426ae7bc8cf8d1c3 |
26-Apr-2013 |
Benjamin Kramer <benny.kra@googlemail.com> |
DAGCombiner: Canonicalize vector integer abs in the same way we do it for scalars.
This already helps SSE2 x86 a lot because it lacks an efficient way to
represent a vector select. The long term goal is to enable the backend to match
a canonicalized pattern into a single instruction (e.g. vabs or pabs).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180597 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 02066838b5cdf17277267e79ffbc9459a58cdd59 |
25-Apr-2013 |
Silviu Baranga <silviu.baranga@arm.com> |
Fix constant folding for one lane vector types. Constant folding one lane vector types not returns a vector instead of a scalar.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180254 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 2871ba90a3d3544fa1f136c7d4efbb619298d6e8 |
25-Apr-2013 |
Chad Rosier <mcrosier@apple.com> |
[inline asm] Fix a crasher for an invalid value type/register class.
rdar://13731657
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180226 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| ed5707baf9be36c0d06c278f589b6c55db8b96c0 |
23-Apr-2013 |
Owen Anderson <resistor@mac.com> |
DAGCombine should not aggressively fold SEXT(VSETCC(...)) into a wider VSETCC without first checking the target's vector boolean contents.
This exposed an issue with PowerPC AltiVec where it appears it was setting the wrong vector boolean contents. The included change
fixes the PowerPC tests, and was OK'd by Hal.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180129 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 0cb1019e9cd41237408eae09623eb9a34a4cbe0c |
22-Apr-2013 |
Jim Grosbach <grosbach@apple.com> |
Legalize vector truncates by parts rather than just splitting.
Rather than just splitting the input type and hoping for the best, apply
a bit more cleverness. Just splitting the types until the source is
legal often leads to an illegal result time, which is then widened and a
scalarization step is introduced which leads to truly horrible code
generation. With the loop vectorizer, these sorts of operations are much
more common, and so it's worth extra effort to do them well.
Add a legalization hook for the operands of a TRUNCATE node, which will
be encountered after the result type has been legalized, but if the
operand type is still illegal. If simple splitting of both types
ends up with the result type of each half still being legal, just
do that (v16i16 -> v16i8 on ARM, for example). If, however, that would
result in an illegal result type (v8i32 -> v8i8 on ARM, for example),
we can get more clever with power-two vectors. Specifically,
split the input type, but also widen the result element size, then
concatenate the halves and truncate again. For example on ARM,
To perform a "%res = v8i8 trunc v8i32 %in" we transform to:
%inlo = v4i32 extract_subvector %in, 0
%inhi = v4i32 extract_subvector %in, 4
%lo16 = v4i16 trunc v4i32 %inlo
%hi16 = v4i16 trunc v4i32 %inhi
%in16 = v8i16 concat_vectors v4i16 %lo16, v4i16 %hi16
%res = v8i8 trunc v8i16 %in16
This allows instruction selection to generate three VMOVN instructions
instead of a sequences of moves, stores and loads.
Update the ARMTargetTransformInfo to take this improved legalization
into account.
Consider the simplified IR:
define <16 x i8> @test1(<16 x i32>* %ap) {
%a = load <16 x i32>* %ap
%tmp = trunc <16 x i32> %a to <16 x i8>
ret <16 x i8> %tmp
}
define <8 x i8> @test2(<8 x i32>* %ap) {
%a = load <8 x i32>* %ap
%tmp = trunc <8 x i32> %a to <8 x i8>
ret <8 x i8> %tmp
}
Previously, we would generate the truly hideous:
.syntax unified
.section __TEXT,__text,regular,pure_instructions
.globl _test1
.align 2
_test1: @ @test1
@ BB#0:
push {r7}
mov r7, sp
sub sp, sp, #20
bic sp, sp, #7
add r1, r0, #48
add r2, r0, #32
vld1.64 {d24, d25}, [r0:128]
vld1.64 {d16, d17}, [r1:128]
vld1.64 {d18, d19}, [r2:128]
add r1, r0, #16
vmovn.i32 d22, q8
vld1.64 {d16, d17}, [r1:128]
vmovn.i32 d20, q9
vmovn.i32 d18, q12
vmov.u16 r0, d22[3]
strb r0, [sp, #15]
vmov.u16 r0, d22[2]
strb r0, [sp, #14]
vmov.u16 r0, d22[1]
strb r0, [sp, #13]
vmov.u16 r0, d22[0]
vmovn.i32 d16, q8
strb r0, [sp, #12]
vmov.u16 r0, d20[3]
strb r0, [sp, #11]
vmov.u16 r0, d20[2]
strb r0, [sp, #10]
vmov.u16 r0, d20[1]
strb r0, [sp, #9]
vmov.u16 r0, d20[0]
strb r0, [sp, #8]
vmov.u16 r0, d18[3]
strb r0, [sp, #3]
vmov.u16 r0, d18[2]
strb r0, [sp, #2]
vmov.u16 r0, d18[1]
strb r0, [sp, #1]
vmov.u16 r0, d18[0]
strb r0, [sp]
vmov.u16 r0, d16[3]
strb r0, [sp, #7]
vmov.u16 r0, d16[2]
strb r0, [sp, #6]
vmov.u16 r0, d16[1]
strb r0, [sp, #5]
vmov.u16 r0, d16[0]
strb r0, [sp, #4]
vldmia sp, {d16, d17}
vmov r0, r1, d16
vmov r2, r3, d17
mov sp, r7
pop {r7}
bx lr
.globl _test2
.align 2
_test2: @ @test2
@ BB#0:
push {r7}
mov r7, sp
sub sp, sp, #12
bic sp, sp, #7
vld1.64 {d16, d17}, [r0:128]
add r0, r0, #16
vld1.64 {d20, d21}, [r0:128]
vmovn.i32 d18, q8
vmov.u16 r0, d18[3]
vmovn.i32 d16, q10
strb r0, [sp, #3]
vmov.u16 r0, d18[2]
strb r0, [sp, #2]
vmov.u16 r0, d18[1]
strb r0, [sp, #1]
vmov.u16 r0, d18[0]
strb r0, [sp]
vmov.u16 r0, d16[3]
strb r0, [sp, #7]
vmov.u16 r0, d16[2]
strb r0, [sp, #6]
vmov.u16 r0, d16[1]
strb r0, [sp, #5]
vmov.u16 r0, d16[0]
strb r0, [sp, #4]
ldm sp, {r0, r1}
mov sp, r7
pop {r7}
bx lr
Now, however, we generate the much more straightforward:
.syntax unified
.section __TEXT,__text,regular,pure_instructions
.globl _test1
.align 2
_test1: @ @test1
@ BB#0:
add r1, r0, #48
add r2, r0, #32
vld1.64 {d20, d21}, [r0:128]
vld1.64 {d16, d17}, [r1:128]
add r1, r0, #16
vld1.64 {d18, d19}, [r2:128]
vld1.64 {d22, d23}, [r1:128]
vmovn.i32 d17, q8
vmovn.i32 d16, q9
vmovn.i32 d18, q10
vmovn.i32 d19, q11
vmovn.i16 d17, q8
vmovn.i16 d16, q9
vmov r0, r1, d16
vmov r2, r3, d17
bx lr
.globl _test2
.align 2
_test2: @ @test2
@ BB#0:
vld1.64 {d16, d17}, [r0:128]
add r0, r0, #16
vld1.64 {d18, d19}, [r0:128]
vmovn.i32 d16, q8
vmovn.i32 d17, q9
vmovn.i16 d16, q8
vmov r0, r1, d16
bx lr
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179989 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeTypes.h
egalizeVectorTypes.cpp
|
| 1e48093df8971ba188d943d71eb7cdb1fb65aa42 |
21-Apr-2013 |
Jim Grosbach <grosbach@apple.com> |
Tidy up comment grammar.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179986 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeVectorTypes.cpp
|
| 6265d5c91a18b2fb6499eb581c488315880c044d |
20-Apr-2013 |
Tim Northover <Tim.Northover@arm.com> |
Remove unused MEMBARRIER DAG node; it's been replaced by ATOMIC_FENCE.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179939 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
egalizeDAG.cpp
egalizeIntegerTypes.cpp
egalizeTypes.h
electionDAGDumper.cpp
|
| 456ca048af35163b9f52187e92a23ee0a9f059e8 |
20-Apr-2013 |
Stephen Lin <stephenwlin@gmail.com> |
Add CodeGen support for functions that always return arguments via a new parameter attribute 'returned', which is taken advantage of in target-independent tail call opportunity detection and in ARM call lowering (when placed on an integral first parameter).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179925 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| 462123f66159a8c7ff34b87cb269955252be3ec0 |
20-Apr-2013 |
Eli Bendersky <eliben@google.com> |
Simplify the code in FastISel::tryToFoldLoad, add an assertion and fix a comment.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179908 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
|
| 75299e3a95c0cfcade8515c603e7802351a11bee |
20-Apr-2013 |
Eli Bendersky <eliben@google.com> |
Move TryToFoldFastISelLoad to FastISel, where it belongs. In general, I'm
trying to move as much FastISel logic as possible out of the main path in
SelectionDAGISel - intermixing them just adds confusion.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179902 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
electionDAGISel.cpp
|
| 2a8bea7a8eba9bfa05dcc7a87e9152a0043841b2 |
20-Apr-2013 |
Michael Liao <michael.liao@intel.com> |
ArrayRefize getMachineNode(). No functionality change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179901 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
electionDAGISel.cpp
|
| 03494e05e8aa1b919b5a8a6277d7ffec5d1bfbb5 |
19-Apr-2013 |
Eli Bendersky <eliben@google.com> |
Use dbgs() consistently for -debug printouts
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179894 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 5bd0767a040eae0d8f153c46238849e64e166018 |
19-Apr-2013 |
Eli Bendersky <eliben@google.com> |
Add some more stats for fast isel vs. SelectionDAG, w.r.t lowering function
arguments in entry BBs.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179824 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 6fac1fbf30e41d33506b5bc66aa480ac7de7531d |
09-Apr-2013 |
Benjamin Kramer <benny.kra@googlemail.com> |
DAGCombiner: Fold a shuffle on CONCAT_VECTORS into a new CONCAT_VECTORS if possible.
This pattern occurs in SROA output due to the way vector arguments are lowered
on ARM.
The testcase from PR15525 now compiles into this, which is better than the code
we got with the old scalarrepl:
_Store:
ldr.w r9, [sp]
vmov d17, r3, r9
vmov d16, r1, r2
vst1.8 {d16, d17}, [r0]
bx lr
Differential Revision: http://llvm-reviews.chandlerc.com/D647
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179106 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 5622eaeffef44dd09a1dd061299d6c02d9ad4099 |
04-Apr-2013 |
Eli Bendersky <eliben@google.com> |
Formatting
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178771 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeIntegerTypes.cpp
|
| cd7a1558edd0bdae770c57b82b32291e54e014b2 |
03-Apr-2013 |
Bill Schmidt <wschmidt@linux.vnet.ibm.com> |
Fix PR15632: No support for ppcf128 floating-point remainder on PowerPC.
For this we need to use a libcall. Previously LLVM didn't implement
libcall support for frem, so I've added it in the usual
straightforward manner. A test case from the bug report is included.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178639 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeFloatTypes.cpp
egalizeTypes.h
|
| e737018a86fa3da37f74ec1757603f933efcf5aa |
02-Apr-2013 |
Arnold Schwaighofer <aschwaighofer@apple.com> |
DAGCombiner: Merge store/loads when we have extload/truncstores
This is helps on architectures where i8,i16 are not legal but we have byte, and
short loads/stores. Allowing us to merge copies like the one below on ARM.
copy(char *a, char *b, int n) {
do {
int t0 = a[0];
int t1 = a[1];
b[0] = t0;
b[1] = t1;
radar://13536387
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178546 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| f28a29b776b7dc2b97d09c75d69494f862c216b3 |
01-Apr-2013 |
Arnold Schwaighofer <aschwaighofer@apple.com> |
Merge load/store sequences with adresses: base + index + offset
We would also like to merge sequences that involve a variable index like in the
example below.
int index = *idx++
int i0 = c[index+0];
int i1 = c[index+1];
b[0] = i0;
b[1] = i1;
By extending the parsing of the base pointer to handle dags that contain a
base, index, and offset we can handle examples like the one above.
The dag for the code above will look something like:
(load (i64 add (i64 copyfromreg %c)
(i64 signextend (i8 load %index))))
(load (i64 add (i64 copyfromreg %c)
(i64 signextend (i32 add (i32 signextend (i8 load %index))
(i32 1)))))
The code that parses the tree ignores the intermediate sign extensions. However,
if there is a sign extension it needs to be on all indexes.
(load (i64 add (i64 copyfromreg %c)
(i64 signextend (add (i8 load %index)
(i8 1))))
vs
(load (i64 add (i64 copyfromreg %c)
(i64 signextend (i32 add (i32 signextend (i8 load %index))
(i32 1)))))
radar://13536387
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178483 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 0b68b758bbb6718fc67423109eeb9df64c711a37 |
30-Mar-2013 |
Benjamin Kramer <benny.kra@googlemail.com> |
DAGCombine: visitXOR can replace a node without returning it, bail out in that case.
Fixes the crash reported in PR15608.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178429 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 7ae3bb83c278e991940d022b7b48d996da408abf |
29-Mar-2013 |
Chad Rosier <mcrosier@apple.com> |
[fast-isel] Add a preemptive fix for the case where we fail to materialize an
immediate in a register. I don't believe this should ever fail, but I see no
harm in trying to make this code bullet proof.
I've added an assert to ensure my assumtion is correct. If the assertion fires
something is wrong and we should fix it, rather then just silently fall back to
SelectionDAG isel.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178305 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
|
| b4f98ea1213c866f39aa5b341ec0116f9c2335d7 |
26-Mar-2013 |
Michael Liao <michael.liao@intel.com> |
Enhance folding of (extract_subvec (insert_subvec V1, V2, IIdx), EIdx)
- Handle the case where the result of 'insert_subvect' is bitcasted
before 'extract_subvec'. This removes the redundant insertf128/extractf128
pair on unaligned 256-bit vector load/store on vectors of non 64-bit integer.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@177945 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 1cd1d02141788b212e185d190b4c358e47cc74b4 |
25-Mar-2013 |
Shuxin Yang <shuxin.llvm@gmail.com> |
Disable some unsafe-fp-math DAG-combine transformation after legalization.
For instance, following transformation will be disabled:
x + x + x => 3.0f * x;
The problem of these transformations is that it introduces a FP constant, which
following Instruction-Selection pass cannot handle.
Reviewed by Nadav, thanks a lot!
rdar://13445387
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@177933 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 7834c7143384bfde38e39e01158546304ca4f0c2 |
23-Mar-2013 |
Owen Anderson <resistor@mac.com> |
Remove the type legality check from the SelectionDAGBuilder when it lowers @llvm.fmuladd to ISD::FMA nodes.
Performing this check unilaterally prevented us from generating FMAs when the incoming IR contained illegal vector types which would eventually be legalized to underlying types that *did* support FMA.
For example, an @llvm.fmuladd on an OpenCL float16 should become a sequence of float4 FMAs, not float4 fmul+fadd's.
NOTE: Because we still call the target-specific profitability hook, individual targets can reinstate the old behavior, if desired, by simply performing the legality check inside their callback hook. They can also perform more sophisticated legality checks, if, for example, some illegal vector types can be productively implemented as FMAs, but not others.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@177820 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| 93c1fd49d2ca49447e092c4c1c4d5de1005e9e71 |
21-Mar-2013 |
Justin Holewinski <jholewinski@nvidia.com> |
Make variable name more explicit and eliminate redundant lookup in SDNodeOrdering
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@177600 91177308-0d34-0410-b5e6-96231b3b80d8
DNodeOrdering.h
|
| 7745175be32cd54e4aa6c9cce6f642f59a34a80f |
20-Mar-2013 |
Nadav Rotem <nrotem@apple.com> |
When computing the demanded bits of Load SDNodes, make sure that we are looking at the loaded-value operand and not the ptr result (in case of pre-inc loads).
rdar://13348420
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@177596 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 61aba54f2c0f432179dfaa758bdb2bf1b9929814 |
20-Mar-2013 |
Christian Konig <christian.koenig@amd.com> |
Revert "pre-RA-sched: fix TargetOpcode usage"
This reverts commit 06091513c283c863296f01cc7c2e86b56bb50d02.
The code is obviously wrong, but the trivial fix causes
inefficient code generation on X86. Somebody with more
knowledge of the code needs to take a look here.
Signed-off-by: Christian König <christian.koenig@amd.com>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@177529 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGRRList.cpp
|
| fa963a885c074b3b0d6cc2466036297c476f7103 |
20-Mar-2013 |
Justin Holewinski <jholewinski@nvidia.com> |
Move SDNode order propagation to SDNodeOrdering, which also fixes a missed
case of order propagation during isel.
Thanks Owen for the suggestion!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@177525 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeTypes.cpp
egalizeTypes.h
DNodeOrdering.h
electionDAGISel.cpp
|
| 06091513c283c863296f01cc7c2e86b56bb50d02 |
20-Mar-2013 |
Christian Konig <christian.koenig@amd.com> |
pre-RA-sched: fix TargetOpcode usage
TargetOpcodes need to be treaded as Machine- and not ISD-Opcodes.
Signed-off-by: Christian König <christian.koenig@amd.com>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@177518 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGRRList.cpp
|
| d73dc544f5e37e6d58befc71e57da3c132804543 |
20-Mar-2013 |
Justin Holewinski <jholewinski@nvidia.com> |
Propagate DAG node ordering during type legalization and instruction selection
A node's ordering is only propagated during legalization if (a) the new node does
not have an ordering (is not a CSE'd node), or (b) the new node has an ordering
that is higher than the node being legalized.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@177465 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeTypes.cpp
egalizeTypes.h
electionDAGISel.cpp
|
| 2d4629c5d7dcc6582fa7b85a517744f1a3654eba |
19-Mar-2013 |
Stephen Hines <srhines@google.com> |
Merge branch 'upstream' into merge_2013_03_18
|
| 4cb1f5f4064f2eec1420dc30bf32ac54bd40e222 |
13-Mar-2013 |
Bill Wendling <isanbard@gmail.com> |
Reset some of the target options which affect code generation.
This doesn't reset all of the target options within the TargetOptions
object. This is because some of those are ABI-specific and must be determined if
it's okay to change those on the fly.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176986 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 1a5c0510ecb029b7e5d04249cdd4e50b97bf1c3f |
12-Mar-2013 |
Richard Relph <Richard.Relph@amd.com> |
Avoid generating ISD::SELECT for vector operands to SIGN_EXTEND
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176881 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 33cdfe9f1943418604be5c800800394ae809fc4c |
11-Mar-2013 |
Nick Lewycky <nicholas@mxc.ca> |
Fix a crasher newly introduced in r176659/r176649, where fast-isel tries to
lower an expect intrinsic that is a constant expression.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176830 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
|
| fa785cb22d50c657eb08c762d627cd6aa96982f3 |
08-Mar-2013 |
Jan Wen Voung <jvoung@google.com> |
Disable statistics on Release builds and move tests that depend on -stats.
Summary:
Statistics are still available in Release+Asserts (any +Asserts builds),
and stats can also be turned on with LLVM_ENABLE_STATS.
Move some of the FastISel stats that were moved under DEBUG()
back out of DEBUG(), since stats are disabled across the board now.
Many tests depend on grepping "-stats" output. Move those into
a orig_dir/Stats/. so that they can be marked as unsupported
when building without statistics.
Differential Revision: http://llvm-reviews.chandlerc.com/D486
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176733 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
electionDAGISel.cpp
|
| 7a58099f0a4c9503f400f6b81590a5f6b73d4b97 |
08-Mar-2013 |
Benjamin Kramer <benny.kra@googlemail.com> |
Remove default from fully covered switch.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176703 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 03abf2f2aa77ddd23b74e431005bf773ce1cf0aa |
08-Mar-2013 |
Tom Stellard <thomas.stellard@amd.com> |
LegalizeDAG: Respect the result of TLI.getBooleanContents() when expanding SETCC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176695 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 3ef5383b3537a420c5e2ab3e657c378e5185549d |
08-Mar-2013 |
Tom Stellard <thomas.stellard@amd.com> |
DAGCombiner: Use correct value type for checking legality of BR_CC v3
LegalizeDAG.cpp uses the value of the comparison operands when checking
the legality of BR_CC, so DAGCombiner should do the same.
v2:
- Expand more BR_CC value types for NVPTX
v3:
- Expand correct BR_CC value types for Hexagon, Mips, and XCore.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176694 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| e36b47e17be0e3289890f33fe8aaecfc231d83a0 |
08-Mar-2013 |
Bill Wendling <isanbard@gmail.com> |
Revert r176154 in favor of a better approach.
Code generation makes some basic assumptions about the IR it's been given. In
particular, if there is only one 'invoke' in the function, then that invoke
won't be going away. However, with the advent of the `llvm.donothing' intrinsic,
those invokes may go away. If all of them go away, the landing pad no longer has
any users. This confuses the back-end, which asserts.
This happens with SjLj exceptions, because that's the model that modifies the IR
based on there being invokes, etc. in the function.
Remove any invokes of `llvm.donothing' during SjLj EH preparation. This will
give us a CFG that the back-end won't be confused about. If all of the invokes
in a function are removed, then the SjLj EH prepare pass won't insert the bogus
code the relies upon the invokes being there.
<rdar://problem/13228754&13316637>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176677 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| 4fde76db466a749200af555b0f400af873111767 |
07-Mar-2013 |
Chad Rosier <mcrosier@apple.com> |
[fast-isel] Seriously, add support for the expect intrinsic.
rdar://13370942
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176659 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
|
| 33947b4391458ed3ba2d7e7c741968325cbffa1d |
07-Mar-2013 |
Chad Rosier <mcrosier@apple.com> |
[fast-isel] Add support for the expect intrinsic.
rdar://13370942
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176649 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
|
| 3853f74aba301ef08b699bac2fa8e53230714a58 |
07-Mar-2013 |
Benjamin Kramer <benny.kra@googlemail.com> |
ArrayRefize some code. No functionality change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176648 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
electionDAGISel.cpp
|
| 877fcf52d17f1cadc38112ca988cdd4e666bac24 |
07-Mar-2013 |
Andrew Trick <atrick@apple.com> |
pre-RA-sched debug-only fix
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176638 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGRRList.cpp
|
| ccd38f4efb7f1a4457234d95e30fec5bcc738700 |
07-Mar-2013 |
Andrew Trick <atrick@apple.com> |
pre-RA-sched assertion fix. This bug was exposed by r176037.
rdar:13370002 [pre-RA-sched] assertion: released too many times
I tracked this down to an earlier hack that is no longer applicable
and interfered with normal scheduler logic. With the changes in
r176037, it was causing an instruction to be scheduled multiple times.
I have an external test case that I tried hard to reduce and
failed. I can't even reproduce with llc.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176636 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGRRList.cpp
|
| 4d895455fe1bcc0bbfe1a0f18c01246694f64a9c |
07-Mar-2013 |
Nadav Rotem <nrotem@apple.com> |
No need to go through int64 and APInt when generating a new constant.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176615 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 34fd0d2b93edb3ddefe5c5766073273f86b23b78 |
07-Mar-2013 |
Jim Grosbach <grosbach@apple.com> |
SDAG: Handle scalarizing an extend of a <1 x iN> vector.
Just scalarize the element and rebuild a vector of the result type
from that.
rdar://13281568
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176614 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeTypes.h
egalizeVectorTypes.cpp
|
| 5adb136be579e8fff3734461580cb34d1d2983b8 |
06-Mar-2013 |
Stephen Hines <srhines@google.com> |
Merge commit 'b3201c5cf1e183d840f7c99ff779d57f1549d8e5' into merge_20130226
Conflicts:
include/llvm/Support/ELF.h
lib/Support/DeltaAlgorithm.cpp
Change-Id: I24a4fbce62eb39d924efee3c687b55e1e17b30cd
|
| b804a1b1783e99ec12a093767027269a373189d3 |
02-Mar-2013 |
Eli Bendersky <eliben@google.com> |
Remove duplicate line and move another closer to its actual use
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176391 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| c3c3810f514af7e08f84ef76b0c304ec264ee021 |
01-Mar-2013 |
Akira Hatanaka <ahatanaka@mips.com> |
Set properties for f128 type.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176378 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeFloatTypes.cpp
|
| 7590022f4079dcd956b99e2f10a028f2158ece53 |
01-Mar-2013 |
Chad Rosier <mcrosier@apple.com> |
Generate an error message instead of asserting or segfaulting when we can't
handle indirect register inputs.
rdar://13322011
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176367 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| a6b20ced765b67a85d9219d0c8547fc9c133e14f |
01-Mar-2013 |
Michael Liao <michael.liao@intel.com> |
Fix PR10475
- ISD::SHL/SRL/SRA must have either both scalar or both vector operands
but TLI.getShiftAmountTy() so far only return scalar type. As a
result, backend logic assuming that breaks.
- Rename the original TLI.getShiftAmountTy() to
TLI.getScalarShiftAmountTy() and re-define TLI.getShiftAmountTy() to
return target-specificed scalar type or the same vector type as the
1st operand.
- Fix most TICG logic assuming TLI.getShiftAmountTy() a simple scalar
type.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176364 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeIntegerTypes.cpp
electionDAG.cpp
electionDAGBuilder.cpp
|
| 6437d38a0deb0cd51607dd624a70d093ae347156 |
01-Mar-2013 |
Eli Bendersky <eliben@google.com> |
A small refactoring + adding comments.
SelectionDAGIsel::LowerArguments needs a function, not a basic block. So it
makes sense to pass it the function instead of extracting a basic-block from
the function and then tossing it. This is also more self-documenting (functions
have arguments, BBs don't).
In addition, added comments to a couple of Select* methods.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176305 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
electionDAGISel.cpp
|
| 0a4da5f0fe70d0da620e504863f24881a5f9f7cb |
28-Feb-2013 |
Eli Bendersky <eliben@google.com> |
Put some per-instruction statistics of fast isel under NDEBUG, together with
other per-instruction statistics.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176273 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
|
| f686cfb33b232db5f9a671ddaf1265b42c7180d5 |
28-Feb-2013 |
Eric Christopher <echristo@gmail.com> |
Remove unnecessary cast to void.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176222 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 139f50a1a8d985bd950d88cef54a7ee560de9cb9 |
27-Feb-2013 |
Nadav Rotem <nrotem@apple.com> |
Silence the unused variable warning.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176218 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 07cd932c93fc3d552763f3eddced138bffdd9bd9 |
27-Feb-2013 |
Nadav Rotem <nrotem@apple.com> |
The FastISEL should be fast. But when we record statistics we use atomic operations to increment the counters.
This patch disables the counters on non-debug builds. This reduces the runtime of SelectionDAGISel::SelectCodeCommon by ~5%.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176214 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 7dbd34b199be8d053240a67cc1e81a04096af1c2 |
27-Feb-2013 |
Michael Ilseman <milseman@apple.com> |
Reverted: r176136 - Have a way for a target to opt-out of target-independent fast isel
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176204 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
|
| 5e5974f51ad079a3ed890ca8be1d3f50150320ad |
27-Feb-2013 |
Manman Ren <mren@apple.com> |
SelectionDAG: If llvm.donothing has a landingpad, we should clear
CurrentCallSite to avoid an assertion failure:
assert(MMI.getCurrentCallSite() == 0 && "Overlapping call sites!");
rdar://problem/13228754
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176154 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| bdc98d3510c1b3d32679ed3188becdc6d6dfd545 |
27-Feb-2013 |
Michael Ilseman <milseman@apple.com> |
Have a way for a target to opt-out of target-independent fast isel
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176136 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
|
| ffa1dbadaf73d5b80a2bdf421c16cba29aea80a3 |
25-Feb-2013 |
Chad Rosier <mcrosier@apple.com> |
Fix wording.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176055 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| fd3417d288c22673ec6d76dc4695989bb544373f |
25-Feb-2013 |
Chad Rosier <mcrosier@apple.com> |
[fast-isel] Add X86FastIsel::FastLowerArguments to handle functions with 6 or
fewer scalar integer (i32 or i64) arguments. It completely eliminates the need
for SDISel for trivial functions.
Also, add the new llc -fast-isel-abort-args option, which is similar to
-fast-isel-abort option, but for formal argument lowering.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176052 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 029f4fd2ff539ed143b83c140349df2c064965d2 |
25-Feb-2013 |
Andrew Trick <atrick@apple.com> |
pre-RA-sched fix: only reevaluate physreg interferences when necessary.
Fixes rdar:13279013: scheduler was blowing up on select instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176037 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGRRList.cpp
|
| 50e75bfc29269def44981ab5f109334d95f55007 |
25-Feb-2013 |
Matt Beaumont-Gay <matthewbg@google.com> |
'Hexadecimal' has two 'a's and only one 'i'.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176031 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| 7e6ffac9ab0af2a54036c978822ad40492246622 |
25-Feb-2013 |
Chandler Carruth <chandlerc@gmail.com> |
Fix spelling noticed by Duncan.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176023 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| af23f8e403d68e3f96eb5eb63e50e3aec4ea01c9 |
25-Feb-2013 |
Chandler Carruth <chandlerc@gmail.com> |
Fix the root cause of PR15348 by correctly handling alignment 0 on
memory intrinsics in the SDAG builder.
When alignment is zero, the lang ref says that *no* alignment
assumptions can be made. This is the exact opposite of the internal API
contracts of the DAG where alignment 0 indicates that the alignment can
be made to be anything desired.
There is another, more explicit alignment that is better suited for the
role of "no alignment at all": an alignment of 1. Map the intrinsic
alignment to this early so that we don't end up generating aligned DAGs.
It is really terrifying that we've never seen this before, but we
suddenly started generating a large number of alignment 0 memcpys due to
the new code to do memcpy-based copying of POD class members. That patch
contains a bug that rounds bitfield alignments down when they are the
first field. This can in turn produce zero alignments.
This fixes weird crashes I've seen in library users of LLVM on 32-bit
hosts, etc.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176022 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
electionDAGBuilder.cpp
|
| d99a5a3ab4d47c6532bcf17a01677b1730599057 |
23-Feb-2013 |
Nadav Rotem <nrotem@apple.com> |
SelectionDAG compile time improvement.
One of the phases of SelectionDAG is LegalizeVectors. We don't need to sort the DAG and copy nodes around if there are no vector ops.
Speeds up the compilation time of SelectionDAG on a big scalar workload by ~8%.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175929 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeVectorOps.cpp
|
| b704ffbb46cae716dc51bd8e6ba425c0a4949a47 |
22-Feb-2013 |
Pete Cooper <peter_cooper@apple.com> |
Fix isa<> check which could never be true.
It was incorrectly checking a Function* being an IntrinsicInst* which
isn't possible. It should always have been checking the CallInst* instead.
Added test case for x86 which ensures we only get one constant load.
It was 2 before this change.
rdar://problem/13267920
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175853 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
|
| f31bd0f7d92fdab64a478ccf6497e887d454d4af |
21-Feb-2013 |
Benjamin Kramer <benny.kra@googlemail.com> |
DAGCombiner: Make the post-legalize vector op optimization more aggressive.
A legal BUILD_VECTOR goes in and gets constant folded into another legal
BUILD_VECTOR so we don't lose any legality here. The problematic PPC
optimization that made this check necessary was fixed recently.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175759 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| c46e2df74cf75a33742f57d2b4d6c6fcf73bced9 |
20-Feb-2013 |
Arnold Schwaighofer <aschwaighofer@apple.com> |
DAGCombiner: Fold pointless truncate, bitcast, buildvector series
(2xi32) (truncate ((2xi64) bitcast (buildvector i32 a, i32 x, i32 b, i32 y)))
can be folded into a (2xi32) (buildvector i32 a, i32 b).
Such a DAG would cause uneccessary vdup instructions followed by vmovn
instructions.
We generate this code on ARM NEON for a setcc olt, 2xf64, 2xf64. For example, in
the vectorized version of the code below.
double A[N];
double B[N];
void test_double_compare_to_double() {
int i;
for(i=0;i<N;i++)
A[i] = (double)(A[i] < B[i]);
}
radar://13191881
Fixes bug 15283.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175670 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| eedff3547de6428798d0bd62c40fba3f93820922 |
20-Feb-2013 |
Michael Liao <michael.liao@intel.com> |
Fix PR15267
- When extloading from a vector with non-byte-addressable element, e.g.
<4 x i1>, the current logic breaks. Extend the current logic to
fix the case where the element type is not byte-addressable by loading
all bytes, bit-extracting/packing each element.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175642 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeVectorOps.cpp
|
| ad4da0fc321230261b4d0387f0ec216eb8aa50ca |
20-Feb-2013 |
Benjamin Kramer <benny.kra@googlemail.com> |
Move the SplatByte helper to APInt and generalize it a bit.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175621 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
electionDAG.cpp
|
| 751bc8d4c9ee4298449fed264571ffc162852e06 |
20-Feb-2013 |
Jakub Staszak <kubastaszak@gmail.com> |
Fix #includes, so we include only what we really need.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175581 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGSDNodes.h
|
| b875acda987650d1d734b8bc6e76283950529f84 |
18-Feb-2013 |
Chad Rosier <mcrosier@apple.com> |
[ms-inline asm] Remove a redundant call to the setHasMSInlineAsm function.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175456 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 3ef669c7175f959c39b7652f10c2b6ed9d8f83ae |
18-Feb-2013 |
NAKAMURA Takumi <geek4civic@gmail.com> |
[ms-inline asm] Fix undefined behavior to reset hasMSInlineAsm in advance of SelectAllBasicBlocks().
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175422 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 631dd86804c3e74652d555b82ffe2f4750c81d68 |
16-Feb-2013 |
Jakub Staszak <kubastaszak@gmail.com> |
LegalizeDAG.cpp doesn't need DenseMap.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175365 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| b56606274d43c7a3e01b18a08d1115fbf2889996 |
16-Feb-2013 |
Chad Rosier <mcrosier@apple.com> |
[ms-inline asm] Do not omit the frame pointer if we have ms-inline assembly.
If the frame pointer is omitted, and any stack changes occur in the inline
assembly, e.g.: "pusha", then any C local variable or C argument references
will be incorrect.
I pass no judgement on anyone who would do such a thing. ;)
rdar://13218191
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175334 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 789cb5df9ca61f8a3794a4fbde7cc020fd00a02a |
15-Feb-2013 |
Bill Wendling <isanbard@gmail.com> |
Use the 'target-features' and 'target-cpu' attributes to reset the subtarget features.
If two functions require different features (e.g., `-mno-sse' vs. `-msse') then
we want to honor that, especially during LTO. We can do that by resetting the
subtarget's features depending upon the 'target-feature' attribute.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175314 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 86cdbc9c29a572d422815f55fd89ff7510d1e3e8 |
15-Feb-2013 |
Paul Redmond <paul.redmond@intel.com> |
enable SDISel sincos optimization for GNU environments
- add sincos to runtime library if target triple environment is GNU
- added canCombineSinCosLibcall() which checks that sincos is in the RTL and
if the environment is GNU then unsafe fpmath is enabled (required to
preserve errno)
- extended sincos-opt lit test
Reviewed by: Hal Finkel
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175283 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 6cc4b8d1eb2adf547807044e0a97f3a255733784 |
14-Feb-2013 |
Nadav Rotem <nrotem@apple.com> |
Dont merge consecutive loads/stores into vectors when noimplicitfloat is used.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175190 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 39125d9a3a319b6dfd1fba639cd7df2fa1465a8e |
14-Feb-2013 |
Owen Anderson <resistor@mac.com> |
Add some legality checks for SETCC before introducing it in the DAG combiner post-operand legalization.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175149 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 87d0b9ed1462705dd9bf1cb7f67d0bf03af776c8 |
12-Feb-2013 |
Guy Benyei <guy.benyei@intel.com> |
Add static cast to unsigned char whenever a character classification function is called with a signed char argument, in order to avoid assertions in Windows Debug configuration.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175006 91177308-0d34-0410-b5e6-96231b3b80d8
argetLowering.cpp
|
| 5c97450df748819381daa4c4d400c39b0d7378ae |
12-Feb-2013 |
Paul Redmond <paul.redmond@intel.com> |
PR14562 - Truncation of left shift became undef
DAGCombiner::ReduceLoadWidth was converting (trunc i32 (shl i64 v, 32))
into (shl i32 v, 32) into undef. To prevent this, check the shift count
against the final result size.
Patch by: Kevin Schoedel
Reviewed by: Nadav Rotem
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174972 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| b0fde6dc029a33945bfeea7082a03940f664943c |
12-Feb-2013 |
Pete Cooper <peter_cooper@apple.com> |
Check type for legality before forming a select from loads.
Sorry for the lack of a test case. I tried writing one for i386 as i know selects are illegal on this target, but they are actually considered legal by isel and expanded later.
I can't see any targets to trigger this, but checking for the legality of a node before forming it is general goodness.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174934 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 092e5e75661fdd5d54a748fb00fab59d21031268 |
11-Feb-2013 |
Evan Cheng <evan.cheng@apple.com> |
Currently, codegen may spent some time in SDISel passes even if an entire
function is successfully handled by fast-isel. That's because function
arguments are *always* handled by SDISel. Introduce FastLowerArguments to
allow each target to provide hook to handle formal argument lowering.
As a proof-of-concept, add ARMFastIsel::FastLowerArguments to handle
functions with 4 or fewer scalar integer (i8, i16, or i32) arguments. It
completely eliminates the need for SDISel for trivial functions.
rdar://13163905
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174855 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
electionDAGISel.cpp
|
| 5f352cc6e49d714bd5c14c952aa5c394fc9897bf |
11-Feb-2013 |
Evan Cheng <evan.cheng@apple.com> |
Remove unnecessary code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174854 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| 089a5f8a8c5e24f996dd41419de2c7bc7b42ea29 |
08-Feb-2013 |
Hal Finkel <hfinkel@anl.gov> |
DAGCombiner: Constant folding around pre-increment loads/stores
Previously, even when a pre-increment load or store was generated,
we often needed to keep a copy of the original base register for use
with other offsets. If all of these offsets are constants (including
the offset which was combined into the addressing mode), then this is
clearly unnecessary. This change adjusts these other offsets to use the
new incremented address.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174746 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 8f637adbd383afc2defb5d3f75433b6f2c25d527 |
08-Feb-2013 |
Bob Wilson <bob.wilson@apple.com> |
Revert 172027 and 174336. Remove diagnostics about over-aligned stack objects.
Aside from the question of whether we report a warning or an error when we
can't satisfy a requested stack object alignment, the current implementation
of this is not good. We're not providing any source location in the diagnostics
and the current warning is not connected to any warning group so you can't
control it. We could improve the source location somewhat, but we can do a
much better job if this check is implemented in the front-end, so let's do that
instead. <rdar://problem/13127907>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174741 91177308-0d34-0410-b5e6-96231b3b80d8
unctionLoweringInfo.cpp
electionDAGBuilder.cpp
|
| 607acd66f400045919b1067432927a53484eaec1 |
06-Feb-2013 |
Evan Cheng <evan.cheng@apple.com> |
Tweak check to avoid integer overflow (for insanely large alignments)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174482 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| b48783b09127136c98cc6b0399be757728504e56 |
05-Feb-2013 |
Owen Anderson <resistor@mac.com> |
Reapply r174343, with a fix for a scary DAG combine bug where it failed to differentiate between the alignment of the
base point of a load, and the overall alignment of the load. This caused infinite loops in DAG combine with the
original application of this patch.
ORIGINAL COMMIT LOG:
When the target-independent DAGCombiner inferred a higher alignment for a load,
it would replace the load with one with the higher alignment. However, it did
not place the new load in the worklist, which prevented later DAG combines in
the same phase (for example, target-specific combines) from ever seeing it.
This patch corrects that oversight, and updates some tests whose output changed
due to slightly different DAGCombine outputs.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174431 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| eb260b252749470654ef0655aa1d1334a4c0d983 |
05-Feb-2013 |
NAKAMURA Takumi <geek4civic@gmail.com> |
Revert r174343, "When the target-independent DAGCombiner inferred a higher alignment for a load,"
It caused hangups in compiling clang/lib/Parse/ParseDecl.cpp and clang/lib/Driver/Tools.cpp in stage2 on some hosts.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174374 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 429f7ef0c116c0504052b9a6655ef4d973177e9d |
05-Feb-2013 |
Owen Anderson <resistor@mac.com> |
When the target-independent DAGCombiner inferred a higher alignment for a load,
it would replace the load with one with the higher alignment. However, it did
not place the new load in the worklist, which prevented later DAG combines in
the same phase (for example, target-specific combines) from ever seeing it.
This patch corrects that oversight, and updates some tests whose output changed
due to slightly different DAGCombine outputs.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174343 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 4969310052f45b1e2e5d21735e38641a20be0e21 |
04-Feb-2013 |
Benjamin Kramer <benny.kra@googlemail.com> |
SelectionDAG: Teach FoldConstantArithmetic how to deal with vectors.
This required disabling a PowerPC optimization that did the following:
input:
x = BUILD_VECTOR <i32 16, i32 16, i32 16, i32 16>
lowered to:
tmp = BUILD_VECTOR <i32 8, i32 8, i32 8, i32 8>
x = ADD tmp, tmp
The add now gets folded immediately and we're back at the BUILD_VECTOR we
started from. I don't see a way to fix this currently so I left it disabled
for now.
Fix some trivially foldable X86 tests too.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174325 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 98b93e5a94f69f6c7b12152a98455f501db1895d |
02-Feb-2013 |
Shuxin Yang <shuxin.llvm@gmail.com> |
rdar://13126763
Fix a bug in DAGCombine. The symptom is mistakenly optimizing expression
"x + x*x" into "x * 3.0".
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174239 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 5882e566a560691bef3eb817f6390ee93242b6a6 |
01-Feb-2013 |
Nadav Rotem <nrotem@apple.com> |
Fix errant fallthrough in the generation of the lifetime markers.
Found by Alexander Kornienko.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174207 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| 2d95e43fd877f81f419485baed3bd559de55e4c4 |
31-Jan-2013 |
Lang Hames <lhames@gmail.com> |
When lowering memcpys to loads and stores, make sure we don't promote alignments
past the natural stack alignment.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174085 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| f662a59b8b031bd43e43e0282b58bef920f0793d |
29-Jan-2013 |
Weiming Zhao <weimingz@codeaurora.org> |
Add a special handling case for untyped CopyFromReg node in GetCostForDef() of ScheduleDAGRRList
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@173833 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGRRList.cpp
|
| 8688a58c53b46d2dda9bf50dafd5195790a7ed58 |
29-Jan-2013 |
Evan Cheng <evan.cheng@apple.com> |
Teach SDISel to combine fsin / fcos into a fsincos node if the following
conditions are met:
1. They share the same operand and are in the same BB.
2. Both outputs are used.
3. The target has a native instruction that maps to ISD::FSINCOS node or
the target provides a sincos library call.
Implemented the generic optimization in sdisel and enabled it for
Mac OSX. Also added an additional optimization for x86_64 Mac OSX by
using an alternative entry point __sincos_stret which returns the two
results in xmm0 / xmm1.
rdar://13087969
PR13204
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@173755 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
electionDAGDumper.cpp
|
| 0fef46f50e116e9aa0811ba8eb605d82ab64faed |
27-Jan-2013 |
Benjamin Kramer <benny.kra@googlemail.com> |
Legalizer: Reword comment again, per Duncan's suggestion.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@173625 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeIntegerTypes.cpp
|
| 022688c260f472b4befcd974a6c907c6830f308e |
27-Jan-2013 |
Benjamin Kramer <benny.kra@googlemail.com> |
Legalizer: Add an assert and tweak a comment to clarify the assumptions this code makes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@173620 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeIntegerTypes.cpp
|
| 914f8c4825140a97219e94b815beb2bc77395d10 |
27-Jan-2013 |
Benjamin Kramer <benny.kra@googlemail.com> |
When the legalizer is splitting vector shifts, the result may not have the right shift amount type.
Fix that by adding a cast to the shift expander. This came up with vector shifts
on sse-less X86 CPUs.
<2 x i64> = shl <2 x i64> <2 x i64>
-> i64,i64 = shl i64 i64; shl i64 i64
-> i32,i32,i32,i32 = shl_parts i32 i32 i64; shl_parts i32 i32 i64
Now we cast the last two i64s to the right type. Fixes the crash in PR14668.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@173615 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeIntegerTypes.cpp
|
| ea387fc3b8cf12c3c6ad218b81eca156e8173bba |
25-Jan-2013 |
Preston Gurd <preston.gurd@intel.com> |
This patch aims to reduce compile time in LegalizeTypes by using SmallDenseMap,
with an initial number of elements, instead of DenseMap, which has
zero initial elements, in order to avoid the copying of elements
when the size changes and to avoid allocating space every time
LegalizeTypes is run. This patch will not affect the memory footprint,
because DenseMap will increase the element size to 64
when the first element is added.
Patch by Wan Xiaofei.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@173448 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeTypes.h
egalizeVectorOps.cpp
|
| 0a29cb045444c13160e90fe7942a9d7c720185ed |
22-Jan-2013 |
Tim Northover <Tim.Northover@arm.com> |
Make APFloat constructor require explicit semantics.
Previously we tried to infer it from the bit width size, with an added
IsIEEE argument for the PPC/IEEE 128-bit case, which had a default
value. This default value allowed bugs to creep in, where it was
inappropriate.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@173138 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
egalizeFloatTypes.cpp
egalizeIntegerTypes.cpp
electionDAG.cpp
electionDAGBuilder.cpp
|
| 059800f9e3fee2852672f846d91a2da14da7783a |
21-Jan-2013 |
Stephen Hines <srhines@google.com> |
Merge remote-tracking branch 'upstream/master' into merge-llvm
Conflicts:
lib/CodeGen/AsmPrinter/AsmPrinter.cpp
lib/CodeGen/AsmPrinter/AsmPrinterInlineAsm.cpp
lib/MC/MCAssembler.cpp
lib/Support/Atomic.cpp
lib/Support/Memory.cpp
lib/Target/ARM/ARMJITInfo.cpp
Change-Id: Ib339baf88df5b04870c8df1bedcfe1f877ccab8d
|
| 0c8607ba6a21578996a7532b9390afba13bd2087 |
20-Jan-2013 |
Nadav Rotem <nrotem@apple.com> |
Revert 172708.
The optimization handles esoteric cases but adds a lot of complexity both to the X86 backend and to other backends.
This optimization disables an important canonicalization of chains of SEXT nodes and makes SEXT and ZEXT asymmetrical.
Disabling the canonicalization of consecutive SEXT nodes into a single node disables other DAG optimizations that assume
that there is only one SEXT node. The AVX mask optimizations is one example. Additionally this optimization does not update the cost model.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@172968 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
electionDAG.cpp
|
| 1b0c54f1c5dd61e56cb7cbc435fcb3319cff628f |
18-Jan-2013 |
Bill Wendling <isanbard@gmail.com> |
Use AttributeSet accessor methods instead of Attribute accessor methods.
Further encapsulation of the Attribute object. Don't allow direct access to the
Attribute object as an aggregate.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@172853 91177308-0d34-0410-b5e6-96231b3b80d8
argetLowering.cpp
|
| 1a17bd21ff64968817dedb6cd2b7c809cee90804 |
18-Jan-2013 |
Bill Wendling <isanbard@gmail.com> |
Remove unused parameter. Also use the AttributeSet query methods instead of the Attribute query methods.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@172852 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| 6c327f92a562d9d280bdbc3bde3c0ce269a4c65c |
17-Jan-2013 |
Elena Demikhovsky <elena.demikhovsky@intel.com> |
Optimization for the following SIGN_EXTEND pairs:
v8i8 -> v8i64,
v8i8 -> v8i32,
v4i8 -> v4i64,
v4i16 -> v4i64
for AVX and AVX2.
Bug 14865.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@172708 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
electionDAG.cpp
|
| 89e88e30bff4a5f4303dc9e44d3faa89b81af5a8 |
14-Jan-2013 |
Bill Schmidt <wschmidt@linux.vnet.ibm.com> |
This patch addresses an incorrect transformation in the DAG combiner.
The included test case is derived from one of the GCC compatibility tests.
The problem arises after the selection DAG has been converted to type-legalized
form. The combiner first sees a 64-bit load that can be converted into a
pre-increment form. The original load feeds into a SRL that isolates the
upper 32 bits of the loaded doubleword. This looks like an opportunity for
DAGCombiner::ReduceLoadWidth() to replace the 64-bit load with a 32-bit load.
However, this transformation is not valid, as the replacement load is not
a pre-increment load. The pre-increment load produces an extra result,
which feeds a subsequent add instruction. The replacement load only has
one result value, and this value is propagated to all uses of the pre-
increment load, including the add. Because the add is looking for the
second result value as its operand, it ends up attempting to add a constant
to a token chain, resulting in a crash.
So the patch simply disables this transformation for any load with more than
two result values.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@172480 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 4dc478308f0de13d9ce20915193ac8c3318c5bd6 |
12-Jan-2013 |
Benjamin Kramer <benny.kra@googlemail.com> |
When lowering an inreg sext first shift left, then right arithmetically.
Shifting right two times will only yield zero. Should fix
SingleSource/UnitTests/SignlessTypes/factor.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@172322 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeVectorOps.cpp
|
| 66de2af815f97e484c1940ff157ffbb809931b20 |
11-Jan-2013 |
Nadav Rotem <nrotem@apple.com> |
PPC: Implement efficient lowering of sign_extend_inreg.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@172269 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeVectorOps.cpp
|
| 8ecd3be1f3687222bfed627219844557024fcec1 |
11-Jan-2013 |
Benjamin Kramer <benny.kra@googlemail.com> |
Remove some accidentaly duplicated code. This needs urgent cleanup :(
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@172248 91177308-0d34-0410-b5e6-96231b3b80d8
argetLowering.cpp
|
| 69e42dbd006c0afb732067ece7327988b1e24c01 |
11-Jan-2013 |
Benjamin Kramer <benny.kra@googlemail.com> |
Split TargetLowering into a CodeGen and a SelectionDAG part.
This fixes some of the cycles between libCodeGen and libSelectionDAG. It's still
a complete mess but as long as the edges consist of virtual call it doesn't
cause breakage. BasicTTI did static calls and thus broke some build
configurations.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@172246 91177308-0d34-0410-b5e6-96231b3b80d8
argetLowering.cpp
|
| fffe3634933471ee9805412ffa221080c9e9e8fd |
11-Jan-2013 |
Eric Christopher <echristo@gmail.com> |
For inline asm:
- recognize string "{memory}" in the MI generation
- mark as mayload/maystore when there's a memory clobber constraint.
PR14859.
Patch by Krzysztof Parzyszek
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@172228 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
argetLowering.cpp
|
| 4ff23d09fa49d4ad68b4613114a743771df21df3 |
10-Jan-2013 |
Evan Cheng <evan.cheng@apple.com> |
PR14896: Handle memcpy from constant string where the memcpy size is larger than the string size.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@172124 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 81bfd711de84310232354dcc971b8ec45206716a |
10-Jan-2013 |
Jakub Staszak <kubastaszak@gmail.com> |
Remove unneeded includes from FunctionLoweringInfo.h.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@172123 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| 86441169da23959c81d8648c3dfdc7a0bb8d2225 |
10-Jan-2013 |
Manman Ren <mren@apple.com> |
Stack Alignment: throw error if we can't satisfy the minimal alignment
requirement when creating stack objects in MachineFrameInfo.
Add CreateStackObjectWithMinAlign to throw error when the minimal alignment
can't be achieved and to clamp the alignment when the preferred alignment
can't be achieved. Same is true for CreateVariableSizedObject.
Will not emit error in CreateSpillStackObject or CreateStackObject.
As long as callers of CreateStackObject do not assume the object will be
aligned at the requested alignment, we should not have miscompile since
later optimizations which look at the object's alignment will have the correct
information.
rdar://12713765
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@172027 91177308-0d34-0410-b5e6-96231b3b80d8
unctionLoweringInfo.cpp
electionDAGBuilder.cpp
|
| 78ec0255d9ab184af7799c14d93879e5f21b9007 |
09-Jan-2013 |
Evan Cheng <evan.cheng@apple.com> |
Fix a DAG combine bug visitBRCOND() is transforming br(xor(x, y)) to br(x != y).
It cahced XOR's operands before calling visitXOR() but failed to update the
operands when visitXOR changed the XOR node.
rdar://12968664
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171999 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 2c8cf4b404e549482f593f62f9e27e0bab4a8b3f |
09-Jan-2013 |
Tim Northover <Tim.Northover@arm.com> |
Refactor to expose RTLIB calls to targets.
fp128 is almost but not quite completely illegal as a type on AArch64. As a
result it needs to have a register class (for argument passing mainly), but all
operations need to be lowered to runtime calls. Currently there's no way for
targets to do this (without duplicating code), as the relevant functions are
hidden in SelectionDAG. This patch changes that.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171971 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
egalizeFloatTypes.cpp
egalizeIntegerTypes.cpp
egalizeTypes.cpp
egalizeTypes.h
argetLowering.cpp
|
| 24d315dc053e8130593a8053bd6dc0245632f5f3 |
08-Jan-2013 |
Tim Northover <Tim.Northover@arm.com> |
Add fp128 rtlib function names to LLVM
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171867 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
argetLowering.cpp
|
| 40b2c32475572d33ede7cf202f2d49cab9b43bb4 |
08-Jan-2013 |
Chandler Carruth <chandlerc@gmail.com> |
Sink a function that refers to the SelectionDAG into that library in the
one file where it is called as a static function. Nuke the declaration
and the definition in lib/CodeGen, along with the include of
SelectionDAG.h from this file.
There is no dependency edge from lib/CodeGen to
lib/CodeGen/SelectionDAG, so it isn't valid for a routine in lib/CodeGen
to reference the DAG. There is a dependency from
lib/CodeGen/SelectionDAG on lib/CodeGen. This breaks one violation of
this layering.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171842 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 56d433dffe02e14cafaab44d2628e20dc0bf26fe |
07-Jan-2013 |
Chandler Carruth <chandlerc@gmail.com> |
Sink AddrMode back into TargetLowering, removing one of the most
peculiar headers under include/llvm.
This struct still doesn't make a lot of sense, but it makes more sense
down in TargetLowering than it did before.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171739 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| be04929f7fd76a921540e9901f24563e51dc1219 |
07-Jan-2013 |
Chandler Carruth <chandlerc@gmail.com> |
Move TargetTransformInfo to live under the Analysis library. This no
longer would violate any dependency layering and it is in fact an
analysis. =]
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171686 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
electionDAGISel.cpp
|
| aeef83c6afa1e18d1cf9d359cc678ca0ad556175 |
07-Jan-2013 |
Chandler Carruth <chandlerc@gmail.com> |
Switch TargetTransformInfo from an immutable analysis pass that requires
a TargetMachine to construct (and thus isn't always available), to an
analysis group that supports layered implementations much like
AliasAnalysis does. This is a pretty massive change, with a few parts
that I was unable to easily separate (sorry), so I'll walk through it.
The first step of this conversion was to make TargetTransformInfo an
analysis group, and to sink the nonce implementations in
ScalarTargetTransformInfo and VectorTargetTranformInfo into
a NoTargetTransformInfo pass. This allows other passes to add a hard
requirement on TTI, and assume they will always get at least on
implementation.
The TargetTransformInfo analysis group leverages the delegation chaining
trick that AliasAnalysis uses, where the base class for the analysis
group delegates to the previous analysis *pass*, allowing all but tho
NoFoo analysis passes to only implement the parts of the interfaces they
support. It also introduces a new trick where each pass in the group
retains a pointer to the top-most pass that has been initialized. This
allows passes to implement one API in terms of another API and benefit
when some other pass above them in the stack has more precise results
for the second API.
The second step of this conversion is to create a pass that implements
the TargetTransformInfo analysis using the target-independent
abstractions in the code generator. This replaces the
ScalarTargetTransformImpl and VectorTargetTransformImpl classes in
lib/Target with a single pass in lib/CodeGen called
BasicTargetTransformInfo. This class actually provides most of the TTI
functionality, basing it upon the TargetLowering abstraction and other
information in the target independent code generator.
The third step of the conversion adds support to all TargetMachines to
register custom analysis passes. This allows building those passes with
access to TargetLowering or other target-specific classes, and it also
allows each target to customize the set of analysis passes desired in
the pass manager. The baseline LLVMTargetMachine implements this
interface to add the BasicTTI pass to the pass manager, and all of the
tools that want to support target-aware TTI passes call this routine on
whatever target machine they end up with to add the appropriate passes.
The fourth step of the conversion created target-specific TTI analysis
passes for the X86 and ARM backends. These passes contain the custom
logic that was previously in their extensions of the
ScalarTargetTransformInfo and VectorTargetTransformInfo interfaces.
I separated them into their own file, as now all of the interface bits
are private and they just expose a function to create the pass itself.
Then I extended these target machines to set up a custom set of analysis
passes, first adding BasicTTI as a fallback, and then adding their
customized TTI implementations.
The fourth step required logic that was shared between the target
independent layer and the specific targets to move to a different
interface, as they no longer derive from each other. As a consequence,
a helper functions were added to TargetLowering representing the common
logic needed both in the target implementation and the codegen
implementation of the TTI pass. While technically this is the only
change that could have been committed separately, it would have been
a nightmare to extract.
The final step of the conversion was just to delete all the old
boilerplate. This got rid of the ScalarTargetTransformInfo and
VectorTargetTransformInfo classes, all of the support in all of the
targets for producing instances of them, and all of the support in the
tools for manually constructing a pass based around them.
Now that TTI is a relatively normal analysis group, two things become
straightforward. First, we can sink it into lib/Analysis which is a more
natural layer for it to live. Second, clients of this interface can
depend on it *always* being available which will simplify their code and
behavior. These (and other) simplifications will follow in subsequent
commits, this one is clearly big enough.
Finally, I'm very aware that much of the comments and documentation
needs to be updated. As soon as I had this working, and plausibly well
commented, I wanted to get it committed and in front of the build bots.
I'll be doing a few passes over documentation later if it sticks.
Commits to update DragonEgg and Clang will be made presently.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171681 91177308-0d34-0410-b5e6-96231b3b80d8
argetLowering.cpp
|
| e4b4edd72ae596ac8d1fdbc6e77f61e331f6775d |
05-Jan-2013 |
Chandler Carruth <chandlerc@gmail.com> |
Funnel the actual TargetTransformInfo pass from the SelectionDAGISel
pass into the SelectionDAG itself rather than snooping on the
implementation of that pass as exposed by the TargetMachine. This
removes the last direct client of the ScalarTargetTransformInfo class
outside of the TTI pass implementation.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171625 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
electionDAGISel.cpp
|
| d40758b24ebab5777131533d9369e707fc852594 |
02-Jan-2013 |
Tom Stellard <thomas.stellard@amd.com> |
DAGCombiner: Avoid generating illegal vector INT_TO_FP nodes
DAGCombiner::reduceBuildVecConvertToConvertBuildVec() was making two
mistakes:
1. It was checking the legality of scalar INT_TO_FP nodes and then generating
vector nodes.
2. It was passing the result value type to
TargetLoweringInfo::getOperationAction() when it should have been
passing the value type of the first operand.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171420 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 0b8c9a80f20772c3793201ab5b251d3520b9cea3 |
02-Jan-2013 |
Chandler Carruth <chandlerc@gmail.com> |
Move all of the header files which are involved in modelling the LLVM IR
into their new header subdirectory: include/llvm/IR. This matches the
directory structure of lib, and begins to correct a long standing point
of file layout clutter in LLVM.
There are still more header files to move here, but I wanted to handle
them in separate commits to make tracking what files make sense at each
layer easier.
The only really questionable files here are the target intrinsic
tablegen files. But that's a battle I'd rather not fight today.
I've updated both CMake and Makefile build systems (I think, and my
tests think, but I may have missed something).
I've also re-sorted the includes throughout the project. I'll be
committing updates to Clang, DragonEgg, and Polly momentarily.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171366 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
astISel.cpp
unctionLoweringInfo.cpp
nstrEmitter.cpp
egalizeDAG.cpp
egalizeIntegerTypes.cpp
egalizeTypes.cpp
egalizeTypesGeneric.cpp
egalizeVectorTypes.cpp
cheduleDAGFast.cpp
cheduleDAGRRList.cpp
cheduleDAGVLIW.cpp
electionDAG.cpp
electionDAGBuilder.cpp
electionDAGBuilder.h
electionDAGDumper.cpp
electionDAGISel.cpp
electionDAGPrinter.cpp
argetLowering.cpp
|
| 58a2cbef4aac9ee7d530dfb690c78d6fc11a2371 |
02-Jan-2013 |
Chandler Carruth <chandlerc@gmail.com> |
Resort the #include lines in include/... and lib/... with the
utils/sort_includes.py script.
Most of these are updating the new R600 target and fixing up a few
regressions that have creeped in since the last time I sorted the
includes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171362 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 6eb7a4270bc411342f459bc574f8fe4ef5eeff28 |
30-Dec-2012 |
Hal Finkel <hfinkel@anl.gov> |
Support ppcf128 in SelectionDAG::getConstantFP
Fixes pr14751.
Patch by Kai; Thanks!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171261 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 8b62abdd7b9c8fc5d78dad86093f4afdfeba949d |
30-Dec-2012 |
Bill Wendling <isanbard@gmail.com> |
Remove the Function::getRetAttributes method in favor of using the AttributeSet accessor method.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171256 91177308-0d34-0410-b5e6-96231b3b80d8
unctionLoweringInfo.cpp
electionDAGBuilder.cpp
argetLowering.cpp
|
| 39cd0c8e477255a7296b2bd1dc67193f8d38c003 |
30-Dec-2012 |
Bill Wendling <isanbard@gmail.com> |
Remove Function::getParamAttributes and use the AttributeSet accessor methods instead.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171255 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| 831737d329a727f53a1fb0572f7b7a8127208881 |
30-Dec-2012 |
Bill Wendling <isanbard@gmail.com> |
Remove the Function::getFnAttributes method in favor of using the AttributeSet
directly.
This is in preparation for removing the use of the 'Attribute' class as a
collection of attributes. That will shift to the AttributeSet class instead.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171253 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
electionDAG.cpp
electionDAGBuilder.cpp
|
| 444b4bf5c84c80833ff283244de0885124091a13 |
27-Dec-2012 |
Nadav Rotem <nrotem@apple.com> |
Refactor DAGCombinerInfo. Change the different booleans that indicate if we are before or after different runs of DAGCo, with the CombineLevel enum.
Also, added a new API for checking if we are running before or after the LegalizeVectorOps phase.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171142 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
egalizeIntegerTypes.cpp
|
| 5d3cfa6d1f6d3069893d50af39511cbf5576be91 |
20-Dec-2012 |
Jakob Stoklund Olesen <stoklund@2pi.dk> |
Use MachineInstrBuilder for PHI nodes in SelectionDAGISel.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170716 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 7f6ece8a93021fb42a5f2e42507c9b2681e32f32 |
20-Dec-2012 |
Jakob Stoklund Olesen <stoklund@2pi.dk> |
Use MachineInstrBuilder in InstrEmitter.
This is supposed to be a mechanical change with no functional effects.
InstrEmitter can generate all types of MachineOperands which revealed
that MachineInstrBuilder was missing a few methods, added by this patch.
Besides providing a context pointer to MI::addOperand(),
MachineInstrBuilder seems like a better fit for this code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170712 91177308-0d34-0410-b5e6-96231b3b80d8
nstrEmitter.cpp
nstrEmitter.h
|
| 99d8e76d44bcf72aef1a90df545c302172006768 |
20-Dec-2012 |
Bob Wilson <bob.wilson@apple.com> |
Do not introduce vector operations in functions marked with noimplicitfloat.
<rdar://problem/12879313>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170630 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| c698d3a2a40f0909d16cbe857685f0f22cb9ae43 |
19-Dec-2012 |
Patrik Hagglund <patrik.h.hagglund@ericsson.com> |
Change AsmOperandInfo::ConstraintVT to MVT, instead of EVT.
Accordingly, add MVT::getVT.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170550 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
argetLowering.cpp
|
| b9e12e519e01078663941ddfbecccf1432c1120c |
19-Dec-2012 |
Patrik Hagglund <patrik.h.hagglund@ericsson.com> |
Split the usage of 'EVT PartVT' into 'MVT PartVT' and 'EVT PartEVT'.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170540 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| 8963fecc86def73634dabf7545322287aa6ae9f8 |
19-Dec-2012 |
Patrik Hagglund <patrik.h.hagglund@ericsson.com> |
Change RegVT in BitTestBlock and RegsForValue, to contain MVTs,
instead of EVTs.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170538 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
electionDAGBuilder.h
|
| e5c65911a659e49320d214bf0702793ad37b5ed5 |
19-Dec-2012 |
Patrik Hagglund <patrik.h.hagglund@ericsson.com> |
Change TargetLowering::getTypeForExtArgOrReturn to take and return
MVTs, instead of EVTs.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170537 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| ee211d2b8da98a549f7c68401aba866fa2a0eee2 |
19-Dec-2012 |
Patrik Hagglund <patrik.h.hagglund@ericsson.com> |
Change a parameter of TargetLowering::getVectorTypeBreakdown to MVT,
from EVT.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170536 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
argetLowering.cpp
|
| dfcf33a287d1756721f1f735af687595ce2f5a21 |
19-Dec-2012 |
Patrik Hagglund <patrik.h.hagglund@ericsson.com> |
Change TargetLowering::RegisterTypeForVT to contain MVTs, instead of
EVTs.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170535 91177308-0d34-0410-b5e6-96231b3b80d8
unctionLoweringInfo.cpp
egalizeDAG.cpp
egalizeIntegerTypes.cpp
electionDAGBuilder.cpp
argetLowering.cpp
|
| ff01277841b824128c74cdb66f74d8082d75e3f6 |
19-Dec-2012 |
Patrik Hagglund <patrik.h.hagglund@ericsson.com> |
Change TargetLowering::TransformToType to contain MVTs, instead of
EVTs.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170534 91177308-0d34-0410-b5e6-96231b3b80d8
argetLowering.cpp
|
| 0340557fb830e3669c4c48a2cd99d7703bdda452 |
19-Dec-2012 |
Patrik Hagglund <patrik.h.hagglund@ericsson.com> |
Change TargetLowering::findRepresentativeClass to take an MVT, instead
of EVT.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170532 91177308-0d34-0410-b5e6-96231b3b80d8
argetLowering.cpp
|
| 319bb399233d3ee67233aa29235c8ad2148fb77d |
19-Dec-2012 |
Patrik Hagglund <patrik.h.hagglund@ericsson.com> |
Change TargetLowering::getTypeToPromoteTo to take and return MVTs,
instead of EVTs.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170529 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
egalizeVectorOps.cpp
|
| fdbeb057b8a844b641f323fd27a61ffcb32b43da |
19-Dec-2012 |
Patrik Hagglund <patrik.h.hagglund@ericsson.com> |
Change TargetLowering::isCondCodeLegal to take an MVT, instead of EVT.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170524 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
argetLowering.cpp
|
| 9c5ab9355e00686e120e12952908ea8ad981d776 |
19-Dec-2012 |
Patrik Hagglund <patrik.h.hagglund@ericsson.com> |
Change TargetLowering::getCondCodeAction to take an MVT, instead of
EVT.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170522 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
argetLowering.cpp
|
| 88ef514cc63c3f22f78eaf4dd295d349b4070819 |
19-Dec-2012 |
Patrik Hagglund <patrik.h.hagglund@ericsson.com> |
Change TargetLowering::getTruncStoreAction to take MVTs, instead of EVTs.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170510 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
egalizeVectorOps.cpp
|
| 4b977312c7a9c078211de83771b40a1561deb047 |
19-Dec-2012 |
Elena Demikhovsky <elena.demikhovsky@intel.com> |
Optimized load + SIGN_EXTEND patterns in the X86 backend.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170506 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| bf5a2c6a39f2a98a83f5fb668b8b35156b693471 |
19-Dec-2012 |
Nadav Rotem <nrotem@apple.com> |
After reducing the size of an operation in the DAG we zero-extend the reduced
bitwidth op back to the original size. If we reduce ANDs then this can cause
an endless loop. This patch changes the ZEXT to ANY_EXTEND if the demanded bits
are equal or smaller than the size of the reduced operation.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170505 91177308-0d34-0410-b5e6-96231b3b80d8
argetLowering.cpp
|
| 034b94b17006f51722886b0f2283fb6fb19aca1f |
19-Dec-2012 |
Bill Wendling <isanbard@gmail.com> |
Rename the 'Attributes' class to 'Attribute'. It's going to represent a single attribute in the future.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170502 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
electionDAGBuilder.cpp
argetLowering.cpp
|
| 85022561f9c78446bbc5f745cd9b58f4e5dc92ec |
19-Dec-2012 |
Craig Topper <craig.topper@gmail.com> |
Remove more of 'else's after 'returns'. No functional change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170497 91177308-0d34-0410-b5e6-96231b3b80d8
argetLowering.cpp
|
| a1b3c03777f33665d6a70607610ee80e47a40c63 |
19-Dec-2012 |
Craig Topper <craig.topper@gmail.com> |
Remove a bunch of 'else's after 'returns'
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170496 91177308-0d34-0410-b5e6-96231b3b80d8
argetLowering.cpp
|
| 40b4a81ab007c11c2d4227b4f6a949720ba2adff |
19-Dec-2012 |
Craig Topper <craig.topper@gmail.com> |
Teach SimplifySetCC that comparing AssertZext i1 against a constant 1 can be rewritten as a compare against a constant 0 with the opposite condition.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170495 91177308-0d34-0410-b5e6-96231b3b80d8
argetLowering.cpp
|
| ca2dd36c395f5ead63572d45a2106b9d34d8ca90 |
18-Dec-2012 |
Hal Finkel <hfinkel@anl.gov> |
Check multiple register classes for inline asm tied registers
A register can be associated with several distinct register classes.
For example, on PPC, the floating point registers are each associated with
both F4RC (which holds f32) and F8RC (which holds f64). As a result, this code
would fail when provided with a floating point register and an f64 operand
because it would happen to find the register in the F4RC class first and
return that. From the F4RC class, SDAG would extract f32 as the register
type and then assert because of the invalid implied conversion between
the f64 value and the f32 register.
Instead, search all register classes. If a register class containing the
the requested register has the requested type, then return that register
class. Otherwise, as before, return the first register class found that
contains the requested register.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170436 91177308-0d34-0410-b5e6-96231b3b80d8
argetLowering.cpp
|
| 3d170e64ca1af491e2aa58f882f93b8e8111eef8 |
17-Dec-2012 |
Patrik Hagglund <patrik.h.hagglund@ericsson.com> |
Revert/correct some FastISel changes in r170104 (EVT->MVT for
TargetLowering::getRegClassFor).
Some isSimple() guards were missing, or getSimpleVT() were hoisted too
far, resulting in asserts on valid LLVM assembly input.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170336 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
|
| 702474dbb2d4fbaf7b93bcccd71b7b80a8ec2817 |
14-Dec-2012 |
Patrik Hagglund <patrik.h.hagglund@ericsson.com> |
Change TargetLowering::getLoadExtAction to take an MVT, instead of
EVT.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170183 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 009e1e21d4e4d26d4aeaeeb5063c0b4470572ef7 |
13-Dec-2012 |
Patrik Hagglund <patrik.h.hagglund@ericsson.com> |
Change TargetLowering::setTypeAction to take an MVT, instead fo EVT.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170148 91177308-0d34-0410-b5e6-96231b3b80d8
argetLowering.cpp
|
| 860e7cdab9d5eceda5ac52ae0ddfb4bdab0067f2 |
13-Dec-2012 |
Patrik Hagglund <patrik.h.hagglund@ericsson.com> |
Change TargetLowering::getRepRegClassFor to take an MVT, instead of
EVT.
Accordingly, change RegDefIter to contain MVTs instead of EVTs.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170140 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGRRList.cpp
cheduleDAGSDNodes.cpp
cheduleDAGSDNodes.h
|
| a61b17c18a67f1b3faef2f2108379c4337ce9bb7 |
13-Dec-2012 |
Patrik Hagglund <patrik.h.hagglund@ericsson.com> |
Change TargetLowering::getRegClassFor to take an MVT, instead of EVT.
Accordingly, add helper funtions getSimpleValueType (in parallel to
getValueType) in SDValue, SDNode, and TargetLowering.
This is the first, in a series of patches.
This is the second attempt. In the first attempt (r169837), a few
getSimpleVT() were hoisted too far, detected by bootstrap failures.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170104 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
unctionLoweringInfo.cpp
nstrEmitter.cpp
nstrEmitter.h
esourcePriorityQueue.cpp
electionDAGBuilder.cpp
|
| 9a65a01eeb97cdc10ca6b97ade3f9f8aba11fa9f |
13-Dec-2012 |
Evan Cheng <evan.cheng@apple.com> |
Fix a bug in DAGCombiner::MatchBSwapHWord. Make sure the node has operands before referencing them. rdar://12868039
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170078 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| a16e49d56f6349c12da2b561da00c22e13eda09b |
12-Dec-2012 |
Evan Cheng <evan.cheng@apple.com> |
Fix a logic bug in inline expansion of memcpy / memset with an overlapping
load / store pair. It's not legal to use a wider load than the size of
the remaining bytes if it's the first pair of load / store.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170018 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 946a3a9f22c967d5432eaab5fa464b91343477cd |
12-Dec-2012 |
Evan Cheng <evan.cheng@apple.com> |
Sorry about the churn. One more change to getOptimalMemOpType() hook. Did I
mention the inline memcpy / memset expansion code is a mess?
This patch split the ZeroOrLdSrc argument into two: IsMemset and ZeroMemset.
The first indicates whether it is expanding a memset or a memcpy / memmove.
The later is whether the memset is a memset of zero. It's totally possible
(likely even) that targets may want to do different things for memcpy and
memset of zero.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169959 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 7d34267df63e23be1957f738de783c145febb7af |
12-Dec-2012 |
Evan Cheng <evan.cheng@apple.com> |
- Rename isLegalMemOpType to isSafeMemOpType. "Legal" is a very overloade term.
Also added more comments to explain why it is generally ok to return true.
- Rename getOptimalMemOpType argument IsZeroVal to ZeroOrLdSrc. It's meant to
be true for loaded source (memcpy) or zero constants (memset). The poor name
choice is probably some kind of legacy issue.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169954 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 981b96376a99dacced70cc9b1e870968f426331a |
12-Dec-2012 |
Manman Ren <mren@apple.com> |
DAGCombine: clamp hi bit in APInt::getBitsSet to avoid assertion
rdar://12838504
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169951 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 61f4dfe3693bf68b20748d82ac4dd9bf2f356699 |
12-Dec-2012 |
Evan Cheng <evan.cheng@apple.com> |
Avoid using lossy load / stores for memcpy / memset expansion. e.g.
f64 load / store on non-SSE2 x86 targets.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169944 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| e07f85eb76a0254d3adbdf8b5d61ff5c07858cef |
12-Dec-2012 |
Evan Cheng <evan.cheng@apple.com> |
Replace TargetLowering::isIntImmLegal() with
ScalarTargetTransformInfo::getIntImmCost() instead. "Legal" is a poorly defined
term for something like integer immediate materialization. It is always possible
to materialize an integer immediate. Whether to use it for memcpy expansion is
more a "cost" conceern.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169929 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 34525f9ac098c1c6bc9002886d6da3039a284fd2 |
11-Dec-2012 |
Patrik Hagglund <patrik.h.hagglund@ericsson.com> |
Revert EVT->MVT changes, r169836-169851, due to buildbot failures.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169854 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
astISel.cpp
unctionLoweringInfo.cpp
nstrEmitter.cpp
nstrEmitter.h
egalizeDAG.cpp
egalizeIntegerTypes.cpp
egalizeVectorOps.cpp
esourcePriorityQueue.cpp
cheduleDAGRRList.cpp
cheduleDAGSDNodes.cpp
cheduleDAGSDNodes.h
electionDAGBuilder.cpp
electionDAGBuilder.h
argetLowering.cpp
|
| 05749cff9b045505f08313b4c2d1bd9a4fb84970 |
11-Dec-2012 |
Patrik Hagglund <patrik.h.hagglund@ericsson.com> |
Change RegVT in BitTestBlock and RegsForValue, to contain MVTs,
instead of EVTs.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169851 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
electionDAGBuilder.h
|
| 47fd10f2fc45d280308b77ed4eda16f3c9c88248 |
11-Dec-2012 |
Patrik Hagglund <patrik.h.hagglund@ericsson.com> |
Change TargetLowering::getTypeForExtArgOrReturn to take and return
MVTs, instead of EVTs.
Accordingly, add bitsLT (and similar) to MVT.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169850 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| 1d367e9bccf1f374a92c4337251ea541118fdcc9 |
11-Dec-2012 |
Patrik Hagglund <patrik.h.hagglund@ericsson.com> |
Change a parameter of TargetLowering::getVectorTypeBreakdown to MVT,
from EVT.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169849 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
argetLowering.cpp
|
| 2d916231ff503b995bf3b65a338c9bf0d84ee7c7 |
11-Dec-2012 |
Patrik Hagglund <patrik.h.hagglund@ericsson.com> |
Change TargetLowering::RegisterTypeForVT to contain MVTs, instead of
EVTs.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169848 91177308-0d34-0410-b5e6-96231b3b80d8
unctionLoweringInfo.cpp
egalizeDAG.cpp
egalizeIntegerTypes.cpp
electionDAGBuilder.cpp
argetLowering.cpp
|
| 235c75cc2190c40f5785059ec1767e44da5c5401 |
11-Dec-2012 |
Patrik Hagglund <patrik.h.hagglund@ericsson.com> |
Change TargetLowering::TransformToType to contain MVTs, instead of
EVTs.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169847 91177308-0d34-0410-b5e6-96231b3b80d8
argetLowering.cpp
|
| bade0345d190427a08b2b947bc94f4d8ca5d7717 |
11-Dec-2012 |
Patrik Hagglund <patrik.h.hagglund@ericsson.com> |
Change TargetLowering::findRepresentativeClass to take an MVT, instead
of EVT.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169845 91177308-0d34-0410-b5e6-96231b3b80d8
argetLowering.cpp
|
| bb2543bb0e38495cd655be3eadcb9dd008ac56d2 |
11-Dec-2012 |
Patrik Hagglund <patrik.h.hagglund@ericsson.com> |
Change TargetLowering::getTypeToPromoteTo to take and return MVTs,
instead of EVTs.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169844 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
egalizeVectorOps.cpp
|
| 204301f0459c1deb6c535723760c848ba2fcd42b |
11-Dec-2012 |
Patrik Hagglund <patrik.h.hagglund@ericsson.com> |
Change TargetLowering::isCondCodeLegal to take an MVT, instead of EVT.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169843 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
argetLowering.cpp
|
| aff674331ebb54e74baa88532ee587d741a430a2 |
11-Dec-2012 |
Patrik Hagglund <patrik.h.hagglund@ericsson.com> |
Change TargetLowering::getCondCodeAction to take an MVT, instead of
EVT.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169842 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
argetLowering.cpp
|
| 3166283ac169e86e9718bee69850b94c1bc27727 |
11-Dec-2012 |
Patrik Hagglund <patrik.h.hagglund@ericsson.com> |
Change TargetLowering::getTruncStoreAction to take MVTs, instead of EVTs.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169841 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
egalizeVectorOps.cpp
|
| ffa03b7981e322d6c9ba8b9cc18cae282ce3b587 |
11-Dec-2012 |
Patrik Hagglund <patrik.h.hagglund@ericsson.com> |
Change TargetLowering::getLoadExtAction to take an MVT, instead of EVT.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169840 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 968947766b17bc1a6f27e556f9f340de2504e92d |
11-Dec-2012 |
Patrik Hagglund <patrik.h.hagglund@ericsson.com> |
Change TargetLowering::setTypeAction to take an MVT, instead fo EVT.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169839 91177308-0d34-0410-b5e6-96231b3b80d8
argetLowering.cpp
|
| aa7744d75fc1769ccc12c65c07bb5b82afa58330 |
11-Dec-2012 |
Patrik Hagglund <patrik.h.hagglund@ericsson.com> |
Change TargetLowering::getRepRegClassFor to take an MVT, instead of
EVT.
Accordingly, change RegDefIter to contain MVTs instead of EVTs.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169838 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGRRList.cpp
cheduleDAGSDNodes.cpp
cheduleDAGSDNodes.h
|
| 8163ca76f0b0d336c5436364ffb3b85be1162e7a |
11-Dec-2012 |
Patrik Hagglund <patrik.h.hagglund@ericsson.com> |
Change TargetLowering::getRegClassFor to take an MVT, instead of EVT.
Accordingly, add helper funtions getSimpleValueType (in parallel to
getValueType) in SDValue, SDNode, and TargetLowering.
This is the first, in a series of patches.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169837 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
unctionLoweringInfo.cpp
nstrEmitter.cpp
nstrEmitter.h
esourcePriorityQueue.cpp
electionDAGBuilder.cpp
|
| 1c49fda408ae5ba90fdaf1b274edd1119aea58b7 |
11-Dec-2012 |
Chandler Carruth <chandlerc@gmail.com> |
Fix a miscompile in the DAG combiner. Previously, we would incorrectly
try to reduce the width of this load, and would end up transforming:
(truncate (lshr (sextload i48 <ptr> as i64), 32) to i32)
to
(truncate (zextload i32 <ptr+4> as i64) to i32)
We lost the sext attached to the load while building the narrower i32
load, and replaced it with a zext because lshr always zext's the
results. Instead, bail out of this combine when there is a conflict
between a sextload and a zext narrowing. The rest of the DAG combiner
still optimize the code down to the proper single instruction:
movswl 6(...),%eax
Which is exactly what we wanted. Previously we read past the end *and*
missed the sign extension:
movl 6(...), %eax
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169802 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 425e951734c3a0615e22ec94ffa51cc16ce6e483 |
11-Dec-2012 |
Chad Rosier <mcrosier@apple.com> |
Fall back to the selection dag isel to select tail calls.
This shouldn't affect codegen for -O0 compiles as tail call markers are not
emitted in unoptimized compiles. Testing with the external/internal nightly
test suite reveals no change in compile time performance. Testing with -O1,
-O2 and -O3 with fast-isel enabled did not cause any compile-time or
execution-time failures. All tests were performed on my x86 machine.
I'll monitor our arm testers to ensure no regressions occur there.
In an upcoming clang patch I will be marking the objc_autoreleaseReturnValue
and objc_retainAutoreleaseReturnValue as tail calls unconditionally. While
it's theoretically true that this is just an optimization, it's an
optimization that we very much want to happen even at -O0, or else ARC
applications become substantially harder to debug.
Part of rdar://12553082
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169796 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
electionDAGISel.cpp
|
| 376642ed620ecae05b68c7bc81f79aeb2065abe0 |
11-Dec-2012 |
Evan Cheng <evan.cheng@apple.com> |
Some enhancements for memcpy / memset inline expansion.
1. Teach it to use overlapping unaligned load / store to copy / set the trailing
bytes. e.g. On 86, use two pairs of movups / movaps for 17 - 31 byte copies.
2. Use f64 for memcpy / memset on targets where i64 is not legal but f64 is. e.g.
x86 and ARM.
3. When memcpy from a constant string, do *not* replace the load with a constant
if it's not possible to materialize an integer immediate with a single
instruction (required a new target hook: TLI.isIntImmLegal()).
4. Use unaligned load / stores more aggressively if target hooks indicates they
are "fast".
5. Update ARM target hooks to use unaligned load / stores. e.g. vld1.8 / vst1.8.
Also increase the threshold to something reasonable (8 for memset, 4 pairs
for memcpy).
This significantly improves Dhrystone, up to 50% on ARM iOS devices.
rdar://12760078
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169791 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 9171fb9cfb25b2e2db64131c15b497de459f69fc |
10-Dec-2012 |
Eric Christopher <echristo@gmail.com> |
Fix a coding style nit.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169776 91177308-0d34-0410-b5e6-96231b3b80d8
argetLowering.cpp
|
| f45d11b56bffeaec94291f330dc9f7f7aae5a741 |
10-Dec-2012 |
Tom Stellard <thomas.stellard@amd.com> |
LegalizeDAG: Allow type promotion of scalar loads
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169773 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 8b7f16e9719a64973e3b4d35e122222c26839c44 |
10-Dec-2012 |
Tom Stellard <thomas.stellard@amd.com> |
LegalizeDAG: Allow type promotion for scalar stores
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169772 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 48b509c77318cc6e753513ca5dcdd67e18094235 |
10-Dec-2012 |
Craig Topper <craig.topper@gmail.com> |
Teach DAG combine to handle vector add/sub with vectors of all 0s.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169727 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 5a0f372feb994a07ce40687c5ecff2e2c792bf24 |
09-Dec-2012 |
Craig Topper <craig.topper@gmail.com> |
Remove extra blank line.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169692 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 9472b4fbf96fb840eb416acd00bbee173c62e8da |
08-Dec-2012 |
Craig Topper <craig.topper@gmail.com> |
Teach DAG combine to handle vector logical operations with vectors of all 1s or all 0s. These cases can show up when vectors are split for legalizing. Fix some tests that were dependent on these cases not being combined.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169684 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 2766a47310b05228e9bbc536d9f3a593fc31cd12 |
06-Dec-2012 |
Evan Cheng <evan.cheng@apple.com> |
Replace r169459 with something safer. Rather than having computeMaskedBits to
understand target implementation of any_extend / extload, just generate
zero_extend in place of any_extend for liveouts when the target knows the
zero_extend will be implicit (e.g. ARM ldrb / ldrh) or folded (e.g. x86 movz).
rdar://12771555
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169536 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
electionDAGBuilder.cpp
argetLowering.cpp
|
| dde785cd70a4a7418f310a0d86afcbfe3dd8dbfe |
06-Dec-2012 |
Nadav Rotem <nrotem@apple.com> |
Fix a bug in the code that merges consecutive stores. Previously we did not
check if loads that happen in between stores alias with the first store in the
chain, only with the second store onwards.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169516 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 8a7186dbc2df4879f511b2ae6f2bce25ad37d965 |
06-Dec-2012 |
Evan Cheng <evan.cheng@apple.com> |
Let targets provide hooks that compute known zero and ones for any_extend
and extload's. If they are implemented as zero-extend, or implicitly
zero-extend, then this can enable more demanded bits optimizations. e.g.
define void @foo(i16* %ptr, i32 %a) nounwind {
entry:
%tmp1 = icmp ult i32 %a, 100
br i1 %tmp1, label %bb1, label %bb2
bb1:
%tmp2 = load i16* %ptr, align 2
br label %bb2
bb2:
%tmp3 = phi i16 [ 0, %entry ], [ %tmp2, %bb1 ]
%cmp = icmp ult i16 %tmp3, 24
br i1 %cmp, label %bb3, label %exit
bb3:
call void @bar() nounwind
br label %exit
exit:
ret void
}
This compiles to the followings before:
push {lr}
mov r2, #0
cmp r1, #99
bhi LBB0_2
@ BB#1: @ %bb1
ldrh r2, [r0]
LBB0_2: @ %bb2
uxth r0, r2
cmp r0, #23
bhi LBB0_4
@ BB#3: @ %bb3
bl _bar
LBB0_4: @ %exit
pop {lr}
bx lr
The uxth is not needed since ldrh implicitly zero-extend the high bits. With
this change it's eliminated.
rdar://12771555
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169459 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
argetLowering.cpp
|
| a1514e24cc24b050f53a12650e047799358833a1 |
04-Dec-2012 |
Chandler Carruth <chandlerc@gmail.com> |
Sort includes for all of the .h files under the 'lib' tree. These were
missed in the first pass because the script didn't yet handle include
guards.
Note that the script is now able to handle all of these headers without
manual edits. =]
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169224 91177308-0d34-0410-b5e6-96231b3b80d8
nstrEmitter.h
egalizeTypes.h
DNodeDbgValue.h
electionDAGBuilder.h
|
| f94e8c4cafc6a2ce7ff5c0c46084d3c38c2921f6 |
04-Dec-2012 |
Jakub Staszak <kubastaszak@gmail.com> |
Simplify code. No functionality change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169198 91177308-0d34-0410-b5e6-96231b3b80d8
esourcePriorityQueue.cpp
|
| 46608c0f648af75dd7260c3d881ca17353bb5982 |
04-Dec-2012 |
Jakub Staszak <kubastaszak@gmail.com> |
Use dyn_cast instead of isa and cast. No functionality change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169196 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| d04a8d4b33ff316ca4cf961e06c9e312eff8e64f |
03-Dec-2012 |
Chandler Carruth <chandlerc@gmail.com> |
Use the new script to sort the includes of every file under lib.
Sooooo many of these had incorrect or strange main module includes.
I have manually inspected all of these, and fixed the main module
include to be the nearest plausible thing I could find. If you own or
care about any of these source files, I encourage you to take some time
and check that these edits were sensible. I can't have broken anything
(I strictly added headers, and reordered them, never removed), but they
may not be the headers you'd really like to identify as containing the
API being implemented.
Many forward declarations and missing includes were added to a header
files to allow them to parse cleanly when included first. The main
module rule does in fact have its merits. =]
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169131 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
astISel.cpp
unctionLoweringInfo.cpp
nstrEmitter.cpp
egalizeDAG.cpp
egalizeTypes.cpp
esourcePriorityQueue.cpp
cheduleDAGFast.cpp
cheduleDAGRRList.cpp
cheduleDAGSDNodes.cpp
cheduleDAGVLIW.cpp
electionDAG.cpp
electionDAGBuilder.cpp
electionDAGDumper.cpp
electionDAGISel.cpp
electionDAGPrinter.cpp
argetLowering.cpp
|
| a569a80e58fd89f08600b002f2e46b60ed2ba554 |
02-Dec-2012 |
Nadav Rotem <nrotem@apple.com> |
Allow merging multiple store sequences on the same chain.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169111 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| db62a883a78cef4ff63a699452368fefa4b3fefd |
29-Nov-2012 |
Justin Holewinski <jholewinski@nvidia.com> |
Cleanup recent addition of DAGTypeLegalizer::SplitVecOp_VSELECT
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168932 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeVectorTypes.cpp
|
| 7f128ea00c5358729906a9b98f844e887a1c3d73 |
29-Nov-2012 |
Justin Holewinski <jholewinski@nvidia.com> |
Teach the legalizer how to handle operands for VSELECT nodes
If we need to split the operand of a VSELECT, it must be the mask operand. We
split the entire VSELECT operand with EXTRACT_SUBVECTOR.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168883 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeTypes.h
egalizeVectorTypes.cpp
|
| 3d200255d5b93344c1ab0a5ba4b47a52cfa5893e |
29-Nov-2012 |
Justin Holewinski <jholewinski@nvidia.com> |
Allow targets to prefer TypeSplitVector over TypePromoteInteger when computing the legalization method for vectors
For some targets, it is desirable to prefer scalarizing <N x i1> instead of promoting to a larger legal type, such as <N x i32>.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168882 91177308-0d34-0410-b5e6-96231b3b80d8
argetLowering.cpp
|
| 90e11dc8ada81015becd6f613152131e5c28a29d |
29-Nov-2012 |
Nadav Rotem <nrotem@apple.com> |
When combining consecutive stores allow loads in between the stores, if the loads do not alias.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168832 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 327e4cba0929f65bf32ecbbc9dc664793e5b51f7 |
25-Nov-2012 |
Craig Topper <craig.topper@gmail.com> |
Refactor to make helper method static.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168557 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
electionDAGBuilder.h
|
| c1aa638fff4d253286c601ae9fdf9e98d4bb1a3d |
25-Nov-2012 |
Craig Topper <craig.topper@gmail.com> |
Remove duplicate check of LimitFloatPrecision. It was already checked earlier before IsExp10 could be set to true.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168553 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| 915562e7620ef8a307c20df95bfb07f8514cf413 |
25-Nov-2012 |
Craig Topper <craig.topper@gmail.com> |
Factor common code out of individual if blocks into common tail.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168551 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| 134f78cf4166841227ad125363066507f484ad5d |
25-Nov-2012 |
Craig Topper <craig.topper@gmail.com> |
Remove redundant calls to getCurDebugLoc in visitIntrinsicCall. It's already called at the start of the function and captured in a local variable.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168548 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| 538cd48455e78bb3f1bf3573ebb2ea266a21cd24 |
24-Nov-2012 |
Craig Topper <craig.topper@gmail.com> |
Refactor a bit to make some helper methods static.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168546 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
electionDAGBuilder.h
|
| b315772cc9d52fef49bbe9b4e8d5e1bdf618755a |
24-Nov-2012 |
Craig Topper <craig.topper@gmail.com> |
Factor some common code out of individual if blocks.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168538 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| 5d1e089eaa4ab0080da4e5f61379bba596a4f2b5 |
23-Nov-2012 |
Craig Topper <craig.topper@gmail.com> |
Refactor a bit to make some helper functions static.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168524 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
electionDAGBuilder.h
|
| d5f03186e5b5c20225ba05d4506100ad763c79a1 |
23-Nov-2012 |
Patrik Hägglund <patrik.h.hagglund@ericsson.com> |
Cleanup: Simplify loop end logic in computeRegisterProperties().
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168507 91177308-0d34-0410-b5e6-96231b3b80d8
argetLowering.cpp
|
| b47ec4087cc1d4cdc647cce7acf03b5c34f91722 |
22-Nov-2012 |
Lang Hames <lhames@gmail.com> |
llvm.fmuladd.* lowering should be checking isOperationLegalOrCustom, rather than
isOperationLegal. Thanks to Craig Topper for pointing this out.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168485 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| 43147afd71f6da4e7369a4ab9c681e5b4e0cf8c7 |
17-Nov-2012 |
Eli Friedman <eli.friedman@gmail.com> |
Mark FP_EXTEND form v2f32 to v2f64 as "expand" for ARM NEON. Patch by Pete Couperus.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168240 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeVectorOps.cpp
|
| 08ac4691c61c4fab449ecf34913fa8ac9fde3517 |
16-Nov-2012 |
Craig Topper <craig.topper@gmail.com> |
Remove conditions from 'else if' that were guaranteed by preceding 'if'.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168191 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| df0ea8dcad612185a23b12e9ddf894b9ce744561 |
16-Nov-2012 |
Craig Topper <craig.topper@gmail.com> |
Factor out the final FADD that's common to multiple code paths in the visitLog* functions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168183 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| 9bd4dd742e20e99e8bc31c510ee790c95f680993 |
16-Nov-2012 |
Craig Topper <craig.topper@gmail.com> |
Factor some common code to reduce compile size.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168143 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| 846ce8ea67362d8b6d93ebae66f23e3c68dce9df |
15-Nov-2012 |
Eli Friedman <eli.friedman@gmail.com> |
Mark FP_ROUND for converting NEON v2f64 to v2f32 as expand. Add a missing
case to vector legalization so this actually works.
Patch by Pete Couperus. Fixes PR12540.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168107 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeVectorOps.cpp
|
| 490104720db9e1e0eb9cc27e88e2d7288ac27ff0 |
15-Nov-2012 |
Craig Topper <craig.topper@gmail.com> |
Add llvm.ceil, llvm.trunc, llvm.rint, llvm.nearbyint intrinsics.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168025 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| 8e2b8ae3b11b9778da5cb54d330e984b33979bf9 |
14-Nov-2012 |
Rafael Espindola <rafael.espindola@gmail.com> |
Handle DAG CSE adding new uses during ReplaceAllUsesWith. Fixes PR14333.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167912 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| b2df01ab2a311688c9c4ca4eb8a93ae1bf40d468 |
13-Nov-2012 |
Duncan Sands <baldrick@free.fr> |
Codegen support for arbitrary vector getelementptrs.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167830 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| ad1cc1d1bfc0accd3f1af5c02ac367ff46a4bfdf |
13-Nov-2012 |
Andrew Trick <atrick@apple.com> |
misched: Allow subtargets to enable misched and dependent options.
This allows me to begin enabling (or backing out) misched by default
for one subtarget at a time. To run misched we typically want to:
- Disable SelectionDAG scheduling (use the source order scheduler)
- Enable more aggressive coalescing (until we decide to always run the coalescer this way)
- Enable MachineScheduler pass itself.
Disabling PostRA sched may follow for some subtargets.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167826 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| ae692f2baedf53504af2715993b166950e185a55 |
12-Nov-2012 |
Andrew Trick <atrick@apple.com> |
misched: Infrastructure for weak DAG edges.
This adds support for weak DAG edges to the general scheduling
infrastructure in preparation for MachineScheduler support for
heuristics based on weak edges.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167738 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGRRList.cpp
cheduleDAGVLIW.cpp
|
| a78d3228e8b2a14915ea9908dbaaf2c934803e11 |
06-Nov-2012 |
Andrew Trick <atrick@apple.com> |
ScheduleDAG interface. Added OrderKind to distinguish nonregister dependencies.
This is in preparation for adding "weak" DAG edges, but generally
simplifies the design.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167435 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGFast.cpp
cheduleDAGRRList.cpp
cheduleDAGSDNodes.cpp
|
| efcc1aec6459c356c6516e28be29acaa51e876fa |
03-Nov-2012 |
Owen Anderson <resistor@mac.com> |
Be careful not to optimize a SELECT_CC into a SETCC post-legalization if the SETCC node would be illegal.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167344 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 0a1544d2fd63d8101dc7d50974e65c95a0f6f98d |
02-Nov-2012 |
Manman Ren <mren@apple.com> |
OutputArg: added an index of the original argument to match the change to
InputArg in r165616.
This will enable us to get the actual type for both InputArg and OutputArg.
rdar://9932559
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167265 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
argetLowering.cpp
|
| 426c2bf5cdd2173e4a33aea8cb92cf684a724f4b |
01-Nov-2012 |
Chandler Carruth <chandlerc@gmail.com> |
Revert the majority of the next patch in the address space series:
r165941: Resubmit the changes to llvm core to update the functions to
support different pointer sizes on a per address space basis.
Despite this commit log, this change primarily changed stuff outside of
VMCore, and those changes do not carry any tests for correctness (or
even plausibility), and we have consistently found questionable or flat
out incorrect cases in these changes. Most of them are probably correct,
but we need to devise a system that makes it more clear when we have
handled the address space concerns correctly, and ideally each pass that
gets updated would receive an accompanying test case that exercises that
pass specificaly w.r.t. alternate address spaces.
However, from this commit, I have retained the new C API entry points.
Those were an orthogonal change that probably should have been split
apart, but they seem entirely good.
In several places the changes were very obvious cleanups with no actual
multiple address space code added; these I have not reverted when
I spotted them.
In a few other places there were merge conflicts due to a cleaner
solution being implemented later, often not using address spaces at all.
In those cases, I've preserved the new code which isn't address space
dependent.
This is part of my ongoing effort to clean out the partial address space
code which carries high risk and low test coverage, and not likely to be
finished before the 3.2 release looms closer. Duncan and I would both
like to see the above issues addressed before we return to these
changes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167222 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| ece6c6bb6329748b92403c06ac87f45c43485911 |
01-Nov-2012 |
Chandler Carruth <chandlerc@gmail.com> |
Revert the series of commits starting with r166578 which introduced the
getIntPtrType support for multiple address spaces via a pointer type,
and also introduced a crasher bug in the constant folder reported in
PR14233.
These commits also contained several problems that should really be
addressed before they are re-committed. I have avoided reverting various
cleanups to the DataLayout APIs that are reasonable to have moving
forward in order to reduce the amount of churn, and minimize the number
of commits that were reverted. I've also manually updated merge
conflicts and manually arranged for the getIntPtrType function to stay
in DataLayout and to be defined in a plausible way after this revert.
Thanks to Duncan for working through this exact strategy with me, and
Nick Lewycky for tracking down the really annoying crasher this
triggered. (Test case to follow in its own commit.)
After discussing with Duncan extensively, and based on a note from
Micah, I'm going to continue to back out some more of the more
problematic patches in this series in order to ensure we go into the
LLVM 3.2 branch with a reasonable story here. I'll send a note to
llvmdev explaining what's going on and why.
Summary of reverted revisions:
r166634: Fix a compiler warning with an unused variable.
r166607: Add some cleanup to the DataLayout changes requested by
Chandler.
r166596: Revert "Back out r166591, not sure why this made it through
since I cancelled the command. Bleh, sorry about this!
r166591: Delete a directory that wasn't supposed to be checked in yet.
r166578: Add in support for getIntPtrType to get the pointer type based
on the address space.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167221 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
electionDAG.cpp
|
| 607ebde651f18d68e45724c6e3b3544d4786879f |
01-Nov-2012 |
Owen Anderson <resistor@mac.com> |
Add a few more simple fast-math constant propagations and cancellations.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167200 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| daeec8fad3a3038247df1e5081b74454e7ee9315 |
30-Oct-2012 |
Chad Rosier <mcrosier@apple.com> |
[inline asm] Get the mayLoad/mayStore directly from the MIOp_ExtraInfo operand.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167050 91177308-0d34-0410-b5e6-96231b3b80d8
nstrEmitter.cpp
|
| dfa4cecb1e549d96f800f7ebc793a342d8df1244 |
30-Oct-2012 |
Chad Rosier <mcrosier@apple.com> |
Add a comment for r167040.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167046 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| 3d71688476951d56ac00a81b17c2f83fd781b208 |
30-Oct-2012 |
Chad Rosier <mcrosier@apple.com> |
[inline asm] Implement mayLoad and mayStore for inline assembly. In general,
the MachineInstr MayLoad/MayLoad flags are based on the tablegen implementation.
For inline assembly, however, we need to compute these based on the constraints.
Revert r166929 as this is no longer needed, but leave the test case in place.
rdar://12033048 and PR13504
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167040 91177308-0d34-0410-b5e6-96231b3b80d8
nstrEmitter.cpp
electionDAGBuilder.cpp
|
| e669c930a61dd56891df2f9822966ecb173c8072 |
29-Oct-2012 |
Ulrich Weigand <ulrich.weigand@de.ibm.com> |
In various places throughout the code generator, there were special
checks to avoid performing compile-time arithmetic on PPCDoubleDouble.
Now that APFloat supports arithmetic on PPCDoubleDouble, those checks
are no longer needed, and we can treat the type like any other.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166958 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
electionDAG.cpp
|
| b8bce928f4ffdf50eff69334f3e25b27848536b6 |
24-Oct-2012 |
Micah Villmow <villmow@gmail.com> |
Back out r166591, not sure why this made it through since I cancelled the command. Bleh, sorry about this!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166596 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
egalizeIntegerTypes.cpp
|
| 2f87640b86315beab8a5671cc23f524e59c58bd3 |
24-Oct-2012 |
Micah Villmow <villmow@gmail.com> |
Delete a directory that wasn't supposed to be checked in yet.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166591 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
egalizeIntegerTypes.cpp
|
| aa76e9e2cf50af190de90bc778b7f7e42ef9ceff |
24-Oct-2012 |
Micah Villmow <villmow@gmail.com> |
Add in support for getIntPtrType to get the pointer type based on the address space.
This checkin also adds in some tests that utilize these paths and updates some of the
clients.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166578 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
electionDAG.cpp
|
| 1a5cc710ee78bf55c3799b49c6fd37619d2dbb7b |
24-Oct-2012 |
Michael Liao <michael.liao@intel.com> |
Teach DAG combine to fold (buildvec (Xint2fp x)) to (Xint2fp (buildvec x))
- If more than 1 elemennts are defined and target supports the vectorized
conversion, use the vectorized one instead to reduce the strength on
conversion operation.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166546 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| adf38913f815a2a453d4783e88b1528473b4740d |
24-Oct-2012 |
Jakub Staszak <kubastaszak@gmail.com> |
Keep coding standard. Don't evaluate getNumOperands() every time.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166531 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| fac14ab1795cfce21e4e5e51c711a11f6181074b |
24-Oct-2012 |
Michael Liao <michael.liao@intel.com> |
Clean up code and put transformation on (build_vec (ext x)) into a helper func
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166519 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| ee0ce15ce14474bdae1a9bad7a5a1d457ad8d959 |
23-Oct-2012 |
Nadav Rotem <nrotem@apple.com> |
Make the indirect branch optimization deterministic. No functionality change.
Patch by Daniel Reynaud.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166501 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| 63a4c24616fafa2b86d6391308ffd93e012115e4 |
20-Oct-2012 |
Benjamin Kramer <benny.kra@googlemail.com> |
Symbol hygiene: Make sure declarations and definitions match, make helper functions static.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166376 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGFast.cpp
|
| cfc6cb0c61ef78aad2f63b634b0a6f377361858b |
20-Oct-2012 |
Shuxin Yang <shuxin.llvm@gmail.com> |
1. Remove noreturn attribute from __builtin_debugtrap().
(The change at Clang side was committed in r166345)
2. Cosmetic change in order to conform to coding standards.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166350 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 970755e5197afb42a76a24a74cd6dc17721daf50 |
19-Oct-2012 |
Shuxin Yang <shuxin.llvm@gmail.com> |
This patch is to fix radar://8426430. It is about llvm support of __builtin_debugtrap()
which is supposed to consistently raise SIGTRAP across all systems. In contrast,
__builtin_trap() behave differently on different systems. e.g. it raises SIGTRAP on ARM, and
SIGILL on X86. The purpose of __builtin_debugtrap() is to consistently provide "trap"
functionality, in the mean time preserve the compatibility with on gcc on __builtin_trap().
The X86 backend is already able to handle debugtrap(). This patch is to:
1) make front-end recognize "__builtin_debugtrap()" (emboddied in the one-line change to Clang).
2) In DAG legalization phase, by default, "debugtrap" will be replaced with "trap", which
make the __builtin_debugtrap() "available" to all existing ports without the hassle of
changing their code.
3) If trap-function is specified (via -trap-func=xyz to llc), both __builtin_debugtrap() and
__builtin_trap() will be expanded into the function call of the specified trap function.
This behavior may need change in the future.
The provided testing-case is to make sure 2) and 3) are working for ARM port, and we
already have a testing case for x86.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166300 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
electionDAGBuilder.cpp
argetLowering.cpp
|
| 9aecdb51c743f13f88748ef3c539a3e6e6df9e99 |
19-Oct-2012 |
Michael Liao <michael.liao@intel.com> |
Simplify condition checking as CONCAT assume all inputs of the same type.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166260 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 1c5bf3f429927c31b9ffc1308ea1ada7a58ee1c0 |
18-Oct-2012 |
Nadav Rotem <nrotem@apple.com> |
In SimplifySelectOps we pulled two loads through a select node despite the fact that one was dependent on the other.
rdar://12513091
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166196 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 07edaf3801f7169477bab6d33cad86209ea8f558 |
18-Oct-2012 |
Michael Liao <michael.liao@intel.com> |
Revert part of r166049 back and enable test case in r166125.
- Folding (trunc (concat ... X )) to (concat ... (trunc X) ...) is valid
when '...' are all 'undef's.
- r166125 relies on this transformation.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166155 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 4031e9018b071d25e5fc905aa38a943fcd9facb6 |
18-Oct-2012 |
Michael Liao <michael.liao@intel.com> |
Revert r166049
- In general, it's unsafe for this transformation.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166135 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 13429e224cb165dae658ae4ea3ef67d69c1860fa |
17-Oct-2012 |
Michael Liao <michael.liao@intel.com> |
Teach DAG combine to fold (extract_subvec (concat v1, ..) i) to v_i
- If the extracted vector has the same type of all vectored being concatenated
together, it should be simplified directly into v_i, where i is the index of
the element being extracted.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166125 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| d4f759696d1bd0ba7c0e6eefd7ed8b556840419a |
17-Oct-2012 |
Evan Cheng <evan.cheng@apple.com> |
Add a really faster pre-RA scheduler (-pre-RA-sched=linearize). It doesn't use
any scheduling heuristics nor does it build up any scheduling data structure
that other heuristics use. It essentially linearize by doing a DFA walk but
it does handle glues correctly.
IMPORTANT: it probably can't handle all the physical register dependencies so
it's not suitable for x86. It also doesn't deal with dbg_value nodes right now
so it's definitely is still WIP.
rdar://12474515
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166122 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGFast.cpp
cheduleDAGSDNodes.cpp
cheduleDAGSDNodes.h
|
| 272ea0323999890d8bcf75b873a1c8ab2cdcba0d |
16-Oct-2012 |
Michael Liao <michael.liao@intel.com> |
Teach DAG combine to fold (trunc (fptoXi x)) to (fptoXi x)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166049 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| e4f273908bd37df5f0f6b2c575dcb2af99f6b85b |
15-Oct-2012 |
Jakob Stoklund Olesen <stoklund@2pi.dk> |
Freeze the reserved registers as soon as isel is complete.
Also provide an MRI::getReservedRegs() function to access the frozen
register set, and isReserved() and isAllocatable() methods to test
individual registers.
The various implementations of TRI::getReservedRegs() are quite
complicated, and many passes need to look at the reserved register set.
This patch makes it possible for these passes to use the cached copy in
MRI, avoiding a lot of malloc traffic and repeated calculations.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165982 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 2c39b15073db81d93bb629303915b7d7e5d088dc |
15-Oct-2012 |
Micah Villmow <villmow@gmail.com> |
Resubmit the changes to llvm core to update the functions to support different pointer sizes on a per address space basis.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165941 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 7bbb9c7b4a21364c5b92e60520babf326beff3d8 |
12-Oct-2012 |
Ulrich Weigand <ulrich.weigand@de.ibm.com> |
Fix big-endian codegen bug in DAGTypeLegalizer::ExpandRes_BITCAST
On PowerPC, a bitcast of <16 x i8> to i128 may run through a code
path in ExpandRes_BITCAST that attempts to do an intermediate
bitcast to a <4 x i32> vector, and then construct the Hi and Lo parts
of the resulting i128 by pairing up two of those i32 vector elements
each. The code already recognizes that on a big-endian system, the
first two vector elements form the Hi part, and the final two vector
elements form the Lo part (vice-versa from the little-endian situation).
However, we also need to take endianness into account when forming each
of those separate pairs: on a big-endian system, vector element 0 is
the *high* part of the pair making up the Hi part of the result, and
vector element 1 is the low part of the pair. The code currently always
uses vector element 0 as the low part and vector element 1 as the high
part, as is appropriate for little-endian platforms only.
This patch fixes this by swapping the vector elements as they are
paired up as appropriate.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165802 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeTypesGeneric.cpp
|
| d36696c4e0ccd10a91bad2e3383c50347e2ea5ec |
12-Oct-2012 |
Evan Cheng <evan.cheng@apple.com> |
Legalizer optimize a pair of div / mod to a call to divrem libcall if they are
not legal. However, it should use a div instruction + mul + sub if divide is
legal. The rem legalization code was missing a check and incorrectly uses a
divrem libcall even when div is legal.
rdar://12481395
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165778 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| fb384d61c78b60787ed65475d8403aee65023962 |
11-Oct-2012 |
Micah Villmow <villmow@gmail.com> |
Revert 165732 for further review.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165747 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| f3840d2c16a4ec4c879a8ded402835746de380f8 |
11-Oct-2012 |
Micah Villmow <villmow@gmail.com> |
Add in the first iteration of support for llvm/clang/lldb to allow variable per address space pointer sizes to be optimized correctly.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165726 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| be9262b8c7d32b416893368061281f827b489b18 |
11-Oct-2012 |
Michael Liao <michael.liao@intel.com> |
Follow the same routine to add target float expansion hook
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165707 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeFloatTypes.cpp
|
| d6458a0aa12ef831ff45d1ce55a89a70ed091cbe |
10-Oct-2012 |
Micah Villmow <villmow@gmail.com> |
Add in support for expansion of all of the comparison operations to the absolute minimum required set. This allows a backend to expand any arbitrary set of comparisons as long as a minimum set is supported.
The minimum set of required instructions is ISD::AND, ISD::OR, ISD::SETO(or ISD::SETOEQ) and ISD::SETUO(or ISD::SETUNE). Everything is expanded into one of two patterns:
Pattern 1: (LHS CC1 RHS) Opc (LHS CC2 RHS)
Pattern 2: (LHS CC1 LHS) Opc (RHS CC2 RHS)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165655 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 9d796db3e746c31dbdb605510c53b3da98d71b38 |
10-Oct-2012 |
Michael Liao <michael.liao@intel.com> |
Add alternative support for FP_ROUND from v2f32 to v2f64
- Due to the current matching vector elements constraints in ISD::FP_EXTEND,
rounding from v2f32 to v2f64 is scalarized. Add a customized v2f32 widening
to convert it into a target-specific X86ISD::VFPEXT to work around this
constraints. This patch also reverts a previous attempt to fix this issue by
recovering the scalarized ISD::FP_EXTEND pattern and thus significantly
reduces the overhead of supporting non-power-2 vector FP extend.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165625 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeTypes.h
egalizeVectorTypes.cpp
|
| 661afe75e81431a66de3ed8e22d5aa91443367b3 |
10-Oct-2012 |
Stepan Dyatkovskiy <stpworld@narod.ru> |
Issue description:
SchedulerDAGInstrs::buildSchedGraph ignores dependencies between FixedStack
objects and byval parameters. So loading byval parameters from stack may be
inserted *before* it will be stored, since these operations are treated as
independent.
Fix:
Currently ARMTargetLowering::LowerFormalArguments saves byval registers with
FixedStack MachinePointerInfo. To fix the problem we need to store byval
registers with MachinePointerInfo referenced to first the "byval" parameter.
Also commit adds two new fields to the InputArg structure: Function's argument
index and InputArg's part offset in bytes relative to the start position of
Function's argument. E.g.: If function's argument is 128 bit width and it was
splitted onto 32 bit regs, then we got 4 InputArg structs with same arg index,
but different offset values.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165616 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| 3e2d76c946ba753c2b11af192a52e25b6f9b46ff |
09-Oct-2012 |
Bill Wendling <isanbard@gmail.com> |
Use the attribute enums to query if a parameter has an attribute.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165550 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| 7d661468682c333739a6f6ab7dc337463573c354 |
09-Oct-2012 |
Micah Villmow <villmow@gmail.com> |
Add in the first step of the multiple pointer support. This adds in support to the data layout for specifying a per address space pointer size.
The next step is to update the optimizers to allow them to optimize the different address spaces with this information.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165505 91177308-0d34-0410-b5e6-96231b3b80d8
argetLowering.cpp
|
| 6765834754cbb3cb0f15b4b15e98c5e73fa50066 |
09-Oct-2012 |
Bill Wendling <isanbard@gmail.com> |
Create enums for the different attributes.
We use the enums to query whether an Attributes object has that attribute. The
opaque layer is responsible for knowing where that specific attribute is stored.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165488 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
electionDAGBuilder.cpp
argetLowering.cpp
|
| ad6aedc7d980d407da4452ff3ed4592d3df1a3f7 |
09-Oct-2012 |
Nadav Rotem <nrotem@apple.com> |
Refactor the AddrMode class out of TLI to its own header file.
This class is used by LSR and a number of places in the codegen.
This is the first step in de-coupling LSR from TLI, and creating
a new interface in between them.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165455 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| a98f600a64b7b70754df58926ce8d60feeb9ce29 |
08-Oct-2012 |
Andrew Trick <atrick@apple.com> |
misched: remove forceUnitLatencies. Defaults are handled by the default SchedModel
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165417 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGSDNodes.h
|
| 3574eca1b02600bac4e625297f4ecf745f4c4f32 |
08-Oct-2012 |
Micah Villmow <villmow@gmail.com> |
Move TargetData to DataLayout.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165402 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
astISel.cpp
unctionLoweringInfo.cpp
nstrEmitter.cpp
egalizeDAG.cpp
egalizeTypes.cpp
egalizeTypesGeneric.cpp
egalizeVectorTypes.cpp
cheduleDAGFast.cpp
cheduleDAGRRList.cpp
cheduleDAGVLIW.cpp
electionDAG.cpp
electionDAGBuilder.cpp
electionDAGBuilder.h
argetLowering.cpp
argetSelectionDAGInfo.cpp
|
| a4b5050cf5af18ac18565073fecbfcb95f93556b |
05-Oct-2012 |
Benjamin Kramer <benny.kra@googlemail.com> |
Remove unused but set variable flagged by GCC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165331 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| ebd7eabca4c090175b71f221e880f8bd937a4523 |
05-Oct-2012 |
Benjamin Kramer <benny.kra@googlemail.com> |
Simplify code, don't or a bool with an uint64_t.
No functionality change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165321 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| ea2c50c0416555a91cf963618f07c90a4c791708 |
05-Oct-2012 |
Nadav Rotem <nrotem@apple.com> |
When merging connsecutive stores, use vectors to store the constant zero.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165267 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 4c230b3338bc527fa62de1ea574019261316fcfb |
03-Oct-2012 |
Bill Wendling <isanbard@gmail.com> |
Update to use the predicate methods to query if an attribute exists.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165163 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| 2e7d38192de6ccdc54cf138fabdf00b81a6cd11d |
03-Oct-2012 |
Nadav Rotem <nrotem@apple.com> |
Fix a cycle in the DAG. In this code we replace multiple loads with a single load and
multiple stores with a single load. We create the wide loads and stores (and their chains)
before we remove the scalar loads and stores and fix the DAG chain. We attempted to merge
loads with a different chain. When that happened, the assumption that it is safe to RAUW
broke and a cycle was introduced.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165148 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| c653de6c0f3722154a41cbb57c213a0cdd789419 |
03-Oct-2012 |
Nadav Rotem <nrotem@apple.com> |
A DAGCombine optimization for mergeing consecutive stores to memory. The optimization
is not profitable in many cases because modern processors perform multiple stores
in parallel and merging stores prior to merging requires extra work. We handle two main cases:
1. Store of multiple consecutive constants:
q->a = 3;
q->4 = 5;
In this case we store a single legal wide integer.
2. Store of multiple consecutive loads:
int a = p->a;
int b = p->b;
q->a = a;
q->b = b;
In this case we load/store either ilegal vector registers or legal wide integer registers.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165125 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 76ad43c6e1619ed4c087b8ccb2cd573eb9d7093e |
03-Oct-2012 |
Eric Christopher <echristo@gmail.com> |
Revert 165051-165049 while looking into the foreach.m failure in
more detail.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165099 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
|
| 96bd4418b2320dec7cf9573c4f1da0a0ef31465e |
02-Oct-2012 |
Eric Christopher <echristo@apple.com> |
Remove the SavePoint infrastructure from fast isel, replace
with just an insert point from the MachineBasicBlock and let
the location be updated as we access it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165049 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
|
| 48da0be8b5821dddbb5233ad9cb198369031684b |
02-Oct-2012 |
Duncan Sands <baldrick@free.fr> |
Fix PR13991: legalizing an overflowing multiplication operation is harder than
the add/sub case since in the case of multiplication you also have to check that
the operation in the larger type did not overflow.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165017 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeIntegerTypes.cpp
|
| 554c6762e8cbc0a2fd6b61201254ba37df57e8db |
30-Sep-2012 |
Jakub Staszak <kubastaszak@gmail.com> |
Use dyn_cast instead of isa and cast.
No functionality change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164924 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 73fab91f2cd5fa3dbe4593506ac4a31aa3faf897 |
30-Sep-2012 |
Nadav Rotem <nrotem@apple.com> |
Revert r164910 because it causes failures to several phase2 builds.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164911 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| e5f163a3b98a531c3ff35da0e97e7364c0e04b95 |
30-Sep-2012 |
Nadav Rotem <nrotem@apple.com> |
A DAGCombine optimization for merging consecutive stores. This optimization is not profitable in many cases
because moden processos can store multiple values in parallel, and preparing the consecutive store requires
some work. We only handle these cases:
1. Consecutive stores where the values and consecutive loads. For example:
int a = p->a;
int b = p->b;
q->a = a;
q->b = b;
2. Consecutive stores where the values are constants. Foe example:
q->a = 4;
q->b = 5;
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164910 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 454627252b1cc43e81949d41eb20e9ea9560da58 |
29-Sep-2012 |
Duncan Sands <baldrick@free.fr> |
Speculatively revert commit 164885 (nadav) in the hope of ressurecting a pile of
buildbots. Original commit message:
A DAGCombine optimization for merging consecutive stores. This optimization is not profitable in many cases
because moden processos can store multiple values in parallel, and preparing the consecutive store requires
some work. We only handle these cases:
1. Consecutive stores where the values and consecutive loads. For example:
int a = p->a;
int b = p->b;
q->a = a;
q->b = b;
2. Consecutive stores where the values are constants. Foe example:
q->a = 4;
q->b = 5;
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164890 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 0eb5dadf657d38da9a8c7fe44c660bcfb6933038 |
29-Sep-2012 |
Craig Topper <craig.topper@gmail.com> |
Tidy up to match coding standards. Remove 'else' after 'return' and moving operators to end of preceding line. No functional change intended.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164887 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 32b7343a96feb052e8afa0c99fb3bfcac617f0a5 |
29-Sep-2012 |
Craig Topper <craig.topper@gmail.com> |
Replace a couple if/elses around similar calls with conditional operators on the varying arguments. No functional change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164886 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 72f7b0811efef58080a909abbc14d74c40c0867d |
29-Sep-2012 |
Nadav Rotem <nrotem@apple.com> |
A DAGCombine optimization for merging consecutive stores. This optimization is not profitable in many cases
because moden processos can store multiple values in parallel, and preparing the consecutive store requires
some work. We only handle these cases:
1. Consecutive stores where the values and consecutive loads. For example:
int a = p->a;
int b = p->b;
q->a = a;
q->b = b;
2. Consecutive stores where the values are constants. Foe example:
q->a = 4;
q->b = 5;
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164885 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 94c22716d60ff5edf6a98a3c67e0faa001be1142 |
27-Sep-2012 |
Sylvestre Ledru <sylvestre@debian.org> |
Revert 'Fix a typo 'iff' => 'if''. iff is an abreviation of if and only if. See: http://en.wikipedia.org/wiki/If_and_only_if Commit 164767
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164768 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
egalizeIntegerTypes.cpp
electionDAG.cpp
argetLowering.cpp
|
| 7e2c793a2b5c746344652b6579e958ee42fafdcc |
27-Sep-2012 |
Sylvestre Ledru <sylvestre@debian.org> |
Fix a typo 'iff' => 'if'
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164767 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
egalizeIntegerTypes.cpp
electionDAG.cpp
argetLowering.cpp
|
| 2c189061184925c6a8ecbb5a19e648b230a41c0e |
26-Sep-2012 |
Bill Wendling <isanbard@gmail.com> |
Remove the `hasFnAttr' method from Function.
The hasFnAttr method has been replaced by querying the Attributes explicitly. No
intended functionality change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164725 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
electionDAGBuilder.cpp
|
| f18eb5887f913bd9aa372005599d7375333cdce2 |
26-Sep-2012 |
Bill Wendling <isanbard@gmail.com> |
Generate an error message instead of asserting or segfaulting when we have a
scalar-to-vector conversion that we cannot handle. For instance, when an invalid
constraint is used in an inline asm statement.
<rdar://problem/12284092>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164662 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| 1293130f4f53e736678c45e712802f0dd087c80b |
26-Sep-2012 |
Bill Wendling <isanbard@gmail.com> |
Generate an error message instead of asserting or segfaulting when we have a
scalar-to-vector conversion that we cannot handle. For instance, when an invalid
constraint is used in an inline asm statement.
<rdar://problem/12284092>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164657 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| 1a37d7e807ad6cc71fe3cffdf6674644c46a60eb |
25-Sep-2012 |
Sebastian Pop <spop@codeaurora.org> |
TargetLowering interface to set/get minimum block entries for jump tables.
Provide interface in TargetLowering to set or get the minimum number of basic
blocks whereby jump tables are generated for switch statements rather than an
if sequence.
getMinimumJumpTableEntries() defaults to 4.
setMinimumJumpTableEntries() allows target configuration.
This patch changes the default for the Hexagon architecture to 5
as it improves performance on some benchmarks.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164628 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
argetLowering.cpp
|
| 6dfabb6cc72118e046d2a466aa6adcec4c4923db |
20-Sep-2012 |
Nadav Rotem <nrotem@apple.com> |
Fix 80-col violations.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164297 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| e853d2e2508e21b5c3156c7d8b6e6902a7d2604a |
20-Sep-2012 |
Bill Wendling <isanbard@gmail.com> |
Add predicates for queries on whether an attribute exists.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164264 91177308-0d34-0410-b5e6-96231b3b80d8
argetLowering.cpp
|
| c2945e44d5d485ce080a09900fbd5245e01165fc |
18-Sep-2012 |
Craig Topper <craig.topper@gmail.com> |
Mark unimplemented copy constructors and copy assignment operators as LLVM_DELETED_FUNCTION.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164090 91177308-0d34-0410-b5e6-96231b3b80d8
DNodeOrdering.h
|
| fe257cc8af0859b0a92a6ba195382e1f9e1ea9aa |
18-Sep-2012 |
Evan Cheng <evan.cheng@apple.com> |
Fix some funky indentation.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164087 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| bb7300224738e65f9a9945dc7df2f360b1d4feb6 |
17-Sep-2012 |
Michael Liao <michael.liao@intel.com> |
Fix PR13859
- Preserve the original NOutVT during casting from vector to integer by
extracting vector elements.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164042 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeTypesGeneric.cpp
|
| 1d2b45f1670a76e61d997de865d154ee77d01ea4 |
16-Sep-2012 |
Craig Topper <craig.topper@gmail.com> |
Fix bad comment. No functional change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164000 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| ffaf69b8b118808ca35ab84d477fd2e4e54cce90 |
14-Sep-2012 |
Eric Christopher <echristo@apple.com> |
Fix both the test for zero and what we do if we have a zero for
umulo legalization.
Fixes PR13839
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163856 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeIntegerTypes.cpp
|
| 331f64cd0dc1249d0708af63b4d13509850c234e |
14-Sep-2012 |
Eric Christopher <echristo@apple.com> |
Reformat, remove a couple unused variables and move some variables
closer to where they're needed.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163855 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeIntegerTypes.cpp
|
| 092122f124b6589a3a432473c1047bf5834df3c1 |
13-Sep-2012 |
Michael Liao <michael.liao@intel.com> |
Enhance type legalization on bitcast from vector to integer
- Find a legal vector type before casting and extracting element from it.
- As the new vector type may have more than 2 elements, build the final
hi/lo pair by BFS pairing them from bottom to top.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163830 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeTypesGeneric.cpp
|
| 91a7e0184a4f7976ef11cb48697d2782fc1b9be7 |
13-Sep-2012 |
Nadav Rotem <nrotem@apple.com> |
Fix a dagcombine optimization. The optimization attempts to optimize a bitcast of fneg to integers
by xoring the high-bit. This fails if the source operand is a vector because we need to negate
each of the elements in the vector.
Fix rdar://12281066 PR13813.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163802 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 6c7ccaa3fd1d6e96d0bf922554b09d2b17c3b0e3 |
12-Sep-2012 |
Michael Liao <michael.liao@intel.com> |
Fix PR11985
- BlockAddress has no support of BA + offset form and there is no way to
propagate that offset into machine operand;
- Add BA + offset support and a new interface 'getTargetBlockAddress' to
simplify target block address forming;
- All targets are modified to use new interface and X86 backend is enhanced to
support BA + offset addressing.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163743 91177308-0d34-0410-b5e6-96231b3b80d8
nstrEmitter.cpp
electionDAG.cpp
electionDAGDumper.cpp
|
| 045ca86bb3494e60ec2be72cabb5683fe204d066 |
12-Sep-2012 |
Owen Anderson <resistor@mac.com> |
Remove an overly-aggressive assertion. The code following this assertion already knows how to handle the case where DstRC was NULL, so it's not actually protecting us from anything, and this pattern can come up when using unknown_class operands in the SelectionDAG.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163736 91177308-0d34-0410-b5e6-96231b3b80d8
nstrEmitter.cpp
|
| 789efbad2a7b2c7693a3aee7b6d08806c361538f |
12-Sep-2012 |
Kristof Beyls <kristof.beyls@arm.com> |
Fix constant folding through bitcasts by no longer relying on undefined behaviour (converting NaN values between float and double).
SelectionDAG::getConstantFP(double Val, EVT VT, bool isTarget);
should not be used when Val is not a simple constant (as the comment in
SelectionDAG.h indicates). This patch avoids using this function
when folding an unknown constant through a bitcast, where it cannot be
guaranteed that Val will be a simple constant.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163703 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| b720be6a50f4e1b3280d2b029ee38dda14577525 |
12-Sep-2012 |
Manman Ren <mren@apple.com> |
Release build: guard dump functions with
"#if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP)"
No functional change. Update r163339.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163653 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGRRList.cpp
cheduleDAGSDNodes.cpp
|
| dd201ff1dcbc138cde07fb86896d491134987a2e |
11-Sep-2012 |
Craig Topper <craig.topper@gmail.com> |
Teach DAG combiner to constant fold FABS of a BUILD_VECTOR of ConstantFPs. Factor similar code out of FNEG DAG combiner.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163587 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 1c4ad5ef4fab105f0c8af7edd026e00502fb6279 |
11-Sep-2012 |
Stephen Hines <srhines@google.com> |
Merge branch 'upstream' into merge-2012_09_10
Conflicts:
lib/CodeGen/AsmPrinter/AsmPrinterInlineAsm.cpp
lib/Support/DynamicLibrary.cpp
lib/Support/LockFileManager.cpp
Change-Id: I91e94c3a7a76e19c688307c5a480a640a3bd2b7e
|
| 10def396cba31bc2358a92bc5d714fceb17cbbd3 |
10-Sep-2012 |
Michael Ilseman <milseman@apple.com> |
Fold multiply by 0 or 1 when in UnsafeFPMath mode in SelectionDAG::getNode().
This folding happens as early as possible for performance reasons, and to make sure it isn't foiled by other transforms (e.g. forming FMAs).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163519 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 06b9690463e994e026d529701b19cb8e970b5c62 |
10-Sep-2012 |
Michael Ilseman <milseman@apple.com> |
whitespace
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163518 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 8cd08bf4ac67b9d711fd1f72e6f5e00425d8c6ad |
10-Sep-2012 |
James Molloy <james.molloy@arm.com> |
Fix an assertion failure when optimising a shufflevector incorrectly into concat_vectors, and a followup bug with SelectionDAG::getNode() creating nodes with invalid types.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163511 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
electionDAG.cpp
|
| 9a2ae00c85c553108f3d57b134f0aceef5ae3372 |
10-Sep-2012 |
Nadav Rotem <nrotem@apple.com> |
Teach the DAGBuilder about lifetime markers which are generated from PHINodes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163494 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| 956342b2104c734d4d6b758a58a799ccd3beb63d |
10-Sep-2012 |
Craig Topper <craig.topper@gmail.com> |
Teach DAG combiner to constant fold fneg of a BUILD_VECTOR of constants.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163483 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 1fdaee9995f1bf1553cecd4da62daba91fd4fa1f |
07-Sep-2012 |
Michael Liao <michael.liao@intel.com> |
Stop emitting lifetime region info when stack coloring is not enabled in O0
- this should fix PR13780
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163370 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| 77e300e8f0b8db8eec448cae9c87d7c5bfad9757 |
06-Sep-2012 |
Manman Ren <mren@apple.com> |
Release build: guard dump functions with "ifndef NDEBUG"
No functional change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163339 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGRRList.cpp
cheduleDAGSDNodes.cpp
|
| e757640df0615510dbc42921cf6271aa76c405ee |
06-Sep-2012 |
Nadav Rotem <nrotem@apple.com> |
Fix a few old-GCC warnings. No functional change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163309 91177308-0d34-0410-b5e6-96231b3b80d8
argetLowering.cpp
|
| c05d30601ced172b55be81bb529df6be91d6ae15 |
06-Sep-2012 |
Nadav Rotem <nrotem@apple.com> |
Add a new optimization pass: Stack Coloring, that merges disjoint static allocations (allocas). Allocas are known to be
disjoint if they are marked by disjoint lifetime markers (@llvm.lifetime.XXX intrinsics).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163299 91177308-0d34-0410-b5e6-96231b3b80d8
unctionLoweringInfo.cpp
nstrEmitter.cpp
cheduleDAGRRList.cpp
electionDAG.cpp
electionDAGBuilder.cpp
electionDAGDumper.cpp
electionDAGISel.cpp
|
| 2f1d8154795ad82e500fda27d75ec1449e7a0648 |
06-Sep-2012 |
Chad Rosier <mcrosier@apple.com> |
Cleanup a few magic numbers.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163263 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| 59324297650c12a8dccf1a7ad650a9e895fdc17e |
06-Sep-2012 |
Roman Divacky <rdivacky@freebsd.org> |
Stop casting away const qualifier needlessly.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163258 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGDumper.cpp
argetLowering.cpp
|
| 77fffa6fdd389ad6d70a42b36c1c36c768c2de41 |
06-Sep-2012 |
Chad Rosier <mcrosier@apple.com> |
[ms-inline asm] We only need one bit to represent the AsmDialect in the
MachineInstr.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163257 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| 2943e378048636691eda1b1b4e437eea9da4a839 |
06-Sep-2012 |
Roman Divacky <rdivacky@freebsd.org> |
Constify this properly. Found by gcc48 -Wcast-qual.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163256 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 141e99745adbd3ba9fa7315af3384c1d08c4c20c |
06-Sep-2012 |
Roman Divacky <rdivacky@freebsd.org> |
Constify SDNodeIterator an stop its only non-const user being cast stripped
of its constness. Found by gcc48 -Wcast-qual.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163254 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGPrinter.cpp
|
| 576cd11ab8035d4240f7e6ea8d7c6c2e45154f86 |
05-Sep-2012 |
Chad Rosier <mcrosier@apple.com> |
[ms-inline asm] Propagate the asm dialect into the MachineInstr representation.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163243 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| 3d5e161fe45f9553009c0377a5689324aab1c64a |
05-Sep-2012 |
Silviu Baranga <silviu.baranga@arm.com> |
Fixed the DAG combiner to better handle the folding of AND nodes for vector types. The previous code was making the assumption that the length of the bitmask returned by isConstantSplat was equal to the size of the vector type. Now we first make sure that the splat value has at least the length of the vector lane type, then we only use as many fields as we have available in the splat value.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163203 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| f6dc792df1452f015bc56590b77af9cb0d7b33d9 |
05-Sep-2012 |
Craig Topper <craig.topper@gmail.com> |
Convert vextracti128/vextractf128 intrinsics to extract_subvector at DAG build time. Similar was previously done for vinserti128/vinsertf128. Add patterns for folding these extract_subvectors with stores.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163192 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| 2e2efd960056bbb7e4bbd843c8de55116d52aa7d |
04-Sep-2012 |
Preston Gurd <preston.gurd@intel.com> |
Generic Bypass Slow Div
- CodeGenPrepare pass for identifying div/rem ops
- Backend specifies the type mapping using addBypassSlowDivType
- Enabled only for Intel Atom with O2 32-bit -> 8-bit
- Replace IDIV with instructions which test its value and use DIVB if the value
is positive and less than 256.
- In the case when the quotient and remainder of a divide are used a DIV
and a REM instruction will be present in the IR. In the non-Atom case
they are both lowered to IDIVs and CSE removes the redundant IDIV instruction,
using the quotient and remainder from the first IDIV. However,
due to this optimization CSE is not able to eliminate redundant
IDIV instructions because they are located in different basic blocks.
This is overcome by calculating both the quotient (DIV) and remainder (REM)
in each basic block that is inserted by the optimization and reusing the result
values when a subsequent DIV or REM instruction uses the same operands.
- Test cases check for the presents of the optimization when calculating
either the quotient, remainder, or both.
Patch by Tyler Nowicki!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163150 91177308-0d34-0410-b5e6-96231b3b80d8
argetLowering.cpp
|
| ee77da6b28d7f56e4e531ae8b4f8093de760a2e5 |
02-Sep-2012 |
Nadav Rotem <nrotem@apple.com> |
Fix a typo.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163094 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeVectorOps.cpp
|
| f55ef64544f8ba81e50154a98f144f7b7783ed40 |
02-Sep-2012 |
Nadav Rotem <nrotem@apple.com> |
Generate better select code by allowing the target to use scalar select, and not sign-extend.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163086 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeVectorOps.cpp
|
| d906017c1a8b5c7c49f1bc21c13e8b85306298b8 |
02-Sep-2012 |
Pete Cooper <peter_cooper@apple.com> |
Only legalise a VSELECT in to bitwise operations if the vector mask bool is zeros or all ones. A vector bool with just ones isn't suitable for masking with.
No test case unfortunately as i couldn't find a target which fit all
the conditions needed to hit this code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163075 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeVectorOps.cpp
|
| 0fc44aba18ed2f557805ce84fe597356f026f202 |
01-Sep-2012 |
Pete Cooper <peter_cooper@apple.com> |
Revert "Take account of boolean vector contents when promoting a build vector from i1 to some other type. rdar://problem/12210060"
This reverts commit 5dd9e214fb92847e947f9edab170f9b4e52b908f.
Thanks to Duncan for explaining how this should have been done.
Conflicts:
test/CodeGen/X86/vec_select.ll
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163064 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeIntegerTypes.cpp
|
| 58d5729540bec7c6f7aef19a9a6a179123deab47 |
01-Sep-2012 |
Owen Anderson <resistor@mac.com> |
Teach DAG combine a number of tricks to simplify FMA expressions in fast-math mode.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163051 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| b79bff50bdf68615dfa1ddd2239c8d093e155e1f |
01-Sep-2012 |
Michael Liao <michael.liao@intel.com> |
Fix typo
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163049 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 94083149fd6891c8a72472cf1814fa6600a75979 |
31-Aug-2012 |
Jakob Stoklund Olesen <stoklund@2pi.dk> |
Add MachineInstr::tieOperands, remove setIsTied().
Manage tied operands entirely internally to MachineInstr. This makes it
possible to change the representation of tied operands, as I will do
shortly.
The constraint that tied uses and defs must be in the same order was too
restrictive.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163021 91177308-0d34-0410-b5e6-96231b3b80d8
nstrEmitter.cpp
|
| 908c0c01f634798a4c1b335a6aca0870ad1fce77 |
31-Aug-2012 |
Jakob Stoklund Olesen <stoklund@2pi.dk> |
Don't enforce ordered inline asm operands.
I was too optimistic, inline asm can have tied operands that don't
follow the def order.
Fixes PR13742.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162998 91177308-0d34-0410-b5e6-96231b3b80d8
nstrEmitter.cpp
|
| 5dd9e214fb92847e947f9edab170f9b4e52b908f |
31-Aug-2012 |
Pete Cooper <peter_cooper@apple.com> |
Take account of boolean vector contents when promoting a build vector from i1 to some other type. rdar://problem/12210060
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162960 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeIntegerTypes.cpp
|
| 43da6c7f13aedcc11530f9d81dbbb2ee07ad226a |
31-Aug-2012 |
Owen Anderson <resistor@mac.com> |
Teach the DAG combiner to turn chains of FADDs (x+x+x+x+...) into FMULs by constants. This is only enabled in unsafe FP math mode, since it does not preserve rounding effects for all such constants.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162956 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| e757f00446fb3c80a96d729f0530b87e9148db7f |
30-Aug-2012 |
Nadav Rotem <nrotem@apple.com> |
Currently targets that do not support selects with scalar conditions and vector operands - scalarize the code. ARM is such a target
because it does not support CMOV of vectors. To implement this efficientlyi, we broadcast the condition bit and use a sequence of NAND-OR
to select between the two operands. This is the same sequence we use for targets that don't have vector BLENDs (like SSE2).
rdar://12201387
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162926 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeVectorOps.cpp
|
| 6b1e1d8b3d8d5a1b299d3c2897db9bf122b02c00 |
30-Aug-2012 |
Craig Topper <craig.topper@gmail.com> |
Add FMA to switch statement in VectorLegalizer::LegalizeOp so that it can be expanded when it isn't legal.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162894 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeVectorOps.cpp
|
| 3b9dfc9bf79f1134336fa704c54e411a24856d1d |
30-Aug-2012 |
Craig Topper <craig.topper@gmail.com> |
Add support for FMA to WidenVectorResult.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162893 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeTypes.h
egalizeVectorTypes.cpp
|
| 492d76b02ec5dd84fa59f79ce83cd3e5ae6603fe |
30-Aug-2012 |
Jakob Stoklund Olesen <stoklund@2pi.dk> |
Verify the order of tied operands in inline asm.
When there are multiple tied use-def pairs on an inline asm instruction,
the tied uses must appear in the same order as the defs.
It is possible to write an LLVM IR inline asm instruction that breaks
this constraint, but there is no reason for a front end to emit the
operands out of order.
The gnu inline asm syntax specifies tied operands as a single read/write
constraint "+r", so ouf of order operands are not possible.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162878 91177308-0d34-0410-b5e6-96231b3b80d8
nstrEmitter.cpp
|
| 66390805ad58871cde3f5ccd72a7dcac9b1cd4d8 |
30-Aug-2012 |
Jakob Stoklund Olesen <stoklund@2pi.dk> |
Set the isTied flags when building INLINEASM MachineInstrs.
For normal instructions, isTied() is set automatically by addOperand(),
based on MCInstrDesc, but inline asm has tied operands outside the
descriptor.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162869 91177308-0d34-0410-b5e6-96231b3b80d8
nstrEmitter.cpp
|
| 36d29bc72345d882623b001c2692b9246a19688a |
28-Aug-2012 |
Jakob Stoklund Olesen <stoklund@2pi.dk> |
Remove extra MayLoad/MayStore flags from atomic_load/store.
These extra flags are not required to properly order the atomic
load/store instructions. SelectionDAGBuilder chains atomics as if they
were volatile, and SelectionDAG::getAtomic() sets the isVolatile bit on
the memory operands of all atomic operations.
The volatile bit is enough to order atomic loads and stores during and
after SelectionDAG.
This means we set mayLoad on atomic_load, mayStore on atomic_store, and
mayLoad+mayStore on the remaining atomic read-modify-write operations.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162733 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 1d522388bfa642d710618edd3f4e9fe6471cf674 |
28-Aug-2012 |
Akira Hatanaka <ahatanaka@mips.com> |
Fix bug 13532.
In SelectionDAGLegalize::ExpandLegalINT_TO_FP, expand INT_TO_FP nodes without
using any f64 operations if f64 is not a legal type.
Patch by Stefan Kristiansson.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162728 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 1144af3c9b4da48cd581156e05b24261c8de366a |
25-Aug-2012 |
Richard Smith <richard-llvm@metafoo.co.uk> |
Fix integer undefined behavior due to signed left shift overflow in LLVM.
Reviewed offline by chandlerc.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162623 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| baa74e4b35d96ee154c68fa6d204d854cb45f969 |
24-Aug-2012 |
Jakob Stoklund Olesen <stoklund@2pi.dk> |
Avoid including explicit uses when counting SDNode imp-uses.
It is legal to have a register node as an explicit operand, it shouldn't
be counted as an implicit use.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162591 91177308-0d34-0410-b5e6-96231b3b80d8
nstrEmitter.cpp
|
| 1a710fdde197b00107ef55df51054925b9a5d2a2 |
24-Aug-2012 |
Manman Ren <mren@apple.com> |
BranchProb: modify the definition of an edge in BranchProbabilityInfo to handle
the case of multiple edges from one block to another.
A simple example is a switch statement with multiple values to the same
destination. The definition of an edge is modified from a pair of blocks to
a pair of PredBlock and an index into the successors.
Also set the weight correctly when building SelectionDAG from LLVM IR,
especially when converting a Switch.
IntegersSubsetMapping is updated to calculate the weight for each cluster.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162572 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
electionDAGBuilder.h
electionDAGISel.cpp
|
| 31675153bd2d7617db8cb6aeb58054934c7b9f73 |
24-Aug-2012 |
Stephen Hines <srhines@google.com> |
Merge branch 'upstream' into merge_2
Conflicts:
lib/Target/ARM/ARMCodeEmitter.cpp
Change-Id: I6702d340c733e9721499b5d85b13b96ad9c14eb5
|
| fdeb9fe5e08146d9cb953000cb893eda80329a08 |
22-Aug-2012 |
Stepan Dyatkovskiy <stpworld@narod.ru> |
Rejected 169195. As Duncan commented, bitcasting to proper type is wrong approach. We need to insert some valid TRANCATE node here.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162354 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 96601ca332ab388754ca4673be8973396fea2ddd |
22-Aug-2012 |
Craig Topper <craig.topper@gmail.com> |
Add a getName function to MachineFunction. Use it in places that previously did getFunction()->getName(). Remove includes of Function.h that are no longer needed.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162347 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
electionDAGPrinter.cpp
|
| cb1f68d7c8bea99530ba55813c2b4ddd14556286 |
22-Aug-2012 |
Richard Smith <richard-llvm@metafoo.co.uk> |
Initialize SelectionDAGBuilder's Context in 'init', not in its constructor. The
SelectionDAG's 'init' has not been called when the SelectionDAGBuilder is
constructed (in SelectionDAGISel's constructor), so this was previously always
initialized with 0.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162333 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
electionDAGBuilder.h
|
| e7fdef420d0c8a825555d246da259342c48bd527 |
20-Aug-2012 |
Jakob Stoklund Olesen <stoklund@2pi.dk> |
Don't add CFG edges for redundant conditional branches.
IR that hasn't been through SimplifyCFG can look like this:
br i1 %b, label %r, label %r
Make sure we don't create duplicate Machine CFG edges in this case.
Fix the machine code verifier to accept conditional branches with a
single CFG edge.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162230 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| 08da177c355dcde40dbe6c0a21b26956fcbca32c |
20-Aug-2012 |
Stepan Dyatkovskiy <stpworld@narod.ru> |
Fixed DAGCombiner bug (found and localized by James Malloy):
The DAGCombiner tries to optimise a BUILD_VECTOR by checking if it
consists purely of get_vector_elts from one or two source vectors. If
so, it either makes a concat_vectors node or a shufflevector node.
However, it doesn't check the element type width of the underlying
vector, so if you have this sequence:
Node0: v4i16 = ...
Node1: i32 = extract_vector_elt Node0
Node2: i32 = extract_vector_elt Node0
Node3: v16i8 = BUILD_VECTOR Node1, Node2, ...
It will attempt to:
Node0: v4i16 = ...
NewNode1: v16i8 = concat_vectors Node0, ...
Where this is actually invalid because the element width is completely
different. This causes an assertion failure on DAG legalization stage.
Fix:
If output item type of BUILD_VECTOR differs from input item type.
Make concat_vectors based on input element type and then bitcast it to the output vector type. So the case described above will transformed to:
Node0: v4i16 = ...
NewNode1: v8i16 = concat_vectors Node0, ...
NewNode2: v16i8 = bitcast NewNode1
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162195 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| fd45fa1503de725801be3db33c7e860298fc82a3 |
18-Aug-2012 |
Eli Friedman <eli.friedman@gmail.com> |
Make atomic load and store of pointers work. Tighten verification of atomic operations
so other unexpected operations don't slip through. Based on patch by Logan Chien.
PR11786/PR13186.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162146 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| b97cebdfcc4d76835961038b79e605b167bd8cc5 |
17-Aug-2012 |
Benjamin Kramer <benny.kra@googlemail.com> |
TargetLowering: Use the large shift amount during legalize types. The legalizer may call us with an overly large type.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162101 91177308-0d34-0410-b5e6-96231b3b80d8
argetLowering.cpp
|
| 7c626d30974c632ab500171ff185a24bcf2603bf |
14-Aug-2012 |
Owen Anderson <resistor@mac.com> |
Add a roundToIntegral method to APFloat, which can be parameterized over various rounding modes. Use this to implement SelectionDAG constant folding of FFLOOR, FCEIL, and FTRUNC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161807 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
electionDAG.cpp
|
| 0b66bd9b078c99dfca6ba0836750cdc168f635d1 |
09-Aug-2012 |
Nadav Rotem <nadav.rotem@intel.com> |
Fix the legalization of ExtLoad on ARM. ExpandUnalignedLoad did not properly
handle the cases where the memory value type was illegal.
PR 13111.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161565 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 74500bdba3eae36a1a8a17d8bad0b971b9c212ec |
08-Aug-2012 |
Jakob Stoklund Olesen <stoklund@2pi.dk> |
Add SelectionDAG::getTargetIndex.
This adds support for TargetIndex operands during isel. The meaning of
these (index, offset, flags) operands is entirely defined by the target.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161453 91177308-0d34-0410-b5e6-96231b3b80d8
nstrEmitter.cpp
cheduleDAGSDNodes.h
electionDAG.cpp
electionDAGDumper.cpp
|
| 53624a2df557b4a24f2ee98cfce1a69bf83243af |
04-Aug-2012 |
Bob Wilson <bob.wilson@apple.com> |
Refactor and check "onlyReadsMemory" before optimizing builtins.
This patch is mostly just refactoring a bunch of copy-and-pasted code, but
it also adds a check that the call instructions are readnone or readonly.
That check was already present for sin, cos, sqrt, log2, and exp2 calls, but
it was missing for the rest of the builtins being handled in this code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161282 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
electionDAGBuilder.h
|
| 982dc84762fc0c2ca35e6947d648a690dd22343c |
03-Aug-2012 |
Bob Wilson <bob.wilson@apple.com> |
Try to reduce the compile time impact of r161232.
The previous change caused fast isel to not attempt handling any calls to
builtin functions. That included things like "printf" and caused some
noticable regressions in compile time. I wanted to avoid having fast isel
keep a separate list of functions that had to be kept in sync with what the
code in SelectionDAGBuilder.cpp was handling. I've resolved that here by
moving the list into TargetLibraryInfo. This is somewhat redundant in
SelectionDAGBuilder but it will ensure that we keep things consistent.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161263 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
electionDAGBuilder.cpp
|
| 772af92cb16a5e11bd580f576643a6268e8a5bce |
03-Aug-2012 |
Bob Wilson <bob.wilson@apple.com> |
Fix memcmp code-gen to honor -fno-builtin.
I noticed that SelectionDAGBuilder::visitCall was missing a check for memcmp
in TargetLibraryInfo, so that it would use custom code for memcmp calls even
with -fno-builtin. I also had to add a new -disable-simplify-libcalls option
to llc so that I could write a test for this.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161262 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| 7744acd1ab73b3eec6f1449f47083abe3fb1b527 |
03-Aug-2012 |
Shih-wei Liao <sliao@google.com> |
Merge with LLVM upstream r160668 (Jul 24th 2012)
Conflicts:
include/llvm/Support/ELF.h
lib/CodeGen/AsmPrinter/AsmPrinter.cpp
lib/Support/Memory.cpp
lib/Transforms/Instrumentation/AddressSanitizer.cpp
Change-Id: Iddd658cf2eadc7165b2805b446d31af2c5c9917f
|
| d49edb7ab098fa0c82f59efbcf1b4eb2958f8dc3 |
03-Aug-2012 |
Bob Wilson <bob.wilson@apple.com> |
Fall back to selection DAG isel for calls to builtin functions.
Fast isel doesn't currently have support for translating builtin function
calls to target instructions. For embedded environments where the library
functions are not available, this is a matter of correctness and not
just optimization. Most of this patch is just arranging to make the
TargetLibraryInfo available in fast isel. <rdar://problem/12008746>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161232 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
electionDAGISel.cpp
|
| 1503aba4a036f5394c7983417bc1e64613b2fc77 |
01-Aug-2012 |
Elena Demikhovsky <elena.demikhovsky@intel.com> |
Added FMA functionality to X86 target.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161110 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 8c574be2fec59a3d80e400a9a0409b28f7f34829 |
31-Jul-2012 |
Micah Villmow <villmow@gmail.com> |
Conform to LLVM coding style.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161061 91177308-0d34-0410-b5e6-96231b3b80d8
argetLowering.cpp
|
| 683826765c45d7acd19e915a73b8c1b46c40a4eb |
31-Jul-2012 |
Micah Villmow <villmow@gmail.com> |
Don't generate ordered or unordered comparison operations if it is not legal to do so.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161053 91177308-0d34-0410-b5e6-96231b3b80d8
argetLowering.cpp
|
| 32ecfb41585d377c25c30aa4260cf007c1b0d5ce |
30-Jul-2012 |
Pete Cooper <peter_cooper@apple.com> |
Consider address spaces for hashing and CSEing DAG nodes. Otherwise two loads from different x86 segments but the same address would get CSEd
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160987 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 27db99fcee85939f0b7580ad55303c4c60a3b98d |
26-Jul-2012 |
Dan Gohman <gohman@apple.com> |
Add a floor intrinsic.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160791 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| ea0ca846478b8296f679afa419f2ad4e28073ad5 |
24-Jul-2012 |
Craig Topper <craig.topper@gmail.com> |
Change llvm_unreachable in SplitVectorOperand to report_fatal_error. Keeps release builds from crashing if code uses an intrinsic with an illegal type.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160661 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeVectorTypes.cpp
|
| c8e41c591741b3da1077f7000274ad040bef8002 |
23-Jul-2012 |
Sylvestre Ledru <sylvestre@debian.org> |
Fix a typo (the the => the)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160621 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGRRList.cpp
|
| ed1a335ece5c83230af662580e69008ed6fcca17 |
23-Jul-2012 |
Nadav Rotem <nadav.rotem@intel.com> |
Fixed DAGCombine optimizations which generate select_cc for targets
that do not support it (X86 does not lower select_cc).
PR: 13428
Together with Michael Kuperstein <michael.m.kuperstein@intel.com>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160619 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| f093393b9a65eae6b04c487784cb8256b15b790e |
23-Jul-2012 |
Craig Topper <craig.topper@gmail.com> |
Tidy up. Fix indentation and remove trailing whitespace.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160617 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeVectorTypes.cpp
|
| 200e04c3fdbdbdb671e29691ee201f34805e4dd1 |
23-Jul-2012 |
Craig Topper <craig.topper@gmail.com> |
Change llvm_unreachable in SplitVectorResult to report_fatal_error. Keeps release builds from crashing if code uses an intrinsic with an illegal type. For instance 256-bit AVX intrinsics without having AVX enabled.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160616 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeVectorTypes.cpp
|
| b26e2916c937d03bc2d7e273b2df4ffccdb061b4 |
19-Jul-2012 |
Benjamin Kramer <benny.kra@googlemail.com> |
Replace some explicit compare loops with std::equal.
No functionality change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160501 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 72ea0c9ffaa1700730c8ce36e9b73aef4b914988 |
19-Jul-2012 |
Galina Kistanova <gkistanova@gmail.com> |
Fixed few warnings.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160493 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| 96cb1128528a512f1ef9c28ae5e1b78a98dcc505 |
19-Jul-2012 |
Bill Wendling <isanbard@gmail.com> |
Remove tabs.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160475 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
egalizeIntegerTypes.cpp
electionDAGBuilder.cpp
argetLowering.cpp
|
| 4532bf6ecf39d02b60d4c77f807c2f04e51e3583 |
18-Jul-2012 |
Nuno Lopes <nunoplopes@sapo.pt> |
ignore 'invoke @llvm.donothing', but still keep the edge to the continuation BB
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160411 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| a9e13ba3c8230073dd1157e4a17ef52906ac6cb8 |
17-Jul-2012 |
Evan Cheng <evan.cheng@apple.com> |
Back out r160101 and instead implement a dag combine to recover from instcombine transformation.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160387 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| de39671ebb1151b15bb7f3703fdc78061c68763e |
17-Jul-2012 |
Benjamin Kramer <benny.kra@googlemail.com> |
Remove unused variable.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160372 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeIntegerTypes.cpp
|
| 5589a69f0abd39e583786515cf6c9170554dc8de |
17-Jul-2012 |
Nadav Rotem <nadav.rotem@intel.com> |
Fix a crash in the legalization of large vectors.
When truncating a result of a vector that is split we need
to use the result of the split vector, and not re-split the dead node.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160357 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeIntegerTypes.cpp
|
| f5c0539092996771824893309f311378e719e32e |
17-Jul-2012 |
Evan Cheng <evan.cheng@apple.com> |
Implement r160312 as target indepedenet dag combine.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160354 91177308-0d34-0410-b5e6-96231b3b80d8
argetLowering.cpp
|
| b4d4959fdda7afdf7994d3cb0b20c052ad0c7895 |
17-Jul-2012 |
Evan Cheng <evan.cheng@apple.com> |
Make sure constant bitwidth is <= 64 bit before calling getSExtValue().
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160350 91177308-0d34-0410-b5e6-96231b3b80d8
argetLowering.cpp
|
| 70e10d3fe4c5df189348f64fce56254a5a32b51c |
17-Jul-2012 |
Evan Cheng <evan.cheng@apple.com> |
This is another case where instcombine demanded bits optimization created
large immediates. Add dag combine logic to recover in case the large
immediates doesn't fit in cmp immediate operand field.
int foo(unsigned long l) {
return (l>> 47) == 1;
}
we produce
%shr.mask = and i64 %l, -140737488355328
%cmp = icmp eq i64 %shr.mask, 140737488355328
%conv = zext i1 %cmp to i32
ret i32 %conv
which codegens to
movq $0xffff800000000000,%rax
andq %rdi,%rax
movq $0x0000800000000000,%rcx
cmpq %rcx,%rax
sete %al
movzbl %al,%eax
ret
TargetLowering::SimplifySetCC would transform
(X & -256) == 256 -> (X >> 8) == 1
if the immediate fails the isLegalICmpImmediate() test. For x86,
that's immediates which are not a signed 32-bit immediate.
Based on a patch by Eli Friedman.
PR10328
rdar://9758774
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160346 91177308-0d34-0410-b5e6-96231b3b80d8
argetLowering.cpp
|
| c76fa8937d483ae83f94d0793254dbab78877687 |
16-Jul-2012 |
Nadav Rotem <nadav.rotem@intel.com> |
Minor cleanup and docs.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160311 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeVectorTypes.cpp
|
| 7ee0e5ae6093dba18ecc5eaafb91e8fa82f4c409 |
16-Jul-2012 |
Nadav Rotem <nadav.rotem@intel.com> |
Make ComputeDemandedBits return a deterministic result when computing an AssertZext value.
In the added testcase the constant 55 was behind an AssertZext of type i1, and ComputeDemandedBits
reported that some of the bits were both known to be one and known to be zero.
Together with Michael Kuperstein <michael.m.kuperstein@intel.com>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160305 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 46646572f76513e39bcdd0e06c66668ec1caf5bc |
15-Jul-2012 |
Nadav Rotem <nadav.rotem@intel.com> |
Fix a bug in the scalarization of BUILD_VECTOR. BUILD_VECTOR elements may be wider than the output element type. Make sure to trunc them if needed.
Together with Michael Kuperstein <michael.m.kuperstein@intel.com>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160235 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeTypes.h
egalizeVectorTypes.cpp
|
| b87bdac6a3de4ab83e23bf808f990e4bb7eade5e |
15-Jul-2012 |
Nadav Rotem <nadav.rotem@intel.com> |
Refactor the code that checks that all operands of a node are UNDEFs.
Add a micro-optimization to getNode of CONCAT_VECTORS when both operands are undefs.
Can't find a testcase for this because VECTOR_SHUFFLE already handles undef operands, but Duncan suggested that we add this.
Together with Michael Kuperstein <michael.m.kuperstein@intel.com>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160229 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
electionDAG.cpp
|
| b7e230d999deec5c90ee51a7c2bbc6ee5be0a914 |
14-Jul-2012 |
Nadav Rotem <nadav.rotem@intel.com> |
Add a dagcombine optimization to convert concat_vectors of undefs into a single undef.
The unoptimized concat_vectors isd prevented the canonicalization of the vector_shuffle node.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160221 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| f51f1a7dd60d1f7ceab2d5819a44ffe860db0389 |
13-Jul-2012 |
Jim Grosbach <grosbach@apple.com> |
Provide function name in 'Cannot select' fatal error.
When dumping the DAG for a fatal 'Cannot select' back-end error, also
provide the name of the function the construct is in. Useful when dealing
with large testcases, as the next step is to llvm-extract the function
in question to get a small(er) testcase.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160152 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 4e8982a34da69effe23ce9c553680b19d7d57551 |
12-Jul-2012 |
Duncan Sands <baldrick@free.fr> |
The result type of EXTRACT_VECTOR_ELT doesn't have to match the element type of
the input vector, it can be bigger (this is helpful for powerpc where <2 x i16>
is a legal vector type but i16 isn't a legal type, IIRC). However this wasn't
being taken into account by ExpandRes_EXTRACT_VECTOR_ELT, causing PR13220.
Lightly tweaked version of a patch by Michael Liao.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160116 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeTypesGeneric.cpp
|
| 875913439ca8f073852ec8315d3b32b875184582 |
11-Jul-2012 |
Evan Cheng <evan.cheng@apple.com> |
InstrEmitter::EmitSubregNode() optimize extract_subreg in this case:
r1025 = s/zext r1024, 4
r1026 = extract_subreg r1025, 4
to a copy:
r1026 = copy r1024
This is correct. However it uses TII->isCoalescableExtInstr() which can return
true for instructions which essentially does a sext_in_reg so this can end up
with an illegal copy where the source and destination register classes do not
match. Add a check to avoid it. Sorry, no test case possible at this time.
rdar://11849816
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160059 91177308-0d34-0410-b5e6-96231b3b80d8
nstrEmitter.cpp
|
| 4b24bf8da340ba30585777ab656c83752a5e3e6a |
11-Jul-2012 |
Nadav Rotem <nadav.rotem@intel.com> |
Rename many of the Tmp1, Tmp2, Tmp3 variables to names such as Chain, Value, Ptr, etc.
No functionality change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160042 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| a67306d21f235f14d99d31fa211536ad652086b1 |
11-Jul-2012 |
Benjamin Kramer <benny.kra@googlemail.com> |
Remove unused variable.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160040 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| b6e89f0471c70215565f3d236d09732cd184c0ee |
11-Jul-2012 |
Nadav Rotem <nadav.rotem@intel.com> |
Refactor the DAG Legalizer by extracting the legalization of
Load and Store nodes into their own functions.
No functional change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160037 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 45299995d6a1273d644d127b4aeaf4e7eb365292 |
11-Jul-2012 |
Owen Anderson <resistor@mac.com> |
Only apply the SETCC+SITOFP -> SELECTCC optimization when the SETCC returns an MVT::i1, i.e. before type legalization.
This is a speculative fix for a problem on Mips reported by Akira Hatanaka.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160036 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 2dd83eb1ab3b7d7cdef2e244317caefd78be8a45 |
10-Jul-2012 |
Nadav Rotem <nadav.rotem@intel.com> |
Improve the loading of load-anyext vectors by allowing the codegen to load
multiple scalars and insert them into a vector. Next, we shuffle the elements
into the correct places, as before.
Also fix a small dagcombine bug in SimplifyBinOpWithSameOpcodeHands, when the
migration of bitcasts happened too late in the SelectionDAG process.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159991 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| d9bf71fdd26475f4629ef8861debfd2c621a372f |
09-Jul-2012 |
Owen Anderson <resistor@mac.com> |
Teach the DAG combiner to turn sitofp/uitofp from i1 into a conditional move, since there are only two possible values.
Previously, this would become an integer extension operation, followed by a real integer->float conversion.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159957 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 2661b411ccc81b1fe19194d3f43b2630cbef3f28 |
07-Jul-2012 |
Andrew Trick <atrick@apple.com> |
I'm introducing a new machine model to simultaneously allow simple
subtarget CPU descriptions and support new features of
MachineScheduler.
MachineModel has three categories of data:
1) Basic properties for coarse grained instruction cost model.
2) Scheduler Read/Write resources for simple per-opcode and operand cost model (TBD).
3) Instruction itineraties for detailed per-cycle reservation tables.
These will all live side-by-side. Any subtarget can use any
combination of them. Instruction itineraries will not change in the
near term. In the long run, I expect them to only be relevant for
in-order VLIW machines that have complex contraints and require a
precise scheduling/bundling model. Once itineraries are only actively
used by VLIW-ish targets, they could be replaced by something more
appropriate for those targets.
This tablegen backend rewrite sets things up for introducing
MachineModel type #2: per opcode/operand cost model.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159891 91177308-0d34-0410-b5e6-96231b3b80d8
esourcePriorityQueue.cpp
|
| 6016a4a1627726b7419e1c95c6c3e67138100d23 |
06-Jul-2012 |
Chad Rosier <mcrosier@apple.com> |
Whitespace.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159839 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
|
| fd065bbed1d731b49b1b4a5c4c050ce461be80b4 |
06-Jul-2012 |
Chad Rosier <mcrosier@apple.com> |
[fast-isel] Tell fast-isel to do nothing with the new donothing intrinsic.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159837 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
|
| 483c54b811badbfcaa040cdb6d84cf564afe75cf |
05-Jul-2012 |
Duncan Sands <baldrick@free.fr> |
All cases are covered, no need for a default. This deals with the
corresponding clang warning.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159742 91177308-0d34-0410-b5e6-96231b3b80d8
argetLowering.cpp
|
| e7de3b29f79b147a8f06e6edff0c54149d638139 |
05-Jul-2012 |
Duncan Sands <baldrick@free.fr> |
Use the right kind of booleans: we were emitting 0/1 booleans, instead of 0/-1
booleans. Patch by James Benton.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159739 91177308-0d34-0410-b5e6-96231b3b80d8
argetLowering.cpp
|
| 33a537a5c41e60507ac9a4ea987c1a395cbb74fe |
05-Jul-2012 |
Jakob Stoklund Olesen <stoklund@2pi.dk> |
Allow trailing physreg RegisterSDNode operands on non-variadic instructions.
Also allow trailing register mask operands on non-variadic both
MachineSDNodes and MachineInstrs.
The extra physreg RegisterSDNode operands are added to the MI as
<imp-use> operands. This makes it possible to have non-variadic call
instructions.
Call and return instructions really are non-variadic, the argument
registers should only be used implicitly - they are not part of the
encoding.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159727 91177308-0d34-0410-b5e6-96231b3b80d8
nstrEmitter.cpp
nstrEmitter.h
|
| 66d79cefcb742bdbfef8823ac8491a7ebc4af5a7 |
04-Jul-2012 |
Stepan Dyatkovskiy <stpworld@narod.ru> |
Reverted r156659, due to probable performance regressions, DenseMap should be used here:
IntegersSubsetMapping
- Replaced type of Items field from std::list with std::map. In neares future I'll test it with DenseMap and do the correspond replacement
if possible.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159703 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| 6a590737355e82d83729198715e3fff11b0c6f9e |
03-Jul-2012 |
Stepan Dyatkovskiy <stpworld@narod.ru> |
Part of r159527. Splitted into series of patches and gone with fixed PR13256:
IntegersSubsetMapping
- Replaced type of Items field from std::list with std::map. In neares future I'll test it with DenseMap and do the correspond replacement
if possible.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159659 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| c723eb1aef817d47feec620933ee1ec6005cdd14 |
03-Jul-2012 |
Eric Christopher <echristo@apple.com> |
Revert "IntRange:" as it appears to be breaking self hosting.
This reverts commit b2833d9dcba88c6f0520cad760619200adc0442c.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159618 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| 769951f6cc6323821ce1e9f46a37817a541c884f |
03-Jul-2012 |
Evan Cheng <evan.cheng@apple.com> |
Target option DisableJumpTables is a gross hack. Move it to TargetLowering instead.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159611 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
argetLowering.cpp
|
| 9eb4f8a3e665e0fe37509e632b97877b29b3c106 |
02-Jul-2012 |
Eric Christopher <echristo@apple.com> |
Turn an assert into an error to make it a bit more friendly.
Part of rdar://6880388 and rdar://11766377
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159590 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| b2833d9dcba88c6f0520cad760619200adc0442c |
02-Jul-2012 |
Stepan Dyatkovskiy <stpworld@narod.ru> |
IntRange:
- Changed isSingleNumber method behaviour. Now this flag is calculated on demand.
IntegersSubsetMapping
- Optimized diff operation.
- Replaced type of Items field from std::list with std::map.
- Added new methods:
bool isOverlapped(self &RHS)
void add(self& RHS, SuccessorClass *S)
void detachCase(self& NewMapping, SuccessorClass *Succ)
void removeCase(SuccessorClass *Succ)
SuccessorClass *findSuccessor(const IntTy& Val)
const IntTy* getCaseSingleNumber(SuccessorClass *Succ)
IntegersSubsetTest
- DiffTest: Added checks for successors.
SimplifyCFG
Updated SwitchInst usage (now it is case-ragnes compatible) for
- SimplifyEqualityComparisonWithOnlyPredecessor
- FoldValueComparisonIntoPredecessors
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159527 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| 8ccaad526abdf39141b11b6d480b027d73a2d2a8 |
29-Jun-2012 |
Jakob Stoklund Olesen <stoklund@2pi.dk> |
Clear kill flags in InstrEmitter::EmitSubregNode().
When a local virtual register is made global, make sure to clear any
existing kill flags.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159461 91177308-0d34-0410-b5e6-96231b3b80d8
nstrEmitter.cpp
|
| 85b408991aff28ffa4e9e113a5a8a35b0db505c2 |
29-Jun-2012 |
Nuno Lopes <nunoplopes@sapo.pt> |
add a new @llvm.donothing intrinsic that, well, does nothing, and teach CodeGen to ignore calls to it
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159383 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| 926dc168c893e1848a18e45fd78f9b99d6f4cd5d |
28-Jun-2012 |
Jim Grosbach <grosbach@apple.com> |
'Promote' vector [su]int_to_fp should widen elements.
Teach vector legalization how to honor Promote for int to float
conversions. The code checking whether to promote the operation knew
to look at the operand, but the actual promotion code didn't. This
fixes that. The operand is promoted up via [zs]ext.
rdar://11762659
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159378 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeVectorOps.cpp
|
| 0bcbd1df7a204e1e512f1a27066d725309de1b13 |
28-Jun-2012 |
Bill Wendling <isanbard@gmail.com> |
Move lib/Analysis/DebugInfo.cpp to lib/VMCore/DebugInfo.cpp and
include/llvm/Analysis/DebugInfo.h to include/llvm/DebugInfo.h.
The reasoning is because the DebugInfo module is simply an interface to the
debug info MDNodes and has nothing to do with analysis.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159312 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
unctionLoweringInfo.cpp
egalizeDAG.cpp
electionDAG.cpp
electionDAGBuilder.cpp
electionDAGDumper.cpp
electionDAGISel.cpp
electionDAGPrinter.cpp
|
| 16436dffb50fac4677c7162639f8da0b73eb4e99 |
26-Jun-2012 |
Evan Cheng <evan.cheng@apple.com> |
Make sure type is not extended or untyped before create a constant of the type. No test case. Found by inspection.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159179 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| d5c407d2d01ff8797c29343e4da5f765fe52fb5f |
24-Jun-2012 |
NAKAMURA Takumi <geek4civic@gmail.com> |
llvm/lib: [CMake] Add explicit dependency to intrinsics_gen.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159112 91177308-0d34-0410-b5e6-96231b3b80d8
MakeLists.txt
|
| b49998d76cb4e414d13d60116adf13b085d85dc1 |
24-Jun-2012 |
Pete Cooper <peter_cooper@apple.com> |
DAG legalisation can now handle illegal fma vector types by scalarisation
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159092 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeTypes.h
egalizeVectorTypes.cpp
|
| e0231413225cf47aaf3238bf21afd0d59025028d |
22-Jun-2012 |
Lang Hames <lhames@gmail.com> |
Rename -allow-excess-fp-precision flag to -fuse-fp-ops, and switch from a
boolean flag to an enum: { Fast, Standard, Strict } (default = Standard).
This option controls the creation by optimizations of fused FP ops that store
intermediate results in higher precision than IEEE allows (E.g. FMAs). The
behavior of this option is intended to match the behaviour specified by a
soon-to-be-introduced frontend flag: '-ffuse-fp-ops'.
Fast mode - allows formation of fused FP ops whenever they're profitable.
Standard mode - allow fusion only for 'blessed' FP ops. At present the only
blessed op is the fmuladd intrinsic. In the future more blessed ops may be
added.
Strict mode - allow fusion only if/when it can be proven that the excess
precision won't effect the result.
Note: This option only controls formation of fused ops by the optimizers. Fused
operations that are explicitly requested (e.g. FMA via the llvm.fma.* intrinsic)
will always be honored, regardless of the value of this option.
Internally TargetOptions::AllowExcessFPPrecision has been replaced by
TargetOptions::AllowFPOpFusion.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@158956 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
electionDAGBuilder.cpp
|
| 438c04027bb5f219e8d77770828a555c42fd1d7c |
21-Jun-2012 |
Pete Cooper <peter_cooper@apple.com> |
Fix potential crash if DAGCombine on stores sees a half type
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@158927 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 8ef0968dc230f6fae8fcbd6dc4a5cb9ccc780b6b |
21-Jun-2012 |
Evan Cheng <evan.cheng@apple.com> |
Emit a single _udivmodsi4 libcall instead of two separate _udivsi3 and
_umodsi3 libcalls if they have the same arguments. This optimization
was apparently broken if one of the node was replaced in place.
rdar://11714607
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@158900 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 3affd9e8f366f241adbbc57ef53489ff2052db4f |
20-Jun-2012 |
Pete Cooper <peter_cooper@apple.com> |
Add users of a MERGE_VALUE node to the worklist to process again when the node is removed. Sorry, no test case. Foudn it by inspection of the code
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@158839 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| d65e463ff9327d168e8389e5c9a9f16a601be8a5 |
20-Jun-2012 |
Hal Finkel <hfinkel@anl.gov> |
Fix DAGCombine to deal with ext-conversion of pre/post_inc loads.
The test case for this will come with the PPC indexed preinc loads commit.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@158822 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| d693cafcfb9e67ba7040cb810e4409a166421482 |
20-Jun-2012 |
Lang Hames <lhames@gmail.com> |
Add DAG-combines for aggressive FMA formation.
This patch adds DAG combines to form FMAs from pairs of FADD + FMUL or
FSUB + FMUL. The combines are performed when:
(a) Either
AllowExcessFPPrecision option (-enable-excess-fp-precision for llc)
OR
UnsafeFPMath option (-enable-unsafe-fp-math)
are set, and
(b) TargetLoweringInfo::isFMAFasterThanMulAndAdd(VT) is true for the type of
the FADD/FSUB, and
(c) The FMUL only has one user (the FADD/FSUB).
If your target has fast FMA instructions you can make use of these combines by
overriding TargetLoweringInfo::isFMAFasterThanMulAndAdd(VT) to return true for
types supported by your FMA instruction, and adding patterns to match ISD::FMA
to your FMA instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@158757 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 0180694b2f416e2247af1d284d701b19e1431a6c |
14-Jun-2012 |
Lang Hames <lhames@gmail.com> |
Make comment slightly more helpful.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@158467 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| b7e0289fb320c8440ba5eed121a8b932dbd806a2 |
05-Jun-2012 |
Andrew Trick <atrick@apple.com> |
misched: API for minimum vs. expected latency.
Minimum latency determines per-cycle scheduling groups.
Expected latency determines critical path and cost.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@158021 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGSDNodes.h
|
| 5afba6f00c3e2eef83aebbcff5fcfca2fa3c978e |
05-Jun-2012 |
Lang Hames <lhames@gmail.com> |
Add a new intrinsic: llvm.fmuladd. This intrinsic represents a multiply-add
expression (a * b + c) that can be implemented as a fused multiply-add (fma)
if the target determines that this will be more efficient. This intrinsic
will be used to implement FP_CONTRACT support and an aggressive FMA formation
mode.
If your target has a fast FMA instruction you should override the
isFMAFasterThanMulAndAdd method in TargetLowering to return true.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@158014 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| fc992996f751e0941951b6d08d8f1e80ebec1385 |
05-Jun-2012 |
Andrew Trick <atrick@apple.com> |
misched: Added MultiIssueItineraries.
This allows a subtarget to explicitly specify the issue width and
other properties without providing pipeline stage details for every
instruction.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157979 91177308-0d34-0410-b5e6-96231b3b80d8
esourcePriorityQueue.cpp
|
| 4eb4e5eb224b3d737558bcda8a0a369cc9d800e6 |
05-Jun-2012 |
Andrew Trick <atrick@apple.com> |
sdsched: Use the right heuristics when -mcpu is not provided and we have no itinerary.
Use ILP heuristics for long latency instrs if no scoreboard exists.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157978 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGRRList.cpp
|
| fcb2c3cf5e8ee421fd3a5639cc4a33036e9a614e |
04-Jun-2012 |
Nadav Rotem <nadav.rotem@intel.com> |
Remove the "-promote-elements" flag. This flag is now enabled by default.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157925 91177308-0d34-0410-b5e6-96231b3b80d8
argetLowering.cpp
|
| d9b0b025612992a0b724eeca8bdf10b1d7a5c355 |
02-Jun-2012 |
Benjamin Kramer <benny.kra@googlemail.com> |
Fix typos found by http://github.com/lyda/misspell-check
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157885 91177308-0d34-0410-b5e6-96231b3b80d8
esourcePriorityQueue.cpp
electionDAGBuilder.cpp
electionDAGBuilder.h
argetLowering.cpp
|
| 43eb31bfae470b33bab9a6764b98b5e8a0beeda5 |
02-Jun-2012 |
Stepan Dyatkovskiy <stpworld@narod.ru> |
PR1255: case ranges.
IntRange converted from struct to class. So main change everywhere is replacement of ".Low/High" with ".getLow/getHigh()"
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157884 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| 4319a552ac98137d511341905711293d541f15e7 |
02-Jun-2012 |
Stepan Dyatkovskiy <stpworld@narod.ru> |
PR1255: case ranges.
IntegersSubsetGeneric, IntegersSubsetMapping: added IntTy template parameter, that allows use either APInt or IntItem. This change allows to write unittest for these classes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157880 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| 55a105160dc02a0d990a69820cfe63fef504195e |
02-Jun-2012 |
Akira Hatanaka <ahatanaka@mips.com> |
Fix a bug in the code which custom-lowers truncating stores in LegalizeDAG.
Check that the SDValue TargetLowering::LowerOperation returns is not null
before replacing the original node with the returned node.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157873 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 396618b43a85e12d290a90b181c6af5d7c0c5f11 |
02-Jun-2012 |
Jakob Stoklund Olesen <stoklund@2pi.dk> |
Switch all register list clients to the new MC*Iterator interface.
No functional change intended.
Sorry for the churn. The iterator classes are supposed to help avoid
giant commits like this one in the future. The TableGen-produced
register lists are getting quite large, and it may be necessary to
change the table representation.
This makes it possible to do so without changing all clients (again).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157854 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGRRList.cpp
|
| 8c70ea47fae6d61441d150cbe9431cf5e06222e5 |
02-Jun-2012 |
Jakob Stoklund Olesen <stoklund@2pi.dk> |
Simplify some more getAliasSet callers.
MCRegAliasIterator can include Reg itself in the list.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157848 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGFast.cpp
|
| 68f25571e759c1fcf2da206109647259f49f7416 |
01-Jun-2012 |
Manman Ren <mren@apple.com> |
ARM: properly handle alignment for struct byval.
Factor out the expansion code into a function.
This change is to be enabled in clang.
rdar://9877866
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157830 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
|
| 6bb5c0074dc4cede2ad8efd420ec91288f91b012 |
01-Jun-2012 |
Stepan Dyatkovskiy <stpworld@narod.ru> |
PR1255: case ranges.
IntegersSubset devided into IntegersSubsetGeneric and into IntegersSubset itself. The first has no references to ConstantInt and works with IntItem only.
IntegersSubsetMapping also made generic. Here added second template parameter "IntegersSubsetTy" that allows to use on of two IntegersSubset types described below.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157815 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| f917d20561688ca79fab5a58feb495e332f84903 |
30-May-2012 |
Owen Anderson <resistor@mac.com> |
Switch the canonical FMA term operand order to match both the comment I wrote and the usual LLVM convention.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157708 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 85ef6f4c99aee3c2ed43bbe6d190541f283a7e43 |
30-May-2012 |
Owen Anderson <resistor@mac.com> |
Teach DAGCombine to canonicalize the position of a constant in the term operands of an FMA node.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157707 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 0aa32d5d0ff6cd65b6cff957858a79e2d2a614bd |
29-May-2012 |
Stepan Dyatkovskiy <stpworld@narod.ru> |
ConstantRangesSet renamed to IntegersSubset. CRSBuilder renamed to IntegersSubsetMapping.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157612 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| b34d3aa35b199969168f41a12e92e5d2f0e9367f |
28-May-2012 |
Peter Collingbourne <peter@pcc.me.uk> |
Add llvm.fabs intrinsic.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157594 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| 484fc93eff0295b1aa52b9a64d22346580e4b0e2 |
28-May-2012 |
Stepan Dyatkovskiy <stpworld@narod.ru> |
PR1255: Case Ranges
Implemented IntItem - the wrapper around APInt. Why not to use APInt item directly right now?
1. It will very difficult to implement case ranges as series of small patches. We got several large and heavy patches. Each patch will about 90-120 kb. If you replace ConstantInt with APInt in SwitchInst you will need to changes at the same time all Readers,Writers and absolutely all passes that uses SwitchInst.
2. We can implement APInt pool inside and save memory space. E.g. we use several switches that works with 256 bit items (switch on signatures, or strings). We can avoid value duplicates in this case.
3. IntItem can be easyly easily replaced with APInt.
4. Currenly we can interpret IntItem both as ConstantInt and as APInt. It allows to provide SwitchInst methods that works with ConstantInt for non-updated passes.
Why I need it right now? Currently I need to update SimplifyCFG pass (EqualityComparisons). I need to work with APInts directly a lot, so peaces of code
ConstantInt *V = ...;
if (V->getValue().ugt(AnotherV->getValue()) {
...
}
will look awful. Much more better this way:
IntItem V = ConstantIntVal->getValue();
if (AnotherV < V) {
}
Of course any reviews are welcome.
P.S.: I'm also going to rename ConstantRangesSet to IntegersSubset, and CRSBuilder to IntegersSubsetMapping (allows to map individual subsets of integers to the BasicBlocks).
Since in future these classes will founded on APInt, it will possible to use them in more generic ways.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157576 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| cf1d69df7e39a45fd1c7a07452271c586580164e |
27-May-2012 |
Benjamin Kramer <benny.kra@googlemail.com> |
Missed parens.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157527 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| 4fae58b32d4ff88f2df093514a0986c79e0c9e2c |
27-May-2012 |
Benjamin Kramer <benny.kra@googlemail.com> |
r157525 didn't work, just disable iterator checking.
This is obviosly right but I don't see how to do this with proper vector
iterators without building a horrible mess of workarounds.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157526 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| dc54f8ebe288c7313e22902d4bdfe030e479db48 |
27-May-2012 |
Benjamin Kramer <benny.kra@googlemail.com> |
SDAGBuilder: Avoid iterator invalidation harder.
vector.begin()-1 is invalid too.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157525 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| 5db954dab9a9e3c57c6e5194bf902a34a458d555 |
26-May-2012 |
Benjamin Kramer <benny.kra@googlemail.com> |
SDAGBuilder: Don't create an invalid iterator when there is only one switch case.
Found by libstdc++'s debug mode.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157522 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| c511b2a5a1b91f08be6572ca7d7215c261176bc4 |
26-May-2012 |
Benjamin Kramer <benny.kra@googlemail.com> |
SelectionDAGBuilder: When emitting small compare chains for switches order them by using edge weights.
SimplifyCFG tends to form a lot of 2-3 case switches when merging branches. Move
the most likely condition to the front so it is checked first and the others can
be skipped. This is currently not as effective as it could be because SimplifyCFG
destroys profiling metadata when merging branches and switches. Merging branch
weight metadata is tricky though.
This code touches at most 3 cases so I didn't use a proper sorting algorithm.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157521 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| d2ea0e10cbd158c93fb870cdd03001b9cd1156b8 |
25-May-2012 |
Justin Holewinski <jholewinski@nvidia.com> |
Change interface for TargetLowering::LowerCallTo and TargetLowering::LowerCall
to pass around a struct instead of a large set of individual values. This
cleans up the interface and allows more information to be added to the struct
for future targets without requiring changes to each and every target.
NV_CONTRIB
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157479 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
egalizeIntegerTypes.cpp
egalizeTypes.cpp
electionDAG.cpp
electionDAGBuilder.cpp
|
| 2db0e9ebb600a2e6b8f651f66a1ef50e0d3c3c6b |
25-May-2012 |
Eli Friedman <eli.friedman@gmail.com> |
Simplify code for calling a function where CanLowerReturn fails, fixing a small bug in the process.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157446 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
argetLowering.cpp
|
| e32981048244ecfa67d0bdc211af1bac2020a555 |
24-May-2012 |
Craig Topper <craig.topper@gmail.com> |
Mark some static arrays as const.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157377 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGRRList.cpp
|
| 4b6e6750fed37879ce4730571cae1bfa342e8e02 |
22-May-2012 |
Owen Anderson <resistor@mac.com> |
Fix use of an unitialized value in the LegalizeOps expansion for ISD::SUB. No in-tree targets exercise this path.
Patch by Micah Villmow.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157215 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| f496deaa03cec32887f2365ff27b5f0adfd9d256 |
21-May-2012 |
Chad Rosier <mcrosier@apple.com> |
Typo.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157195 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 92d63ccfc7d86d39bc0b806bf7e9fac13dd2d7b5 |
20-May-2012 |
Peter Collingbourne <peter@pcc.me.uk> |
When legalising shifts, do not pre-build a list of operands which
may be RAUW'd by the recursive call to LegalizeOps; instead, retrieve
the other operands when calling UpdateNodeOperands. Fixes PR12889.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157162 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| ee0d5d4398fb855c6674da94d902ef45e944f375 |
20-May-2012 |
Jakob Stoklund Olesen <stoklund@2pi.dk> |
Properly constrain register classes for sub-registers.
Not all GR64 registers have sub_8bit sub-registers.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157150 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
|
| 05cfe2eda63e54a1e4c84b15136d154ab6393304 |
18-May-2012 |
Stepan Dyatkovskiy <stpworld@narod.ru> |
Recommited reworked r156804:
SelectionDAGBuilder::Clusterify : main functinality was replaced with CRSBuilder::optimize, so big part of Clusterify's code was reduced.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157046 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
electionDAGBuilder.h
|
| c187df2198bc6e2b038fa2d75af974644874d26f |
17-May-2012 |
Stepan Dyatkovskiy <stpworld@narod.ru> |
SelectionDAGBuilder: CaseBlock, CaseRanges and CaseCmp changed representation of Low and High from signed to unsigned. Since unsigned ints usually simpler, faster and allows to reduce some extra signed bit checks needed before <,>,<=,>= comparisons.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156985 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
electionDAGBuilder.h
|
| 04b2c5042727b091ad425110d952491a40c88ee3 |
16-May-2012 |
Duncan Sands <baldrick@free.fr> |
Fix a thinko in DisintegrateMERGE_VALUES. Patch by Xiaoyi Guo.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156909 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeTypes.cpp
egalizeTypes.h
|
| c2c52a647098e72558f1831b7502a79fd22ead31 |
15-May-2012 |
Stepan Dyatkovskiy <stpworld@narod.ru> |
Rejected r156804 due to buildbots failures.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156808 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| a62e235c1c539aef38b94029035b46bd82f12357 |
15-May-2012 |
Stepan Dyatkovskiy <stpworld@narod.ru> |
SelectionDAGBuilder::Clusterify : main functinality was replaced with CRSBuilder::optimize, so big part of Clusterify's code was reduced.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156804 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| a6063c6e29746d9425bdf46d680e28a48dcf58f9 |
14-May-2012 |
Dan Gohman <gohman@apple.com> |
Rename @llvm.debugger to @llvm.debugtrap.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156774 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
electionDAGDumper.cpp
|
| aefd36bdda0dac496b8acabb25f0de29b370ebca |
12-May-2012 |
Chad Rosier <mcrosier@apple.com> |
Revert 156658.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156662 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
|
| 550a08a876760e305dab25bd22f28acf8ffdeb18 |
12-May-2012 |
Chad Rosier <mcrosier@apple.com> |
[fast-isel] Fast-isel doesn't use the expect intrinsic.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156658 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
|
| d4347e1af9141ec9f8e3e527367bfd16c0cc4ffb |
11-May-2012 |
Dan Gohman <gohman@apple.com> |
Define a new intrinsic, @llvm.debugger. It will be similar to __builtin_trap(),
but it generates int3 on x86 instead of ud2.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156593 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
electionDAGDumper.cpp
|
| a249f7de5df0bb6260fdebee528221fc84092140 |
08-May-2012 |
Jim Grosbach <grosbach@apple.com> |
DAGCombiner should not change the type of an extract_vector index.
When a combine twiddles an extract_vector, care should be take to preserve
the type of the index operand. No luck extracting a reasonable testcase,
unfortunately.
rdar://11391009
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156419 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 397fc4874efe9c17e737d4c5c50bd19dc3bf27f5 |
08-May-2012 |
Jakob Stoklund Olesen <stoklund@2pi.dk> |
Add an MF argument to TRI::getPointerRegClass() and TII::getRegClass().
The getPointerRegClass() hook can return register classes that depend on
the calling convention of the current function (ptr_rc_tailcall).
So far, we have been able to infer the calling convention from the
subtarget alone, but as we add support for multiple calling conventions
per target, that no longer works.
Patch by Yiannis Tsiouris!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156328 91177308-0d34-0410-b5e6-96231b3b80d8
nstrEmitter.cpp
cheduleDAGRRList.cpp
|
| 713e953118175d693a3fddbf6a61dc73aa69ad87 |
07-May-2012 |
Owen Anderson <resistor@mac.com> |
Teach DAG combine to fold x-x to 0.0 when unsafe FP math is enabled.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156324 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| aaf723dd2bccc052d2dd28e3cc4db76f2a3e2fb0 |
05-May-2012 |
Benjamin Kramer <benny.kra@googlemail.com> |
Add a new target hook "predictableSelectIsExpensive".
This will be used to determine whether it's profitable to turn a select into a
branch when the branch is likely to be predicted.
Currently enabled for everything but Atom on X86 and Cortex-A9 devices on ARM.
I'm not entirely happy with the name of this flag, suggestions welcome ;)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156233 91177308-0d34-0410-b5e6-96231b3b80d8
argetLowering.cpp
|
| 7fc4d9cbc54c2e5393440a40b566c1f0527d8037 |
05-May-2012 |
Jakob Stoklund Olesen <stoklund@2pi.dk> |
Make sure findRepresentativeClass picks the widest super-register.
We want the representative register class to contain the largest
super-registers available. This makes the function less sensitive to the
register class numbering.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156220 91177308-0d34-0410-b5e6-96231b3b80d8
argetLowering.cpp
|
| e3ee49fb2728dcb9702b5be0c3c80f472ffccefc |
04-May-2012 |
Jakob Stoklund Olesen <stoklund@2pi.dk> |
Use SuperRegClassIterator for findRepresentativeClass().
The masks returned by SuperRegClassIterator are computed automatically
by TableGen. This is better than depending on the manually specified
SuperRegClasses.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156147 91177308-0d34-0410-b5e6-96231b3b80d8
argetLowering.cpp
|
| f12f6dff9784805e8f89309787231c1ec53a8c6e |
03-May-2012 |
Andrew Trick <atrick@apple.com> |
Added TargetRegisterInfo::getAllocatableClass.
The ensures that virtual registers always belong to an allocatable class.
If your target attempts to create a vreg for an operand that has no
allocatable register subclass, you will crash quickly.
This ensures that targets define register classes as intended.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156046 91177308-0d34-0410-b5e6-96231b3b80d8
nstrEmitter.cpp
|
| 062c0a5b58b756b91811bf3e6e978257c9fda3ff |
03-May-2012 |
Owen Anderson <resistor@mac.com> |
Teach DAGCombine the same multiply-by-1.0 folding trick when doing FMAs, just like it now knows for FMULs.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156029 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 363e4b90c0a8dfca87ac847001158c743491c06f |
02-May-2012 |
Owen Anderson <resistor@mac.com> |
Teach DAG combine that multiplication by 1.0 can always be constant folded.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156023 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| ce00b440f5d754aaf7196255bc139ce64c260e00 |
02-May-2012 |
Jakub Staszak <kubastaszak@gmail.com> |
Use dyn_cast instead of checking opcode and cast.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155957 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 95dd4420419a6daae6304ed490a50537094ed488 |
02-May-2012 |
Bill Wendling <isanbard@gmail.com> |
Strip the pointer casts off of allocas so that the selection DAG can find them.
PR10799
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155954 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| 39379c5df3a0bdcd768fc6421381ca805cd4ee21 |
01-May-2012 |
Jakub Staszak <kubastaszak@gmail.com> |
Add some constantness. No functionality change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155859 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 2674a4acdb51ce610d060b76608f631765a6e508 |
28-Apr-2012 |
Andrew Trick <atrick@apple.com> |
Reapply 155668: Fix the SD scheduler to avoid gluing the same node twice.
This time, also fix the caller of AddGlue to properly handle
incomplete chains. AddGlue had failure modes, but shamefully hid them
from its caller. It's luck ran out.
Fixes rdar://11314175: BuildSchedUnits assert.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155749 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGSDNodes.cpp
|
| 0e47cfd5b647e8480274c6b29c4e2d01c41a9e82 |
28-Apr-2012 |
Andrew Trick <atrick@apple.com> |
Temporarily revert r155668: Fix the SD scheduler to avoid gluing.
This definitely caused regression with ARM -mno-thumb.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155743 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGSDNodes.cpp
|
| aec9240be2bc0bc852167b26fd2e217355ecd745 |
26-Apr-2012 |
Andrew Trick <atrick@apple.com> |
Fix the SD scheduler to avoid gluing the same node twice.
DAGCombine strangeness may result in multiple loads from the same
offset. They both may try to glue themselves to another load. We could
insist that the redundant loads glue themselves to each other, but the
beter fix is to bail out from bad gluing at the time we detect it.
Fixes rdar://11314175: BuildSchedUnits assert.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155668 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGSDNodes.cpp
|
| cf5a1461acaace0f3e7d11fbbcfbf635b8c8ea9d |
24-Apr-2012 |
Shih-wei Liao <sliao@google.com> |
Merge with LLVM upstream r155090.
Conflicts:
lib/Support/Unix/PathV2.inc
Change-Id: I7b89833849f6cbcfa958a33a971d0f7754c9cb2c
|
| 1da5867236f4132ec56493f3535c7b5830878b55 |
22-Apr-2012 |
Elena Demikhovsky <elena.demikhovsky@intel.com> |
ZERO_EXTEND/SIGN_EXTEND/TRUNCATE optimization for AVX2
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155309 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| db3461662e7945e04fe42e0d606581bba73c29dc |
21-Apr-2012 |
Nadav Rotem <nadav.rotem@intel.com> |
Teach getVectorTypeBreakdown about promotion of vectors in addition to widening of vectors.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155296 91177308-0d34-0410-b5e6-96231b3b80d8
argetLowering.cpp
|
| 0b35c35efcc584c0a09ed70840bcca420f42be2f |
21-Apr-2012 |
Jakob Stoklund Olesen <stoklund@2pi.dk> |
Fix PR12599.
The X86 target is editing the selection DAG while isel is selecting
nodes following a topological ordering. When the DAG hacking triggers
CSE, nodes can be deleted and bad things happen.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155257 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 8c48e4ff899303eb9a4ea8ed1c43d175f0cf48ff |
21-Apr-2012 |
Jakob Stoklund Olesen <stoklund@2pi.dk> |
Make ISelPosition a local variable.
Now that multiple DAGUpdateListeners can be active at the same time,
ISelPosition can become a local variable in DoInstructionSelection.
We simply register an ISelUpdater with CurDAG while ISelPosition exists.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155249 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| bc7d448f242b1bbc1031fb87cd69c285ff9aaffa |
21-Apr-2012 |
Jakob Stoklund Olesen <stoklund@2pi.dk> |
Register DAGUpdateListeners with SelectionDAG.
Instead of passing listener pointers to RAUW, let SelectionDAG itself
keep a linked list of interested listeners.
This makes it possible to have multiple listeners active at once, like
RAUWUpdateListener was already doing. It also makes it possible to
register listeners up the call stack without controlling all RAUW calls
below.
DAGUpdateListener uses an RAII pattern to add itself to the SelectionDAG
list of active listeners.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155248 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
egalizeDAG.cpp
egalizeTypes.cpp
egalizeTypes.h
electionDAG.cpp
electionDAGISel.cpp
|
| d16ce17711e8e6231363fe1fd47800570b75d61d |
18-Apr-2012 |
Joel Jones <joel_k_jones@apple.com> |
Fixes a problem in instruction selection with testing whether or not the
transformation:
(X op C1) ^ C2 --> (X op C1) & ~C2 iff (C1&C2) == C2
should be done.
This change has been tested:
Using a debug+asserts build:
on the specific test case that brought this bug to light
make check-all
lnt nt
using this clang to build a release version of clang
Using the release+asserts clang-with-clang build:
on the specific test case that brought this bug to light
make check-all
lnt nt
Checking in because Evan wants it checked in. Test case forthcoming after
scrubbing.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154955 91177308-0d34-0410-b5e6-96231b3b80d8
argetLowering.cpp
|
| 31490baf38680012000890dcb11ac4914ec94911 |
16-Apr-2012 |
Hal Finkel <hfinkel@anl.gov> |
Remove dead SD nodes after the combining pass. Fixes PR12201.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154786 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 3ab32ea49ec13182f1397dc89c37551692f67140 |
15-Apr-2012 |
Nadav Rotem <nadav.rotem@intel.com> |
When emulating vselect using OR/AND/XOR make sure to bitcast the result back to the original type.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154764 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeVectorOps.cpp
|
| 2e506198c8cc7eec8f2f4fb4719a07daef17f931 |
11-Apr-2012 |
Nadav Rotem <nadav.rotem@intel.com> |
Reapply 154397. Original message:
Fix a dagcombine optimization which assumes that the vsetcc result type is always
of the same size as the compared values. This is ture for SSE/AVX/NEON but not
for all targets.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154490 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 7eb46d834ccca887ab8fbd1d96080f9a4632bb48 |
11-Apr-2012 |
Craig Topper <craig.topper@gmail.com> |
Fix an overly indented line. Remove an 'else' after an 'if' that returns.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154479 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| c42e640dc8a970c7d16934a16551c4c1a3b3acae |
11-Apr-2012 |
Craig Topper <craig.topper@gmail.com> |
Inline implVisitAluOverflow by introducing a nested switch to convert the intrinsic to an nodetype.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154478 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
electionDAGBuilder.h
|
| 23de31b13bfde8dfe3d5c21322f5e08608725521 |
11-Apr-2012 |
Craig Topper <craig.topper@gmail.com> |
Optimize code a bit by calling push_back only once in some loops. Reduces compiled code size a bit.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154473 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| 06886aaaebe38b7e4b253b336624c9a7ab6dbc44 |
11-Apr-2012 |
Owen Anderson <resistor@mac.com> |
Move the constant-folding support for FP_ROUND in SelectionDAG from the one-operand version of getNode() to the two-operand version, since it became a two-operand node at sound point.
Zap a testcase that this allows us to completely fold away.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154447 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 507bb7a42fce6502f90268712cbc32158c17bb59 |
10-Apr-2012 |
Duncan Sands <baldrick@free.fr> |
Add a comment noting that the fdiv -> fmul conversion won't generate
multiplication by a denormal, and some tests checking that.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154431 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 18112d83e7d54597bcd5870fb411c7997e02bc1e |
10-Apr-2012 |
Eric Christopher <echristo@apple.com> |
To ensure that we have more accurate line information for a block
don't elide the branch instruction if it's the only one in the block,
otherwise it's ok.
PR9796 and rdar://11215207
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154417 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
|
| b79855ee181b0a74507022894b0f753af0041121 |
10-Apr-2012 |
Owen Anderson <resistor@mac.com> |
Revert r154397, which was causing make check failures on the buildbots.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154414 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 77dde089abc8dcfd40c73f980ccebf3f2255405f |
10-Apr-2012 |
Nadav Rotem <nadav.rotem@intel.com> |
Fix a dagcombine optimization which assumes that the vsetcc result type is always
of the same size as the compared values. This is ture for SSE/AVX/NEON but not
for all targets.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154397 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 999821cddfeb8fd5115261c539c951f8733c943a |
10-Apr-2012 |
Anton Korobeynikov <asl@math.spbu.ru> |
Transform div to mul with reciprocal only when fp imm is legal.
This fixes PR12516 and uncovers one weird problem in legalize (workarounded)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154394 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| b52ba49fdbf6cdf055e8b264c18b6e594fd30dc4 |
10-Apr-2012 |
Evan Cheng <evan.cheng@apple.com> |
Make the code slightly more palatable.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154378 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| bf010eb9110009d745382bf15131fbe556562ffe |
10-Apr-2012 |
Evan Cheng <evan.cheng@apple.com> |
Fix a long standing tail call optimization bug. When a libcall is emitted
legalizer always use the DAG entry node. This is wrong when the libcall is
emitted as a tail call since it effectively folds the return node. If
the return node's input chain is not the entry (i.e. call, load, or store)
use that as the tail call input chain.
PR12419
rdar://9770785
rdar://11195178
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154370 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| fdb230a154ead49cf0ded5b4587be994ec2f43e0 |
10-Apr-2012 |
Rafael Espindola <rafael.espindola@gmail.com> |
Don't try to zExt just to check if an integer constant is zero, it might
not fit in a i64.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154364 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 787c3fd385834db61bd955dcc40fb02b77c183a9 |
09-Apr-2012 |
Akira Hatanaka <ahatanaka@mips.com> |
Have TargetLowering::getPICJumpTableRelocBase return a node that points to the
GOT if jump table uses 64-bit gp-relative relocation.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154341 91177308-0d34-0410-b5e6-96231b3b80d8
argetLowering.cpp
|
| decbc43f72866fa33d18e4b63d0d2dd2a2e102f6 |
09-Apr-2012 |
Rafael Espindola <rafael.espindola@gmail.com> |
Pattern match a setcc of boolean value with 0 as a truncate.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154322 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| f920423ffc41dcde33b25ea7d6f25272b709b7fc |
09-Apr-2012 |
Craig Topper <craig.topper@gmail.com> |
Remove unnecessary type check when combining and/or/xor of swizzles. Move some checks to allow better early out.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154309 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| b7135e5838f1d08378952de125af9006449fa25c |
09-Apr-2012 |
Craig Topper <craig.topper@gmail.com> |
Remove unnecessary 'else' on an 'if' that always returns
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154308 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 4b206bdfd0839fe61fda3e0b6955a80646a93977 |
09-Apr-2012 |
Craig Topper <craig.topper@gmail.com> |
Optimize code slightly. No functionality change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154307 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| ae1bec52f7a0e8b719e74f3575ec238094ff7599 |
09-Apr-2012 |
Craig Topper <craig.topper@gmail.com> |
Replace some explicit checks with asserts for conditions that should never happen.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154305 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 10612dc15f48cace9d62c7b5df772234a7c386e4 |
09-Apr-2012 |
Craig Topper <craig.topper@gmail.com> |
Optimize code a bit. No functional change intended.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154299 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| c47bc3321825ff3aa9aee4ff125c5e9ee853e449 |
08-Apr-2012 |
Benjamin Kramer <benny.kra@googlemail.com> |
Silence sign-compare warning.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154297 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 3ef3fcfc0414b96d626b706c6151596684b7d134 |
08-Apr-2012 |
Duncan Sands <baldrick@free.fr> |
Only have codegen turn fdiv by a constant into fmul by the reciprocal
when -ffast-math, i.e. don't just always do it if the reciprocal can
be formed exactly. There is already an IR level transform that does
that, and it does it more carefully.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154296 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| f873dde50264ffab16f3d12eaec8be91edfcc131 |
08-Apr-2012 |
Craig Topper <craig.topper@gmail.com> |
Simplify code that tries to do vector extracts for shuffles when the mask width and the input vector widths don't match. No need to check the min and max are in range before calculating the start index. The range check after having the start index is sufficient. Also no need to check for an extract from the beginning differently.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154295 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| 34797136cb9fa9f450c0e1c47983482083979dd4 |
08-Apr-2012 |
Chandler Carruth <chandlerc@gmail.com> |
Move the TLSModel information into the TargetMachine rather than hiding
in TargetLowering. There was already a FIXME about this location being
odd. The interface is simplified as a consequence. This will also make
it easier to change TLS models when compiling with PIE.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154292 91177308-0d34-0410-b5e6-96231b3b80d8
argetLowering.cpp
|
| b45c96995924d1b74f2a91e85e21be98709285cd |
08-Apr-2012 |
Craig Topper <craig.topper@gmail.com> |
Turn avx2 vinserti128 intrinsic calls into INSERT_SUBVECTOR DAG nodes and remove patterns for selecting the intrinsic. Similar was already done for avx1.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154272 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| ad9fb01e86606e36965eb0cf53b27f296fd22948 |
07-Apr-2012 |
Craig Topper <craig.topper@gmail.com> |
Remove 'else' after 'if' that ends in return.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154267 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| d16c8d0d336638225378466bc17c9db156401817 |
07-Apr-2012 |
Nadav Rotem <nadav.rotem@intel.com> |
1. Remove the part of r153848 which optimizes shuffle-of-shuffle into a new
shuffle node because it could introduce new shuffle nodes that were not
supported efficiently by the target.
2. Add a more restrictive shuffle-of-shuffle optimization for cases where the
second shuffle reverses the transformation of the first shuffle.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154266 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 961d666be4f3714452ff9f15470f9255d85f0506 |
07-Apr-2012 |
Duncan Sands <baldrick@free.fr> |
Convert floating point division by a constant into multiplication by the
reciprocal if converting to the reciprocal is exact. Do it even if inexact
if -ffast-math. This substantially speeds up ac.f90 from the polyhedron
benchmarks.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154265 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 740cd657f3d9d4e88614831c70a649f9257164da |
05-Apr-2012 |
Jakob Stoklund Olesen <stoklund@2pi.dk> |
Don't break the IV update in TLI::SimplifySetCC().
LSR always tries to make the ICmp in the loop latch use the incremented
induction variable. This allows the induction variable to be kept in a
single register.
When the induction variable limit is equal to the stride,
SimplifySetCC() would break LSR's hard work by transforming:
(icmp (add iv, stride), stride) --> (cmp iv, 0)
This forced us to use lea for the IC update, preventing the simpler
incl+cmp.
<rdar://problem/7643606>
<rdar://problem/11184260>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154119 91177308-0d34-0410-b5e6-96231b3b80d8
argetLowering.cpp
|
| d7484e5d9b25fe907cdad283659fcdeb5c73060f |
05-Apr-2012 |
Owen Anderson <resistor@mac.com> |
Treat f16 the same as f80/f128 for the purposes of generating constants during instruction selection.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154113 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 9751b81fc97dcb6ecc4be4304ef8e6e8cf79f6e4 |
04-Apr-2012 |
Pete Cooper <peter_cooper@apple.com> |
f16 FREM can now be legalized by promoting to f32
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154039 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 26c8dcc692fb2addd475446cfff24d6a4e958bca |
04-Apr-2012 |
Rafael Espindola <rafael.espindola@gmail.com> |
Always compute all the bits in ComputeMaskedBits.
This allows us to keep passing reduced masks to SimplifyDemandedBits, but
know about all the bits if SimplifyDemandedBits fails. This allows instcombine
to simplify cases like the one in the included testcase.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154011 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
egalizeIntegerTypes.cpp
electionDAG.cpp
electionDAGISel.cpp
argetLowering.cpp
|
| 8d41a1a7e68164d36d5332aa82d871902000db5b |
04-Apr-2012 |
Craig Topper <craig.topper@gmail.com> |
Remove default case from switch that was already covering all cases.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@153996 91177308-0d34-0410-b5e6-96231b3b80d8
argetLowering.cpp
|
| e5ae51a38f156ae7bfa50fc6b27d0042793e8fd1 |
04-Apr-2012 |
Pete Cooper <peter_cooper@apple.com> |
Removed useless switch for default case when switch was covering all the enum values
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@153984 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeVectorTypes.cpp
|
| 2ce63c73520cd6e715f9114589f802938b5db01f |
04-Apr-2012 |
Pete Cooper <peter_cooper@apple.com> |
Add VSELECT to LegalizeVectorTypes::ScalariseVectorResult. Previously it would crash if it encountered a 1 element VSELECT. Solution is slightly more complicated than just creating a SELET as we have to mask or sign extend the vector condition if it had different boolean contents from the scalar condition. Fixes <rdar://problem/11178095>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@153976 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeTypes.h
egalizeVectorTypes.cpp
|
| 9dbb018b36d37d9676fe70ac5d928e69ae01b7fb |
03-Apr-2012 |
Chad Rosier <mcrosier@apple.com> |
Fix an issue in SimplifySetCC() specific to vector comparisons.
When folding X == X we need to check getBooleanContents() to determine if the
result is a vector of ones or a vector of negative ones.
I tried creating a test case, but the problem seems to only be exposed on a
much older version of clang (around r144500).
rdar://10923049
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@153966 91177308-0d34-0410-b5e6-96231b3b80d8
argetLowering.cpp
|
| 29f60f359b59032108cdabcde91217b6784c4e13 |
03-Apr-2012 |
Owen Anderson <resistor@mac.com> |
Add predicates for checking whether targets have free FNEG and FABS operations, and prevent the DAGCombiner from turning them into bitwise operations if they do.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@153901 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 44b5e6de8cb7a5562f698078415a3a9b608b8ed6 |
02-Apr-2012 |
Nadav Rotem <nadav.rotem@intel.com> |
Optimizing swizzles of complex shuffles may generate additional complex shuffles.
Do not try to optimize swizzles of shuffles if the source shuffle has more than
a single user, except when the source shuffle is also a swizzle.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@153864 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 4ac9081c7110dbf099d682fa51c091741e763491 |
01-Apr-2012 |
Nadav Rotem <nadav.rotem@intel.com> |
This commit contains a few changes that had to go in together.
1. Simplify xor/and/or (bitcast(A), bitcast(B)) -> bitcast(op (A,B))
(and also scalar_to_vector).
2. Xor/and/or are indifferent to the swizzle operation (shuffle of one src).
Simplify xor/and/or (shuff(A), shuff(B)) -> shuff(op (A, B))
3. Optimize swizzles of shuffles: shuff(shuff(x, y), undef) -> shuff(x, y).
4. Fix an X86ISelLowering optimization which was very bitcast-sensitive.
Code which was previously compiled to this:
movd (%rsi), %xmm0
movdqa .LCPI0_0(%rip), %xmm2
pshufb %xmm2, %xmm0
movd (%rdi), %xmm1
pshufb %xmm2, %xmm1
pxor %xmm0, %xmm1
pshufb .LCPI0_1(%rip), %xmm1
movd %xmm1, (%rdi)
ret
Now compiles to this:
movl (%rsi), %eax
xorl %eax, (%rdi)
ret
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@153848 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 95d594cac3737ae1594a391276942a443cac426b |
31-Mar-2012 |
Rafael Espindola <rafael.espindola@gmail.com> |
Teach CodeGen's version of computeMaskedBits to understand the range metadata.
This is the CodeGen equivalent of r153747. I tested that there is not noticeable
performance difference with any combination of -O0/-O2 /-g when compiling
gcc as a single compilation unit.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@153817 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
electionDAGBuilder.cpp
|
| 84364a4e23e8ba2fe9332da99bcab31acc173381 |
30-Mar-2012 |
Bill Wendling <isanbard@gmail.com> |
If we have a VLA that has a "use" in a metadata node that's then used
here but it has no other uses, then we have a problem. E.g.,
int foo (const int *x) {
char a[*x];
return 0;
}
If we assign 'a' a vreg and fast isel later on has to use the selection
DAG isel, it will want to copy the value to the vreg. However, there are
no uses, which goes counter to what selection DAG isel expects.
<rdar://problem/11134152>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@153705 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
|
| 9fc5c83fb7b86862d4a29bf416842a4f1a0084d5 |
28-Mar-2012 |
Eric Christopher <echristo@apple.com> |
More debug output.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@153571 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| 77d9521945fa46e03af9451b526fe0e588f44a04 |
27-Mar-2012 |
Chris Lattner <sabre@nondot.org> |
fix what looks like a real logic bug, found by PVS-Studio (part of PR12357)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@153513 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 7e1e18fa1eaac4019deeb0f0e9de93541c29a7a4 |
26-Mar-2012 |
Eric Christopher <echristo@apple.com> |
Add a debug statement.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@153428 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| 3770f605b522e34ef4a1fabb4dcaa2e76a7a2d96 |
22-Mar-2012 |
Shih-wei Liao <sliao@google.com> |
Migrate external/llvm to LLVM-153224-20120321.
Change-Id: I93619a538c59e5b1280d46534dac322fbccd14f7
ndroid.mk
|
| c59a7995d22e2889706810c90a20a51ecfec278b |
24-Mar-2012 |
Shih-wei Liao <sliao@google.com> |
Merge branch 'upstream' into sliao_d
|
| 5194d6dd9575845cf1cbb2f10a0c769634d116a9 |
24-Mar-2012 |
Hal Finkel <hfinkel@anl.gov> |
Add the ability to promote legal integer VAARGs. This is required for the PPC64 SVR4 ABI.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@153372 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 479389a4da53ce72226366cc6d1cad13da158909 |
22-Mar-2012 |
Evan Cheng <evan.cheng@apple.com> |
Source order scheduler should not preschedule nodes with multiple uses. rdar://11096639
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@153270 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGRRList.cpp
|
| 5aef7957ddf43d30c33137386fdd9cbfcc5944e4 |
22-Mar-2012 |
Evan Cheng <evan.cheng@apple.com> |
Assign node orders to target intrinsics which do not produce results. rdar://11096639
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@153269 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| 544b9b426f0dfa1beef6dc3640607dee3ca1160e |
22-Mar-2012 |
Chad Rosier <mcrosier@apple.com> |
[fast-isel] Fold "urem x, pow2" -> "and x, pow2-1". This should fix the 271%
execution-time regression for nsieve-bits on the ARMv7 -O0 -g nightly tester.
This may also improve compile-time on architectures that would otherwise
generate a libcall for urem (e.g., ARM) or fall back to the DAG selector.
rdar://10810716
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@153230 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
|
| 331ff3b1d1a08b4a39cea7cdc0c9a8567a5ba1b4 |
21-Mar-2012 |
Jim Grosbach <grosbach@apple.com> |
Checking a build_vector for an all-ones value.
Type legalization can zero-extend the elements of the build_vector node, so,
for example, we may have an <8 x i8> with i32 elements of value 255. That
should return 'true' for the vector being all ones.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@153203 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 0c9da210f703f0cc98f7e198db1b68073091ce25 |
20-Mar-2012 |
Craig Topper <craig.topper@gmail.com> |
When combining (vextract shuffle (load ), <1,u,u,u>), 0) -> (load ), add users of the final load to the worklist too. Needed by changes I'm preparing to make to X86 backend.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@153078 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 8c5293c9556317143505c085cf428e11962e1273 |
20-Mar-2012 |
Eric Christopher <echristo@apple.com> |
Do everything up to generating code to try to get a register for
a variable. The previous code would break the debug info changing
code invariant. This will regress debug info for arguments where
we elide the alloca created.
Fixes rdar://11066468
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@153074 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
|
| c415af225d9546a66ac9f7368a973e0be25b438d |
20-Mar-2012 |
Eric Christopher <echristo@apple.com> |
Untabify.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@153073 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
|
| 4476bae1b42bdc7d2c87c0524148d6ad9224357b |
20-Mar-2012 |
Eric Christopher <echristo@apple.com> |
Add another debugging statement here.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@153072 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
|
| 4e27027562d6843364e0ab744f97958b6abca08d |
20-Mar-2012 |
Eric Christopher <echristo@apple.com> |
Use lookUpRegForValue here instead of duplicating the code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@153071 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
|
| cfe2998c3e1a9ea66c9bab3bcf3f93960be304fd |
20-Mar-2012 |
Pete Cooper <peter_cooper@apple.com> |
f16 FDIV can now be legalized by promoting to f32
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@153064 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 00294caadb5cdb4cafeb5e1c05486a395fef590c |
19-Mar-2012 |
Duncan Sands <baldrick@free.fr> |
Fix DAG combine which creates illegal vector shuffles. Patch by Heikki Kultala.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@153035 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| b99ea7cb3fe8af46bdc2ad68550632f5c16bdaa9 |
16-Mar-2012 |
NAKAMURA Takumi <geek4civic@gmail.com> |
Revert r152613 (and r152614), "Inline the d'tor and add an anchor instead." for workaround of g++-4.4's miscompilation.
It caused MSP430DAGToDAGISel::SelectIndexedBinOp() to be miscompiled.
When two ReplaceUses()'s are expanded as inline, vtable in base class is stored to latter (ISelUpdater)ISU.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@152877 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| ccaea7dc0bbc75e5d4ee92fb8cc6af0f928d056f |
15-Mar-2012 |
Eric Christopher <echristo@apple.com> |
We actually handle AllocaInst via getRegForValue below just fine.
Part of rdar://8905263
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@152845 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
|
| bb54d21495ba5ce60931bc872e3e3df67386cb97 |
15-Mar-2012 |
Eric Christopher <echristo@apple.com> |
Add some debugging output into fast isel as well.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@152844 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
|
| 8f2a88d734601fe498564889bb2af877f4653ad9 |
15-Mar-2012 |
Eric Christopher <echristo@apple.com> |
Add another debug statement.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@152843 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| 6431ff96be8f2f7bf3428fdaa3ad4d30bf2c1db3 |
15-Mar-2012 |
Nadav Rotem <nadav.rotem@intel.com> |
When optimizing certain BUILD_VECTOR nodes into other BUILD_VECTOR nodes, add the new node into the work list because there is a potential for further optimizations.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@152784 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 5a89434236a4d6ad5fa6a570cbf3e717b757a148 |
15-Mar-2012 |
Bill Wendling <isanbard@gmail.com> |
Add a xform to the DAG combiner.
Transform:
(fsub x, (fadd x, y)) -> (fneg y) and
(fsub x, (fadd y, x)) -> (fneg y)
if 'unsafe math' is specified.
<rdar://problem/7540295>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@152777 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 7bf116acd417e50f6fac677b9cb9204ee7f35c00 |
14-Mar-2012 |
Bill Wendling <isanbard@gmail.com> |
Insert the debugging instructions in one fell-swoop so that it doesn't call the
expensive "getFirstTerminator" call. This reduces the time of compilation in
PR12258 from >10 minutes to < 10 seconds.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@152704 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGSDNodes.cpp
|
| a03d366c8887755080cf21e11c43d76d22610fdf |
13-Mar-2012 |
Evan Cheng <evan.cheng@apple.com> |
Fortify r152675 a bit. Although I'm not able to come up with a test case that would trigger the truncation case.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@152678 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 84387ea5f547f3b63dc701fdcac163b8dc797e5d |
13-Mar-2012 |
Evan Cheng <evan.cheng@apple.com> |
DAG combine incorrectly optimize (i32 vextract (v4i16 load $addr), c) to
(i16 load $addr+c*sizeof(i16)) and replace uses of (i32 vextract) with the
i16 load. It should issue an extload instead: (i32 extload $addr+c*sizeof(i16)).
rdar://11035895
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@152675 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 7d6fc212c2c9c363ed3166966b1db14710325c5c |
13-Mar-2012 |
Bill Wendling <isanbard@gmail.com> |
Add a return type.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@152614 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| bf565702dcffb57a96612b529b68b4375244084f |
13-Mar-2012 |
Bill Wendling <isanbard@gmail.com> |
Inline the d'tor and add an anchor instead.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@152613 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 091306099d7aaf8d68c3c5f44cdaf3e3e91d9f77 |
13-Mar-2012 |
Bill Wendling <isanbard@gmail.com> |
Refactor the SelectionDAG's 'dump' methods into their own .cpp file.
No functionality change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@152611 91177308-0d34-0410-b5e6-96231b3b80d8
MakeLists.txt
electionDAG.cpp
electionDAGDumper.cpp
|
| 3d3abe0852d5f499bed7ab014519dd582a0a795d |
11-Mar-2012 |
Stepan Dyatkovskiy <stpworld@narod.ru> |
llvm::SwitchInst
Renamed methods caseBegin, caseEnd and caseDefault with case_begin, case_end, and case_default.
Added some notes relative to case iterators.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@152532 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| d5f769065152d6d9331817c439caf9df0a5e8d69 |
10-Mar-2012 |
Benjamin Kramer <benny.kra@googlemail.com> |
Give dagcombiner's worklist some inline capacity.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@152454 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| fac259814923d091942b230e7bd002a8d1130bc3 |
08-Mar-2012 |
Craig Topper <craig.topper@gmail.com> |
Use uint16_t to store instruction implicit uses and defs. Reduces static data.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@152301 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGFast.cpp
cheduleDAGRRList.cpp
|
| c10fa6c801e48771b5eade50afc2fe6abaf08227 |
08-Mar-2012 |
Stepan Dyatkovskiy <stpworld@narod.ru> |
Taken into account Duncan's comments for r149481 dated by 2nd Feb 2012:
http://lists.cs.uiuc.edu/pipermail/llvm-commits/Week-of-Mon-20120130/136146.html
Implemented CaseIterator and it solves almost all described issues: we don't need to mix operand/case/successor indexing anymore. Base iterator class is implemented as a template since it may be initialized either from "const SwitchInst*" or from "SwitchInst*".
ConstCaseIt is just a read-only iterator.
CaseIt is read-write iterator; it allows to change case successor and case value.
Usage of iterator allows totally remove resolveXXXX methods. All indexing convertions done automatically inside the iterator's getters.
Main way of iterator usage looks like this:
SwitchInst *SI = ... // intialize it somehow
for (SwitchInst::CaseIt i = SI->caseBegin(), e = SI->caseEnd(); i != e; ++i) {
BasicBlock *BB = i.getCaseSuccessor();
ConstantInt *V = i.getCaseValue();
// Do something.
}
If you want to convert case number to TerminatorInst successor index, just use getSuccessorIndex iterator's method.
If you want initialize iterator from TerminatorInst successor index, use CaseIt::fromSuccessorIndex(...) method.
There are also related changes in llvm-clients: klee and clang.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@152297 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| 953be893e8cffa0ef9bf410036cd96aeb526e98a |
08-Mar-2012 |
Andrew Trick <atrick@apple.com> |
misched preparation: rename core scheduler methods for consistency.
We had half the API with one convention, half with another. Now was a
good time to clean it up.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@152255 91177308-0d34-0410-b5e6-96231b3b80d8
esourcePriorityQueue.cpp
cheduleDAGFast.cpp
cheduleDAGRRList.cpp
cheduleDAGSDNodes.cpp
cheduleDAGSDNodes.h
cheduleDAGVLIW.cpp
|
| 47c144505b9be28ed22c626b3a407c11dba2fec5 |
07-Mar-2012 |
Andrew Trick <atrick@apple.com> |
misched preparation: clarify ScheduleDAG and ScheduleDAGInstrs roles.
ScheduleDAG is responsible for the DAG: SUnits and SDeps. It provides target hooks for latency computation.
ScheduleDAGInstrs extends ScheduleDAG and defines the current scheduling region in terms of MachineInstr iterators. It has access to the target's scheduling itinerary data. ScheduleDAGInstrs provides the logic for building the ScheduleDAG for the sequence of MachineInstrs in the current region. Target's can implement highly custom schedulers by extending this class.
ScheduleDAGPostRATDList provides the driver and diagnostics for current postRA scheduling. It maintains a current Sequence of scheduled machine instructions and logic for splicing them into the block. During scheduling, it uses the ScheduleHazardRecognizer provided by the target.
Specific changes:
- Removed driver code from ScheduleDAG. clearDAG is the only interface needed.
- Added enterRegion/exitRegion hooks to ScheduleDAGInstrs to delimit the scope of each scheduling region and associated DAG. They should be used to setup and cleanup any region-specific state in addition to the DAG itself. This is necessary because we reuse the same ScheduleDAG object for the entire function. The target may extend these hooks to do things at regions boundaries, like bundle terminators. The hooks are called even if we decide not to schedule the region. So all instructions in a block are "covered" by these calls.
- Added ScheduleDAGInstrs::begin()/end() public API.
- Moved Sequence into the driver layer, which is specific to the scheduling algorithm.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@152208 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGSDNodes.cpp
cheduleDAGSDNodes.h
electionDAGISel.cpp
|
| 84b454d1a270a5d685e01686ed15e68c44b0b56a |
07-Mar-2012 |
Andrew Trick <atrick@apple.com> |
misched preparation: modularize schedule emission.
ScheduleDAG has nothing to do with how the instructions are scheduled.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@152206 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGSDNodes.cpp
cheduleDAGSDNodes.h
|
| 73ba69b6843f7f23345b1e8745cb328952cae0d8 |
07-Mar-2012 |
Andrew Trick <atrick@apple.com> |
misched preparation: modularize schedule printing.
ScheduleDAG will not refer to the scheduled instruction sequence.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@152205 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGRRList.cpp
cheduleDAGSDNodes.cpp
cheduleDAGSDNodes.h
|
| 4c727204271067f3dbf50bd23098b2df8e1cc47a |
07-Mar-2012 |
Andrew Trick <atrick@apple.com> |
misched preparation: modularize schedule verification.
ScheduleDAG will not refer to the scheduled instruction sequence.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@152204 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGFast.cpp
cheduleDAGRRList.cpp
cheduleDAGSDNodes.cpp
cheduleDAGSDNodes.h
cheduleDAGVLIW.cpp
|
| dbdca36af8ee6028dbea93c639408ba95e5fda2e |
07-Mar-2012 |
Andrew Trick <atrick@apple.com> |
whitespace
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@152203 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGFast.cpp
|
| 56b94c52c9bf0342106ca7d274b9bb469d5ef619 |
07-Mar-2012 |
Andrew Trick <atrick@apple.com> |
Cleanup in preparation for misched: Move DAG visualization logic.
Soon, ScheduleDAG will not refer to the BB.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@152177 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGSDNodes.cpp
cheduleDAGSDNodes.h
|
| acddd4963d2f3b5fd94ab872b4fd393b34c80e5f |
07-Mar-2012 |
Andrew Trick <atrick@apple.com> |
whitespace
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@152175 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 084e179f090f9a47bdf66f49775a125f4a2a8a8c |
07-Mar-2012 |
Andrew Trick <atrick@apple.com> |
Cleanup: DAG building is specific to either SD or MI scheduling. Not part of the target interface.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@152174 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGSDNodes.h
|
| 03be3622aae67aa095bc047bcac88cdebebaafd6 |
07-Mar-2012 |
Evan Cheng <evan.cheng@apple.com> |
Extend r148086 to check for [r +/- reg] address mode. This fixes queens performance regression (due to increased register pressure from overly aggressive pre-inc formation).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@152162 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| afd3d56b9dc791d37120922318293a021bd35598 |
06-Mar-2012 |
Owen Anderson <resistor@mac.com> |
Make it possible for a target to mark FSUB as Expand. This requires providing a default expansion (FADD+FNEG), and teaching DAGCombine not to form FSUBs post-legalize if they are not legal.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@152079 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
egalizeDAG.cpp
|
| 8019aac390baf43b3907d92928bad7fbe62588c6 |
06-Mar-2012 |
Stephen Hines <srhines@google.com> |
Merge with upstream LLVM @152063
Removed call to getsid() from LockFileManager.cpp, since bionic doesn't have
support for it.
Build updates
+TableGenAction.cpp
+X86ModRMFilters.cpp
-InstrEnumEmitter.cpp
-JITDebugRegisterer.cpp
-MCLoggingStreamer.cpp
+Hashing.cpp
-ElfCodeEmitter.cpp
-ElfWriter.cpp
-ObjectCodeEmitter.cpp
+DataStream.cpp
+StreamableMemoryObject.cpp
+CmpInstAnalysis.cpp
+LockFileManager.cpp
+IntrusiveRefCntPtr.cpp
+ThreadSanitizer.cpp
+ARMMachineFunctionInfo.cpp
+ARMELFObjectWriter.cpp
+MipsAnalyzeImmediate.cpp
+MipsMachineFunction.cpp
+X86MachineFunctionInfo.cpp
+X86ELFObjectWriter.cpp
+X86WinCOFFObjectWriter.cpp
+ResourcePriorityQueue.cpp
+ScheduleDAGVLIW.cpp
+MachineCopyPropagation.cpp
+MachineScheduler.cpp
+RegAllocBase.cpp
+libLLVMVectorize
Change-Id: I69e700fe357e275ec509af1daaa7408cd3cde3a1
ndroid.mk
|
| c02a5c5e8d9c1fd2a20ad4aed40f328564e95b40 |
05-Mar-2012 |
Stephen Hines <srhines@google.com> |
Merge branch 'upstream' into merge-20120305
Conflicts:
lib/Support/Atomic.cpp
Change-Id: I563b3bc2a82942ccbae5bed42e53b9149a8bf3a0
|
| c27faccb3cf67e469f4217e98c20ef9ff2b95241 |
05-Mar-2012 |
Bill Wendling <isanbard@gmail.com> |
Fix warnings about adding a bool to a string.
Patch by Sean Silva!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@152042 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| e4fd907e72a599eddfa7a81eac4366b5b82523e3 |
04-Mar-2012 |
Craig Topper <craig.topper@gmail.com> |
Use uint16_t to store register overlaps to reduce static data.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@152001 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGFast.cpp
cheduleDAGRRList.cpp
|
| 391016025a72612577cc7b8046fed60bed1aa858 |
01-Mar-2012 |
James Molloy <james.molloy@arm.com> |
Fix a codegen fault in which log2 or exp2 could be dead-code eliminated even though they could have sideeffects.
Only allow log2/exp2 to be converted to an intrinsic if they are declared "readnone".
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@151807 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| f1820b54e4d08ed78ca76b80b8bebb91cdc798a5 |
29-Feb-2012 |
Benjamin Kramer <benny.kra@googlemail.com> |
LegalizeIntegerTypes: Reorder operations in the "big shift by small amount" optimization, making the lives of later passes easier.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@151722 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeIntegerTypes.cpp
|
| 4bfcd4acbc7d12aa55f8de9af84a38422f0f6d83 |
28-Feb-2012 |
Evan Cheng <evan.cheng@apple.com> |
Re-commit r151623 with fix. Only issue special no-return calls if it's a direct call.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@151645 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
egalizeIntegerTypes.cpp
egalizeTypes.cpp
electionDAG.cpp
electionDAGBuilder.cpp
|
| a3b2121ccf4f048640b4d79689b0e4a3906143f2 |
28-Feb-2012 |
Benjamin Kramer <benny.kra@googlemail.com> |
Fix off-by one in comment.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@151644 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeIntegerTypes.cpp
|
| 3bf15ced2b91661ac314911c1f28332da0e1c37c |
28-Feb-2012 |
Benjamin Kramer <benny.kra@googlemail.com> |
LegalizeIntegerTypes: Reenable the large shift with small amount optimization.
To avoid problems with zero shifts when getting the bits that move between words
we use a trick: first shift the by amount-1, then do another shift by one. When
amount is 0 (and size 32) we first shift by 31, then by one, instead of by 32.
Also fix a latent bug that emitted the low and high words in the wrong order
when shifting right.
Fixes PR12113.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@151637 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeIntegerTypes.cpp
|
| 20bd5296cec8d8d597ab9db2aca7346a88e580c8 |
28-Feb-2012 |
Daniel Dunbar <daniel@zuster.org> |
Revert r151623 "Some ARM implementaions, e.g. A-series, does return stack prediction. ...", it is breaking the Clang build during the Compiler-RT part.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@151630 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
egalizeIntegerTypes.cpp
egalizeTypes.cpp
electionDAG.cpp
electionDAGBuilder.cpp
|
| 1c239200e41a816dcd15f1c9a1ed911cb399bb2e |
28-Feb-2012 |
Nadav Rotem <nadav.rotem@intel.com> |
Code cleanup following CR by Duncan.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@151627 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| 21ef70ed4f655151a983788ce634787c995c7e2f |
28-Feb-2012 |
Nadav Rotem <nadav.rotem@intel.com> |
Fix a bug in the code that builds SDNodes from vector GEPs.
When the GEP index is a vector of pointers, the code that calculated the size
of the element started from the vector type, and not the contained pointer type.
As a result, instead of looking at the data element pointed by the vector, this
code used the size of the vector. This works for 32bit members (on 32bit
systems), but not for other types. Added code to peel the vector type and
added a test.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@151626 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| ec52aaa12f57896fc806e849fa21a61603050ac4 |
28-Feb-2012 |
Evan Cheng <evan.cheng@apple.com> |
Some ARM implementaions, e.g. A-series, does return stack prediction. That is,
the processor keeps a return addresses stack (RAS) which stores the address
and the instruction execution state of the instruction after a function-call
type branch instruction.
Calling a "noreturn" function with normal call instructions (e.g. bl) can
corrupt RAS and causes 100% return misprediction so LLVM should use a
unconditional branch instead. i.e.
mov lr, pc
b _foo
The "mov lr, pc" is issued in order to get proper backtrace.
rdar://8979299
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@151623 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
egalizeIntegerTypes.cpp
egalizeTypes.cpp
electionDAG.cpp
electionDAGBuilder.cpp
|
| f77c03a8599ca354393292bb6c918ea8dab6a21d |
24-Feb-2012 |
Hal Finkel <hfinkel@anl.gov> |
Don't crash when a glue node contains an internal CopyToReg
This is necessary to support the existing ppc lowering code for indirect calls.
Fixes PR12071.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@151373 91177308-0d34-0410-b5e6-96231b3b80d8
nstrEmitter.cpp
|
| 8b93ff298cbaa8a16f950374e1be1f7e5114da8f |
24-Feb-2012 |
Benjamin Kramer <benny.kra@googlemail.com> |
SDAGBuilder: Remove register sets that were never read and prune dead code surrounding it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@151364 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| d18134f11621c2ff4d2bde6effb9c7115944f9fe |
24-Feb-2012 |
Pete Cooper <peter_cooper@apple.com> |
Turn avx insert intrinsic calls into INSERT_SUBVECTOR DAG nodes and remove duplicate patterns for selecting the intrinsics
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@151342 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| 178606d92e636bb91ffbce3c4387ce059ed32953 |
24-Feb-2012 |
Eric Christopher <echristo@apple.com> |
If the Address of a variable is an argument then treat the entire
variable declaration as an argument because we want that address
anyhow for our debug information.
This seems to fix rdar://9965111, at least we have more debug
information than before and from reading the assembly it appears
to be the correct location.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@151335 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| 5b13ed1ac9745f21f30ddb07015cf27959c194c4 |
24-Feb-2012 |
Eric Christopher <echristo@apple.com> |
Tabs, formatting and long lines oh my!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@151334 91177308-0d34-0410-b5e6-96231b3b80d8
unctionLoweringInfo.cpp
|
| 9e8ceb0bac778595c5dbabe900819c3f575c5e5f |
24-Feb-2012 |
Bill Wendling <isanbard@gmail.com> |
Allow an integer to be converted into an MMX type when it's used in an inline
asm.
<rdar://problem/10106006>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@151303 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| 0822e010d1b55eb24e746a575a31235f45110ac3 |
23-Feb-2012 |
Eric Christopher <echristo@apple.com> |
More newline cleanups.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@151235 91177308-0d34-0410-b5e6-96231b3b80d8
unctionLoweringInfo.cpp
electionDAGBuilder.cpp
|
| 244136770babf37d53db6b57a9e575097c73e3d0 |
23-Feb-2012 |
Eric Christopher <echristo@apple.com> |
Add some handy-dandy newlines.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@151234 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| c9c137b463b953fbf8942f655d67f6dc1a0f7965 |
22-Feb-2012 |
Michael J. Spencer <bigcheesegs@gmail.com> |
Properly emit _fltused with FastISel. Refactor to share code with SDAG.
Patch by Joe Groff!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@151183 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
unctionLoweringInfo.cpp
electionDAGBuilder.cpp
|
| 44d23825d61d530b8d562329ec8fc2d4f843bb8d |
22-Feb-2012 |
Craig Topper <craig.topper@gmail.com> |
Make all pointers to TargetRegisterClass const since they are all pointers to static data that should not be modified.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@151134 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
|
| 6259dcdc576f4e35cdab27465a355630950b621b |
20-Feb-2012 |
James Molloy <james.molloy@arm.com> |
Teach the DAGCombiner that certain loadext nodes followed by ANDs can be converted to zeroexts.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150957 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 9b5d6b860c7264e1dd8c5b757dfb4458dccdc27e |
18-Feb-2012 |
Eric Christopher <echristo@apple.com> |
Ignore the lifetime intrinsics in fast-isel.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150848 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
|
| 6afa3f744a57933aef57b94a8e7a7148065c432c |
16-Feb-2012 |
James Molloy <james.molloy@arm.com> |
Remove extraneous #include and spelling mistake introduced in r150669.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150670 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 6660c05da33a93a011977454239cead97c3ff579 |
16-Feb-2012 |
James Molloy <james.molloy@arm.com> |
Modify the algorithm when traversing the DAGCombiner's worklist to be O(log N) for all operations. This fixes a horrible worst case with lots of nodes where 99% of the time was being spent in std::remove.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150669 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| bbfa5c02be2ef2a9ff965a4dcfe9e99665dcf0ef |
15-Feb-2012 |
Pete Cooper <peter_cooper@apple.com> |
Added hook to let targets custom lower splitting of illegal vectors
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150550 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeVectorTypes.cpp
|
| 8b7c3d0ee42938a9e6ca37239cc327bd9f4c0cd0 |
14-Feb-2012 |
Nadav Rotem <nadav.rotem@intel.com> |
Fix PR12000. Some vector operations may use scalar operands with types
that are greater than the vector element type. For example BUILD_VECTOR
of type <1 x i1> with a constant i8 operand.
This patch fixes the assertion.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150477 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeTypes.cpp
|
| 0796134bde31f6d58d077f556fd08ca3734a9e6e |
14-Feb-2012 |
Lang Hames <lhames@gmail.com> |
Rename getExceptionAddressRegister() to getExceptionPointerRegister() for consistency with setExceptionPointerRegister(...).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150460 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
electionDAGBuilder.cpp
electionDAGISel.cpp
|
| bdf9db6f4905fcbbcdbdfed328ea8b36b655dd45 |
14-Feb-2012 |
Bill Wendling <isanbard@gmail.com> |
Don't reserve the R0 and R1 registers here. We don't use these registers, and
marking them as "live-in" into a BB ruins some invariants that the back-end
tries to maintain.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150437 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| 16a7ff31655aa2de65d86472edcb71cf2df3ac3a |
14-Feb-2012 |
Jakob Stoklund Olesen <stoklund@2pi.dk> |
Add register mask support to ScheduleDAGRRList.
The scheduler will sometimes check the implicit-def list on instructions
to properly handle pre-colored DAG edges.
Also check any register mask operands for physreg clobbers.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150428 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGRRList.cpp
|
| 0877fdf30bb626217f635547ca90741a8c7558ad |
13-Feb-2012 |
Nadav Rotem <nadav.rotem@intel.com> |
Fix a bug in DAGCombine for the optimization of BUILD_VECTOR. We cant generate a shuffle node from two vectors of different types.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150383 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 2ee746b87d9471d2dc024827cacdc46114ed3708 |
12-Feb-2012 |
Nadav Rotem <nadav.rotem@intel.com> |
This patch addresses the problem of poor code generation for the zext
v8i8 -> v8i32 on AVX machines. The codegen often scalarizes ANY_EXTEND nodes.
The DAGCombiner has two optimizations that can mitigate the problem. First,
if all of the operands of a BUILD_VECTOR node are extracted from an ZEXT/ANYEXT
nodes, then it is possible to create a new simplified BUILD_VECTOR which uses
UNDEFS/ZERO values to eliminate the scalar ZEXT/ANYEXT nodes.
Second, another dag combine optimization lowers BUILD_VECTOR into a shuffle
vector instruction.
In the case of zext v8i8->v8i32 on AVX, a value in an XMM register is to be
shuffled into a wide YMM register.
This patch modifes the second optimization and allows the creation of
shuffle vectors even when the newly generated vector and the original vector
from which we extract the values are of different types.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150340 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| c667ba69ac342563c0886e20509e68705d78a0a5 |
10-Feb-2012 |
Benjamin Kramer <benny.kra@googlemail.com> |
Put instruction names into an indexed string table on the side, removing a pointer from MCInstrDesc.
Make them accessible through MCInstrInfo. They are only used for debugging purposes so this doesn't
have an impact on performance. X86MCTargetDesc.o goes from 630K to 461K on x86_64.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150245 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 8833ef03b9ceaa52063116819fff8b3d16fd8933 |
06-Feb-2012 |
Bill Wendling <isanbard@gmail.com> |
[unwind removal] Remove all of the code for the dead 'unwind' instruction. There
were no 'unwind' instructions being generated before this, so this is in effect
a no-op.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@149906 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
electionDAGBuilder.h
electionDAGISel.cpp
|
| cc870a8f936bfc478b7d3d39724dd604a9de8f76 |
05-Feb-2012 |
Nadav Rotem <nadav.rotem@intel.com> |
Add additional documentation to the extract-and-trunc dagcombine optimization.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@149823 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 5e25ee8a1fcf8288d00d731b0f7ab7976f33b123 |
05-Feb-2012 |
Craig Topper <craig.topper@gmail.com> |
Convert assert(0) to llvm_unreachable
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@149816 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
egalizeFloatTypes.cpp
egalizeIntegerTypes.cpp
egalizeVectorOps.cpp
electionDAG.cpp
|
| 18c7f80b3e83ab584bd8572695a3cde8bafd9d3c |
05-Feb-2012 |
Chris Lattner <sabre@nondot.org> |
reapply the patches reverted in r149470 that reenable ConstantDataArray,
but with a critical fix to the SelectionDAG code that optimizes copies
from strings into immediate stores: the previous code was stopping reading
string data at the first nul. Address this by adding a new argument to
llvm::getConstantStringInfo, preserving the behavior before the patch.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@149800 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 2f2d1d7ec0a0178c76c29a13ab39d3f33d9b097b |
04-Feb-2012 |
Chad Rosier <mcrosier@apple.com> |
[fast-isel] HandlePHINodesInSuccessorBlocks() can promite i8 and i16 types too.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@149730 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
|
| 59cb77fb11ec547f60ef0ff4a8ccf3bd8007ae46 |
03-Feb-2012 |
Jakob Stoklund Olesen <stoklund@2pi.dk> |
Handle all live physreg defs in the same place.
SelectionDAG has 4 different ways of passing physreg defs to users.
Collect all of the uses at the same time, and pass all of them to
MI->setPhysRegsDeadExcept() to mark the remaining defs dead.
The setPhysRegsDeadExcept() function will soon add the required
implicit-defs to instructions with register mask operands.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@149708 91177308-0d34-0410-b5e6-96231b3b80d8
nstrEmitter.cpp
|
| 7e413e9c94294f17daa64ac9fda09a738e20caa5 |
03-Feb-2012 |
Nadav Rotem <nadav.rotem@intel.com> |
The type-legalizer often scalarizes code. One of the common patterns is extract-and-truncate.
In this patch we optimize this pattern and convert the sequence into extract op of a narrow type.
This allows the BUILD_VECTOR dag optimizations to construct efficient shuffle operations in many cases.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@149692 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| ebf8c27caea0a1c55df649c78ced28d9fa78093e |
01-Feb-2012 |
Andrew Trick <atrick@apple.com> |
fix cmake
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@149553 91177308-0d34-0410-b5e6-96231b3b80d8
MakeLists.txt
|
| ee498d3254b86bceb4f441741e9f442990647ce6 |
01-Feb-2012 |
Andrew Trick <atrick@apple.com> |
VLIW specific scheduler framework that utilizes deterministic finite automaton (DFA).
This new scheduler plugs into the existing selection DAG scheduling framework. It is a top-down critical path scheduler that tracks register pressure and uses a DFA for pipeline modeling.
Patch by Sergei Larin!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@149547 91177308-0d34-0410-b5e6-96231b3b80d8
MakeLists.txt
esourcePriorityQueue.cpp
cheduleDAGVLIW.cpp
electionDAGISel.cpp
|
| 24473120a253a05f3601cd3373403b47e6d03d41 |
01-Feb-2012 |
Stepan Dyatkovskiy <stpworld@narod.ru> |
SwitchInst refactoring.
The purpose of refactoring is to hide operand roles from SwitchInst user (programmer). If you want to play with operands directly, probably you will need lower level methods than SwitchInst ones (TerminatorInst or may be User). After this patch we can reorganize SwitchInst operands and successors as we want.
What was done:
1. Changed semantics of index inside the getCaseValue method:
getCaseValue(0) means "get first case", not a condition. Use getCondition() if you want to resolve the condition. I propose don't mix SwitchInst case indexing with low level indexing (TI successors indexing, User's operands indexing), since it may be dangerous.
2. By the same reason findCaseValue(ConstantInt*) returns actual number of case value. 0 means first case, not default. If there is no case with given value, ErrorIndex will returned.
3. Added getCaseSuccessor method. I propose to avoid usage of TerminatorInst::getSuccessor if you want to resolve case successor BB. Use getCaseSuccessor instead, since internal SwitchInst organization of operands/successors is hidden and may be changed in any moment.
4. Added resolveSuccessorIndex and resolveCaseIndex. The main purpose of these methods is to see how case successors are really mapped in TerminatorInst.
4.1 "resolveSuccessorIndex" was created if you need to level down from SwitchInst to TerminatorInst. It returns TerminatorInst's successor index for given case successor.
4.2 "resolveCaseIndex" converts low level successors index to case index that curresponds to the given successor.
Note: There are also related compatability fix patches for dragonegg, klee, llvm-gcc-4.0, llvm-gcc-4.2, safecode, clang.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@149481 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
electionDAGBuilder.h
|
| 91766fe066efe6e0969ba805a2e3726a70ed34a3 |
01-Feb-2012 |
Argyrios Kyrtzidis <akyrtzi@gmail.com> |
Revert Chris' commits up to r149348 that started causing VMCoreTests unit test to fail.
These are:
r149348
r149351
r149352
r149354
r149356
r149357
r149361
r149362
r149364
r149365
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@149470 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| f0e1053a63f5522ecfe1df8fe3ea07b24cb6b193 |
31-Jan-2012 |
Chris Lattner <sabre@nondot.org> |
remove the last vestiges of llvm::GetConstantStringInfo, in CodeGen.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@149356 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 4a6facbc574c37ec81380d31d8f1372ea10ebf29 |
31-Jan-2012 |
Chris Lattner <sabre@nondot.org> |
rework this logic to not depend on the last argument to GetConstantStringInfo,
which is going away.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@149348 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| efd564fbd6b38964f717bf1c34f37f441eb5cf36 |
31-Jan-2012 |
Bill Wendling <isanbard@gmail.com> |
Remove the now-dead llvm.eh.exception and llvm.eh.selector intrinsics.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@149331 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
electionDAGBuilder.cpp
|
| 9a5c0e8d9378d11cb5250265cf521db32968a56e |
31-Jan-2012 |
Bill Wendling <isanbard@gmail.com> |
Remove the eh.exception and eh.selector intrinsics. Also remove a hack to copy
over the catch information. The catch information is now tacked to the invoke
instruction.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@149326 91177308-0d34-0410-b5e6-96231b3b80d8
unctionLoweringInfo.cpp
electionDAGISel.cpp
|
| d49db36badcfa29022b99325135c3ca429150be0 |
31-Jan-2012 |
Eli Friedman <eli.friedman@gmail.com> |
Use the correct ShiftAmtTy for creating shifts after legalization. PR11881. Not committing a testcase because I think it will be too fragile.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@149315 91177308-0d34-0410-b5e6-96231b3b80d8
argetLowering.cpp
|
| a78fa8cc2dd6d2ffe5e4fe605f38aae7b3d2fb7a |
27-Jan-2012 |
Chris Lattner <sabre@nondot.org> |
continue making the world safe for ConstantDataVector. At this point,
we should (theoretically optimize and codegen ConstantDataVector as well
as ConstantVector.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@149116 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| 56243b89e7d5072d2d5498f806679d19ea483dac |
26-Jan-2012 |
Chris Lattner <sabre@nondot.org> |
eliminate the Constant::getVectorElements method. There are better (and
more robust) ways to do what it was doing now. Also, add static methods
for decoding a ShuffleVector mask.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@149028 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| 4ca829e89567f002fc74eb0e3e532a7c7662e031 |
25-Jan-2012 |
Chris Lattner <sabre@nondot.org> |
use ConstantVector::getSplat in a few places.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148929 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 0f193b8a6846dab25323788638e760ae03b7cd87 |
25-Jan-2012 |
Chris Lattner <sabre@nondot.org> |
Use the right method to get the # elements in a CDS.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148897 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| 1ee0ecf84a07693c3a517ba030fac8ac1f9f3fbc |
24-Jan-2012 |
Chris Lattner <sabre@nondot.org> |
add more support for ConstantDataSequential
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148802 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| 4d6ccb5f68cd7c6418a209f1fa4dbade569e4493 |
20-Jan-2012 |
David Blaikie <dblaikie@gmail.com> |
More dead code removal (using -Wunreachable-code)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148578 91177308-0d34-0410-b5e6-96231b3b80d8
nstrEmitter.cpp
egalizeDAG.cpp
egalizeIntegerTypes.cpp
electionDAG.cpp
electionDAGBuilder.cpp
electionDAGISel.cpp
|
| 9cf37e8b48732fccd4c301ed51aafed7074bd84e |
19-Jan-2012 |
Jakob Stoklund Olesen <stoklund@2pi.dk> |
Add a RegisterMaskSDNode class.
This SelectionDAG node will be attached to call nodes by LowerCall(),
and eventually becomes a MO_RegisterMask MachineOperand on the
MachineInstr representing the call instruction.
LowerCall() will attach a register mask that depends on the calling
convention.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148436 91177308-0d34-0410-b5e6-96231b3b80d8
nstrEmitter.cpp
cheduleDAGSDNodes.h
electionDAG.cpp
electionDAGISel.cpp
|
| 819026f2f8b13ac7f6051727fce54b95868c3d85 |
18-Jan-2012 |
Nadav Rotem <nadav.rotem@intel.com> |
Fix a bug in the type-legalization of vector integers. When we bitcast one vector type to another, we must not bitcast the result if one type is widened while the other is promoted.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148383 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeIntegerTypes.cpp
|
| cd7f02bb43ec07e0a2bd6d90177b353c94408586 |
18-Jan-2012 |
Pete Cooper <peter_cooper@apple.com> |
Fix ISD::REG_SEQUENCE to accept physical registers and change TwoAddressInstructionPass to insert copies for any physical reg operands of the REG_SEQUENCE
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148377 91177308-0d34-0410-b5e6-96231b3b80d8
nstrEmitter.cpp
|
| ba05c91ed28e70505ac854dce976ac14f4c6e602 |
17-Jan-2012 |
Nadav Rotem <nadav.rotem@intel.com> |
Transform: (EXTRACT_VECTOR_ELT( VECTOR_SHUFFLE )) -> EXTRACT_VECTOR_ELT.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148337 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| d3b588965daf43d5fd13c7bf6603c9f8017a041c |
17-Jan-2012 |
Craig Topper <craig.topper@gmail.com> |
Teach DAG combiner to turn a BUILD_VECTOR of UNDEFs into an UNDEF of vector type.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148297 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| f57e1c29dde4666ea4ec397dde72f991e5b9f854 |
17-Jan-2012 |
Pete Cooper <peter_cooper@apple.com> |
Changed flag operand of ISD::FP_ROUND to TargetConstant as it should not get checked for legalisation
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148275 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| 810d6d3354a31f24125abef831e4afccbbbe973d |
16-Jan-2012 |
David Blaikie <dblaikie@gmail.com> |
Refactor variables unused under non-assert builds (& remove two entirely unused variables).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148230 91177308-0d34-0410-b5e6-96231b3b80d8
argetLowering.cpp
|
| bf42139989695b35cf3e21be2e756bdc8c315ffb |
16-Jan-2012 |
Pete Cooper <peter_cooper@apple.com> |
Changed intrinsic ID operand to a target constant as its not used in any arithmetic so should not be checked in legalisation
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148228 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| cc6165695fa1713230184d743368b8b3642faa5d |
15-Jan-2012 |
Nadav Rotem <nadav.rotem@intel.com> |
[AVX] Optimize x86 VSELECT instructions using SimplifyDemandedBits.
We know that the blend instructions only use the MSB, so if the mask is
sign-extended then we can convert it into a SHL instruction. This is a
common pattern because the type-legalizer sign-extends the i1 type which
is used by the LLVM-IR for the condition.
Added a new optimization in SimplifyDemandedBits for SIGN_EXTEND_INREG -> SHL.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148225 91177308-0d34-0410-b5e6-96231b3b80d8
argetLowering.cpp
|
| ed4c8c633c52a40ad1a3e8687f290be4aeb1f0e8 |
15-Jan-2012 |
Benjamin Kramer <benny.kra@googlemail.com> |
Return an ArrayRef from ShuffleVectorSDNode::getMask and push it through CodeGen.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148218 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| ae4746b29a3f418dde0b8e2820019ec07303594e |
15-Jan-2012 |
Benjamin Kramer <benny.kra@googlemail.com> |
DAGCombiner: Deduplicate code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148217 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 799ea5ccc0a1d6b00f45191855056fb07cd641bc |
15-Jan-2012 |
Craig Topper <craig.topper@gmail.com> |
Truncate of undef is just undef of smaller size.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148205 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| c4b527ac06c8e2e7c43020a56f000a53ab1dc9de |
13-Jan-2012 |
Evan Cheng <evan.cheng@apple.com> |
DAGCombine's logic for forming pre- and post- indexed loads / stores were being
overly conservative. It was concerned about cases where it would prohibit
folding simple [r, c] addressing modes. e.g.
ldr r0, [r2]
ldr r1, [r2, #4]
=>
ldr r0, [r2], #4
ldr r1, [r2]
Change the logic to look for such cases which allows it to form indexed memory
ops more aggressively.
rdar://10674430
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148086 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| d578b905de8f9dece45aab2496a88ac548c67348 |
12-Jan-2012 |
Pete Cooper <peter_cooper@apple.com> |
Added FPOW, FEXP, FLOG to PromoteNode so that custom actions can be set to Promote for those operations.
Sorry, no test case yet
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148050 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| f0a95356d649dc0fb65691c4acebee450f3529b4 |
12-Jan-2012 |
Evan Cheng <evan.cheng@apple.com> |
Allow targets to select source order pre-RA scheduler.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148033 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| c8d12eee12bbd0dca3def72d52e410eaf4e61b2d |
11-Jan-2012 |
Nadav Rotem <nadav.rotem@intel.com> |
On AVX, we can load v8i32 at a time. The bug happens when two uneven loads are used.
When we load the v12i32 type, the GenWidenVectorLoads method generates two loads: v8i32 and v4i32
and attempts to use CONCAT_VECTORS to join them. In this fix I concat undef values to widen
the smaller value. The test "widen_load-2.ll" also exposes this bug on AVX.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147964 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeVectorTypes.cpp
|
| f103b3d1b99db0ae314c36d8b4ae71427816379e |
11-Jan-2012 |
Chandler Carruth <chandlerc@gmail.com> |
Teach the X86 instruction selection to do some heroic transforms to
detect a pattern which can be implemented with a small 'shl' embedded in
the addressing mode scale. This happens in real code as follows:
unsigned x = my_accelerator_table[input >> 11];
Here we have some lookup table that we look into using the high bits of
'input'. Each entity in the table is 4-bytes, which means this
implicitly gets turned into (once lowered out of a GEP):
*(unsigned*)((char*)my_accelerator_table + ((input >> 11) << 2));
The shift right followed by a shift left is canonicalized to a smaller
shift right and masking off the low bits. That hides the shift right
which x86 has an addressing mode designed to support. We now detect
masks of this form, and produce the longer shift right followed by the
proper addressing mode. In addition to saving a (rather large)
instruction, this also reduces stalls in Intel chips on benchmarks I've
measured.
In order for all of this to work, one part of the DAG needs to be
canonicalized *still further* than it currently is. This involves
removing pointless 'trunc' nodes between a zextload and a zext. Without
that, we end up generating spurious masks and hiding the pattern.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147936 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 732f05c41f177a0bc4d47e93a5d02120f146cb4c |
10-Jan-2012 |
Chandler Carruth <chandlerc@gmail.com> |
Add 'llvm_unreachable' to passify GCC's understanding of the constraints
of several newly un-defaulted switches. This also helps optimizers
(including LLVM's) recognize that every case is covered, and we should
assume as much.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147861 91177308-0d34-0410-b5e6-96231b3b80d8
argetLowering.cpp
|
| 2bd335470f8939782f3df7f6180282d3825d4f09 |
10-Jan-2012 |
David Blaikie <dblaikie@gmail.com> |
Remove unnecessary default cases in switches that cover all enum values.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147855 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeIntegerTypes.cpp
egalizeTypes.cpp
egalizeTypesGeneric.cpp
egalizeVectorTypes.cpp
argetLowering.cpp
|
| 6c0366cb2588ae49ef6e2f892db2099d41d85391 |
10-Jan-2012 |
Nadav Rotem <nadav.rotem@intel.com> |
Fix a bug in the legalization of shuffle vectors. When we emulate shuffles using BUILD_VECTORS we may be using a BV of different type. Make sure to cast it back.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147851 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 704e1a0f044614e6d2da236380c890fa5f2d1e03 |
07-Jan-2012 |
Craig Topper <craig.topper@gmail.com> |
Replace some uses of hasNUsesOfValue(0, X) with !hasAnyUseOfValue(X)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147733 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| cc274526ef801c23083bb76e335bb5152dddcc58 |
07-Jan-2012 |
Craig Topper <craig.topper@gmail.com> |
Add some DAG combines for SUBC/SUBE. If nothing uses the carry/borrow out of subc, turn it into a sub. Turn (subc x, x) into 0 with no borrow. Turn (subc x, 0) into x with no borrow. Turn (subc -1, x) into (xor x, -1) with no borrow. Turn sube with no borrow in into subc.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147728 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 4bf76e0e28c2cc358e1106b64cad2fa59714df53 |
07-Jan-2012 |
Chad Rosier <mcrosier@apple.com> |
Add comment.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147696 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 62dfc511524b28a9411f62e19d48120066c1e41b |
05-Jan-2012 |
Chandler Carruth <chandlerc@gmail.com> |
Prevent a DAGCombine from firing where there are two uses of
a combined-away node and the result of the combine isn't substantially
smaller than the input, it's just canonicalized. This is the first part
of a significant (7%) performance gain for Snappy's hot decompression
loop.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147604 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 515783466c24f9c5a9e6d9c7eb5ee7e4ab256358 |
04-Jan-2012 |
Craig Topper <craig.topper@gmail.com> |
Allow vector shuffle normalizing to use concat vector even if the sources are commuted in the shuffle mask.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147527 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| 481b79c95003a3a72b315dbda966779392ee0c19 |
04-Jan-2012 |
Craig Topper <craig.topper@gmail.com> |
Implement VECTOR_SHUFFLE canonicalizations during DAG combine.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147525 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| fcd70900630abd4a29d0b3fa9db6169159ddfb3c |
04-Jan-2012 |
Chris Lattner <sabre@nondot.org> |
Turn a few more inline asm errors into "emitErrors" instead of fatal errors.
Before we'd get:
$ clang t.c
fatal error: error in backend: Invalid operand for inline asm constraint 'i'!
Now we get:
$ clang t.c
t.c:16:5: error: invalid operand for inline asm constraint 'i'!
"movq (%4), %%mm0\n"
^
Which at least gets us the inline asm that is the problem.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147502 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| 316477dd543b5ae30b832ed4c7708f7aaa51747c |
03-Jan-2012 |
Nadav Rotem <nadav.rotem@intel.com> |
Fix incorrect widening of the bitcast sdnode in case the incoming operand is integer-promoted.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147484 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeVectorTypes.cpp
|
| 517c4d7fdac82151f6f009ec5ba62f8727658678 |
03-Jan-2012 |
Owen Anderson <resistor@mac.com> |
Remove the restriction that target intrinsics can only involve legal types. Targets can perfects well support intrinsics on illegal types, as long as they are prepared to perform custom expansion during type legalization. For example, a target where i64 is illegal might still support the i64 intrinsic operation using pairs of i32's. ARM already does some expansions like this for non-intrinsic operations.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147472 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| ce58a03587ca46d9c9fe48e2bf433bcd57bb2b3a |
03-Jan-2012 |
Elena Demikhovsky <elena.demikhovsky@intel.com> |
Fixed a bug in SelectionDAG.cpp.
The failure seen on win32, when i64 type is illegal.
It happens on stage of conversion VECTOR_SHUFFLE to BUILD_VECTOR.
The failure message is:
llc: SelectionDAG.cpp:784: void VerifyNodeCommon(llvm::SDNode*): Assertion `(I->getValueType() == EltVT || (EltVT.isInteger() && I->getValueType().isInteger() && EltVT.bitsLE(I->getValueType()))) && "Wrong operand type!"' failed.
I added a special test that checks vector shuffle on win32.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147445 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| acae2a63b9ba943d37914813c601eb5fa9d84c22 |
01-Jan-2012 |
Rafael Espindola <rafael.espindola@gmail.com> |
Revert 147399. It broke CodeGen/ARM/vext.ll.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147400 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| ac12855066ce2cfee11e68dcf0c15936f0730e6b |
01-Jan-2012 |
Elena Demikhovsky <elena.demikhovsky@intel.com> |
Fixed a bug in SelectionDAG.cpp.
The failure seen on win32, when i64 type is illegal.
It happens on stage of conversion VECTOR_SHUFFLE to BUILD_VECTOR.
The failure message is:
llc: SelectionDAG.cpp:784: void VerifyNodeCommon(llvm::SDNode*): Assertion `(I->getValueType() == EltVT || (EltVT.isInteger() && I->getValueType().isInteger() && EltVT.bitsLE(I->getValueType()))) && "Wrong operand type!"' failed.
I added a special test that checks vector shuffle on win32.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147399 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 6059b836959f4c1f1da651779d03d0de37f74a8f |
28-Dec-2011 |
Nadav Rotem <nadav.rotem@intel.com> |
PR11662.
Promotion of the mask operand needs to be done using PromoteTargetBoolean, and not padded with garbage.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147309 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeIntegerTypes.cpp
|
| d6e2560e7aea0e6c6bca950966252552f1caec63 |
26-Dec-2011 |
Eli Friedman <eli.friedman@gmail.com> |
Make sure DAGCombiner doesn't introduce multiple loads from the same memory location. PR10747, part 2.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147283 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| fbb6f593c264551a5d585a6c97ff03420b142ea3 |
25-Dec-2011 |
Nadav Rotem <nadav.rotem@intel.com> |
Fix a typo in the widening of vectors in PromoteIntRes. Patch by Shemer Anat.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147272 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeIntegerTypes.cpp
|
| 9421406aada374f79ce2f8e576824463f7830981 |
23-Dec-2011 |
Dylan Noblesmith <nobled@dreamwidth.org> |
drop unneeded config.h includes
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147197 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGPrinter.cpp
|
| 25101bb2a799a36be9f077ee2fc2dcf0df2b6efb |
20-Dec-2011 |
Jakub Staszak <kubastaszak@gmail.com> |
Add some constantness to BranchProbabilityInfo and BlockFrequnencyInfo.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146986 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
electionDAGBuilder.h
|
| 2d24e2a396a1d211baaeedf32148a3b657240170 |
20-Dec-2011 |
David Blaikie <dblaikie@gmail.com> |
Unweaken vtables as per http://llvm.org/docs/CodingStandards.html#ll_virtual_anch
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146960 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| e3376ecd504300ae529c902135f51baffbdc2824 |
20-Dec-2011 |
Dan Gohman <gohman@apple.com> |
Add basic generic CodeGen support for half.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146927 91177308-0d34-0410-b5e6-96231b3b80d8
argetLowering.cpp
|
| 34706936412b9e9ff73511fed58e97bf6e100e69 |
18-Dec-2011 |
Joerg Sonnenberger <joerg@bec.de> |
Allow inlining of functions with returns_twice calls, if they have the
attribute themselve.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146851 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| a1e6e241a813f81be2d2f36ab60c950ca297574b |
16-Dec-2011 |
Logan Chien <loganchien@google.com> |
Merge with LLVM upstream r146714 (Dec 16th 2011)
Change-Id: Ied458adb08bf9a69250cbcee9b14b44d17e8701a
|
| 0508d047fefef36d4f943ee13c82c18cf3a943ab |
15-Dec-2011 |
Devang Patel <dpatel@apple.com> |
Update DebugLoc while merging nodes at -O0.
Patch by Kyriakos Georgiou!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146670 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
electionDAGISel.cpp
|
| ca072a39778933df4264ae393bd0ca797db59df6 |
15-Dec-2011 |
Eli Friedman <eli.friedman@gmail.com> |
Don't try to form FGETSIGN after legalization; it is possible in some cases, but the existing code can't do it correctly. PR11570.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146630 91177308-0d34-0410-b5e6-96231b3b80d8
argetLowering.cpp
|
| 4e0adfa7f7fa5617a7a06028cdad0e4a50cac22a |
15-Dec-2011 |
Owen Anderson <resistor@mac.com> |
Enable synthesis of FLOG2 and FEXP2 SelectionDAG nodes from libm calls. These are already marked as illegal by default.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146623 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| e08db65c48854748612ba69ee1e50e8d1b2cf43d |
14-Dec-2011 |
Eli Friedman <eli.friedman@gmail.com> |
Add missing cases to SDNode::getOperationName(). Patch by Micah Villmow.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146548 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 5bd83345c7ba2c15a062495a0267d1dc1d478aac |
13-Dec-2011 |
Chad Rosier <mcrosier@apple.com> |
[fast-isel] Remove SelectInsertValue() as fast-isel wasn't designed to handle
instructions that define aggregate types.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146492 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
|
| 63974b2144c87c962effdc0508c27643c8ad98b6 |
13-Dec-2011 |
Chandler Carruth <chandlerc@gmail.com> |
Initial CodeGen support for CTTZ/CTLZ where a zero input produces an
undefined result. This adds new ISD nodes for the new semantics,
selecting them when the LLVM intrinsic indicates that the undef behavior
is desired. The new nodes expand trivially to the old nodes, so targets
don't actually need to do anything to support these new nodes besides
indicating that they should be expanded. I've done this for all the
operand types that I could figure out for all the targets. Owners of
various targets, please review and let me know if any of these are
incorrect.
Note that the expand behavior is *conservatively correct*, and exactly
matches LLVM's current behavior with these operations. Ideally this
patch will not change behavior in any way. For example the regtest suite
finds the exact same instruction sequences coming out of the code
generator. That's why there are no new tests here -- all of this is
being exercised by the existing test suite.
Thanks to Duncan Sands for reviewing the various bits of this patch and
helping me get the wrinkles ironed out with expanding for each target.
Also thanks to Chris for clarifying through all the discussions that
this is indeed the approach he was looking for. That said, there are
likely still rough spots. Further review much appreciated.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146466 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
egalizeDAG.cpp
egalizeIntegerTypes.cpp
egalizeVectorOps.cpp
egalizeVectorTypes.cpp
electionDAG.cpp
electionDAGBuilder.cpp
|
| f2a745efe50dfd57f0e83e5f3ed964611cba6077 |
13-Dec-2011 |
Chad Rosier <mcrosier@apple.com> |
[fast-isel] Guard "exhastive" fast-isel output with -fast-isel-verbose2.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146453 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 4ab406d7fc06b1272d02cd8be46f0c5ebe51a3da |
12-Dec-2011 |
Daniel Dunbar <daniel@zuster.org> |
LLVMBuild: Remove trailing newline, which irked me.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146409 91177308-0d34-0410-b5e6-96231b3b80d8
LVMBuild.txt
|
| 4552d3e22abbb4e6a9078b5ff9e7c59e44e29fca |
10-Dec-2011 |
Chad Rosier <mcrosier@apple.com> |
[fast-isel] SelectInsertValue seems to be causing miscompiles for ARM. Disable while I investigate.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146331 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
|
| b435aa2c1de2ff28e51b1ce881e9f10f8b51d8e3 |
10-Dec-2011 |
Chad Rosier <mcrosier@apple.com> |
Typo.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146327 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
|
| cd462d055ffc18a526a9a1d343261d8550e99280 |
09-Dec-2011 |
Chad Rosier <mcrosier@apple.com> |
[fast-isel] Add support for selecting insertvalue.
rdar://10530851
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146276 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
|
| 2dd0353fec61b412e521013049d6a03de29aa8c7 |
09-Dec-2011 |
Eli Friedman <eli.friedman@gmail.com> |
Fix a couple of logic bugs in TargetLowering::SimplifyDemandedBits. PR11514.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146219 91177308-0d34-0410-b5e6-96231b3b80d8
argetLowering.cpp
|
| 243eb9ecbbc6775e346e94025bd255bbceac9fca |
08-Dec-2011 |
Owen Anderson <resistor@mac.com> |
Enhance both TargetLibraryInfo and SelectionDAGBuilder so that the latter can use the former to prevent the formation of libm SDNode's when -fno-builtin is passed.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146193 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
electionDAGBuilder.h
electionDAGISel.cpp
|
| 73e08d3507d9ca22d89886a7d7e1e4e9278bee98 |
08-Dec-2011 |
Chad Rosier <mcrosier@apple.com> |
Add rather verbose stats for fast-isel failures.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146186 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 4a4fdf3476473021f62d5b02e8ee8802f5b25e5a |
08-Dec-2011 |
Owen Anderson <resistor@mac.com> |
Teach SelectionDAG to match more calls to libm functions onto existing SDNodes. Mark these nodes as illegal by default, unless the target declares otherwise.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146171 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
argetLowering.cpp
|
| 44bac7cd659090f15face5171e3c346983aeb521 |
08-Dec-2011 |
Nadav Rotem <nadav.rotem@intel.com> |
Fix a bug in the integer-promotion of bitcast operations on vector types.
We must not issue a bitcast operation for integer-promotion of vector types, because the
location of the values in the vector may be different.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146150 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeIntegerTypes.cpp
|
| 0e6307f6423a7ee39b80f8dc3caef00ad11e0266 |
07-Dec-2011 |
Eli Friedman <eli.friedman@gmail.com> |
Make sure we correctly set LiveRegGens when a call is unscheduled. <rdar://problem/10460321>. No testcase because this is very sensitive to scheduling.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146087 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGRRList.cpp
|
| 30c44e18bf28c3f5feda56e97695e2b72de7fedb |
07-Dec-2011 |
Eli Friedman <eli.friedman@gmail.com> |
Fix an assertion in the scheduler. PR11386. No testcase included because it's rather delicate.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146083 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGRRList.cpp
|
| e77ae2d692a25034da908151761c0f6b7e071779 |
07-Dec-2011 |
Nick Lewycky <nicholas@mxc.ca> |
These global variables aren't thread-safe, STATISTIC is. Andy Trick tells me
that he isn't using these any more, so just delete them.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146076 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGRRList.cpp
|
| 5a96b3dad2f634c9081c8b2b6c2575441dc5a2bd |
07-Dec-2011 |
Evan Cheng <evan.cheng@apple.com> |
Add bundle aware API for querying instruction properties and switch the code
generator to it. For non-bundle instructions, these behave exactly the same
as the MC layer API.
For properties like mayLoad / mayStore, look into the bundle and if any of the
bundled instructions has the property it would return true.
For properties like isPredicable, only return true if *all* of the bundled
instructions have the property.
For properties like canFoldAsLoad, isCompare, conservatively return false for
bundles.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146026 91177308-0d34-0410-b5e6-96231b3b80d8
nstrEmitter.cpp
electionDAGISel.cpp
|
| 1c663fee566546fc5622ffb4f169438bbd495fbf |
07-Dec-2011 |
Eli Friedman <eli.friedman@gmail.com> |
Zap unnecessary isIntDivCheap() check. PR11485. No testcase because this doesn't affect any in-tree target.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146015 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 26323442d5b8373391d9899159974c1f38f6f4d5 |
07-Dec-2011 |
Eli Friedman <eli.friedman@gmail.com> |
Fix an optimization involving EXTRACT_SUBVECTOR in DAGCombine so it behaves correctly. PR11494.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145996 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 7c2a4a30e0e16762c75adacebd05ec9fcbccf16b |
06-Dec-2011 |
Evan Cheng <evan.cheng@apple.com> |
First chunk of MachineInstr bundle support.
1. Added opcode BUNDLE
2. Taught MachineInstr class to deal with bundled MIs
3. Changed MachineBasicBlock iterator to skip over bundled MIs; added an iterator to walk all the MIs
4. Taught MachineBasicBlock methods about bundled MIs
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145975 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 1608769abeb1430dc34f31ffac0d9850f99ae36a |
05-Dec-2011 |
Nadav Rotem <nadav.rotem@intel.com> |
Add support for vectors of pointers.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145801 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| 8a8d479214745c82ef00f08d4e4f1c173b5f9ce2 |
02-Dec-2011 |
Nick Lewycky <nicholas@mxc.ca> |
Move global variables in TargetMachine into new TargetOptions class. As an API
change, now you need a TargetOptions object to create a TargetMachine. Clang
patch to follow.
One small functionality change in PTX. PTX had commented out the machine
verifier parts in their copy of printAndVerify. That now calls the version in
LLVMTargetMachine. Users of PTX who need verification disabled should rely on
not passing the command-line flag to enable it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145714 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
electionDAG.cpp
electionDAGBuilder.cpp
electionDAGISel.cpp
|
| ae6f2cb1fc520aa56777dab1e7603aee9429f6dd |
29-Nov-2011 |
Chad Rosier <mcrosier@apple.com> |
If fast-isel fails, remove dead instructions generated during the failed
attempt.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145425 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
|
| d782bae970e888572f0458ac05369bbd7752f05a |
29-Nov-2011 |
Daniel Dunbar <daniel@zuster.org> |
build/CMake: Finish removal of add_llvm_library_dependencies.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145420 91177308-0d34-0410-b5e6-96231b3b80d8
MakeLists.txt
|
| c4c2a024857ca92687728f573a3017091a79eaf4 |
28-Nov-2011 |
Eli Friedman <eli.friedman@gmail.com> |
Make SelectionDAG::InferPtrAlignment use llvm::ComputeMaskedBits instead of duplicating the logic for globals. Make llvm::ComputeMaskedBits handle GlobalVariables slightly more aggressively, to match what InferPtrAlignment knew how to do.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145304 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| ed1c0c7f5817be939872b462be984534bd48bb9b |
28-Nov-2011 |
Evan Cheng <evan.cheng@apple.com> |
Revert r145273 and fix in SelectionDAG::InferPtrAlignment() instead.
Conservatively returns zero when the GV does not specify an alignment nor is it
initialized. Previously it returns ABI alignment for type of the GV. However, if
the type is a "packed" type, then the under-specified alignments is attached to
the load / store instructions. In that case, the alignment of the type cannot be
trusted.
rdar://10464621
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145300 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
electionDAG.cpp
|
| 1c487869f5d47a7ad89d21ed9912bf89f25e3b72 |
28-Nov-2011 |
Evan Cheng <evan.cheng@apple.com> |
DAG combine should not increase alignment of loads / stores with alignment less
than ABI alignment. These are loads / stores from / to "packed" data structures.
Their alignments are intentionally under-specified.
rdar://10301431
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145273 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| aa5656c6b9161608005cf8dc85027c160a925e58 |
28-Nov-2011 |
Chad Rosier <mcrosier@apple.com> |
80-column.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145267 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
|
| c80383095e1fd6a5567a0126b3ee551df8a2aacd |
28-Nov-2011 |
Bill Wendling <isanbard@gmail.com> |
Remove dead llvm.eh.sjlj.dispatchsetup intrinsic.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145263 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
electionDAG.cpp
electionDAGBuilder.cpp
|
| 1429059dc0129c1cec938c29d6fce89e14293241 |
25-Nov-2011 |
Logan Chien <loganchien@google.com> |
Merge with LLVM upstream r145126 (Nov 25th 2011)
Change-Id: I30d08ae004a4c3c74092ad2537ab30cce4280e1d
|
| f264568bae482601431e4ac923172fa3671eb9e7 |
22-Nov-2011 |
Chandler Carruth <chandlerc@gmail.com> |
Fix an obvious omission in the SelectionDAGBuilder where we were
dropping weights on the floor for invokes. This was impeding my writing
further test cases for invoke when interacting with probabilities and
block placement.
No test case as there doesn't appear to be a way to test this stuff. =/
Suggestions for a test case of course welcome. I hope to be able to add
test cases that indirectly cover this eventually by adding probabilities
to the exceptional edge and reordering blocks as a result.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145060 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| 478b06c9801f0b75c5216ce0886ac3d630d4fc7b |
17-Nov-2011 |
Chad Rosier <mcrosier@apple.com> |
When fast iseling a GEP, accumulate the offset rather than emitting a series of
ADDs. MaxOffs is used as a threshold to limit the size of the offset. Tradeoffs
being: (1) If we can't materialize the large constant then we'll cause fast-isel
to bail. (2) Too large of an offset can't be directly encoded in the ADD
resulting in a MOV+ADD. Generally not a bad thing because otherwise we would
have had ADD+ADD, but on Thumb this turns into a MOVS+MOVT+ADD. Working on a fix
for that. (3) Conversely, too low of a threshold we'll miss opportunities to
coalesce ADDs.
rdar://10412592
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144886 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
|
| 4db4addcd49310599d2df8c6824dc188aaccb613 |
17-Nov-2011 |
Eli Friedman <eli.friedman@gmail.com> |
Make sure to replace the chain properly when DAGCombining a LOAD+EXTRACT_VECTOR_ELT into a single LOAD. Fixes PR10747/PR11393.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144863 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 053e69ad5704a8e0e5f50d8b18f8917377ffacfb |
16-Nov-2011 |
Chad Rosier <mcrosier@apple.com> |
Add fast-isel stats to determine who's doing all the work, the
target-independent selector or the target-specific selector.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144833 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
|
| f91488cc1027267fa21665818d3c90bb8b2a25ce |
16-Nov-2011 |
Chad Rosier <mcrosier@apple.com> |
Fix the stats collection for fast-isel. The failed count was only accounting
for a single miss and not all predecessor instructions that get selected by
the selection DAG instruction selector. This is still not exact (e.g., over
states misses when folded/dead instructions are present), but it is a step in
the right direction.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144832 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| d577df8e5ada3f4f97fa90bdc46c6f9b1db1dee1 |
16-Nov-2011 |
Eli Friedman <eli.friedman@gmail.com> |
CONCAT_VECTORS can have more than two operands. PR11389.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144768 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeIntegerTypes.cpp
|
| b91b6001a63ea22cdad1a5392cb2b8a604d8219c |
16-Nov-2011 |
Eli Friedman <eli.friedman@gmail.com> |
Add a couple asserts so it will be easier to debug if we accidentally pass indexed loads/stores to the legalizer.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144767 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 99aa14ff64c92eab347d23696e358361d3bd90ea |
16-Nov-2011 |
Owen Anderson <resistor@mac.com> |
Rename MVT::untyped to MVT::Untyped to match similar nomenclature.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144747 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGRRList.cpp
|
| 22b34cce4d270f787d4c991baee596a9e3b7f836 |
16-Nov-2011 |
Chad Rosier <mcrosier@apple.com> |
GEPs with all zero indices are trivially coalesced by fast-isel. For example,
%arrayidx135 = getelementptr inbounds [4 x [4 x [4 x [4 x i32]]]]* %M0, i32 0, i64 0
%arrayidx136 = getelementptr inbounds [4 x [4 x [4 x i32]]]* %arrayidx135, i32 0, i64 %idxprom134
Prior to this commit, the GEP instruction that defines %arrayidx136 thought that
%arrayidx135 was a trivial kill. The GEP that defines %arrayidx135 doesn't
generate any code and thus %M0 gets folded into the second GEP. Thus, we need
to look through GEPs with all zero indices.
rdar://10443319
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144730 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
|
| 2d496897934adfc0e3e1563dd64d9a7122971e22 |
15-Nov-2011 |
Pete Cooper <peter_cooper@apple.com> |
Added custom lowering for load->dec->store sequence in x86 when the EFLAGS registers is used
by later instructions.
Only done for DEC64m right now.
Fixes <rdar://problem/6172640>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144705 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGRRList.cpp
|
| a7b0cb759433c715065440ee2a963a04db7f2b0b |
15-Nov-2011 |
Benjamin Kramer <benny.kra@googlemail.com> |
Remove all remaining uses of Value::getNameStr().
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144648 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 25ad1cc32af8d526eb72893a513a486bc28c5106 |
15-Nov-2011 |
Benjamin Kramer <benny.kra@googlemail.com> |
Twinify GraphWriter a little bit.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144647 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGPrinter.cpp
|
| 2151acf5fb0137bacdaa0efcb1a03905c99772e6 |
15-Nov-2011 |
Logan Chien <loganchien@google.com> |
Enable promote elements since the upstream has fixed it.
Change-Id: I7e4068c124ac330d021b52b877926ae719c7cb37
argetLowering.cpp
|
| 8c2e35269c10914c16f351449fb9b8108ccb2556 |
15-Nov-2011 |
Jay Foad <jay.foad@gmail.com> |
Remove some unnecessary includes of PseudoSourceValue.h.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144634 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
egalizeIntegerTypes.cpp
egalizeTypesGeneric.cpp
egalizeVectorTypes.cpp
electionDAG.cpp
electionDAGBuilder.cpp
electionDAGPrinter.cpp
|
| f9c1b92c27bf4ac40a52e0f1ef6d006d7e74bed3 |
15-Nov-2011 |
Logan Chien <loganchien@google.com> |
Merge with LLVM upstream r144606 (Nov 15th 2011)
Conflicts:
Makefile.rules
configure
docs/ReleaseNotes.html
lib/Analysis/ScalarEvolution.cpp
lib/CodeGen/AsmPrinter/DwarfCompileUnit.cpp
lib/CodeGen/ExecutionDepsFix.cpp
lib/CodeGen/MachineBlockPlacement.cpp
lib/CodeGen/MachineBranchProbabilityInfo.cpp
lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
lib/ExecutionEngine/JIT/LLVMBuild.txt
lib/MC/LLVMBuild.txt
lib/MC/MCDisassembler/LLVMBuild.txt
lib/MC/MCDwarf.cpp
lib/Object/LLVMBuild.txt
lib/Target/ARM/ARMExpandPseudoInsts.cpp
lib/Target/ARM/ARMFastISel.cpp
lib/Target/ARM/ARMInstrInfo.td
lib/Target/ARM/AsmParser/ARMAsmParser.cpp
lib/Target/ARM/Disassembler/ARMDisassembler.cpp
lib/Target/ARM/Disassembler/LLVMBuild.txt
lib/Target/ARM/TargetInfo/LLVMBuild.txt
lib/Target/CBackend/TargetInfo/LLVMBuild.txt
lib/Target/CellSPU/MCTargetDesc/LLVMBuild.txt
lib/Target/CellSPU/TargetInfo/LLVMBuild.txt
lib/Target/CppBackend/TargetInfo/LLVMBuild.txt
lib/Target/LLVMBuild.txt
lib/Target/MBlaze/Disassembler/LLVMBuild.txt
lib/Target/MBlaze/TargetInfo/LLVMBuild.txt
lib/Target/MSP430/MCTargetDesc/LLVMBuild.txt
lib/Target/MSP430/TargetInfo/LLVMBuild.txt
lib/Target/Mips/CMakeLists.txt
lib/Target/Mips/InstPrinter/MipsInstPrinter.cpp
lib/Target/Mips/Mips64InstrInfo.td
lib/Target/Mips/MipsAsmPrinter.cpp
lib/Target/Mips/MipsISelLowering.cpp
lib/Target/Mips/MipsMCInstLower.cpp
lib/Target/Mips/TargetInfo/LLVMBuild.txt
lib/Target/PTX/LLVMBuild.txt
lib/Target/PTX/PTXAsmPrinter.cpp
lib/Target/PTX/TargetInfo/LLVMBuild.txt
lib/Target/PowerPC/TargetInfo/LLVMBuild.txt
lib/Target/Sparc/TargetInfo/LLVMBuild.txt
lib/Target/X86/TargetInfo/LLVMBuild.txt
lib/Target/X86/X86ISelLowering.cpp
lib/Target/X86/X86InstrSSE.td
lib/Target/XCore/MCTargetDesc/LLVMBuild.txt
lib/Target/XCore/TargetInfo/LLVMBuild.txt
lib/Transforms/IPO/LLVMBuild.txt
lib/Transforms/Utils/LLVMBuild.txt
test/CodeGen/ARM/2011-10-26-memset-with-neon.ll
test/CodeGen/ARM/2011-11-07-PromoteVectorLoadStore.ll
test/CodeGen/ARM/fast-isel-cmp-imm.ll
test/CodeGen/ARM/fast-isel-ldrh-strh-arm.ll
test/CodeGen/CellSPU/call_indirect.ll
test/CodeGen/X86/avx2-logic.ll
test/CodeGen/X86/block-placement.ll
test/CodeGen/X86/sse-domains.ll
test/CodeGen/X86/sse3.ll
test/CodeGen/X86/vec_shuffle-39.ll
test/MC/ARM/neon-vld-encoding.s
test/MC/ARM/neon-vst-encoding.s
tools/llvm-config-2/llvm-config.cpp
utils/TableGen/LLVMBuild.txt
Change-Id: I70f454db6fc79d7799f56d0f6f2eb7b99561c504
|
| f2a027ee44593147a4aee5566a13f682a1964773 |
11-Nov-2011 |
Stephen Hines <srhines@google.com> |
Update LLVM to svn 144354.
Change-Id: I1935ffce1c5d5eec52ad8b69bab9ee0c281aef16
ndroid.mk
|
| d8a251a964945b5b17620350fdfd866c140b7a5c |
10-Nov-2011 |
Evan Cheng <evan.cheng@apple.com> |
Use a bigger hammer to fix PR11314 by disabling the "forcing two-address
instruction lower optimization" in the pre-RA scheduler.
The optimization, rather the hack, was done before MI use-list was available.
Now we should be able to implement it in a better way, perhaps in the
two-address pass until a MI scheduler is available.
Now that the scheduler has to backtrack to handle call sequences. Adding
artificial scheduling constraints is just not safe. Furthermore, the hack
is not taking all the other scheduling decisions into consideration so it's just
as likely to pessimize code. So I view disabling this optimization goodness
regardless of PR11314.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144267 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGRRList.cpp
|
| a5592b776d4df9af5a422df9133943dd461544ab |
09-Nov-2011 |
Eli Friedman <eli.friedman@gmail.com> |
Add check so we don't try to perform an impossible transformation. Fixes issue from PR11319.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144216 91177308-0d34-0410-b5e6-96231b3b80d8
argetLowering.cpp
|
| 12ecbb08fc3659c6e55f1534fa5d8f122d320b07 |
09-Nov-2011 |
Duncan Sands <baldrick@free.fr> |
Speculatively revert commit 144124 (djg) in the hope that the 32 bit
dragonegg self-host buildbot will recover (it is complaining about object
files differing between different build stages). Original commit message:
Add a hack to the scheduler to disable pseudo-two-address dependencies in
basic blocks containing calls. This works around a problem in which
these artificial dependencies can get tied up in calling seqeunce
scheduling in a way that makes the graph unschedulable with the current
approach of using artificial physical register dependencies for calling
sequences. This fixes PR11314.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144188 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGRRList.cpp
|
| a1c31670bc6b110a738165631f18dce1de36544c |
08-Nov-2011 |
Dan Gohman <gohman@apple.com> |
Add a hack to the scheduler to disable pseudo-two-address dependencies in
basic blocks containing calls. This works around a problem in which
these artificial dependencies can get tied up in calling seqeunce
scheduling in a way that makes the graph unschedulable with the current
approach of using artificial physical register dependencies for calling
sequences. This fixes PR11314.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144124 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGRRList.cpp
|
| 22d43e3f0991cb2710cdb79eb6c37ae8ba53e4f4 |
08-Nov-2011 |
Lang Hames <lhames@gmail.com> |
Lower mem-ops to unaligned i32/i16 load/stores on ARM where supported.
Add support for trimming constants to GetDemandedBits. This fixes some funky
constant generation that occurs when stores are expanded for targets that don't
support unaligned stores natively.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144102 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 67f02679340e056f50120a84b128b3c6188d693d |
08-Nov-2011 |
Pete Cooper <peter_cooper@apple.com> |
Added invariant field to the DAG.getLoad method and changed all calls.
When this field is true it means that the load is from constant (runt-time or compile-time) and so can be hoisted from loops or moved around other memory accesses
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144100 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
egalizeDAG.cpp
egalizeFloatTypes.cpp
egalizeIntegerTypes.cpp
egalizeTypes.cpp
egalizeTypesGeneric.cpp
egalizeVectorTypes.cpp
electionDAG.cpp
electionDAGBuilder.cpp
argetLowering.cpp
|
| a26ebbe5cc71869e8fc0194756f6584f7c4b4d03 |
08-Nov-2011 |
Eli Friedman <eli.friedman@gmail.com> |
Add a bunch of calls to RemoveDeadNode in LegalizeDAG, so legalization doesn't get confused by CSE later on. Fixes PR11318.
Re-commit of r144034, with an extra fix so that RemoveDeadNode doesn't blow up.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144055 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
electionDAG.cpp
|
| 986fcd68d34814f40d35413b30a69254a3daefe7 |
08-Nov-2011 |
Eli Friedman <eli.friedman@gmail.com> |
Revert r144034 while I try to track down a crash.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144044 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 2278edcb4a5a89eabc1bbe5a54535c7848e4f61a |
07-Nov-2011 |
Eli Friedman <eli.friedman@gmail.com> |
Add a bunch of calls to RemoveDeadNode in LegalizeDAG, so legalization doesn't get confused by CSE later on. Fixes PR11318.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144034 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 47f1ffe0789ece734d58f5c476db7513e559a30c |
07-Nov-2011 |
Richard Osborne <richard@xmos.com> |
Don't introduce custom nodes after legalization in TargetLowering::BuildSDIV()
and TargetLowering::BuildUDIV(). Fixes PR11283
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@143964 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
argetLowering.cpp
|
| dd21ce80415edf09fa66a0bfebc812ce682409bf |
03-Nov-2011 |
Dan Gohman <gohman@apple.com> |
Reapply r143206, with fixes. Disallow physical register lifetimes
across calls, and only check for nested dependences on the special
call-sequence-resource register.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@143660 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
egalizeTypes.cpp
cheduleDAGRRList.cpp
electionDAG.cpp
|
| 00ade8bab0045bde35b13d2489021b8642aeb0cc |
03-Nov-2011 |
Daniel Dunbar <daniel@zuster.org> |
build: Add initial cut at LLVMBuild.txt files.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@143634 91177308-0d34-0410-b5e6-96231b3b80d8
LVMBuild.txt
|
| 37ecce1958a0da3b707b61a2710964c46b6dcd08 |
03-Nov-2011 |
Bill Wendling <isanbard@gmail.com> |
An array of chars of length 8 will also cause the stack protector to be inserted
into the function. Reflect that here so that the array will be placed next to
the SP.
<rdar://problem/10128329>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@143590 91177308-0d34-0410-b5e6-96231b3b80d8
unctionLoweringInfo.cpp
|
| 4c6720ffff2343038bfb4810c7c6efc06ebf2181 |
31-Oct-2011 |
Nadav Rotem <nadav.rotem@intel.com> |
Cleanup. Document. Make sure that this build_vector optimization only runs before the op legalizer and that the used type is legal.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@143358 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 90d4087f0dc58f0b20c8f39afa1f4c430b5839d6 |
30-Oct-2011 |
Benjamin Kramer <benny.kra@googlemail.com> |
Silence compiler warning.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@143308 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 81d934ef0702acfdc709b03f484fb220df91213c |
29-Oct-2011 |
Nadav Rotem <nadav.rotem@intel.com> |
Add a new DAGCombine optimization for BUILD_VECTOR.
If all of the inputs are zero/any_extended, create a new simple BV
which can be further optimized by other BV optimizations.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@143297 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 2ad3a89681d15d30b76c36bbd6355ddd78be7e45 |
29-Oct-2011 |
Dan Gohman <gohman@apple.com> |
Revert r143206, as there are still some failing tests.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@143262 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
egalizeTypes.cpp
cheduleDAGRRList.cpp
electionDAG.cpp
|
| 26b4f62e52845638a6e353b58ea72326a0aa7b06 |
28-Oct-2011 |
Dan Gohman <gohman@apple.com> |
Reapply r143177 and r143179 (reverting r143188), with scheduler
fixes: Use a separate register, instead of SP, as the
calling-convention resource, to avoid spurious conflicts with
actual uses of SP. Also, fix unscheduling of calling sequences,
which can be triggered by pseudo-two-address dependencies.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@143206 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
egalizeTypes.cpp
cheduleDAGRRList.cpp
electionDAG.cpp
|
| 48665489a07cf7db7fb78f70e9cabb730f29e32e |
28-Oct-2011 |
Duncan Sands <baldrick@free.fr> |
Speculatively disable Dan's commits 143177 and 143179 to see if
it fixes the dragonegg self-host (it looks like gcc is miscompiled).
Original commit messages:
Eliminate LegalizeOps' LegalizedNodes map and have it just call RAUW
on every node as it legalizes them. This makes it easier to use
hasOneUse() heuristics, since unneeded nodes can be removed from the
DAG earlier.
Make LegalizeOps visit the DAG in an operands-last order. It previously
used operands-first, because LegalizeTypes has to go operands-first, and
LegalizeTypes used to be part of LegalizeOps, but they're now split.
The operands-last order is more natural for several legalization tasks.
For example, it allows lowering code for nodes with floating-point or
vector constants to see those constants directly instead of seeing the
lowered form (often constant-pool loads). This makes some things
somewhat more complicated today, though it ought to allow things to be
simpler in the future. It also fixes some bugs exposed by Legalizing
using RAUW aggressively.
Remove the part of LegalizeOps that attempted to patch up invalid chain
operands on libcalls generated by LegalizeTypes, since it doesn't work
with the new LegalizeOps traversal order. Instead, define what
LegalizeTypes is doing to be correct, and transfer the responsibility
of keeping calls from having overlapping calling sequences into the
scheduler.
Teach the scheduler to model callseq_begin/end pairs as having a
physical register definition/use to prevent calls from having
overlapping calling sequences. This is also somewhat complicated, though
there are ways it might be simplified in the future.
This addresses rdar://9816668, rdar://10043614, rdar://8434668, and others.
Please direct high-level questions about this patch to management.
Delete #if 0 code accidentally left in.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@143188 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
egalizeTypes.cpp
cheduleDAGRRList.cpp
electionDAG.cpp
|
| da230071f0303ae6b210f89b27f14a46f417d5e4 |
28-Oct-2011 |
Dan Gohman <gohman@apple.com> |
Delete #if 0 code accidentally left in.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@143179 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 0ffd02dc922213fed7eb0d055d76e260027adcdd |
28-Oct-2011 |
Dan Gohman <gohman@apple.com> |
Eliminate LegalizeOps' LegalizedNodes map and have it just call RAUW
on every node as it legalizes them. This makes it easier to use
hasOneUse() heuristics, since unneeded nodes can be removed from the
DAG earlier.
Make LegalizeOps visit the DAG in an operands-last order. It previously
used operands-first, because LegalizeTypes has to go operands-first, and
LegalizeTypes used to be part of LegalizeOps, but they're now split.
The operands-last order is more natural for several legalization tasks.
For example, it allows lowering code for nodes with floating-point or
vector constants to see those constants directly instead of seeing the
lowered form (often constant-pool loads). This makes some things
somewhat more complicated today, though it ought to allow things to be
simpler in the future. It also fixes some bugs exposed by Legalizing
using RAUW aggressively.
Remove the part of LegalizeOps that attempted to patch up invalid chain
operands on libcalls generated by LegalizeTypes, since it doesn't work
with the new LegalizeOps traversal order. Instead, define what
LegalizeTypes is doing to be correct, and transfer the responsibility
of keeping calls from having overlapping calling sequences into the
scheduler.
Teach the scheduler to model callseq_begin/end pairs as having a
physical register definition/use to prevent calls from having
overlapping calling sequences. This is also somewhat complicated, though
there are ways it might be simplified in the future.
This addresses rdar://9816668, rdar://10043614, rdar://8434668, and others.
Please direct high-level questions about this patch to management.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@143177 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
egalizeTypes.cpp
cheduleDAGRRList.cpp
electionDAG.cpp
|
| 56b16aed0966010a2f355fe8167ccbf9622f4672 |
27-Oct-2011 |
Eli Friedman <eli.friedman@gmail.com> |
Don't crash on 128-bit sdiv by constant. Found by inspection.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@143095 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 3835309e48a98f541d52a640424791e712a09ace |
27-Oct-2011 |
Lang Hames <lhames@gmail.com> |
Rename NonScalarIntSafe to something more appropriate.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@143080 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 005192a3bfd0029ff01dd80df06c3ae6d6b459f4 |
26-Oct-2011 |
Duncan Sands <baldrick@free.fr> |
Simplify SplitVecRes_UnaryOp by removing all the code that is
trying to legalize the operand types when only the result type
is required to be legalized - the type legalization machinery
will get round to the operands later if they need legalizing.
There can be a point to legalizing operands in parallel with
the result: when this saves compile time or results in better
code. There was only one case in which this was true: when
the operand is also split, so keep the logic for that bit.
As a result of this change, additional operand legalization
methods may need to be introduced to handle nodes where the
result and operand types can differ, like SIGN_EXTEND, but
the testsuite doesn't contain any tests where this is the case.
In any case, it seems better to require such methods (and die
with an assert if they doesn't exist) than to quietly produce
wrong code if we forgot to special case the node in
SplitVecRes_UnaryOp.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@143026 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeVectorTypes.cpp
|
| 3beff0b3d8dd6c1afa62dc6dc1908ee12fffabc3 |
26-Oct-2011 |
Jakob Stoklund Olesen <stoklund@2pi.dk> |
Don't use floating point to do an integer's job.
This code makes different decisions when compiled into x87 instructions
because of different rounding behavior. That caused phase 2/3
miscompares on 32-bit Linux when the phase 1 compiler was built with gcc
(using x87), and the phase 2 compiler was built with clang (using SSE).
This fixes PR11200.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@143006 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| e87bae364273f1154c1f7b7c4a86cba684d638c7 |
25-Oct-2011 |
Eli Friedman <eli.friedman@gmail.com> |
Remove a couple redundant checks.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142959 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 830c86601a5b23245db942f9dea322fff197bd41 |
24-Oct-2011 |
Douglas Gregor <dgregor@apple.com> |
Really unbreak CMake build
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142822 91177308-0d34-0410-b5e6-96231b3b80d8
MakeLists.txt
|
| 05b663d8a9d66acaa1883a31dfce9da7da046842 |
24-Oct-2011 |
Douglas Gregor <dgregor@apple.com> |
Unbreak CMake build
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142821 91177308-0d34-0410-b5e6-96231b3b80d8
MakeLists.txt
|
| ea971ef42153132e1ea67873e38c90b3bd4310db |
24-Oct-2011 |
Dan Gohman <gohman@apple.com> |
Delete the top-down "Latency" scheduler. Top-down scheduling doesn't handle
physreg dependencies, and upcoming codegen changes will require proper
physreg dependence handling.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142816 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGList.cpp
|
| 4c79255574ff3c1e7693f070d3e0c7c2e31bf6d4 |
24-Oct-2011 |
Dan Gohman <gohman@apple.com> |
Delete the Latency scheduling preference.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142815 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 887422c3752cbefb67e6a4367358a38bfcd99c0a |
24-Oct-2011 |
Dan Gohman <gohman@apple.com> |
Change this overloaded use of Sched::Latency to be an overloaded
use of Sched::ILP instead, as Sched::Latency is going away.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142813 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGRRList.cpp
|
| fc0f6d4cf7cfb1f10663472eaf4acde2def926ad |
24-Oct-2011 |
Dan Gohman <gohman@apple.com> |
Change the default scheduler from Latency to ILP, since Latency
is going away.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142810 91177308-0d34-0410-b5e6-96231b3b80d8
argetLowering.cpp
|
| 50e0b213c6f1bd67b676df51a20856087c47ce5a |
21-Oct-2011 |
Nadav Rotem <nadav.rotem@intel.com> |
Fix pr11194. When promoting and splitting integers we need to use
ZExtPromotedInteger and SExtPromotedInteger based on the operation we legalize.
SetCC return type needs to be legalized via PromoteTargetBoolean.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142660 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeVectorTypes.cpp
|
| c18a0906dacc5afb5772098f2d489ae5962e2184 |
21-Oct-2011 |
Nadav Rotem <nadav.rotem@intel.com> |
1. Fix the widening of SETCC in WidenVecOp_SETCC. Use the correct return CC type.
2. Fix a typo in CONCAT_VECTORS which exposed the bug in #1.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142648 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeIntegerTypes.cpp
egalizeTypes.h
egalizeVectorTypes.cpp
|
| e2338a7e52b768ef65b6c00e03a8ab34986b7796 |
21-Oct-2011 |
Chandler Carruth <chandlerc@gmail.com> |
Remove a now dead function, fixing -Wunused-function warnings from
Clang.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142631 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGRRList.cpp
|
| c762bb3e5e4c67063d135312abe691d1c425fb96 |
20-Oct-2011 |
Dan Gohman <gohman@apple.com> |
Delete the list-tdrr scheduler. Top-down schedulers are going away
because they don't support physical register dependencies.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142620 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGRRList.cpp
|
| f2a8d74936c4305461fdb98860c66f846f1bdbb9 |
20-Oct-2011 |
Chad Rosier <mcrosier@apple.com> |
Revert r142579, "Fix a type in the legalization of CONCAT_VECTORS". This is
causing one of the unit tests to infinitely loop, which resulted in the
buildbots stalling.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142604 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeIntegerTypes.cpp
|
| 7d068452f6f82f7be4ff6facf921ee558b24b088 |
20-Oct-2011 |
Nadav Rotem <nadav.rotem@intel.com> |
Fix a type in the legalization of CONCAT_VECTORS.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142579 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeIntegerTypes.cpp
|
| 3a8e6b7385b5470e5954cc36a5c6a556d7b90e04 |
19-Oct-2011 |
Nadav Rotem <nadav.rotem@intel.com> |
Improve code generation for vselect on SSE2:
When checking the availability of instructions using the TLI, a 'promoted'
instruction IS available. It means that the value is bitcasted to another type
for which there is an operation. The correct check for the availablity of an
instruction is to check if it should be expanded.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142542 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeVectorOps.cpp
|
| 501852423d34578bc41a745681783b04124dd0db |
12-Nov-2011 |
Eli Friedman <eli.friedman@gmail.com> |
Don't try to form pre/post-indexed loads/stores until after LegalizeDAG runs. Fixes PR11029.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144438 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
electionDAGISel.cpp
|
| 0e3642a58746a26f50709179a2bcb25f335e2dac |
12-Nov-2011 |
Eli Friedman <eli.friedman@gmail.com> |
Some cleanup and bulletproofing for node replacement in LegalizeDAG. To maintain LegalizeDAG invariants, whenever we a node is replaced, we must attempt to delete it, and if it still
has uses after it is replaced (which can happen in rare cases due to CSE), we must revisit it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144432 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 623a7e146bd86747dc46a6f8bb9993fc217d6b78 |
10-Nov-2011 |
Evan Cheng <evan.cheng@apple.com> |
Use a bigger hammer to fix PR11314 by disabling the "forcing two-address
instruction lower optimization" in the pre-RA scheduler.
The optimization, rather the hack, was done before MI use-list was available.
Now we should be able to implement it in a better way, perhaps in the
two-address pass until a MI scheduler is available.
Now that the scheduler has to backtrack to handle call sequences. Adding
artificial scheduling constraints is just not safe. Furthermore, the hack
is not taking all the other scheduling decisions into consideration so it's just
as likely to pessimize code. So I view disabling this optimization goodness
regardless of PR11314.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144267 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGRRList.cpp
|
| 0948f0acca745eef8db6922edfd8836f717396b4 |
09-Nov-2011 |
Eli Friedman <eli.friedman@gmail.com> |
Add check so we don't try to perform an impossible transformation. Fixes issue from PR11319.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144216 91177308-0d34-0410-b5e6-96231b3b80d8
argetLowering.cpp
|
| ef0b3ca3a8935b5390633dc7bb4adcdb99e0c26a |
09-Nov-2011 |
Duncan Sands <baldrick@free.fr> |
Speculatively revert commit 144124 (djg) in the hope that the 32 bit
dragonegg self-host buildbot will recover (it is complaining about object
files differing between different build stages). Original commit message:
Add a hack to the scheduler to disable pseudo-two-address dependencies in
basic blocks containing calls. This works around a problem in which
these artificial dependencies can get tied up in calling seqeunce
scheduling in a way that makes the graph unschedulable with the current
approach of using artificial physical register dependencies for calling
sequences. This fixes PR11314.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144188 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGRRList.cpp
|
| 7deb94ae9fbafe44094e4cd58a7cdc2efcb40e73 |
09-Nov-2011 |
Logan Chien <loganchien@google.com> |
Disable vector element type promotion by default.
Promote element is an optimization which tries to promote
the vector type with small element type to the vector type
with large element type, such as <2 x i8> -> <2 x i32>.
However, the code generator (instruction selector and
type legalizer) of ARM is not ready for this optimization.
As a result, ARM backend is not working when NEON is enabled.
By disabling this optimization, it is possible to enable
NEON for ARM.
Note: This is only a workaround for b/5270646 , and should
be reverted after the upstream completes the implementation
of the promote elements optimization on ARM target.
Change-Id: I80d5a33634e4eececd54d1c55f524ecda48ef877
argetLowering.cpp
|
| 9cae2d2225ba58a70ef8ff057feab6873f4af520 |
08-Nov-2011 |
Dan Gohman <gohman@apple.com> |
Add a hack to the scheduler to disable pseudo-two-address dependencies in
basic blocks containing calls. This works around a problem in which
these artificial dependencies can get tied up in calling seqeunce
scheduling in a way that makes the graph unschedulable with the current
approach of using artificial physical register dependencies for calling
sequences. This fixes PR11314.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144124 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGRRList.cpp
|
| 5207bf2177e9ef1e68d9408ea4b44f1c8a5ef9c0 |
08-Nov-2011 |
Lang Hames <lhames@gmail.com> |
Lower mem-ops to unaligned i32/i16 load/stores on ARM where supported.
Add support for trimming constants to GetDemandedBits. This fixes some funky
constant generation that occurs when stores are expanded for targets that don't
support unaligned stores natively.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144102 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| d752e0f7e64585839cb3a458ef52456eaebbea3c |
08-Nov-2011 |
Pete Cooper <peter_cooper@apple.com> |
Added invariant field to the DAG.getLoad method and changed all calls.
When this field is true it means that the load is from constant (runt-time or compile-time) and so can be hoisted from loops or moved around other memory accesses
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144100 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
egalizeDAG.cpp
egalizeFloatTypes.cpp
egalizeIntegerTypes.cpp
egalizeTypes.cpp
egalizeTypesGeneric.cpp
egalizeVectorTypes.cpp
electionDAG.cpp
electionDAGBuilder.cpp
argetLowering.cpp
|
| 2efa35f779213a828fa15d6aa3a508fc81d75d73 |
08-Nov-2011 |
Eli Friedman <eli.friedman@gmail.com> |
Add a bunch of calls to RemoveDeadNode in LegalizeDAG, so legalization doesn't get confused by CSE later on. Fixes PR11318.
Re-commit of r144034, with an extra fix so that RemoveDeadNode doesn't blow up.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144055 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
electionDAG.cpp
|
| 58dd0fec4d4b8b1dc87e8a6a080b776d0d425cad |
08-Nov-2011 |
Eli Friedman <eli.friedman@gmail.com> |
Revert r144034 while I try to track down a crash.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144044 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 1b4f6f2532e9a6a99fcab5fde5b4a2187c9c9c2b |
07-Nov-2011 |
Eli Friedman <eli.friedman@gmail.com> |
Add a bunch of calls to RemoveDeadNode in LegalizeDAG, so legalization doesn't get confused by CSE later on. Fixes PR11318.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144034 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 19a4daff9bbe18dab2620e25ac6cbf0635639ec6 |
07-Nov-2011 |
Richard Osborne <richard@xmos.com> |
Don't introduce custom nodes after legalization in TargetLowering::BuildSDIV()
and TargetLowering::BuildUDIV(). Fixes PR11283
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@143964 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
argetLowering.cpp
|
| 65fd6564b8aedd053845c81ede1ac594acb470e4 |
03-Nov-2011 |
Dan Gohman <gohman@apple.com> |
Reapply r143206, with fixes. Disallow physical register lifetimes
across calls, and only check for nested dependences on the special
call-sequence-resource register.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@143660 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
egalizeTypes.cpp
cheduleDAGRRList.cpp
electionDAG.cpp
|
| a3a2dfd4a2a8265a9a0c962cb776e2e6ba123956 |
03-Nov-2011 |
Daniel Dunbar <daniel@zuster.org> |
build: Add initial cut at LLVMBuild.txt files.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@143634 91177308-0d34-0410-b5e6-96231b3b80d8
LVMBuild.txt
|
| 9c674bb012c23622bd31d5e82cb0baeda9aac3a5 |
03-Nov-2011 |
Bill Wendling <isanbard@gmail.com> |
An array of chars of length 8 will also cause the stack protector to be inserted
into the function. Reflect that here so that the array will be placed next to
the SP.
<rdar://problem/10128329>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@143590 91177308-0d34-0410-b5e6-96231b3b80d8
unctionLoweringInfo.cpp
|
| f47368bbbe1ebcf77efd202362bfd1125a2126c7 |
31-Oct-2011 |
Nadav Rotem <nadav.rotem@intel.com> |
Cleanup. Document. Make sure that this build_vector optimization only runs before the op legalizer and that the used type is legal.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@143358 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 50bf86ea8a757be4059a56a2c38270873dcf9e2e |
30-Oct-2011 |
Benjamin Kramer <benny.kra@googlemail.com> |
Silence compiler warning.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@143308 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| b00418af67b36dcd7d70a268ebba3480c1011348 |
29-Oct-2011 |
Nadav Rotem <nadav.rotem@intel.com> |
Add a new DAGCombine optimization for BUILD_VECTOR.
If all of the inputs are zero/any_extended, create a new simple BV
which can be further optimized by other BV optimizations.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@143297 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 6f3ddef7c51f03945644ad0e69068dfb24d4b092 |
29-Oct-2011 |
Dan Gohman <gohman@apple.com> |
Revert r143206, as there are still some failing tests.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@143262 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
egalizeTypes.cpp
cheduleDAGRRList.cpp
electionDAG.cpp
|
| bf923b815d6da97367e3eedab69230918bf128a3 |
28-Oct-2011 |
Dan Gohman <gohman@apple.com> |
Reapply r143177 and r143179 (reverting r143188), with scheduler
fixes: Use a separate register, instead of SP, as the
calling-convention resource, to avoid spurious conflicts with
actual uses of SP. Also, fix unscheduling of calling sequences,
which can be triggered by pseudo-two-address dependencies.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@143206 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
egalizeTypes.cpp
cheduleDAGRRList.cpp
electionDAG.cpp
|
| 62c1d00dfd38996f381edae55e1028b8e52a1107 |
28-Oct-2011 |
Duncan Sands <baldrick@free.fr> |
Speculatively disable Dan's commits 143177 and 143179 to see if
it fixes the dragonegg self-host (it looks like gcc is miscompiled).
Original commit messages:
Eliminate LegalizeOps' LegalizedNodes map and have it just call RAUW
on every node as it legalizes them. This makes it easier to use
hasOneUse() heuristics, since unneeded nodes can be removed from the
DAG earlier.
Make LegalizeOps visit the DAG in an operands-last order. It previously
used operands-first, because LegalizeTypes has to go operands-first, and
LegalizeTypes used to be part of LegalizeOps, but they're now split.
The operands-last order is more natural for several legalization tasks.
For example, it allows lowering code for nodes with floating-point or
vector constants to see those constants directly instead of seeing the
lowered form (often constant-pool loads). This makes some things
somewhat more complicated today, though it ought to allow things to be
simpler in the future. It also fixes some bugs exposed by Legalizing
using RAUW aggressively.
Remove the part of LegalizeOps that attempted to patch up invalid chain
operands on libcalls generated by LegalizeTypes, since it doesn't work
with the new LegalizeOps traversal order. Instead, define what
LegalizeTypes is doing to be correct, and transfer the responsibility
of keeping calls from having overlapping calling sequences into the
scheduler.
Teach the scheduler to model callseq_begin/end pairs as having a
physical register definition/use to prevent calls from having
overlapping calling sequences. This is also somewhat complicated, though
there are ways it might be simplified in the future.
This addresses rdar://9816668, rdar://10043614, rdar://8434668, and others.
Please direct high-level questions about this patch to management.
Delete #if 0 code accidentally left in.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@143188 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
egalizeTypes.cpp
cheduleDAGRRList.cpp
electionDAG.cpp
|
| 3799efab8c028c8928bf55ddd7d39da0e6b62cea |
28-Oct-2011 |
Dan Gohman <gohman@apple.com> |
Delete #if 0 code accidentally left in.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@143179 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 2ba60e593012ba9b2a9d20b86733eadca288bcb2 |
28-Oct-2011 |
Dan Gohman <gohman@apple.com> |
Eliminate LegalizeOps' LegalizedNodes map and have it just call RAUW
on every node as it legalizes them. This makes it easier to use
hasOneUse() heuristics, since unneeded nodes can be removed from the
DAG earlier.
Make LegalizeOps visit the DAG in an operands-last order. It previously
used operands-first, because LegalizeTypes has to go operands-first, and
LegalizeTypes used to be part of LegalizeOps, but they're now split.
The operands-last order is more natural for several legalization tasks.
For example, it allows lowering code for nodes with floating-point or
vector constants to see those constants directly instead of seeing the
lowered form (often constant-pool loads). This makes some things
somewhat more complicated today, though it ought to allow things to be
simpler in the future. It also fixes some bugs exposed by Legalizing
using RAUW aggressively.
Remove the part of LegalizeOps that attempted to patch up invalid chain
operands on libcalls generated by LegalizeTypes, since it doesn't work
with the new LegalizeOps traversal order. Instead, define what
LegalizeTypes is doing to be correct, and transfer the responsibility
of keeping calls from having overlapping calling sequences into the
scheduler.
Teach the scheduler to model callseq_begin/end pairs as having a
physical register definition/use to prevent calls from having
overlapping calling sequences. This is also somewhat complicated, though
there are ways it might be simplified in the future.
This addresses rdar://9816668, rdar://10043614, rdar://8434668, and others.
Please direct high-level questions about this patch to management.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@143177 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
egalizeTypes.cpp
cheduleDAGRRList.cpp
electionDAG.cpp
|
| fd58cd75630b1a2ace727d6caaee8c9308ba0240 |
27-Oct-2011 |
Eli Friedman <eli.friedman@gmail.com> |
Don't crash on 128-bit sdiv by constant. Found by inspection.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@143095 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 15701f8969fcb36899a75ca2df6fdcbc52141106 |
27-Oct-2011 |
Lang Hames <lhames@gmail.com> |
Rename NonScalarIntSafe to something more appropriate.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@143080 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| a921a468542a804ccebb680935175798ac48868b |
26-Oct-2011 |
Duncan Sands <baldrick@free.fr> |
Simplify SplitVecRes_UnaryOp by removing all the code that is
trying to legalize the operand types when only the result type
is required to be legalized - the type legalization machinery
will get round to the operands later if they need legalizing.
There can be a point to legalizing operands in parallel with
the result: when this saves compile time or results in better
code. There was only one case in which this was true: when
the operand is also split, so keep the logic for that bit.
As a result of this change, additional operand legalization
methods may need to be introduced to handle nodes where the
result and operand types can differ, like SIGN_EXTEND, but
the testsuite doesn't contain any tests where this is the case.
In any case, it seems better to require such methods (and die
with an assert if they doesn't exist) than to quietly produce
wrong code if we forgot to special case the node in
SplitVecRes_UnaryOp.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@143026 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeVectorTypes.cpp
|
| 794439183a29102c784484720c3d0b1960b297e6 |
26-Oct-2011 |
Jakob Stoklund Olesen <stoklund@2pi.dk> |
Don't use floating point to do an integer's job.
This code makes different decisions when compiled into x87 instructions
because of different rounding behavior. That caused phase 2/3
miscompares on 32-bit Linux when the phase 1 compiler was built with gcc
(using x87), and the phase 2 compiler was built with clang (using SSE).
This fixes PR11200.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@143006 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| 9312613137caf4f1e7b4747964b8daf3de79c190 |
25-Oct-2011 |
Eli Friedman <eli.friedman@gmail.com> |
Remove a couple redundant checks.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142959 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 88d734de43984df03ed909f9163986fe873b8d1e |
24-Oct-2011 |
Douglas Gregor <dgregor@apple.com> |
Really unbreak CMake build
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142822 91177308-0d34-0410-b5e6-96231b3b80d8
MakeLists.txt
|
| 91336cde455c21429ae89c075a435503d1e84686 |
24-Oct-2011 |
Douglas Gregor <dgregor@apple.com> |
Unbreak CMake build
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142821 91177308-0d34-0410-b5e6-96231b3b80d8
MakeLists.txt
|
| 83dae4466e3abfd1493453588809e9f9ff10ebca |
24-Oct-2011 |
Dan Gohman <gohman@apple.com> |
Delete the top-down "Latency" scheduler. Top-down scheduling doesn't handle
physreg dependencies, and upcoming codegen changes will require proper
physreg dependence handling.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142816 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGList.cpp
|
| d5333d6922fa5ce8954df600a61605e4ca1d92f6 |
24-Oct-2011 |
Dan Gohman <gohman@apple.com> |
Delete the Latency scheduling preference.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142815 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 692c1d85353249124caa1885cfeda513146c6d81 |
24-Oct-2011 |
Dan Gohman <gohman@apple.com> |
Change this overloaded use of Sched::Latency to be an overloaded
use of Sched::ILP instead, as Sched::Latency is going away.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142813 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGRRList.cpp
|
| 8c2d270ae8b460912633883f24346c0763373a56 |
24-Oct-2011 |
Dan Gohman <gohman@apple.com> |
Change the default scheduler from Latency to ILP, since Latency
is going away.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142810 91177308-0d34-0410-b5e6-96231b3b80d8
argetLowering.cpp
|
| a054bcb4cf26f9710bf6b7b256ba7313260a7335 |
21-Oct-2011 |
Nadav Rotem <nadav.rotem@intel.com> |
Fix pr11194. When promoting and splitting integers we need to use
ZExtPromotedInteger and SExtPromotedInteger based on the operation we legalize.
SetCC return type needs to be legalized via PromoteTargetBoolean.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142660 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeVectorTypes.cpp
|
| 4bd222ae26d0411d5c67fd0ab5c043422b5f201b |
21-Oct-2011 |
Nadav Rotem <nadav.rotem@intel.com> |
1. Fix the widening of SETCC in WidenVecOp_SETCC. Use the correct return CC type.
2. Fix a typo in CONCAT_VECTORS which exposed the bug in #1.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142648 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeIntegerTypes.cpp
egalizeTypes.h
egalizeVectorTypes.cpp
|
| 2e5a5ee613fae456a8ed4282acede56860682f4f |
21-Oct-2011 |
Logan Chien <loganchien@google.com> |
Apply changes to migrate to upstream Oct 20th 2011.
Change-Id: I2bb819151f3fa5ce18690ef373bf071205d3f278
ndroid.mk
|
| ec0e5475fdb9d7d3a4d8206d84f469bc83be1cf1 |
21-Oct-2011 |
Chandler Carruth <chandlerc@gmail.com> |
Remove a now dead function, fixing -Wunused-function warnings from
Clang.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142631 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGRRList.cpp
|
| ff764815e6531be6b2d944bd6a3f1fcfc682db01 |
20-Oct-2011 |
Dan Gohman <gohman@apple.com> |
Delete the list-tdrr scheduler. Top-down schedulers are going away
because they don't support physical register dependencies.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142620 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGRRList.cpp
|
| e65177f965063c16321166c13d90a91aa57b5ee8 |
20-Oct-2011 |
Chad Rosier <mcrosier@apple.com> |
Revert r142579, "Fix a type in the legalization of CONCAT_VECTORS". This is
causing one of the unit tests to infinitely loop, which resulted in the
buildbots stalling.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142604 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeIntegerTypes.cpp
|
| 28e65b52458f944c8204fecf7eab466c90b6686f |
20-Oct-2011 |
Nadav Rotem <nadav.rotem@intel.com> |
Fix a type in the legalization of CONCAT_VECTORS.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142579 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeIntegerTypes.cpp
|
| 815af82b74fa0901e818f5d16ee418675f399101 |
19-Oct-2011 |
Nadav Rotem <nadav.rotem@intel.com> |
Improve code generation for vselect on SSE2:
When checking the availability of instructions using the TLI, a 'promoted'
instruction IS available. It means that the value is bitcasted to another type
for which there is an operation. The correct check for the availablity of an
instruction is to check if it should be expanded.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142542 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeVectorOps.cpp
|
| 0ebc07a576037e4e36f68bf5cece32740ca120c0 |
19-Oct-2011 |
Logan Chien <loganchien@google.com> |
Merge with LLVM upstream 2011/10/20 (r142530)
Conflicts:
lib/Support/Unix/Host.inc
Change-Id: Idc00db3b63912dca6348bddd9f8a1af2a8d5d147
|
| ca58c722674ed7b564f68d1d9697cd01504edef2 |
19-Oct-2011 |
Nadav Rotem <nadav.rotem@intel.com> |
Add support for the vector-widening of vselect and vector-setcc
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142488 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeTypes.h
egalizeVectorTypes.cpp
|
| fbf19ef1860e33b202ff73a269b8b0bf9157460e |
19-Oct-2011 |
Nadav Rotem <nadav.rotem@intel.com> |
Fix a bug in the legalization of vector anyext-load and trunc-store. Mem Index starts with zero.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142434 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeVectorOps.cpp
|
| db2b18febaea04d01b3dcb24fc44d5be7bd27a00 |
18-Oct-2011 |
Bob Wilson <bob.wilson@apple.com> |
Fix a DAG combiner assertion failure when constant folding BUILD_VECTORS.
svn r139159 caused SelectionDAG::getConstant() to promote BUILD_VECTOR operands
with illegal types, even before type legalization. For this testcase, that led
to one BUILD_VECTOR with i16 operands and another with promoted i32 operands,
which triggered the assertion.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142370 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 17001ce25cc205ac1cd2604492c2bce310964220 |
18-Oct-2011 |
Duncan Sands <baldrick@free.fr> |
Fix a bunch of unused variable warnings when doing a release
build with gcc-4.6.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142350 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeVectorOps.cpp
electionDAG.cpp
electionDAGBuilder.cpp
|
| 46bb70cd23762d58173dbbc4c5a1bd6964624381 |
18-Oct-2011 |
Hal Finkel <hfinkel@anl.gov> |
Fix comment to refer to correct instruction
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142334 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| 3c5e60994f53eef2808a33b5ca6c3dffc2168054 |
17-Oct-2011 |
Bill Wendling <isanbard@gmail.com> |
Correct over-zealous removal of hack.
Some code want to check that *any* call within a function has the 'returns
twice' attribute, not just that the current function has one.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142221 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 728662f9e869251ff9b5a847b0cb0daa99d1d250 |
17-Oct-2011 |
Bill Wendling <isanbard@gmail.com> |
Now that we have the ReturnsTwice function attribute, this method is
obsolete. Check the attribute instead.
<rdar://problem/8031714>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142212 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 60655413ceecfeb15a5abe6aa2fe6be249f85fab |
17-Oct-2011 |
Chad Rosier <mcrosier@apple.com> |
Removed set, but unused variable.
Patch by Joe Abbey <jabbey@arxan.com>.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142206 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeVectorOps.cpp
|
| 8fb06b3e8f7fc92e472e17fecf5ee3ba44fbb6ab |
16-Oct-2011 |
Nadav Rotem <nadav.rotem@intel.com> |
Enable element promotion type legalization by deafault.
Changed tests which assumed that vectors are legalized by widening them.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142152 91177308-0d34-0410-b5e6-96231b3b80d8
argetLowering.cpp
|
| 962bad70f4277841cf6278306caa93ebce304b48 |
16-Oct-2011 |
Benjamin Kramer <benny.kra@googlemail.com> |
Let printf do the formatting instead aligning strings ourselves.
While at it, merge some format strings.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142140 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| e9b58d0aac4e89b53a4be0e6f289b66649e1512b |
15-Oct-2011 |
Nadav Rotem <nadav.rotem@intel.com> |
Move the legalization of vector loads and stores into LegalizeVectorOps. In some
cases we need the second type-legalization pass in order to support all cases.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142060 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
egalizeVectorOps.cpp
|
| 4ed1fb009543effaeb31547fd1d4795a649c3b93 |
15-Oct-2011 |
Bill Wendling <isanbard@gmail.com> |
Clear out the landing pad to call site map for each function.
This isn't put into the 'clear()' method because the information needs to stick
around (at least for a little bit) after the selection DAG is built.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142032 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| 312b7c950a27f72a811b3fdbed26e2e08eb20c31 |
14-Oct-2011 |
Jim Grosbach <grosbach@apple.com> |
Fix typo. "__sync_fetch_and-xor_4" should be "__sync_fetch_and_xor_4".
Pointed out by George Russell.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141956 91177308-0d34-0410-b5e6-96231b3b80d8
argetLowering.cpp
|
| 459b74b9644c4741d93fe73adc2b06ca6bdb366d |
13-Oct-2011 |
Jakob Stoklund Olesen <stoklund@2pi.dk> |
Encode register class constreaints in inline asm instructions.
The inline asm operand constraint is initially encoded in the virtual
register for the operand, but that register class may change during
coalescing, and the original constraint is lost.
Encode the original register class as part of the flag word for each
inline asm operand. This makes it possible to recover the actual
constraint required by inline asm, just like we can for normal
instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141833 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| 5c75af6eb72bd74bc35f46e5037dd5646e04f3b6 |
13-Oct-2011 |
Eli Friedman <eli.friedman@gmail.com> |
Use a utility from MathExtras to clarify a check and avoid undefined behavior. Based on patch by Ahmed Charles.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141829 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| 9e15d658c99c3f0717cb83cc2bd2aa29abdbcdbb |
12-Oct-2011 |
Dan Gohman <gohman@apple.com> |
Fix a thinko that Nick noticed. The previous code actually worked as
intended, but only by accident.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141779 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
|
| 22e8a366adf5a4c78148928ff64e7e00c1088492 |
12-Oct-2011 |
Jakob Stoklund Olesen <stoklund@2pi.dk> |
Use an existing function.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141763 91177308-0d34-0410-b5e6-96231b3b80d8
argetLowering.cpp
|
| 5ba7b501fd4b88e3fea590499e9464b4b2c153a4 |
12-Oct-2011 |
Eric Christopher <echristo@apple.com> |
Formatting.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141728 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 6fe4e515470a9c2ffa1324261674dde0ede32e72 |
11-Oct-2011 |
Nadav Rotem <nadav.rotem@intel.com> |
Add support for legalization of vector SHL/SRA/SRL instructions
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141667 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 884b918c2d7ed8dbd804bda72f25729f84a16ab0 |
11-Oct-2011 |
Nadav Rotem <nadav.rotem@intel.com> |
Add support for legalization of vector trunc-store where the saved scalar type is illegal (for example, v2i16 on systems where the smallest store size is i32)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141661 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| c2b2e1333d66e37c657e25fc09dc79e4ea1d79d9 |
11-Oct-2011 |
Nadav Rotem <nadav.rotem@intel.com> |
Cleanup the trunc-store legalization code and add asserts.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141659 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| ce370cfd891386d613d4bd0d28449d2705705d16 |
07-Oct-2011 |
Bill Wendling <isanbard@gmail.com> |
Thread the chain through the eh.sjlj.setjmp intrinsic, like it's documented to
do. This will be useful later on with the new SJLJ stuff.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141416 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| 8540101252d3ff69f288e83821aa9f27b366227b |
07-Oct-2011 |
Eli Friedman <eli.friedman@gmail.com> |
Remove the old atomic instrinsics. autoupgrade functionality is included with this patch.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141333 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
electionDAGBuilder.h
|
| 30e6740f2e3d518ce1cfcd484ef728ac5764a645 |
06-Oct-2011 |
Bill Wendling <isanbard@gmail.com> |
Modify the mapping from landing pad to call sites to accept more than one call
site.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141226 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
electionDAGBuilder.h
electionDAGISel.cpp
|
| 6f500541eac11413364f1d79320a2307079d3bbd |
06-Oct-2011 |
Bill Wendling <isanbard@gmail.com> |
Small refactoring. Cache the FunctionInfo->MBB into a local variable.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141221 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| d2ed2d71c95462a6b14e7c7c8c82cb727ed342eb |
05-Oct-2011 |
Jakob Stoklund Olesen <stoklund@2pi.dk> |
Simplify EXTRACT_SUBREG emission.
EXTRACT_SUBREG is emitted as %dst = COPY %src:sub, so there is no need to
constrain the %dst register class. RegisterCoalescer will apply the
necessary constraints if it decides to eliminate the COPY.
The %src register class does need to be constrained to something with
the right sub-registers, though. This is currently done manually with
COPY_TO_REGCLASS nodes. They can possibly be removed after this patch.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141207 91177308-0d34-0410-b5e6-96231b3b80d8
nstrEmitter.cpp
nstrEmitter.h
|
| 2c3bef8a15c84ad8ef043f8e8ff08ffe1b96720b |
05-Oct-2011 |
Jakob Stoklund Olesen <stoklund@2pi.dk> |
Simplify INSERT_SUBREG emission.
The register class created by INSERT_SUBREG and SUBREG_TO_REG must be
legal and support the SubIdx sub-registers.
The new getSubClassWithSubReg() hook can compute that.
This may create INSERT_SUBREG instructions defining a larger register
class than the sub-register being inserted. That is OK,
RegisterCoalescer will constrain the register class as needed when it
eliminates the INSERT_SUBREG instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141198 91177308-0d34-0410-b5e6-96231b3b80d8
nstrEmitter.cpp
|
| a8512edb6d1c52209bad2d6b989599bc4872c913 |
05-Oct-2011 |
Bill Wendling <isanbard@gmail.com> |
Create a mapping between the landing pad basic block and the call site index for later use.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141125 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
electionDAGBuilder.h
|
| cbf26e3b574366fabfda50222817950b85517608 |
01-Oct-2011 |
Nadav Rotem <nadav.rotem@intel.com> |
Moved type construction out of the loop and added an assert on the legality of the type. Formatted lines to the 80 char limit.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140952 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| e09b2a0d4964e6a34ea6393e94a9f5a76ba56f1a |
01-Oct-2011 |
Bill Wendling <isanbard@gmail.com> |
When inferring the pointer alignment, if the global doesn't have an initializer
and the alignment is 0 (i.e., it's defined globally in one file and declared in
another file) it could get an alignment which is larger than the ABI allows for
that type, resulting in aligned moves being used for unaligned loads.
For instance, in file A.c:
struct S s;
In file B.c:
struct {
// something long
};
extern S s;
void foo() {
struct S p = s;
// ...
}
this copy is a 'memcpy' which is turned into a series of 'movaps' instructions
on X86. But this is wrong, because 'struct S' has alignment of 4, not 16.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140902 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 8de34006cf4cd67ef11cac59dd037bb722b18166 |
01-Oct-2011 |
Nick Lewycky <nicholas@mxc.ca> |
Promote comment to doxycomment. Adjust whitespace. No functionality change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140899 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| e27e1ca3c90b69e78242c98a669337f84ccded7f |
01-Oct-2011 |
Jakob Stoklund Olesen <stoklund@2pi.dk> |
Move getCommonSubClass() into TRI.
It will soon need the context.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140896 91177308-0d34-0410-b5e6-96231b3b80d8
nstrEmitter.cpp
|
| bb5a7442e362776621112dc9453e546a55878e79 |
29-Sep-2011 |
Eli Friedman <eli.friedman@gmail.com> |
Clean up uses of switch instructions so they are not dependent on the operand ordering. Patch by Stepan Dyatkovskiy.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140803 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| 12eb3ad5d6b7dea67ef5aa3b0618d95acf3f8acd |
29-Sep-2011 |
Eric Christopher <echristo@apple.com> |
Use the local we already set up.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140745 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| adbf7b2c567d42fcb12cfd69c2692da03d34d384 |
28-Sep-2011 |
Bill Wendling <isanbard@gmail.com> |
Strip off pointer casts when looking at the eh.sjlj.functioncontext's argument.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140678 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| 6ef94175d1bbab95f195770bb3c559b3ab38c4e5 |
28-Sep-2011 |
Bill Wendling <isanbard@gmail.com> |
Create and use an llvm.eh.sjlj.functioncontext intrinsic.
This intrinsic is used to pass the index of the function context to the back-end
for further processing. The back-end is in charge of filling in the rest of the
entries.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140676 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| 5405d58e21402a8ba3aaaa580ca65155bee00443 |
27-Sep-2011 |
Jim Grosbach <grosbach@apple.com> |
Rename AddSelectionDAGCSEId() to addSelectionDAGCSEId().
Naming conventions consistency. No functional change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140636 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| a3c42f3d4e5d14c8f4fb9bb123e7759c425d041b |
27-Sep-2011 |
Nadav Rotem <nadav.rotem@intel.com> |
Cleanup PromoteIntOp_EXTRACT_VECTOR_ELT and PromoteIntRes_SETCC.
Add a new method: getAnyExtOrTrunc and use it to replace the manual check.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140603 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeIntegerTypes.cpp
electionDAG.cpp
|
| a1c415cfc2dba4446021f322e4b7a43534a96f1a |
27-Sep-2011 |
Nadav Rotem <nadav.rotem@intel.com> |
Revert r140463; The patch assumes that <4 x i1> is saved to memory as 4 x i8,
while the decision is to bit-pack small values.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140601 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 0eba4fe292a0bb343da5fb2667850a39459cef0b |
25-Sep-2011 |
Nadav Rotem <nadav.rotem@intel.com> |
[vector-select] Address one of the issues in pr10902. EXTRACT_VECTOR_ELEMENT
SDNodes may return values which are wider than the incoming element types. In
this patch we fix the integer promotion of these nodes.
Fixes spill-q.ll when running -promote-elements.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140471 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeIntegerTypes.cpp
|
| 17e76bda552d5afa652c4bb45f6dbdad67dc5c20 |
24-Sep-2011 |
Nadav Rotem <nadav.rotem@intel.com> |
Implement Duncan's suggestion to use the result of getSetCCResultType if it is legal
(this is always the case for scalars), otherwise use the promoted result type.
Fix test/CodeGen/X86/vsplit-and.ll when promote-elements is enabled.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140464 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeIntegerTypes.cpp
|
| 0d5357e3d5bd3edbe4ad09791e69e1fb85d4b17f |
24-Sep-2011 |
Nadav Rotem <nadav.rotem@intel.com> |
[Vector-Select] Address one of the problems in 10902.
When generating the trunc-store of i1's, we need to use the vector type and not
the scalar type.
This patch fixes the assertion in CodeGen/Generic/bool-vector.ll when
running with -promote-elements.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140463 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 4c19e12d28749c717d3b384962c9ec92796af1c9 |
23-Sep-2011 |
Duncan Sands <baldrick@free.fr> |
Tweak the handling of MERGE_VALUES nodes: remove the need for
DecomposeMERGE_VALUES to "know" that results are legalized in
a particular order, by passing it the number of the result
being legalized (the type legalization core provides this, it
just needs to be passed on).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140373 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeFloatTypes.cpp
egalizeIntegerTypes.cpp
egalizeTypes.cpp
egalizeTypes.h
egalizeTypesGeneric.cpp
egalizeVectorTypes.cpp
|
| c56d65f63cd632ef57d9f80b4539f15a2f937364 |
23-Sep-2011 |
Nadav Rotem <nadav.rotem@intel.com> |
Vector-Select: Address one of the problems in pr10902. Add handling for the
integer-promotion of CONCAT_VECTORS.
Test: test/CodeGen/X86/widen_shuffle-1.ll
This patch fixes the above tests (when running in with -promote-elements).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140372 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeIntegerTypes.cpp
egalizeTypes.h
|
| 7b316c93273b2156f173fb2877c5e482f13f6778 |
23-Sep-2011 |
Dan Gohman <gohman@apple.com> |
Fix SimplifySelectCC to add newly created nodes to the DAGCombiner
worklist, as it may be possible to perform further optimization on them.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140349 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 08f5cdf5b33b8202edddb24abee6af2a0b3ae49c |
22-Sep-2011 |
Jakob Stoklund Olesen <stoklund@2pi.dk> |
Constrain register classes instead of emitting copies.
Sometimes register class constraints are trivial, like GR32->GR32_NOSP,
or GPR->rGPR. Teach InstrEmitter to simply constrain the virtual
register instead of emitting a copy in these cases.
Normally, these copies are handled by the coalescer. This saves some
coalescer work.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140340 91177308-0d34-0410-b5e6-96231b3b80d8
nstrEmitter.cpp
|
| 1147248e6f40f2e5655f3d8243fe7ba49ed75d0a |
21-Sep-2011 |
Nadav Rotem <nadav.rotem@intel.com> |
[VECTOR-SELECT] Address one of the bugs in pr10902.
Vector SetCC result types need to be type-legalized.
This code worked before because scalar result types are known to be legal.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140249 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeIntegerTypes.cpp
|
| 3be654f8082dcbdff011a6716a7c90486e28fc9e |
21-Sep-2011 |
Andrew Trick <atrick@apple.com> |
Lower ARM adds/subs to add/sub after adding optional CPSR operand.
This is still a hack until we can teach tblgen to generate the
optional CPSR operand rather than an implicit CPSR def. But the
strangeness is now limited to the selection DAG. ADD/SUB MI's no
longer have implicit CPSR defs, nor do we allow flag setting variants
of these opcodes in machine code. There are several corner cases to
consider, and getting one wrong would previously lead to nasty
miscompilation. It's not the first time I've debugged one, so this
time I added enough verification to ensure it won't happen again.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140228 91177308-0d34-0410-b5e6-96231b3b80d8
nstrEmitter.cpp
electionDAGISel.cpp
|
| e97190fdf875843e8161a942f2046fd3ef81330f |
21-Sep-2011 |
Bruno Cardoso Lopes <bruno.cardoso@gmail.com> |
Add a DAGCombine for subvector extracts to remove useless chains of
subvector inserts and extracts. Initial patch by Rackover, Zvi with
some tweak done by me.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140204 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 83a8031336a1155e6b0c3e9a84164324e08d1c8b |
20-Sep-2011 |
Andrew Trick <atrick@apple.com> |
Restore hasPostISelHook tblgen flag.
No functionality change. The hook makes it explicit which patterns
require "special" handling. i.e. it self-documents tblgen
deficiencies. I plan to add verification in ExpandISelPseudos and
Thumb2SizeReduce to catch any missing hasPostISelHooks. Otherwise it's
too fragile.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140160 91177308-0d34-0410-b5e6-96231b3b80d8
nstrEmitter.cpp
electionDAGISel.cpp
|
| 4815d56bb2c356a610f46753c5f1cefafa113b21 |
20-Sep-2011 |
Andrew Trick <atrick@apple.com> |
ARM isel bug fix for adds/subs operands.
Modified ARMISelLowering::AdjustInstrPostInstrSelection to handle the
full gamut of CPSR defs/uses including instructins whose "optional"
cc_out operand is not really optional. This allowed removal of the
hasPostISelHook to simplify the .td files and make the implementation
more robust.
Fixes rdar://10137436: sqlite3 miscompile
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140134 91177308-0d34-0410-b5e6-96231b3b80d8
nstrEmitter.cpp
electionDAGISel.cpp
|
| 3af7a67629292840f0dbae8fad4e333b009e69dd |
20-Sep-2011 |
Andrew Trick <atrick@apple.com> |
whitespace
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140133 91177308-0d34-0410-b5e6-96231b3b80d8
nstrEmitter.cpp
electionDAGISel.cpp
|
| b6266fb6026bdd900d8f045bf01300ef549e1802 |
18-Sep-2011 |
Nadav Rotem <nadav.rotem@intel.com> |
white space cleanups
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139994 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeVectorOps.cpp
|
| 331120b1a482b782e8dffce63033bb8514ba2a96 |
15-Sep-2011 |
Eli Friedman <eli.friedman@gmail.com> |
Some legalization fixes for atomic load and store.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139851 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
egalizeIntegerTypes.cpp
egalizeTypes.h
|
| 436fe8498a0a3368d2690290e805213a0f114d0d |
14-Sep-2011 |
Nadav Rotem <nadav.rotem@intel.com> |
Add integer promotion support for vselect
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139692 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeIntegerTypes.cpp
egalizeTypes.h
|
| 596f447467b35d7513c997cd9098026938676461 |
14-Sep-2011 |
Eli Friedman <eli.friedman@gmail.com> |
Fix check for unaligned load/store so it doesn't catch over-aligned load/store.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139649 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| fe731214d2529f7b30527fc312964af411867dd0 |
13-Sep-2011 |
Eli Friedman <eli.friedman@gmail.com> |
Error out on CodeGen of unaligned load/store. Fix test so it isn't accidentally testing that case.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139641 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| 8f28aaf72c61a493dfcd1b838ff8c5050352b5cd |
13-Sep-2011 |
Nadav Rotem <nadav.rotem@intel.com> |
Fix the assertion which checks the size of the input operand.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139633 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeVectorOps.cpp
|
| aec5861bb6ace3734163c000cb75ca2e22e29caa |
13-Sep-2011 |
Nadav Rotem <nadav.rotem@intel.com> |
Add vselect target support for targets that do not support blend but do support
xor/and/or (For example SSE2).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139623 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeVectorOps.cpp
electionDAG.cpp
|
| c3ab388ba9574eb93c44ed57ea46acd4f623b5dc |
10-Sep-2011 |
Chris Lattner <sabre@nondot.org> |
tidy up a bit
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139419 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| 9db817fd0ce0949d0358f5cedfd9ca5a9f1726dd |
09-Sep-2011 |
Eli Friedman <eli.friedman@gmail.com> |
Make the SelectionDAG verify that all the operands of BUILD_VECTOR have the same type. Teach DAGCombiner::visitINSERT_VECTOR_ELT not to make invalid BUILD_VECTORs. Fixes PR10897.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139407 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
electionDAG.cpp
|
| 9aee335c23bec4f6d1b2cab3bca76231d7b0d556 |
09-Sep-2011 |
Devang Patel <dpatel@apple.com> |
Directly point debug info to the stack slot of the arugment, instead of trying to keep track of vreg in which it the arugment is copied. The LiveDebugVariable can keep track of variable's ranges.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139330 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
unctionLoweringInfo.cpp
electionDAGBuilder.cpp
|
| 981a010c095b8fb57422df6fb90b6d802082afc5 |
07-Sep-2011 |
Eli Friedman <eli.friedman@gmail.com> |
Relax the MemOperands on atomics a bit. Fixes -verify-machineinstrs failures for atomic laod/store on ARM.
(The fix for the related failures on x86 is going to be nastier because we actually need Acquire memoperands attached to the atomic load instrs, etc.)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139221 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 28b77e968d2b01fc9da724762bd8ddcd80650e32 |
06-Sep-2011 |
Duncan Sands <baldrick@free.fr> |
Add codegen support for vector select (in the IR this means a select
with a vector condition); such selects become VSELECT codegen nodes.
This patch also removes VSETCC codegen nodes, unifying them with SETCC
nodes (codegen was actually often using SETCC for vector SETCC already).
This ensures that various DAG combiner optimizations kick in for vector
comparisons. Passes dragonegg bootstrap with no testsuite regressions
(nightly testsuite as well as "make check-all"). Patch mostly by
Nadav Rotem.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139159 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
egalizeIntegerTypes.cpp
egalizeTypes.cpp
egalizeTypes.h
egalizeTypesGeneric.cpp
egalizeVectorOps.cpp
egalizeVectorTypes.cpp
electionDAG.cpp
electionDAGBuilder.cpp
argetLowering.cpp
|
| 4a544a79bd735967f1d33fe675ae4566dbd17813 |
06-Sep-2011 |
Duncan Sands <baldrick@free.fr> |
Split the init.trampoline intrinsic, which currently combines GCC's
init.trampoline and adjust.trampoline intrinsics, into two intrinsics
like in GCC. While having one combined intrinsic is tempting, it is
not natural because typically the trampoline initialization needs to
be done in one function, and the result of adjust trampoline is needed
in a different (nested) function. To get around this llvm-gcc hacks the
nested function lowering code to insert an additional parent variable
holding the adjust.trampoline result that can be accessed from the child
function. Dragonegg doesn't have the luxury of tweaking GCC code, so it
stored the result of adjust.trampoline in the memory GCC set aside for
the trampoline itself (this is always available in the child function),
and set up some new memory (using an alloca) to hold the trampoline.
Unfortunately this breaks Go which allocates trampoline memory on the
heap and wants to use it even after the parent has exited (!). Rather
than doing even more hacks to get Go working, it seemed best to just use
two intrinsics like in GCC. Patch mostly by Sanjoy Das.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139140 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
electionDAG.cpp
electionDAGBuilder.cpp
|
| 7ab15f6d4b9b9fd03c8ab6327ac2b1b3c4b4d04b |
03-Sep-2011 |
Owen Anderson <resistor@mac.com> |
Fix a truly heinous bug in DAGCombine related to AssertZext.
If we have a chain of zext -> assert_zext -> zext -> use, the first zext would get simplified away because of the later zext, and then the later zext would get simplified away because of the assert. The solution is to teach SimplifyDemandedBits that assert_zext demands all of the high bits of its input, rather than only those demanded by its users. No testcase because the only example I have manifests as llvm-gcc miscompiling LLVM, and I haven't found a smaller case that reproduces this problem.
Fixes <rdar://problem/10063365>.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139059 91177308-0d34-0410-b5e6-96231b3b80d8
argetLowering.cpp
|
| 6b13cd415493187b4c597fc1a60fae314067cdb2 |
02-Sep-2011 |
Dan Gohman <gohman@apple.com> |
Revert r131152, r129796, r129761. This code is currently considered
to be unreliable on platforms which require memcpy calls, and it is
complicating broader legalize cleanups. It is hoped that these cleanups
will make memcpy byval easier to implement in the future.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138977 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 340d78f4e7b95c235d0ecf315b755bebefd0a168 |
01-Sep-2011 |
Andrew Trick <atrick@apple.com> |
PreRA scheduler should avoid cloning compares.
Added canClobberReachingPhysRegUse() to handle a particular pattern in
which a two-address instruction could be forced to interfere with
EFLAGS, causing a compare to be unnecessarilly cloned.
Fixes rdar://problem/5875261
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138924 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGRRList.cpp
|
| fcd75e5efb482f35cfc22fd4b64e047930130fd6 |
31-Aug-2011 |
Eli Friedman <eli.friedman@gmail.com> |
Misc cleanup; addresses Duncan's comments on r138877.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138887 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeFloatTypes.cpp
egalizeIntegerTypes.cpp
egalizeTypes.cpp
egalizeTypes.h
|
| 62bb16cfd10dd271eab6c31d982bca4d79138602 |
31-Aug-2011 |
Eli Friedman <eli.friedman@gmail.com> |
Fill in type legalization for MERGE_VALUES in all the various cases. Patch by Micah Villmow. (No testcase because the issue only showed up in an out-of-tree backend.)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138877 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeFloatTypes.cpp
egalizeIntegerTypes.cpp
egalizeTypes.cpp
egalizeTypes.h
egalizeTypesGeneric.cpp
egalizeVectorTypes.cpp
|
| ba567d670d32e102a70b106fbfe284835085cb3f |
31-Aug-2011 |
Eli Friedman <eli.friedman@gmail.com> |
Generic expansion for atomic load/store into cmpxchg/atomicrmw xchg; implements 64-bit atomic load/store for ARM.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138872 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeIntegerTypes.cpp
egalizeTypes.h
|
| 37fefc20d3a1e3934a377567d54a141f67752227 |
30-Aug-2011 |
Evan Cheng <evan.cheng@apple.com> |
Follow up to r138791.
Add a instruction flag: hasPostISelHook which tells the pre-RA scheduler to
call a target hook to adjust the instruction. For ARM, this is used to
adjust instructions which may be setting the 's' flag. ADC, SBC, RSB, and RSC
instructions have implicit def of CPSR (required since it now uses CPSR physical
register dependency rather than "glue"). If the carry flag is used, then the
target hook will *fill in* the optional operand with CPSR. Otherwise, the hook
will remove the CPSR implicit def from the MachineInstr.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138810 91177308-0d34-0410-b5e6-96231b3b80d8
nstrEmitter.cpp
electionDAGISel.cpp
|
| 069e2ed794a90cb5108a35627ee148866795f140 |
26-Aug-2011 |
Eli Friedman <eli.friedman@gmail.com> |
Atomic load/store on ARM/Thumb.
I don't really like the patterns, but I'm having trouble coming up with a
better way to handle them.
I plan on making other targets use the same legalization
ARM-without-memory-barriers is using... it's not especially efficient, but
if anyone cares, it's not that hard to fix for a given target if there's
some better lowering.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138621 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
electionDAGBuilder.cpp
|
| 327236cd6c211e54fc6288b0ac2b413901cc0611 |
24-Aug-2011 |
Eli Friedman <eli.friedman@gmail.com> |
Basic x86 code generation for atomic load and store instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138478 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
electionDAG.cpp
electionDAGBuilder.cpp
electionDAGBuilder.h
|
| 4477d691ed9fa63f051986dcb98e358054c8281f |
23-Aug-2011 |
Bill Wendling <isanbard@gmail.com> |
A landingpad instruction is neither folded nor dead.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138387 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 1dafa70585bf9807efefb54c1f311bfe7bd9a3f3 |
23-Aug-2011 |
Evan Cheng <evan.cheng@apple.com> |
Fix 80 col violations.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138356 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| 33e94fa99c5771f7c078267a0d201f6389b617b4 |
22-Aug-2011 |
Nick Lewycky <nicholas@mxc.ca> |
Be less redundant.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138252 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeVectorTypes.cpp
|
| deaa64546ea1d0922aa4671a05f13be3d7c9d53c |
20-Aug-2011 |
Benjamin Kramer <benny.kra@googlemail.com> |
Roll back the rest of r126557. It's a hack that will break in some obscure cases.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138130 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 5aa5d574f464ff9ff15a4c01360aaabc9bdc8a8f |
19-Aug-2011 |
Nick Lewycky <nicholas@mxc.ca> |
Eli points out that this is what report_fatal_error() is for.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138091 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeVectorTypes.cpp
|
| d133bf8f27af57c9ed807a033f2375d80bf644a2 |
19-Aug-2011 |
Nick Lewycky <nicholas@mxc.ca> |
This is not actually unreachable, so don't use llvm_unreachable for it. Since
the intent seems to be to terminate even in Release builds, just use abort()
directly.
If program flow ever reaches a __builtin_unreachable (which llvm_unreachable is
#define'd to on newer GCCs) then the program is undefined.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138068 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeVectorTypes.cpp
|
| 74af88a6661ad5185924bf39164fb4aa144d32cf |
19-Aug-2011 |
Ivan Krasin <krasin@chromium.org> |
FastISel: avoid function calls between the materialization of the constant and its use.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137993 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
|
| 2ac0e6be05d53323d305155fcf53d50c87d6a9b2 |
17-Aug-2011 |
Bill Wendling <isanbard@gmail.com> |
Add the support in code-gen for the landingpad instruction lowering.
The landingpad instruction is lowered into the EXCEPTIONADDR and EHSELECTION
SDNodes. The information from the landingpad instruction is harvested by the
'AddLandingPadInfo' function. The new EH uses the current EH scheme in the
back-end. This will change once we switch over to the new scheme. (Reviewed by
Jakob!)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137880 91177308-0d34-0410-b5e6-96231b3b80d8
unctionLoweringInfo.cpp
electionDAGBuilder.cpp
|
| a65a3bc1a18c559f52a749dd13063b6ae3fdc779 |
17-Aug-2011 |
Bill Wendling <isanbard@gmail.com> |
Revert patch. Forgot a dependent commit.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137875 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| 4eb20621438eb98fdbcdb0b224de7609d5ef76f2 |
17-Aug-2011 |
Bill Wendling <isanbard@gmail.com> |
Add the body of 'visitLandingPad'.
This generates the SDNodes for the new exception handling scheme. It takes the
two values coming from the landingpad instruction and assigns them to the
EXCEPTIONADDR and EHSELECTION nodes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137873 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| 6d1f5d951bab2222096210e76e6f7e18e88ae547 |
16-Aug-2011 |
Nadav Rotem <nadav.rotem@intel.com> |
Revert r137562 because it caused PR10674
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137719 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 5cbba0167165c61deb8f3223143643083013f046 |
13-Aug-2011 |
Nadav Rotem <nadav.rotem@intel.com> |
Fix PR 10635. When generating integer constants, the constant element type may
be illegal, even if the requested vector type is legal. Testcase is one of the
disabled ARM tests in the vector-select patch.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137562 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| e6e8826870bee3facb04f950f0bd725f8a88623d |
12-Aug-2011 |
Bill Wendling <isanbard@gmail.com> |
Initial commit of the 'landingpad' instruction.
This implements the 'landingpad' instruction. It's used to indicate that a basic
block is a landing pad. There are several restrictions on its use (see
LangRef.html for more detail). These restrictions allow the exception handling
code to gather the information it needs in a much more sane way.
This patch has the definition, implementation, C interface, parsing, and bitcode
support in it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137501 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
electionDAGBuilder.h
|
| c796ae1d68c92026be5d353584b514311cc3eb0d |
12-Aug-2011 |
Nadav Rotem <nadav.rotem@intel.com> |
Revert r137310 because it does not optimize any code on ToT
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137466 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 1f6a329f79b3568d379142f921f59c4143ddaa14 |
12-Aug-2011 |
Duncan Sands <baldrick@free.fr> |
Silence a bunch (but not all) "variable written but not read" warnings
when building with assertions disabled.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137460 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeFloatTypes.cpp
egalizeVectorTypes.cpp
electionDAGISel.cpp
|
| f80a894bf03ea65624a25b8f64bfcc9c6cf7f80f |
11-Aug-2011 |
Nadav Rotem <nadav.rotem@intel.com> |
[AVX] When joining two XMM registers into a YMM register, make sure that the
lower XMM register gets in first. This will allow the SUBREG pattern to
elliminate the first vector insertion.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137310 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| f4ea68fa5a85d3e883cf35075133e64de4dfc046 |
11-Aug-2011 |
Chris Lattner <sabre@nondot.org> |
fix PR10605 / rdar://9930964 by adding a pretty scary missed check.
It's somewhat surprising anything works without this. Before we would
compile the testcase into:
test: # @test
movl $4, 8(%rdi)
movl 8(%rdi), %eax
orl %esi, %eax
cmpl $32, %edx
movl %eax, -4(%rsp) # 4-byte Spill
je .LBB0_2
now we produce:
test: # @test
movl 8(%rdi), %eax
movl $4, 8(%rdi)
orl %esi, %eax
cmpl $32, %edx
movl %eax, -4(%rsp) # 4-byte Spill
je .LBB0_2
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137303 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 5787124820f9f544216675c020ff0b33e090d181 |
04-Aug-2011 |
Devang Patel <dpatel@apple.com> |
Do not drop undef debug values. These are used as range termination marker by live debug variable pass.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136834 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| 26689ac37ebec3b358588089415509285e558de9 |
03-Aug-2011 |
Eli Friedman <eli.friedman@gmail.com> |
New approach to r136737: insert the necessary fences for atomic ops in platform-independent code, since a bunch of platforms (ARM, Mips, PPC, Alpha are the relevant targets here) need to do essentially the same thing.
I think this completes the basic CodeGen for atomicrmw and cmpxchg.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136813 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
argetLowering.cpp
|
| 6cdc1f43e6a6dd7ba38a334b0b2f8fa70d4dc4cd |
02-Aug-2011 |
Eli Friedman <eli.friedman@gmail.com> |
Don't create a ridiculous EXTRACT_ELEMENT. PR10563.
The testcase looks extremely fragile, so I'm adding an assertion which should catch any cases like this.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136711 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| dccc03b2423fe65efb5963ae816b99c24fc53374 |
31-Jul-2011 |
Bill Wendling <isanbard@gmail.com> |
Add the 'resume' instruction for the new EH rewrite.
This adds the 'resume' instruction class, IR parsing, and bitcode reading and
writing. The 'resume' instruction resumes propagation of an existing (in-flight)
exception whose unwinding was interrupted with a 'landingpad' instruction (to be
added later).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136589 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
electionDAGBuilder.h
|
| 10c6d12a9fd4dab411091f64db4db69670b88850 |
30-Jul-2011 |
Bill Wendling <isanbard@gmail.com> |
Revert r136253, r136263, r136269, r136313, r136325, r136326, r136329, r136338,
r136339, r136341, r136369, r136387, r136392, r136396, r136429, r136430, r136444,
r136445, r136446, r136253 pending review.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136556 91177308-0d34-0410-b5e6-96231b3b80d8
unctionLoweringInfo.cpp
electionDAGBuilder.cpp
electionDAGBuilder.h
|
| c8f34de5d615b858319f33d4e19c24622d971416 |
30-Jul-2011 |
Jakub Staszak <jstaszak@apple.com> |
Do not lose branch weights when lowering SwitchInst.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136529 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
electionDAGBuilder.h
|
| 95ece8efc0eac972366f1a5e97e3c7ae69a73600 |
29-Jul-2011 |
Jakub Staszak <jstaszak@apple.com> |
Remove unneeded const_cast.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136506 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| 55ba816883842e793cdeb32fcb805c4e011b527f |
29-Jul-2011 |
Eli Friedman <eli.friedman@gmail.com> |
Misc optimizer+codegen work for 'cmpxchg' and 'atomicrmw'. They appear to be
working on x86 (at least for trivial testcases); other architectures will
need more work so that they actually emit the appropriate instructions for
orderings stricter than 'monotonic'. (As far as I can tell, the ARM, PPC,
Mips, and Alpha backends need such changes.)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136457 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeIntegerTypes.cpp
electionDAG.cpp
electionDAGBuilder.cpp
|
| 741bf790b85595659c91d511c4ff60975180449f |
29-Jul-2011 |
Bill Wendling <isanbard@gmail.com> |
Use the pointer type size.
With this, we can now compile a simple EH program.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136446 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| 7d44c453511ce4c43e0a3c128f018f04c330d390 |
29-Jul-2011 |
Bill Wendling <isanbard@gmail.com> |
And now something that compiles...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136445 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| 744b4bd170365a1e2953e8d28b676a26ee5425ba |
29-Jul-2011 |
Bill Wendling <isanbard@gmail.com> |
Make sure to sext or trunc the result from the register.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136444 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| ac03e736c77bcf7e8deb515fc16a7e55d343dc8d |
29-Jul-2011 |
Chandler Carruth <chandlerc@gmail.com> |
Rewrite the CMake build to use explicit dependencies between libraries,
specified in the same file that the library itself is created. This is
more idiomatic for CMake builds, and also allows us to correctly specify
dependencies that are missed due to bugs in the GenLibDeps perl script,
or change from compiler to compiler. On Linux, this returns CMake to
a place where it can relably rebuild several targets of LLVM.
I have tried not to change the dependencies from the ones in the current
auto-generated file. The only places I've really diverged are in places
where I was seeing link failures, and added a dependency. The goal of
this patch is not to start changing the dependencies, merely to move
them into the correct location, and an explicit form that we can control
and change when necessary.
This also removes a serialization point in the build because we don't
have to scan all the libraries before we begin building various tools.
We no longer have a step of the build that regenerates a file inside the
source tree. A few other associated cleanups fall out of this.
This isn't really finished yet though. After talking to dgregor he urged
switching to a single CMake macro to construct libraries with both
sources and dependencies in the arguments. Migrating from the two macros
to that style will be a follow-up patch.
Also, llvm-config is still generated with GenLibDeps.pl, which means it
still has slightly buggy dependencies. The internal CMake
'llvm-config-like' macro uses the correct explicitly specified
dependencies however. A future patch will switch llvm-config generation
(when using CMake) to be based on these deps as well.
This may well break Windows. I'm getting a machine set up now to dig
into any failures there. If anyone can chime in with problems they see
or ideas of how to solve them for Windows, much appreciated.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136433 91177308-0d34-0410-b5e6-96231b3b80d8
MakeLists.txt
|
| 367853733247b46f2fa49359dd3490bada3cd111 |
29-Jul-2011 |
Bill Wendling <isanbard@gmail.com> |
Visit the landingpad instruction.
This generates the correct SDNodes for the landingpad instruction. It makes an
assumption that the result of the landingpad instruction has at least two
values. And that the first value is a pointer to the exception object and the
second value is the "selector."
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136430 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| e963a3814f3f8fde394da263340bc0888011291c |
29-Jul-2011 |
Bill Wendling <isanbard@gmail.com> |
Add the AddLandingPadInfo function.
AddLandingPadInfo takes a landingpad instruction and grabs all of the
information from it that it needs for EH table generation.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136429 91177308-0d34-0410-b5e6-96231b3b80d8
unctionLoweringInfo.cpp
|
| ff03048c1350fcc4fda1ef6d6c57252f3a950854 |
28-Jul-2011 |
Eli Friedman <eli.friedman@gmail.com> |
LangRef and basic memory-representation/reading/writing for 'cmpxchg' and
'atomicrmw' instructions, which allow representing all the current atomic
rmw intrinsics.
The allowed operands for these instructions are heavily restricted at the
moment; we can probably loosen it a bit, but supporting general
first-class types (where it makes sense) might get a bit complicated,
given how SelectionDAG works.
As an initial cut, these operations do not support specifying an alignment,
but it would be possible to add if we think it's useful. Specifying an
alignment lower than the natural alignment would be essentially
impossible to support on anything other than x86, but specifying a greater
alignment would be possible. I can't think of any useful optimizations which
would use that information, but maybe someone else has ideas.
Optimizer/codegen support coming soon.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136404 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
electionDAGBuilder.h
|
| 7379b6650008fba555d5472d5c76e8efc59e8a21 |
28-Jul-2011 |
Bill Wendling <isanbard@gmail.com> |
The personality function should be a Function* and not just a Value*.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136392 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| 2ff4bc615584fa9f32e64959767d64f2cb09fb99 |
28-Jul-2011 |
Nadav Rotem <nadav.rotem@intel.com> |
CR fix: The ANY_EXTEND can be removed because the input and putput type must be
identical.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136355 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeIntegerTypes.cpp
|
| 14648468011c92a4210f8118721d58c25043daf8 |
28-Jul-2011 |
Eli Friedman <eli.friedman@gmail.com> |
Code generation for 'fence' instruction.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136283 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
electionDAG.cpp
electionDAGBuilder.cpp
|
| 772fe17a6d07304ae2e6b3052bbb24ebb751f0f3 |
27-Jul-2011 |
Bill Wendling <isanbard@gmail.com> |
Merge the contents from exception-handling-rewrite to the mainline.
This adds the new instructions 'landingpad' and 'resume'.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136253 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
electionDAGBuilder.h
|
| a44defeb2208376ca3113ffdddc391570ba865b8 |
27-Jul-2011 |
Jeffrey Yasskin <jyasskin@google.com> |
Explicitly cast narrowing conversions inside {}s that will become errors in
C++0x.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136211 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| cbdccdeea96f26198fc8225c1a32c04ca01f8a26 |
27-Jul-2011 |
Dan Gohman <gohman@apple.com> |
Revert r136156, which broke several buildbots.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136206 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| c680b92460abaa8daa7796c05447f64b01b9f11b |
27-Jul-2011 |
Dan Gohman <gohman@apple.com> |
Delete unnecessarily cautious LastCALLSEQ code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136156 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 24f05334e60bd2b2b614d5eb72ee6c92ad0a9bc8 |
26-Jul-2011 |
Eli Friedman <eli.friedman@gmail.com> |
Add obvious missing case to switch. PR10497.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136130 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeVectorTypes.cpp
|
| 47f3513dd574535aeb40c9eb11134f0899e92269 |
26-Jul-2011 |
Eli Friedman <eli.friedman@gmail.com> |
Initial implementation of 'fence' instruction, the new C++0x-style replacement for llvm.memory.barrier.
This is just a LangRef entry and reading/writing/memory representation; optimizer+codegen support coming soon.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136009 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
electionDAGBuilder.h
|
| ed4b4272ba2c2ff68f839738ba8147c3606d8885 |
26-Jul-2011 |
Eli Friedman <eli.friedman@gmail.com> |
Make sure this DAGCombine actually returns an UNDEF of the correct type; PR10476.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135993 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 0381c21d2ddc182aebfef25c6500d781ddb428fe |
20-Jul-2011 |
Eli Friedman <eli.friedman@gmail.com> |
PR10421: Fix a straightforward bug in the widening logic for CONCAT_VECTORS.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135595 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeVectorTypes.cpp
|
| ebf5f0962932032481ae306b42c96c68c3a0be95 |
20-Jul-2011 |
Logan Chien <loganchien@google.com> |
Merge with LLVM upstream r135568 (Jul 20th 2011)
Conflicts:
lib/Bitcode/Reader/BitcodeReader.cpp
Change-Id: Iebed76d2f7d281e742947e31d9a0b78174daf2d6
|
| 497a397f3e4edeb102bb2e2509a3795feafaf742 |
19-Jul-2011 |
Devang Patel <dpatel@apple.com> |
Revert r135423.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135454 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
electionDAGISel.cpp
|
| 3ba292dbc2acee2d1052fb7ffe332e2164147b47 |
18-Jul-2011 |
Jeffrey Yasskin <jyasskin@google.com> |
Add APInt(numBits, ArrayRef<uint64_t> bigVal) constructor to prevent future ambiguity
errors like the one corrected by r135261. Migrate all LLVM callers of the old
constructor to the new one.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135431 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
egalizeFloatTypes.cpp
electionDAG.cpp
|
| 1360bc8eb029d51d426c77c4b1410849ff308893 |
18-Jul-2011 |
Devang Patel <dpatel@apple.com> |
During bottom up fast-isel, instructions emitted to materalize registers are at top of basic block and do not have debug location. This may misguide debugger while entering the basic block and sometimes debugger provides semi useful view of current location to developer by picking up previous known location as current location. Assign a sensible location to the first instruction in a basic block, if it does not have one location derived from source file, so that debugger can provide meaningful user experience to developers in edge cases.
[take 2]
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135423 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
electionDAGISel.cpp
|
| db125cfaf57cc83e7dd7453de2d509bc8efd0e5e |
18-Jul-2011 |
Chris Lattner <sabre@nondot.org> |
land David Blaikie's patch to de-constify Type, with a few tweaks.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135375 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
astISel.cpp
unctionLoweringInfo.cpp
nstrEmitter.cpp
egalizeDAG.cpp
egalizeIntegerTypes.cpp
egalizeTypes.cpp
egalizeVectorTypes.cpp
electionDAG.cpp
electionDAGBuilder.cpp
argetLowering.cpp
|
| 811ad8690b798cdcbd9d80a2b6a404145222b9a9 |
17-Jul-2011 |
Nadav Rotem <nadav.rotem@intel.com> |
Minor code cleanups
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135362 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeIntegerTypes.cpp
|
| a71642b2a4944eaa269d881cf71b02b8e8fe5638 |
16-Jul-2011 |
Nowar Gu <nowar100@gmail.com> |
Merge upstream to r135343 at Sat. 16th July 2011.
|
| e63e5ab50ab37fd59cc6e815fffcb90e75537ca3 |
16-Jul-2011 |
Dan Gohman <gohman@apple.com> |
LegalizeDAG doesn't need its own copy of this enum.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135320 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 75b10047fc57c30c86bb7c9ea0ee923ff3c33a7e |
16-Jul-2011 |
Dan Gohman <gohman@apple.com> |
Delete LegalizeDAG's own version of isTypeLegal and getTypeAction
and just use the ones from TargetLowering directly.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135318 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| ea0270298de4d2a4186454fc39a6836e99271f1d |
16-Jul-2011 |
Dan Gohman <gohman@apple.com> |
Delete an unused variable and a redundant assert.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135311 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 6a109f9d70bf7f75541400145a7a89880cc48166 |
15-Jul-2011 |
Dan Gohman <gohman@apple.com> |
Modernize comments.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135305 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 5427edeb68d653ced860ed14f83848ebbb01b64b |
14-Jul-2011 |
Eric Christopher <echristo@apple.com> |
Check register class matching instead of width of type matching
when determining validity of matching constraint. Allow i1
types access to the GR8 reg class for x86.
Fixes PR10352 and rdar://9777108
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135180 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
argetLowering.cpp
|
| d0f3ef807ee4210b97a7a6bc4231e89403145b83 |
14-Jul-2011 |
Nadav Rotem <nadav.rotem@intel.com> |
[VECTOR-SELECT]
During type legalization we often use the SIGN_EXTEND_INREG SDNode.
When this SDNode is legalized during the LegalizeVector phase, it is
scalarized because non-simple types are automatically marked to be expanded.
In this patch we add support for lowering SIGN_EXTEND_INREG manually.
This fixes CodeGen/X86/vec_sext.ll when running with the '-promote-elements'
flag.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135144 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeVectorOps.cpp
|
| aeb86fab3e875b6ffebea42f4f4dd3e7791ae365 |
14-Jul-2011 |
Nadav Rotem <nadav.rotem@intel.com> |
Add assertion for the chain value type
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135143 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 3ff25514ce24a521fc9524eefb257a1f5f262d84 |
14-Jul-2011 |
Benjamin Kramer <benny.kra@googlemail.com> |
Don't emit a bit test if there is only one case the test can yield false. A simple SETNE is sufficient.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135126 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| 7332e6ee25378e19c0f621c80c32b283b07f428a |
14-Jul-2011 |
Eric Christopher <echristo@apple.com> |
Add a dag combine pattern for folding C2-(A+C1) -> (C2-C1)-A
Fixes rdar://9761830
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135123 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| fc6d3a49867cd38954dc40936a88f1907252c6d2 |
13-Jul-2011 |
Jay Foad <jay.foad@gmail.com> |
Convert InsertValueInst and ExtractValueInst APIs to use ArrayRef.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135040 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
electionDAGBuilder.cpp
|
| 33390848a7eca75301d04a59b89b516d83e19ee0 |
08-Jul-2011 |
Cameron Zwarich <zwarich@apple.com> |
Add an intrinsic and codegen support for fused multiply-accumulate. The intent
is to use this for architectures that have a native FMA instruction.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134742 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
egalizeFloatTypes.cpp
egalizeTypes.h
electionDAG.cpp
electionDAGBuilder.cpp
argetLowering.cpp
|
| 3492a4af129f6068739bbbe3f8c7fbe7e4af2fcb |
08-Jul-2011 |
Benjamin Kramer <benny.kra@googlemail.com> |
Apparently we can't expect a BinaryOperator here.
Should fix llvm-gcc selfhost.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134699 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| 9c64030445cbe6ac486b90c5f459f91e06770474 |
08-Jul-2011 |
Benjamin Kramer <benny.kra@googlemail.com> |
Emit a more efficient magic number multiplication for exact sdivs.
We have to do this in DAGBuilder instead of DAGCombiner, because the exact bit is lost after building.
struct foo { char x[24]; };
long bar(struct foo *a, struct foo *b) { return a-b; }
is now compiled into
movl 4(%esp), %eax
subl 8(%esp), %eax
sarl $3, %eax
imull $-1431655765, %eax, %eax
instead of
movl 4(%esp), %eax
subl 8(%esp), %eax
movl $715827883, %ecx
imull %ecx
movl %edx, %eax
shrl $31, %eax
sarl $2, %edx
addl %eax, %edx
movl %edx, %eax
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134695 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
electionDAGBuilder.h
argetLowering.cpp
|
| 09ad0b6894ae4eab9837970ccd4574681097eb6e |
08-Jul-2011 |
Eric Christopher <echristo@apple.com> |
Remove a FIXME. All of the standard ones are in the list.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134647 91177308-0d34-0410-b5e6-96231b3b80d8
argetLowering.cpp
|
| 944520f38c79f3cbf1abfca92a5414458d639029 |
07-Jul-2011 |
Lang Hames <lhames@gmail.com> |
Add functions 'hasPredecessor' and 'hasPredecessorHelper' to SDNode. The
hasPredecessorHelper function allows predecessors to be cached to speed up
repeated invocations. This fixes PR10186.
X.isPredecessorOf(Y) now just calls Y.hasPredecessor(X)
Y.hasPredecessor(X) calls Y.hasPredecessorHelper(X, Visited, Worklist) with
empty Visited and Worklist sets (i.e. no caching over invocations).
Y.hasPredecessorHelper(X, Visited, Worklist) caches search state in Visited
and Worklist to speed up repeated calls. The Visited set is searched for X
before going to the worklist to further search the DAG if necessary.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134592 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
electionDAG.cpp
|
| 882e1e1c5d157a8bb2f001f2f4cacf0f0dd722a3 |
07-Jul-2011 |
Eric Christopher <echristo@apple.com> |
Grammar and 80-col.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134555 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 9da9934e27dfb48de77b80a3e20ed2d869b52024 |
06-Jul-2011 |
Jakub Staszak <jstaszak@apple.com> |
Introduce "expect" intrinsic instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134516 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| 1ffcf07d9fb7a7db5737ca7307ae8e0aa713f278 |
02-Jul-2011 |
Nowar Gu <nowar100@gmail.com> |
Merge upstream to r134306 at Sat. 2nd July 2011.
|
| 5b1b4489cf3a0f56f8be0673fc5cc380a32d277b |
01-Jul-2011 |
Evan Cheng <evan.cheng@apple.com> |
Rename TargetSubtarget to TargetSubtargetInfo for consistency.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134259 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGSDNodes.cpp
|
| 53d48080e55bf0c99cb7ca9de5b15a084d7324b5 |
01-Jul-2011 |
Nowar Gu <nowar100@gmail.com> |
Merge upstream to r134237 at Fri. 1st July 2011.
Conflicts:
lib/Target/ARM/ARMCodeEmitter.cpp
|
| 5244c4cc2fd31e49bae2b192bd824a94b6ad5331 |
30-Jun-2011 |
Eric Christopher <echristo@apple.com> |
Remove getRegClassForInlineAsmConstraint and all dependencies.
Fixes rdar://9643582
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134123 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
argetLowering.cpp
|
| 272511f518127aae8c96935689b5607455542863 |
30-Jun-2011 |
Devang Patel <dpatel@apple.com> |
Revert r133953 for now.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134116 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
electionDAGISel.cpp
|
| bdd1ef2dbec63d4e428f4ff19d54821dc08fa168 |
29-Jun-2011 |
Benjamin Kramer <benny.kra@googlemail.com> |
Revert a part of r126557 which could create unschedulable DAGs.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134067 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| ab8be96fd30ca9396e6b84fdddf1ac6208984cad |
29-Jun-2011 |
Evan Cheng <evan.cheng@apple.com> |
Sink SubtargetFeature and TargetInstrItineraries (renamed MCInstrItineraries) into MC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134049 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGSDNodes.cpp
|
| e837dead3c8dc3445ef6a0e2322179c57e264a13 |
28-Jun-2011 |
Evan Cheng <evan.cheng@apple.com> |
- Rename TargetInstrDesc, TargetOperandInfo to MCInstrDesc and MCOperandInfo and
sink them into MC layer.
- Added MCInstrInfo, which captures the tablegen generated static data. Chang
TargetInstrInfo so it's based off MCInstrInfo.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134021 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
nstrEmitter.cpp
nstrEmitter.h
cheduleDAGFast.cpp
cheduleDAGRRList.cpp
cheduleDAGSDNodes.cpp
electionDAGISel.cpp
|
| 016c5829a5dacc3b28cb264b4b6d166552e3d568 |
28-Jun-2011 |
Devang Patel <dpatel@apple.com> |
During bottom up fast-isel, instructions emitted to materalize registers are at top of basic block and do not have debug location. This may misguide debugger while entering the basic block and sometimes debugger provides semi useful view of current location to developer by picking up previous known location as current location. Assign a sensible location to the first instruction in a basic block, if it does not have one location derived from source file, so that debugger can provide meaningful user experience to developers in edge cases.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133953 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
electionDAGISel.cpp
|
| 15993f83a419950f06d2879d6701530ae6449317 |
27-Jun-2011 |
Evan Cheng <evan.cheng@apple.com> |
More refactoring. Move getRegClass from TargetOperandInfo to TargetInstrInfo.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133944 91177308-0d34-0410-b5e6-96231b3b80d8
nstrEmitter.cpp
cheduleDAGRRList.cpp
|
| 702110159a53481227b01fed81fa4eec0ad3cc46 |
27-Jun-2011 |
Owen Anderson <resistor@mac.com> |
The index stored in the RegDefIter is one after the current index. When getting the index, decrement it so that it points to the current element. Fixes an off-by-one bug encountered when trying to make use of MVT::untyped.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133923 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGSDNodes.h
|
| 4ef4c171dba8e479f5f3fe7acb22e9fe97a4d6f8 |
27-Jun-2011 |
Andrew Trick <atrick@apple.com> |
pre-RA-sched: Cleanup register pressure tracking.
Removed the check that peeks past EXTRA_SUBREG, which I don't think
makes sense any more. Intead treat it as a normal register def. No
significant affect on x86 or ARM benchmarks.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133917 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGRRList.cpp
cheduleDAGSDNodes.cpp
|
| f792fa90f1125553008659c743cba85b9b5d2e5e |
27-Jun-2011 |
Jakob Stoklund Olesen <stoklund@2pi.dk> |
Distinguish early clobber output operands from clobbered registers.
Both become <earlyclobber> defs on the INLINEASM MachineInstr, but we
now use two different asm operand kinds.
The new Kind_Clobber is treated identically to the old
Kind_RegDefEarlyClobber for now, but x87 floating point stack inline
assembly does care about the difference.
This will pop a register off the stack:
asm("fstp %st" : : "t"(x) : "st");
While this will pop the input and push an output:
asm("fst %st" : "=&t"(r) : "t"(x));
We need to know if ST0 was a clobber or an output operand, and we can't
depend on <dead> flags for that.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133902 91177308-0d34-0410-b5e6-96231b3b80d8
nstrEmitter.cpp
cheduleDAGFast.cpp
cheduleDAGRRList.cpp
electionDAGBuilder.cpp
|
| e6b8bf8c4a74d48ad5c46c37f3754361acdeda61 |
25-Jun-2011 |
Owen Anderson <resistor@mac.com> |
The scheduler needs to be aware on the existence of untyped nodes when it performs type propagation for EXTRACT_SUBREG.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133838 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGSDNodes.cpp
|
| 8594d429e02c688d428036f8563f09572da3fbff |
24-Jun-2011 |
Devang Patel <dpatel@apple.com> |
Handle debug info for i128 constants.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133821 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
nstrEmitter.cpp
|
| bb5c18c80e7ae4ce49eb9067b664f0559ec50965 |
23-Jun-2011 |
Nowar Gu <nowar100@gmail.com> |
Merge upstream to r133679 at Thu. 23th Jun 2011.
|
| 267010864e139781ef5949939e081c41f954de0a |
22-Jun-2011 |
Jay Foad <jay.foad@gmail.com> |
Replace the existing forms of ConstantArray::get() with a single form
that takes an ArrayRef.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133615 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 109c22c06232358597afec5d8b7a6b6fd24e19b1 |
22-Jun-2011 |
Owen Anderson <resistor@mac.com> |
Fix some trailing issues from my introduction of MVT::untyped and its use for REGISTER_SEQUENCE.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133567 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGRRList.cpp
|
| 9568e5c3c3f1e25288d2ff375dba0fddbf161fd6 |
21-Jun-2011 |
Evan Cheng <evan.cheng@apple.com> |
Teach dag combine to match halfword byteswap patterns.
1. (((x) & 0xFF00) >> 8) | (((x) & 0x00FF) << 8)
=> (bswap x) >> 16
2. ((x&0xff)<<8)|((x&0xff00)>>8)|((x&0xff000000)>>8)|((x&0x00ff0000)<<8))
=> (rotl (bswap x) 16)
This allows us to eliminate most of the def : Pat patterns for ARM rev16
revsh instructions. It catches many more cases for ARM and x86.
rdar://9609108
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133503 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 907af0f20f58f2ea26da7ea64e1f094cd6880db7 |
17-Jun-2011 |
Nowar Gu <nowar100@gmail.com> |
Merge upstream to r133240 at Fri. 17th Jun 2011.
Conflicts:
lib/CodeGen/AsmPrinter/AsmPrinter.cpp
lib/Target/ARM/ARMCodeEmitter.cpp
|
| 4720611025276f01b158a1522620391332ffdc32 |
20-Jun-2011 |
Nadav Rotem <nadav.rotem@intel.com> |
Fix PromoteIntRes_TRUNCATE: Add support for cases where the
source vector type is to be split while the target vector is to be promoted.
(eg: <4 x i64> -> <4 x i8> )
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133424 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeIntegerTypes.cpp
|
| 5b82c2f8911e7e7bcaa563cf15b5d03cf0292379 |
19-Jun-2011 |
Nadav Rotem <nadav.rotem@intel.com> |
Code cleanups: Remove duplicated logic in PromotInteRes_BITCAST, reserve vector space, reuse types.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133389 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeIntegerTypes.cpp
|
| 0928c9e18a1decd856501beeea1bd12453a366b3 |
19-Jun-2011 |
Nadav Rotem <nadav.rotem@intel.com> |
Calls to AssertZext and getZeroExtendInReg must be made using scalar types.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133388 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeIntegerTypes.cpp
|
| c6341e6e50cddc31a6411d9ac82be30747bc111e |
19-Jun-2011 |
Nadav Rotem <nadav.rotem@intel.com> |
When promoting the vector elements in CopyToParts, use vector trunc
instead of scalarizing, and doing an element-by-element truncat.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133382 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| 22a54c1cd711afccd4558374918d12a939e1cca5 |
18-Jun-2011 |
Benjamin Kramer <benny.kra@googlemail.com> |
Don't allocate empty read-only SmallVectors during SelectionDAG deallocation.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133348 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGSDNodes.cpp
electionDAG.cpp
|
| 1396c403897e3d3e04fbf59f6c5fe77cbbab74a6 |
18-Jun-2011 |
Benjamin Kramer <benny.kra@googlemail.com> |
Remove unused but set variables.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133347 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeIntegerTypes.cpp
cheduleDAGRRList.cpp
|
| a3071455e540530ecb644a2e59098129f70ce705 |
18-Jun-2011 |
Eric Christopher <echristo@apple.com> |
Fix UMULO support for 2x register width to allow the full
range without a libcall to a new mulo<mode> libcall
that we'd have to create.
Finishes the rest of rdar://9090077 and rdar://9210061
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133318 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeIntegerTypes.cpp
|
| 5e687ac6158bc28f1831699d7dbfa39d3120b892 |
18-Jun-2011 |
Eric Christopher <echristo@apple.com> |
Fix comment.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133307 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeIntegerTypes.cpp
|
| 362fee90b9a1d64ac091755466caf6a94ade22eb |
17-Jun-2011 |
Eric Christopher <echristo@apple.com> |
Lower multiply with overflow checking to __mulo<mode>
calls if we haven't been able to lower them any
other way.
Fixes rdar://9090077 and rdar://9210061
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133288 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeIntegerTypes.cpp
egalizeTypes.h
argetLowering.cpp
|
| c02a6fa7d8f0ccf2e0059bc40978a466fff3fcab |
17-Jun-2011 |
Jakob Stoklund Olesen <stoklund@2pi.dk> |
Don't use register classes larger than TLI->getRegClassFor(VT).
In Thumb mode we cannot handle GPR virtual registers, even though some
instructions can. When isel is lowering a CopyFromReg, it should limit
itself to subclasses of getRegClassFor(VT).
<rdar://problem/9624323>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133210 91177308-0d34-0410-b5e6-96231b3b80d8
nstrEmitter.cpp
|
| 7cc2b07437a1243c33324549a1904fefc5f1845e |
16-Jun-2011 |
Jakub Staszak <jstaszak@apple.com> |
Introduce MachineBranchProbabilityInfo class, which has similar API to
BranchProbabilityInfo (expect setEdgeWeight which is not available here).
Branch Weights are kept in MachineBasicBlocks. To turn off this analysis
set -use-mbpi=false.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133184 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
electionDAGBuilder.h
electionDAGISel.cpp
|
| 1300f3019e5d590231bbc3d907626708515d3212 |
16-Jun-2011 |
Owen Anderson <resistor@mac.com> |
Change the REG_SEQUENCE SDNode to take an explict register class ID as its first operand. This operand is lowered away by the time we reach MachineInstrs, so the actual register-allocation handling of them doesn't need to change.
This is intended to support using REG_SEQUENCE SDNode's with type MVT::untyped, and is part of the long road to eliminating some of the hacks we currently use to support register pairs and other strange constraints, particularly on ARM NEON.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133178 91177308-0d34-0410-b5e6-96231b3b80d8
nstrEmitter.cpp
|
| 79c890f64f3b67f9b11341aa452c4302b75184aa |
16-Jun-2011 |
Jakob Stoklund Olesen <stoklund@2pi.dk> |
Add TargetRegisterInfo::getRawAllocationOrder().
This virtual function will replace allocation_order_begin/end as the one
to override when implementing custom allocation orders. It is simpler to
have one function return an ArrayRef than having two virtual functions
computing different ends of the same array.
Use getRawAllocationOrder() in place of allocation_order_begin() where
it makes sense, but leave some clients that look like they really want
the filtered allocation orders from RegisterClassInfo.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133170 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| c06b5bf34004a9b01048905c8750761146094586 |
16-Jun-2011 |
Nick Lewycky <nicholas@mxc.ca> |
Add a DAGCombine for (ext (binop (load x), cst)).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133124 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 77b4b13c2a525faf646a6784b24692cf0459b75e |
16-Jun-2011 |
Owen Anderson <resistor@mac.com> |
Add a new MVT::untyped. This will be used in future work for modelling ISA features like register pairs and lists with "interesting" constraints (such as ARM NEON contiguous register lists or even-odd paired registers). We need to be able to generate these instructions (often from intrinsics), but don't want to have to assign a legal type to them. Instead, we'll use an "untyped" edge to bypass the type-checking and simply ensure that the register classes match.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133106 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGRRList.cpp
cheduleDAGSDNodes.h
|
| 4cb971ce1c8b254f29365c988b55f6dcfe86d21e |
15-Jun-2011 |
Andrew Trick <atrick@apple.com> |
Added -stress-sched flag in the Asserts build.
Added a test case for handling physreg aliases during pre-RA-sched.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133063 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGRRList.cpp
cheduleDAGSDNodes.cpp
|
| 8e614322498f9b38995a6bf41100ca617180eacb |
15-Jun-2011 |
Nadav Rotem <nadav.rotem@intel.com> |
getZeroExtendInReg needs to get a scalar type
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133057 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeIntegerTypes.cpp
|
| baff46f192fd028af8950f2e3824ea7c71fbd76e |
15-Jun-2011 |
Nadav Rotem <nadav.rotem@intel.com> |
Enable the simplification of truncating-store after fixing the usage of
GetDemandBits (which must operate on the vector element type).
Fix the a usage of getZeroExtendInReg which must also be done on scalar types.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133052 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
egalizeTypes.h
|
| 92bcd96bbcf42911a76570cc0974e513bc7f261d |
15-Jun-2011 |
Chad Rosier <mcrosier@apple.com> |
When pattern matching during instruction selection make sure shl x,1 is not
converted to add x,x if x is a undef. add undef, undef does not guarantee
that the resulting low order bit is zero.
Fixes <rdar://problem/9453156> and <rdar://problem/9487392>.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133022 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| c2492c28ef04dbc77c5d47ec81ffc64c5407771f |
14-Jun-2011 |
Nadav Rotem <nadav.rotem@intel.com> |
Add a testcase for checking the integer-promotion of many different vector
types (with power of two types such as 8,16,32 .. 512).
Fix a bug in the integer promotion of bitcast nodes. Enable integer expanding
only if the target of the conversion is an integer (when the type action is
scalarize).
Add handling to the legalization of vector load/store in cases where the saved
vector is integer-promoted.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132985 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
egalizeIntegerTypes.cpp
|
| c7cb7ed013d7672bccba61c8df5e921d8bd3ae75 |
14-Jun-2011 |
Nadav Rotem <nadav.rotem@intel.com> |
Disable trunc-store simplification on vectors.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132984 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 9a767330f555f21d6ef311d3a348d3a44f306d35 |
14-Jun-2011 |
Bruno Cardoso Lopes <bruno.cardoso@gmail.com> |
Add one more argument to the prefetch intrinsic to indicate whether it's a data
or instruction cache access. Update the targets to match it and also teach
autoupgrade.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132976 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| 00404bfaef2cd9516191fd35cc08a94a536b1048 |
13-Jun-2011 |
Nadav Rotem <nadav.rotem@intel.com> |
Fix a bug in FindMemType. When widening vector loads, use a wider memory type
only if the number of packed elements is a power of two.
Bug found in Duncan's testcase.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132923 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeVectorTypes.cpp
|
| 0c3e67860af417febb1fa9e870ece912a16085ac |
12-Jun-2011 |
Nadav Rotem <nadav.rotem@intel.com> |
Fix a bug in the calculation of the vectorTypeBreakdown into registers. Odd
types such as i33 were rounded to i32. Originated from Duncan's testcase.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132893 91177308-0d34-0410-b5e6-96231b3b80d8
argetLowering.cpp
|
| b05f14b3b9b372316f4274de246b8a58cf6063eb |
12-Jun-2011 |
Nadav Rotem <nadav.rotem@intel.com> |
Improve the generated code by getCopyFromPartsVector for promoted integer types.
Instead of scalarizing, and doing an element-by-element truncat, use vector
truncate.
Add support for scalarization of vectors: i8 -> <1 x i1> (from Duncan's
testcase).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132892 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| 8c1ec5a0a21dcb3364aace8174f29f209ff3224e |
11-Jun-2011 |
Chad Rosier <mcrosier@apple.com> |
Revert r132871.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132872 91177308-0d34-0410-b5e6-96231b3b80d8
argetLowering.cpp
|
| e4c705667b9c5eae973e1bc0d7fd2ca995260701 |
11-Jun-2011 |
Chad Rosier <mcrosier@apple.com> |
Typo.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132871 91177308-0d34-0410-b5e6-96231b3b80d8
argetLowering.cpp
|
| b3e009a165a423536acfa5861c12ef631239d9e4 |
11-Jun-2011 |
Eric Christopher <echristo@apple.com> |
80-col cleanups.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132863 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeIntegerTypes.cpp
|
| 2a6d9eb10bc268df18ff57531c34b8928f858471 |
10-Jun-2011 |
Eli Friedman <eli.friedman@gmail.com> |
Change this DAGCombine to build AND of SHR instead of SHR of AND; this matches the ordering we prefer in instcombine. Part of rdar://9562809.
The potential DAGCombine which enforces this more generally messes up some other very fragile patterns, so I'm leaving that alone, at least for now.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132809 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 471e4224809f51652c71f319532697a879a75a0d |
09-Jun-2011 |
Eric Christopher <echristo@apple.com> |
Add a parameter to CCState so that it can access the MachineFunction.
No functional change.
Part of PR6965
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132763 91177308-0d34-0410-b5e6-96231b3b80d8
unctionLoweringInfo.cpp
electionDAGBuilder.cpp
|
| 8ae3edacfaebfeed3e65bbbcf18a6fb21b09feaf |
08-Jun-2011 |
Andrew Trick <atrick@apple.com> |
Remove a temporary test case probe in CheckForLiveRegDef.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132751 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGRRList.cpp
|
| 9d507aec07c7e22c6ba83dfd75e23c8630cd25cd |
07-Jun-2011 |
Andrew Trick <atrick@apple.com> |
Fix a merge bug in preRAsched for handling physreg aliases.
I've been sitting on this long enough trying to find a test case. I
think the fix should go in now, but I'll keep working on the test case.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132701 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGRRList.cpp
|
| fc3623bc50aa9e2a56736775edbd3ae919565351 |
06-Jun-2011 |
Nadav Rotem <nadav.rotem@intel.com> |
Add methods to support the integer-promotion of vector types. Methods to
legalize SDNodes such as BUILD_VECTOR, EXTRACT_VECTOR_ELT, etc.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132689 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeIntegerTypes.cpp
egalizeTypes.h
egalizeVectorTypes.cpp
|
| 57f1fde7fcda84a7e1d7490163fbad18c3755d40 |
06-Jun-2011 |
Stuart Hastings <stuart@apple.com> |
Avoid FGETSIGN of 80-bit types. Fixes PR10085.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132681 91177308-0d34-0410-b5e6-96231b3b80d8
argetLowering.cpp
|
| 0b4d96baecf3fe6af0fd45ba815bacf91a017f97 |
06-Jun-2011 |
Eli Friedman <eli.friedman@gmail.com> |
PR10077: fix fast-isel of extractvalue of aggregate constants.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132676 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
|
| 0b66636879bc478781ea6ed7541cdc1d13ee714d |
04-Jun-2011 |
Nadav Rotem <nadav.rotem@intel.com> |
TypeLegalizer: Add support for passing of vector-promoted types in registers (copyFromParts/copyToParts).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132649 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| f1c025d1d106905df3d38d2482fde68c8f81b107 |
04-Jun-2011 |
Nadav Rotem <nadav.rotem@intel.com> |
TypeLegalizer: Fix a bug in the promotion of elements of integer vectors.
(only happens when using the -promote-elements option).
The correct legalization order is to first try to promote element. Next, we try
to widen vectors.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132648 91177308-0d34-0410-b5e6-96231b3b80d8
argetLowering.cpp
|
| e0b42c02f0764ea9df9c17efffc7838203fb8f16 |
03-Jun-2011 |
Eric Christopher <echristo@apple.com> |
Add a TODO about memory operands.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132559 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| 100c83341676d8aae8fc34b5452563ed08b14f3e |
03-Jun-2011 |
Eric Christopher <echristo@apple.com> |
Have LowerOperandForConstraint handle multiple character constraints.
Part of rdar://9119939
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132510 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
argetLowering.cpp
|
| 251b4a04057a8397791ad3924377888fe4f8a2ad |
02-Jun-2011 |
Rafael Espindola <rafael.espindola@gmail.com> |
Revert 132424 to fix PR10068.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132479 91177308-0d34-0410-b5e6-96231b3b80d8
argetLowering.cpp
|
| fa226bccaa90c520cac154df74069bbabb976eab |
02-Jun-2011 |
Jakob Stoklund Olesen <stoklund@2pi.dk> |
Use TRI::has{Sub,Super}ClassEq() where possible.
No functional change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132455 91177308-0d34-0410-b5e6-96231b3b80d8
nstrEmitter.cpp
|
| ec880283b3682982c750c9b78f6a9b4777e21883 |
01-Jun-2011 |
Stuart Hastings <stuart@apple.com> |
Recommit 132404 with fixes. rdar://problem/5993888
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132424 91177308-0d34-0410-b5e6-96231b3b80d8
argetLowering.cpp
|
| 9aaa02a1d26a0969e95b285ea1190920a5bb37db |
01-Jun-2011 |
Eric Christopher <echristo@apple.com> |
Allow bitcasts between valid types of the same size and vector
types if the vector type is legal.
Fixes rdar://9306086
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132420 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| 96e0c5477c41b316263e894bbb5821c7cdeb25ef |
01-Jun-2011 |
Nadav Rotem <nadav.rotem@intel.com> |
Refactor LegalizeTypes: Erase LegalizeAction and make the type legalizer use
the TargetLowering enum.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132418 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeIntegerTypes.cpp
egalizeTypes.cpp
egalizeTypes.h
egalizeTypesGeneric.cpp
egalizeVectorTypes.cpp
|
| 090bf19de6e7c75fbf34e753f5e0ad58cc2ca15c |
01-Jun-2011 |
Stuart Hastings <stuart@apple.com> |
Fix double FGETSIGN to work on x86_32; followup to 132396.
rdar://problem/5660695
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132411 91177308-0d34-0410-b5e6-96231b3b80d8
argetLowering.cpp
|
| bdce3726e2131f053d05f07ff135684ad6f11d80 |
01-Jun-2011 |
Stuart Hastings <stuart@apple.com> |
Turn on FGETSIGN for x86. Followup to 132388. rdar://problem/5660695
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132396 91177308-0d34-0410-b5e6-96231b3b80d8
argetLowering.cpp
|
| b6fbec3a546fd04bb2e79040db2436b0bd629162 |
01-Jun-2011 |
Nadav Rotem <nadav.rotem@intel.com> |
This patch is another step in the direction of adding vector select. In this
patch we add a flag to enable a new type legalization decision - to promote
integer elements in vectors. Currently, the rest of the codegen does not support
this kind of legalization. This flag will be removed when the transition is
complete.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132394 91177308-0d34-0410-b5e6-96231b3b80d8
argetLowering.cpp
|
| b6aacae9413adde66d9686cd9e561eb836b3ee34 |
28-May-2011 |
Nadav Rotem <nadav.rotem@intel.com> |
Refactor the type legalizer. Switch TargetLowering to a new enum - LegalizeTypeAction.
This patch does not change the behavior of the type legalizer. The codegen
produces the same code.
This infrastructural change is needed in order to enable complex decisions
for vector types (needed by the vector-select patch).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132263 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeTypes.h
argetLowering.cpp
|
| 2d6dcb34b7f39682f3eed08180631189fb4b6636 |
27-May-2011 |
Nadav Rotem <nadav.rotem@intel.com> |
Refactor getActionType and getTypeToTransformTo ; place all of the 'decision'
code in one place. Re-apply 131534 and fix the multi-step promotion of integers.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132217 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
egalizeTypes.h
argetLowering.cpp
|
| 76927d7303046058c627691bd45d6bff608f49f4 |
26-May-2011 |
Eli Friedman <eli.friedman@gmail.com> |
Rewrite fast-isel integer cast handling to handle more cases, and to be simpler and more consistent.
The practical effects here are that x86-64 fast-isel can now handle trunc from i8 to i1, and ARM fast-isel can handle many more constructs involving integers narrower than 32 bits (including loads, stores, and many integer casts).
rdar://9437928 .
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132099 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
|
| 8a115d5bf42af0a3b4b87d2937502a66c63ff743 |
25-May-2011 |
Devang Patel <dpatel@apple.com> |
Remove unused statistical counter.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132087 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 8ec0c1c07b51d3332ac0d0fc4d643ba982803a18 |
24-May-2011 |
Devang Patel <dpatel@apple.com> |
Remove dead code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131974 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| b5a55d979c84e100f383ce11c5c5e3b616b9dcc4 |
24-May-2011 |
Evan Cheng <evan.cheng@apple.com> |
- Teach SelectionDAG::isKnownNeverZero to return true (op x, c) when c is
non-zero.
- Teach X86 cmov optimization to eliminate the cmov from ctlz, cttz extension
when the source of X86ISD::BSR / X86ISD::BSF is proven to be non-zero.
rdar://9490949
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131948 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 9728ea2447e689ae6e884cf044f226b99c4a47da |
24-May-2011 |
Devang Patel <dpatel@apple.com> |
Revert 121907 (it causes llc crash) and apply original patch from PR9817.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131926 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
electionDAG.cpp
|
| 233857537f61a8f4ab93624986676c25b2271bc7 |
23-May-2011 |
Devang Patel <dpatel@apple.com> |
Preserve debug info during iSel by keeping DanglingDebugInfoMap live until end of function.
Patch by Micah Villmow
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131908 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
electionDAGBuilder.h
electionDAGISel.cpp
|
| 35b6994608b2b7c86714cc464dfb2d086b0cafca |
23-May-2011 |
Devang Patel <dpatel@apple.com> |
While replacing all uses of a SDValue with another value, do not forget to transfer SDDbgValue.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131907 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 9db20f3bd89e51e0765ef21a9992f6dd5364a81e |
23-May-2011 |
Chris Lattner <sabre@nondot.org> |
Eliminate some temporary variables, and don't call getByValTypeAlignment
when we're just going to throw the result away. No functionality change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131880 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| f55d26e78851c2c09f8b09cfd7e7bbda7130d93b |
21-May-2011 |
Benjamin Kramer <benny.kra@googlemail.com> |
Implement mulo x, 2 -> addo x, x in DAGCombiner.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131800 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 5a4b3d8c8f52ee225ffc65c7d6cebc78b1ec7808 |
20-May-2011 |
Cameron Zwarich <zwarich@apple.com> |
Fix PR9955 by only attaching load memory operands to load instructions and
similarly for stores. Now "make check" passes with the MachineVerifier forced
on with the VerifyCoalescing option!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131705 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 3dfc4b12229acafee5c69c5ee1673b08027f0438 |
19-May-2011 |
Stuart Hastings <stuart@apple.com> |
Update some currently-disabled code, preparing for eventual use.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131663 91177308-0d34-0410-b5e6-96231b3b80d8
argetLowering.cpp
|
| d6dde76090dd673a673ce363c982c22ea924502a |
18-May-2011 |
Duncan Sands <baldrick@free.fr> |
Revert commit 131534 since it seems to have broken several buildbots.
Original log entry:
Refactor getActionType and getTypeToTransformTo ; place all of the 'decision'
code in one place.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131536 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
egalizeTypes.h
argetLowering.cpp
|
| fe3f5d7538954474731dbbed70430016600fa477 |
18-May-2011 |
Nadav Rotem <nadav.rotem@intel.com> |
Refactor getActionType and getTypeToTransformTo ; place all of the 'decision'
code in one place.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131534 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
egalizeTypes.h
argetLowering.cpp
|
| 9c4dae6b0bd1b4667b7a6ce5d804f60615bac639 |
18-May-2011 |
Eli Friedman <eli.friedman@gmail.com> |
Make fast-isel miss counting in -stats and -fast-isel-verbose take terminators into account; since there are many fewer isel misses with recent changes, misses caused by terminators are more significant.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131502 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 1b32896bd2a6e001c8513fcf182d5a92ab7d487a |
18-May-2011 |
Dan Gohman <gohman@apple.com> |
Misc. code cleanups.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131497 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 71dc7c9d895afc1e678b28d24a1ecc85ecd42178 |
18-May-2011 |
Dan Gohman <gohman@apple.com> |
Misc. code cleanups.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131495 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 975716af1b9a09274df6c2d92683449015bd8564 |
17-May-2011 |
Dan Gohman <gohman@apple.com> |
Delete unused variables.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131430 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
electionDAGISel.cpp
|
| b3dbd4a0b61d9c26df358384bdb66a41326f1a9d |
17-May-2011 |
Dan Gohman <gohman@apple.com> |
Trim #includes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131429 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| f316eb70743e88227b8919370fe38587ffe93512 |
17-May-2011 |
Dan Gohman <gohman@apple.com> |
Fix whitespace and 80-column violations.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131428 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 62427ae8d311d3dda8f5257ddf34d13c19c214bb |
16-May-2011 |
Jim Grosbach <grosbach@apple.com> |
Track how many insns fast-isel successfully selects as well as how many it
misses.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131426 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 227dfdb3c44c5cc5ec140b4be89f618bdc59a133 |
16-May-2011 |
Devang Patel <dpatel@apple.com> |
Preserve debug info for unused zero extended boolean argument.
Radar 9422775.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131422 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| 482feb33b2bba677d47bab859d9e1e95d67016bd |
16-May-2011 |
Eli Friedman <eli.friedman@gmail.com> |
Make fast-isel work correctly s/uadd.with.overflow intrinsics.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131420 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
|
| a4c920db7a3620f365144eac9aaad7ca23062caa |
16-May-2011 |
Eli Friedman <eli.friedman@gmail.com> |
Fix silly typo.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131419 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
|
| 2586b8f9366aed5a1efa44d3f18d095511601642 |
16-May-2011 |
Eli Friedman <eli.friedman@gmail.com> |
Basic fast-isel of extractvalue. Not too helpful on its own, given the IR clang generates for cases like this, but it should become more useful soon.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131417 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
|
| 0e00c6c561181be7e9cc75ad2fee9cd4cbbfca1e |
16-May-2011 |
Rafael Espindola <rafael.espindola@gmail.com> |
Don't do tail calls in a function that call setjmp. The stack might be
corrupted when setjmp returns again.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131399 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| d0118a2371f35faa6af97e67be69e1debc615c42 |
14-May-2011 |
Eli Friedman <eli.friedman@gmail.com> |
Fix a FIXME by moving the fast-isel implementation of the objectsize intrinsic from the x86 code to the generic code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131332 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
|
| 3fa82837441d716a225427f7a924f36d21db3a32 |
13-May-2011 |
Rafael Espindola <rafael.espindola@gmail.com> |
Make codegen able to handle values of empty types. This is one way
to fix PR9900. I will keep it open until sable is able to comment on it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131294 91177308-0d34-0410-b5e6-96231b3b80d8
unctionLoweringInfo.cpp
electionDAGBuilder.cpp
|
| 88882247d2e1bb70103062faf5bd15dd8a30b2d1 |
13-May-2011 |
Stuart Hastings <stuart@apple.com> |
Since I can't reproduce the failures from 131261, re-trying with a
simplified version. <rdar://problem/9298790>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131274 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 8ad145d7299dbeb8b816ce0549d9323630bbae1a |
13-May-2011 |
Stuart Hastings <stuart@apple.com> |
Revert 131266 and 131261 due to buildbot complaints.
rdar://problem/9298790
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131269 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 5adc64638084c1b8d33ac56e2498b83f1f4bd6e2 |
13-May-2011 |
Stuart Hastings <stuart@apple.com> |
Non-fast-isel followup to 129634; correctly handle branches controlled
by non-CMP expressions. The executable test case (129821) would test
this as well, if we had an "-O0 -disable-arm-fast-isel" LLVM-GCC
tester. Alas, the ARM assembly would be very difficult to check with
FileCheck.
The thumb2-cbnz.ll test is affected; it generates larger code (tst.w
vs. cmp #0), but I believe the new version is correct.
rdar://problem/9298790
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131261 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 42febc6e9963f82d5c56c3c7e6afe5e00769af41 |
11-May-2011 |
Nadav Rotem <nadav.rotem@intel.com> |
Fixes a bug in the DAGCombiner. LoadSDNodes have two values (data, chain).
If there is a store after the load node, then there is a chain, which means
that there is another user. Thus, asking hasOneUser would fail. Instead we
ask hasNUsesOfValue on the 'data' value.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131183 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 61512ba251097888963a8f07a35605564bcfc537 |
11-May-2011 |
Bill Wendling <isanbard@gmail.com> |
Give the 'eh.sjlj.dispatchsetup' intrinsic call the value coming from the setjmp
intrinsic call. This prevents it from being reordered so that it appears
*before* the setjmp intrinsic (thus making it completely useless).
<rdar://problem/9409683>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131174 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| 7f33d677a9d6ea575795ac5948d492bb0f4c8fed |
10-May-2011 |
Eli Friedman <eli.friedman@gmail.com> |
Disable my little CopyToReg argument hack with fast-isel. rdar://problem/9413587 .
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131156 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| d673057c968ee6da2fc9084a26cbd1a500002d2b |
10-May-2011 |
Stuart Hastings <stuart@apple.com> |
Correctly walk through nested and adjacent CALLSEQ_START nodes. No
test case; I've only seen this on a release branch, and I can't get it
to reproduce on trunk. rdar://problem/7662569
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131152 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| cef81b7e519764c6a008a689bc4c6dfc9119f8e9 |
09-May-2011 |
Eric Christopher <echristo@apple.com> |
Look through struct wrapped types for inline asm statments.
Patch by Evan Cheng.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131093 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
argetLowering.cpp
|
| c356f33aaf6de0e2fb6495113ea2c9059f64973d |
09-May-2011 |
Duncan Sands <baldrick@free.fr> |
Indent properly, no functionality change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131082 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| ce1cdac94207a3bdfeb6b3b1b666e588dfdc6c3d |
06-May-2011 |
Evan Cheng <evan.cheng@apple.com> |
80 col violations.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131015 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| fc5d305597ea6336d75bd7f3b741e8d57d6a5105 |
06-May-2011 |
Eli Friedman <eli.friedman@gmail.com> |
Make the logic for determining function alignment more explicit. No functionality change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131012 91177308-0d34-0410-b5e6-96231b3b80d8
argetLowering.cpp
|
| 8265e6ab4fb5ff178266d960c5d894f5828bb8ce |
06-May-2011 |
Eli Friedman <eli.friedman@gmail.com> |
Use array_lengthof. No functional change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131008 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| d71867a8f4b1ab6ab8cc8f5b1a732184ec5bad1b |
05-May-2011 |
Owen Anderson <resistor@mac.com> |
Allow FastISel of three-register-operand instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130934 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
|
| 23d3243e620064c69e4e6308156208f3205342c1 |
05-May-2011 |
Eli Friedman <eli.friedman@gmail.com> |
Avoid extra vreg copies for arguments passed in registers. Specifically, this can make MachineCSE more effective in some cases (especially in small functions). PR8361 / part of rdar://problem/8259436 .
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130928 91177308-0d34-0410-b5e6-96231b3b80d8
unctionLoweringInfo.cpp
electionDAGBuilder.cpp
|
| 6005b875b09ed1b3c5bc90a304db307b67886f75 |
05-May-2011 |
Eli Friedman <eli.friedman@gmail.com> |
Small syntax cleanup; we don't need to #define constants in C++. No functionality change intended.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130926 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| f7710af4ba78aa7a0cc9c226f334d8f2b6ab31bf |
03-May-2011 |
Owen Anderson <resistor@mac.com> |
Other parts of the SelectionDAG framework assume that targets use their pointer type for vector indices. Make the vector unrolling code respect that.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130733 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| b2b03fc2fa87cb5604dd8ec2e8476d051186cdb3 |
30-Apr-2011 |
Eli Friedman <eli.friedman@gmail.com> |
Make FastEmit_ri_ try a bit harder to succeed for supported operations; FastEmit_i can fail for non-Thumb2 ARM. Makes ARMSimplifyAddress work correctly, and reduces the number of fast-isel bailouts on non-Thumb ARM.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130560 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
|
| bd1253809bc1b2455793a64d2801db3d6317b08e |
28-Apr-2011 |
Eli Friedman <eli.friedman@gmail.com> |
Fix a silly mistake in r130338.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130360 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
|
| 2790ba8e5a7bb6e00fdac9997d840598fb60271c |
28-Apr-2011 |
Eli Friedman <eli.friedman@gmail.com> |
Make the fast-isel code for literal 0.0 a bit shorter/faster, since 0.0 is common. rdar://problem/9303592 .
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130338 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
|
| 161b887506fb79dc68fb507b72de03eaf48f467a |
28-Apr-2011 |
Eli Friedman <eli.friedman@gmail.com> |
Remove unused function.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130337 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
|
| 554daa67bd1c4f01fb7a00f2f4255a52b81e9fa3 |
26-Apr-2011 |
Evan Cheng <evan.cheng@apple.com> |
Be careful about scheduling nodes above previous calls. It increase usages of
more callee-saved registers and introduce copies. Only allows it if scheduling
a node above calls would end up lessen register pressure.
Call operands also has added ABI restrictions for register allocation, so be
extra careful with hoisting them above calls.
rdar://9329627
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130245 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGRRList.cpp
cheduleDAGSDNodes.cpp
|
| a61e73bda5125c28e48b52e573d115370838596b |
26-Apr-2011 |
Dan Gohman <gohman@apple.com> |
Fast-isel support for simple inline asms.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130205 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
|
| b16d06f88a81a5163e0caffad4bb268a8e1d0204 |
26-Apr-2011 |
Evan Cheng <evan.cheng@apple.com> |
Fix typo
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130190 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGRRList.cpp
|
| 06104e3743afc8988892bf66aab76e7fd5a885b3 |
25-Apr-2011 |
Devang Patel <dpatel@apple.com> |
A dbg.declare may not be in entry block, even if it is referring to an incoming argument. However, It is appropriate to emit DBG_VALUE referring to this incoming argument in entry block in MachineFunction.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130129 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| ddcdcc88631c6bd4ad43d9198b98bc9a829be036 |
23-Apr-2011 |
Jay Foad <jay.foad@gmail.com> |
Remove unused STL header includes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130068 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.h
|
| d74ea775af55782e3b0d5b10fa7602f8822a2f72 |
23-Apr-2011 |
Owen Anderson <resistor@mac.com> |
Teach FastISel to deal with instructions that have two immediate operands.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130033 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
|
| b686af053e6544191420978f6a3adc7e74ab0192 |
22-Apr-2011 |
Chris Lattner <sabre@nondot.org> |
Recommit the fix for rdar://9289512 with a couple tweaks to
fix bugs exposed by the gcc dejagnu testsuite:
1. The load may actually be used by a dead instruction, which
would cause an assert.
2. The load may not be used by the current chain of instructions,
and we could move it past a side-effecting instruction. Change
how we process uses to define the problem away.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130018 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| e7cf062537e898f830565db5dbf99ae9c928399e |
22-Apr-2011 |
Benjamin Kramer <benny.kra@googlemail.com> |
DAGCombine: fold "(zext x) == C" into "x == (trunc C)" if the trunc is lossless.
On x86 this allows to fold a load into the cmp, greatly reducing register pressure.
movzbl (%rdi), %eax
cmpl $47, %eax
->
cmpb $47, (%rdi)
This shaves 8k off gcc.o on i386. I'll leave applying the patch in README.txt to Chris :)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130005 91177308-0d34-0410-b5e6-96231b3b80d8
argetLowering.cpp
|
| 63c21deee15516723d3ebcf70ba34bb07116e974 |
21-Apr-2011 |
Daniel Dunbar <daniel@zuster.org> |
Revert r1296656, "Fix rdar://9289512 - not folding load into compare at -O0...",
which broke a couple GCC test suite tests at -O0.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129914 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| abbbfbd6726c7af8b27479b4311fe6bb6c40b52b |
20-Apr-2011 |
Eric Christopher <echristo@apple.com> |
Rewrite the expander for umulo/smulo to remember to sign extend the input
manually and pass all (now) 4 arguments to the mul libcall. Add a new
ExpandLibCall for just this (copied gratuitously from type legalization).
Fixes rdar://9292577
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129842 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 567cac0c511c2361ddb76eb4b8d49d306107a921 |
19-Apr-2011 |
Stuart Hastings <stuart@apple.com> |
Delete unnecessary variable. <rdar://problem/7662569>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129796 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 37d38bfbbf2b8db2c75b2edbd8cd30c51746fd5d |
19-Apr-2011 |
Eli Friedman <eli.friedman@gmail.com> |
SelectBasicBlock is rather slow even when it doesn't do anything; skip the
unnecessary work where possible.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129763 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| fc52163a45b9ea147db1c20a1db3edff0f0bf652 |
19-Apr-2011 |
Stuart Hastings <stuart@apple.com> |
Support nested CALLSEQ_BEGIN/END; necessary for ARM byval support. <rdar://problem/7662569>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129761 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 832e4943598d821687cec79f512803c1ca03cff7 |
19-Apr-2011 |
Chris Lattner <sabre@nondot.org> |
Implement support for x86 fastisel of small fixed-sized memcpys, which are generated
en-mass for C++ PODs. On my c++ test file, this cuts the fast isel rejects by 10x
and shrinks the generated .s file by 5%
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129755 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
|
| f051c1a29dd040b4b5ca0c5696d47a9058f87481 |
18-Apr-2011 |
Chris Lattner <sabre@nondot.org> |
while we're at it, handle 'sdiv exact' of a power of 2 also,
this fixes a few rejects on c++ iterator loops.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129694 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
|
| 090ca9108b35a60e8b97b67987d00cf47a383dba |
18-Apr-2011 |
Chris Lattner <sabre@nondot.org> |
fix rdar://9297011 - udiv by power of two causing fast-isel rejects
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129693 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
|
| 602fc0681726155942907debee1fe0b8b44ffc1b |
17-Apr-2011 |
Chris Lattner <sabre@nondot.org> |
1. merge fast-isel-shift-imm.ll into fast-isel-x86-64.ll
2. implement rdar://9289501 - fast isel should fold trivial multiplies to shifts
3. teach tblgen to handle shift immediates that are different sizes than the
shifted operands, eliminating some code from the X86 fast isel backend.
4. Have FastISel::SelectBinaryOp use (the poorly named) FastEmit_ri_ function
instead of FastEmit_ri to simplify code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129666 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
|
| 685090f5988a03da1a515493bad1e592d26b9956 |
17-Apr-2011 |
Chris Lattner <sabre@nondot.org> |
fix an oversight which caused us to compile the testcase (and other
less trivial things) into a dummy lea. Before we generated:
_test: ## @test
movq _G@GOTPCREL(%rip), %rax
leaq (%rax), %rax
ret
now we produce:
_test: ## @test
movq _G@GOTPCREL(%rip), %rax
ret
This is part of rdar://9289558
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129662 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| fd3f6351035f6bf1a6bfc851da00c0fb24d6db09 |
17-Apr-2011 |
Chris Lattner <sabre@nondot.org> |
Fix rdar://9289512 - not folding load into compare at -O0
The basic issue here is that bottom-up isel is matching the branch
and compare, and was failing to fold the load into the branch/compare
combo. Fixing this (by allowing folding into any instruction of a
sequence that is selected) allows us to produce things like:
cmpb $0, 52(%rax)
je LBB4_2
instead of:
movb 52(%rax), %cl
cmpb $0, %cl
je LBB4_2
This makes the generated -O0 code run a bit faster, but also speeds up
compile time by putting less pressure on the register allocator and
generating less code.
This was one of the biggest classes of missing load folding. Implementing
this shrinks 176.gcc's c-decl.s (as a random example) by about 4% in (verbose-asm)
line count.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129656 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 8bdc251dc5392fdf4854dcf588d73927d6ef64b3 |
17-Apr-2011 |
Chris Lattner <sabre@nondot.org> |
split a complex predicate out to a helper function. Simplify two for loops,
which don't need to check for falling off the end of a block *and* end of phi
nodes, since terminators are never phis.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129655 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| fff65b354f9895f5add84d99e0f62176f5d3f0f6 |
17-Apr-2011 |
Chris Lattner <sabre@nondot.org> |
fix rdar://9289583 - fast isel should handle non-canonical commutative binops
allowing us to fold the immediate into the 'and' in this case:
int test1(int i) {
return 8&i;
}
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129653 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
|
| e545d38a2871dd4fc93802d9405373325baf1e21 |
17-Apr-2011 |
Eli Friedman <eli.friedman@gmail.com> |
PR9055: extend the fix to PR4050 (r70179) to apply to zext and anyext.
Returning a new node makes the code try to replace the old node, which
in the included testcase is killed by CSE.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129650 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 65279cb9bd985721ac6ad090fed02298396ba06d |
16-Apr-2011 |
Evan Cheng <evan.cheng@apple.com> |
Fix divmod libcall lowering. Convert to {S|U}DIVREM first and then expand the node to a libcall. rdar://9280991
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129633 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 7a2bdde0a0eebcd2125055e0eacaca040f0b766c |
15-Apr-2011 |
Chris Lattner <sabre@nondot.org> |
Fix a ton of comment typos found by codespell. Patch by
Luis Felipe Strano Moraes!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129558 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
egalizeDAG.cpp
cheduleDAGSDNodes.cpp
electionDAGBuilder.cpp
argetLowering.cpp
|
| a34d93630ea5864fde8066d5c9638fdda86e1fc1 |
14-Apr-2011 |
Owen Anderson <resistor@mac.com> |
Fix another instance of the DAG combiner not using the correct type for the RHS of a shift.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129522 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 12f0dc6bb556976f22d89ebcf42bce273c9e7d38 |
14-Apr-2011 |
Andrew Trick <atrick@apple.com> |
In the pre-RA scheduler, maintain cmp+br proximity.
This is done by pushing physical register definitions close to their
use, which happens to handle flag definitions if they're not glued to
the branch. This seems to be generally a good thing though, so I
didn't need to add a target hook yet.
The primary motivation is to generate code closer to what people
expect and rule out missed opportunity from enabling macro-op
fusion. As a side benefit, we get several 2-5% gains on x86
benchmarks. There is one regression:
SingleSource/Benchmarks/Shootout/lists slows down be -10%. But this is
an independent scheduler bug that will be tracked separately.
See rdar://problem/9283108.
Incidentally, pre-RA scheduling is only half the solution. Fixing the
later passes is tracked by:
<rdar://problem/8932804> [pre-RA-sched] on x86, attempt to schedule CMP/TEST adjacent with condition jump
Fixes:
<rdar://problem/9262453> Scheduler unnecessary break of cmp/jump fusion
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129508 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGRRList.cpp
cheduleDAGSDNodes.cpp
|
| c0c7fca2fedd2259569b7b84338259c62d38802d |
14-Apr-2011 |
Chris Lattner <sabre@nondot.org> |
sink a call into its only use.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129503 91177308-0d34-0410-b5e6-96231b3b80d8
argetLowering.cpp
|
| 7adf862eb24f7c6cbf12fbc9e3e8229f6f863b8a |
14-Apr-2011 |
Owen Anderson <resistor@mac.com> |
During post-legalization DAG combining, be careful to only create shifts where the RHS is of the legal type for the new operation.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129484 91177308-0d34-0410-b5e6-96231b3b80d8
argetLowering.cpp
|
| 87896d9368e08d93493427ce7bf8272d1e5cca35 |
13-Apr-2011 |
Andrew Trick <atrick@apple.com> |
Recommit r129383. PreRA scheduler heuristic fixes: VRegCycle, TokenFactor latency.
Additional fixes:
Do something reasonable for subtargets with generic
itineraries by handle node latency the same as for an empty
itinerary. Now nodes default to unit latency unless an itinerary
explicitly specifies a zero cycle stage or it is a TokenFactor chain.
Original fixes:
UnitsSharePred was a source of randomness in the scheduler: node
priority depended on the queue data structure. I rewrote the recent
VRegCycle heuristics to completely replace the old heuristic without
any randomness. To make the ndoe latency adjustments work, I also
needed to do something a little more reasonable with TokenFactor. I
gave it zero latency to its consumers and always schedule it as low as
possible.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129421 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGRRList.cpp
cheduleDAGSDNodes.cpp
|
| c558bf397257f5ef902bdb45a28e622ee2b5b4f2 |
12-Apr-2011 |
Andrew Trick <atrick@apple.com> |
Revert 129383. It causes some targets to hit a scheduler assert.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129385 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGRRList.cpp
cheduleDAGSDNodes.cpp
|
| 3eb4319313b3fb9189cd4be5b3e5375be9bdc2f9 |
12-Apr-2011 |
Andrew Trick <atrick@apple.com> |
PreRA scheduler heuristic fixes: VRegCycle, TokenFactor latency.
UnitsSharePred was a source of randomness in the scheduler: node
priority depended on the queue data structure. I rewrote the recent
VRegCycle heuristics to completely replace the old heuristic without
any randomness. To make these heuristic adjustments to node latency work,
I also needed to do something a little more reasonable with TokenFactor. I
gave it zero latency to its consumers and always schedule it as low as
possible.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129383 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGRRList.cpp
cheduleDAGSDNodes.cpp
|
| 562b84b3aea359d1f918184e355da82bf05eb290 |
11-Apr-2011 |
Jay Foad <jay.foad@gmail.com> |
Don't include Operator.h from InstrTypes.h.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129271 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
|
| c3e4e59d1017178fdff33d6e34635f498c98592f |
09-Apr-2011 |
Chris Lattner <sabre@nondot.org> |
Avoid excess precision issues that lead to generating host-compiler-specific code.
Switch lowering probably shouldn't be using FP for this. This resolves PR9581.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129199 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| 8feda7ee332f1f91e4d3a42d9f7ad729012ed174 |
09-Apr-2011 |
Jush Lu <jush.msn@gmail.com> |
Merge upstream r129128
|
| b3452ea35c3e78d1a8c7d92f9448b0054d36e740 |
09-Apr-2011 |
Chris Lattner <sabre@nondot.org> |
have dag combine zap "store undef", which can be formed during call lowering
with undef arguments.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129185 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 4da0c7c0c9081107bea5f6bac440f0f1eb47748f |
08-Apr-2011 |
Evan Cheng <evan.cheng@apple.com> |
Change -arm-trap-func= into a non-arm specific option. Now Intrinsic::trap is lowered into a call to the specified trap function at sdisel time.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129152 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| 54699765064842fd08d1466adc93453660bc2a85 |
07-Apr-2011 |
Andrew Trick <atrick@apple.com> |
Added a check in the preRA scheduler for potential interference on a
induction variable. The preRA scheduler is unaware of induction vars,
so we look for potential "virtual register cycles" instead.
Fixes <rdar://problem/8946719> Bad scheduling prevents coalescing
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129100 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGRRList.cpp
cheduleDAGSDNodes.cpp
cheduleDAGSDNodes.h
|
| f05b1dcf870346094f8aaee8e387c92d3e47e98d |
05-Apr-2011 |
Bill Wendling <isanbard@gmail.com> |
Revamp the SjLj "dispatch setup" intrinsic.
It needed to be moved closer to the setjmp statement, because the code directly
after the setjmp needs to know about values that are on the stack. Also, the
'bitcast' of the function context was causing a dead load. This wouldn't be too
horrible, except that at -O0 it wasn't optimized out, and because it wasn't
using the correct base pointer (if there is a VLA), it would try to access a
value from a garbage address.
<rdar://problem/9130540>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128873 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| 1809d5fa216bbdc505502468b7bd85629e1e44bc |
05-Apr-2011 |
Stuart Hastings <stuart@apple.com> |
Revert 123704; it broke threaded LLVM.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128868 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| ed3caf90866e183380a06c0ae49101204a9f3c28 |
02-Apr-2011 |
Cameron Zwarich <zwarich@apple.com> |
Add a RemoveFromWorklist method to DCI. This is needed to do some complicated
transformations in target-specific DAG combines without causing DAGCombiner to
delete the same node twice. If you know of a better way to avoid this (see my
next patch for an example), please let me know.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128758 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| c249e4855883d7b799db61edc839cbfaff50ae81 |
01-Apr-2011 |
Evan Cheng <evan.cheng@apple.com> |
Add comments.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128730 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| 8380c034b68d9d3768ee09b6fdc937696c93ee3d |
01-Apr-2011 |
Evan Cheng <evan.cheng@apple.com> |
Assign node order numbers to results of call instruction lowering. This should improve src line debug info when sdisel is used. rdar://9199118
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128728 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| 8e23e815ad1136721acdfcce76975a37c8a2c036 |
01-Apr-2011 |
Evan Cheng <evan.cheng@apple.com> |
Issue libcalls __udivmod*i4 / __divmod*i4 for div / rem pairs.
rdar://8911343
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128696 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
argetLowering.cpp
|
| 7d706ede7d7e5262bb22f75f1972f0eacbf7eab5 |
26-Mar-2011 |
Benjamin Kramer <benny.kra@googlemail.com> |
Turn SelectionDAGBuilder::GetRegistersForValue into a local function.
It couldn't be used outside of the file because SDISelAsmOperandInfo
is local to SelectionDAGBuilder.cpp. Making it a static function avoids
a weird linkage dance.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128342 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
electionDAGBuilder.h
|
| 336298cf2cc68d9af163992b9f9cafddd4bb3c8a |
25-Mar-2011 |
Andrew Trick <atrick@apple.com> |
Fix for -pre-RA-sched=source.
Yet another case of unchecked NULL node (for physreg copy).
May fix PR9509.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128266 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGRRList.cpp
|
| b141099c14bfa86167b2137e8a9544c6ee805955 |
23-Mar-2011 |
Eli Friedman <eli.friedman@gmail.com> |
PR9535: add support for splitting and scalarizing vector ISD::FP_ROUND.
Also cleaning up some duplicated code while I'm here.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128176 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeTypes.h
egalizeVectorTypes.cpp
|
| bd47a4a307a54dab25956430442cf4ac103e4158 |
23-Mar-2011 |
Andrew Trick <atrick@apple.com> |
Ensure that def-side physreg copies are scheduled above any other uses
so the scheduler can't create new interferences on the copies
themselves. Prior to this fix the scheduler could get stuck in a loop
creating copies.
Fixes PR9509.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128164 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGRRList.cpp
|
| 0d93a110e31b384f59d91d6be27388d8ded5f03c |
23-Mar-2011 |
Andrew Trick <atrick@apple.com> |
whitespace
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128163 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGRRList.cpp
|
| a2f45291e1a50a571a15bbf4da38a5f42a2424ef |
23-Mar-2011 |
Andrew Trick <atrick@apple.com> |
Added block number and name to isel debug output.
I'm tired of doing this manually for each checkout.
If anyone knows a better way debug isel for non-trivial tests feel
free to revert and let me know how to do it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128132 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 28ed90b95db5f14b60b2cb532a62d407d4faf5e5 |
21-Mar-2011 |
Eric Christopher <echristo@apple.com> |
Grammar-o.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128004 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGRRList.cpp
|
| 06cc324b9da1dc8fb7360a560343c28f5e7a940a |
19-Mar-2011 |
Nadav Rotem <nadav.rotem@intel.com> |
Add support for legalizing UINT_TO_FP of vectors on platforms which do
not have native support for this operation (such as X86).
The legalized code uses two vector INT_TO_FP operations and is faster
than scalarizing.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127951 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeVectorOps.cpp
|
| 1c10b8de46ce8e39178eeded4786b1e53722f099 |
17-Mar-2011 |
Benjamin Kramer <benny.kra@googlemail.com> |
BuildUDIV: If the divisor is even we can simplify the fixup of the multiplied value by introducing an early shift.
This allows us to compile "unsigned foo(unsigned x) { return x/28; }" into
shrl $2, %edi
imulq $613566757, %rdi, %rax
shrq $32, %rax
ret
instead of
movl %edi, %eax
imulq $613566757, %rax, %rcx
shrq $32, %rcx
subl %ecx, %eax
shrl %eax
addl %ecx, %eax
shrl $4, %eax
on x86_64
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127829 91177308-0d34-0410-b5e6-96231b3b80d8
argetLowering.cpp
|
| 7bbf0ee97c77f7712154648a44ac6eeb57886462 |
17-Mar-2011 |
Cameron Zwarich <zwarich@apple.com> |
Move more logic into getTypeForExtArgOrReturn.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127809 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| 44579680111b807613703ab401db3b8c0148e36c |
17-Mar-2011 |
Cameron Zwarich <zwarich@apple.com> |
Rename getTypeForExtendedInteger() to getTypeForExtArgOrReturn().
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127807 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| ebe8173941238cfbabadb1c63bca7fb7dcf2adbe |
16-Mar-2011 |
Cameron Zwarich <zwarich@apple.com> |
The x86-64 ABI says that a bool is only guaranteed to be sign-extended to a byte
rather than an int. Thankfully, this only causes LLVM to miss optimizations, not
generate incorrect code.
This just fixes the zext at the return. We still insert an i32 ZextAssert when
reading a function's arguments, but it is followed by a truncate and another i8
ZextAssert so it is not optimized.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127766 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| 8df6bf5f5c8a55b089ef8b706bc0cc77ff16906c |
16-Mar-2011 |
Cameron Zwarich <zwarich@apple.com> |
Don't recompute something that we already have in a local variable.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127764 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| bf34a5ec22389a852f25337eb767e5ad742e6142 |
15-Mar-2011 |
Evan Cheng <evan.cheng@apple.com> |
sext(undef) = 0, because the top bits will all be the same.
zext(undef) = 0, because the top bits will be zero.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127649 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 34661e72fc0ae1a993db4cec953e999c61a7569c |
14-Mar-2011 |
Evan Cheng <evan.cheng@apple.com> |
BIT_CONVERT has been renamed to BITCAST.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127600 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 5ae1da96f2ac4a68543295f227398f8e93018eb0 |
14-Mar-2011 |
Evan Cheng <evan.cheng@apple.com> |
Minor optimization. sign-ext/anyext of undef is still undef.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127598 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 2ce5bf188dfa4329eb246df6011dd1edde5a5979 |
11-Mar-2011 |
Owen Anderson <resistor@mac.com> |
Teach FastISel to support register-immediate-immediate instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127496 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
|
| 778583ad2864949388a1cc645704f9ee76c9c0b9 |
11-Mar-2011 |
Andrew Trick <atrick@apple.com> |
Replace -dag-chain-limit flag with constant. It has survived a release cycle without being touched, so no longer needs to pollute the hidden-help text.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127468 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| 9ef82ce4fe8e6f9f49c31abeebcc9672985afad4 |
11-Mar-2011 |
Evan Cheng <evan.cheng@apple.com> |
Avoid replacing the value of a directly stored load with the stored value if the load is indexed. rdar://9117613.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127440 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| b0519e15f70cef7ba16b712f258d4782ade17e13 |
10-Mar-2011 |
Evan Cheng <evan.cheng@apple.com> |
Re-commit 127368 and 127371. They are exonerated.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127380 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGFast.cpp
cheduleDAGRRList.cpp
|
| 02d7c9298298f7f8fba1427f249deb2106126e9c |
10-Mar-2011 |
Evan Cheng <evan.cheng@apple.com> |
Revert 127368 and 127371 for now.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127376 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGFast.cpp
cheduleDAGRRList.cpp
|
| 17adafc6c179f3bad757f932a13522851ee5171f |
09-Mar-2011 |
Evan Cheng <evan.cheng@apple.com> |
Change the definition of TargetRegisterInfo::getCrossCopyRegClass to be more
flexible.
If it returns a register class that's different from the input, then that's the
register class used for cross-register class copies.
If it returns a register class that's the same as the input, then no cross-
register class copies are needed (normal copies would do).
If it returns null, then it's not at all possible to copy registers of the
specified register class.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127368 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGFast.cpp
cheduleDAGRRList.cpp
|
| 4bbf4678e341e9bf899c0faa3e3bcfe134db81eb |
09-Mar-2011 |
Andrew Trick <atrick@apple.com> |
Improve pre-RA-sched register pressure tracking for duplicate operands.
This helps cases like 2008-07-19-movups-spills.ll, but doesn't have an obvious impact on benchmarks
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127347 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGSDNodes.cpp
|
| d7cdc3e1f9df50be73e239c130dc92239c0e5d32 |
09-Mar-2011 |
Benjamin Kramer <benny.kra@googlemail.com> |
Fix typo, make helper static.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127335 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGRRList.cpp
|
| b5530586d68bd25831a6796b5d3199cb0769a35c |
09-Mar-2011 |
Jush Lu <jush.msn@gmail.com> |
Merge upstream r127116
|
| 29449448b0f0420dfcf52e278fc01adbf1690d70 |
08-Mar-2011 |
Eric Christopher <echristo@apple.com> |
Fix some latent bugs if the nodes are unschedulable. We'd gotten away
with this before since none of the register tracking or nightly tests
had unschedulable nodes.
This should probably be refixed with a special default Node that just
returns some "don't touch me" values.
Fixes PR9427
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127263 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGRRList.cpp
cheduleDAGSDNodes.cpp
|
| 0bf56c821c454a960afc34cb5746006bc1f9e1a1 |
08-Mar-2011 |
Andrew Trick <atrick@apple.com> |
Further improvements to pre-RA-sched=list-ilp.
This change uses the MaxReorderWindow for both height and depth, which
tends to limit the negative effects of high register pressure.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127203 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGRRList.cpp
|
| be2119e8e2bc7006cfd638a24367acbfda625d16 |
07-Mar-2011 |
Cameron Zwarich <zwarich@apple.com> |
Move getRegPressureLimit() from TargetLoweringInfo to TargetRegisterInfo.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127175 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGRRList.cpp
|
| 6154f6c9292179fab6346ae8336f2ad790b52028 |
07-Mar-2011 |
Owen Anderson <resistor@mac.com> |
Use the correct LHS type when determining the legalization of a shift's RHS type.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127163 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
electionDAG.cpp
|
| b43034d700004e1fec3ddf177e21ac89478bcc6c |
06-Mar-2011 |
Eric Christopher <echristo@apple.com> |
Typo.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127131 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGRRList.cpp
|
| 3c6e49504e9a57a4818750fd2520967f84634eac |
06-Mar-2011 |
Andrew Trick <atrick@apple.com> |
Disable a couple of experimental heuristics to get the best results from the current implementation of -pre-RA-sched=list-ilp.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127113 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGRRList.cpp
|
| afc7d235e91a769f74d87bbe745558ed1b692ff7 |
05-Mar-2011 |
Andrew Trick <atrick@apple.com> |
Be explicit with abs(). Visual Studio workaround.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127075 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGRRList.cpp
|
| 5e84e3ccaa555bd48ecca384e93e55abd76fb40a |
05-Mar-2011 |
Andrew Trick <atrick@apple.com> |
Fix for -sched-high-latency-cycles in sched=list-ilp mode.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127071 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGSDNodes.cpp
|
| ab2e3e2d7074207e2a4bb15e2913fa83795bb1ca |
05-Mar-2011 |
Andrew Trick <atrick@apple.com> |
Missing comment.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127068 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGRRList.cpp
|
| e0ef509aeb47b396cf1bdc170ca4f468f799719f |
05-Mar-2011 |
Andrew Trick <atrick@apple.com> |
Increased the register pressure limit on x86_64 from 8 to 12
regs. This is the only change in this checkin that may affects the
default scheduler. With better register tracking and heuristics, it
doesn't make sense to artificially lower the register limit so much.
Added -sched-high-latency-cycles and X86InstrInfo::isHighLatencyDef to
give the scheduler a way to account for div and sqrt on targets that
don't have an itinerary. It is currently defaults to 10 (the actual
number doesn't matter much), but only takes effect on non-default
schedulers: list-hybrid and list-ilp.
Added several heuristics that can be individually disabled for the
non-default sched=list-ilp mode. This helps us determine how much
better we can do on a given benchmark than the default
scheduler. Certain compute intensive loops run much faster in this
mode with the right set of heuristics, and it doesn't seem to have
much negative impact elsewhere. Not all of the heuristics are needed,
but we still need to experiment to decide which should be disabled by
default for sched=list-ilp.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127067 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGRRList.cpp
cheduleDAGSDNodes.cpp
|
| 53dfa78e4133f6cdb5d860279adc337ea099ac15 |
04-Mar-2011 |
Duncan Sands <baldrick@free.fr> |
Revert commit 126684 "Use the correct shift amount type". It is only the correct
type after type legalization has completed. Before then it may simply not be big
enough to hold the shift amount, particularly on x86 which uses a very small type
for shifts (this issue broke stuff in the past which is why LegalizeTypes carefully
uses a large type for shift amounts).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127000 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeIntegerTypes.cpp
|
| a0807f57caed954545661c23607c507f8d5c3d64 |
04-Mar-2011 |
Andrew Trick <atrick@apple.com> |
Minor pre-RA-sched fixes and cleanup.
Fix the PendingQueue, then disable it because it's not required for
the current schedulers' heuristics.
Fix the logic for the unused list-ilp scheduler.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@126981 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGRRList.cpp
|
| e7147dba733c95aec215f5576539b07f11636ff3 |
04-Mar-2011 |
Bill Wendling <isanbard@gmail.com> |
There are times when the landing pad won't have a call to 'eh.selector' in
it. It's been assumed up til now that it would be in its immediate
successor. However, this isn't necessarily the case. It could be in one of its
successor's successors.
Modify the code to more thoroughly check for an 'eh.selector' call in
successors. It only looks at a successor if we get there as a result of an
unconditional branch.
Testcase ObjC/exceptions-4.m in r126968.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@126969 91177308-0d34-0410-b5e6-96231b3b80d8
unctionLoweringInfo.cpp
|
| 81c5ef8649e12ac6083307bb149fd7006d9e0501 |
03-Mar-2011 |
Eli Friedman <eli.friedman@gmail.com> |
Revert r123908; the code in question is completely untested and wrong.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@126964 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeIntegerTypes.cpp
egalizeTypes.h
|
| 254c63e33678a64eaadfd658b79ed362c8572147 |
03-Mar-2011 |
Bob Wilson <bob.wilson@apple.com> |
Avoid exponential blow-up when printing DAGs.
David Greene changed CannotYetSelect() to print the full DAG including multiple
copies of operands reached through different paths in the DAG. Unfortunately
this blows up exponentially in some cases. The depth limit of 100 is way too
high to prevent this -- I'm seeing a message string of 150MB with a depth of
only 40 in one particularly bad case, even though the DAG has less than 200
nodes. Part of the problem is that the printing code is following chain
operands, so if you fail to select an operation with a chain, the printer will
follow all the chained operations back to the entry node.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@126899 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 7e33418671728359325f51faf69a14f630ba7f91 |
02-Mar-2011 |
Stuart Hastings <stuart@apple.com> |
Can't introduce floating-point immediate constants after legalization.
Radar 9056407.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@126864 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| e80338af3f74089ab9fccd9bfb9fd12b8d555a55 |
01-Mar-2011 |
Duncan Sands <baldrick@free.fr> |
Add a few missed unary cases when legalizing vector results. Put some cases
in alphabetical order.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@126745 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeVectorTypes.cpp
|
| 9d40193d79052fb4ddd0f667f0fe47f07922c72a |
01-Mar-2011 |
Jim Grosbach <grosbach@apple.com> |
trailing whitespace.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@126733 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 2d76c84514216f51526f2be123315f585995d860 |
01-Mar-2011 |
Jim Grosbach <grosbach@apple.com> |
Generalize the register matching code in DAGISel a bit.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@126731 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 69732892087e70182d863cc72453be30f31b7793 |
28-Feb-2011 |
Owen Anderson <resistor@mac.com> |
Use the correct shift amount type.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@126684 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeIntegerTypes.cpp
|
| c6d160bfa22fcb06c80c4c6cfc10ddbe7d8d28e4 |
28-Feb-2011 |
Owen Anderson <resistor@mac.com> |
Clean whitespace.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@126683 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeIntegerTypes.cpp
|
| 4d03e416be8cf1f0f502118826b7cbaeec0b79b2 |
28-Feb-2011 |
jush <jush.msn@gmail.com> |
Merge LLVM upstream r119309 into honey
|
| 9c45251e1165a9ed8c351468ebb01b3859ea1df3 |
27-Feb-2011 |
Duncan Sands <baldrick@free.fr> |
Legalize support for fpextend of vector. PR9309.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@126574 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeVectorTypes.cpp
|
| fcd96199f5999988226ee710e842df869720be21 |
27-Feb-2011 |
Nadav Rotem <nadav.rotem@intel.com> |
Fix typos in the comments.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@126565 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| a91f86c49a63f7a37c662c3a9553055bff33a84b |
27-Feb-2011 |
Tobias Grosser <grosser@fim.uni-passau.de> |
Pass the graph to the DOTGraphTraits.getEdgeAttributes().
This follows the interface of getNodeAttributes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@126562 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGPrinter.cpp
|
| 7466678003f38f985d5b2dffd0917643137b11cf |
26-Feb-2011 |
Benjamin Kramer <benny.kra@googlemail.com> |
Add some DAGCombines for (adde 0, 0, glue), which are useful to optimize legalized code for large integer arithmetic.
1. Inform users of ADDEs with two 0 operands that it never sets carry
2. Fold other ADDs or ADDCs into the ADDE if possible
It would be neat if we could do the same thing for SETCC+ADD eventually, but we can't do that in target independent code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@126557 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 95771afbfd604ad003fa3723cac66c9370fed55d |
25-Feb-2011 |
Owen Anderson <resistor@mac.com> |
Allow targets to specify a the type of the RHS of a shift parameterized on the type of the LHS.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@126518 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
egalizeDAG.cpp
egalizeFloatTypes.cpp
electionDAG.cpp
electionDAGBuilder.cpp
argetLowering.cpp
|
| 3fc831779843bb4091f931b10ad0db1d97f82bd2 |
25-Feb-2011 |
Jim Grosbach <grosbach@apple.com> |
Fix formatting of debug helper string.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@126471 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| 8fbbdca45c0eb2ef4a434cdef883f5c36516376c |
25-Feb-2011 |
Cameron Zwarich <zwarich@apple.com> |
Set NumSignBits to 1 if KnownZero/KnownOne are being zero extended. In theory it
is possible to do better if the high bit is set in either KnownZero/KnownOne, but
in practice NumSignBits is always 1 when we are zero extending because nothing
is known about that register.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@126465 91177308-0d34-0410-b5e6-96231b3b80d8
unctionLoweringInfo.cpp
|
| 33b554795def5cd50f961721acbb33246226824b |
25-Feb-2011 |
Cameron Zwarich <zwarich@apple.com> |
We only want to zero extend the existing information if the bit width is
actually larger.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@126464 91177308-0d34-0410-b5e6-96231b3b80d8
unctionLoweringInfo.cpp
|
| 8c20ec54d98176d31f310e4684d1d7f2ea0639bc |
24-Feb-2011 |
Nadav Rotem <nadav.rotem@intel.com> |
Enable support for vector sext and trunc:
Limit the folding of any_ext and sext into the load operation to scalars.
Limit the active-bits trunc optimization to scalars.
Document vector trunc and vector sext in LangRef.
Similar to commit 126080 (for enabling zext).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@126424 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 8ca814c4e0a39e1fcac023f0fb014917da07a796 |
24-Feb-2011 |
Cameron Zwarich <zwarich@apple.com> |
Merge information about the number of zero, one, and sign bits of live-out
registers at phis. This enables us to eliminate a lot of pointless zexts during
the DAGCombine phase. This fixes <rdar://problem/8760114>.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@126380 91177308-0d34-0410-b5e6-96231b3b80d8
unctionLoweringInfo.cpp
electionDAGISel.cpp
|
| 9b6af8de58140566a0e6567508bf906027422e7c |
24-Feb-2011 |
Cameron Zwarich <zwarich@apple.com> |
Add a getNumSignBits() method to APInt.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@126379 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 324a24f6aa5d6752c57c39e1e19f00b8c8a4ceec |
24-Feb-2011 |
Cameron Zwarich <zwarich@apple.com> |
Add a mechanism for invalidating the LiveOutInfo of a PHI, and use it whenever
a block is visited before all of its predecessors.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@126378 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| a46cd97818ac6fa336b093adecf2006fb041ca1c |
24-Feb-2011 |
Cameron Zwarich <zwarich@apple.com> |
Track blocks visited in reverse postorder.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@126377 91177308-0d34-0410-b5e6-96231b3b80d8
unctionLoweringInfo.cpp
electionDAGISel.cpp
|
| e1497b979166765d97c91813a8e830a1ab8fbe12 |
24-Feb-2011 |
Cameron Zwarich <zwarich@apple.com> |
Refactor the LiveOutInfo interface into a few methods on FunctionLoweringInfo
and make the actual map private.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@126376 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
electionDAGISel.cpp
|
| 2dbe2850d019d3d25ec760f34de70ef6c9ac5747 |
24-Feb-2011 |
Cameron Zwarich <zwarich@apple.com> |
Have isel visit blocks in reverse postorder rather than an undefined order. This
allows for the information propagated across basic blocks to be merged at phis.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@126375 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 4ecc82e592745d6995db83ea158b3c15011a84f8 |
22-Feb-2011 |
Cameron Zwarich <zwarich@apple.com> |
Roll out r126169 and r126170 in an attempt to fix the selfhost bot.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@126185 91177308-0d34-0410-b5e6-96231b3b80d8
unctionLoweringInfo.cpp
electionDAGBuilder.cpp
electionDAGISel.cpp
|
| 92efda7e9183ae16bde7a3ad96b682e779d89cf3 |
22-Feb-2011 |
Cameron Zwarich <zwarich@apple.com> |
Merge information about the number of zero, one, and sign bits of live-out registers
at phis. This enables us to eliminate a lot of pointless zexts during the DAGCombine
phase. This fixes <rdar://problem/8760114>.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@126170 91177308-0d34-0410-b5e6-96231b3b80d8
unctionLoweringInfo.cpp
electionDAGBuilder.cpp
electionDAGISel.cpp
|
| 63a8dae64dea89ae4a6f93ee17cf3fbbc2815084 |
22-Feb-2011 |
Cameron Zwarich <zwarich@apple.com> |
Have isel visit blocks in reverse postorder rather than an undefined order. This
allows for the information propagated across basic blocks to be merged at phis.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@126169 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 68e6beeccc0b9ac2e8d3687a8a5b7d4b172edca1 |
22-Feb-2011 |
Devang Patel <dpatel@apple.com> |
Revert r124611 - "Keep track of incoming argument's location while emitting LiveIns."
In other words, do not keep track of argument's location. The debugger (gdb) is not prepared to see line table entries for arguments. For the debugger, "second" line table entry marks beginning of function body.
This requires some coordination with debugger to get this working.
- The debugger needs to be aware of prolog_end attribute attached with line table entries.
- The compiler needs to accurately mark prolog_end in line table entries (at -O0 and at -O1+)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@126155 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.h
electionDAGISel.cpp
|
| ed9b934f65d82324506f03e2db2834682c7a8914 |
20-Feb-2011 |
Nadav Rotem <nadav.rotem@intel.com> |
Fix 9267; Add vector zext support.
The DAGCombiner folds the zext into complex load instructions. This patch
prevents this optimization on vectors since none of the supported targets
knows how to perform load+vector_zext in one instruction.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@126080 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| a778f5c798fc78ca15f813c362cdcdcc1eb86266 |
18-Feb-2011 |
Devang Patel <dpatel@apple.com> |
Do not lose debug info of an inlined function argument even if the argument is only used through GEPs.
This time with a fix that avoids using invalidated DenseMap iterator.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@125984 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
DNodeDbgValue.h
electionDAG.cpp
electionDAGBuilder.cpp
|
| 1646953538d5faf7baf49e16bd0590f822c231de |
18-Feb-2011 |
Cameron Zwarich <zwarich@apple.com> |
Roll out r125794 to help diagnose the llvm-gcc-i386-linux-selfhost failure.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@125830 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
DNodeDbgValue.h
electionDAG.cpp
electionDAGBuilder.cpp
|
| a4defc00ebf30f136ea96084b6a10c57441de6e7 |
18-Feb-2011 |
Devang Patel <dpatel@apple.com> |
Do not lose debug info of an inlined function argument even if the argument is only used through GEPs.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@125794 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
DNodeDbgValue.h
electionDAG.cpp
electionDAGBuilder.cpp
|
| fbd53f79f5d475d103fba9303a4aa7e88567dd1a |
17-Feb-2011 |
Duncan Sands <baldrick@free.fr> |
Fix wrong logic in promotion of signed mul-with-overflow (I pointed this out at
the time but presumably my email got lost). Examples where the previous logic
got it wrong: (1) a signed i8 multiply of 64 by 2 overflows, but the high part is
zero; (2) a signed i8 multiple of -128 by 2 overflows, but the high part is all
ones.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@125748 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeIntegerTypes.cpp
|
| a901129169194881a78b7fd8953e09f55b846d10 |
16-Feb-2011 |
Stuart Hastings <stuart@apple.com> |
Swap VT and DebugLoc operands of getExtLoad() for consistency with
other getNode() methods. Radar 9002173.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@125665 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
egalizeDAG.cpp
egalizeFloatTypes.cpp
egalizeIntegerTypes.cpp
egalizeVectorTypes.cpp
electionDAG.cpp
|
| 7bccf6abdc5de989cdb3872369480825ebc9c3a9 |
16-Feb-2011 |
Eric Christopher <echristo@apple.com> |
Refactor zero folding slightly. Clean up todo.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@125651 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 169e1552e748348b033fb6817df4bffc345e5583 |
16-Feb-2011 |
Eric Christopher <echristo@apple.com> |
The change for PR9190 wasn't quite right. We need to avoid making the
transformation if we can't legally create a build vector of the correct
type. Check that we can make the transformation first, and add a TODO to
refactor this code with similar cases.
Fixes: PR9223 and rdar://9000350
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@125631 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 2ca5c8644e6c35b3a7910a576ed89cddb7b82c3b |
15-Feb-2011 |
Chris Lattner <sabre@nondot.org> |
convert ConstantVector::get to use ArrayRef.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@125537 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| 75831904220042260c4faece8507a2807acba47f |
14-Feb-2011 |
Chris Lattner <sabre@nondot.org> |
revert my ConstantVector patch, it seems to have made the llvm-gcc
builders unhappy.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@125504 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| 283c8caccd093f8e1d4f0bdd01ac240b4edbd20a |
14-Feb-2011 |
Chris Lattner <sabre@nondot.org> |
Switch ConstantVector::get to use ArrayRef instead of a pointer+size
idiom. Change various clients to simplify their code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@125487 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| 593051b4e2c5fb88fa4acbe3bec92581bef554c0 |
14-Feb-2011 |
Chris Lattner <sabre@nondot.org> |
fix PR9210 by implementing some type legalization logic for
vector fp conversions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@125482 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeTypes.h
egalizeVectorTypes.cpp
|
| 463b3c2a9974acf7586d1e6a4416aa7cc004ff0e |
14-Feb-2011 |
Chris Lattner <sabre@nondot.org> |
fix two comment thinkos
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@125481 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 0a9481f44fe4fc76e59109992940a76b2a3f9b3b |
13-Feb-2011 |
Chris Lattner <sabre@nondot.org> |
Enhance ComputeMaskedBits to know that aligned frameindexes
have their low bits set to zero. This allows us to optimize
out explicit stack alignment code like in stack-align.ll:test4 when
it is redundant.
Doing this causes the code generator to start turning FI+cst into
FI|cst all over the place, which is general goodness (that is the
canonical form) except that various pieces of the code generator
don't handle OR aggressively. Fix this by introducing a new
SelectionDAG::isBaseWithConstantOffset predicate, and using it
in places that are looking for ADD(X,CST). The ARM backend in
particular was missing a lot of addressing mode folding opportunities
around OR.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@125470 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
argetLowering.cpp
|
| e075118489baf15a7cea2e7f155b4799b93d6d02 |
13-Feb-2011 |
Chris Lattner <sabre@nondot.org> |
Revisit my fix for PR9028: the issue is that DAGCombine was
generating i8 shift amounts for things like i1024 types. Add
an assert in getNode to prevent this from occuring in the future,
fix the buggy transformation, revert my previous patch, and
document this gotcha in ISDOpcodes.h
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@125465 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
egalizeIntegerTypes.cpp
electionDAG.cpp
electionDAGBuilder.cpp
|
| 915eeb488786379250808d47668c43e010efe566 |
13-Feb-2011 |
Chris Lattner <sabre@nondot.org> |
when legalizing extremely wide shifts, make sure that
the shift amounts are in a suitably wide type so that
we don't generate out of range constant shift amounts.
This fixes PR9028.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@125458 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeIntegerTypes.cpp
electionDAGBuilder.cpp
|
| d3027738856d57ee22930deca0c7977fdc13e633 |
13-Feb-2011 |
Chris Lattner <sabre@nondot.org> |
fix visitShift to properly zero extend the shift amount if the provided operand
is narrower than the shift register. Doing an anyext provides undefined bits in
the top part of the register.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@125457 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| 609d54ee1e715af57e499c2cd10ff5a9ba89b9f2 |
12-Feb-2011 |
Nadav Rotem <nadav.rotem@intel.com> |
A fix for 9165.
The DAGCombiner created illegal BUILD_VECTOR operations.
The patch added a check that either illegal operations are
allowed or that the created operation is legal.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@125435 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| f94fdb6f571c2cdf8390ead558ba40b267df1172 |
11-Feb-2011 |
Nadav Rotem <nadav.rotem@intel.com> |
SimplifySelectOps can only handle selects with a scalar condition. Add a check
that the condition is not a vector.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@125398 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 5a4552ca4256461f402f9d7d2511e77c79316907 |
11-Feb-2011 |
Nadav Rotem <nadav.rotem@intel.com> |
Fix #9190
The bug happens when the DAGCombiner attempts to optimize one of the patterns
of the SUB opcode. It tries to create a zero of type v2i64. This type is legal
on 32bit machines, but the initializer of this vector (i64) is target dependent.
Currently, the initializer attempts to create an i64 zero constant, which fails.
Added a flag to tell the DAGCombiner to create a legal zero, if we require that
the pass would generate legal types.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@125391 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 480d1e3a67751c9c809e9ce047ad7e4b23bab9f1 |
07-Feb-2011 |
Devang Patel <dpatel@apple.com> |
Remove comment about an argument that was removed couple of years ago.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@125054 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 92e946630d5f9bb092853b93501387dd216899b9 |
04-Feb-2011 |
Andrew Trick <atrick@apple.com> |
Introducing a new method of tracking register pressure. We can't
precisely track pressure on a selection DAG, but we can at least keep
it balanced. This design accounts for various interesting aspects of
selection DAGS: register and subregister copies, glued nodes, dead
nodes, unused registers, etc.
Added SUnit::NumRegDefsLeft and ScheduleDAGSDNodes::RegDefIter.
Note: I disabled PrescheduleNodesWithMultipleUses when register
pressure is enabled, based on no evidence other than I don't think it
makes sense to have both enabled.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@124853 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGRRList.cpp
cheduleDAGSDNodes.cpp
cheduleDAGSDNodes.h
|
| cd5af07c4573c6b1270d6737e76ef3219091a733 |
04-Feb-2011 |
Andrew Trick <atrick@apple.com> |
whitespace
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@124827 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGSDNodes.cpp
|
| 31959b19a72608051888160514977875a8027dfc |
02-Feb-2011 |
Evan Cheng <evan.cheng@apple.com> |
Given a pair of floating point load and store, if there are no other uses of
the load, then it may be legal to transform the load and store to integer
load and store of the same width.
This is done if the target specified the transformation as profitable. e.g.
On arm, this can transform:
vldr.32 s0, []
vstr.32 s0, []
to
ldr r12, []
str r12, []
rdar://8944252
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@124708 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 9a14a362d0388da3b7a9b866d23f09f6fe080a29 |
01-Feb-2011 |
Matt Beaumont-Gay <matthewbg@google.com> |
Take Bill Wendling's suggestion for structuring a couple of asserts.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@124688 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| e9a7ea68653689966417443b8ac2528c1d9d3ccf |
31-Jan-2011 |
Devang Patel <dpatel@apple.com> |
Keep track of incoming argument's location while emitting LiveIns.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@124611 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.h
electionDAGISel.cpp
|
| 4e3740ee6ddfc5895061245364de21e3f73517fe |
31-Jan-2011 |
Richard Osborne <richard@xmos.com> |
Fix bug where ReduceLoadWidth was creating illegal ZEXTLOAD instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@124587 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 9b108a338d544a6baf2ff087055326e301e6815d |
30-Jan-2011 |
Benjamin Kramer <benny.kra@googlemail.com> |
Teach DAGCombine to fold fold (sra (trunc (sr x, c1)), c2) -> (trunc (sra x, c1+c2) when c1 equals the amount of bits that are truncated off.
This happens all the time when a smul is promoted to a larger type.
On x86-64 we now compile "int test(int x) { return x/10; }" into
movslq %edi, %rax
imulq $1717986919, %rax, %rax
movq %rax, %rcx
shrq $63, %rcx
sarq $34, %rax <- used to be "shrq $32, %rax; sarl $2, %eax"
addl %ecx, %eax
This fires 96 times in gcc.c on x86-64.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@124559 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 2c94b4201beccbd061fd679ea7e9db1381fe8357 |
29-Jan-2011 |
Benjamin Kramer <benny.kra@googlemail.com> |
Add the missing sub identity "A-(A-B) -> B" to DAGCombine.
This happens e.g. for code like "X - X%10" where we lower the modulo operation
to a series of multiplies and shifts that are then subtracted from X, leading to
this missed optimization.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@124532 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| ed4efd3358c69dc73eea174ac4b252402d17f471 |
28-Jan-2011 |
Nick Lewycky <nicholas@mxc.ca> |
Fix build with stdcxx by using llvm::next. Patch by Joerg Sonnenberger!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@124472 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| e787ddb5105b2c355c166c395ddbeb2047cf3136 |
27-Jan-2011 |
Andrew Trick <atrick@apple.com> |
Remove a temporary workaround for a lencod miscompile. Depends on the fix in r124442.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@124443 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGRRList.cpp
|
| 7e7fc1052afa9a7b5bcc94d50bc5f0403a6e7470 |
27-Jan-2011 |
Devang Patel <dpatel@apple.com> |
Speculatively revert r124380.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@124397 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
electionDAG.cpp
|
| bfae5f312c5a726687b4f2201681fb5519568e14 |
27-Jan-2011 |
Devang Patel <dpatel@apple.com> |
While legalizing SDValues do not drop SDDbgValues, trasfer them to new legal nodes.
Take 2. This includes fix for dragonegg crash.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@124380 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
electionDAG.cpp
|
| 4789aca85eb783865c0a763352a7585fa6f65248 |
27-Jan-2011 |
Matt Beaumont-Gay <matthewbg@google.com> |
Try harder to not have unused variables.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@124350 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| a8af137847c07ae01a7bd7a3e7e11cbd449e823c |
27-Jan-2011 |
Matt Beaumont-Gay <matthewbg@google.com> |
Opt-mode -Wunused-variable cleanup
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@124346 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 39078a8bde256ee22e981713a4d2ff8235dc7706 |
27-Jan-2011 |
Devang Patel <dpatel@apple.com> |
Reapply 124301
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@124339 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGSDNodes.cpp
|
| 6b9a293a0c7d86c07d704da5facb34cc03ce1d02 |
26-Jan-2011 |
Bill Wendling <isanbard@gmail.com> |
Initialize variable to get rid of clang warning.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@124331 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 4a95c199779037d1dc60db8f7b883e28c794b001 |
26-Jan-2011 |
Devang Patel <dpatel@apple.com> |
Revert 124301.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@124327 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGSDNodes.cpp
|
| c47fd9fbf5d5179363eadde3c3ef57f8094c19e3 |
26-Jan-2011 |
Devang Patel <dpatel@apple.com> |
Revert r124302
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@124320 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| cfe33c46aa50f04adb0431243e7d25f79b719ac6 |
26-Jan-2011 |
David Greene <greened@obbligato.org> |
[AVX] Add INSERT_SUBVECTOR and support it on x86. This provides a
default implementation for x86, going through the stack in a similr
fashion to how the codegen implements BUILD_VECTOR. Eventually this
will get matched to VINSERTF128 if AVX is available.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@124307 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
electionDAG.cpp
|
| d2c9793bdf3fe621eee9330f9977be256301b5bf |
26-Jan-2011 |
Devang Patel <dpatel@apple.com> |
While legalizing SDValues do not drop SDDbgValues, trasfer them to new legal nodes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@124302 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 6f121fdede373a84f20785d7d30077667528dcdc |
26-Jan-2011 |
Devang Patel <dpatel@apple.com> |
Process valid SDDbgValues even if the node does not have any order assigned.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@124301 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGSDNodes.cpp
|
| 55d20e8ff1e458f177302386d14f1a4dbdd86028 |
26-Jan-2011 |
Devang Patel <dpatel@apple.com> |
Refactor.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@124300 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGSDNodes.cpp
|
| 91585098eff1f0acdefa2667e091742b60dcbf15 |
26-Jan-2011 |
David Greene <greened@obbligato.org> |
[AVX] Support EXTRACT_SUBVECTOR on x86. This provides a default
implementation of EXTRACT_SUBVECTOR for x86, going through the stack
in a similr fashion to how the codegen implements BUILD_VECTOR.
Eventually this will get matched to VEXTRACTF128 if AVX is available.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@124292 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeVectorTypes.cpp
electionDAG.cpp
|
| a2e868d34ccfed46310e98338ded6a74b2b01308 |
26-Jan-2011 |
Devang Patel <dpatel@apple.com> |
Provide an interface to transfer SDDbgValue from one SDNode to another.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@124245 91177308-0d34-0410-b5e6-96231b3b80d8
DNodeDbgValue.h
electionDAG.cpp
|
| 8f31428119b842875ed50996708164b56f3c6a4e |
25-Jan-2011 |
Devang Patel <dpatel@apple.com> |
Resolve DanglingDbgValue of PHI nodes where the use follows dbg.value intrinisic.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@124203 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| 3a00ffacdc49cb71baca7a17de51ff55fca119b7 |
25-Jan-2011 |
Devang Patel <dpatel@apple.com> |
This assertion is too restrictive, it does not apply for dangling dbg value nodes (nodes where dbg.value intrinsic preceds use of the value).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@124202 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGSDNodes.cpp
|
| a3ee3ef71b025de982cdda123bbfed44278b011a |
24-Jan-2011 |
Devang Patel <dpatel@apple.com> |
Speculatively revert r124138.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@124142 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| 224a180d11891a80b4f00bdec77e7f5f465690ac |
24-Jan-2011 |
Devang Patel <dpatel@apple.com> |
Resolve DanglingDbgValue of PHI nodes where the use follows dbg.value intrinisic.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@124138 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| c48d50f9c036b48826e75df125d80af596980e00 |
24-Jan-2011 |
Andrew Trick <atrick@apple.com> |
Temporarily workaround JM/lencod miscompile (SIGSEGV).
rdar://problem/8893967
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@124137 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGRRList.cpp
|
| 584520e8e2c1f8cc04bc8dd4dc4ea6c390627317 |
23-Jan-2011 |
Ted Kremenek <kremenek@apple.com> |
Null initialize a few variables flagged by
clang's -Wuninitialized-experimental warning.
While these don't look like real bugs, clang's
-Wuninitialized-experimental analysis is stricter
than GCC's, and these fixes have the benefit
of being general nice cleanups.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@124073 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| d1dace8aea073716daf0055ad07fde1164b2a472 |
21-Jan-2011 |
Andrew Trick <atrick@apple.com> |
Enable support for precise scheduling of the instruction selection
DAG. Disable using "-disable-sched-cycles".
For ARM, this enables a framework for modeling the cpu pipeline and
counting stalls. It also activates several heuristics to drive
scheduling based on the model. Scheduling is inherently imprecise at
this stage, and until spilling is improved it may defeat attempts to
schedule. However, this framework provides greater control over
tuning codegen.
Although the flag is not target-specific, it should have very little
affect on the default scheduler used by x86. The only two changes that
affect x86 are:
- scheduling a high-latency operation bumps the current cycle so independent
operations can have their latency covered. i.e. two independent 4
cycle operations can produce results in 4 cycles, not 8 cycles.
- Two operations with equal register pressure impact and no
latency-based stalls on their uses will be prioritized by depth before height
(height is irrelevant if no stalls occur in the schedule below this point).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123971 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGRRList.cpp
|
| c8bfd1d78ff9a307d1d4cb57cce4549b538e60f4 |
21-Jan-2011 |
Andrew Trick <atrick@apple.com> |
Convert -enable-sched-cycles and -enable-sched-hazard to -disable
flags. They are still not enable in this revision.
Added TargetInstrInfo::isZeroCost() to fix a fundamental problem with
the scheduler's model of operand latency in the selection DAG.
Generalized unit tests to work with sched-cycles.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123969 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGRRList.cpp
|
| 6214373fe980a988c887322c7453126821713217 |
20-Jan-2011 |
Eric Christopher <echristo@apple.com> |
My editor's indent went crazy. Fix.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123909 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeTypes.h
|
| 02050986d96d1880ec3015cb97c41d1dbad865d6 |
20-Jan-2011 |
Eric Christopher <echristo@apple.com> |
Expand invalid return values for umulo and smulo. Handle these similarly
to add/sub by doing the normal operation and then checking for overflow
afterwards. This generally relies on the DAG handling the later invalid
operations as well.
Fixes the 64-bit part of rdar://8622122 and rdar://8774702.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123908 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeIntegerTypes.cpp
egalizeTypes.h
|
| 0bc308600b0069f07ba722b472c68588573ebd28 |
20-Jan-2011 |
Andrew Trick <atrick@apple.com> |
Selection DAG scheduler register pressure heuristic fixes.
Added a check for already live regs before claiming HighRegPressure.
Fixed a few cases of checking the wrong number of successors.
Added some tracing until these heuristics are better understood.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123892 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGRRList.cpp
|
| e3385811aaf1e7ff548c1f1edc6a85d034909a5c |
20-Jan-2011 |
Eric Christopher <echristo@apple.com> |
Use only one API at a time.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123866 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 38a18261b97a0b7e0ed75b1c8edd81ec9bd01085 |
20-Jan-2011 |
Eric Christopher <echristo@apple.com> |
If we can, lower the multiply part of a umulo/smulo call to a libcall
with an invalid type then split the result and perform the overflow check
normally.
Fixes the 32-bit parts of rdar://8622122 and rdar://8774702.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123864 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 955ed73d12f2b186ef3f80da872b702cd7f2895b |
18-Jan-2011 |
Jeffrey Yasskin <jyasskin@google.com> |
Remove unused variables found by gcc-4.6's -Wunused-but-set-variable.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123707 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeIntegerTypes.cpp
|
| f22432282c78a65828cd9da94028e8b798858180 |
18-Jan-2011 |
Stuart Hastings <stuart@apple.com> |
Remove checking that prevented overlapping CALLSEQ_START/CALLSEQ_END
ranges, add legalizer support for nested calls. Necessary for ARM
byval support. Radar 7662569.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123704 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| c9b6a3eb90c5e0f6460632a443591068522537e2 |
17-Jan-2011 |
Benjamin Kramer <benny.kra@googlemail.com> |
Fix an off-by-one error in ctpop combining.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123664 91177308-0d34-0410-b5e6-96231b3b80d8
argetLowering.cpp
|
| d8228924556d3c465da5b858c620b29fd1cf298e |
17-Jan-2011 |
Benjamin Kramer <benny.kra@googlemail.com> |
Add a DAGCombine to turn (ctpop x) u< 2 into (x & x-1) == 0.
This shaves off 4 popcounts from the hacked 186.crafty source.
This is enabled even when a native popcount instruction is available. The
combined code is one operation longer but it should be faster nevertheless.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123621 91177308-0d34-0410-b5e6-96231b3b80d8
argetLowering.cpp
|
| 42c32daadbb1bd0626cced08c418d1b7a0b16fb4 |
14-Jan-2011 |
Logan <tzuhsiang.chien@gmail.com> |
Add LOCAL_MODULE_TAGS := optional
Change-Id: I292f6297b06f97360c15884677057d624e73fbf6
ndroid.mk
|
| b99fdee325fe677081dc27bb7d719518452f3256 |
16-Jan-2011 |
Chris Lattner <sabre@nondot.org> |
reapply my fix for PR8961 with a tweak to properly handle
multi-instruction sequences like calls. Many thanks to Jakob for
finding a testcase.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123559 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 5df5a22d1a098961edebac59fbddcab045fddd29 |
15-Jan-2011 |
Benjamin Kramer <benny.kra@googlemail.com> |
Add an assert so we don't silently miscompile ctpop for bit widths > 128.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123549 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| b6516aeef12a05aa47515f76e18fc426d85babbd |
15-Jan-2011 |
Benjamin Kramer <benny.kra@googlemail.com> |
Reimplement CTPOP legalization with the "best" algorithm from
http://graphics.stanford.edu/~seander/bithacks.html#CountBitsSetParallel
In a silly microbenchmark on a 65 nm core2 this is 1.5x faster than the old
code in 32 bit mode and about 2x faster in 64 bit mode. It's also a lot shorter,
especially when counting 64 bit population on a 32 bit target.
I hope this is fast enough to replace Kernighan-style counting loops even when
the input is rather sparse.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123547 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| ca5f61676956cff088c225c3c166a589410b3101 |
14-Jan-2011 |
Dan Gohman <gohman@apple.com> |
Delete an assignment to ThisBB which isn't needed, and tidy up some
comments.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123479 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| f697c8a19adf962a933b055383952e72789a0e20 |
14-Jan-2011 |
Andrew Trick <atrick@apple.com> |
Support for precise scheduling of the instruction selection DAG,
disabled in this checkin. Sorry for the large diffs due to
refactoring. New functionality is all guarded by EnableSchedCycles.
Scheduling the isel DAG is inherently imprecise, but we give it a best
effort:
- Added MayReduceRegPressure to allow stalled nodes in the queue only
if there is a regpressure need.
- Added BUHasStall to allow checking for either dependence stalls due to
latency or resource stalls due to pipeline hazards.
- Added BUCompareLatency to encapsulate and standardize the heuristics
for minimizing stall cycles (vs. reducing register pressure).
- Modified the bottom-up heuristic (now in BUCompareLatency) to
prioritize nodes by their depth rather than height. As long as it
doesn't stall, height is irrelevant. Depth represents the critical
path to the DAG root.
- Added hybrid_ls_rr_sort::isReady to filter stalled nodes before
adding them to the available queue.
Related Cleanup: most of the register reduction routines do not need
to be templates.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123468 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGRRList.cpp
|
| 67d98916900a68b5902428e39f9c865c8d02c1bf |
14-Jan-2011 |
Chris Lattner <sabre@nondot.org> |
Set the insertion point correctly for instructions generated by load folding:
they should go *before* the new instruction not after it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123420 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| dd11ea4a372b992775f67b64fb703edf2de0d27b |
13-Jan-2011 |
Dan Gohman <gohman@apple.com> |
Fix r123346 to handle scalar types too.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123352 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| b86654385a394d8bdfe0cd6e3b5d57e9f3cb0eae |
13-Jan-2011 |
Dan Gohman <gohman@apple.com> |
Apply the patch from PR8958, which allows llc to get slightly
further on the associated testcase before aborting.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123346 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 93c70426f581859f197df1b05fdb1b3664d361a0 |
11-Jan-2011 |
Eric Christopher <echristo@apple.com> |
Move ExpandAtomic into the integer expansion routines - it's only used there.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123202 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeIntegerTypes.cpp
egalizeTypes.cpp
|
| 97fd9a58de3c99a74b0890a908430fa3ab894bed |
10-Jan-2011 |
Dale Johannesen <dalej@apple.com> |
Fix PR 8916 (qv for analysis), at least the immediate problem.
There's an inherent tension in DAGCombine between assuming
that things will be put in canonical form, and the Depth
mechanism that disables transformations when recursion gets
too deep. It would not surprise me if there's a lot of little
bugs like this one waiting to be discovered. The mechanism
seems fragile and I'd suggest looking at it from a design viewpoint.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123191 91177308-0d34-0410-b5e6-96231b3b80d8
argetLowering.cpp
|
| 16c29b5f285f375be53dabaa73e3e91107485fe4 |
10-Jan-2011 |
Anton Korobeynikov <asl@math.spbu.ru> |
Rename TargetFrameInfo into TargetFrameLowering. Also, put couple of FIXMEs and fixes here and there.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123170 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
unctionLoweringInfo.cpp
egalizeDAG.cpp
electionDAG.cpp
electionDAGBuilder.cpp
|
| c9df025e33ac435adb3b3318d237c36ca7cec659 |
10-Jan-2011 |
Jakob Stoklund Olesen <stoklund@2pi.dk> |
Simplify a bunch of isVirtualRegister() and isPhysicalRegister() logic.
These functions not longer assert when passed 0, but simply return false instead.
No functional change intended.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123155 91177308-0d34-0410-b5e6-96231b3b80d8
nstrEmitter.cpp
electionDAGBuilder.cpp
|
| 4314268128be6d54c9a7f0709680e5a5b40f3ab3 |
09-Jan-2011 |
Jakob Stoklund Olesen <stoklund@2pi.dk> |
Replace TargetRegisterInfo::printReg with a PrintReg class that also works without a TRI instance.
Print virtual registers numbered from 0 instead of the arbitrary
FirstVirtualRegister. The first virtual register is printed as %vreg0.
TRI::NoRegister is printed as %noreg.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123107 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 358de24dc121cd21911f3248b599178c86e9b467 |
09-Jan-2011 |
Jakob Stoklund Olesen <stoklund@2pi.dk> |
Use an IndexedMap for LiveOutRegInfo to hide its dependence on TargetRegisterInfo::FirstVirtualRegister.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123096 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
electionDAGISel.cpp
|
| c36b7069b42bece963b7e6adf020353ce990ef76 |
08-Jan-2011 |
Evan Cheng <evan.cheng@apple.com> |
Do not model all INLINEASM instructions as having unmodelled side effects.
Instead encode llvm IR level property "HasSideEffects" in an operand (shared
with IsAlignStack). Added MachineInstrs::hasUnmodeledSideEffects() to check
the operand when the instruction is an INLINEASM.
This allows memory instructions to be moved around INLINEASM instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123044 91177308-0d34-0410-b5e6-96231b3b80d8
nstrEmitter.cpp
electionDAGBuilder.cpp
electionDAGISel.cpp
|
| 5e8b833707e6d59576d91b23a2c24e596eace60e |
07-Jan-2011 |
Bob Wilson <bob.wilson@apple.com> |
Add ARM patterns to match EXTRACT_SUBVECTOR nodes.
Also fix an off-by-one in SelectionDAGBuilder that was preventing shuffle
vectors from being translated to EXTRACT_SUBVECTOR.
Patch by Tim Northover.
The test changes are needed to keep those spill-q tests from testing aligned
spills and restores. If the only aligned stack objects are spill slots, we
no longer realign the stack frame. Prior to this patch, an EXTRACT_SUBVECTOR
was legalized by loading from the stack, which created an aligned frame index.
Now, however, there is nothing except the spill slot in the stack frame, so
I added an aligned alloca.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122995 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| 6736e19f4c9af1181cedca54ba6e3a1420454928 |
07-Jan-2011 |
Bob Wilson <bob.wilson@apple.com> |
Change EXTRACT_SUBVECTOR to require a constant index.
We were never generating any of these nodes with variable indices, and there
was one legalizer function asserting on a non-constant index. If we ever have
a need to support variable indices, we can add this back again.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122993 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeVectorTypes.cpp
|
| d9aa80038f630d72883ebe5b524e372a44e6695c |
07-Jan-2011 |
Duncan Sands <baldrick@free.fr> |
Fix the other problem reported in PR8582. Testcase and patch by
Nadav Rotem.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122983 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeTypes.cpp
|
| 8d93d19076fb6a67eeb63cb0ba79d00c3aa8478a |
06-Jan-2011 |
Eric Christopher <echristo@apple.com> |
Add some fairly duplicated code to let type legalization split illegal
typed atomics. This will lower exclusively to libcalls at the moment.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122979 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeIntegerTypes.cpp
egalizeTypes.cpp
egalizeTypes.h
|
| 0521928ae7cc492f3f45ef0e0cedc349102489c5 |
06-Jan-2011 |
Evan Cheng <evan.cheng@apple.com> |
Re-implement r122936 with proper target hooks. Now getMaxStoresPerMemcpy
etc. takes an option OptSize. If OptSize is true, it would return
the inline limit for functions with attribute OptSize.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122952 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
argetLowering.cpp
|
| 255874ff521bb81b294ec861a5d9a99d8198448c |
06-Jan-2011 |
Evan Cheng <evan.cheng@apple.com> |
Revert r122936. I'll re-implement the change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122949 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 9a9d847afaf5df1b66b0f92692e31d1d4003c3a9 |
06-Jan-2011 |
Evan Cheng <evan.cheng@apple.com> |
r105228 reduced the memcpy / memset inline limit to 4 with -Os to avoid blowing
up freebsd bootloader. However, this doesn't make much sense for Darwin, whose
-Os is meant to optimize for size only if it doesn't hurt performance.
rdar://8821501
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122936 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| d08e5b48bc5d9177b1d70a1980a7805420a99085 |
06-Jan-2011 |
Evan Cheng <evan.cheng@apple.com> |
Avoid zero extend bit test operands to pointer type if all the masks fit in
the original type of the switch statement key.
rdar://8781238
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122935 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
electionDAGBuilder.h
electionDAGISel.cpp
|
| 0b71d3972d9138c7482233bc44a9a207634769ef |
06-Jan-2011 |
Evan Cheng <evan.cheng@apple.com> |
Optimize:
r1025 = s/zext r1024, 4
r1026 = extract_subreg r1025, 4
to:
r1026 = copy r1024
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122925 91177308-0d34-0410-b5e6-96231b3b80d8
nstrEmitter.cpp
|
| 762a17a040f2e5c7f76b6b85d853cca454289e71 |
05-Jan-2011 |
Eric Christopher <echristo@apple.com> |
80-cols.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122909 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 2d31d14bace4cf225e997c78daefccc52e38186c |
04-Jan-2011 |
Eric Christopher <echristo@apple.com> |
Remove TODO, these appear to be implemented.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122849 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 80220369b040dd9769e4c4b65d2d018210c3b240 |
02-Jan-2011 |
Benjamin Kramer <benny.kra@googlemail.com> |
Try to reuse the value when lowering memset.
This allows us to compile:
void test(char *s, int a) {
__builtin_memset(s, a, 15);
}
into 1 mul + 3 stores instead of 3 muls + 3 stores.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122710 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 8c06aa1c597bb5c2c264a190bc35836f0a7b4cd5 |
02-Jan-2011 |
Benjamin Kramer <benny.kra@googlemail.com> |
Lower the i8 extension in memset to a multiply instead of a potentially long series of shifts and ors.
We could implement a DAGCombine to turn x * 0x0101 back into logic operations
on targets that doesn't support the multiply or it is slow (p4) if someone cares
enough.
Example code:
void test(char *s, int a) {
__builtin_memset(s, a, 4);
}
before:
_test: ## @test
movzbl 8(%esp), %eax
movl %eax, %ecx
shll $8, %ecx
orl %eax, %ecx
movl %ecx, %eax
shll $16, %eax
orl %ecx, %eax
movl 4(%esp), %ecx
movl %eax, 4(%ecx)
movl %eax, (%ecx)
ret
after:
_test: ## @test
movzbl 8(%esp), %eax
imull $16843009, %eax, %eax ## imm = 0x1010101
movl 4(%esp), %ecx
movl %eax, 4(%ecx)
movl %eax, (%ecx)
ret
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122707 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| a75ce9f5d2236d93c117e861e60e6f3f748c9555 |
24-Dec-2010 |
Andrew Trick <atrick@apple.com> |
Minor cleanup related to my latest scheduler changes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122545 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGRRList.cpp
|
| 24312230ada6f4cfa8776351dafb12eea8a81b33 |
24-Dec-2010 |
Andrew Trick <atrick@apple.com> |
Fix a few cases where the scheduler is not checking for phys reg copies. The scheduling node may have a NULL DAG node, yuck.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122544 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGRRList.cpp
|
| 2da8bc8a5f7705ac131184cd247f48500da0d74e |
24-Dec-2010 |
Andrew Trick <atrick@apple.com> |
Various bits of framework needed for precise machine-level selection
DAG scheduling during isel. Most new functionality is currently
guarded by -enable-sched-cycles and -enable-sched-hazard.
Added InstrItineraryData::IssueWidth field, currently derived from
ARM itineraries, but could be initialized differently on other targets.
Added ScheduleHazardRecognizer::MaxLookAhead to indicate whether it is
active, and if so how many cycles of state it holds.
Added SchedulingPriorityQueue::HasReadyFilter to allowing gating entry
into the scheduler's available queue.
ScoreboardHazardRecognizer now accesses the ScheduleDAG in order to
get information about it's SUnits, provides RecedeCycle for bottom-up
scheduling, correctly computes scoreboard depth, tracks IssueCount, and
considers potential stall cycles when checking for hazards.
ScheduleDAGRRList now models machine cycles and hazards (under
flags). It tracks MinAvailableCycle, drives the hazard recognizer and
priority queue's ready filter, manages a new PendingQueue, properly
accounts for stall cycles, etc.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122541 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGList.cpp
cheduleDAGRRList.cpp
electionDAGISel.cpp
|
| 6e8f4c404825b79f9b9176483653f1aa927dfbde |
24-Dec-2010 |
Andrew Trick <atrick@apple.com> |
whitespace
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122539 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGList.cpp
electionDAGISel.cpp
|
| 29d8f0cae425f1bba583565227eaebf58f26ce73 |
23-Dec-2010 |
Chris Lattner <sabre@nondot.org> |
flags -> glue for selectiondag
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122509 91177308-0d34-0410-b5e6-96231b3b80d8
nstrEmitter.cpp
cheduleDAGFast.cpp
cheduleDAGRRList.cpp
cheduleDAGSDNodes.cpp
electionDAGISel.cpp
electionDAGPrinter.cpp
|
| a4359be0328a91971c486b06892c742de1fa0f2b |
23-Dec-2010 |
Chris Lattner <sabre@nondot.org> |
sdisel flag -> glue.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122507 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 2902736a507df1c6fdc0daa4e8f0e385bb5f7820 |
23-Dec-2010 |
Andrew Trick <atrick@apple.com> |
Reorganize ListScheduleBottomUp in preparation for modeling machine cycles and instruction issue.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122491 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGRRList.cpp
|
| 3d420cb2fee925d0888cd3a60a222a19e75cd890 |
23-Dec-2010 |
Andrew Trick <atrick@apple.com> |
Converted LiveRegCycles to LiveRegGens. It's easier to work with and allows multiple nodes per cycle.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122474 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGRRList.cpp
|
| cb7947b81be4cb55fc647ea3722eb7a8613545cb |
23-Dec-2010 |
Andrew Trick <atrick@apple.com> |
In CheckForLiveRegDef use TRI->getOverlaps.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122473 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGRRList.cpp
|
| 1b1658741aa4bc88fc488ef217d9603294e16c58 |
23-Dec-2010 |
Andrew Trick <atrick@apple.com> |
Fixes PR8823: add-with-overflow-128.ll
In the bottom-up selection DAG scheduling, handle two-address
instructions that read/write unspillable registers. Treat
the entire chain of two-address nodes as a single live range.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122472 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGRRList.cpp
|
| 8e68c3873549ca31533e2e3e40dda3a43cb79566 |
23-Dec-2010 |
Jeffrey Yasskin <jyasskin@google.com> |
Change all self assignments X=X to (void)X, so that we can turn on a
new gcc warning that complains on self-assignments and
self-initializations.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122458 91177308-0d34-0410-b5e6-96231b3b80d8
nstrEmitter.cpp
|
| f50125ecaab0cc379892280de33f0a2d387f7f5b |
23-Dec-2010 |
Benjamin Kramer <benny.kra@googlemail.com> |
DAGCombine add (sext i1), X into sub X, (zext i1) if sext from i1 is illegal. The latter usually compiles into smaller code.
example code:
unsigned foo(unsigned x, unsigned y) {
if (x != 0) y--;
return y;
}
before:
_foo: ## @foo
cmpl $1, 4(%esp) ## encoding: [0x83,0x7c,0x24,0x04,0x01]
sbbl %eax, %eax ## encoding: [0x19,0xc0]
notl %eax ## encoding: [0xf7,0xd0]
addl 8(%esp), %eax ## encoding: [0x03,0x44,0x24,0x08]
ret ## encoding: [0xc3]
after:
_foo: ## @foo
cmpl $1, 4(%esp) ## encoding: [0x83,0x7c,0x24,0x04,0x01]
movl 8(%esp), %eax ## encoding: [0x8b,0x44,0x24,0x08]
adcl $-1, %eax ## encoding: [0x83,0xd0,0xff]
ret ## encoding: [0xc3]
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122455 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| cbf68dfbc0b36de8ef20bb42ce0c7d75cb132fc7 |
22-Dec-2010 |
Chris Lattner <sabre@nondot.org> |
Fix a bug in ReduceLoadWidth that wasn't handling extending
loads properly. We miscompiled the testcase into:
_test: ## @test
movl $128, (%rdi)
movzbl 1(%rdi), %eax
ret
Now we get a proper:
_test: ## @test
movl $128, (%rdi)
movsbl (%rdi), %eax
movzbl %ah, %eax
ret
This fixes PR8757.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122392 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 7a2a7faf9cfdbdf5f1de720385dc8a0009cd60a6 |
22-Dec-2010 |
Chris Lattner <sabre@nondot.org> |
more cleanups, move a check for "roundedness" earlier to reject
unhanded cases faster and simplify code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122391 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 4c32bc24ded3d36db1f9fda301e46c16d1df6786 |
22-Dec-2010 |
Chris Lattner <sabre@nondot.org> |
reduce indentation and improve comments, no functionality change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122389 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| feac09801b5c03412d452e685570baff6eb84c88 |
21-Dec-2010 |
Andrew Trick <atrick@apple.com> |
In DelayForLiveRegsBottomUp, handle instructions that read and write
the same physical register. Simplifies the fix from the previous
checkin r122211.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122370 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGRRList.cpp
|
| 38036d8b36fa5d1b2f3530f47fd716e9da7bffab |
21-Dec-2010 |
Andrew Trick <atrick@apple.com> |
whitespace
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122368 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGRRList.cpp
|
| c72b18cdc8f155dbb99d554056f3bb6b38f5f72c |
21-Dec-2010 |
Dale Johannesen <dalej@apple.com> |
Reapply 122353-122355 with fixes. 122354 was wrong;
the shift type was needed one place, the shift count
type another. The transform in 123555 had the same
problem.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122366 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| d0cf2585a00bc7dd9a682b65dc53245db37ec366 |
21-Dec-2010 |
Dale Johannesen <dalej@apple.com> |
Revert 122353-122355 for the moment, they broke stuff.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122360 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| a83bf35d167c43ff2eb8c61bdea0cb660d2b07d8 |
21-Dec-2010 |
Dale Johannesen <dalej@apple.com> |
Add a new transform to DAGCombiner.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122355 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 5ecc340e34e6ca4b9f6ebde6c1379cb3b8084f69 |
21-Dec-2010 |
Dale Johannesen <dalej@apple.com> |
Get the type of a shift from the shift, not from its shift
count operand. These should be the same but apparently are
not always, and this is cleaner anyway. This improves the
code in an existing test.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122354 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| efc96dd38c285c1a01aa6f613f533d1205e4acb2 |
21-Dec-2010 |
Dale Johannesen <dalej@apple.com> |
Shift by the word size is invalid IR; don't create it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122353 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 90b0364cff2531008831428a9b4576bf4be47c70 |
21-Dec-2010 |
Chris Lattner <sabre@nondot.org> |
fix some typos
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122349 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 56500edc7a2599e651d39df71a714e1e255ed96a |
21-Dec-2010 |
Stuart Hastings <stuart@apple.com> |
Fix indentation, add comment.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122345 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 2965e69e040d86002128b91a439eb9bfc6b83df1 |
21-Dec-2010 |
Stuart Hastings <stuart@apple.com> |
Missing logic for nested CALLSEQ_START/END.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122342 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| f1b4eafbfec976f939ec0ea3e8acf91cef5363e3 |
21-Dec-2010 |
Chris Lattner <sabre@nondot.org> |
rename MVT::Flag to MVT::Glue. "Flag" is a terrible name for
something that just glues two nodes together, even if it is
sometimes used for flags.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122310 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
nstrEmitter.cpp
egalizeDAG.cpp
egalizeIntegerTypes.cpp
cheduleDAGFast.cpp
cheduleDAGRRList.cpp
cheduleDAGSDNodes.cpp
cheduleDAGSDNodes.h
electionDAG.cpp
electionDAGBuilder.cpp
electionDAGISel.cpp
electionDAGPrinter.cpp
|
| 5df1578decc8b05ffaec0e7f5d1532234bc1be19 |
21-Dec-2010 |
Chris Lattner <sabre@nondot.org> |
improve "cannot yet select" errors a trivial amount: now
they are just as useless, but at least a bit more gramatical
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122305 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 025cc6e1be4cc3d780f10bb9ec92eba831a45f79 |
20-Dec-2010 |
Dale Johannesen <dalej@apple.com> |
Cosmetic changes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122259 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 5c3d4f0fc90c86a6c4ee9871835d70c9ff3833d5 |
20-Dec-2010 |
Chris Lattner <sabre@nondot.org> |
implement type legalization promotion support for SMULO and UMULO, giving
ARM (and other 32-bit-only) targets support for i8 and i16 overflow
multiplies. The generated code isn't great, but this at least fixes
CodeGen/Generic/overflow.ll when running on ARM hosts.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122221 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeIntegerTypes.cpp
|
| 37944985a569f8c2b0d75dafd9e2739a9887ac5d |
20-Dec-2010 |
Chris Lattner <sabre@nondot.org> |
Fix a bug in the scheduler's handling of "unspillable" vregs.
Imagine we see:
EFLAGS = inst1
EFLAGS = inst2 FLAGS
gpr = inst3 EFLAGS
Previously, we would refuse to schedule inst2 because it clobbers
the EFLAGS of the predecessor. However, it also uses the EFLAGS
of the predecessor, so it is safe to emit. SDep edges ensure that
the right order happens already anyway.
This fixes 2 testsuite crashes with the X86 patch I'm going to
commit next.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122211 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGRRList.cpp
|
| 142d21c861c0b686e38a515b1271f4157cd24004 |
20-Dec-2010 |
Chris Lattner <sabre@nondot.org> |
the result of CheckForLiveRegDef is dead, remove it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122209 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGRRList.cpp
|
| 5078293cc28dd03236384fa0a3b6c8347e0701fb |
20-Dec-2010 |
Chris Lattner <sabre@nondot.org> |
reduce indentation, no functionality change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122208 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeIntegerTypes.cpp
|
| 476b242fe7a61e5f9ac6214b0bc5c680d24f152e |
19-Dec-2010 |
Nick Lewycky <nicholas@mxc.ca> |
Add missing standard headers. Patch by Joerg Sonnenberger!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122193 91177308-0d34-0410-b5e6-96231b3b80d8
argetLowering.cpp
|
| da60588402e8913f5b7ec40945d4170d0c4ffaf5 |
19-Dec-2010 |
Chris Lattner <sabre@nondot.org> |
teach MaskedValueIsZero how to analyze ADDE. This is
enough to teach it that ADDE(0,0) is known 0 except the
low bit, for example.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122191 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 96ba57fddac5999ef6d4009d8baef24607da6221 |
19-Dec-2010 |
Chris Lattner <sabre@nondot.org> |
fix PR8642: if a critical edge has a PHI value that can trap,
isel is *required* to split the edge. PHI values get evaluated
on the edge, not in their predecessor block.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122170 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| d727343a407bd3056f93e96c60eee72725d458c8 |
18-Dec-2010 |
Bob Wilson <bob.wilson@apple.com> |
Fix a DAGCombiner crash when folding binary vector operations with constant
BUILD_VECTOR operands where the element type is not legal. I had previously
changed this code to insert TRUNCATE operations, but that was just wrong.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122102 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| f5daf8bb7ff9539f7a6e0113609b39e4b9b64ff5 |
17-Dec-2010 |
Dale Johannesen <dalej@apple.com> |
Add a transform to DAG Combiner. This improves the
code for the case where 32-bit divide by constant is
turned into 64-bit multiply by constant. 8771012.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122090 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 495de3b783c239b4b3244a1e739b2a5b82561b1b |
17-Dec-2010 |
Bob Wilson <bob.wilson@apple.com> |
Fix crash compiling a QQQQ REG_SEQUENCE for a Neon vld3_lane operation.
Radar 8776599
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122018 91177308-0d34-0410-b5e6-96231b3b80d8
nstrEmitter.cpp
|
| 33e77d3cb98de64b8657c011b549bdb54abf73fc |
15-Dec-2010 |
Chris Lattner <sabre@nondot.org> |
take care of some todos, transforming [us]mul_lohi into
a wider mul if the wider mul is legal.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121848 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 1a0fbe2cf438ac2788df669284293789681424e1 |
15-Dec-2010 |
Chris Lattner <sabre@nondot.org> |
when transforming a MULHS into a wider MUL, there is no need to SRA the
result, the top bits are truncated off anyway, just use SRL.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121846 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| de1c3605a649239cf8a96ba31885c8fbef2bc838 |
13-Dec-2010 |
Chris Lattner <sabre@nondot.org> |
Add a couple dag combines to transform mulhi/mullo into a wider multiply
when the wider type is legal. This allows us to compile:
define zeroext i16 @test1(i16 zeroext %x) nounwind {
entry:
%div = udiv i16 %x, 33
ret i16 %div
}
into:
test1: # @test1
movzwl 4(%esp), %eax
imull $63551, %eax, %eax # imm = 0xF83F
shrl $21, %eax
ret
instead of:
test1: # @test1
movw $-1985, %ax # imm = 0xFFFFFFFFFFFFF83F
mulw 4(%esp)
andl $65504, %edx # imm = 0xFFE0
movl %edx, %eax
shrl $5, %eax
ret
Implementing rdar://8760399 and example #4 from:
http://blog.regehr.org/archives/320
We should implement the same thing for [su]mul_hilo, but I don't
have immediate plans to do this.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121696 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| d5b4db982478e349a8c8759da182636b888b875f |
13-Dec-2010 |
Chris Lattner <sabre@nondot.org> |
reduce indentation by using continue, no functionality change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121662 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| a30b7d2c707b5720691f7aea0652e37bd333d3af |
12-Dec-2010 |
Duncan Sands <baldrick@free.fr> |
Catch attempts to remove a deleted node from the CSE maps. Better to
catch this here rather than later after accessing uninitialized memory
etc. Fires when compiling the testcase in PR8237.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121635 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| a304d02791b3e0297a9d545e0c602c9f916691f9 |
09-Dec-2010 |
Stuart Hastings <stuart@apple.com> |
Initial support for nested CALLSEQ_START/CALLSEQ_END constructs in LegalizeDAG.
Necessary for byval support on ARM. Radar 7662569.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121412 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 503a64dcd47e6ed9216a75ac68299a2f081b313c |
09-Dec-2010 |
Eric Christopher <echristo@apple.com> |
80-col fixups.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121356 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| bece04845e6746fd162bc36e79a6cfd095165c23 |
08-Dec-2010 |
Eric Christopher <echristo@apple.com> |
Reword comment slightly.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121293 91177308-0d34-0410-b5e6-96231b3b80d8
nstrEmitter.cpp
|
| 40f8f6264d5af2c38e797e0dc59827cd231e8ff7 |
07-Dec-2010 |
Jay Foad <jay.foad@gmail.com> |
PR5207: Change APInt methods trunc(), sext(), zext(), sextOrTrunc() and
zextOrTrunc(), and APSInt methods extend(), extOrTrunc() and new method
trunc(), to be const and to return a new value instead of modifying the
object in place.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121120 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
egalizeDAG.cpp
egalizeIntegerTypes.cpp
electionDAG.cpp
electionDAGBuilder.cpp
argetLowering.cpp
|
| afeaae7a940ce16e7874af31f3e5e91d8ca89e19 |
06-Dec-2010 |
Devang Patel <dpatel@apple.com> |
If dbg_declare() or dbg_value() is not lowered by isel then emit DEBUG message instead of creating DBG_VALUE for undefined value in reg0.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121059 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
electionDAGBuilder.cpp
|
| 3069cbf7b3ef9a31bbb8e434686b7259052c364a |
04-Dec-2010 |
Benjamin Kramer <benny.kra@googlemail.com> |
Remove unneeded zero arrays.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120910 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
electionDAG.cpp
|
| 7a874ddda037349184fbeb22838cc11a1a9bb78f |
01-Dec-2010 |
Jay Foad <jay.foad@gmail.com> |
PR5207: Rename overloaded APInt methods set(), clear(), flip() to
setAllBits(), setBit(unsigned), etc.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120564 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeFloatTypes.cpp
egalizeIntegerTypes.cpp
electionDAG.cpp
|
| 3d2125c9dbac695c93f42c0f59fd040e413fd711 |
01-Dec-2010 |
Evan Cheng <evan.cheng@apple.com> |
Enable sibling call optimization of libcalls which are expanded during
legalization time. Since at legalization time there is no mapping from
SDNode back to the corresponding LLVM instruction and the return
SDNode is target specific, this requires a target hook to check for
eligibility. Only x86 and ARM support this form of sibcall optimization
right now.
rdar://8707777
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120501 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| de189be53f5831737f38e720f10dbcdcce6876c6 |
30-Nov-2010 |
Chris Lattner <sabre@nondot.org> |
add TLI support indicating that jumps are more expensive than logical operations
and use this to disable a specific optimization. Patch by Micah Villmow!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120435 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
argetLowering.cpp
|
| a99793c5ea24dd3839f4925b89b1f6acfcb24604 |
30-Nov-2010 |
Jay Foad <jay.foad@gmail.com> |
PR5207: Make APInt::set(), APInt::clear() and APInt::flip() return void.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120413 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeFloatTypes.cpp
|
| 1f6efa3996dd1929fbc129203ce5009b620e6969 |
29-Nov-2010 |
Michael J. Spencer <bigcheesegs@gmail.com> |
Merge System into Support.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120298 91177308-0d34-0410-b5e6-96231b3b80d8
DNodeDbgValue.h
electionDAG.cpp
|
| bebfbc560bba894c8d0aa0e8b6ee109fda2d1b0c |
28-Nov-2010 |
Bob Wilson <bob.wilson@apple.com> |
Fix a comment typo.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120235 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| bf17cfa3f904e488e898ac2e3af706fd1a892f08 |
23-Nov-2010 |
Wesley Peck <peckw@wesleypeck.com> |
Renaming ISD::BIT_CONVERT to ISD::BITCAST to better reflect the LLVM IR concept.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119990 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
astISel.cpp
egalizeDAG.cpp
egalizeFloatTypes.cpp
egalizeIntegerTypes.cpp
egalizeTypes.cpp
egalizeTypes.h
egalizeTypesGeneric.cpp
egalizeVectorOps.cpp
egalizeVectorTypes.cpp
electionDAG.cpp
electionDAGBuilder.cpp
argetLowering.cpp
|
| ce750f03322fe29ced3aca0718424fe173f22298 |
22-Nov-2010 |
Benjamin Kramer <benny.kra@googlemail.com> |
Implement the "if (X == 6 || X == 4)" -> "if ((X|2) == 6)" optimization.
This currently only catches the most basic case, a two-case switch, but can be
extended later.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119964 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| 3ca136312abe3c41f3422e9de280b7be0dc65362 |
20-Nov-2010 |
Benjamin Kramer <benny.kra@googlemail.com> |
Silence Release build warnings about unused functions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119903 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 59d2dad59ebba1d82e5b72f78b7a5b2c873445d7 |
20-Nov-2010 |
Duncan Sands <baldrick@free.fr> |
On X86, MEMBARRIER, MFENCE, SFENCE, LFENCE are not target memory intrinsics,
so don't claim they are. They are allocated using DAG.getNode, so attempts
to access MemSDNode fields results in reading off the end of the allocated
memory. This fixes crashes with "llc -debug" due to debug code trying to
print MemSDNode fields for these barrier nodes (since the crashes are not
deterministic, use valgrind to see this). Add some nasty checking to try
to catch this kind of thing in the future.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119901 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| b9e6fe1e3afe3c4cdbdddfb563adc10c439dc296 |
20-Nov-2010 |
Andrew Trick <atrick@apple.com> |
Removing the useless test that I added recently. It was meant as an example, but not complicated enough to merit another test.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119898 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| 04d14ff349d5d807afbc4777d85ae1eaa7e4c8f7 |
20-Nov-2010 |
Bill Wendling <isanbard@gmail.com> |
Check for _setjmp too, because it's also used.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119875 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| cab98e3168558a40675a06bc830eb87b8e40070e |
19-Nov-2010 |
Mon P Wang <wangmp@apple.com> |
Make isScalarToVector to return false if the node is a scalar. This will prevent
DAGCombine from making an illegal transformation of bitcast of a scalar to a
vector into a scalar_to_vector.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119819 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| b9064bb96458ab48a878e1a7e678cada2e22ab7a |
18-Nov-2010 |
Duncan Sands <baldrick@free.fr> |
Fix thinko: we must turn select(anyext, sext) into sext(select)
not anyext(select). Spotted by Frits van Bommel.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119739 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| dcfd3a798ffbd5e02d4892eeef562c9124598844 |
18-Nov-2010 |
Duncan Sands <baldrick@free.fr> |
The DAGCombiner was threading select over pairs of extending loads even
if the extension types were not the same. The result was that if you
fed a select with sext and zext loads, as in the testcase, then it
would get turned into a zext (or sext) of the select, which is wrong
in the cases when it should have been an sext (resp. zext). Reported
and diagnosed by Sebastien Deldon.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119728 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| b4ac2858dad1f6e892c8bfe981a6cf32e9a385f8 |
18-Nov-2010 |
Dale Johannesen <dalej@apple.com> |
Do not throw away alignment when generating the DAG for
memset; we may need it to decide between MOVAPS and MOVUPS
later. Adjust a test that was looking for wrong code.
PR 3866 / 8675131.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119605 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 7730318000e8b1b0779eb773c87e29eb9f24d930 |
18-Nov-2010 |
John Thompson <John.Thompson.JTSoftware@gmail.com> |
Bug 8621 fix - pointer cast stripped from inline asm constraint argument.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119590 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| 668ac2fdae69ed358ecf690d6a07428e5a9ee2f7 |
16-Nov-2010 |
Dan Gohman <gohman@apple.com> |
Split pseudo-instruction expansion into a separate pass, to make it
easier to debug, and to avoid complications when the CFG changes
in the middle of the instruction selection process.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119382 91177308-0d34-0410-b5e6-96231b3b80d8
nstrEmitter.cpp
|
| af16f1f936ad883d3b32e8ff59b805a857c59d31 |
12-Nov-2010 |
Andrew Trick <atrick@apple.com> |
typo (4th checkin for one fix)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118913 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| f06202f8e80a4b5ef579712e792cf6c416ece601 |
12-Nov-2010 |
Andrew Trick <atrick@apple.com> |
typo (4th checkin for one fix)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118913 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| 28372aab8ff625730f6c2f7a03549966a093663d |
12-Nov-2010 |
Andrew Trick <atrick@apple.com> |
Fixes PR8287: SD scheduling time. The fix is a failsafe that prevents
catastrophic compilation time in the event of unreasonable LLVM
IR. Code quality is a separate issue--someone upstream needs to do a
better job of reducing to llvm.memcpy. If the situation can be reproduced with
any supported frontend, then it will be a separate bug.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118904 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| de91f3c5eb3d6dc222e62f2e6ea2597674c41a84 |
12-Nov-2010 |
Andrew Trick <atrick@apple.com> |
Fixes PR8287: SD scheduling time. The fix is a failsafe that prevents
catastrophic compilation time in the event of unreasonable LLVM
IR. Code quality is a separate issue--someone upstream needs to do a
better job of reducing to llvm.memcpy. If the situation can be reproduced with
any supported frontend, then it will be a separate bug.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118904 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| 80b5f9e065b7c7699aa72e8cf363693a11299661 |
12-Nov-2010 |
Chris Lattner <sabre@nondot.org> |
tidy up.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118896 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| a29aae7aca6d8b9a9e95238d7e4067d8c16b0079 |
12-Nov-2010 |
Chris Lattner <sabre@nondot.org> |
tidy up.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118896 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| 8e8c477357cdb5ec953ef2b28b5f0882809751b5 |
11-Nov-2010 |
Dan Gohman <gohman@apple.com> |
Remove the memmove->memcpy optimization from CodeGen. MemCpyOpt does this.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118789 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| efb8a9d0c2c6be209c6e34f4249ff14fc232bf9f |
11-Nov-2010 |
Dan Gohman <gohman@apple.com> |
Remove the memmove->memcpy optimization from CodeGen. MemCpyOpt does this.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118789 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| 8793b9f59a676704580e09a948999409bf8dfdaa |
09-Nov-2010 |
Dan Gohman <gohman@apple.com> |
Fix DAGCombiner to avoid folding a sext-in-reg or similar through a shl
in order to fold it into a load.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118471 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 6a559cd6959bef28d20acef2129e5510bcc12bb8 |
09-Nov-2010 |
Dan Gohman <gohman@apple.com> |
Fix DAGCombiner to avoid folding a sext-in-reg or similar through a shl
in order to fold it into a load.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118471 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 2ee498cb2d9226159c070685625c552a2cfdeeca |
09-Nov-2010 |
Dale Johannesen <dalej@apple.com> |
Fix an inline asm pasto from 117667; was preventing
{i64, i64} from matching i128.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118465 91177308-0d34-0410-b5e6-96231b3b80d8
argetLowering.cpp
|
| 71365d3774a6c02f3f198fbf08a56e4b6346bbcc |
09-Nov-2010 |
Dale Johannesen <dalej@apple.com> |
Fix an inline asm pasto from 117667; was preventing
{i64, i64} from matching i128.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118465 91177308-0d34-0410-b5e6-96231b3b80d8
argetLowering.cpp
|
| fb480f9e57c29ac68528e933cfafd23cf596ed24 |
05-Nov-2010 |
Duncan Sands <baldrick@free.fr> |
When passing a parameter using the 'byval' mechanism, inline code needs to be used
to perform the copy, which may be of lots of memory [*]. It would be good if the
fall-back code generated something reasonable, i.e. did the copy in a loop, rather
than vast numbers of loads and stores. Add a note about this. Currently target
specific code seems to always kick in so this is more of a theoretical issue rather
than a practical one now that X86 has been fixed.
[*] It's amazing how often people pass mega-byte long arrays by copy...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118275 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 69300a2f47541a32cf453c857b2a6075c0c65632 |
05-Nov-2010 |
Duncan Sands <baldrick@free.fr> |
When passing a parameter using the 'byval' mechanism, inline code needs to be used
to perform the copy, which may be of lots of memory [*]. It would be good if the
fall-back code generated something reasonable, i.e. did the copy in a loop, rather
than vast numbers of loads and stores. Add a note about this. Currently target
specific code seems to always kick in so this is more of a theoretical issue rather
than a practical one now that X86 has been fixed.
[*] It's amazing how often people pass mega-byte long arrays by copy...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118275 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 611dc907031cf99666a4b39a3c0e34a6152c8554 |
03-Nov-2010 |
Eric Christopher <echristo@apple.com> |
Just return undef for invalid masks or elts, and since we're doing that,
just do it earlier too.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118195 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| d81f17acb4f2d755759a4d8a83a71a98ade0edd3 |
03-Nov-2010 |
Eric Christopher <echristo@apple.com> |
Just return undef for invalid masks or elts, and since we're doing that,
just do it earlier too.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118195 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 465b5af7980d8ee7cdf82694791b2fb9748b4684 |
03-Nov-2010 |
Duncan Sands <baldrick@free.fr> |
Simplify uses of MVT and EVT. An MVT can be compared directly
with a SimpleValueType, while an EVT supports equality and
inequality comparisons with SimpleValueType.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118169 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
electionDAGISel.cpp
|
| cdfad36b401be6fc709ea4051f9de58e1a30bcc9 |
03-Nov-2010 |
Duncan Sands <baldrick@free.fr> |
Simplify uses of MVT and EVT. An MVT can be compared directly
with a SimpleValueType, while an EVT supports equality and
inequality comparisons with SimpleValueType.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118169 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
electionDAGISel.cpp
|
| 08903968f7100c2693a113b25b86d2ff39f81b5a |
03-Nov-2010 |
Duncan Sands <baldrick@free.fr> |
Inside the calling convention logic LocVT is always a simple
value type, so there is no point in passing it around using
an EVT. Use the simpler MVT everywhere. Rather than trying
to propagate this information maximally in all the code that
using the calling convention stuff, I chose to do a mainly
low impact change instead.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118167 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| 1440e8b918d7116c3587cb95f4f7ac7a0a0b65ad |
03-Nov-2010 |
Duncan Sands <baldrick@free.fr> |
Inside the calling convention logic LocVT is always a simple
value type, so there is no point in passing it around using
an EVT. Use the simpler MVT everywhere. Rather than trying
to propagate this information maximally in all the code that
using the calling convention stuff, I chose to do a mainly
low impact change instead.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118167 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| 99257956e5562c6d206fa64bced563657519262d |
03-Nov-2010 |
Eric Christopher <echristo@apple.com> |
If we have an undef mask our Elt will be -1 for our access, handle
this by using an undef as a pointer.
Fixes rdar://8625016
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118164 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| caebdd44f3a2c89457f09d0fa45a998c912235d2 |
03-Nov-2010 |
Eric Christopher <echristo@apple.com> |
If we have an undef mask our Elt will be -1 for our access, handle
this by using an undef as a pointer.
Fixes rdar://8625016
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118164 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 89ca5c05b852db9dc2cb47573b5442af019b49b8 |
03-Nov-2010 |
Dan Gohman <gohman@apple.com> |
Fix DAGCombiner to avoid going into an infinite loop when it
encounters (and:i64 (shl:i64 (load:i64), 1), 0xffffffff).
This fixes rdar://8606584.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118143 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 394d6298bcf89a75b51c8314a6705f6984e46b49 |
03-Nov-2010 |
Dan Gohman <gohman@apple.com> |
Fix DAGCombiner to avoid going into an infinite loop when it
encounters (and:i64 (shl:i64 (load:i64), 1), 0xffffffff).
This fixes rdar://8606584.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118143 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 6c35fb1a67dd7e4c71d1a3da6406908ab323577a |
03-Nov-2010 |
Evan Cheng <evan.cheng@apple.com> |
Two sets of changes. Sorry they are intermingled.
1. Fix pre-ra scheduler so it doesn't try to push instructions above calls to
"optimize for latency". Call instructions don't have the right latency and
this is more likely to use introduce spills.
2. Fix if-converter cost function. For ARM, it should use instruction latencies,
not # of micro-ops since multi-latency instructions is completely executed
even when the predicate is false. Also, some instruction will be "slower"
when they are predicated due to the register def becoming implicit input.
rdar://8598427
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118135 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGRRList.cpp
cheduleDAGSDNodes.cpp
|
| 8239daf7c83a65a189c352cce3191cdc3bbfe151 |
03-Nov-2010 |
Evan Cheng <evan.cheng@apple.com> |
Two sets of changes. Sorry they are intermingled.
1. Fix pre-ra scheduler so it doesn't try to push instructions above calls to
"optimize for latency". Call instructions don't have the right latency and
this is more likely to use introduce spills.
2. Fix if-converter cost function. For ARM, it should use instruction latencies,
not # of micro-ops since multi-latency instructions is completely executed
even when the predicate is false. Also, some instruction will be "slower"
when they are predicated due to the register def becoming implicit input.
rdar://8598427
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118135 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGRRList.cpp
cheduleDAGSDNodes.cpp
|
| c2a8bdee8fc89aa5ab3166f2346566b8152d63eb |
02-Nov-2010 |
Devang Patel <dpatel@apple.com> |
If value map does not have register for an argument then try to find frame index before giving up.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118022 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| 8bc9ef77b7e9910fbeb40725dfa49d793158db51 |
02-Nov-2010 |
Devang Patel <dpatel@apple.com> |
If value map does not have register for an argument then try to find frame index before giving up.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118022 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| 42e67b32ecb01210f2137605f2dcde3c2e139edf |
02-Nov-2010 |
Devang Patel <dpatel@apple.com> |
Use frameindex, if available, as a last resort to emit debug info for a parameter.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118020 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| a90b305af910f0cbfa0c6934a2034a2a0444e715 |
02-Nov-2010 |
Devang Patel <dpatel@apple.com> |
Use frameindex, if available, as a last resort to emit debug info for a parameter.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118020 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| 8f21e25ac5ae43066b25d3f99b889e4adb4a9abb |
30-Oct-2010 |
Bob Wilson <bob.wilson@apple.com> |
Remove DAG combiner patch to fold vector splats. Instcombiner does it now.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117720 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 46455096bea2b6c81bb4b0226701524d2a9eb242 |
30-Oct-2010 |
Bob Wilson <bob.wilson@apple.com> |
Remove DAG combiner patch to fold vector splats. Instcombiner does it now.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117720 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| d9818d9f3d989f528a4ae03fa3f3a826a066c9b7 |
29-Oct-2010 |
Evan Cheng <evan.cheng@apple.com> |
Avoiding overly aggressive latency scheduling. If the two nodes share an
operand and one of them has a single use that is a live out copy, favor the
one that is live out. Otherwise it will be difficult to eliminate the copy
if the instruction is a loop induction variable update. e.g.
BB:
sub r1, r3, #1
str r0, [r2, r3]
mov r3, r1
cmp
bne BB
=>
BB:
str r0, [r2, r3]
sub r3, r3, #1
cmp
bne BB
This fixed the recent 256.bzip2 regression.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117675 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGRRList.cpp
cheduleDAGSDNodes.cpp
|
| 089751535d6e9adf65842e2ca5867bf9a70e1e95 |
29-Oct-2010 |
Evan Cheng <evan.cheng@apple.com> |
Avoiding overly aggressive latency scheduling. If the two nodes share an
operand and one of them has a single use that is a live out copy, favor the
one that is live out. Otherwise it will be difficult to eliminate the copy
if the instruction is a loop induction variable update. e.g.
BB:
sub r1, r3, #1
str r0, [r2, r3]
mov r3, r1
cmp
bne BB
=>
BB:
str r0, [r2, r3]
sub r3, r3, #1
cmp
bne BB
This fixed the recent 256.bzip2 regression.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117675 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGRRList.cpp
cheduleDAGSDNodes.cpp
|
| baaadc0c041f03553dd0a1b3327395480c3dd7c7 |
29-Oct-2010 |
John Thompson <john.thompson.jtsoftware@gmail.com> |
Inline asm multiple alternative constraints development phase 2 - improved basic logic, added initial platform support.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117667 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
argetLowering.cpp
|
| 44ab89eb376af838d1123293a79975aede501464 |
29-Oct-2010 |
John Thompson <John.Thompson.JTSoftware@gmail.com> |
Inline asm multiple alternative constraints development phase 2 - improved basic logic, added initial platform support.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117667 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
argetLowering.cpp
|
| 3cf5450b1ac2e37f338f33a9e8abb8673441846e |
28-Oct-2010 |
Bob Wilson <bob.wilson@apple.com> |
Teach the DAG combiner to fold a splat of a splat. Radar 8597790.
Also do some minor refactoring to reduce indentation.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117558 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 0f1db1a6c64bb6661f15be1eab21645a0cbcccd8 |
28-Oct-2010 |
Bob Wilson <bob.wilson@apple.com> |
Teach the DAG combiner to fold a splat of a splat. Radar 8597790.
Also do some minor refactoring to reduce indentation.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117558 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 1c84f66defee7f096924b517f08b401a6d88054d |
28-Oct-2010 |
Evan Cheng <evan.cheng@apple.com> |
Re-commit 117518 and 117519 now that ARM MC test failures are out of the way.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117531 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGSDNodes.cpp
|
| 7e2fe9150f905167f6685c9730911c2abc08293c |
28-Oct-2010 |
Evan Cheng <evan.cheng@apple.com> |
Re-commit 117518 and 117519 now that ARM MC test failures are out of the way.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117531 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGSDNodes.cpp
|
| 9c25d0a6067d2770fb86a0a0ffeb4ac57a2f6c1d |
28-Oct-2010 |
Evan Cheng <evan.cheng@apple.com> |
Revert 117518 and 117519 for now. They changed scheduling and cause MC tests to fail. Ugh.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117520 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGSDNodes.cpp
|
| 9e08ee5d16b596078e20787f0b5f36121f099333 |
28-Oct-2010 |
Evan Cheng <evan.cheng@apple.com> |
Revert 117518 and 117519 for now. They changed scheduling and cause MC tests to fail. Ugh.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117520 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGSDNodes.cpp
|
| 5b4191a28efa79bfcafb5c083859818b2ddeb1b8 |
28-Oct-2010 |
Evan Cheng <evan.cheng@apple.com> |
Fix a major bug in operand latency computation. The use index must be adjusted
by the number of defs first for it to match the instruction itinerary.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117518 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGSDNodes.cpp
|
| 7c88cdcc3ba49101fa119ec3b403e9980934384e |
28-Oct-2010 |
Evan Cheng <evan.cheng@apple.com> |
Fix a major bug in operand latency computation. The use index must be adjusted
by the number of defs first for it to match the instruction itinerary.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117518 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGSDNodes.cpp
|
| 5e2285d6011dcb7959e10b089d3aad9a36d14e59 |
27-Oct-2010 |
Dale Johannesen <dalej@apple.com> |
Use a MemIntrinsicSDNode for ISD::PREFETCH, which touches
memory, so a MachineMemOperand is useful (not propagated
into the MachineInstr yet). No functional change except
for dump output.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117413 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
electionDAGBuilder.cpp
|
| 1de4aa904e9672abfc2e755d798c926d324e2d36 |
27-Oct-2010 |
Dale Johannesen <dalej@apple.com> |
Use a MemIntrinsicSDNode for ISD::PREFETCH, which touches
memory, so a MachineMemOperand is useful (not propagated
into the MachineInstr yet). No functional change except
for dump output.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117413 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
electionDAGBuilder.cpp
|
| 753af1190ed5ae9f03af48cbc30876fa6b2d5018 |
27-Oct-2010 |
Devang Patel <dpatel@apple.com> |
Assign source ordering to nodes created for StoreInst.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117404 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| 7e13efad388f86a4adcb48ec164ee0ba154d0296 |
27-Oct-2010 |
Devang Patel <dpatel@apple.com> |
Assign source ordering to nodes created for StoreInst.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117404 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| 4402af69903becaeb7204583a5e202c1766d6608 |
26-Oct-2010 |
Nick Lewycky <nicholas@mxc.ca> |
For statistics that are only used in functions declared in !NDEBUG, wrap the
declarations in !NDEBUG to avoid -Wunused-variable warnings. Patch by
Matt Beaumont-Gay!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117345 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| a568d66512759f93e0d37af7c8f905603dd27449 |
26-Oct-2010 |
Nick Lewycky <nicholas@mxc.ca> |
For statistics that are only used in functions declared in !NDEBUG, wrap the
declarations in !NDEBUG to avoid -Wunused-variable warnings. Patch by
Matt Beaumont-Gay!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117345 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 78c8a43c53ec1d5b24ef10debd7ea5a8ac808a3c |
25-Oct-2010 |
Devang Patel <dpatel@apple.com> |
Simplify.
Do not count use of sdisel for single call instruction.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117316 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| df8370bd70c228036f887a3f500ad3e79bc657b9 |
25-Oct-2010 |
Devang Patel <dpatel@apple.com> |
Simplify.
Do not count use of sdisel for single call instruction.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117316 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| f2712cab4244d9110fa224a715137f73ce685544 |
25-Oct-2010 |
Devang Patel <dpatel@apple.com> |
Add counters to count basic blocks and machine basic blocks with out of order line number info.
Add counters to count how many basic blocks are entirely selected by fastisel.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117310 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 948f7d0216cbd847a68fc6aaf391f01816a02494 |
25-Oct-2010 |
Devang Patel <dpatel@apple.com> |
Add counters to count basic blocks and machine basic blocks with out of order line number info.
Add counters to count how many basic blocks are entirely selected by fastisel.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117310 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| a70d37154f528d30af1c320fd2888974e949dac4 |
23-Oct-2010 |
Chandler Carruth <chandlerc@gmail.com> |
Move the remaining attribute macros to systematic names based on the attribute
name and prefixed with 'LLVM_'.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117203 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 19e57025d458d3cb50804fd821fd89b868a819bd |
23-Oct-2010 |
Chandler Carruth <chandlerc@gmail.com> |
Move the remaining attribute macros to systematic names based on the attribute
name and prefixed with 'LLVM_'.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117203 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| fdade011ee008347f1add68d49c21d9aeda55aa0 |
21-Oct-2010 |
Michael J. Spencer <bigcheesegs@gmail.com> |
X86: Base _fltused on the FunctionType of the called value instead of the potentially null "CalledFunction". Thanks Duncan!
This is needed for indirect calls.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117061 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| 391b43bf33b77cb73966c9582d5b3fdfe0c38e80 |
21-Oct-2010 |
Michael J. Spencer <bigcheesegs@gmail.com> |
X86: Base _fltused on the FunctionType of the called value instead of the potentially null "CalledFunction". Thanks Duncan!
This is needed for indirect calls.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117061 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| 70037772a28c8d26598598863423af0067f5013a |
21-Oct-2010 |
Michael J. Spencer <bigcheesegs@gmail.com> |
CodeGen-Windows: Only emit _fltused if a VarArg function is called with floating point args.
This should be the minimum set of functions that could possibly need it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116978 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| dd0a00a6e377b11c3c122e111da3d1f53f13756d |
21-Oct-2010 |
Michael J. Spencer <bigcheesegs@gmail.com> |
CodeGen-Windows: Only emit _fltused if a VarArg function is called with floating point args.
This should be the minimum set of functions that could possibly need it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116978 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| c848d55f2163367981aff9c1c9ad55df8da09724 |
20-Oct-2010 |
Dale Johannesen <dalej@apple.com> |
Remove Synthesizable from the Type system; as MMX vector
types are no longer Legal on X86, we don't need it.
No functional change. 8499854.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116947 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeVectorTypes.cpp
argetLowering.cpp
|
| e93d99cf0742eebab859022e4cfdcf03cb9d5dfa |
20-Oct-2010 |
Dale Johannesen <dalej@apple.com> |
Remove Synthesizable from the Type system; as MMX vector
types are no longer Legal on X86, we don't need it.
No functional change. 8499854.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116947 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeVectorTypes.cpp
argetLowering.cpp
|
| 228c8d1ff62ec211a56d9af228c272e56bc7ad96 |
20-Oct-2010 |
Dan Gohman <gohman@apple.com> |
Make CodeGen TBAA-aware.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116890 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
electionDAG.cpp
electionDAGBuilder.cpp
|
| f96e4bd2a3b11928af75fb7472288930d16fec0b |
20-Oct-2010 |
Dan Gohman <gohman@apple.com> |
Make CodeGen TBAA-aware.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116890 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
electionDAG.cpp
electionDAGBuilder.cpp
|
| 06c918d2981b0b470eb4e25642150303264381e8 |
20-Oct-2010 |
Jim Grosbach <grosbach@apple.com> |
Add a pre-dispatch SjLj EH hook on the unwind edge for targets to do any
setup they require. Use this for ARM/Darwin to rematerialize the base
pointer from the frame pointer when required. rdar://8564268
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116879 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
electionDAG.cpp
electionDAGBuilder.cpp
|
| e4ad387a5a88dae20f0f7578e55170bbc8eee2a9 |
20-Oct-2010 |
Jim Grosbach <grosbach@apple.com> |
Add a pre-dispatch SjLj EH hook on the unwind edge for targets to do any
setup they require. Use this for ARM/Darwin to rematerialize the base
pointer from the frame pointer when required. rdar://8564268
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116879 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
electionDAG.cpp
electionDAGBuilder.cpp
|
| a65d6a686e6ad865c61aec70c5bdfb30bf6f5b22 |
19-Oct-2010 |
Owen Anderson <resistor@mac.com> |
Get rid of static constructors for pass registration. Instead, every pass exposes an initializeMyPassFunction(), which
must be called in the pass's constructor. This function uses static dependency declarations to recursively initialize
the pass's dependencies.
Clients that only create passes through the createFooPass() APIs will require no changes. Clients that want to use the
CommandLine options for passes will need to manually call the appropriate initialization functions in PassInitialization.h
before parsing commandline arguments.
I have tested this with all standard configurations of clang and llvm-gcc on Darwin. It is possible that there are problems
with the static dependencies that will only be visible with non-standard options. If you encounter any crash in pass
registration/creation, please send the testcase to me directly.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116820 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 081c34b725980f995be9080eaec24cd3dfaaf065 |
19-Oct-2010 |
Owen Anderson <resistor@mac.com> |
Get rid of static constructors for pass registration. Instead, every pass exposes an initializeMyPassFunction(), which
must be called in the pass's constructor. This function uses static dependency declarations to recursively initialize
the pass's dependencies.
Clients that only create passes through the createFooPass() APIs will require no changes. Clients that want to use the
CommandLine options for passes will need to manually call the appropriate initialization functions in PassInitialization.h
before parsing commandline arguments.
I have tested this with all standard configurations of clang and llvm-gcc on Darwin. It is possible that there are problems
with the static dependencies that will only be visible with non-standard options. If you encounter any crash in pass
registration/creation, please send the testcase to me directly.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116820 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 37deb66d836b1a36f49f07a21cd4062bea9cfa18 |
16-Oct-2010 |
Michael J. Spencer <bigcheesegs@gmail.com> |
X86-Windows: Emit an undefined global __fltused symbol when targeting Windows
if any floating point arguments are passed to an external function.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116665 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| 84ac4d5a2a8fd0e6f95ec46088c0ca7bb63423ac |
16-Oct-2010 |
Michael J. Spencer <bigcheesegs@gmail.com> |
X86-Windows: Emit an undefined global __fltused symbol when targeting Windows
if any floating point arguments are passed to an external function.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116665 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| a79b3988ab901603b9ca933449d0ba29f9209113 |
16-Oct-2010 |
Michael J. Spencer <bigcheesegs@gmail.com> |
Whitespace!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116664 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| e70c526d59e92048c89281d1b7011af0b1d9ee95 |
16-Oct-2010 |
Michael J. Spencer <bigcheesegs@gmail.com> |
Whitespace!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116664 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| 39e98bb80322a4f0aec6fae3892750240891f386 |
10-Oct-2010 |
Chris Lattner <sabre@nondot.org> |
fix the default va_arg expansion (in the realignment case) to not implicitly
truncate the stack pointer to 32-bits on a 64-bit machine.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116169 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 07e3a38c78d2788e05d716e7fa552b9449c87c33 |
10-Oct-2010 |
Chris Lattner <sabre@nondot.org> |
fix the default va_arg expansion (in the realignment case) to not implicitly
truncate the stack pointer to 32-bits on a 64-bit machine.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116169 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 19deef36944f6a5dddb7ab874e997f72edd24fd6 |
06-Oct-2010 |
Dan Gohman <gohman@apple.com> |
ComputeLinearIndex doesn't need its TLI argument.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115792 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| 0dadb15927b912c98918e8a9e7466af77062149f |
06-Oct-2010 |
Dan Gohman <gohman@apple.com> |
ComputeLinearIndex doesn't need its TLI argument.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115792 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| 5cb06cba2dffe2a72ba3fcc947b0c265232355c8 |
06-Oct-2010 |
Evan Cheng <evan.cheng@apple.com> |
- Add TargetInstrInfo::getOperandLatency() to compute operand latencies. This
allow target to correctly compute latency for cases where static scheduling
itineraries isn't sufficient. e.g. variable_ops instructions such as
ARM::ldm.
This also allows target without scheduling itineraries to compute operand
latencies. e.g. X86 can return (approximated) latencies for high latency
instructions such as division.
- Compute operand latencies for those defined by load multiple instructions,
e.g. ldm and those used by store multiple instructions, e.g. stm.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115755 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGSDNodes.cpp
|
| a0792de66c8364d47b0a688c7f408efb7b10f31b |
06-Oct-2010 |
Evan Cheng <evan.cheng@apple.com> |
- Add TargetInstrInfo::getOperandLatency() to compute operand latencies. This
allow target to correctly compute latency for cases where static scheduling
itineraries isn't sufficient. e.g. variable_ops instructions such as
ARM::ldm.
This also allows target without scheduling itineraries to compute operand
latencies. e.g. X86 can return (approximated) latencies for high latency
instructions such as division.
- Compute operand latencies for those defined by load multiple instructions,
e.g. ldm and those used by store multiple instructions, e.g. stm.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115755 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGSDNodes.cpp
|
| 5ecfab6436cffabe6e039b8c9e090b3b4ca05a46 |
05-Oct-2010 |
Owen Anderson <resistor@mac.com> |
Use a more efficient lowering of uint64_t --> float that can take advantage of hardware signed integer conversion without
having to do a double cast (uint64_t --> double --> float). This is based on the algorithm from compiler_rt's __floatundisf
for X86-64.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115634 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 3a9e7690ba99c27d9b09fa8e61fb9f7ba01364c9 |
05-Oct-2010 |
Owen Anderson <resistor@mac.com> |
Use a more efficient lowering of uint64_t --> float that can take advantage of hardware signed integer conversion without
having to do a double cast (uint64_t --> double --> float). This is based on the algorithm from compiler_rt's __floatundisf
for X86-64.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115634 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 566eafd5f5365332578134b3a801b1c27e085678 |
05-Oct-2010 |
Evan Cheng <evan.cheng@apple.com> |
This DAG combine BRCOND transformation can look pass truncate of the operand:
// %a = ...
// %b = and i32 %a, 2
// %c = srl i32 %b, 1
// brcond i32 %c ...
//
// into
//
// %a = ...
// %b = and i32 %a, 2
// %c = setcc eq %b, 0
// brcond %c ...
Make sure it restores local variable N1, which corresponds to the condition operand if it fails to match.
This apparently breaks TCE but since that backend isn't in the tree I don't have a test for it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115571 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 2a135ae53057ef7d0e9123d450b958d0d59d8ccc |
05-Oct-2010 |
Evan Cheng <evan.cheng@apple.com> |
This DAG combine BRCOND transformation can look pass truncate of the operand:
// %a = ...
// %b = and i32 %a, 2
// %c = srl i32 %b, 1
// brcond i32 %c ...
//
// into
//
// %a = ...
// %b = and i32 %a, 2
// %c = setcc eq %b, 0
// brcond %c ...
Make sure it restores local variable N1, which corresponds to the condition operand if it fails to match.
This apparently breaks TCE but since that backend isn't in the tree I don't have a test for it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115571 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| f41fcf7f3cfa5530922837d91b409469ca91915c |
01-Oct-2010 |
Devang Patel <dpatel@apple.com> |
Fix code gen crash reported in PR 8235. We still lose debug info for the unused argument here. This is a known limitation recorded debuginfo-tests/trunk/dbg-declare2.ll function 'f6' test case.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115323 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| 27f46cd6397c456df6f6f22a46752e64c0954fca |
01-Oct-2010 |
Devang Patel <dpatel@apple.com> |
Fix code gen crash reported in PR 8235. We still lose debug info for the unused argument here. This is a known limitation recorded debuginfo-tests/trunk/dbg-declare2.ll function 'f6' test case.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115323 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| d3cc98112ac03df4b15d59ad339d4860a13e10ea |
01-Oct-2010 |
Gabor Greif <ggreif@gmail.com> |
typo
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115310 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| fb4032f4223bfec5a1f76f13c501ea333f7af55f |
01-Oct-2010 |
Gabor Greif <ggreif@gmail.com> |
typo
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115310 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| 393d45094c3cb00a8651c7ff3332aa7034c488d4 |
01-Oct-2010 |
Chris Lattner <sabre@nondot.org> |
fix typo
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115300 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| 6bf263b4a2837161f827dbd711957d0e3ffa16e2 |
01-Oct-2010 |
Chris Lattner <sabre@nondot.org> |
fix typo
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115300 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| dd75196ded16ee38a03ad2b04e5d1e0d0849bce9 |
01-Oct-2010 |
Chris Lattner <sabre@nondot.org> |
fix rdar://8494845 + PR8244 - a miscompile exposed by my patch in r101350
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115294 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 2831a194954cb4a79049e8a666d246a9a1662b92 |
01-Oct-2010 |
Chris Lattner <sabre@nondot.org> |
fix rdar://8494845 + PR8244 - a miscompile exposed by my patch in r101350
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115294 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| c48ef0d1a2817f312353d3e2cd4ebfbe6c8046c7 |
01-Oct-2010 |
Dale Johannesen <dalej@apple.com> |
Massive rewrite of MMX:
The x86_mmx type is used for MMX intrinsics, parameters and
return values where these use MMX registers, and is also
supported in load, store, and bitcast.
Only the above operations generate MMX instructions, and optimizations
do not operate on or produce MMX intrinsics.
MMX-sized vectors <2 x i32> etc. are lowered to XMM or split into
smaller pieces. Optimizations may occur on these forms and the
result casted back to x86_mmx, provided the result feeds into a
previous existing x86_mmx operation.
The point of all this is prevent optimizations from introducing
MMX operations, which is unsafe due to the EMMS problem.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115243 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| 0488fb649a56b7fc89a5814df5308813f9e5a85d |
01-Oct-2010 |
Dale Johannesen <dalej@apple.com> |
Massive rewrite of MMX:
The x86_mmx type is used for MMX intrinsics, parameters and
return values where these use MMX registers, and is also
supported in load, store, and bitcast.
Only the above operations generate MMX instructions, and optimizations
do not operate on or produce MMX intrinsics.
MMX-sized vectors <2 x i32> etc. are lowered to XMM or split into
smaller pieces. Optimizations may occur on these forms and the
result casted back to x86_mmx, provided the result feeds into a
previous existing x86_mmx operation.
The point of all this is prevent optimizations from introducing
MMX operations, which is unsafe due to the EMMS problem.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115243 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| d61fc38e3dd74f01134d21747d8003b3ea64d459 |
30-Sep-2010 |
Jakob Stoklund Olesen <stoklund@2pi.dk> |
When isel is emitting instructions for an x86 target without CMOV, the CFG is
edited during emission.
If the basic block ends in a switch that gets lowered to a jump table, any
phis at the default edge were getting updated wrong. The jump table data
structure keeps a pointer to the header blocks that wasn't getting updated
after the MBB is split.
This bug was exposed on 32-bit Linux when disabling critical edge splitting in
codegen prepare.
The fix is to uipdate stale MBB pointers whenever a block is split during
emission.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115191 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
electionDAGBuilder.h
electionDAGISel.cpp
|
| 2622f4622c36ec9924fb908085154ffdd7174aff |
30-Sep-2010 |
Jakob Stoklund Olesen <stoklund@2pi.dk> |
When isel is emitting instructions for an x86 target without CMOV, the CFG is
edited during emission.
If the basic block ends in a switch that gets lowered to a jump table, any
phis at the default edge were getting updated wrong. The jump table data
structure keeps a pointer to the header blocks that wasn't getting updated
after the MBB is split.
This bug was exposed on 32-bit Linux when disabling critical edge splitting in
codegen prepare.
The fix is to uipdate stale MBB pointers whenever a block is split during
emission.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115191 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
electionDAGBuilder.h
electionDAGISel.cpp
|
| 3ace4f36ced9f788c7e06afd1bc76a41fad8539e |
30-Sep-2010 |
Evan Cheng <evan.cheng@apple.com> |
Model Cortex-a9 load to SUB, RSB, ADD, ADC, SBC, RSC, CMN, MVN, or CMP
pipeline forwarding path.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115098 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGSDNodes.cpp
|
| 3881cb7a5d54c0011b40997adcd742e1c7b91abd |
30-Sep-2010 |
Evan Cheng <evan.cheng@apple.com> |
Model Cortex-a9 load to SUB, RSB, ADD, ADC, SBC, RSC, CMN, MVN, or CMP
pipeline forwarding path.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115098 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGSDNodes.cpp
|
| 335edd1b5f4d10458376cf20cda536fc291f5a10 |
29-Sep-2010 |
Oscar Fuentes <ofv@wanadoo.es> |
Removed a bunch of unnecessary target_link_libraries.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114999 91177308-0d34-0410-b5e6-96231b3b80d8
MakeLists.txt
|
| 3609eb0de2f786ca6917d0388c37c23873dbd247 |
29-Sep-2010 |
Oscar Fuentes <ofv@wanadoo.es> |
Removed a bunch of unnecessary target_link_libraries.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114999 91177308-0d34-0410-b5e6-96231b3b80d8
MakeLists.txt
|
| c9b35a78eefc5ab379de4576c6c92a85b21d84f7 |
27-Sep-2010 |
Dale Johannesen <dalej@apple.com> |
Don't try to make a vector of x86mmx; this won't work,
and asserts.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114843 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeVectorTypes.cpp
|
| 61b20efd9aae99101acf6fd480dee017b702f68b |
27-Sep-2010 |
Dale Johannesen <dalej@apple.com> |
Don't try to make a vector of x86mmx; this won't work,
and asserts.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114843 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeVectorTypes.cpp
|
| dd8bd470de3df62ced32e94af5ec97a97d93418a |
25-Sep-2010 |
John Thompson <john.thompson.jtsoftware@gmail.com> |
Fix for test/CodeGen/PowerPC/2008-10-17-AsmMatchingOperands.ll crash.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114767 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| 54584743f3827c7fd9e247db25cc5cfedaa9bab9 |
25-Sep-2010 |
John Thompson <John.Thompson.JTSoftware@gmail.com> |
Fix for test/CodeGen/PowerPC/2008-10-17-AsmMatchingOperands.ll crash.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114767 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| 02816c04c59ebb4c2fdf4083b8008372aa7d3111 |
24-Sep-2010 |
Michael J. Spencer <bigcheesegs@gmail.com> |
Get rid of pop_macro warnings on MSVC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114750 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| 1f4096054367cab3acab3a74c719ef6d3090606a |
24-Sep-2010 |
Michael J. Spencer <bigcheesegs@gmail.com> |
Get rid of pop_macro warnings on MSVC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114750 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| 710c10d44301184306cf12d041c3532a74b09652 |
23-Sep-2010 |
Evan Cheng <evan.cheng@apple.com> |
Revert 114634 for now since buildbot claim it broke Clang self-hosting. I doubt it but it's possible it's exposing another bug somewhere.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114681 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| 8c1f4329e2f90dea203f3a85a992865e936dea4a |
23-Sep-2010 |
Evan Cheng <evan.cheng@apple.com> |
Revert 114634 for now since buildbot claim it broke Clang self-hosting. I doubt it but it's possible it's exposing another bug somewhere.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114681 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| 8dc5013f982a219b352a67322519614bf8335587 |
23-Sep-2010 |
Oscar Fuentes <ofv@wanadoo.es> |
Fix VS 2010 build.
Patch by Nathan Jeffords!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114661 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| df30bdb3a735a81b4182d80b870bc39846824396 |
23-Sep-2010 |
Oscar Fuentes <ofv@wanadoo.es> |
Fix VS 2010 build.
Patch by Nathan Jeffords!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114661 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 8a5e39c602e7dde61f000e35c13ac5ed4dd57772 |
23-Sep-2010 |
Evan Cheng <evan.cheng@apple.com> |
Follow up to r114630. Do not optimize away unconditional branch following a conditional one.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114634 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| b8db1981b8cdd7cc52a9ad94a12c73e4fb1e8b39 |
23-Sep-2010 |
Evan Cheng <evan.cheng@apple.com> |
Follow up to r114630. Do not optimize away unconditional branch following a conditional one.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114634 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| 9da9e78c618bb33e24833d3859acc1c1f62877b0 |
23-Sep-2010 |
Evan Cheng <evan.cheng@apple.com> |
SDISel should not optimize a unconditional branch following a conditional branch
when the unconditional branch destination is the fallthrough block. The
canonicalization makes it easier to allow optimizations on DAGs to invert
conditional branches. The branch folding pass (and AnalyzeBranch) will clean up
the unnecessary unconditional branches later.
This is one of the patches leading up to disabling codegen prepare critical edge
splitting.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114630 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| 266a99d161069071f32c7c09dded481fd573a82e |
23-Sep-2010 |
Evan Cheng <evan.cheng@apple.com> |
SDISel should not optimize a unconditional branch following a conditional branch
when the unconditional branch destination is the fallthrough block. The
canonicalization makes it easier to allow optimizations on DAGs to invert
conditional branches. The branch folding pass (and AnalyzeBranch) will clean up
the unnecessary unconditional branches later.
This is one of the patches leading up to disabling codegen prepare critical edge
splitting.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114630 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| 44a62c61355a29a89e20a61d4003fbee218ccf71 |
23-Sep-2010 |
Owen Anderson <resistor@mac.com> |
A select between a constant and zero, when fed by a bit test, can be efficiently
lowered using a series of shifts.
Fixes <rdar://problem/8285015>.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114599 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| ed1088afb51189efff02886891c4e25a5a5fb5f9 |
23-Sep-2010 |
Owen Anderson <resistor@mac.com> |
A select between a constant and zero, when fed by a bit test, can be efficiently
lowered using a series of shifts.
Fixes <rdar://problem/8285015>.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114599 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| bb688953d97948619af60e560c70720abaddbe1f |
22-Sep-2010 |
John Thompson <john.thompson.jtsoftware@gmail.com> |
Fixed pr20314-2.c failure, added E, F, p constraint letters.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114490 91177308-0d34-0410-b5e6-96231b3b80d8
argetLowering.cpp
|
| 67aff164c039765e3ec19e5a31659250c8427dfb |
22-Sep-2010 |
John Thompson <John.Thompson.JTSoftware@gmail.com> |
Fixed pr20314-2.c failure, added E, F, p constraint letters.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114490 91177308-0d34-0410-b5e6-96231b3b80d8
argetLowering.cpp
|
| d206fb899ae94a41c3f4d216d830fb926f455a97 |
22-Sep-2010 |
Chris Lattner <sabre@nondot.org> |
Rework passing parent pointers into complexpatterns, I forgot
that complex patterns are matched after the entire pattern has
a structural match, therefore the NodeStack isn't in a useful
state when the actual call to the matcher happens.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114489 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| d847bc20b89679279e75412ddc51dc1d299da942 |
22-Sep-2010 |
Chris Lattner <sabre@nondot.org> |
Rework passing parent pointers into complexpatterns, I forgot
that complex patterns are matched after the entire pattern has
a structural match, therefore the NodeStack isn't in a useful
state when the actual call to the matcher happens.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114489 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 0e02bf10fd684b8ae14c4ec3cc3f7a84029907a5 |
21-Sep-2010 |
Devang Patel <dpatel@apple.com> |
If only user of a vreg is an copy instruction to export copy of vreg out of current basic block then insert DBG_VALUE so that debug value of the variable is also transfered to new vreg.
Testcase is in r114476.
This fixes radar 8412415.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114478 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 44cfe14445bcdd591d4f2ed59fe73582360bd8c9 |
21-Sep-2010 |
Devang Patel <dpatel@apple.com> |
If only user of a vreg is an copy instruction to export copy of vreg out of current basic block then insert DBG_VALUE so that debug value of the variable is also transfered to new vreg.
Testcase is in r114476.
This fixes radar 8412415.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114478 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 9d2f6e46a050d0971187dc86e5e72ed25924f039 |
21-Sep-2010 |
Chris Lattner <sabre@nondot.org> |
correct this logic.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114474 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 77bd88cda5e007c6f4e042fc6b6104c9ae62083b |
21-Sep-2010 |
Chris Lattner <sabre@nondot.org> |
correct this logic.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114474 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 33fca6d2189b11e577bbf82618930f7e8d3344ef |
21-Sep-2010 |
Owen Anderson <resistor@mac.com> |
Reimplement r114460 in target-independent DAGCombine rather than target-dependent, by using
the predicate to discover the number of sign bits. Enhance X86's target lowering to provide
a useful response to this query.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114473 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| bc146b0a4dcee601459eee943b4133d3cf63f1dd |
21-Sep-2010 |
Owen Anderson <resistor@mac.com> |
Reimplement r114460 in target-independent DAGCombine rather than target-dependent, by using
the predicate to discover the number of sign bits. Enhance X86's target lowering to provide
a useful response to this query.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114473 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 6dedbda40f263c0fe0278bc1cf4e8ed7ee716f58 |
21-Sep-2010 |
Chris Lattner <sabre@nondot.org> |
just like they can opt into getting the root of the pattern being
matched, allow ComplexPatterns to opt into getting the parent node
of the operand being matched.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114472 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 78d3af47f532d67611e7d625b505fa832d713a26 |
21-Sep-2010 |
Chris Lattner <sabre@nondot.org> |
just like they can opt into getting the root of the pattern being
matched, allow ComplexPatterns to opt into getting the parent node
of the operand being matched.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114472 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 12eab7b1e9b3e5c594607c3968e21f3b2e78f98c |
21-Sep-2010 |
Chris Lattner <sabre@nondot.org> |
finish pushing MachinePointerInfo through selectiondags. At this point,
I think I've audited all uses, so it should be dependable for address spaces,
and the pointer+offset info should also be accurate when there.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114464 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
electionDAGBuilder.cpp
|
| 84bd98ac7b9f9eaa0c4259b510847481a45844a7 |
21-Sep-2010 |
Chris Lattner <sabre@nondot.org> |
finish pushing MachinePointerInfo through selectiondags. At this point,
I think I've audited all uses, so it should be dependable for address spaces,
and the pointer+offset info should also be accurate when there.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114464 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
electionDAGBuilder.cpp
|
| e42e5550ec99a5fb294e5106034585c57777aa80 |
21-Sep-2010 |
Chris Lattner <sabre@nondot.org> |
update a bunch of code to use the MachinePointerInfo version of getStore.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114461 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
egalizeDAG.cpp
egalizeFloatTypes.cpp
egalizeTypesGeneric.cpp
egalizeVectorTypes.cpp
|
| 6229d0acb8f395552131a7015a5d1e7b2bae2111 |
21-Sep-2010 |
Chris Lattner <sabre@nondot.org> |
update a bunch of code to use the MachinePointerInfo version of getStore.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114461 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
egalizeDAG.cpp
egalizeFloatTypes.cpp
egalizeTypesGeneric.cpp
egalizeVectorTypes.cpp
|
| daa44a53c9445429820033b1f74f00d5ac6a338f |
21-Sep-2010 |
Bob Wilson <bob.wilson@apple.com> |
Define the TargetLowering::getTgtMemIntrinsic hook for ARM so that NEON load
and store intrinsics are represented with MemIntrinsicSDNodes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114454 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| 65ffec49f73d1f8856211b107712c58cc9636b78 |
21-Sep-2010 |
Bob Wilson <bob.wilson@apple.com> |
Define the TargetLowering::getTgtMemIntrinsic hook for ARM so that NEON load
and store intrinsics are represented with MemIntrinsicSDNodes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114454 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| 0cedbb841abd75afb300857fcc16e3e46e86d78e |
21-Sep-2010 |
Chris Lattner <sabre@nondot.org> |
eliminate an old SelectionDAG::getTruncStore method, propagating
MachinePointerInfo around more.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114452 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
egalizeDAG.cpp
egalizeFloatTypes.cpp
egalizeVectorTypes.cpp
electionDAG.cpp
|
| da2d8e1032eb4c2fefb1f647d7877910b9483835 |
21-Sep-2010 |
Chris Lattner <sabre@nondot.org> |
eliminate an old SelectionDAG::getTruncStore method, propagating
MachinePointerInfo around more.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114452 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
egalizeDAG.cpp
egalizeFloatTypes.cpp
egalizeVectorTypes.cpp
electionDAG.cpp
|
| baeb05c7716a497cf25b4a81f0f7ebe02d0100e7 |
21-Sep-2010 |
Chris Lattner <sabre@nondot.org> |
eliminate last SelectionDAG::getLoad old entrypoint, on to stores.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114450 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeFloatTypes.cpp
egalizeVectorTypes.cpp
electionDAG.cpp
|
| 5cd9391a089d146d8a18ade602769502e5a8d36f |
21-Sep-2010 |
Chris Lattner <sabre@nondot.org> |
eliminate last SelectionDAG::getLoad old entrypoint, on to stores.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114450 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeFloatTypes.cpp
egalizeVectorTypes.cpp
electionDAG.cpp
|
| 741d79a807a8197f2a21a58315da3620dfc57620 |
21-Sep-2010 |
Chris Lattner <sabre@nondot.org> |
fix the code that infers SV info to be correct when dealing
with an indexed load/store that has an offset in the index.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114449 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| d0e139fa7409a009c416f2b0bcf4665f23ddca83 |
21-Sep-2010 |
Chris Lattner <sabre@nondot.org> |
fix the code that infers SV info to be correct when dealing
with an indexed load/store that has an offset in the index.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114449 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| d303da66e894ca276164414ceb99b18eb9e1dae0 |
21-Sep-2010 |
Chris Lattner <sabre@nondot.org> |
propagate MachinePointerInfo through various uses of the old
SelectionDAG::getExtLoad overload, and eliminate it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114446 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
egalizeDAG.cpp
egalizeFloatTypes.cpp
egalizeIntegerTypes.cpp
egalizeVectorTypes.cpp
electionDAG.cpp
|
| 3d6ccfba314ed38e4506dae2781a060e9a3e07ac |
21-Sep-2010 |
Chris Lattner <sabre@nondot.org> |
propagate MachinePointerInfo through various uses of the old
SelectionDAG::getExtLoad overload, and eliminate it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114446 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
egalizeDAG.cpp
egalizeFloatTypes.cpp
egalizeIntegerTypes.cpp
egalizeVectorTypes.cpp
electionDAG.cpp
|
| df7096f01384c4e8a8ac9e42c2b784e54c53da8e |
21-Sep-2010 |
Chris Lattner <sabre@nondot.org> |
continue MachinePointerInfo'izing, eliminating use of one of the old
getLoad overloads.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114443 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
egalizeIntegerTypes.cpp
egalizeTypes.cpp
egalizeTypesGeneric.cpp
egalizeVectorTypes.cpp
electionDAG.cpp
electionDAGBuilder.cpp
argetLowering.cpp
|
| ecf42c4720aba6ee315d0166045c54187ac2de4d |
21-Sep-2010 |
Chris Lattner <sabre@nondot.org> |
continue MachinePointerInfo'izing, eliminating use of one of the old
getLoad overloads.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114443 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
egalizeIntegerTypes.cpp
egalizeTypes.cpp
egalizeTypesGeneric.cpp
egalizeVectorTypes.cpp
electionDAG.cpp
electionDAGBuilder.cpp
argetLowering.cpp
|
| 3b1bbc9cf9270fefc34fb1eef14c593a82e0f2a5 |
21-Sep-2010 |
Chris Lattner <sabre@nondot.org> |
convert dagcombine off the old form of getLoad. This fixes several bugs
with SVOffset computation.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114442 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| fa45901eaaecbad3b95042518d7991ad0e5c08a0 |
21-Sep-2010 |
Chris Lattner <sabre@nondot.org> |
convert dagcombine off the old form of getLoad. This fixes several bugs
with SVOffset computation.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114442 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| a20f1a3ded7a7398133760d91262d683a5e91a37 |
21-Sep-2010 |
Chris Lattner <sabre@nondot.org> |
simplify DAGCombiner::SimplifySelectOps step #2/2.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114437 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| f16580665589584d3249d8a3c4dd4ea90dfb9e47 |
21-Sep-2010 |
Chris Lattner <sabre@nondot.org> |
simplify DAGCombiner::SimplifySelectOps step #2/2.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114437 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 6e69083eb6da924271c88d4e70cc879d8cc36978 |
21-Sep-2010 |
Chris Lattner <sabre@nondot.org> |
substantially reduce indentation and simplify DAGCombiner::SimplifySelectOps.
no functionality change (step #1)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114436 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 1806161a0bfbc3fa57aa90470d467425ffaf05bb |
21-Sep-2010 |
Chris Lattner <sabre@nondot.org> |
substantially reduce indentation and simplify DAGCombiner::SimplifySelectOps.
no functionality change (step #1)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114436 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| c966e21cbfd398386008492059e48d19616f3137 |
21-Sep-2010 |
Chris Lattner <sabre@nondot.org> |
a few more trivial updates. This fixes PerformInsertVectorEltInMemory to not
pass a completely incorrect SrcValue, which would result in a miscompile with
combiner-aa.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114411 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
egalizeDAG.cpp
|
| 85ca1066328639119f94c47a83b698c48b84ebb0 |
21-Sep-2010 |
Chris Lattner <sabre@nondot.org> |
a few more trivial updates. This fixes PerformInsertVectorEltInMemory to not
pass a completely incorrect SrcValue, which would result in a miscompile with
combiner-aa.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114411 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
egalizeDAG.cpp
|
| c515938bc6c609b156fbf3609a2849091489282d |
21-Sep-2010 |
Chris Lattner <sabre@nondot.org> |
reimplement memcpy/memmove/memset lowering to use MachinePointerInfo
instead of srcvalue/offset pairs. This corrects SV info for mem
operations whose size is > 32-bits.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114401 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
electionDAGBuilder.cpp
|
| e72f2027e9116c55a5b39ac72732df8d6c45d37c |
21-Sep-2010 |
Chris Lattner <sabre@nondot.org> |
reimplement memcpy/memmove/memset lowering to use MachinePointerInfo
instead of srcvalue/offset pairs. This corrects SV info for mem
operations whose size is > 32-bits.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114401 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
electionDAGBuilder.cpp
|
| f060d7344826f0180d64256dceb3bf84f10a48d2 |
21-Sep-2010 |
Chris Lattner <sabre@nondot.org> |
add overloads for SelectionDAG::getLoad, getStore, getTruncStore that take a
MachinePointerInfo. Among other virtues, this doesn't silently truncate the
svoffset to 32-bits.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114399 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 5c5cb2a1717f8e30b1849d7ec1cf269bc5d66877 |
21-Sep-2010 |
Chris Lattner <sabre@nondot.org> |
add overloads for SelectionDAG::getLoad, getStore, getTruncStore that take a
MachinePointerInfo. Among other virtues, this doesn't silently truncate the
svoffset to 32-bits.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114399 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 3f9c0f65fddf9316246754ecfb8548bb6eccb4da |
21-Sep-2010 |
Chris Lattner <sabre@nondot.org> |
simplify interface to SelectionDAG::getMemIntrinsicNode, making it take a MachinePointerInfo
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114397 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
electionDAGBuilder.cpp
|
| e9ba5dd236f48708a00bd3bb0519148f943cc897 |
21-Sep-2010 |
Chris Lattner <sabre@nondot.org> |
simplify interface to SelectionDAG::getMemIntrinsicNode, making it take a MachinePointerInfo
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114397 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
electionDAGBuilder.cpp
|
| acf2f7663c1ba10f6e73c435938bc33a0c0f8fb2 |
21-Sep-2010 |
Chris Lattner <sabre@nondot.org> |
chagne interface to SelectionDAG::getAtomic to take a MachinePointerInfo,
eliminating some weird "infer a frame address" logic which was dead.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114396 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
electionDAGBuilder.cpp
|
| 60bddc8bcd787be645d2f3b64117fee884270e6a |
21-Sep-2010 |
Chris Lattner <sabre@nondot.org> |
chagne interface to SelectionDAG::getAtomic to take a MachinePointerInfo,
eliminating some weird "infer a frame address" logic which was dead.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114396 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
electionDAGBuilder.cpp
|
| db4a2576c3eb914fef435ae87903ac520a5cc614 |
21-Sep-2010 |
Chris Lattner <sabre@nondot.org> |
don't implicitly drop the offset of a machinememoperand when legalizing atomics.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114395 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeIntegerTypes.cpp
|
| 0531356e4da1451b1b0b9e8c85365c2a58ca8282 |
21-Sep-2010 |
Chris Lattner <sabre@nondot.org> |
don't implicitly drop the offset of a machinememoperand when legalizing atomics.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114395 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeIntegerTypes.cpp
|
| 60d6def76a7bf3b4ed56adb81f6ce228e41730e5 |
21-Sep-2010 |
Chris Lattner <sabre@nondot.org> |
force clients of MachineFunction::getMachineMemOperand to provide a
MachinePointerInfo, propagating the type out a level of API. Remove
the old MachineFunction::getMachineMemOperand impl.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114393 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 93a95ae8a9d8eb19dc0d90281473be2fb1c05a17 |
21-Sep-2010 |
Chris Lattner <sabre@nondot.org> |
force clients of MachineFunction::getMachineMemOperand to provide a
MachinePointerInfo, propagating the type out a level of API. Remove
the old MachineFunction::getMachineMemOperand impl.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114393 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 17dadf40cc44f3be7c2e1858b30f112ba46b6016 |
20-Sep-2010 |
Owen Anderson <resistor@mac.com> |
When TCO is turned on, it is possible to end up with aliasing FrameIndex's. Therefore,
CombinerAA cannot assume that different FrameIndex's never alias, but can instead use
MachineFrameInfo to get the actual offsets of these slots and check for actual aliasing.
This fixes CodeGen/X86/2010-02-19-TailCallRetAddrBug.ll and CodeGen/X86/tailcallstack64.ll
when CombinerAA is enabled, modulo a different register allocation sequence.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114348 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 4a9f150926d593b30354db76d8d061fe4c9d124d |
20-Sep-2010 |
Owen Anderson <resistor@mac.com> |
When TCO is turned on, it is possible to end up with aliasing FrameIndex's. Therefore,
CombinerAA cannot assume that different FrameIndex's never alias, but can instead use
MachineFrameInfo to get the actual offsets of these slots and check for actual aliasing.
This fixes CodeGen/X86/2010-02-19-TailCallRetAddrBug.ll and CodeGen/X86/tailcallstack64.ll
when CombinerAA is enabled, modulo a different register allocation sequence.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114348 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| f2bb41caa3cb62ce492c500beaa616d6f05eb11f |
19-Sep-2010 |
Owen Anderson <resistor@mac.com> |
Revert r114312 while I sort out some issues.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114313 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 0dcc8142766b3c55915eb9c2d404bdea6bb0f7dd |
19-Sep-2010 |
Owen Anderson <resistor@mac.com> |
Revert r114312 while I sort out some issues.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114313 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| d6e999d7999fa7c4acd584165b22c72bbab956f0 |
19-Sep-2010 |
Owen Anderson <resistor@mac.com> |
Tentatively enabled DAGCombiner Alias Analysis by default. As far as I know,
r114268 fixed the last of the blockers to enabling it. I will be monitoring
for failures.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114312 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| d910fb2f12782d8636950baaccbf43bd046e828f |
19-Sep-2010 |
Owen Anderson <resistor@mac.com> |
Tentatively enabled DAGCombiner Alias Analysis by default. As far as I know,
r114268 fixed the last of the blockers to enabling it. I will be monitoring
for failures.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114312 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 0f49691f58d39d80fa2270753a21fd61ceb6e1ea |
18-Sep-2010 |
Owen Anderson <resistor@mac.com> |
Invert the logic of reachesChainWithoutSideEffects(). What we want to check is that there is
NO path to the destination containing side effects, not that SOME path contains no side effects.
In practice, this only manifests with CombinerAA enabled, because otherwise the chain has little
to no branching, so "any" is effectively equivalent to "all".
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114268 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 14ac1dd2be4f72ae1e48a1fd1c2f9bedc7f980e2 |
18-Sep-2010 |
Owen Anderson <resistor@mac.com> |
Invert the logic of reachesChainWithoutSideEffects(). What we want to check is that there is
NO path to the destination containing side effects, not that SOME path contains no side effects.
In practice, this only manifests with CombinerAA enabled, because otherwise the chain has little
to no branching, so "any" is effectively equivalent to "all".
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114268 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| f2eeed6b8fffbc8182992e14bb07682abbbae84f |
15-Sep-2010 |
Devang Patel <dpatel@apple.com> |
Check bb to ensure that alloca is in separate basic block.
This fixes funcargs.exp regression reported by gdb testsuite.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113992 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| 27ede1ba6daa893557db477fe3252084fd9f6147 |
15-Sep-2010 |
Devang Patel <dpatel@apple.com> |
Check bb to ensure that alloca is in separate basic block.
This fixes funcargs.exp regression reported by gdb testsuite.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113992 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| 7e7171fe4cacef7122983d5b46000c3ff80dd820 |
15-Sep-2010 |
Devang Patel <dpatel@apple.com> |
If dbg.declare from non-entry block is using alloca from entry block then use offset available in StaticAllocaMap to emit DBG_VALUE. Right now, this has no material impact because varible info also collected using offset table maintained in machine module info.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113967 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| 1397fdc0ab272a6a295149fba0903f65a6d1885e |
15-Sep-2010 |
Devang Patel <dpatel@apple.com> |
If dbg.declare from non-entry block is using alloca from entry block then use offset available in StaticAllocaMap to emit DBG_VALUE. Right now, this has no material impact because varible info also collected using offset table maintained in machine module info.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113967 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| 5ef4652c411701db836c77ffe5a8778400b7b0bc |
14-Sep-2010 |
Devang Patel <dpatel@apple.com> |
Use frame index, if available for byval argument while lowering dbg_declare. Otherwise let getRegForValue() find register for this argument.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113843 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
|
| 6fe75aaaeb6b0587d402228ba291c729a13eb6d7 |
14-Sep-2010 |
Devang Patel <dpatel@apple.com> |
Use frame index, if available for byval argument while lowering dbg_declare. Otherwise let getRegForValue() find register for this argument.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113843 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
|
| f318164d18455fe44fcc9e03329036917f303edc |
14-Sep-2010 |
Michael J. Spencer <bigcheesegs@gmail.com> |
Revert "CMake: Get rid of LLVMLibDeps.cmake and export the libraries normally."
This reverts commit r113632
Conflicts:
cmake/modules/AddLLVM.cmake
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113819 91177308-0d34-0410-b5e6-96231b3b80d8
MakeLists.txt
|
| 3a210e2d302758101ac06946e86027b327c7d0f3 |
14-Sep-2010 |
Michael J. Spencer <bigcheesegs@gmail.com> |
Revert "CMake: Get rid of LLVMLibDeps.cmake and export the libraries normally."
This reverts commit r113632
Conflicts:
cmake/modules/AddLLVM.cmake
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113819 91177308-0d34-0410-b5e6-96231b3b80d8
MakeLists.txt
|
| ec0f8b3e51fa403dc546ea533dfd3e817d6d2873 |
13-Sep-2010 |
Eric Christopher <echristo@apple.com> |
Silence more warnings. Two more unused variables.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113771 91177308-0d34-0410-b5e6-96231b3b80d8
argetLowering.cpp
|
| 1a56e083e7ee7cc05afe02eff40a45858cd9adda |
13-Sep-2010 |
Eric Christopher <echristo@apple.com> |
Silence more warnings. Two more unused variables.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113771 91177308-0d34-0410-b5e6-96231b3b80d8
argetLowering.cpp
|
| f3e8af7f999544ee8a213cb2e03b8d507ca7ce54 |
13-Sep-2010 |
John Thompson <john.thompson.jtsoftware@gmail.com> |
Added skeleton for inline asm multiple alternative constraint support.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113766 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
argetLowering.cpp
|
| eac6e1d0c748afc3d1496be0753ffbe5f5a4279b |
13-Sep-2010 |
John Thompson <John.Thompson.JTSoftware@gmail.com> |
Added skeleton for inline asm multiple alternative constraint support.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113766 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
argetLowering.cpp
|
| a95f589c757c8c857096a07e0d376ca9aaec6c2c |
11-Sep-2010 |
Shih-wei Liao <sliao@google.com> |
Apply changes on LLVM r112364 after merge.
Change-Id: I9688675d46dca0d564206616c40b005669269010
ndroid.mk
|
| da61c1662bd86ea1f7fad601e9966f1b700636c1 |
11-Sep-2010 |
Shih-wei Liao <sliao@google.com> |
Merge commit '69494cf8102cf872e9cb76662e9960be7c112112' into HEAD
Conflicts:
lib/CodeGen/AsmPrinter/AsmPrinter.cpp
lib/Target/ARM/ARMCodeEmitter.cpp
lib/Target/ARM/ARMJITInfo.cpp
lib/Target/ARM/ARMRelocations.h
lib/Transforms/IPO/MergeFunctions.cpp
Change-Id: I23d40983717e072fa49334c1fa54f2cf961476c7
|
| 338c97baad1444a4158a7d99162e0e654f058c43 |
10-Sep-2010 |
Michael J. Spencer <bigcheesegs@gmail.com> |
CMake: Get rid of LLVMLibDeps.cmake and export the libraries normally.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113632 91177308-0d34-0410-b5e6-96231b3b80d8
MakeLists.txt
|
| 4e9c939312ff73bd0c6a6485fd5f97012f5910fa |
10-Sep-2010 |
Michael J. Spencer <bigcheesegs@gmail.com> |
CMake: Get rid of LLVMLibDeps.cmake and export the libraries normally.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113632 91177308-0d34-0410-b5e6-96231b3b80d8
MakeLists.txt
|
| 9b68a42a9d1a03052dfb8cf4e5a9414fcb9c11a6 |
10-Sep-2010 |
Devang Patel <dpatel@apple.com> |
Add DEBUG message.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113614 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
|
| 4bafda9618f9dfa9edc8da08bb3001ef2d1a9b68 |
10-Sep-2010 |
Devang Patel <dpatel@apple.com> |
Add DEBUG message.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113614 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
|
| 0cf9a820e435a74ef93930dcaf8917323f2f99be |
10-Sep-2010 |
Evan Cheng <evan.cheng@apple.com> |
Teach if-converter to be more careful with predicating instructions that would
take multiple cycles to decode.
For the current if-converter clients (actually only ARM), the instructions that
are predicated on false are not nops. They would still take machine cycles to
decode. Micro-coded instructions such as LDM / STM can potentially take multiple
cycles to decode. If-converter should take treat them as non-micro-coded
simple instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113570 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGSDNodes.cpp
cheduleDAGSDNodes.h
|
| 3ef1c8759a20167457eb7fd82ebcaffe7ccaa1d1 |
10-Sep-2010 |
Evan Cheng <evan.cheng@apple.com> |
Teach if-converter to be more careful with predicating instructions that would
take multiple cycles to decode.
For the current if-converter clients (actually only ARM), the instructions that
are predicated on false are not nops. They would still take machine cycles to
decode. Micro-coded instructions such as LDM / STM can potentially take multiple
cycles to decode. If-converter should take treat them as non-micro-coded
simple instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113570 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGSDNodes.cpp
cheduleDAGSDNodes.h
|
| 083b9e18e561b1b7f00a159a6936c7b81e3c8a2b |
05-Sep-2010 |
Chris Lattner <sabre@nondot.org> |
implement rdar://6653118 - fastisel should fold loads where possible.
Since mem2reg isn't run at -O0, we get a ton of reloads from the stack,
for example, before, this code:
int foo(int x, int y, int z) {
return x+y+z;
}
used to compile into:
_foo: ## @foo
subq $12, %rsp
movl %edi, 8(%rsp)
movl %esi, 4(%rsp)
movl %edx, (%rsp)
movl 8(%rsp), %edx
movl 4(%rsp), %esi
addl %edx, %esi
movl (%rsp), %edx
addl %esi, %edx
movl %edx, %eax
addq $12, %rsp
ret
Now we produce:
_foo: ## @foo
subq $12, %rsp
movl %edi, 8(%rsp)
movl %esi, 4(%rsp)
movl %edx, (%rsp)
movl 8(%rsp), %edx
addl 4(%rsp), %edx ## Folded load
addl (%rsp), %edx ## Folded load
movl %edx, %eax
addq $12, %rsp
ret
Fewer instructions and less register use = faster compiles.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113102 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| beac75da3784929aee9f0357fc5cd76d49d6c3d7 |
05-Sep-2010 |
Chris Lattner <sabre@nondot.org> |
implement rdar://6653118 - fastisel should fold loads where possible.
Since mem2reg isn't run at -O0, we get a ton of reloads from the stack,
for example, before, this code:
int foo(int x, int y, int z) {
return x+y+z;
}
used to compile into:
_foo: ## @foo
subq $12, %rsp
movl %edi, 8(%rsp)
movl %esi, 4(%rsp)
movl %edx, (%rsp)
movl 8(%rsp), %edx
movl 4(%rsp), %esi
addl %edx, %esi
movl (%rsp), %edx
addl %esi, %edx
movl %edx, %eax
addq $12, %rsp
ret
Now we produce:
_foo: ## @foo
subq $12, %rsp
movl %edi, 8(%rsp)
movl %esi, 4(%rsp)
movl %edx, (%rsp)
movl 8(%rsp), %edx
addl 4(%rsp), %edx ## Folded load
addl (%rsp), %edx ## Folded load
movl %edx, %eax
addq $12, %rsp
ret
Fewer instructions and less register use = faster compiles.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113102 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| f08ed5c39b8e628e864ea8ec0923267948978a84 |
03-Sep-2010 |
Bob Wilson <bob.wilson@apple.com> |
Add a missing check when legalizing a vector extending load. This doesn't
solve the root problem, but it corrects the bug in the code I added to
support legalizing in the case where the non-extended type is also legal.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112997 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| ef134d02e0036ef981983d4b5e40c678dd241583 |
03-Sep-2010 |
Bob Wilson <bob.wilson@apple.com> |
Add a missing check when legalizing a vector extending load. This doesn't
solve the root problem, but it corrects the bug in the code I added to
support legalizing in the case where the non-extended type is also legal.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112997 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| e3e1a0ba26187dd48cfb7942c4b7f1f5fb03d0b2 |
02-Sep-2010 |
Devang Patel <dpatel@apple.com> |
Detect undef value early and save unnecessary NodeMap query.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112864 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| 3f74a116c80b483ffc7c2e6922ff62f0f73d83f5 |
02-Sep-2010 |
Devang Patel <dpatel@apple.com> |
Detect undef value early and save unnecessary NodeMap query.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112864 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| 6f8a8cd3933c07a1431b798599a1e6720bfcda28 |
02-Sep-2010 |
Dan Gohman <gohman@apple.com> |
Don't narrow the load and store in a load+twiddle+store sequence unless
there are clearly no stores between the load and the store. This fixes
this miscompile reported as PR7833.
This breaks the test/CodeGen/X86/narrow_op-2.ll optimization, which is
safe, but awkward to prove safe. Move it to X86's README.txt.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112861 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 24bde5bce192119ee0fc4f94ef8757fd4031e5f6 |
02-Sep-2010 |
Dan Gohman <gohman@apple.com> |
Don't narrow the load and store in a load+twiddle+store sequence unless
there are clearly no stores between the load and the store. This fixes
this miscompile reported as PR7833.
This breaks the test/CodeGen/X86/narrow_op-2.ll optimization, which is
safe, but awkward to prove safe. Move it to X86's README.txt.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112861 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| b8151e3f0ea922dd36032c06f7cb80826e264b82 |
02-Sep-2010 |
Devang Patel <dpatel@apple.com> |
Tidy up.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112858 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| 8e741ed2fa16f46ab586bf3a54526cd9c2338c5b |
02-Sep-2010 |
Devang Patel <dpatel@apple.com> |
Tidy up.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112858 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| 5a4501459d69cd65252c8309612b396f6fa17176 |
01-Sep-2010 |
Devang Patel <dpatel@apple.com> |
Reapply r112623. Included additional check for unused byval argument.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112659 91177308-0d34-0410-b5e6-96231b3b80d8
unctionLoweringInfo.cpp
electionDAGBuilder.cpp
|
| 0b48eade42022c929fcf0f2afcffdf849c5bd05a |
01-Sep-2010 |
Devang Patel <dpatel@apple.com> |
Reapply r112623. Included additional check for unused byval argument.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112659 91177308-0d34-0410-b5e6-96231b3b80d8
unctionLoweringInfo.cpp
electionDAGBuilder.cpp
|
| 4c8d7cf0fac920dd08c875da8a23c6e19893519d |
31-Aug-2010 |
Devang Patel <dpatel@apple.com> |
Revert r112623. It is causing self host build failures.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112631 91177308-0d34-0410-b5e6-96231b3b80d8
unctionLoweringInfo.cpp
electionDAGBuilder.cpp
|
| 81b79b5fa808730d102cdc4b60a52e602d425de5 |
31-Aug-2010 |
Devang Patel <dpatel@apple.com> |
Revert r112623. It is causing self host build failures.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112631 91177308-0d34-0410-b5e6-96231b3b80d8
unctionLoweringInfo.cpp
electionDAGBuilder.cpp
|
| 873476d74cb9d9cee1c8a9e27fbab4b539aab7f7 |
31-Aug-2010 |
Devang Patel <dpatel@apple.com> |
Remember byval argument's frame index during argument lowering and use this info to emit debug info.
Fixes Radar 8367011.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112623 91177308-0d34-0410-b5e6-96231b3b80d8
unctionLoweringInfo.cpp
electionDAGBuilder.cpp
|
| 8480c2e314f6c01638ea16f32149417848352085 |
31-Aug-2010 |
Devang Patel <dpatel@apple.com> |
Remember byval argument's frame index during argument lowering and use this info to emit debug info.
Fixes Radar 8367011.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112623 91177308-0d34-0410-b5e6-96231b3b80d8
unctionLoweringInfo.cpp
electionDAGBuilder.cpp
|
| 8c624d6e3c75b1870dd063cc3f1248ee8660952b |
31-Aug-2010 |
Devang Patel <dpatel@apple.com> |
Offset is not always unsigned number.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112584 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
electionDAGBuilder.h
|
| 34ca5ed79717c9a3dad2bf5823d3747aaedbc74a |
31-Aug-2010 |
Devang Patel <dpatel@apple.com> |
Offset is not always unsigned number.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112584 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
electionDAGBuilder.h
|
| 8f1f127fe95447d9dd159ba435d2a6ac98d5f583 |
31-Aug-2010 |
Bruno Cardoso Lopes <bruno.cardoso@gmail.com> |
zap unused method. x86 is the only user and already has a more powerfull version
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112571 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 2e46e78c53011ddbc0587135c09b39077beb0c1e |
31-Aug-2010 |
Bruno Cardoso Lopes <bruno.cardoso@gmail.com> |
zap unused method. x86 is the only user and already has a more powerfull version
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112571 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 55035e2b84e590ddcc1929056a926ff96f7aeb51 |
30-Aug-2010 |
Bill Wendling <isanbard@gmail.com> |
Revert r112461. It was failing on PPC...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112463 91177308-0d34-0410-b5e6-96231b3b80d8
nstrEmitter.cpp
|
| c040719a153df8202f10054f33c9ac581b1c6c57 |
30-Aug-2010 |
Bill Wendling <isanbard@gmail.com> |
Revert r112461. It was failing on PPC...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112463 91177308-0d34-0410-b5e6-96231b3b80d8
nstrEmitter.cpp
|
| a82a973314080d4ed8b8fa6d9c893151d11a920f |
30-Aug-2010 |
Bill Wendling <isanbard@gmail.com> |
When adding a register, we should mark it as "def" if it can optionally define
said (physical) register.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112461 91177308-0d34-0410-b5e6-96231b3b80d8
nstrEmitter.cpp
|
| 25b141912ce4f5a4b8a0684e870569ece21facde |
30-Aug-2010 |
Bill Wendling <isanbard@gmail.com> |
When adding a register, we should mark it as "def" if it can optionally define
said (physical) register.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112461 91177308-0d34-0410-b5e6-96231b3b80d8
nstrEmitter.cpp
|
| 32497e1a4b44bbad671605bf3d382c6dc4b92c23 |
28-Aug-2010 |
Chris Lattner <sabre@nondot.org> |
remove unions from LLVM IR. They are severely buggy and not
being actively maintained, improved, or extended.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112356 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| 61c70e98ac3c7504d31dd9bc81c4e9cb998e9984 |
28-Aug-2010 |
Chris Lattner <sabre@nondot.org> |
remove unions from LLVM IR. They are severely buggy and not
being actively maintained, improved, or extended.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112356 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| 0544cc94b83456b0b17a5570cbbb0fdc84fd9e5a |
28-Aug-2010 |
Dan Gohman <gohman@apple.com> |
Completely disable tail calls when fast-isel is enabled, as fast-isel
doesn't currently support dealing with this.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112341 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| badcda4afa35bf86ce2e6e77ca20f1ce2365b549 |
28-Aug-2010 |
Dan Gohman <gohman@apple.com> |
Completely disable tail calls when fast-isel is enabled, as fast-isel
doesn't currently support dealing with this.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112341 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| d55573912a3e36ee90080419798234afdca34d62 |
28-Aug-2010 |
Dan Gohman <gohman@apple.com> |
Trim a #include.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112340 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.h
|
| 7258df71fa21483f03d3804164c57f32cfc22e01 |
28-Aug-2010 |
Dan Gohman <gohman@apple.com> |
Trim a #include.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112340 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.h
|
| 8cd320aab9573cbba94c7bcfdd33b43306fff024 |
28-Aug-2010 |
Devang Patel <dpatel@apple.com> |
Simplify.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112305 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| 0991dfbbe048a88c0f85618f8c9a21d11b34d69c |
28-Aug-2010 |
Devang Patel <dpatel@apple.com> |
Simplify.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112305 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| 91145b6e85eb303b0ef97d05c07370a8ad54e15e |
27-Aug-2010 |
Devang Patel <dpatel@apple.com> |
Revert r112213. It is not needed.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112242 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
electionDAGBuilder.h
|
| 4cf81c47fe060fad290ea6b95388d1da7fad105a |
27-Aug-2010 |
Devang Patel <dpatel@apple.com> |
Revert r112213. It is not needed.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112242 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
electionDAGBuilder.h
|
| 96c576bb77ff9536aa90375a586d3fb18cf6c674 |
27-Aug-2010 |
Devang Patel <dpatel@apple.com> |
If node is not available then use FuncInfo.ValueMap to emit debug info for byval parameter.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112238 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| 6cd467bd0e31df2decdf7081868810ef822b64d3 |
27-Aug-2010 |
Devang Patel <dpatel@apple.com> |
If node is not available then use FuncInfo.ValueMap to emit debug info for byval parameter.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112238 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| 098e40cd1cb2e502cd9672aecf75cedde5713c35 |
26-Aug-2010 |
Devang Patel <dpatel@apple.com> |
Speculatively revert r112207.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112216 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| e130d78ee193b2dcd49b61d52a9946a4e70b696f |
26-Aug-2010 |
Devang Patel <dpatel@apple.com> |
Speculatively revert r112207.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112216 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| 8c1d17c6b913e070b090c1badba0e56600276dff |
26-Aug-2010 |
Devang Patel <dpatel@apple.com> |
80 col.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112215 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| 8f09beacb172b9f66ec561e6c31e164e217aafda |
26-Aug-2010 |
Devang Patel <dpatel@apple.com> |
80 col.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112215 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| f30282df0ae5c0fc9c4437b573e8521064682482 |
26-Aug-2010 |
Devang Patel <dpatel@apple.com> |
Update DanglingDebugInfo so that it can be used to track llvm.dbg.declare also.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112213 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
electionDAGBuilder.h
|
| f2ec7ae2799c149e4eccfb5a3632f9ba8c6dae7b |
26-Aug-2010 |
Devang Patel <dpatel@apple.com> |
Update DanglingDebugInfo so that it can be used to track llvm.dbg.declare also.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112213 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
electionDAGBuilder.h
|
| 74e08708274a5e2580a784f6ce34e1a554725af9 |
26-Aug-2010 |
Devang Patel <dpatel@apple.com> |
Donot forget to resolve dangling debug info in a case where virtual register, used for a value, is initialized after a dbg intrinsic is seen.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112207 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| 9d0796a0e06e3b44bbdd696259f80066c285d9c3 |
26-Aug-2010 |
Devang Patel <dpatel@apple.com> |
Donot forget to resolve dangling debug info in a case where virtual register, used for a value, is initialized after a dbg intrinsic is seen.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112207 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| 478795fe95f4e51688771dc5af3a228cc156f803 |
26-Aug-2010 |
Chris Lattner <sabre@nondot.org> |
Add a hackaround for PR7993 which is causing failures on x86 builders that lack sse2.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112175 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 341fa09a3c842e8a0df3510d3f9af186ede976c9 |
26-Aug-2010 |
Chris Lattner <sabre@nondot.org> |
Add a hackaround for PR7993 which is causing failures on x86 builders that lack sse2.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112175 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| af14747dd46c49b16ea83b0564a880c03cb59175 |
26-Aug-2010 |
Chris Lattner <sabre@nondot.org> |
implement SplitVecOp_CONCAT_VECTORS, fixing the included testcase with SSE1.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112171 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeTypes.h
egalizeVectorTypes.cpp
|
| 8306968c147d5861d8a53fba86ac0fbf5c050b84 |
26-Aug-2010 |
Chris Lattner <sabre@nondot.org> |
implement SplitVecOp_CONCAT_VECTORS, fixing the included testcase with SSE1.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112171 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeTypes.h
egalizeVectorTypes.cpp
|
| e520d5af029fb92f712d19da721887d82e66c219 |
26-Aug-2010 |
Chris Lattner <sabre@nondot.org> |
zap dead code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112155 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
electionDAGISel.cpp
|
| 6dabd9dba013173460c0b95e6b41b5776c66270d |
26-Aug-2010 |
Chris Lattner <sabre@nondot.org> |
zap dead code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112155 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
electionDAGISel.cpp
|
| 6bf2478e21ef37dd8e11229ca8605998927e699f |
26-Aug-2010 |
Chris Lattner <sabre@nondot.org> |
remove some llvmcontext arguments that are now dead post-refactoring.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112104 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
egalizeTypes.h
argetLowering.cpp
|
| aafe626c7fa9f99150cccd27d0151a2cf7c8c00b |
26-Aug-2010 |
Chris Lattner <sabre@nondot.org> |
remove some llvmcontext arguments that are now dead post-refactoring.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112104 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
egalizeTypes.h
argetLowering.cpp
|
| 2491aa0b844f5271cd5076d543890a38bc69e1f1 |
26-Aug-2010 |
Chris Lattner <sabre@nondot.org> |
Change handling of illegal vector types to widen when possible instead of
expanding: e.g. <2 x float> -> <4 x float> instead of -> 2 floats. This
affects two places in the code: handling cross block values and handling
function return and arguments. Since vectors are already widened by
legalizetypes, this gives us much better code and unblocks x86-64 abi
and SPU abi work.
For example, this (which is a silly example of a cross-block value):
define <4 x float> @test2(<4 x float> %A) nounwind {
%B = shufflevector <4 x float> %A, <4 x float> undef, <2 x i32> <i32 0, i32 1>
%C = fadd <2 x float> %B, %B
br label %BB
BB:
%D = fadd <2 x float> %C, %C
%E = shufflevector <2 x float> %D, <2 x float> undef, <4 x i32> <i32 0, i32 1, i32 undef, i32 undef>
ret <4 x float> %E
}
Now compiles into:
_test2: ## @test2
## BB#0:
addps %xmm0, %xmm0
addps %xmm0, %xmm0
ret
previously it compiled into:
_test2: ## @test2
## BB#0:
addps %xmm0, %xmm0
pshufd $1, %xmm0, %xmm1
## kill: XMM0<def> XMM0<kill> XMM0<def>
insertps $0, %xmm0, %xmm0
insertps $16, %xmm1, %xmm0
addps %xmm0, %xmm0
ret
This implements rdar://8230384
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112101 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
argetLowering.cpp
|
| e6f7c267df11a44679c35dec79787fbc276839fb |
26-Aug-2010 |
Chris Lattner <sabre@nondot.org> |
Change handling of illegal vector types to widen when possible instead of
expanding: e.g. <2 x float> -> <4 x float> instead of -> 2 floats. This
affects two places in the code: handling cross block values and handling
function return and arguments. Since vectors are already widened by
legalizetypes, this gives us much better code and unblocks x86-64 abi
and SPU abi work.
For example, this (which is a silly example of a cross-block value):
define <4 x float> @test2(<4 x float> %A) nounwind {
%B = shufflevector <4 x float> %A, <4 x float> undef, <2 x i32> <i32 0, i32 1>
%C = fadd <2 x float> %B, %B
br label %BB
BB:
%D = fadd <2 x float> %C, %C
%E = shufflevector <2 x float> %D, <2 x float> undef, <4 x i32> <i32 0, i32 1, i32 undef, i32 undef>
ret <4 x float> %E
}
Now compiles into:
_test2: ## @test2
## BB#0:
addps %xmm0, %xmm0
addps %xmm0, %xmm0
ret
previously it compiled into:
_test2: ## @test2
## BB#0:
addps %xmm0, %xmm0
pshufd $1, %xmm0, %xmm1
## kill: XMM0<def> XMM0<kill> XMM0<def>
insertps $0, %xmm0, %xmm0
insertps $16, %xmm1, %xmm0
addps %xmm0, %xmm0
ret
This implements rdar://8230384
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112101 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
argetLowering.cpp
|
| 91241aeb46c08cac626a34b830528542e7695029 |
25-Aug-2010 |
Devang Patel <dpatel@apple.com> |
Fix comment.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112086 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.h
|
| ab43add695179614927766269df08b22c157f931 |
25-Aug-2010 |
Devang Patel <dpatel@apple.com> |
Fix comment.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112086 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.h
|
| 21b5abbdec6ca9a100f47a1f1d5cf4a0b27313a0 |
25-Aug-2010 |
Devang Patel <dpatel@apple.com> |
Remove dead argument.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112085 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
electionDAGBuilder.h
|
| 78a06e50b74e5390e3d77bd80d0393191820c7c2 |
25-Aug-2010 |
Devang Patel <dpatel@apple.com> |
Remove dead argument.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112085 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
electionDAGBuilder.h
|
| 7464440b04ed805cebb42de4f1ce80bd64bbe389 |
25-Aug-2010 |
Chris Lattner <sabre@nondot.org> |
split the vector case of getCopyFromParts out to its own function,
no functionality change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@111994 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| 3ac18845098b34b7b76c6fa4b95cfde7752ff8ad |
25-Aug-2010 |
Chris Lattner <sabre@nondot.org> |
split the vector case of getCopyFromParts out to its own function,
no functionality change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@111994 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| 611bf0c193bf00ddbb5f16661606360cff9a0a3e |
25-Aug-2010 |
Chris Lattner <sabre@nondot.org> |
split the vector case out of getCopyToParts into its own function. No
functionality change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@111990 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| a13b860f4de136687cb219cdcd93d3e18a8c239e |
25-Aug-2010 |
Chris Lattner <sabre@nondot.org> |
split the vector case out of getCopyToParts into its own function. No
functionality change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@111990 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| 078216e4b3110e3e057d6e64a8dbddcf36bc26c8 |
25-Aug-2010 |
Chris Lattner <sabre@nondot.org> |
tidy up, reduce indentation
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@111982 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeTypes.h
egalizeVectorTypes.cpp
|
| 549fa267efb00944a418a507d07101bae2f72b51 |
25-Aug-2010 |
Chris Lattner <sabre@nondot.org> |
tidy up, reduce indentation
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@111982 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeTypes.h
egalizeVectorTypes.cpp
|
| b43bbc4ae6f61c27a77e2500133d936b05c97c12 |
23-Aug-2010 |
Chandler Carruth <chandlerc@gmail.com> |
Fix some GCC warnings by providing a virtual destructor in the base of a class
hierarchy with virtual methods and using llvm_unreachable to properly indicate
unreachable states which would otherwise leave variables uninitialized.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@111803 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 54f616304240fcbc41ca9b9b2af38eeb1171e8a8 |
23-Aug-2010 |
Chandler Carruth <chandlerc@gmail.com> |
Fix some GCC warnings by providing a virtual destructor in the base of a class
hierarchy with virtual methods and using llvm_unreachable to properly indicate
unreachable states which would otherwise leave variables uninitialized.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@111803 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 28c238c9ded0b5c91e122c94b5a02d76a5245c11 |
20-Aug-2010 |
Ying Wang <wangying@google.com> |
Fix sim build.
Note that this only makes the sim build green, but the built images won't work for sure:
No libbcc.so, which depends on something else that can not build in sim mode.
No x86 bitcode is generated as well, I believe.
Change-Id: Idca8378427196622ac77cd56a38c6a160f03ba22
ndroid.mk
|
| fd0e13305739afae7a77b7f5cf81f73767bdd49b |
20-Aug-2010 |
Bob Wilson <bob.wilson@apple.com> |
If the target says that an extending load is not legal, regardless of whether
it involves specific floating-point types, legalize should expand an
extending load to a non-extending load followed by a separate extend operation.
For example, we currently expand SEXTLOAD to EXTLOAD+SIGN_EXTEND_INREG (and
assert that EXTLOAD should always be supported). Now we can expand that to
LOAD+SIGN_EXTEND. This is needed to allow vector SIGN_EXTEND and ZERO_EXTEND
to be used for NEON.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@111586 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 63241f79e667feafb10936b7c2cf03c33f55dd01 |
20-Aug-2010 |
Bob Wilson <bob.wilson@apple.com> |
If the target says that an extending load is not legal, regardless of whether
it involves specific floating-point types, legalize should expand an
extending load to a non-extending load followed by a separate extend operation.
For example, we currently expand SEXTLOAD to EXTLOAD+SIGN_EXTEND_INREG (and
assert that EXTLOAD should always be supported). Now we can expand that to
LOAD+SIGN_EXTEND. This is needed to allow vector SIGN_EXTEND and ZERO_EXTEND
to be used for NEON.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@111586 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 19e1b6f4fb4b1955beac6ec65864881350e0aa09 |
18-Aug-2010 |
Dale Johannesen <dalej@apple.com> |
Make fast scheduler handle asm clobbers correctly.
PR 7882. Follows suggestion by Amaury Pouly, thanks.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@111306 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGFast.cpp
|
| 6cf64a631a1522c137a1fcf88858ea1336822abf |
18-Aug-2010 |
Dale Johannesen <dalej@apple.com> |
Make fast scheduler handle asm clobbers correctly.
PR 7882. Follows suggestion by Amaury Pouly, thanks.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@111306 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGFast.cpp
|
| 0d8a0bb360888100e62c1e47c73b2a45a866f776 |
17-Aug-2010 |
Eric Christopher <echristo@apple.com> |
Fix typo.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@111223 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
|
| 44a2c3476bd15e03f294bae1b50016851f214f8d |
17-Aug-2010 |
Eric Christopher <echristo@apple.com> |
Fix typo.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@111223 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
|
| 669db6bf656392e7eef896d9db628560bbe60c94 |
10-Aug-2010 |
Evan Cheng <evan.cheng@apple.com> |
Add missing null check reported by Amaury Pouly.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@110649 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGSDNodes.cpp
|
| c120af45671c75fd1297ac6300c03a6a9e1264da |
10-Aug-2010 |
Evan Cheng <evan.cheng@apple.com> |
Add missing null check reported by Amaury Pouly.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@110649 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGSDNodes.cpp
|
| 7569322765651f19eea0609fb082e6b267d5d2b5 |
06-Aug-2010 |
Owen Anderson <resistor@mac.com> |
Reapply r110396, with fixes to appease the Linux buildbot gods.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@110460 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 90c579de5a383cee278acc3f7e7b9d0a656e6a35 |
06-Aug-2010 |
Owen Anderson <resistor@mac.com> |
Reapply r110396, with fixes to appease the Linux buildbot gods.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@110460 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 619acdc63ab0a47d125dca0591285c8ac4c9ed20 |
06-Aug-2010 |
Owen Anderson <resistor@mac.com> |
Revert r110396 to fix buildbots.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@110410 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 1f74590e9d1b9cf0f1f81a156efea73f76546e05 |
06-Aug-2010 |
Owen Anderson <resistor@mac.com> |
Revert r110396 to fix buildbots.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@110410 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 0e63653ab0d25d579ad99948db606d8723d271dd |
06-Aug-2010 |
Owen Anderson <resistor@mac.com> |
Don't use PassInfo* as a type identifier for passes. Instead, use the address of the static
ID member as the sole unique type identifier. Clean up APIs related to this change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@110396 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 9ccaf53ada99c63737547c0235baeb8454b04e80 |
06-Aug-2010 |
Owen Anderson <resistor@mac.com> |
Don't use PassInfo* as a type identifier for passes. Instead, use the address of the static
ID member as the sole unique type identifier. Clean up APIs related to this change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@110396 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 4fdc101bb5a565923ebd4aef7732cdbc0a586988 |
04-Aug-2010 |
Dan Gohman <gohman@apple.com> |
Eliminate unnecessary empty string literals.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@110183 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGPrinter.cpp
|
| d98af0a5b86425fdc723bb54fc59247c585d63ab |
04-Aug-2010 |
Dan Gohman <gohman@apple.com> |
Eliminate unnecessary empty string literals.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@110183 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGPrinter.cpp
|
| 3951b343e96b52f8707b65b40f1bbdcbcec17950 |
02-Aug-2010 |
Oscar Fuentes <ofv@wanadoo.es> |
Prefix `next' iterator operation with `llvm::'.
Fixes potential ambiguity problems on VS 2010.
Patch by nobled!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@110029 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| ee56c42168f6c4271593f6018c4409b6a5910302 |
02-Aug-2010 |
Oscar Fuentes <ofv@wanadoo.es> |
Prefix `next' iterator operation with `llvm::'.
Fixes potential ambiguity problems on VS 2010.
Patch by nobled!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@110029 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 06a2340b7fcd3f03b591e4e3c505b93b0661e2f6 |
02-Aug-2010 |
Eli Friedman <eli.friedman@gmail.com> |
PR7586: Make sure we don't claim that unknown bits are actually known in the
ISD::AND case of TargetLowering::SimplifyDemandedBits.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@110019 91177308-0d34-0410-b5e6-96231b3b80d8
argetLowering.cpp
|
| 1d17d199a4cd6190fdf82e35c42b617eaae2cd35 |
02-Aug-2010 |
Eli Friedman <eli.friedman@gmail.com> |
PR7586: Make sure we don't claim that unknown bits are actually known in the
ISD::AND case of TargetLowering::SimplifyDemandedBits.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@110019 91177308-0d34-0410-b5e6-96231b3b80d8
argetLowering.cpp
|
| fe1b227c1a71616281beb6dc6981caeafefe13b9 |
30-Jul-2010 |
Eli Friedman <eli.friedman@gmail.com> |
Fix for bug reported by Evzen Muller on llvm-commits: make sure to correctly
check the range of the constant when optimizing a comparison between a
constant and a sign_extend_inreg node.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@109854 91177308-0d34-0410-b5e6-96231b3b80d8
argetLowering.cpp
|
| ad78a88711979aa84a89a32576b615ff13b3de15 |
30-Jul-2010 |
Eli Friedman <eli.friedman@gmail.com> |
Fix for bug reported by Evzen Muller on llvm-commits: make sure to correctly
check the range of the constant when optimizing a comparison between a
constant and a sign_extend_inreg node.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@109854 91177308-0d34-0410-b5e6-96231b3b80d8
argetLowering.cpp
|
| c5725d531800584aed0490f8654dd7dfd8b91203 |
27-Jul-2010 |
Nate Begeman <natebegeman@mac.com> |
Fix a crash in the dag combiner caused by ConstantFoldBIT_CONVERTofBUILD_VECTOR calling itself
recursively and returning a SCALAR_TO_VECTOR node, but assuming the input was always a BUILD_VECTOR.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@109519 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| e0efc216eb94f8f92b85cb4f1af2da9ce2a583fc |
27-Jul-2010 |
Nate Begeman <natebegeman@mac.com> |
Fix a crash in the dag combiner caused by ConstantFoldBIT_CONVERTofBUILD_VECTOR calling itself
recursively and returning a SCALAR_TO_VECTOR node, but assuming the input was always a BUILD_VECTOR.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@109519 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 73570ad9fa08fa18eb3fcf5d0f673236d20f0429 |
27-Jul-2010 |
Bill Wendling <isanbard@gmail.com> |
It's better to have the arrays, which would trigger the creation of stack
protectors, to be near the stack protectors on the stack. Accomplish this by
tagging the stack object with a predicate that indicates that it would trigger
this. In the prolog-epilog inserter, assign these objects to the stack after the
stack protector but before the other objects.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@109481 91177308-0d34-0410-b5e6-96231b3b80d8
unctionLoweringInfo.cpp
|
| dfc2c51d12fd53822279b6e564cdd5cef5c00b46 |
27-Jul-2010 |
Bill Wendling <isanbard@gmail.com> |
It's better to have the arrays, which would trigger the creation of stack
protectors, to be near the stack protectors on the stack. Accomplish this by
tagging the stack object with a predicate that indicates that it would trigger
this. In the prolog-epilog inserter, assign these objects to the stack after the
stack protector but before the other objects.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@109481 91177308-0d34-0410-b5e6-96231b3b80d8
unctionLoweringInfo.cpp
|
| 812c8b97ff7a87b99a59c6e23e7479ddba833999 |
26-Jul-2010 |
Evan Cheng <evan.cheng@apple.com> |
The "excess register pressure" returned by HighRegPressure() is not accurate enough to factor into scheduling priority. Eliminate it and add early exits to speed up scheduling.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@109449 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGRRList.cpp
|
| e0e925efb31ca98c78e53bf52db8529388a0390a |
26-Jul-2010 |
Evan Cheng <evan.cheng@apple.com> |
The "excess register pressure" returned by HighRegPressure() is not accurate enough to factor into scheduling priority. Eliminate it and add early exits to speed up scheduling.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@109449 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGRRList.cpp
|
| 99b93bd70c479f518a0b969a619824eeb7d718f0 |
26-Jul-2010 |
Dan Gohman <gohman@apple.com> |
Handle Values with no value in getCopyFromRegs.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@109415 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| 7da5d3fc657bf434a245d11ad91f22feb86296c5 |
26-Jul-2010 |
Dan Gohman <gohman@apple.com> |
Handle Values with no value in getCopyFromRegs.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@109415 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| dcdaddd04e3b806806b8ab9f042d291eb54264e3 |
26-Jul-2010 |
Duncan Sands <baldrick@free.fr> |
Pacify gcc-4.5 which wrongly thinks that RExcess (passed as the Excess parameter)
may be used uninitialized in the callers of HighRegPressure.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@109393 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGRRList.cpp
|
| b3893b193b294c4dfd37e101e9d796568b28d461 |
26-Jul-2010 |
Duncan Sands <baldrick@free.fr> |
Pacify gcc-4.5 which wrongly thinks that RExcess (passed as the Excess parameter)
may be used uninitialized in the callers of HighRegPressure.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@109393 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGRRList.cpp
|
| b42df31c2d72b3cfe7f04fad4aa3f57790272b95 |
25-Jul-2010 |
Evan Cheng <evan.cheng@apple.com> |
Add comments.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@109383 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGRRList.cpp
|
| e28ed16d2507633893269670d289006f3e0b351e |
25-Jul-2010 |
Evan Cheng <evan.cheng@apple.com> |
Add comments.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@109383 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGRRList.cpp
|
| 2211e5212d5cda6ef616d6afabb662dfec6f27a4 |
25-Jul-2010 |
Bob Wilson <bob.wilson@apple.com> |
Fix crashes when scheduling a CopyToReg node -- getMachineOpcode asserts on
those. Radar 8231572.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@109367 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGRRList.cpp
|
| 3f92f73970862c1926b4c70fe097c979de5f02d0 |
25-Jul-2010 |
Bob Wilson <bob.wilson@apple.com> |
Fix crashes when scheduling a CopyToReg node -- getMachineOpcode asserts on
those. Radar 8231572.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@109367 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGRRList.cpp
|
| 8b3d5e935ad184f81e8bb63cfa02440b55105ecf |
24-Jul-2010 |
Evan Cheng <evan.cheng@apple.com> |
Add an ILP scheduler. This is a register pressure aware scheduler that's
appropriate for targets without detailed instruction iterineries.
The scheduler schedules for increased instruction level parallelism in
low register pressure situation; it schedules to reduce register pressure
when the register pressure becomes high.
On x86_64, this is a win for all tests in CFP2000. It also sped up 256.bzip2
by 16%.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@109300 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGRRList.cpp
electionDAGISel.cpp
|
| 70017e44cdba1946cc478ce1856a3e855a767e28 |
24-Jul-2010 |
Evan Cheng <evan.cheng@apple.com> |
Add an ILP scheduler. This is a register pressure aware scheduler that's
appropriate for targets without detailed instruction iterineries.
The scheduler schedules for increased instruction level parallelism in
low register pressure situation; it schedules to reduce register pressure
when the register pressure becomes high.
On x86_64, this is a win for all tests in CFP2000. It also sped up 256.bzip2
by 16%.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@109300 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGRRList.cpp
electionDAGISel.cpp
|
| 922a4d36f7218b00baed5994960e79f7e977ec56 |
24-Jul-2010 |
Evan Cheng <evan.cheng@apple.com> |
- Allow target to specify when is register pressure "too high". In most cases,
it's too late to start backing off aggressive latency scheduling when most
of the registers are in use so the threshold should be a bit tighter.
- Correctly handle live out's and extract_subreg etc.
- Enable register pressure aware scheduling by default for hybrid scheduler.
For ARM, this is almost always a win on # of instructions. It's runtime
neutral for most of the tests. But for some kernels with high register
pressure it can be a huge win. e.g. 464.h264ref reduced number of spills by
54 and sped up by 20%.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@109279 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGRRList.cpp
|
| 3144687df78731ac4ddbc716a24b951678a73f57 |
24-Jul-2010 |
Evan Cheng <evan.cheng@apple.com> |
- Allow target to specify when is register pressure "too high". In most cases,
it's too late to start backing off aggressive latency scheduling when most
of the registers are in use so the threshold should be a bit tighter.
- Correctly handle live out's and extract_subreg etc.
- Enable register pressure aware scheduling by default for hybrid scheduler.
For ARM, this is almost always a win on # of instructions. It's runtime
neutral for most of the tests. But for some kernels with high register
pressure it can be a huge win. e.g. 464.h264ref reduced number of spills by
54 and sped up by 20%.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@109279 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGRRList.cpp
|
| c034f4c7c0d71d45d583f03845862c9254ed094b |
23-Jul-2010 |
Dan Gohman <gohman@apple.com> |
Use the proper type for shift counts. This fixes a bootstrap error.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@109265 91177308-0d34-0410-b5e6-96231b3b80d8
argetLowering.cpp
|
| cd20c6fb18230f399fc99276fbdee14ce9faf6a1 |
23-Jul-2010 |
Dan Gohman <gohman@apple.com> |
Use the proper type for shift counts. This fixes a bootstrap error.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@109265 91177308-0d34-0410-b5e6-96231b3b80d8
argetLowering.cpp
|
| ee105e255c7e8f3ee27bcc9a089761f9c4518caa |
23-Jul-2010 |
Dan Gohman <gohman@apple.com> |
DAGCombine (shl (anyext x, c)) to (anyext (shl x, c)) if the high bits
are not demanded. This often allows the anyext to be folded away.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@109242 91177308-0d34-0410-b5e6-96231b3b80d8
argetLowering.cpp
|
| a4f4d699ec627e798357929295aecd3d55b8d703 |
23-Jul-2010 |
Dan Gohman <gohman@apple.com> |
DAGCombine (shl (anyext x, c)) to (anyext (shl x, c)) if the high bits
are not demanded. This often allows the anyext to be folded away.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@109242 91177308-0d34-0410-b5e6-96231b3b80d8
argetLowering.cpp
|
| 6c2ecad2a59424d0aaeea21de48181d007f9ba37 |
23-Jul-2010 |
Dan Gohman <gohman@apple.com> |
Make SDNode::dump() print a newline at the end.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@109234 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 7c98283f0ef74a5663c4c4a0938a344b204336fd |
23-Jul-2010 |
Dan Gohman <gohman@apple.com> |
Make SDNode::dump() print a newline at the end.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@109234 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 570139c4551620ce2a666aeea8af04434168b70c |
23-Jul-2010 |
Eric Christopher <echristo@apple.com> |
80-col.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@109205 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeIntegerTypes.cpp
|
| 54e1791e4ba30867bda603acadda77fa85de6aa1 |
23-Jul-2010 |
Eric Christopher <echristo@apple.com> |
80-col.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@109205 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeIntegerTypes.cpp
|
| bbc54b614225d792d47d5d1dc1aa6767f4657f25 |
22-Jul-2010 |
Gabor Greif <ggreif@gmail.com> |
keep in 80 cols
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@109122 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 481c4c07347c40fa666d09f3b31fbe2ca27e2d52 |
22-Jul-2010 |
Gabor Greif <ggreif@gmail.com> |
keep in 80 cols
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@109122 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| e035519df392f87833b9f18e113129f55d90a7b7 |
22-Jul-2010 |
Gabor Greif <ggreif@gmail.com> |
mass elimination of reliance on automatic iterator dereferencing
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@109103 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
electionDAGISel.cpp
|
| 96f1d8ebdd33b3f9bdb3b1163f36072c68599f42 |
22-Jul-2010 |
Gabor Greif <ggreif@gmail.com> |
mass elimination of reliance on automatic iterator dereferencing
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@109103 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
electionDAGISel.cpp
|
| 8765b940b160e86c9d88fadbdef1a4dd8ad98df8 |
22-Jul-2010 |
Evan Cheng <evan.cheng@apple.com> |
Re-apply r109079 with fix.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@109083 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGRRList.cpp
|
| 89ba74d117577f5a1bd62ee209dc2ecb090172e3 |
22-Jul-2010 |
Evan Cheng <evan.cheng@apple.com> |
Re-apply r109079 with fix.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@109083 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGRRList.cpp
|
| 296ec6461ef65312e8384445d96e4857522102b8 |
22-Jul-2010 |
Owen Anderson <resistor@mac.com> |
Revert r109079, which broke a lot of CodeGen tests.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@109082 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGRRList.cpp
|
| 8b9177aee2671568182e1688e1c53f2459038e46 |
22-Jul-2010 |
Owen Anderson <resistor@mac.com> |
Revert r109079, which broke a lot of CodeGen tests.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@109082 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGRRList.cpp
|
| 9588e0ee6727eb09bddb7cbf4bd394dbc5ac2379 |
22-Jul-2010 |
Evan Cheng <evan.cheng@apple.com> |
Initialize RegLimit only when register pressure is being tracked.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@109079 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGRRList.cpp
|
| a4081238aa51eb16a46a2da78438ff476798f34d |
22-Jul-2010 |
Evan Cheng <evan.cheng@apple.com> |
Initialize RegLimit only when register pressure is being tracked.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@109079 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGRRList.cpp
|
| 2408253b0680ef77feed50de7e6743881ccfef6e |
22-Jul-2010 |
Evan Cheng <evan.cheng@apple.com> |
More register pressure aware scheduling work.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@109064 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGRRList.cpp
|
| 4a863e2c75145432fd660ee65e61b578c5e90ac9 |
22-Jul-2010 |
Evan Cheng <evan.cheng@apple.com> |
More register pressure aware scheduling work.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@109064 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGRRList.cpp
|
| 83bd3e6df5274f42bbae9f5f611b373ac61c945c |
21-Jul-2010 |
Evan Cheng <evan.cheng@apple.com> |
Teach bottom up pre-ra scheduler to track register pressure. Work in progress.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108991 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGRRList.cpp
argetLowering.cpp
|
| 4f6b4674be5473319ac5e70c76fd5cb964da2128 |
21-Jul-2010 |
Evan Cheng <evan.cheng@apple.com> |
Teach bottom up pre-ra scheduler to track register pressure. Work in progress.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108991 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGRRList.cpp
argetLowering.cpp
|
| e7b4dec881fced628644b65eb90b9ff72dfc1fee |
20-Jul-2010 |
Dan Gohman <gohman@apple.com> |
After a custom inserter, in a block which has constant instructions,
update the current basic block in addition to the current insert
position, so that they remain consistent. This fixes rdar://8204072.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108765 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
|
| c6e59b71f50c7c77bc448a936dba8e84d90911e8 |
20-Jul-2010 |
Dan Gohman <gohman@apple.com> |
After a custom inserter, in a block which has constant instructions,
update the current basic block in addition to the current insert
position, so that they remain consistent. This fixes rdar://8204072.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108765 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
|
| fe8ff14a3de380455d0aca6de3893bc40b170cdc |
20-Jul-2010 |
Evan Cheng <evan.cheng@apple.com> |
ARM has to provide its own TargetLowering::findRepresentativeClass because its scalar floating point registers alias its vector registers.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108761 91177308-0d34-0410-b5e6-96231b3b80d8
argetLowering.cpp
|
| d70f57b254114841892425a40944268d38ae0bcd |
20-Jul-2010 |
Evan Cheng <evan.cheng@apple.com> |
ARM has to provide its own TargetLowering::findRepresentativeClass because its scalar floating point registers alias its vector registers.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108761 91177308-0d34-0410-b5e6-96231b3b80d8
argetLowering.cpp
|
| 2e3c153a446ce1c1c9b8abbcf9865688760661df |
19-Jul-2010 |
Evan Cheng <evan.cheng@apple.com> |
Teach computeRegisterProperties() to compute "representative" register class for legal value types. A "representative" register class is the largest legal super-reg register class for a value type. e.g. On i386, GR32 is the rep register class for i8 / i16 / i32; on x86_64 it would be GR64.
This property will be used by the register pressure tracking instruction scheduler.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108735 91177308-0d34-0410-b5e6-96231b3b80d8
argetLowering.cpp
|
| 46dcb57e18884099ca6ad2aebb81fd7e1513c1f6 |
19-Jul-2010 |
Evan Cheng <evan.cheng@apple.com> |
Teach computeRegisterProperties() to compute "representative" register class for legal value types. A "representative" register class is the largest legal super-reg register class for a value type. e.g. On i386, GR32 is the rep register class for i8 / i16 / i32; on x86_64 it would be GR64.
This property will be used by the register pressure tracking instruction scheduler.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108735 91177308-0d34-0410-b5e6-96231b3b80d8
argetLowering.cpp
|
| af16006b85c9e35af0b8352bfcfd5c12efae7012 |
19-Jul-2010 |
Owen Anderson <resistor@mac.com> |
Remove r108639 now that it is handled by InstCombine instead.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108688 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 54026c0f1b10fc6335f2a090c12627e5f7126641 |
19-Jul-2010 |
Owen Anderson <resistor@mac.com> |
Remove r108639 now that it is handled by InstCombine instead.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108688 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 25f2c7e1200a14b245b9daafc4318d08a82903d8 |
18-Jul-2010 |
Owen Anderson <resistor@mac.com> |
Add a DAGCombine xform to fold away redundant float->double->float conversions around sqrt instructions.
I am assured by people more knowledgeable than me that there are no rounding issues in eliminating this.
This fixed <rdar://problem/8197504>.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108639 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 3ecdfafe3b06844ab0412b48f6daedf3e13e7037 |
18-Jul-2010 |
Owen Anderson <resistor@mac.com> |
Add a DAGCombine xform to fold away redundant float->double->float conversions around sqrt instructions.
I am assured by people more knowledgeable than me that there are no rounding issues in eliminating this.
This fixed <rdar://problem/8197504>.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108639 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| ea073c217e2ede8a86e264d85a4a10823ba854fc |
17-Jul-2010 |
Eric Christopher <echristo@apple.com> |
Propagate alloca alignment information via variable size object frame
information.
No functional change yet.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108583 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| 2b8271e0298f4218d6dddc80b49b51b38a646353 |
17-Jul-2010 |
Eric Christopher <echristo@apple.com> |
Propagate alloca alignment information via variable size object frame
information.
No functional change yet.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108583 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| b2c1c2be5dbabbbcf75ef4868c57426a64b8db6a |
16-Jul-2010 |
Dan Gohman <gohman@apple.com> |
Revert r108369, sorting llvm.dbg.declare information by source position,
since it doesn't work for front-ends which don't emit column information
(which includes llvm-gcc in its present configuration), and doesn't
work for clang for K&R style variables where the variables are declared
in a different order from the parameter list.
Instead, make a separate pass through the instructions to collect the
llvm.dbg.declare instructions in order. This ensures that the debug
information for variables is emitted in this order.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108538 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
unctionLoweringInfo.cpp
electionDAGBuilder.cpp
|
| 9c3d5e41b94ff51dc78ae42397151b52d9c2b546 |
16-Jul-2010 |
Dan Gohman <gohman@apple.com> |
Revert r108369, sorting llvm.dbg.declare information by source position,
since it doesn't work for front-ends which don't emit column information
(which includes llvm-gcc in its present configuration), and doesn't
work for clang for K&R style variables where the variables are declared
in a different order from the parameter list.
Instead, make a separate pass through the instructions to collect the
llvm.dbg.declare instructions in order. This ensures that the debug
information for variables is emitted in this order.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108538 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
unctionLoweringInfo.cpp
electionDAGBuilder.cpp
|
| 7aac0447c1490f83be94329ffb03a3e71bc090ac |
16-Jul-2010 |
Dan Gohman <gohman@apple.com> |
Use the source-order scheduler instead of the "fast" scheduler at -O0,
because it's more likely to keep debug line information in its original
order.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108496 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| e667e0172346773cb5718f694efa93ea49114c7b |
16-Jul-2010 |
Dan Gohman <gohman@apple.com> |
Use the source-order scheduler instead of the "fast" scheduler at -O0,
because it's more likely to keep debug line information in its original
order.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108496 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 71710aeac8bd1711f1fc472c5e61b6ac45b59ba6 |
16-Jul-2010 |
Dale Johannesen <dalej@apple.com> |
The SelectionDAGBuilder's handling of debug info, on rare
occasions, caused code to be generated in a different order.
All cases I've seen involved float softening in the type
legalizer, and this could be perhaps be fixed there, but
it's better not to generate things differently in the first
place. 7797940 (6/29/2010..7/15/2010).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108484 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
electionDAGBuilder.h
|
| bdc09d9b0943a8c5cee29c4f87666eaa97e081d4 |
16-Jul-2010 |
Dale Johannesen <dalej@apple.com> |
The SelectionDAGBuilder's handling of debug info, on rare
occasions, caused code to be generated in a different order.
All cases I've seen involved float softening in the type
legalizer, and this could be perhaps be fixed there, but
it's better not to generate things differently in the first
place. 7797940 (6/29/2010..7/15/2010).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108484 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
electionDAGBuilder.h
|
| 22d56b4791f13680c0de7c199f80e9b6d424e59b |
16-Jul-2010 |
Bill Wendling <isanbard@gmail.com> |
Revert. This isn't the correct way to go.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108478 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
electionDAGBuilder.h
|
| a60f0e7f817f170df55371491e246b95b0d8d6b0 |
16-Jul-2010 |
Bill Wendling <isanbard@gmail.com> |
Revert. This isn't the correct way to go.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108478 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
electionDAGBuilder.h
|
| f2cad15d57b820bba2e01de8307f3553804b7b27 |
16-Jul-2010 |
Bill Wendling <isanbard@gmail.com> |
Handle code gen for the unreachable instruction if it's the only instruction in
the function. We'll just turn it into a "trap" instruction instead.
The problem with not handling this is that it might generate a prologue without
the equivalent epilogue to go with it:
$ cat t.ll
define void @foo() {
entry:
unreachable
}
$ llc -o - t.ll -relocation-model=pic -disable-fp-elim -unwind-tables
.section __TEXT,__text,regular,pure_instructions
.globl _foo
.align 4, 0x90
_foo: ## @foo
Leh_func_begin0:
## BB#0: ## %entry
pushq %rbp
Ltmp0:
movq %rsp, %rbp
Ltmp1:
Leh_func_end0:
...
The unwind tables then have bad data in them causing all sorts of problems.
Fixes <rdar://problem/8096481>.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108473 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
electionDAGBuilder.h
|
| e9bf7e692e56656ef13b33af86624d0fdcd578fb |
16-Jul-2010 |
Bill Wendling <isanbard@gmail.com> |
Handle code gen for the unreachable instruction if it's the only instruction in
the function. We'll just turn it into a "trap" instruction instead.
The problem with not handling this is that it might generate a prologue without
the equivalent epilogue to go with it:
$ cat t.ll
define void @foo() {
entry:
unreachable
}
$ llc -o - t.ll -relocation-model=pic -disable-fp-elim -unwind-tables
.section __TEXT,__text,regular,pure_instructions
.globl _foo
.align 4, 0x90
_foo: ## @foo
Leh_func_begin0:
## BB#0: ## %entry
pushq %rbp
Ltmp0:
movq %rsp, %rbp
Ltmp1:
Leh_func_end0:
...
The unwind tables then have bad data in them causing all sorts of problems.
Fixes <rdar://problem/8096481>.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108473 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
electionDAGBuilder.h
|
| ddc0a8b9568a49c9b26f8c35d5ed777bc91c116d |
16-Jul-2010 |
Evan Cheng <evan.cheng@apple.com> |
Split -enable-finite-only-fp-math to two options:
-enable-no-nans-fp-math and -enable-no-infs-fp-math. All of the current codegen fp math optimizations only care whether the fp arithmetics arguments and results can never be NaN.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108465 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 60108e96bbc5432f4fe06ba313e64448e97a0e15 |
16-Jul-2010 |
Evan Cheng <evan.cheng@apple.com> |
Split -enable-finite-only-fp-math to two options:
-enable-no-nans-fp-math and -enable-no-infs-fp-math. All of the current codegen fp math optimizations only care whether the fp arithmetics arguments and results can never be NaN.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108465 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 4ef0321f497397e58d7293973f6ed24253435f1d |
15-Jul-2010 |
Devang Patel <dpatel@apple.com> |
Fix crash reported in PR7653.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108441 91177308-0d34-0410-b5e6-96231b3b80d8
argetLowering.cpp
|
| 07538ad975994123317fe5b32daed4bf28683a1d |
15-Jul-2010 |
Devang Patel <dpatel@apple.com> |
Fix crash reported in PR7653.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108441 91177308-0d34-0410-b5e6-96231b3b80d8
argetLowering.cpp
|
| 501c139176d85d108f879aeed8a0ac4091763e0a |
15-Jul-2010 |
Eric Christopher <echristo@apple.com> |
80-col.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108381 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| 723a05a66f0c7b2ba8a9e0bc162cf6a44c5569be |
15-Jul-2010 |
Eric Christopher <echristo@apple.com> |
80-col.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108381 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| 1c64f5b7c8a54030b577e0b12609ec16ae6299d9 |
15-Jul-2010 |
Dan Gohman <gohman@apple.com> |
Properly restore DebugLoc after leaving the local constant area.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108364 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
|
| 163f78ea4016d594d921154d8df1c9d746fb0ea8 |
15-Jul-2010 |
Dan Gohman <gohman@apple.com> |
Properly restore DebugLoc after leaving the local constant area.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108364 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
|
| 31e2f82290b4c3f520edb06fb6d866aef7939a10 |
14-Jul-2010 |
Dan Gohman <gohman@apple.com> |
Delete fast-isel's trivial load optimization; it breaks debugging because
it can look past points where a debugger might modify user variables.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108336 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
|
| 2dd50e656f048d222aaaa57168688326fa52421b |
14-Jul-2010 |
Dan Gohman <gohman@apple.com> |
Delete fast-isel's trivial load optimization; it breaks debugging because
it can look past points where a debugger might modify user variables.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108336 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
|
| f8b30eee74822408e2695de7a228455fe4535e22 |
14-Jul-2010 |
Dan Gohman <gohman@apple.com> |
Don't propagate debug locations to instructions for materializing
constants, since they may not be emited near the other instructions
which get the same line, and this confuses debug info.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108302 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
|
| a10b8494a50108482302f6f077d72fbc76d776ed |
14-Jul-2010 |
Dan Gohman <gohman@apple.com> |
Don't propagate debug locations to instructions for materializing
constants, since they may not be emited near the other instructions
which get the same line, and this confuses debug info.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108302 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
|
| 324c0e335cffaeeacdd15df43fa8beffcf125aca |
13-Jul-2010 |
Dale Johannesen <dalej@apple.com> |
In inline asm treat indirect 'X' constraint as 'm'.
This may not be right in all cases, but it's better
than asserting which it was doing before. PR 7528.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108268 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| b5611a623012fc373ea21d9c062b8a38c0ac75c7 |
13-Jul-2010 |
Dale Johannesen <dalej@apple.com> |
In inline asm treat indirect 'X' constraint as 'm'.
This may not be right in all cases, but it's better
than asserting which it was doing before. PR 7528.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108268 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| 06987da3f26bf015b05712886288c678ae8a18d6 |
12-Jul-2010 |
Rafael Espindola <rafael.espindola@gmail.com> |
Fix a typo and fit in 80 columns. Found by Bob Wilson.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108164 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| 9d544d04166b971ab5ca1ee7ee37465b4af6bbf5 |
12-Jul-2010 |
Rafael Espindola <rafael.espindola@gmail.com> |
Fix a typo and fit in 80 columns. Found by Bob Wilson.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108164 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| c2d3eee936fe8da7e8e257cb45580149421190bb |
12-Jul-2010 |
Duncan Sands <baldrick@free.fr> |
Convert some tab stops into spaces.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108130 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
egalizeFloatTypes.cpp
electionDAGPrinter.cpp
|
| 3472766f9eb7d66f234c390ce1b3a8b76f0ee9ce |
12-Jul-2010 |
Duncan Sands <baldrick@free.fr> |
Convert some tab stops into spaces.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108130 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
egalizeFloatTypes.cpp
electionDAGPrinter.cpp
|
| af01e252c54c30e80a1734f256c04a4b273622d1 |
11-Jul-2010 |
Jakob Stoklund Olesen <stoklund@2pi.dk> |
Use COPY for fast-isel bitconvert, but don't create cross-class copies.
This doesn't change the behavior of SelectBitcast for X86.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108073 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
|
| e7917bb207d5178dfb26066f839e4c295fd3a1eb |
11-Jul-2010 |
Jakob Stoklund Olesen <stoklund@2pi.dk> |
Use COPY for fast-isel bitconvert, but don't create cross-class copies.
This doesn't change the behavior of SelectBitcast for X86.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108073 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
|
| deaae440ab24bb0531c2e23bde4f64300291e832 |
11-Jul-2010 |
Rafael Espindola <rafael.espindola@gmail.com> |
Fix va_arg for doubles. With this patch VAARG nodes always contain the
correct alignment information, which simplifies ExpandRes_VAARG a bit.
The patch introduces a new alignment information to TargetLoweringInfo. This is
needed since the two natural candidates cannot be used:
* The 's' in target data: If this is set to the minimal alignment of any
argument, getCallFrameTypeAlignment would return 4 for doubles on ARM for
example.
* The getTransientStackAlignment method. It is possible for an architecture to
have argument less aligned than what we maintain the stack pointer.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108072 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
egalizeFloatTypes.cpp
egalizeIntegerTypes.cpp
egalizeTypesGeneric.cpp
electionDAGBuilder.cpp
argetLowering.cpp
|
| cbeeae23c31d32b833c9c7c3e8984e4cbcf22f45 |
11-Jul-2010 |
Rafael Espindola <rafael.espindola@gmail.com> |
Fix va_arg for doubles. With this patch VAARG nodes always contain the
correct alignment information, which simplifies ExpandRes_VAARG a bit.
The patch introduces a new alignment information to TargetLoweringInfo. This is
needed since the two natural candidates cannot be used:
* The 's' in target data: If this is set to the minimal alignment of any
argument, getCallFrameTypeAlignment would return 4 for doubles on ARM for
example.
* The getTransientStackAlignment method. It is possible for an architecture to
have argument less aligned than what we maintain the stack pointer.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108072 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
egalizeFloatTypes.cpp
egalizeIntegerTypes.cpp
egalizeTypesGeneric.cpp
electionDAGBuilder.cpp
argetLowering.cpp
|
| da8e3ccd1b8cf437ce008849bf877bdb3a5090be |
11-Jul-2010 |
Jakob Stoklund Olesen <stoklund@2pi.dk> |
Use COPY for extracting ImplicitDef'ed values from fast-isel instructions.
This assumes that the registers can be copied which is probably a safe
assumption.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108070 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
|
| e797e0c8644a649d162fb339b148f5db10447d4e |
11-Jul-2010 |
Jakob Stoklund Olesen <stoklund@2pi.dk> |
Use COPY for extracting ImplicitDef'ed values from fast-isel instructions.
This assumes that the registers can be copied which is probably a safe
assumption.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108070 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
|
| ac74d40a6fab0f487aba3fb882a6e226fcbafe9a |
11-Jul-2010 |
Jakob Stoklund Olesen <stoklund@2pi.dk> |
Use COPY in FastISel everywhere it is safe and trivial.
The remaining copyRegToReg calls actually check the return value (shock!), so we
cannot trivially replace them with COPY instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108069 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
|
| 5127f7991373d1c69e4d3241ec11913f4f44bb21 |
11-Jul-2010 |
Jakob Stoklund Olesen <stoklund@2pi.dk> |
Use COPY in FastISel everywhere it is safe and trivial.
The remaining copyRegToReg calls actually check the return value (shock!), so we
cannot trivially replace them with COPY instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108069 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
|
| 41989a808cb7b72fbea814e8b9bca0df8606acd8 |
11-Jul-2010 |
Dan Gohman <gohman@apple.com> |
Fix a bug in the code which re-inserts DBG_VALUE nodes after scheduling;
if a block is split (by a custom inserter), the insert point may be in a
different block than it was originally. This fixes 32-bit llvm-gcc
bootstrap builds, and I haven't been able to reproduce it otherwise.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108060 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGSDNodes.cpp
|
| a8dab36f3dfdfcd3f74224afa4ffb32776674c93 |
11-Jul-2010 |
Dan Gohman <gohman@apple.com> |
Fix a bug in the code which re-inserts DBG_VALUE nodes after scheduling;
if a block is split (by a custom inserter), the insert point may be in a
different block than it was originally. This fixes 32-bit llvm-gcc
bootstrap builds, and I haven't been able to reproduce it otherwise.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108060 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGSDNodes.cpp
|
| 49a439e4799aa900e5cc4dbacf74394bfca34f26 |
10-Jul-2010 |
Jakob Stoklund Olesen <stoklund@2pi.dk> |
Emit COPY instructions instead of using copyRegToReg in InstrEmitter,
ScheduleDAGEmit, TwoAddressLowering, and PHIElimination.
This switches the bulk of register copies to using COPY, but many less used
copyRegToReg calls remain.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108050 91177308-0d34-0410-b5e6-96231b3b80d8
nstrEmitter.cpp
|
| 92c1f72c548e6a5e793ef19a0b04910992115b6c |
10-Jul-2010 |
Jakob Stoklund Olesen <stoklund@2pi.dk> |
Emit COPY instructions instead of using copyRegToReg in InstrEmitter,
ScheduleDAGEmit, TwoAddressLowering, and PHIElimination.
This switches the bulk of register copies to using COPY, but many less used
copyRegToReg calls remain.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108050 91177308-0d34-0410-b5e6-96231b3b80d8
nstrEmitter.cpp
|
| 0efe7d3bcc7b0e65143eb25636cc15a7d665adb0 |
10-Jul-2010 |
Dan Gohman <gohman@apple.com> |
Insert IMPLICIT_DEF instructions at the current insert position, not
at the end of the block.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108045 91177308-0d34-0410-b5e6-96231b3b80d8
nstrEmitter.cpp
|
| 3cd26a2909cd5d002fe2742041a264ba217ba88e |
10-Jul-2010 |
Dan Gohman <gohman@apple.com> |
Insert IMPLICIT_DEF instructions at the current insert position, not
at the end of the block.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108045 91177308-0d34-0410-b5e6-96231b3b80d8
nstrEmitter.cpp
|
| b4482cf9e41505aa91da0bdea2deba4147e3e495 |
10-Jul-2010 |
Dan Gohman <gohman@apple.com> |
Reapply bottom-up fast-isel, with several fixes for x86-32:
- Check getBytesToPopOnReturn().
- Eschew ST0 and ST1 for return values.
- Fix the PIC base register initialization so that it doesn't ever
fail to end up the top of the entry block.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108039 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
unctionLoweringInfo.cpp
nstrEmitter.cpp
cheduleDAGSDNodes.cpp
electionDAGBuilder.cpp
electionDAGISel.cpp
argetLowering.cpp
|
| 84023e0fbefc406a4c611d3d64a10df5d3a97dd7 |
10-Jul-2010 |
Dan Gohman <gohman@apple.com> |
Reapply bottom-up fast-isel, with several fixes for x86-32:
- Check getBytesToPopOnReturn().
- Eschew ST0 and ST1 for return values.
- Fix the PIC base register initialization so that it doesn't ever
fail to end up the top of the entry block.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108039 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
unctionLoweringInfo.cpp
nstrEmitter.cpp
cheduleDAGSDNodes.cpp
electionDAGBuilder.cpp
electionDAGISel.cpp
argetLowering.cpp
|
| 32081510b8ac6bcf8d16793a8fee07e34833e999 |
09-Jul-2010 |
Bill Wendling <isanbard@gmail.com> |
Clarify what mysterious check means.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108005 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 8886c495a33703d8bd8319d16b62645cee4dd546 |
09-Jul-2010 |
Bill Wendling <isanbard@gmail.com> |
Clarify what mysterious check means.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108005 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| ec25c929e718999b22b3fcee506104f995b3b457 |
09-Jul-2010 |
Bob Wilson <bob.wilson@apple.com> |
--- Reverse-merging r107947 into '.':
U utils/TableGen/FastISelEmitter.cpp
--- Reverse-merging r107943 into '.':
U test/CodeGen/X86/fast-isel.ll
U test/CodeGen/X86/fast-isel-loads.ll
U include/llvm/Target/TargetLowering.h
U include/llvm/Support/PassNameParser.h
U include/llvm/CodeGen/FunctionLoweringInfo.h
U include/llvm/CodeGen/CallingConvLower.h
U include/llvm/CodeGen/FastISel.h
U include/llvm/CodeGen/SelectionDAGISel.h
U lib/CodeGen/LLVMTargetMachine.cpp
U lib/CodeGen/CallingConvLower.cpp
U lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
U lib/CodeGen/SelectionDAG/FunctionLoweringInfo.cpp
U lib/CodeGen/SelectionDAG/FastISel.cpp
U lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
U lib/CodeGen/SelectionDAG/ScheduleDAGSDNodes.cpp
U lib/CodeGen/SelectionDAG/InstrEmitter.cpp
U lib/CodeGen/SelectionDAG/TargetLowering.cpp
U lib/Target/XCore/XCoreISelLowering.cpp
U lib/Target/XCore/XCoreISelLowering.h
U lib/Target/X86/X86ISelLowering.cpp
U lib/Target/X86/X86FastISel.cpp
U lib/Target/X86/X86ISelLowering.h
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107987 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
unctionLoweringInfo.cpp
nstrEmitter.cpp
cheduleDAGSDNodes.cpp
electionDAGBuilder.cpp
electionDAGISel.cpp
argetLowering.cpp
|
| 02266e29f9250d74c5ec720aff23add3410ae920 |
09-Jul-2010 |
Bob Wilson <bob.wilson@apple.com> |
--- Reverse-merging r107947 into '.':
U utils/TableGen/FastISelEmitter.cpp
--- Reverse-merging r107943 into '.':
U test/CodeGen/X86/fast-isel.ll
U test/CodeGen/X86/fast-isel-loads.ll
U include/llvm/Target/TargetLowering.h
U include/llvm/Support/PassNameParser.h
U include/llvm/CodeGen/FunctionLoweringInfo.h
U include/llvm/CodeGen/CallingConvLower.h
U include/llvm/CodeGen/FastISel.h
U include/llvm/CodeGen/SelectionDAGISel.h
U lib/CodeGen/LLVMTargetMachine.cpp
U lib/CodeGen/CallingConvLower.cpp
U lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
U lib/CodeGen/SelectionDAG/FunctionLoweringInfo.cpp
U lib/CodeGen/SelectionDAG/FastISel.cpp
U lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
U lib/CodeGen/SelectionDAG/ScheduleDAGSDNodes.cpp
U lib/CodeGen/SelectionDAG/InstrEmitter.cpp
U lib/CodeGen/SelectionDAG/TargetLowering.cpp
U lib/Target/XCore/XCoreISelLowering.cpp
U lib/Target/XCore/XCoreISelLowering.h
U lib/Target/X86/X86ISelLowering.cpp
U lib/Target/X86/X86FastISel.cpp
U lib/Target/X86/X86ISelLowering.h
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107987 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
unctionLoweringInfo.cpp
nstrEmitter.cpp
cheduleDAGSDNodes.cpp
electionDAGBuilder.cpp
electionDAGISel.cpp
argetLowering.cpp
|
| 8d4191d6429537222756caa1c45cd809b6c1ab7d |
09-Jul-2010 |
Gabor Greif <ggreif@gmail.com> |
cache result of operator*
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107980 91177308-0d34-0410-b5e6-96231b3b80d8
unctionLoweringInfo.cpp
|
| 03f09a3e329abcb35c1a5aa3a4546668b1af21ee |
09-Jul-2010 |
Gabor Greif <ggreif@gmail.com> |
cache result of operator*
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107980 91177308-0d34-0410-b5e6-96231b3b80d8
unctionLoweringInfo.cpp
|
| 1dac4614d6666137fab13240cbd1988227389164 |
09-Jul-2010 |
Dan Gohman <gohman@apple.com> |
Re-apply bottom-up fast-isel, with fixes. Be very careful to avoid emitting
a DBG_VALUE after a terminator, or emitting any instructions before an EH_LABEL.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107943 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
unctionLoweringInfo.cpp
nstrEmitter.cpp
cheduleDAGSDNodes.cpp
electionDAGBuilder.cpp
electionDAGISel.cpp
argetLowering.cpp
|
| bf87e2491789d6ff788629e22e93d0c1ca02ae85 |
09-Jul-2010 |
Dan Gohman <gohman@apple.com> |
Re-apply bottom-up fast-isel, with fixes. Be very careful to avoid emitting
a DBG_VALUE after a terminator, or emitting any instructions before an EH_LABEL.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107943 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
unctionLoweringInfo.cpp
nstrEmitter.cpp
cheduleDAGSDNodes.cpp
electionDAGBuilder.cpp
electionDAGISel.cpp
argetLowering.cpp
|
| f028ffdf273a61cada6ffe2f838bd0c6770681f1 |
09-Jul-2010 |
Bob Wilson <bob.wilson@apple.com> |
Reenable DAG combining for vector shuffles. It looks like it was temporarily
disabled and then never turned back on again. Adjust some tests, one because
this change avoids an unnecessary instruction, and the other to make it
continue testing what it was intended to test.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107941 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| f1d93ca920a106067d5773d57c85370a7efffe96 |
09-Jul-2010 |
Bob Wilson <bob.wilson@apple.com> |
Reenable DAG combining for vector shuffles. It looks like it was temporarily
disabled and then never turned back on again. Adjust some tests, one because
this change avoids an unnecessary instruction, and the other to make it
continue testing what it was intended to test.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107941 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 29b3696ea35b833f392f87faddff61f24a496833 |
09-Jul-2010 |
Bill Wendling <isanbard@gmail.com> |
Extension of r107506. Make sure that we don't mark a function as having a call
if the inline ASM doesn't need a stack frame.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107922 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| c930cbcada7c62bb474019f4ce21bd6387d1c3f5 |
09-Jul-2010 |
Bill Wendling <isanbard@gmail.com> |
Extension of r107506. Make sure that we don't mark a function as having a call
if the inline ASM doesn't need a stack frame.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107922 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 4dc8a1eda314b03118daf8dbd1e2c237c8082eea |
08-Jul-2010 |
Jakob Stoklund Olesen <stoklund@2pi.dk> |
Convert EXTRACT_SUBREG to COPY when emitting machine instrs.
EXTRACT_SUBREG no longer appears as a machine instruction. Use COPY instead.
Add isCopy() checks in many places using isMoveInstr() and isExtractSubreg().
The isMoveInstr hook will be removed later.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107879 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
nstrEmitter.cpp
|
| 0bc25f40402f48ba42fc45403f635b20d90fabb3 |
08-Jul-2010 |
Jakob Stoklund Olesen <stoklund@2pi.dk> |
Convert EXTRACT_SUBREG to COPY when emitting machine instrs.
EXTRACT_SUBREG no longer appears as a machine instruction. Use COPY instead.
Add isCopy() checks in many places using isMoveInstr() and isExtractSubreg().
The isMoveInstr hook will be removed later.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107879 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
nstrEmitter.cpp
|
| 8ab9612964e9eda2ec3bd968a37efa4613b1a029 |
08-Jul-2010 |
Benjamin Kramer <benny.kra@googlemail.com> |
Merge the duplicated iabs optimization in DAGCombiner and let it detected a few more idioms.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107868 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| cde51108def63dbb68ffd47f8950b8bdd43dd074 |
08-Jul-2010 |
Benjamin Kramer <benny.kra@googlemail.com> |
Merge the duplicated iabs optimization in DAGCombiner and let it detected a few more idioms.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107868 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| af52ee40fb60099ddec2b896aa4c759ef05b70c8 |
08-Jul-2010 |
Dan Gohman <gohman@apple.com> |
Revert 107840 107839 107813 107804 107800 107797 107791.
Debug info intrinsics win for now.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107850 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
unctionLoweringInfo.cpp
nstrEmitter.cpp
electionDAGBuilder.cpp
electionDAGISel.cpp
argetLowering.cpp
|
| f59514152511694d46ca8b8d2db466d256ab5759 |
08-Jul-2010 |
Dan Gohman <gohman@apple.com> |
Revert 107840 107839 107813 107804 107800 107797 107791.
Debug info intrinsics win for now.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107850 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
unctionLoweringInfo.cpp
nstrEmitter.cpp
electionDAGBuilder.cpp
electionDAGISel.cpp
argetLowering.cpp
|
| 6421ef27c5ea03ae55e4cbaa4775242809f09d6e |
08-Jul-2010 |
Dan Gohman <gohman@apple.com> |
Don't forward-declare registers for static allocas, which we'll
prefer to materialize as local constants. This fixes the clang
bootstrap abort.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107840 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
|
| 49dcb0f9ec865fd5474e5b552723adab2d7bf840 |
08-Jul-2010 |
Dan Gohman <gohman@apple.com> |
Don't forward-declare registers for static allocas, which we'll
prefer to materialize as local constants. This fixes the clang
bootstrap abort.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107840 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
|
| ff6f2bc8452b9fed3bc951818fa1b5b62cb13862 |
08-Jul-2010 |
Dan Gohman <gohman@apple.com> |
Fix -fast-isel-abort to check the right instruction.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107839 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 61b7cea126a0178045839093c98f7a75b6620b72 |
08-Jul-2010 |
Dan Gohman <gohman@apple.com> |
Fix -fast-isel-abort to check the right instruction.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107839 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 0284a60ee82d70fdd48c779caae72470cdae3643 |
08-Jul-2010 |
Evan Cheng <evan.cheng@apple.com> |
Move getExtLoad() and (some) getLoad() DebugLoc argument after EVT argument for consistency sake.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107820 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
egalizeDAG.cpp
egalizeFloatTypes.cpp
egalizeIntegerTypes.cpp
egalizeVectorTypes.cpp
electionDAG.cpp
|
| bcc8017c738e92d9c1af221b11c4916cb524184e |
08-Jul-2010 |
Evan Cheng <evan.cheng@apple.com> |
Move getExtLoad() and (some) getLoad() DebugLoc argument after EVT argument for consistency sake.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107820 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
egalizeDAG.cpp
egalizeFloatTypes.cpp
egalizeIntegerTypes.cpp
egalizeVectorTypes.cpp
electionDAG.cpp
|
| 0f532f2930ca2bcbd8ccdd6015cdbbe8f77da0cb |
07-Jul-2010 |
Dan Gohman <gohman@apple.com> |
Not all custom inserters create new basic blocks. If the inserter
didn't create a new block, don't reset the insert position.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107813 91177308-0d34-0410-b5e6-96231b3b80d8
nstrEmitter.cpp
|
| 5c480432b504bfbe8b3ba028f5f48e7e2e2f1f1e |
07-Jul-2010 |
Dan Gohman <gohman@apple.com> |
Not all custom inserters create new basic blocks. If the inserter
didn't create a new block, don't reset the insert position.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107813 91177308-0d34-0410-b5e6-96231b3b80d8
nstrEmitter.cpp
|
| 34a97b220a7843f460ff3e700d81e5859f3cd50d |
07-Jul-2010 |
Dan Gohman <gohman@apple.com> |
Implement bottom-up fast-isel. This has the advantage of not requiring
a separate DCE pass over MachineInstrs.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107804 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
unctionLoweringInfo.cpp
electionDAGBuilder.cpp
electionDAGISel.cpp
|
| 4df83ed159f21fdf73a57729c3e9d8c9fcd73607 |
07-Jul-2010 |
Dan Gohman <gohman@apple.com> |
Implement bottom-up fast-isel. This has the advantage of not requiring
a separate DCE pass over MachineInstrs.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107804 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
unctionLoweringInfo.cpp
electionDAGBuilder.cpp
electionDAGISel.cpp
|
| 002cc40ca6295586a9d71fb2dd9c7c3b37d0bac1 |
07-Jul-2010 |
Dan Gohman <gohman@apple.com> |
Add X86FastISel support for return statements. This entails refactoring
a bunch of stuff, to allow the target-independent calling convention
logic to be employed.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107800 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
argetLowering.cpp
|
| f423a69839c4810b890f8a8b09fb8cfbd6bf0139 |
07-Jul-2010 |
Dan Gohman <gohman@apple.com> |
Add X86FastISel support for return statements. This entails refactoring
a bunch of stuff, to allow the target-independent calling convention
logic to be employed.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107800 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
argetLowering.cpp
|
| c5d70bbbb306a822cc9f1713ab823f05fbff743b |
07-Jul-2010 |
Dan Gohman <gohman@apple.com> |
Update the insert position after scheduling, which may change the
position when emitting multiple blocks when executing a custom
inserter.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107797 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 5fc3da0665c6dab92a4f21f34e75f9b929dc88d5 |
07-Jul-2010 |
Dan Gohman <gohman@apple.com> |
Update the insert position after scheduling, which may change the
position when emitting multiple blocks when executing a custom
inserter.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107797 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| fb582e2dbbe5652e50fd6023b5f58c77a23aa011 |
07-Jul-2010 |
Devang Patel <dpatel@apple.com> |
Update comment.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107796 91177308-0d34-0410-b5e6-96231b3b80d8
nstrEmitter.cpp
|
| cc87bfb59b34a0543b48d93f661f2abaee6b4cee |
07-Jul-2010 |
Devang Patel <dpatel@apple.com> |
Update comment.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107796 91177308-0d34-0410-b5e6-96231b3b80d8
nstrEmitter.cpp
|
| 29e8a67092e97687732a760db9a45094e5a63a7c |
07-Jul-2010 |
Dan Gohman <gohman@apple.com> |
Give FunctionLoweringInfo an MBB member, avoiding the need to pass it
around everywhere, and also give it an InsertPt member, to enable isel
to operate at an arbitrary position within a block, rather than just
appending to a block.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107791 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
electionDAGISel.cpp
|
| eabaed26c3921453d824b71a93557c32132f4fdd |
07-Jul-2010 |
Dan Gohman <gohman@apple.com> |
Give FunctionLoweringInfo an MBB member, avoiding the need to pass it
around everywhere, and also give it an InsertPt member, to enable isel
to operate at an arbitrary position within a block, rather than just
appending to a block.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107791 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
electionDAGISel.cpp
|
| d74a2f95daef7adbedd8758eaaf419ee788c78af |
07-Jul-2010 |
Dan Gohman <gohman@apple.com> |
Simplify FastISel's constructor by giving it a FunctionLoweringInfo
instance, rather than pointers to all of FunctionLoweringInfo's
members.
This eliminates an NDEBUG ABI sensitivity.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107789 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
electionDAGISel.cpp
|
| a4160c3434b08288d1f79f1acbe453d1b9610b22 |
07-Jul-2010 |
Dan Gohman <gohman@apple.com> |
Simplify FastISel's constructor by giving it a FunctionLoweringInfo
instance, rather than pointers to all of FunctionLoweringInfo's
members.
This eliminates an NDEBUG ABI sensitivity.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107789 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
electionDAGISel.cpp
|
| 27ba216a1c7405ff956c798758dcb1f3ae2bf51d |
07-Jul-2010 |
Dan Gohman <gohman@apple.com> |
Move FunctionLoweringInfo.h out into include/llvm/CodeGen. This will
allow target-specific fast-isel code to make use of it directly.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107787 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
unctionLoweringInfo.cpp
unctionLoweringInfo.h
electionDAGBuilder.cpp
electionDAGISel.cpp
|
| 4c3fd9f92f89810d659973d2666ab729758de64a |
07-Jul-2010 |
Dan Gohman <gohman@apple.com> |
Move FunctionLoweringInfo.h out into include/llvm/CodeGen. This will
allow target-specific fast-isel code to make use of it directly.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107787 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
unctionLoweringInfo.cpp
unctionLoweringInfo.h
electionDAGBuilder.cpp
electionDAGISel.cpp
|
| f53e8cd8b1639a358a97deaea7ee5abae7c560ad |
07-Jul-2010 |
Dan Gohman <gohman@apple.com> |
Split the SDValue out of OutputArg so that SelectionDAG-independent
code can do calling-convention queries. This obviates OutputArgReg.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107786 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| c9403659a98bf6487ab6fbf40b81628b5695c02e |
07-Jul-2010 |
Dan Gohman <gohman@apple.com> |
Split the SDValue out of OutputArg so that SelectionDAG-independent
code can do calling-convention queries. This obviates OutputArgReg.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107786 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| 89023e9437883ef7de1b45671d85c62148a86e49 |
07-Jul-2010 |
Dan Gohman <gohman@apple.com> |
Move CallingConvLower.cpp out of the SelectionDAG directory.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107781 91177308-0d34-0410-b5e6-96231b3b80d8
MakeLists.txt
allingConvLower.cpp
|
| 2f2b0abbac946a6e37ffa4a9775f0af5b91e723c |
07-Jul-2010 |
Dan Gohman <gohman@apple.com> |
Move CallingConvLower.cpp out of the SelectionDAG directory.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107781 91177308-0d34-0410-b5e6-96231b3b80d8
MakeLists.txt
allingConvLower.cpp
|
| fb695a291ec7ad5be9f4c13eb7df14c903d4ad15 |
07-Jul-2010 |
Jim Grosbach <grosbach@apple.com> |
By default, the eh.sjlj.setjmp/longjmp intrinsics should just do nothing rather
than assuming a target will custom lower them. Targets which do so should
exlicitly mark them as having custom lowerings. PR7454.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107734 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| c66e150b2cb1f2f8e2f4eb124b9177ffc6ef3a74 |
07-Jul-2010 |
Jim Grosbach <grosbach@apple.com> |
By default, the eh.sjlj.setjmp/longjmp intrinsics should just do nothing rather
than assuming a target will custom lower them. Targets which do so should
exlicitly mark them as having custom lowerings. PR7454.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107734 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 42682b49e727d6c668372d8aa644811105741962 |
07-Jul-2010 |
Dan Gohman <gohman@apple.com> |
CanLowerReturn doesn't need a SelectionDAG; it just needs an LLVMContext.
SelectBasicBlock doesn't needs its BasicBlock argument.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107712 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
electionDAGISel.cpp
|
| c9af33c6854afe7b082af2d892ec5f05dfa383c7 |
07-Jul-2010 |
Dan Gohman <gohman@apple.com> |
CanLowerReturn doesn't need a SelectionDAG; it just needs an LLVMContext.
SelectBasicBlock doesn't needs its BasicBlock argument.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107712 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
electionDAGISel.cpp
|
| de09e922a6a82ff48d31328606f691591ae8fa19 |
07-Jul-2010 |
Devang Patel <dpatel@apple.com> |
Propagate debug loc.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107710 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
electionDAG.cpp
electionDAGBuilder.cpp
argetLowering.cpp
|
| 0d881dabc1a4e1aefad6dd38de166d8358285638 |
07-Jul-2010 |
Devang Patel <dpatel@apple.com> |
Propagate debug loc.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107710 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
electionDAG.cpp
electionDAGBuilder.cpp
argetLowering.cpp
|
| 3dd527d9807fa0c5f81fbbf92858e0362226b327 |
06-Jul-2010 |
Dan Gohman <gohman@apple.com> |
Reapply r107655 with fixes; insert the pseudo instruction into
the block before calling the expansion hook. And don't
put EFLAGS in a mbb's live-in list twice.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107691 91177308-0d34-0410-b5e6-96231b3b80d8
nstrEmitter.cpp
|
| 14152b480d09c7ca912af7c06d00b0ff3912e4f5 |
06-Jul-2010 |
Dan Gohman <gohman@apple.com> |
Reapply r107655 with fixes; insert the pseudo instruction into
the block before calling the expansion hook. And don't
put EFLAGS in a mbb's live-in list twice.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107691 91177308-0d34-0410-b5e6-96231b3b80d8
nstrEmitter.cpp
|
| d00b3e5a1dcdc5b1b6af951ef43a51215b3353c4 |
06-Jul-2010 |
Dan Gohman <gohman@apple.com> |
Add versions of OutputArgReg, AnalyzeReturn, and AnalyzeCallOperands
which do not depend on SelectionDAG.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107666 91177308-0d34-0410-b5e6-96231b3b80d8
allingConvLower.cpp
|
| aa8c19405ac3891ee7fbea1a509c6774ca7a5b59 |
06-Jul-2010 |
Dan Gohman <gohman@apple.com> |
Add versions of OutputArgReg, AnalyzeReturn, and AnalyzeCallOperands
which do not depend on SelectionDAG.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107666 91177308-0d34-0410-b5e6-96231b3b80d8
allingConvLower.cpp
|
| 062eb0cf4c787f574211dc3a80b45a77ab57514b |
05-Jul-2010 |
Chris Lattner <sabre@nondot.org> |
more tidying.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107615 91177308-0d34-0410-b5e6-96231b3b80d8
argetLowering.cpp
|
| 32b4b5aea6dc38ac5aaff56fc717aebf188e39c9 |
05-Jul-2010 |
Chris Lattner <sabre@nondot.org> |
more tidying.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107615 91177308-0d34-0410-b5e6-96231b3b80d8
argetLowering.cpp
|
| 81fa5fa294acd98d86c9f59b102c342c93260390 |
05-Jul-2010 |
Chris Lattner <sabre@nondot.org> |
random tidying
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107612 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
argetLowering.cpp
|
| 598751ed2544291ba623e013b4e0b61bf56ca9c4 |
05-Jul-2010 |
Chris Lattner <sabre@nondot.org> |
random tidying
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107612 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
argetLowering.cpp
|
| fdceec266f9efd7c1c7ba6a4a3027e935538e932 |
04-Jul-2010 |
Evan Cheng <evan.cheng@apple.com> |
Infer alignments of fixed frame objects when they are constructed. This ensures remat'ed loads from fixed slots have the right alignments.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107591 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| f2f490368797fff899e8025133f10c37e3a2ebe5 |
04-Jul-2010 |
Evan Cheng <evan.cheng@apple.com> |
Infer alignments of fixed frame objects when they are constructed. This ensures remat'ed loads from fixed slots have the right alignments.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107591 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| b6a40f48353acccac9fe0be0992f3a6d0f6bf202 |
04-Jul-2010 |
Bill Wendling <isanbard@gmail.com> |
Proper indentation.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107581 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| d9cb7ca388c400e3c7a509c00d4cf63031de0dde |
04-Jul-2010 |
Bill Wendling <isanbard@gmail.com> |
Proper indentation.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107581 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 908c105be3c4c20123d2d45f434386039aada840 |
02-Jul-2010 |
Dale Johannesen <dalej@apple.com> |
Propagate the AlignStack bit in InlineAsm's to the
PrologEpilog code, and use it to determine whether
the asm forces stack alignment or not. gcc consistently
does not do this for GCC-style asms; Apple gcc inconsistently
sometimes does it for asm blocks. There is no
convenient place to put a bit in either the SDNode or
the MachineInstr form, so I've added an extra operand
to each; unlovely, but it does allow for expansion for
more bits, should we need it. PR 5125. Some
existing testcases are affected.
The operand lists of the SDNode and MachineInstr forms
are indexed with awesome mnemonics, like "2"; I may
fix this someday, but not now. I'm not making it any
worse. If anyone is inspired I think you can find all
the right places from this patch.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107506 91177308-0d34-0410-b5e6-96231b3b80d8
nstrEmitter.cpp
electionDAGBuilder.cpp
electionDAGISel.cpp
|
| f1e309eb4862459a76445942ba4dafc433b6f317 |
02-Jul-2010 |
Dale Johannesen <dalej@apple.com> |
Propagate the AlignStack bit in InlineAsm's to the
PrologEpilog code, and use it to determine whether
the asm forces stack alignment or not. gcc consistently
does not do this for GCC-style asms; Apple gcc inconsistently
sometimes does it for asm blocks. There is no
convenient place to put a bit in either the SDNode or
the MachineInstr form, so I've added an extra operand
to each; unlovely, but it does allow for expansion for
more bits, should we need it. PR 5125. Some
existing testcases are affected.
The operand lists of the SDNode and MachineInstr forms
are indexed with awesome mnemonics, like "2"; I may
fix this someday, but not now. I'm not making it any
worse. If anyone is inspired I think you can find all
the right places from this patch.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107506 91177308-0d34-0410-b5e6-96231b3b80d8
nstrEmitter.cpp
electionDAGBuilder.cpp
electionDAGISel.cpp
|
| 32a1ca986d7ea7912e00ae57f78b921b62837462 |
02-Jul-2010 |
Jim Grosbach <grosbach@apple.com> |
80-column and trailing whitespace cleanup.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107490 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 6e9926108a69efbc11f1cadf947e98500e4d4228 |
02-Jul-2010 |
Jim Grosbach <grosbach@apple.com> |
80-column and trailing whitespace cleanup.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107490 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| cafd7221ff055706e108f6c2d992bacb6b97f8e9 |
02-Jul-2010 |
Jim Grosbach <grosbach@apple.com> |
grammar tweaks
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107489 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| ee7f8b5f058174a55372159bc23088198e5f5991 |
02-Jul-2010 |
Jim Grosbach <grosbach@apple.com> |
grammar tweaks
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107489 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 7831c925340089b721aa1c93f30e6b407024d56a |
02-Jul-2010 |
Dan Gohman <gohman@apple.com> |
Rename CreateReg to CreateRegs, and MakeReg to CreateReg.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107451 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
unctionLoweringInfo.cpp
unctionLoweringInfo.h
electionDAGBuilder.cpp
electionDAGISel.cpp
|
| 89496d0eb73ab8771b27b3d9c1db6492d8eefc3a |
02-Jul-2010 |
Dan Gohman <gohman@apple.com> |
Rename CreateReg to CreateRegs, and MakeReg to CreateReg.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107451 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
unctionLoweringInfo.cpp
unctionLoweringInfo.h
electionDAGBuilder.cpp
electionDAGISel.cpp
|
| 21baf9a969a3edf80b3bc5206308963ee7ed93fb |
01-Jul-2010 |
Dan Gohman <gohman@apple.com> |
Temporarily disable on-demand fast-isel.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107393 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 63b95a6f820d768797b28bbfd5c12fabf74b7f1d |
01-Jul-2010 |
Dan Gohman <gohman@apple.com> |
Temporarily disable on-demand fast-isel.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107393 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 4852d8012f8dd3f14a3c1f2c5a21d2e09ff0b6af |
01-Jul-2010 |
Dan Gohman <gohman@apple.com> |
Use FuncInfo's isExportedInst accessor method instead of
doing the work manually.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107384 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| c6f00e701e744fdf73508d47ff0cc75817ba8474 |
01-Jul-2010 |
Dan Gohman <gohman@apple.com> |
Use FuncInfo's isExportedInst accessor method instead of
doing the work manually.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107384 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| da3b71300d42cc705f31a4382f6d9a3a36ea450f |
01-Jul-2010 |
Dan Gohman <gohman@apple.com> |
Rename CreateRegForValue to CreateReg, and change its argument
from a Value to a Type, because it doesn't actually care about
the Value.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107383 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
unctionLoweringInfo.cpp
unctionLoweringInfo.h
electionDAGBuilder.cpp
electionDAGISel.cpp
|
| ffda6bac113d4c079b534b1bfa7aea5498ee3e83 |
01-Jul-2010 |
Dan Gohman <gohman@apple.com> |
Rename CreateRegForValue to CreateReg, and change its argument
from a Value to a Type, because it doesn't actually care about
the Value.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107383 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
unctionLoweringInfo.cpp
unctionLoweringInfo.h
electionDAGBuilder.cpp
electionDAGISel.cpp
|
| ece06e65c9d40925651216845e0d731d5365d2e3 |
01-Jul-2010 |
Dan Gohman <gohman@apple.com> |
Teach fast-isel to avoid loading a value from memory when it's already
available in a register. This is pretty primitive, but it reduces the
number of instructions in common testcases by 4%.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107380 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
|
| 7fbcc98f20c062273bf16ce9832f40e5b8a205c6 |
01-Jul-2010 |
Dan Gohman <gohman@apple.com> |
Teach fast-isel to avoid loading a value from memory when it's already
available in a register. This is pretty primitive, but it reduces the
number of instructions in common testcases by 4%.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107380 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
|
| ab845e29e214cb54adaa26e719fc498eb4e7ec90 |
01-Jul-2010 |
Dan Gohman <gohman@apple.com> |
Enable on-demand fast-isel.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107377 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
electionDAGISel.cpp
|
| 20d4be151b54feb18aa1e5cc04033a4aa64137ae |
01-Jul-2010 |
Dan Gohman <gohman@apple.com> |
Enable on-demand fast-isel.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107377 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
electionDAGISel.cpp
|
| 783c3f3620fe7ba0077c078ce66fe60300325415 |
01-Jul-2010 |
Dan Gohman <gohman@apple.com> |
Reapply r106422, splitting the code for materializing a value out of
SelectionDAGBuilder::getValue into a helper function, with fixes to
use DenseMaps safely.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107371 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
electionDAGBuilder.h
|
| 28a173581c67cda78b2febd24d10edb13f760c4c |
01-Jul-2010 |
Dan Gohman <gohman@apple.com> |
Reapply r106422, splitting the code for materializing a value out of
SelectionDAGBuilder::getValue into a helper function, with fixes to
use DenseMaps safely.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107371 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
electionDAGBuilder.h
|
| d9ce03f61cea9dc486bde67a2d256611bc74ea00 |
01-Jul-2010 |
Dan Gohman <gohman@apple.com> |
Don't use operator[] here, because it's not desirable to insert a default
value if the search fails.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107368 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| c25ad637662ec24880a7eadad69b1be311ea61ae |
01-Jul-2010 |
Dan Gohman <gohman@apple.com> |
Don't use operator[] here, because it's not desirable to insert a default
value if the search fails.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107368 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| 97d5c397efa7d205f2726f903d78f312d21c3c56 |
30-Jun-2010 |
Jim Grosbach <grosbach@apple.com> |
grammar tweak in comment.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107321 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGSDNodes.cpp
|
| d27946d1d4272d7e2bbee00fac020dc8147dfd25 |
30-Jun-2010 |
Jim Grosbach <grosbach@apple.com> |
grammar tweak in comment.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107321 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGSDNodes.cpp
|
| e10f14bdfc65ef0f752c913eb41a1b6cfc9993e9 |
30-Jun-2010 |
Duncan Sands <baldrick@free.fr> |
Remove an unused variable. The call to getRoot has side-effects, so
this could break something (but doesn't seem to).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107295 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| 3f278ce9997c1885d302afb24619ee4d9c8707e5 |
30-Jun-2010 |
Duncan Sands <baldrick@free.fr> |
Remove an unused variable. The call to getRoot has side-effects, so
this could break something (but doesn't seem to).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107295 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| 27265c6024e8e030368af774a37e81d5f7b02a44 |
30-Jun-2010 |
Gabor Greif <ggreif@gmail.com> |
use ArgOperand API
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107282 91177308-0d34-0410-b5e6-96231b3b80d8
unctionLoweringInfo.cpp
|
| e767e6bbb78dae999040a6123d2314a7ed11a5c4 |
30-Jun-2010 |
Gabor Greif <ggreif@gmail.com> |
use ArgOperand API
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107282 91177308-0d34-0410-b5e6-96231b3b80d8
unctionLoweringInfo.cpp
|
| a8c1d34c5e4722e4385838f04deb50bde8a06a7f |
30-Jun-2010 |
Gabor Greif <ggreif@gmail.com> |
use ArgOperand API
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107279 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| 37387d52883ac7f99826ba627fbda9d180e6656b |
30-Jun-2010 |
Gabor Greif <ggreif@gmail.com> |
use ArgOperand API
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107279 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| dd68477a2b0c937054dce377a953e161d4db7b5f |
29-Jun-2010 |
Rafael Espindola <rafael.espindola@gmail.com> |
Add a VT argument to getMinimalPhysRegClass and replace the copy related uses
of getPhysicalRegisterRegClass with it.
If we want to make a copy (or estimate its cost), it is better to use the
smallest class as more efficient operations might be possible.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107140 91177308-0d34-0410-b5e6-96231b3b80d8
nstrEmitter.cpp
cheduleDAGFast.cpp
cheduleDAGRRList.cpp
cheduleDAGSDNodes.cpp
|
| d31f972bd33de85071c716f69bf5c6d735f730f2 |
29-Jun-2010 |
Rafael Espindola <rafael.espindola@gmail.com> |
Add a VT argument to getMinimalPhysRegClass and replace the copy related uses
of getPhysicalRegisterRegClass with it.
If we want to make a copy (or estimate its cost), it is better to use the
smallest class as more efficient operations might be possible.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107140 91177308-0d34-0410-b5e6-96231b3b80d8
nstrEmitter.cpp
cheduleDAGFast.cpp
cheduleDAGRRList.cpp
cheduleDAGSDNodes.cpp
|
| b375499e2d56fed3125a7d797ef21e03fe220176 |
29-Jun-2010 |
Duncan Sands <baldrick@free.fr> |
Remove initialized but otherwise unused variables.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107127 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| 90c64f4aac95ebfcdeb8ad78a373fdb9e61b002c |
29-Jun-2010 |
Duncan Sands <baldrick@free.fr> |
Remove initialized but otherwise unused variables.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107127 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| b52a0393a18e4e470b25c0ab40832e44aa404a48 |
29-Jun-2010 |
Bob Wilson <bob.wilson@apple.com> |
Unlike other targets, ARM now uses BUILD_VECTORs post-legalization so they
can't be changed arbitrarily by the DAGCombiner without checking if it is
running after legalization.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107097 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 8674949513837dab7efa11c8d338db4f714a244b |
29-Jun-2010 |
Bob Wilson <bob.wilson@apple.com> |
Unlike other targets, ARM now uses BUILD_VECTORs post-legalization so they
can't be changed arbitrarily by the DAGCombiner without checking if it is
running after legalization.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107097 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 0d7310c2a722fa920a8830c986d11644a48f1b5c |
29-Jun-2010 |
Dale Johannesen <dalej@apple.com> |
In asm's, output operands with matching input constraints
have to be registers, per gcc documentation. This affects
the logic for determining what "g" should lower to. PR 7393.
A couple of existing testcases are affected.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107079 91177308-0d34-0410-b5e6-96231b3b80d8
argetLowering.cpp
|
| a5989f8e222f6e2ad67704d7e8cc67c86c4d0697 |
29-Jun-2010 |
Dale Johannesen <dalej@apple.com> |
In asm's, output operands with matching input constraints
have to be registers, per gcc documentation. This affects
the logic for determining what "g" should lower to. PR 7393.
A couple of existing testcases are affected.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107079 91177308-0d34-0410-b5e6-96231b3b80d8
argetLowering.cpp
|
| 2f45a279878f7bfc2f91e64bd7aa21c0b3910582 |
26-Jun-2010 |
Rafael Espindola <rafael.espindola@gmail.com> |
When splitting a VAARG, remember its alignment.
This produces terrible but correct code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106952 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
egalizeTypesGeneric.cpp
electionDAG.cpp
|
| 72d13ff755fe8484c89468252f945ba23fe98f71 |
26-Jun-2010 |
Rafael Espindola <rafael.espindola@gmail.com> |
When splitting a VAARG, remember its alignment.
This produces terrible but correct code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106952 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
egalizeTypesGeneric.cpp
electionDAG.cpp
|
| 09f725277d18268655bf3e5e261061a54bfa1d14 |
26-Jun-2010 |
Evan Cheng <evan.cheng@apple.com> |
Change if-conversion block size limit checks to add some flexibility.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106901 91177308-0d34-0410-b5e6-96231b3b80d8
argetLowering.cpp
|
| 13151432edace19ee867a93b5c14573df4f75d24 |
26-Jun-2010 |
Evan Cheng <evan.cheng@apple.com> |
Change if-conversion block size limit checks to add some flexibility.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106901 91177308-0d34-0410-b5e6-96231b3b80d8
argetLowering.cpp
|
| a7ba9cda87adafd4fcb30902120010c21888e8f4 |
25-Jun-2010 |
Dale Johannesen <dalej@apple.com> |
The hasMemory argument is irrelevant to how the argument
for an "i" constraint should get lowered; PR 6309. While
this argument was passed around a lot, this is the only
place it was used, so it goes away from a lot of other
places.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106893 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
argetLowering.cpp
|
| 1784d160e4efa75782884d451d0788b9457e67dc |
25-Jun-2010 |
Dale Johannesen <dalej@apple.com> |
The hasMemory argument is irrelevant to how the argument
for an "i" constraint should get lowered; PR 6309. While
this argument was passed around a lot, this is the only
place it was used, so it goes away from a lot of other
places.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106893 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
argetLowering.cpp
|
| 102b00fc58d0800bf8821316133b3c908d51f904 |
25-Jun-2010 |
Duncan Sands <baldrick@free.fr> |
Remove variables which are assigned to but for which the value
is not used. Spotted by gcc-4.6.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106854 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
cheduleDAGSDNodes.cpp
electionDAG.cpp
electionDAGBuilder.cpp
|
| b447c4e65b5f6d39db16cb8fc338133965291972 |
25-Jun-2010 |
Duncan Sands <baldrick@free.fr> |
Remove variables which are assigned to but for which the value
is not used. Spotted by gcc-4.6.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106854 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
cheduleDAGSDNodes.cpp
electionDAG.cpp
electionDAGBuilder.cpp
|
| 525e20ed81a3314402b99f0dfd6c5307e809c93c |
25-Jun-2010 |
Gabor Greif <ggreif@gmail.com> |
use ArgOperand API
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106836 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| 0635f35114732cdb055ee38bad5f743e49729efa |
25-Jun-2010 |
Gabor Greif <ggreif@gmail.com> |
use ArgOperand API
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106836 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| 010139fa9acf693e4c288ab7e3a8e35e76413329 |
25-Jun-2010 |
Gabor Greif <ggreif@gmail.com> |
use ArgOperand API
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106828 91177308-0d34-0410-b5e6-96231b3b80d8
unctionLoweringInfo.cpp
|
| 1518444f0c0f7675a30f34bcf58e8cef21d37c80 |
25-Jun-2010 |
Gabor Greif <ggreif@gmail.com> |
use ArgOperand API
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106828 91177308-0d34-0410-b5e6-96231b3b80d8
unctionLoweringInfo.cpp
|
| ba060ceda3b40bf3ae99041d86f05d66cdb22ed9 |
25-Jun-2010 |
Gabor Greif <ggreif@gmail.com> |
prune an include
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106827 91177308-0d34-0410-b5e6-96231b3b80d8
unctionLoweringInfo.cpp
|
| d3f526c04a404aeac3a09db37d92b1f795a405ac |
25-Jun-2010 |
Gabor Greif <ggreif@gmail.com> |
prune an include
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106827 91177308-0d34-0410-b5e6-96231b3b80d8
unctionLoweringInfo.cpp
|
| 1bd8afcfb510c8b0826bc152ae72b67b4dbbcf1b |
25-Jun-2010 |
Bill Wendling <isanbard@gmail.com> |
It's possible that a flag is added to the SDNode that points back to the
original SDNode. This is badness. Also, this function allows one SDNode to point
multiple flags to another SDNode. Badness as well.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106793 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGSDNodes.cpp
|
| 10707f3b442aa5a6cc55b899d630871f06b8ebbc |
25-Jun-2010 |
Bill Wendling <isanbard@gmail.com> |
It's possible that a flag is added to the SDNode that points back to the
original SDNode. This is badness. Also, this function allows one SDNode to point
multiple flags to another SDNode. Badness as well.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106793 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGSDNodes.cpp
|
| 0f6c671f57ee4d8802cf957f32615fbb4c36c4d1 |
24-Jun-2010 |
Dan Gohman <gohman@apple.com> |
Simplify this code; switch lowering shouldn't produce cases
which trivially fold away.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106765 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| deca052d9d1d1303854a1c9617c383aa6c58ba0b |
24-Jun-2010 |
Dan Gohman <gohman@apple.com> |
Simplify this code; switch lowering shouldn't produce cases
which trivially fold away.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106765 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| cb26983c363c82f2568f7ee27030429d9b011445 |
24-Jun-2010 |
Dan Gohman <gohman@apple.com> |
Eliminate the other half of the BRCOND optimization, and update
as many tests as possible.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106749 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| ee1c8707789ac540ca2d0037d397f39fa91e7571 |
24-Jun-2010 |
Dan Gohman <gohman@apple.com> |
Eliminate the other half of the BRCOND optimization, and update
as many tests as possible.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106749 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| a74a6cc09492bbf519b12d61597e60cd5daf6834 |
24-Jun-2010 |
Dan Gohman <gohman@apple.com> |
Eliminate the first have of the optimization which eliminates BRCOND
when the condition is constant. This optimization shouldn't be
necessary, because codegen shouldn't be able to find dead control
paths that the IR-level optimizer can't find. And it's undesirable,
because it encourages bugpoint to leave "br i1 false" branches
in its output. And it wasn't updating the CFG.
I updated all the tests I could, but some tests are too reduced
and I wasn't able to meaningfully preserve them.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106748 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 102f3851bbde16fdd826d072240731365fe6da5d |
24-Jun-2010 |
Dan Gohman <gohman@apple.com> |
Eliminate the first have of the optimization which eliminates BRCOND
when the condition is constant. This optimization shouldn't be
necessary, because codegen shouldn't be able to find dead control
paths that the IR-level optimizer can't find. And it's undesirable,
because it encourages bugpoint to leave "br i1 false" branches
in its output. And it wasn't updating the CFG.
I updated all the tests I could, but some tests are too reduced
and I wasn't able to meaningfully preserve them.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106748 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 50fbd4f02314b827bc855a82b8556755ba292edd |
24-Jun-2010 |
Dan Gohman <gohman@apple.com> |
Reapply r106634, now that the bug it exposed is fixed.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106746 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
electionDAG.cpp
electionDAGISel.cpp
argetLowering.cpp
|
| 4e39e9da0f3a435445261d0f796bb0913f3c2bf0 |
24-Jun-2010 |
Dan Gohman <gohman@apple.com> |
Reapply r106634, now that the bug it exposed is fixed.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106746 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
electionDAG.cpp
electionDAGISel.cpp
argetLowering.cpp
|
| a2375554a0236fc056f8cdb659890bcf81f24a6b |
24-Jun-2010 |
Dan Gohman <gohman@apple.com> |
Optimize the "bit test" code path for switch lowering in the
case where the bit mask has exactly one bit.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106716 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| 8e0163ac1e8fcf0f8d2340d65439edef8230b01c |
24-Jun-2010 |
Dan Gohman <gohman@apple.com> |
Optimize the "bit test" code path for switch lowering in the
case where the bit mask has exactly one bit.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106716 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| 053ba0aaa534280f122b7f2e56efbf6dc831b662 |
23-Jun-2010 |
Bill Wendling <isanbard@gmail.com> |
MorphNodeTo doesn't preserve the memory operands. Because we're morphing a node
into the same node, but with different non-memory operands, we need to replace
the memory operands after it's finished morphing.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106643 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGSDNodes.cpp
|
| 151d26d15dc6fe89329d7cccb0638c324c58f485 |
23-Jun-2010 |
Bill Wendling <isanbard@gmail.com> |
MorphNodeTo doesn't preserve the memory operands. Because we're morphing a node
into the same node, but with different non-memory operands, we need to replace
the memory operands after it's finished morphing.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106643 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGSDNodes.cpp
|
| 2c14c912df3540b365db73cbc8a69a0cbf5ca116 |
23-Jun-2010 |
Daniel Dunbar <daniel@zuster.org> |
Revert r106263, "Fold the ShrinkDemandedOps pass into the regular DAGCombiner pass,"... it was causing both 'file' (with clang) and 176.gcc (with llvm-gcc) to be miscompiled.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106634 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
electionDAG.cpp
electionDAGISel.cpp
argetLowering.cpp
|
| cbe762b5d165c565feb98b745e93b71d208a1e36 |
23-Jun-2010 |
Daniel Dunbar <daniel@zuster.org> |
Revert r106263, "Fold the ShrinkDemandedOps pass into the regular DAGCombiner pass,"... it was causing both 'file' (with clang) and 176.gcc (with llvm-gcc) to be miscompiled.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106634 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
electionDAG.cpp
electionDAGISel.cpp
argetLowering.cpp
|
| c0e1bf49809893f4289118ef063f38958fd73ee9 |
23-Jun-2010 |
Jim Grosbach <grosbach@apple.com> |
Some targets don't require the fencing MEMBARRIER instructions surrounding
atomic intrinsics, either because the use locking instructions for the
atomics, or because they perform the locking directly. Add support in the
DAG combiner to fold away the fences.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106630 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
argetLowering.cpp
|
| 9a526495e0c06c4014d7500788cad1929fd244d3 |
23-Jun-2010 |
Jim Grosbach <grosbach@apple.com> |
Some targets don't require the fencing MEMBARRIER instructions surrounding
atomic intrinsics, either because the use locking instructions for the
atomics, or because they perform the locking directly. Add support in the
DAG combiner to fold away the fences.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106630 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
argetLowering.cpp
|
| b93b42ae0b0dfe7a60d8e6cd703cda7d29ec18e8 |
21-Jun-2010 |
Dan Gohman <gohman@apple.com> |
Use A.append(...) instead of A.insert(A.end(), ...) when A is a
SmallVector, and other SmallVector simplifications.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106452 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeTypes.cpp
cheduleDAGSDNodes.cpp
electionDAG.cpp
|
| 403a8cdda5e76ea689693de16474650b4b0df818 |
21-Jun-2010 |
Dan Gohman <gohman@apple.com> |
Use A.append(...) instead of A.insert(A.end(), ...) when A is a
SmallVector, and other SmallVector simplifications.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106452 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeTypes.cpp
cheduleDAGSDNodes.cpp
electionDAG.cpp
|
| 3185f47524babd9241b0c4a32450cafd0395b1c4 |
21-Jun-2010 |
Dan Gohman <gohman@apple.com> |
Revert r106422, which is breaking the non-fast-isel path.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106423 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
electionDAGBuilder.h
|
| c7bd7b7f12f3df9f03f84eff45e8266446c54936 |
21-Jun-2010 |
Dan Gohman <gohman@apple.com> |
Revert r106422, which is breaking the non-fast-isel path.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106423 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
electionDAGBuilder.h
|
| 277695c78cd0b56fdfbbffa142e2c49b5a6ca098 |
21-Jun-2010 |
Dan Gohman <gohman@apple.com> |
More changes for non-top-down fast-isel.
Split the code for materializing a value out of
SelectionDAGBuilder::getValue into a helper function, so that it can
be used in other ways. Add a new getNonRegisterValue function which
uses it, for use in code which doesn't want a CopyFromReg even
when FuncMap.ValueMap already has an entry for it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106422 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
electionDAGBuilder.h
|
| faeb0e744838553e6c46dab0ff3f9d8fc41fc766 |
21-Jun-2010 |
Dan Gohman <gohman@apple.com> |
More changes for non-top-down fast-isel.
Split the code for materializing a value out of
SelectionDAGBuilder::getValue into a helper function, so that it can
be used in other ways. Add a new getNonRegisterValue function which
uses it, for use in code which doesn't want a CopyFromReg even
when FuncMap.ValueMap already has an entry for it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106422 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
electionDAGBuilder.h
|
| 3eb49aec27e9f475d7d32afba0f796e4516ecc90 |
21-Jun-2010 |
Dan Gohman <gohman@apple.com> |
Do one lookup instead of two.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106415 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
|
| 3193a689db3de8640d412ccd9482301647359a4e |
21-Jun-2010 |
Dan Gohman <gohman@apple.com> |
Do one lookup instead of two.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106415 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
|
| fb8fc280c2ca288e1aeceedbff0b91ec44c00791 |
21-Jun-2010 |
Dan Gohman <gohman@apple.com> |
Generalize this to look in the regular ValueMap in addition to
the LocalValueMap, to make it more flexible when fast-isel isn't
proceding straight top-down.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106414 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
|
| 37db6cdaea47d0637bdbe624f7b10ff8f82928ad |
21-Jun-2010 |
Dan Gohman <gohman@apple.com> |
Generalize this to look in the regular ValueMap in addition to
the LocalValueMap, to make it more flexible when fast-isel isn't
proceding straight top-down.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106414 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
|
| fdeb393caefd0e169d3195892e8c220a1688372a |
19-Jun-2010 |
Dan Gohman <gohman@apple.com> |
Teach regular and fast isel to set dead flags on unused implicit defs
on calls and similar instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106353 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
nstrEmitter.cpp
|
| db4971259ce94cea26e555e9ade82672a3581f5c |
19-Jun-2010 |
Dan Gohman <gohman@apple.com> |
Teach regular and fast isel to set dead flags on unused implicit defs
on calls and similar instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106353 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
nstrEmitter.cpp
|
| dd67159ea024c078f6c9f3c41bc400b1f3f2f6e1 |
19-Jun-2010 |
Jim Grosbach <grosbach@apple.com> |
back-end libcall handling for ATOMIC_SWAP (__sync_lock_test_and_set)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106342 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
argetLowering.cpp
|
| ef6eb9c7ab7967790566c5e2d47977d89fc060ee |
19-Jun-2010 |
Jim Grosbach <grosbach@apple.com> |
back-end libcall handling for ATOMIC_SWAP (__sync_lock_test_and_set)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106342 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
argetLowering.cpp
|
| 0575fadf6350cdfeec42797a029617dced4ac3f4 |
19-Jun-2010 |
Evan Cheng <evan.cheng@apple.com> |
Fix cross initialization compilation error.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106324 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| a845706dc1cebfe75913832e07ef114519a879d6 |
19-Jun-2010 |
Evan Cheng <evan.cheng@apple.com> |
Fix cross initialization compilation error.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106324 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 9157197823bde76c883b180dd5b76e6893c24b00 |
18-Jun-2010 |
Jim Grosbach <grosbach@apple.com> |
Add Expand-to-libcall support for additional atomics. This covers the usual
entries used by llvm-gcc. *_[U]MIN and such can be added later if needed.
This enables the front ends to simplify handling of the atomic intrinsics by
removing the target-specific decision about which targets can handle the
intrinsics.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106321 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
argetLowering.cpp
|
| e03262fcfc09356a0e3ec589041bc2e0248944e9 |
18-Jun-2010 |
Jim Grosbach <grosbach@apple.com> |
Add Expand-to-libcall support for additional atomics. This covers the usual
entries used by llvm-gcc. *_[U]MIN and such can be added later if needed.
This enables the front ends to simplify handling of the atomic intrinsics by
removing the target-specific decision about which targets can handle the
intrinsics.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106321 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
argetLowering.cpp
|
| 5f946e25b216f2f9705c23eb5a3a03af5c39792d |
18-Jun-2010 |
Dan Gohman <gohman@apple.com> |
Minor code simplifications.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106286 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 927f866105fa29feb32c050ee823d60c2509ec76 |
18-Jun-2010 |
Dan Gohman <gohman@apple.com> |
Minor code simplifications.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106286 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| e2a9508b0f0ac87d802ef01aa8038846c2ef7976 |
18-Jun-2010 |
Dan Gohman <gohman@apple.com> |
Give NamedRegionTimer an Enabled flag, allowing all its clients to
switch from this:
if (TimePassesIsEnabled) {
NamedRegionTimer T(Name, GroupName);
do_something();
} else {
do_something(); // duplicate the code, this time without a timer!
}
to this:
{
NamedRegionTimer T(Name, GroupName, TimePassesIsEnabled);
do_something();
}
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106285 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 03c3dc7b6828d48a9f3be50896b3390a696caa64 |
18-Jun-2010 |
Dan Gohman <gohman@apple.com> |
Give NamedRegionTimer an Enabled flag, allowing all its clients to
switch from this:
if (TimePassesIsEnabled) {
NamedRegionTimer T(Name, GroupName);
do_something();
} else {
do_something(); // duplicate the code, this time without a timer!
}
to this:
{
NamedRegionTimer T(Name, GroupName, TimePassesIsEnabled);
do_something();
}
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106285 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 84ba6fadbac7620809a99ab7c637de49d16ee63e |
18-Jun-2010 |
Dan Gohman <gohman@apple.com> |
Don't replace the old Ordering object with a new one; just clear()
the old one.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106284 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 27445f0375ae01652c08569c7843bddc95cedd61 |
18-Jun-2010 |
Dan Gohman <gohman@apple.com> |
Don't replace the old Ordering object with a new one; just clear()
the old one.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106284 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 23cb629501cb8a9881c02bd7adc3bb03a0984fa3 |
18-Jun-2010 |
Dan Gohman <gohman@apple.com> |
Don't call clear() on DbgInfo when it's going to be deleted anyway.
Don't replace the old DbgInfo with a new one when clear() on the
old one is sufficient.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106283 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| c97df860dd8172077c9b3b086c192f1b05365699 |
18-Jun-2010 |
Dan Gohman <gohman@apple.com> |
Don't call clear() on DbgInfo when it's going to be deleted anyway.
Don't replace the old DbgInfo with a new one when clear() on the
old one is sufficient.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106283 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 4e3d982962b5816515cbe36e73a9f41ed5af6673 |
18-Jun-2010 |
Dan Gohman <gohman@apple.com> |
Change UpdateNodeOperands' operand and return value from SDValue to
SDNode *, since it doesn't care about the ResNo value.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106282 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
egalizeFloatTypes.cpp
egalizeIntegerTypes.cpp
egalizeTypes.cpp
egalizeVectorOps.cpp
egalizeVectorTypes.cpp
electionDAG.cpp
|
| 027657db7cf60bcbf40403496d7e4a170f9ce1ec |
18-Jun-2010 |
Dan Gohman <gohman@apple.com> |
Change UpdateNodeOperands' operand and return value from SDValue to
SDNode *, since it doesn't care about the ResNo value.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106282 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
egalizeFloatTypes.cpp
egalizeIntegerTypes.cpp
egalizeTypes.cpp
egalizeVectorOps.cpp
egalizeVectorTypes.cpp
electionDAG.cpp
|
| bcc946d7409ba0d8918f4d0256090ff1a8b90392 |
18-Jun-2010 |
Dan Gohman <gohman@apple.com> |
Eliminate unnecessary uses of getZExtValue().
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106279 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
electionDAGBuilder.cpp
|
| e368b460a206fafa0d31d5d059b1779b94f7df8c |
18-Jun-2010 |
Dan Gohman <gohman@apple.com> |
Eliminate unnecessary uses of getZExtValue().
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106279 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
electionDAGBuilder.cpp
|
| 1c3b8d6192c8d27aecfbfed5eb46e2863c595aa4 |
18-Jun-2010 |
Dan Gohman <gohman@apple.com> |
isValueValidForType can be a static member function.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106278 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 7720cb3823d5b5868f9b88b0127277820edcb562 |
18-Jun-2010 |
Dan Gohman <gohman@apple.com> |
isValueValidForType can be a static member function.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106278 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| ee544cf62d01d9b70170f92b5650dcd763e6013f |
18-Jun-2010 |
Dan Gohman <gohman@apple.com> |
Fold the ShrinkDemandedOps pass into the regular DAGCombiner pass,
which is faster, simpler, and less surprising.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106263 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
electionDAG.cpp
electionDAGISel.cpp
argetLowering.cpp
|
| 8a7f7426eeb18fef58c3471db23fc829b67bc350 |
18-Jun-2010 |
Dan Gohman <gohman@apple.com> |
Fold the ShrinkDemandedOps pass into the regular DAGCombiner pass,
which is faster, simpler, and less surprising.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106263 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
electionDAG.cpp
electionDAGISel.cpp
argetLowering.cpp
|
| c0348bf891cf25a857b53fbc7eea116cef00d3da |
18-Jun-2010 |
Dan Gohman <gohman@apple.com> |
Handle ext(ext(x)) -> ext(x) immediately, since it's simple.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106256 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 9e86a735682f3f62ff79291b4673e00cf5f2385b |
18-Jun-2010 |
Dan Gohman <gohman@apple.com> |
Handle ext(ext(x)) -> ext(x) immediately, since it's simple.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106256 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 9fa5e3347d0fcd2a4626807dc2d8f7ceedf48ffd |
18-Jun-2010 |
Stuart Hastings <stuart@apple.com> |
Add a DebugLoc parameter to TargetInstrInfo::InsertBranch(). This
addresses a longstanding deficiency noted in many FIXMEs scattered
across all the targets.
This effectively moves the problem up one level, replacing eleven
FIXMEs in the targets with eight FIXMEs in CodeGen, plus one path
through FastISel where we actually supply a DebugLoc, fixing Radar
7421831.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106243 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
|
| 3bf912593301152b65accb9d9c37a95172f1df5a |
18-Jun-2010 |
Stuart Hastings <stuart@apple.com> |
Add a DebugLoc parameter to TargetInstrInfo::InsertBranch(). This
addresses a longstanding deficiency noted in many FIXMEs scattered
across all the targets.
This effectively moves the problem up one level, replacing eleven
FIXMEs in the targets with eight FIXMEs in CodeGen, plus one path
through FastISel where we actually supply a DebugLoc, fixing Radar
7421831.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106243 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
|
| ca99c62bc866adc18ff78d20e867c7f4c35f6885 |
17-Jun-2010 |
Jim Grosbach <grosbach@apple.com> |
add missing break. inconsequential as the code shouldn't be reached, but
for correctness' sake, it should be there.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106229 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 59c38f31acf87901208bbf790508196b1c0ad1fd |
17-Jun-2010 |
Jim Grosbach <grosbach@apple.com> |
add missing break. inconsequential as the code shouldn't be reached, but
for correctness' sake, it should be there.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106229 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 7f31562a65a7245f4ada75d6e30c9ecb74ebcd5d |
17-Jun-2010 |
Jim Grosbach <grosbach@apple.com> |
Add entries for Expanding atomic intrinsics to libcalls. Just a placeholder
for the moment. The implementation of the libcall will follow.
Currently, the llvm-gcc knows when the intrinsics can be correctly handled by
the back end and only generates them in those cases, issuing libcalls directly
otherwise. That's too much coupling. The intrinsics should always be
generated and the back end decide how to handle them, be it with a libcall,
inline code, or whatever. This patch is a step in that direction.
rdar://8097623
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106227 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| b56ce8171ec52f44015d95127faaa7dd4ed92763 |
17-Jun-2010 |
Jim Grosbach <grosbach@apple.com> |
Add entries for Expanding atomic intrinsics to libcalls. Just a placeholder
for the moment. The implementation of the libcall will follow.
Currently, the llvm-gcc knows when the intrinsics can be correctly handled by
the back end and only generates them in those cases, issuing libcalls directly
otherwise. That's too much coupling. The intrinsics should always be
generated and the back end decide how to handle them, be it with a libcall,
inline code, or whatever. This patch is a step in that direction.
rdar://8097623
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106227 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 8122b0391df729cb15600c0df73331070c912ba9 |
17-Jun-2010 |
Jim Grosbach <grosbach@apple.com> |
ISD::MEMBARRIER should lower to a libcall (__sync_synchronize) if the target
sets the legalize action to Expand.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106203 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| bbfc0d22a9a8e197a5ea428f14d37366a1fadd5f |
17-Jun-2010 |
Jim Grosbach <grosbach@apple.com> |
ISD::MEMBARRIER should lower to a libcall (__sync_synchronize) if the target
sets the legalize action to Expand.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106203 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| fac0ffebe509898a3b97b01d483a02a68417cc62 |
15-Jun-2010 |
Mon P Wang <wangmp@apple.com> |
Fixed vector widening of binary instructions that can trap. Patch by Visa Putkinen!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106038 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeVectorTypes.cpp
|
| 9c4a84b4f38790a74d2e4c95870e27e71a79e326 |
15-Jun-2010 |
Mon P Wang <wangmp@apple.com> |
Fixed vector widening of binary instructions that can trap. Patch by Visa Putkinen!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106038 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeVectorTypes.cpp
|
| 6bc6e42f47edc5a46345db00719186806367d035 |
10-Jun-2010 |
Evan Cheng <evan.cheng@apple.com> |
Code refactoring, no functionality changes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105775 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGSDNodes.cpp
cheduleDAGSDNodes.h
|
| 302ef834e0a2fd03e4b435079a9fa6c1e1cdc23b |
10-Jun-2010 |
Evan Cheng <evan.cheng@apple.com> |
Code refactoring, no functionality changes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105775 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGSDNodes.cpp
cheduleDAGSDNodes.h
|
| 582cfd2c7045bedf00235368b74bf6351391cc7d |
09-Jun-2010 |
Jakob Stoklund Olesen <stoklund@2pi.dk> |
Mark physregs defined by inline asm as implicit.
This is a bit of a hack to make inline asm look more like call instructions.
It would be better to produce correct dead flags during isel.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105749 91177308-0d34-0410-b5e6-96231b3b80d8
nstrEmitter.cpp
|
| 3013a2068421335304dce861dd5977e8cf43cbca |
09-Jun-2010 |
Jakob Stoklund Olesen <stoklund@2pi.dk> |
Mark physregs defined by inline asm as implicit.
This is a bit of a hack to make inline asm look more like call instructions.
It would be better to produce correct dead flags during isel.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105749 91177308-0d34-0410-b5e6-96231b3b80d8
nstrEmitter.cpp
|
| 818eeea70b328917317b5eca6a352f830565587d |
09-Jun-2010 |
Jakob Stoklund Olesen <stoklund@2pi.dk> |
Add argument name comments.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105665 91177308-0d34-0410-b5e6-96231b3b80d8
nstrEmitter.cpp
|
| c3c2517fed43457fed8c2e891556866dba5b83cf |
09-Jun-2010 |
Jakob Stoklund Olesen <stoklund@2pi.dk> |
Add argument name comments.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105665 91177308-0d34-0410-b5e6-96231b3b80d8
nstrEmitter.cpp
|
| 28188e1c4986d9e4985f0f4a8ce268743eb94631 |
08-Jun-2010 |
Shih-wei Liao <sliao@google.com> |
Git hiccup. Retry....
Change-Id: I5a329137a43f36bab32ea62386ade11da550c0b0
ndroid.mk
|
| c156bc696311928af01132d159b9e307436779bb |
08-Jun-2010 |
Shih-wei Liao <sliao@google.com> |
Fix llvm.mk and the other 49 mk files
Change-Id: I5aa02363c1083297d163a575f5a35c495f950230
ndroid.mk
|
| 58929fc959f84e379f40ae9c6e8c436dadc7b0cd |
04-Jun-2010 |
Mon P Wang <wangmp@apple.com> |
Fixed a bug during widening where we would avoid legalizing a node. When we
replace an OpA with a widened OpB, it is possible to get new uses of OpA due to CSE
when recursively updating nodes. Since OpA has been processed, the new uses are
not examined again. The patch checks if this occurred and it it did, updates the
new uses of OpA to use OpB.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105453 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeTypes.cpp
|
| f62546ab046d4bc2f055921f25f127fbb942b806 |
04-Jun-2010 |
Mon P Wang <wangmp@apple.com> |
Fixed a bug during widening where we would avoid legalizing a node. When we
replace an OpA with a widened OpB, it is possible to get new uses of OpA due to CSE
when recursively updating nodes. Since OpA has been processed, the new uses are
not examined again. The patch checks if this occurred and it it did, updates the
new uses of OpA to use OpB.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105453 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeTypes.cpp
|
| 8101682108a26049367567a8fbc0ecaf7307481b |
03-Jun-2010 |
Dan Gohman <gohman@apple.com> |
Fix SimplifyDemandedBits' AssertZext logic to demand all the bits. It
needs to demand the high bits because it's asserting that they're zero.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105406 91177308-0d34-0410-b5e6-96231b3b80d8
argetLowering.cpp
|
| 400f75cb5ed39ab4f071f78f6a26beefbc8a46f0 |
03-Jun-2010 |
Dan Gohman <gohman@apple.com> |
Fix SimplifyDemandedBits' AssertZext logic to demand all the bits. It
needs to demand the high bits because it's asserting that they're zero.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105406 91177308-0d34-0410-b5e6-96231b3b80d8
argetLowering.cpp
|
| 64d4b7c572c6b6a711dfdcd62a7919ba3c4665b9 |
03-Jun-2010 |
Eli Friedman <eli.friedman@gmail.com> |
Implement expansion in type legalization for add/sub with overflow. The
expansion is the same as that used by LegalizeDAG.
The resulting code sucks in terms of performance/codesize on x86-32 for a
64-bit operation; I haven't looked into whether different expansions might be
better in general.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105378 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeIntegerTypes.cpp
egalizeTypes.h
|
| 268637ed0f34e10e4125e94c44ff3e2975a19166 |
03-Jun-2010 |
Eli Friedman <eli.friedman@gmail.com> |
Implement expansion in type legalization for add/sub with overflow. The
expansion is the same as that used by LegalizeDAG.
The resulting code sucks in terms of performance/codesize on x86-32 for a
64-bit operation; I haven't looked into whether different expansions might be
better in general.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105378 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeIntegerTypes.cpp
egalizeTypes.h
|
| 90b1ad99c727ad747cd53df6b711bb0085e0431b |
01-Jun-2010 |
Devang Patel <dpatel@apple.com> |
Keep track of incoming debug value of unused argument.
Radar 7927666.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105285 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
electionDAGBuilder.h
|
| 9126c0d42a5176e5865171713fae4a62e3c69912 |
01-Jun-2010 |
Devang Patel <dpatel@apple.com> |
Keep track of incoming debug value of unused argument.
Radar 7927666.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105285 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
electionDAGBuilder.h
|
| 47fa62aff11934bcf792a38f629e430449bac7e3 |
01-Jun-2010 |
Dan Gohman <gohman@apple.com> |
Fill in missing support for ISD::FEXP, ISD::FPOWI, and friends.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105283 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeTypes.h
egalizeVectorTypes.cpp
electionDAG.cpp
|
| 956b3490349019163d1d12bb42b82f7e1fcc20ee |
01-Jun-2010 |
Dan Gohman <gohman@apple.com> |
Fill in missing support for ISD::FEXP, ISD::FPOWI, and friends.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105283 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeTypes.h
egalizeVectorTypes.cpp
electionDAG.cpp
|
| 86ac7a2df2f4a98d1ccf3460e9a0d6e13acdc868 |
31-May-2010 |
Chris Lattner <sabre@nondot.org> |
fix PR6623: when optimizing for size, don't inline memcpy/memsets
that are too large. This causes the freebsd bootloader to be too
large apparently.
It's unclear if this should be an -Os or -Oz thing. Thoughts welcome.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105228 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 6c41ad8c9a93668c481436fc4a5e47e6f14776e7 |
31-May-2010 |
Chris Lattner <sabre@nondot.org> |
fix PR6623: when optimizing for size, don't inline memcpy/memsets
that are too large. This causes the freebsd bootloader to be too
large apparently.
It's unclear if this should be an -Os or -Oz thing. Thoughts welcome.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105228 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| be18530bad23c05d0ef862de176751393662e6ac |
31-May-2010 |
Chris Lattner <sabre@nondot.org> |
the 'limit' argument to FindOptimalMemOpLowering is unsigned, not uint64_t.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105226 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 6b378618273bab1ee64c5034f4fd8e8338b7110f |
31-May-2010 |
Chris Lattner <sabre@nondot.org> |
the 'limit' argument to FindOptimalMemOpLowering is unsigned, not uint64_t.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105226 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 7d2325fdbbbfe925bbaebfbcca6faae7619f3d02 |
30-May-2010 |
Oscar Fuentes <ofv@wanadoo.es> |
Use `llvm::next' instead of `next' to make VC++ 2010 happy.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105168 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGRRList.cpp
|
| 10e02a017a877b750d4cdf0ebf11b90dee5e0d61 |
30-May-2010 |
Oscar Fuentes <ofv@wanadoo.es> |
Use `llvm::next' instead of `next' to make VC++ 2010 happy.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105168 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGRRList.cpp
|
| 65320320ae39d7b5d8f7f8257cc2875572832c78 |
29-May-2010 |
Dan Gohman <gohman@apple.com> |
Reorder some code in SelectionDAGBuilder.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105105 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| 462f6b57b6276502e1279d0e508c0b9fc24feb50 |
29-May-2010 |
Dan Gohman <gohman@apple.com> |
Reorder some code in SelectionDAGBuilder.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105105 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| f716cbbdbfbcb9cdf736cbaa22a08d7fa3023b23 |
29-May-2010 |
Dan Gohman <gohman@apple.com> |
SelectionDAG shouldn't have a FunctionLoweringInfo member. RegsForValue
shouldn't have a TargetLoweringInfo member. And FunctionLoweringInfo::set
doesn't needs its EnableFastISel argument.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105101 91177308-0d34-0410-b5e6-96231b3b80d8
unctionLoweringInfo.cpp
unctionLoweringInfo.h
electionDAG.cpp
electionDAGBuilder.cpp
electionDAGISel.cpp
|
| 7451d3e09d26115195280ba36f686a0a90815089 |
29-May-2010 |
Dan Gohman <gohman@apple.com> |
SelectionDAG shouldn't have a FunctionLoweringInfo member. RegsForValue
shouldn't have a TargetLoweringInfo member. And FunctionLoweringInfo::set
doesn't needs its EnableFastISel argument.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105101 91177308-0d34-0410-b5e6-96231b3b80d8
unctionLoweringInfo.cpp
unctionLoweringInfo.h
electionDAG.cpp
electionDAGBuilder.cpp
electionDAGISel.cpp
|
| c5c2c5f54202791a3a853cd8ae5c2dbfd9d3f930 |
29-May-2010 |
Evan Cheng <evan.cheng@apple.com> |
Fix some latency computation bugs: if the use is not a machine opcode do not just return zero.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105061 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGRRList.cpp
cheduleDAGSDNodes.cpp
|
| 046fa3f90a31ebfa10df89ae348f478d492709a9 |
29-May-2010 |
Evan Cheng <evan.cheng@apple.com> |
Fix some latency computation bugs: if the use is not a machine opcode do not just return zero.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105061 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGRRList.cpp
cheduleDAGSDNodes.cpp
|
| 3eb67d59fcf724e8345fb783b1b891e31dcfc151 |
28-May-2010 |
Dan Gohman <gohman@apple.com> |
Eliminate the restriction that the array size in an alloca must be i32.
This will help reduce the amount of casting required on 64-bit targets.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104911 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| f75a7d3fbf7fbb3071f45e248d3fb93312ec4fbd |
28-May-2010 |
Dan Gohman <gohman@apple.com> |
Eliminate the restriction that the array size in an alloca must be i32.
This will help reduce the amount of casting required on 64-bit targets.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104911 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| 1f2914c7abfcd183e1a4bd74d5378c0b4a92b0e6 |
28-May-2010 |
Jim Grosbach <grosbach@apple.com> |
Update the saved stack pointer in the sjlj function context following either
an alloca() or an llvm.stackrestore(). rdar://8031573
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104900 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 0798eddd07b8dc827a4e6e9028c4c3a8d9444286 |
28-May-2010 |
Jim Grosbach <grosbach@apple.com> |
Update the saved stack pointer in the sjlj function context following either
an alloca() or an llvm.stackrestore(). rdar://8031573
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104900 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| ae810412a11fc5c29b2e0c452bccf28d41263528 |
28-May-2010 |
Jim Grosbach <grosbach@apple.com> |
back out 104862/104869. Can reuse stacksave after all. Very cool.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104897 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| a65850230af7f13d9111450f645886b968dea2a2 |
28-May-2010 |
Jim Grosbach <grosbach@apple.com> |
back out 104862/104869. Can reuse stacksave after all. Very cool.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104897 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| 92eafd90273fe162d82b1927d2c237f6b5e0ce64 |
27-May-2010 |
Jim Grosbach <grosbach@apple.com> |
hook ISD::STACKADDR to an intrinsic
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104869 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| 084fb0ea3246300aa81dd2561ce4d84401b74792 |
27-May-2010 |
Jim Grosbach <grosbach@apple.com> |
hook ISD::STACKADDR to an intrinsic
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104869 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| 6c198f7fc668ee28ee378728a94bfc66ec312299 |
26-May-2010 |
Bill Wendling <isanbard@gmail.com> |
Add FIXME comment to remove this.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104749 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 804a231dd5b064006a252f67fe27abced0827ac8 |
26-May-2010 |
Bill Wendling <isanbard@gmail.com> |
Add FIXME comment to remove this.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104749 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 983da3c173bb3d1cf51d93f5d6b821dbfd838425 |
26-May-2010 |
Bill Wendling <isanbard@gmail.com> |
Add "setjmp_syscall", "savectx", "qsetjmp", "vfork", "getcontext" to the list of
usual suspects that could "return twice".
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104737 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 8d717c7d999231c8c54601720b08cd3eecf6d518 |
26-May-2010 |
Bill Wendling <isanbard@gmail.com> |
Add "setjmp_syscall", "savectx", "qsetjmp", "vfork", "getcontext" to the list of
usual suspects that could "return twice".
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104737 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| cc38a49327e841070b34fe1a92c1191a791887bb |
26-May-2010 |
Jim Grosbach <grosbach@apple.com> |
Adjust eh.sjlj.setjmp to properly have a chain and to have an opcode entry in
ISD::. No functional change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104734 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
electionDAGBuilder.cpp
|
| 23ff7cff52702a8bff904d8ab4c9ca67cc19d6ca |
26-May-2010 |
Jim Grosbach <grosbach@apple.com> |
Adjust eh.sjlj.setjmp to properly have a chain and to have an opcode entry in
ISD::. No functional change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104734 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
electionDAGBuilder.cpp
|
| 4d92eb87021611d02189876ca49c39effa250423 |
26-May-2010 |
Devang Patel <dpatel@apple.com> |
Update debug info when live-in reg is copied into a vreg.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104732 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 394427b014a7126e56f3ee411993f08677d93c83 |
26-May-2010 |
Devang Patel <dpatel@apple.com> |
Update debug info when live-in reg is copied into a vreg.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104732 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 0b1ce962a2a8684fc22012e7e31c899c00bbc6e9 |
26-May-2010 |
Bill Wendling <isanbard@gmail.com> |
Move the check for "calls setjmp" to SelectionDAGISel so that it can be used by
more than just the stack slot coloring algorithm.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104722 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 9af7e9a1b5fb04ba677059ada9290cd3864523b2 |
26-May-2010 |
Bill Wendling <isanbard@gmail.com> |
Move the check for "calls setjmp" to SelectionDAGISel so that it can be used by
more than just the stack slot coloring algorithm.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104722 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 79a689415e4c8f0482a0b4281065f3e8d15a6f30 |
26-May-2010 |
Dan Gohman <gohman@apple.com> |
Eliminate the use of PriorityQueue and just use a std::vector,
implementing pop with a linear search for a "best" element. The priority
queue was a neat idea, but in practice the comparison functions depend
on dynamic information.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104718 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGRRList.cpp
|
| 93d343357944beb701d425fc7ef00dd7b0a32bd7 |
26-May-2010 |
Dan Gohman <gohman@apple.com> |
Eliminate the use of PriorityQueue and just use a std::vector,
implementing pop with a linear search for a "best" element. The priority
queue was a neat idea, but in practice the comparison functions depend
on dynamic information.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104718 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGRRList.cpp
|
| cfa89e2af22dab62b8e4fc8cd459a8d8a075b659 |
26-May-2010 |
Dan Gohman <gohman@apple.com> |
Delete an unused function.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104716 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGRRList.cpp
|
| d89c2580510b8f79394039987f0ad84dee903e59 |
26-May-2010 |
Dan Gohman <gohman@apple.com> |
Delete an unused function.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104716 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGRRList.cpp
|
| c157e6c2e69bb0e0fdda6f5e51742e003b7c882f |
26-May-2010 |
Eric Christopher <echristo@apple.com> |
Temporarily revert r104655 as it's breaking the bots.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104664 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 174e597d466547d34cf8fcd2a95976e0cf5ebbac |
26-May-2010 |
Eric Christopher <echristo@apple.com> |
Temporarily revert r104655 as it's breaking the bots.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104664 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| fb562b309c80b8f531ac88325f0774eac3456a89 |
26-May-2010 |
Dan Gohman <gohman@apple.com> |
Change push_all to a non-virtual function and implement it in the
base class, since all the implementations are the same.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104659 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGRRList.cpp
|
| a4e4ffd389497eb28f5fe91521fb71da4340e5d6 |
26-May-2010 |
Dan Gohman <gohman@apple.com> |
Change push_all to a non-virtual function and implement it in the
base class, since all the implementations are the same.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104659 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGRRList.cpp
|
| 5cb0f94be447245a2106b50e5432df353c89ee01 |
26-May-2010 |
Dan Gohman <gohman@apple.com> |
Trim #include.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104657 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGList.cpp
|
| 5eabaa2d7c001d801a36d76affc1aa257ca2975c |
26-May-2010 |
Dan Gohman <gohman@apple.com> |
Trim #include.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104657 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGList.cpp
|
| ae3b4c328e882f4a9db6f10af73b106cb14a3290 |
26-May-2010 |
Bill Wendling <isanbard@gmail.com> |
Dale and Evan suggested putting the "check for setjmp" much earlier in the
machine code generation. That's a good idea, so I made it so.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104655 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| be22683202731127a5128db8be404edcee91defd |
26-May-2010 |
Bill Wendling <isanbard@gmail.com> |
Dale and Evan suggested putting the "check for setjmp" much earlier in the
machine code generation. That's a good idea, so I made it so.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104655 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| b52ad0ebb4e4dcb826bd7076bf05fec738be3603 |
25-May-2010 |
Dan Gohman <gohman@apple.com> |
Do one map lookup instead of two.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104645 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
|
| eddc114a66b4520369e0f86ab1d3132dac2449b2 |
25-May-2010 |
Dan Gohman <gohman@apple.com> |
Do one map lookup instead of two.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104645 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
|
| a31ed7f5ec684073b38e1b0ee9d7c45d3137e59e |
25-May-2010 |
Dale Johannesen <dalej@apple.com> |
Fix another variant of PR 7191. Also add a testcase
Mon Ping provided; unfortunately bugpoint failed to
reduce it, but I think it's important to have a test for
this in the suite. 8023512.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104624 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 86234c30a7dea821e970323df4f168b9632d0bb7 |
25-May-2010 |
Dale Johannesen <dalej@apple.com> |
Fix another variant of PR 7191. Also add a testcase
Mon Ping provided; unfortunately bugpoint failed to
reduce it, but I think it's important to have a test for
this in the suite. 8023512.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104624 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| d6ec44a21184fd239fe86118b2d10bf64ece97a4 |
25-May-2010 |
Dale Johannesen <dalej@apple.com> |
Fix PR 7191. I have been unable to create a .ll file that fails, sorry.
(oye, a word which should be better known to people writing tree
traversals, means grandchild.)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104619 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 61734eb117063b4cd2a10c2403213cedd1347a06 |
25-May-2010 |
Dale Johannesen <dalej@apple.com> |
Fix PR 7191. I have been unable to create a .ll file that fails, sorry.
(oye, a word which should be better known to people writing tree
traversals, means grandchild.)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104619 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 237b7dd26af11c4e0e8d1acc829cf12bfb50cd1a |
22-May-2010 |
Jim Grosbach <grosbach@apple.com> |
Implement eh.sjlj.longjmp for ARM. Clean up the intrinsic a bit.
Followups: docs patch for the builtin and eh.sjlj.setjmp cleanup to match
longjmp.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104419 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| 5eb195153950bc7ebfc30649494a78b2096b5ef8 |
22-May-2010 |
Jim Grosbach <grosbach@apple.com> |
Implement eh.sjlj.longjmp for ARM. Clean up the intrinsic a bit.
Followups: docs patch for the builtin and eh.sjlj.setjmp cleanup to match
longjmp.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104419 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| ed0a884c3cbc7d62e3f0bc702a9111c541e72ac7 |
22-May-2010 |
Bob Wilson <bob.wilson@apple.com> |
Clean up extra whitespace.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104410 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 70fe6643d6d16b9a1bb9560d75e60539ba93ba6b |
22-May-2010 |
Bob Wilson <bob.wilson@apple.com> |
Clean up extra whitespace.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104410 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 9c38d5ce139e13148f4db86582463a313f53cdc0 |
21-May-2010 |
Bob Wilson <bob.wilson@apple.com> |
Change CodeGen/ARM/2009-11-02-NegativeLane.ll to use 16-bit vector elements
so that it will continue to test what it was meant to test when I commit a
separate change for better support of BUILD_VECTOR and VECTOR_SHUFFLE for Neon.
Fix a DAG combiner crash exposed by this test change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104380 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 78f006acdfda52f7250929e1c2fea8afbb9a5b07 |
21-May-2010 |
Bob Wilson <bob.wilson@apple.com> |
Change CodeGen/ARM/2009-11-02-NegativeLane.ll to use 16-bit vector elements
so that it will continue to test what it was meant to test when I commit a
separate change for better support of BUILD_VECTOR and VECTOR_SHUFFLE for Neon.
Fix a DAG combiner crash exposed by this test change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104380 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 7d556e02bb8cf12313bd377fa4d7e11131031a68 |
21-May-2010 |
Evan Cheng <evan.cheng@apple.com> |
Rename -pre-RA-sched=hybrid to -pre-RA-sched=list-hybrid.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104306 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGRRList.cpp
|
| b11ac950d69c7a238de0a22fd23fbfcd994f57ee |
21-May-2010 |
Evan Cheng <evan.cheng@apple.com> |
Rename -pre-RA-sched=hybrid to -pre-RA-sched=list-hybrid.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104306 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGRRList.cpp
|
| 5373b294648bf0285621a82281f136578ba70082 |
21-May-2010 |
Evan Cheng <evan.cheng@apple.com> |
Allow targets more controls on what nodes are scheduled by reg pressure, what for latency in hybrid mode.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104293 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGRRList.cpp
cheduleDAGSDNodes.cpp
cheduleDAGSDNodes.h
|
| 1cc3984148be113c6e5e470f23c9ddbd37679c5f |
21-May-2010 |
Evan Cheng <evan.cheng@apple.com> |
Allow targets more controls on what nodes are scheduled by reg pressure, what for latency in hybrid mode.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104293 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGRRList.cpp
cheduleDAGSDNodes.cpp
cheduleDAGSDNodes.h
|
| 41294b1283bac771807eb4266ff112ae45f5dc47 |
20-May-2010 |
Evan Cheng <evan.cheng@apple.com> |
Add a hybrid bottom up scheduler that reduce register usage while avoiding
pipeline stall. It's useful for targets like ARM cortex-a8. NEON has a lot
of long latency instructions so a strict register pressure reduction
scheduler does not work well.
Early experiments show this speeds up some NEON loops by over 30%.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104216 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGRRList.cpp
cheduleDAGSDNodes.cpp
cheduleDAGSDNodes.h
electionDAGISel.cpp
|
| 15a16def6e70c8f7df1023da80ceb89887203b40 |
20-May-2010 |
Evan Cheng <evan.cheng@apple.com> |
Add a hybrid bottom up scheduler that reduce register usage while avoiding
pipeline stall. It's useful for targets like ARM cortex-a8. NEON has a lot
of long latency instructions so a strict register pressure reduction
scheduler does not work well.
Early experiments show this speeds up some NEON loops by over 30%.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104216 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGRRList.cpp
cheduleDAGSDNodes.cpp
cheduleDAGSDNodes.h
electionDAGISel.cpp
|
| c80cb51c8a4cfe1f0fade8b6d102c1cdd06ef6ee |
20-May-2010 |
Bob Wilson <bob.wilson@apple.com> |
Optimize away insertelement of an undef value. This shows up in
test/Codegen/ARM/reg_sequence.ll but it doesn't affect the generated code
because the coalescer cleans it up. Radar 7998853.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104185 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 492fd454ca3aa3d45e76c4f42b602e934cf519b1 |
20-May-2010 |
Bob Wilson <bob.wilson@apple.com> |
Optimize away insertelement of an undef value. This shows up in
test/Codegen/ARM/reg_sequence.ll but it doesn't affect the generated code
because the coalescer cleans it up. Radar 7998853.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104185 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 816cb0b9f360cbf46a6952671566e89e40c2361d |
20-May-2010 |
Evan Cheng <evan.cheng@apple.com> |
Code clean up.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104173 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGSDNodes.cpp
|
| e163168aab987dc3df0845b9e92310f764d8b158 |
20-May-2010 |
Evan Cheng <evan.cheng@apple.com> |
Code clean up.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104173 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGSDNodes.cpp
|
| a9d350eb0820423726b445a8b31dfe8b9830f6f3 |
19-May-2010 |
Evan Cheng <evan.cheng@apple.com> |
Code refactoring: pull SchedPreference enum from TargetLowering.h to TargetMachine.h and put it in its own namespace.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104147 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
argetLowering.cpp
|
| 211ffa13519cadfb7f9baf4c8447fa055bf38fe8 |
19-May-2010 |
Evan Cheng <evan.cheng@apple.com> |
Code refactoring: pull SchedPreference enum from TargetLowering.h to TargetMachine.h and put it in its own namespace.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104147 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
argetLowering.cpp
|
| 8b6ad17be11b0c0cbebe20b5a7f755b902318604 |
19-May-2010 |
Bob Wilson <bob.wilson@apple.com> |
When expanding a vector_shuffle, the element type may not be legal and may
need to be promoted. The BUILD_VECTOR and EXTRACT_VECTOR_ELT nodes generated
here already allow the promoted type to be used without further changes, so
just do the promotion. This fixes part of pr7167.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104141 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 14b2141497a913a2d5b508a0174ba09cac61e0bf |
19-May-2010 |
Bob Wilson <bob.wilson@apple.com> |
When expanding a vector_shuffle, the element type may not be legal and may
need to be promoted. The BUILD_VECTOR and EXTRACT_VECTOR_ELT nodes generated
here already allow the promoted type to be used without further changes, so
just do the promotion. This fixes part of pr7167.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104141 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 67360f8736c2d627d2eadf4f5a8c799f10df1a27 |
19-May-2010 |
Evan Cheng <evan.cheng@apple.com> |
Intrinsics which do a vector compare (results are all zero or all ones) are modeled as icmp / fcmp + sext. This is turned into a vsetcc by dag combine (yes, not a good long term solution). The targets can then isel the vsetcc to the appropriate instruction.
The trouble arises when the result of a vector cmp + sext is then and'ed with all ones. Instcombine will turn it into a vector cmp + zext, dag combiner will miss turning it into a vsetcc and hell breaks loose after that.
Teach dag combine to turn a vector cpm + zest into a vsetcc + and 1. This fixes rdar://7923010.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104094 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 0a942dbb1e0f303191639498c35e742309f08a64 |
19-May-2010 |
Evan Cheng <evan.cheng@apple.com> |
Intrinsics which do a vector compare (results are all zero or all ones) are modeled as icmp / fcmp + sext. This is turned into a vsetcc by dag combine (yes, not a good long term solution). The targets can then isel the vsetcc to the appropriate instruction.
The trouble arises when the result of a vector cmp + sext is then and'ed with all ones. Instcombine will turn it into a vector cmp + zext, dag combiner will miss turning it into a vsetcc and hell breaks loose after that.
Teach dag combine to turn a vector cpm + zest into a vsetcc + and 1. This fixes rdar://7923010.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104094 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| e0dbb624960f848bac8e74be2e78cacaaaff5357 |
18-May-2010 |
Evan Cheng <evan.cheng@apple.com> |
Sink dag combine's post index load / store code that swap base ptr and index into the target hook. Only the target knows whether the swap is safe. In Thumb2 mode, the offset must be an immediate. rdar://7998649
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104060 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 28dad2a5caccf579f7430acd3af8fa6e6f8b575e |
18-May-2010 |
Evan Cheng <evan.cheng@apple.com> |
Sink dag combine's post index load / store code that swap base ptr and index into the target hook. Only the target knows whether the swap is safe. In Thumb2 mode, the offset must be an immediate. rdar://7998649
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104060 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| dbb64e300629710c534b03122f81105666029798 |
18-May-2010 |
Evan Cheng <evan.cheng@apple.com> |
Continuously refine the register class of REG_SEQUENCE def with all the source registers and sub-register indices.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104051 91177308-0d34-0410-b5e6-96231b3b80d8
nstrEmitter.cpp
|
| 5012f9b82525121c28709ad7a2cc27818a38c213 |
18-May-2010 |
Evan Cheng <evan.cheng@apple.com> |
Continuously refine the register class of REG_SEQUENCE def with all the source registers and sub-register indices.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104051 91177308-0d34-0410-b5e6-96231b3b80d8
nstrEmitter.cpp
|
| e25ef5aed6f1dc0bb97e36b7b877004bdf3e83f8 |
18-May-2010 |
Evan Cheng <evan.cheng@apple.com> |
Fix PR7162: Use source register classes and sub-indices to determine the correct register class of the definitions of REG_SEQUENCE.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104050 91177308-0d34-0410-b5e6-96231b3b80d8
nstrEmitter.cpp
|
| 27e4840e03a6fea9f7a36a83b09a8ab7fed1a620 |
18-May-2010 |
Evan Cheng <evan.cheng@apple.com> |
Fix PR7162: Use source register classes and sub-indices to determine the correct register class of the definitions of REG_SEQUENCE.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104050 91177308-0d34-0410-b5e6-96231b3b80d8
nstrEmitter.cpp
|
| ef2f4a72b268ceb774bebddbbb4360f7dbc36b8f |
18-May-2010 |
Evan Cheng <evan.cheng@apple.com> |
FIX PR7158. SimplifyVBinOp was asserting when it fails to constant fold (op (build_vector), (build_vector)).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104004 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| a083988c8a7d57f37bfdd9d595fc3d55c60ea8ae |
18-May-2010 |
Evan Cheng <evan.cheng@apple.com> |
FIX PR7158. SimplifyVBinOp was asserting when it fails to constant fold (op (build_vector), (build_vector)).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104004 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 9282b976fbaa60c27c50d9cb490d471346833920 |
18-May-2010 |
Bill Wendling <isanbard@gmail.com> |
- Set the "HasCalls" flag after instruction selection is finished.
- Change the logic DisableFramePointerElim() to check for the
-disable-non-leaf-fp-elim before -disable-fp-elim.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103990 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 53f7602b61157ed56ccbf91379c188c55235f619 |
18-May-2010 |
Bill Wendling <isanbard@gmail.com> |
- Set the "HasCalls" flag after instruction selection is finished.
- Change the logic DisableFramePointerElim() to check for the
-disable-non-leaf-fp-elim before -disable-fp-elim.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103990 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 58d8a7077b0bf5ba425b29950da3ef52021d3252 |
15-May-2010 |
Dale Johannesen <dalej@apple.com> |
Fix uint64->{float, double} conversion to do rounding correctly in 32-bit.
The implementation in LegalizeIntegerTypes to handle this as
sint64->float + appropriate power of 2 is subject to double rounding,
considered incorrect by numerics people. Use this implementation only
when it is safe. This leads to using library calls in some cases
that produced inline code before, but it's correct now.
(EVTToAPFloatSemantics belongs somewhere else, any suggestions?)
Add a correctly rounding (though not particularly fast) conversion
that uses X87 80-bit computations for x86-32.
7885399, 5901940. This shows up in gcc.c-torture/execute/ieee/rbug.c
in the gcc testsuite on some platforms.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103883 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeIntegerTypes.cpp
|
| 8d908ebd1926d00ff47d8284e52657705efb7f9b |
15-May-2010 |
Dale Johannesen <dalej@apple.com> |
Fix uint64->{float, double} conversion to do rounding correctly in 32-bit.
The implementation in LegalizeIntegerTypes to handle this as
sint64->float + appropriate power of 2 is subject to double rounding,
considered incorrect by numerics people. Use this implementation only
when it is safe. This leads to using library calls in some cases
that produced inline code before, but it's correct now.
(EVTToAPFloatSemantics belongs somewhere else, any suggestions?)
Add a correctly rounding (though not particularly fast) conversion
that uses X87 80-bit computations for x86-32.
7885399, 5901940. This shows up in gcc.c-torture/execute/ieee/rbug.c
in the gcc testsuite on some platforms.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103883 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeIntegerTypes.cpp
|
| 1e6035e0cc0a22270dd8641971a09067c8ba965d |
15-May-2010 |
Dale Johannesen <dalej@apple.com> |
Improve assertion messages.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103882 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 789955127e06774b629e9db1cfa983184ceeda76 |
15-May-2010 |
Dale Johannesen <dalej@apple.com> |
Improve assertion messages.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103882 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 170e16745833e36e689b40a1892eeca6f2e3b4aa |
15-May-2010 |
Dan Gohman <gohman@apple.com> |
Fast ISel trivially coalesces away no-op casts, so check for this when
setting kill flags.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103832 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
|
| 7f0d69555caab5f5468ddf74b5840f59c4c6fd83 |
15-May-2010 |
Dan Gohman <gohman@apple.com> |
Fast ISel trivially coalesces away no-op casts, so check for this when
setting kill flags.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103832 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
|
| b992d3c1061218bea64e3b91099c8b170608b670 |
15-May-2010 |
Dan Gohman <gohman@apple.com> |
Don't set kill flags for instructions which the scheduler has cloned.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103827 91177308-0d34-0410-b5e6-96231b3b80d8
nstrEmitter.cpp
nstrEmitter.h
|
| 8b3a8f5773d799762b61adf976b9771117f0f261 |
15-May-2010 |
Dan Gohman <gohman@apple.com> |
Don't set kill flags for instructions which the scheduler has cloned.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103827 91177308-0d34-0410-b5e6-96231b3b80d8
nstrEmitter.cpp
nstrEmitter.h
|
| b6d3f2514f08b9451a7b7fb8599c87aba6f0cb7f |
14-May-2010 |
Bill Wendling <isanbard@gmail.com> |
Rename "HasCalls" in MachineFrameInfo to "AdjustsStack" to better describe what
the variable actually tracks.
N.B., several back-ends are using "HasCalls" as being synonymous for something
that adjusts the stack. This isn't 100% correct and should be looked into.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103802 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| b92187a4103dca24c3767c380f63593d1f6161a7 |
14-May-2010 |
Bill Wendling <isanbard@gmail.com> |
Rename "HasCalls" in MachineFrameInfo to "AdjustsStack" to better describe what
the variable actually tracks.
N.B., several back-ends are using "HasCalls" as being synonymous for something
that adjusts the stack. This isn't 100% correct and should be looked into.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103802 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 19dc8c9bcd5007ca61d8b42d363602a24216f0a6 |
14-May-2010 |
Dale Johannesen <dalej@apple.com> |
Implement a correct ui64->f32 conversion. The old
one was subject to double rounding in extreme cases.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103744 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| a5afa1cb214146fd270c86f606b634c8ed6682f2 |
14-May-2010 |
Dale Johannesen <dalej@apple.com> |
Implement a correct ui64->f32 conversion. The old
one was subject to double rounding in extreme cases.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103744 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 1ffc159c03023848aefac15da5fc351c0d0eff84 |
13-May-2010 |
Dan Gohman <gohman@apple.com> |
An Instruction has a trivial kill only if its use is in the same
basic block.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103725 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
|
| e1308d86ed2402483aa9d056af531fd773e1121f |
13-May-2010 |
Dan Gohman <gohman@apple.com> |
An Instruction has a trivial kill only if its use is in the same
basic block.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103725 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
|
| 5d4cee00f4f8a3ae9fabcc0200d4be6ed2530be0 |
12-May-2010 |
Dan Gohman <gohman@apple.com> |
Add initial kill flag support to FastISel.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103529 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
|
| a6cb641f48df20f6f79018569b519e5a32e897a2 |
12-May-2010 |
Dan Gohman <gohman@apple.com> |
Add initial kill flag support to FastISel.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103529 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
|
| 687956a7f61e50f67d231de0826c547fa77c01a9 |
11-May-2010 |
Dan Gohman <gohman@apple.com> |
Don't set kill flags on uses of CopyFromReg nodes. InstrEmitter doesn't
create separate virtual registers for CopyFromReg values, so uses of
them don't necessarily kill the value.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103519 91177308-0d34-0410-b5e6-96231b3b80d8
nstrEmitter.cpp
|
| 9d7019f586719a03f3519142ca2166166962e433 |
11-May-2010 |
Dan Gohman <gohman@apple.com> |
Don't set kill flags on uses of CopyFromReg nodes. InstrEmitter doesn't
create separate virtual registers for CopyFromReg values, so uses of
them don't necessarily kill the value.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103519 91177308-0d34-0410-b5e6-96231b3b80d8
nstrEmitter.cpp
|
| 87177829e96ec9552c8a426fffd40a3090e515e5 |
11-May-2010 |
Duncan Sands <baldrick@free.fr> |
I got tired of VISIBILITY_HIDDEN colliding with the gcc enum. Rename it
to LLVM_LIBRARY_VISIBILITY and introduce LLVM_GLOBAL_VISIBILITY, which is
the opposite, for future use by dragonegg.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103495 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeTypes.h
electionDAGBuilder.cpp
|
| 16d8f8bd919b72866e687d99f3aa94a140137c59 |
11-May-2010 |
Duncan Sands <baldrick@free.fr> |
I got tired of VISIBILITY_HIDDEN colliding with the gcc enum. Rename it
to LLVM_LIBRARY_VISIBILITY and introduce LLVM_GLOBAL_VISIBILITY, which is
the opposite, for future use by dragonegg.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103495 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeTypes.h
electionDAGBuilder.cpp
|
| 62f1433c25004a1c53c4a0f1b2f5b3c101343ef4 |
11-May-2010 |
Dan Gohman <gohman@apple.com> |
Trim #includes and forward declarations.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103489 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
argetLowering.cpp
|
| 038df88e28b88dfea7e95d6331ffcdc03e71d8e4 |
11-May-2010 |
Dan Gohman <gohman@apple.com> |
Trim #includes and forward declarations.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103489 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
argetLowering.cpp
|
| cfbb32346a7eca19d4dc00fd2c1a0248537b3497 |
11-May-2010 |
Dan Gohman <gohman@apple.com> |
Implement a bunch more TargetSelectionDAGInfo infrastructure.
Move EmitTargetCodeForMemcpy, EmitTargetCodeForMemset, and
EmitTargetCodeForMemmove out of TargetLowering and into
SelectionDAGInfo to exercise this.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103481 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
argetSelectionDAGInfo.cpp
|
| ff7a562751604a9fe13efc75bd59622244b54d35 |
11-May-2010 |
Dan Gohman <gohman@apple.com> |
Implement a bunch more TargetSelectionDAGInfo infrastructure.
Move EmitTargetCodeForMemcpy, EmitTargetCodeForMemset, and
EmitTargetCodeForMemmove out of TargetLowering and into
SelectionDAGInfo to exercise this.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103481 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
argetSelectionDAGInfo.cpp
|
| 491363c2ba41b17b9e3698918beaea8f5bf9d024 |
11-May-2010 |
Douglas Gregor <doug.gregor@gmail.com> |
Fixes for Microsoft Visual Studio 2010, from Steven Watanabe!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103457 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
argetLowering.cpp
|
| 7d9663c70b3300070298d716dba6e6f6ce2d1e3e |
11-May-2010 |
Douglas Gregor <dgregor@apple.com> |
Fixes for Microsoft Visual Studio 2010, from Steven Watanabe!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103457 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
argetLowering.cpp
|
| 3be2ceb2bec76f6d38f0d51f1045ad6700c6f453 |
11-May-2010 |
Evan Cheng <evan.cheng@apple.com> |
Indentation.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103441 91177308-0d34-0410-b5e6-96231b3b80d8
nstrEmitter.cpp
|
| 60ffa9467b0c7df2f76e2b2de7af17b776805e28 |
11-May-2010 |
Evan Cheng <evan.cheng@apple.com> |
Indentation.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103441 91177308-0d34-0410-b5e6-96231b3b80d8
nstrEmitter.cpp
|
| f6c387a40e55d90ef26b06df3bfe0ec8c0556f89 |
10-May-2010 |
Evan Cheng <evan.cheng@apple.com> |
Be careful with operand promotion. For a binary operation, the source operands may be the same. PR7018. rdar://7939869.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103419 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| aad753bbbd98c952f7e65246af2faf5c7d5a850b |
10-May-2010 |
Evan Cheng <evan.cheng@apple.com> |
Be careful with operand promotion. For a binary operation, the source operands may be the same. PR7018. rdar://7939869.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103419 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| a415e0ebca988dfbb3377b7369c02f80fec7b46e |
10-May-2010 |
Duncan Sands <baldrick@free.fr> |
Add an assertion to catch attempts to access off the end of the array.
Based on a patch by Javier Martinez.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103391 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| ad017dcb3a41bb053a6a5fa873d07222763dae75 |
10-May-2010 |
Duncan Sands <baldrick@free.fr> |
Add an assertion to catch attempts to access off the end of the array.
Based on a patch by Javier Martinez.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103391 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| c690002d5a85ab55cd9a4d163ec28f35344f2154 |
08-May-2010 |
Dan Gohman <gohman@apple.com> |
SDDbgValues are apparently not being legalized. Fix a symptom of the problem,
and not the real problem itself, by dropping debug info for i128 values.
rdar://7958162.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103310 91177308-0d34-0410-b5e6-96231b3b80d8
nstrEmitter.cpp
|
| 4ce86f459c92258f887fd8fd884fa55066b3a0cd |
08-May-2010 |
Dan Gohman <gohman@apple.com> |
SDDbgValues are apparently not being legalized. Fix a symptom of the problem,
and not the real problem itself, by dropping debug info for i128 values.
rdar://7958162.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103310 91177308-0d34-0410-b5e6-96231b3b80d8
nstrEmitter.cpp
|
| 5117aa643b38c256ef031f08a17ac25ce52d51b3 |
08-May-2010 |
Devang Patel <dpatel@apple.com> |
Verify variable directly.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103305 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
electionDAGBuilder.cpp
|
| 02f0dbd97a9bc01528aa12c2f260d928683ab411 |
08-May-2010 |
Devang Patel <dpatel@apple.com> |
Verify variable directly.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103305 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
electionDAGBuilder.cpp
|
| 6a11bccbdc8ea01d75400341046cc1b8b2f482b1 |
07-May-2010 |
Dale Johannesen <dalej@apple.com> |
Fix PR 7087, and probably other things, by extending
getConstantFP to accept the two supported long double
target types. This was not the original intent, but
there are other places that assume this works and it's
easy enough to do.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103299 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 0a406ae0d940d92c51ee145b48ff7a483a366849 |
07-May-2010 |
Dale Johannesen <dalej@apple.com> |
Fix PR 7087, and probably other things, by extending
getConstantFP to accept the two supported long double
target types. This was not the original intent, but
there are other places that assume this works and it's
easy enough to do.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103299 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| ebdca48b2c83e021d050f2f42c5c50942cf76f36 |
07-May-2010 |
Dan Gohman <gohman@apple.com> |
Transfer debug location information from PHI nodes to resulting
lowered copies.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103228 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
|
| fb95f89e8ebd0b71408472e2544e2b8d6d4738e5 |
07-May-2010 |
Dan Gohman <gohman@apple.com> |
Transfer debug location information from PHI nodes to resulting
lowered copies.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103228 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
|
| abaa71f04b1208b9290cd346768be89f1fe806db |
07-May-2010 |
Dan Gohman <gohman@apple.com> |
Print debug information for SDNodes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103227 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| cc751bb99ca868467bb9676af351bbdc29873fff |
07-May-2010 |
Dan Gohman <gohman@apple.com> |
Print debug information for SDNodes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103227 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 75a44ec07c056f9bcf17368b6643810ecfbe1264 |
06-May-2010 |
Dan Gohman <gohman@apple.com> |
Add a DebugLoc argument to TargetInstrInfo::copyRegToReg, so that it
doesn't have to guess.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103194 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
nstrEmitter.cpp
|
| 34dcc6fadca0a1117cdbd0e9b35c991a55b6e556 |
06-May-2010 |
Dan Gohman <gohman@apple.com> |
Add a DebugLoc argument to TargetInstrInfo::copyRegToReg, so that it
doesn't have to guess.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103194 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
nstrEmitter.cpp
|
| 42b46125a8fc0feeac2177f0886cdad2247b45b6 |
06-May-2010 |
Dan Gohman <gohman@apple.com> |
In bottom-up mode, defer the materialization of local constant values.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103139 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
|
| 97c94b8fc630b55e17a37481910810639e28d086 |
06-May-2010 |
Dan Gohman <gohman@apple.com> |
In bottom-up mode, defer the materialization of local constant values.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103139 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
|
| 33dcdb7421cfa95ab8b8c19636d4c6d9cb96d5e6 |
06-May-2010 |
Dan Gohman <gohman@apple.com> |
Add an "IsBottomUp" member function to FastISel, which will be used to
support a new bottom-up mode.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103138 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
|
| a7a0ed79012ea36f838239cf1d04959711aec2a9 |
06-May-2010 |
Dan Gohman <gohman@apple.com> |
Add an "IsBottomUp" member function to FastISel, which will be used to
support a new bottom-up mode.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103138 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
|
| f094cf7243b30e010d6867228499a93c1286be9c |
06-May-2010 |
Devang Patel <dpatel@apple.com> |
Use getValue() for PHINodes when direct NodeMap access does not work.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103126 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| d47f3c803f4e1e7f84e8fdcd3c9a5120ae5d37ad |
06-May-2010 |
Devang Patel <dpatel@apple.com> |
Use getValue() for PHINodes when direct NodeMap access does not work.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103126 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| 927ac56aa25df500c7dfed7f5f5527d621db7928 |
04-May-2010 |
Evan Cheng <evan.cheng@apple.com> |
Instruction selection optimizations may have moved the def of a function argument out of the entry block. rdar://7937489
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@102993 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| f1ced259b5617e9c15fcafd47e090c22e2702062 |
04-May-2010 |
Evan Cheng <evan.cheng@apple.com> |
Instruction selection optimizations may have moved the def of a function argument out of the entry block. rdar://7937489
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@102993 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| ab5a32f5c8568bb0ee2841fbe381315fbe0c6d9e |
04-May-2010 |
Evan Cheng <evan.cheng@apple.com> |
Teach scheduler about REG_SEQUENCE.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@102984 91177308-0d34-0410-b5e6-96231b3b80d8
nstrEmitter.cpp
nstrEmitter.h
|
| ba609c88a5a0eb717772c89bda89157c85fdf95e |
04-May-2010 |
Evan Cheng <evan.cheng@apple.com> |
Teach scheduler about REG_SEQUENCE.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@102984 91177308-0d34-0410-b5e6-96231b3b80d8
nstrEmitter.cpp
nstrEmitter.h
|
| 44f221f6395fef3d62e8eee66e592bb0077c5467 |
04-May-2010 |
Dan Gohman <gohman@apple.com> |
Re-enable isel kill flags, now that the local allocator is ignoring them.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@102981 91177308-0d34-0410-b5e6-96231b3b80d8
nstrEmitter.cpp
|
| 2131e2a75fc562e4dbaeb6954eac35147c71104f |
04-May-2010 |
Dan Gohman <gohman@apple.com> |
Re-enable isel kill flags, now that the local allocator is ignoring them.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@102981 91177308-0d34-0410-b5e6-96231b3b80d8
nstrEmitter.cpp
|
| 080b7d4073d554d405f9fd81d5a5bee529f755e6 |
04-May-2010 |
Dan Gohman <gohman@apple.com> |
Factor out FastISel's code for materializing constants and other values
in registers into a separate function to de-couple it from the
top-down-specific logic in getRegForValue.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@102975 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
|
| 1fdc614bee2a324fcc210d1e46d9b6fca3ca324b |
04-May-2010 |
Dan Gohman <gohman@apple.com> |
Factor out FastISel's code for materializing constants and other values
in registers into a separate function to de-couple it from the
top-down-specific logic in getRegForValue.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@102975 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
|
| c9c3d9938b7533786ed9a1736a86453d9241ce68 |
01-May-2010 |
Anton Korobeynikov <asl@math.spbu.ru> |
Insert ANY_EXTEND node instead of invalid truncate during DAG Combining (X & 1),
when needed. This fixes PR7001
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@102838 91177308-0d34-0410-b5e6-96231b3b80d8
argetLowering.cpp
|
| 17458a786e4d3eeff9c66fc0ec284b763df53642 |
01-May-2010 |
Anton Korobeynikov <asl@math.spbu.ru> |
Insert ANY_EXTEND node instead of invalid truncate during DAG Combining (X & 1),
when needed. This fixes PR7001
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@102838 91177308-0d34-0410-b5e6-96231b3b80d8
argetLowering.cpp
|
| 62343d11e8e829a1907b3f0179176f46c5d0249e |
01-May-2010 |
Dan Gohman <gohman@apple.com> |
Remove the code for special-casing byval for fast-isel. SelectionDAG
handles argument lowering anyway, so there's no need for special
casing here.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@102828 91177308-0d34-0410-b5e6-96231b3b80d8
unctionLoweringInfo.cpp
electionDAGISel.cpp
|
| d725f04ff81db0e61baa153bf21ca2dd08838244 |
01-May-2010 |
Dan Gohman <gohman@apple.com> |
Remove the code for special-casing byval for fast-isel. SelectionDAG
handles argument lowering anyway, so there's no need for special
casing here.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@102828 91177308-0d34-0410-b5e6-96231b3b80d8
unctionLoweringInfo.cpp
electionDAGISel.cpp
|
| e7fc4ec5183e0c471c65359502f8755692a7a31c |
01-May-2010 |
Dan Gohman <gohman@apple.com> |
Re-disable kill flags, as there is more trouble.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@102826 91177308-0d34-0410-b5e6-96231b3b80d8
nstrEmitter.cpp
|
| 0b7afeb4408dc20476b125f66af1829d6741795e |
01-May-2010 |
Dan Gohman <gohman@apple.com> |
Re-disable kill flags, as there is more trouble.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@102826 91177308-0d34-0410-b5e6-96231b3b80d8
nstrEmitter.cpp
|
| a6ef48a1ddd2dc4c1440eaab619df2539892ddcc |
01-May-2010 |
Dan Gohman <gohman@apple.com> |
Re-enable kill flags from SelectionDAGISel, with a fix: don't
try to put a kill flag on a DBG_INFO instruction.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@102820 91177308-0d34-0410-b5e6-96231b3b80d8
nstrEmitter.cpp
|
| 3a401bcd04e3a04eea9e91649e1a820ff7cc60c1 |
01-May-2010 |
Dan Gohman <gohman@apple.com> |
Re-enable kill flags from SelectionDAGISel, with a fix: don't
try to put a kill flag on a DBG_INFO instruction.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@102820 91177308-0d34-0410-b5e6-96231b3b80d8
nstrEmitter.cpp
|
| 1cee581edc39c1c21f28ef723046e7ee53cd9549 |
01-May-2010 |
Dan Gohman <gohman@apple.com> |
Fix whitespace.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@102817 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 1b79a2ff547a5ead0eef933bb02f51b3a2f4cc1c |
01-May-2010 |
Dan Gohman <gohman@apple.com> |
Fix whitespace.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@102817 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 764bd4bf9503227ad36c3f423965fd5c7476cc38 |
01-May-2010 |
Dan Gohman <gohman@apple.com> |
Don't pass SDValues by non-const reference unless they may be
modified.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@102816 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
electionDAGBuilder.h
|
| 5d11ea39f7f78169efdc4a62fd924e8f0661ca55 |
01-May-2010 |
Dan Gohman <gohman@apple.com> |
Don't pass SDValues by non-const reference unless they may be
modified.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@102816 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
electionDAGBuilder.h
|
| f09400f3bb920cf6f79dc030f42e8d103e14b5c6 |
01-May-2010 |
Dan Gohman <gohman@apple.com> |
Reorgnaize more switch code lowering to clean up some tricky
code, and to eliminate the need for the SelectionDAGBuilder
state to be live during CodeGenAndEmitDAG calls.
Call SDB->clear() before CodeGenAndEmitDAG calls instead of
before it, and move the CurDAG->clear() out of SelectionDAGBuilder,
which doesn't own the DAG, and into CodeGenAndEmitDAG.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@102814 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
electionDAGISel.cpp
|
| 95140a4cc168bb75a54a434e3e53f9060742dc41 |
01-May-2010 |
Dan Gohman <gohman@apple.com> |
Reorgnaize more switch code lowering to clean up some tricky
code, and to eliminate the need for the SelectionDAGBuilder
state to be live during CodeGenAndEmitDAG calls.
Call SDB->clear() before CodeGenAndEmitDAG calls instead of
before it, and move the CurDAG->clear() out of SelectionDAGBuilder,
which doesn't own the DAG, and into CodeGenAndEmitDAG.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@102814 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
electionDAGISel.cpp
|
| f66cc81ee47a15d453cd5deba4620cbba1b87608 |
01-May-2010 |
Dan Gohman <gohman@apple.com> |
Delete the EdgeMapping variable itself.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@102810 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
electionDAGBuilder.h
|
| 1b40319eba671399539c53b91b36d667f86662d3 |
01-May-2010 |
Dan Gohman <gohman@apple.com> |
Delete the EdgeMapping variable itself.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@102810 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
electionDAGBuilder.h
|
| e9198cc2d055953ec847dbcaf55f92dd32b434cc |
01-May-2010 |
Dan Gohman <gohman@apple.com> |
Get rid of the EdgeMapping map. Instead, just check for BasicBlock
changes before doing phi lowering for switches.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@102809 91177308-0d34-0410-b5e6-96231b3b80d8
nstrEmitter.cpp
nstrEmitter.h
cheduleDAGSDNodes.cpp
cheduleDAGSDNodes.h
electionDAGISel.cpp
|
| af1d8ca44a18f304f207e209b3bdb94b590f86ff |
01-May-2010 |
Dan Gohman <gohman@apple.com> |
Get rid of the EdgeMapping map. Instead, just check for BasicBlock
changes before doing phi lowering for switches.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@102809 91177308-0d34-0410-b5e6-96231b3b80d8
nstrEmitter.cpp
nstrEmitter.h
cheduleDAGSDNodes.cpp
cheduleDAGSDNodes.h
electionDAGISel.cpp
|
| 80b03f1f6ae6743a15190ef38f34be0bd1e59656 |
01-May-2010 |
Bill Wendling <isanbard@gmail.com> |
EXTRACT_VECTOR_ELT of an INSERT_VECTOR_ELT may have the same index, but the
indexes could be of a different value type. Or not even using the same SDNode
for the constant (weird, I know). Compare the actual values instead of the
pointers.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@102791 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| d71bb562758c417e91ab05424cea93264b35c67a |
01-May-2010 |
Bill Wendling <isanbard@gmail.com> |
EXTRACT_VECTOR_ELT of an INSERT_VECTOR_ELT may have the same index, but the
indexes could be of a different value type. Or not even using the same SDNode
for the constant (weird, I know). Compare the actual values instead of the
pointers.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@102791 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 9909dc57f84619aff2e1813b2b85a9b75d03a796 |
30-Apr-2010 |
Dan Gohman <gohman@apple.com> |
Remove this debug output. The MachineFunction will be printed once all of
instruction selection is done; it's confusing to see parts of it printed,
while other parts are omitted, along the way.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@102771 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| e7fd7c688689a0f51caf350af47c87fb6a915b92 |
30-Apr-2010 |
Dan Gohman <gohman@apple.com> |
Remove this debug output. The MachineFunction will be printed once all of
instruction selection is done; it's confusing to see parts of it printed,
while other parts are omitted, along the way.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@102771 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 6d5decf16e5536e693dd2cce564491e94750112c |
30-Apr-2010 |
Dan Gohman <gohman@apple.com> |
EmitDbgValue doesn't need its EdgeMapping argument.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@102742 91177308-0d34-0410-b5e6-96231b3b80d8
nstrEmitter.cpp
nstrEmitter.h
cheduleDAGSDNodes.cpp
|
| 891ff8fbd61a06ef8ea57461fa377ebbb663ed09 |
30-Apr-2010 |
Dan Gohman <gohman@apple.com> |
EmitDbgValue doesn't need its EdgeMapping argument.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@102742 91177308-0d34-0410-b5e6-96231b3b80d8
nstrEmitter.cpp
nstrEmitter.h
cheduleDAGSDNodes.cpp
|
| c76659ee1f2f8a09c597af8067726792d6b09f0c |
30-Apr-2010 |
Dan Gohman <gohman@apple.com> |
Apply a patch from Jan Sjodin to fix a compiler abort on vector
comparisons sign-extended to a different bitwidth than the
comparison operands.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@102721 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 3ce89f47de03e056e7cb52b0fff24834ef409a57 |
30-Apr-2010 |
Dan Gohman <gohman@apple.com> |
Apply a patch from Jan Sjodin to fix a compiler abort on vector
comparisons sign-extended to a different bitwidth than the
comparison operands.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@102721 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 9dcf5529eb20919cd6179f227dcc7a3ef77f75df |
30-Apr-2010 |
Dan Gohman <gohman@apple.com> |
Temporarily disable SelectionDAG kill flags, which are causing trouble.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@102680 91177308-0d34-0410-b5e6-96231b3b80d8
nstrEmitter.cpp
|
| 71cee76d26bdbb50d86a206717fe5b4265b396e7 |
30-Apr-2010 |
Dan Gohman <gohman@apple.com> |
Temporarily disable SelectionDAG kill flags, which are causing trouble.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@102680 91177308-0d34-0410-b5e6-96231b3b80d8
nstrEmitter.cpp
|
| df29c910ec09b2a5f34f0c1c1685772aa3e62a7a |
30-Apr-2010 |
Dan Gohman <gohman@apple.com> |
Set register kill flags on the SelectionDAG path, at least in the
easy cases.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@102678 91177308-0d34-0410-b5e6-96231b3b80d8
nstrEmitter.cpp
|
| 47bd03b2779bc500fb0472518d0e278f080ee79a |
30-Apr-2010 |
Dan Gohman <gohman@apple.com> |
Set register kill flags on the SelectionDAG path, at least in the
easy cases.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@102678 91177308-0d34-0410-b5e6-96231b3b80d8
nstrEmitter.cpp
|
| 5e9ee00e44758b4f587d8d48f0983161761d8924 |
29-Apr-2010 |
Devang Patel <dpatel@apple.com> |
Refactor.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@102661 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| 719f6a9d9cf29d7daa33cfe43a9e7fe671b24df1 |
29-Apr-2010 |
Devang Patel <dpatel@apple.com> |
Refactor.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@102661 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| 49175c18166113a88864caa333920cf068b2d2fa |
29-Apr-2010 |
Devang Patel <dpatel@apple.com> |
DO not push DBG_VALUE machine instructions for inlined fuction arguments in entry block.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@102653 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| a83ce98d5f5860809ce339968656a383098221f6 |
29-Apr-2010 |
Devang Patel <dpatel@apple.com> |
DO not push DBG_VALUE machine instructions for inlined fuction arguments in entry block.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@102653 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| 0e82acdb5538286d0e48c7e6b92e0db7325045a9 |
29-Apr-2010 |
Evan Cheng <evan.cheng@apple.com> |
Add comment.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@102606 91177308-0d34-0410-b5e6-96231b3b80d8
unctionLoweringInfo.h
|
| 8fed76115e8052a8835f0ad217ad68482f83a7c9 |
29-Apr-2010 |
Evan Cheng <evan.cheng@apple.com> |
Add comment.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@102606 91177308-0d34-0410-b5e6-96231b3b80d8
unctionLoweringInfo.h
|
| 5722df6ab13f7a3ed55218996115975ceb0666aa |
29-Apr-2010 |
Evan Cheng <evan.cheng@apple.com> |
Re-enable 102565 with fixes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@102602 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
electionDAGISel.cpp
|
| a36acad67ddade353a79a6b1a7b43bfaa01e86e1 |
29-Apr-2010 |
Evan Cheng <evan.cheng@apple.com> |
Re-enable 102565 with fixes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@102602 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
electionDAGISel.cpp
|
| 7cd90ba5960619304d4d1df199d2415ba079dd9d |
29-Apr-2010 |
Evan Cheng <evan.cheng@apple.com> |
Temporarily disable my changes to unbreak the build.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@102590 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
electionDAGISel.cpp
|
| 16e4ace95196c2b34246746b7481a8de3d715c19 |
29-Apr-2010 |
Evan Cheng <evan.cheng@apple.com> |
Temporarily disable my changes to unbreak the build.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@102590 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
electionDAGISel.cpp
|
| dc3bde49acd47f1111c72cda8e977b12b020e0af |
29-Apr-2010 |
Evan Cheng <evan.cheng@apple.com> |
Do not generate duplicate dbg_value instructions for function arguments.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@102585 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
electionDAGBuilder.h
|
| 9e8a2b93465bc8abd9b318faebb256b1c168baa9 |
29-Apr-2010 |
Evan Cheng <evan.cheng@apple.com> |
Do not generate duplicate dbg_value instructions for function arguments.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@102585 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
electionDAGBuilder.h
|
| e351086c0b0694ee262c158678d9247a7294bfe6 |
29-Apr-2010 |
Dan Gohman <gohman@apple.com> |
Fix missing #include.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@102584 91177308-0d34-0410-b5e6-96231b3b80d8
unctionLoweringInfo.h
|
| c924556dd5fd3a3912d5e9ce201ee571bdefdd1a |
29-Apr-2010 |
Dan Gohman <gohman@apple.com> |
Fix missing #include.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@102584 91177308-0d34-0410-b5e6-96231b3b80d8
unctionLoweringInfo.h
|
| e9b5ce10f07770d06aac415704e284bcbfdf70c3 |
29-Apr-2010 |
Evan Cheng <evan.cheng@apple.com> |
Avoid emitting a dbg_value machineinstr that's not going to be inserted into entry block.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@102581 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
electionDAGISel.cpp
|
| ee1d91a8301f91318e1aeed55c35ba5f6ca0b913 |
29-Apr-2010 |
Evan Cheng <evan.cheng@apple.com> |
Avoid emitting a dbg_value machineinstr that's not going to be inserted into entry block.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@102581 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
electionDAGISel.cpp
|
| 4fc6bce87e792f4b90a25157a9852405b657a350 |
29-Apr-2010 |
Evan Cheng <evan.cheng@apple.com> |
Check Reg against zero.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@102573 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
electionDAGISel.cpp
|
| 1deef27b0ad538e5017675cf1e085002973bbbb2 |
29-Apr-2010 |
Evan Cheng <evan.cheng@apple.com> |
Check Reg against zero.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@102573 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
electionDAGISel.cpp
|
| 69f539f9f277e192b8799d64e7458911cf0198c8 |
29-Apr-2010 |
Devang Patel <dpatel@apple.com> |
tidy up.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@102558 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| f38c6c89f1137f54adb76bb375b15ff0ec3a925a |
29-Apr-2010 |
Devang Patel <dpatel@apple.com> |
tidy up.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@102558 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| 5c8110883afbf3b4ec5031dc5bfe0f5627f2ca0e |
29-Apr-2010 |
Evan Cheng <evan.cheng@apple.com> |
Replace r102368 with code that's less fragile. This creates DBG_VALUE instructions for function arguments early and insert them after instruction selection is done.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@102554 91177308-0d34-0410-b5e6-96231b3b80d8
unctionLoweringInfo.cpp
unctionLoweringInfo.h
electionDAGBuilder.cpp
electionDAGBuilder.h
electionDAGISel.cpp
|
| 2ad0fcf794924f618a7240741cc14a39be99d0f2 |
29-Apr-2010 |
Evan Cheng <evan.cheng@apple.com> |
Replace r102368 with code that's less fragile. This creates DBG_VALUE instructions for function arguments early and insert them after instruction selection is done.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@102554 91177308-0d34-0410-b5e6-96231b3b80d8
unctionLoweringInfo.cpp
unctionLoweringInfo.h
electionDAGBuilder.cpp
electionDAGBuilder.h
electionDAGISel.cpp
|
| 01f2b921d6a01d992b863516ed7c8976665f3707 |
28-Apr-2010 |
Devang Patel <dpatel@apple.com> |
While lowering dbg_declare, emit DBG_VALUE machine instruction if alloca matching llvm.dbg.declare intrinsic is missing.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@102513 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
|
| 54fc4d6a48b32772b1a114a43e20de521257899b |
28-Apr-2010 |
Devang Patel <dpatel@apple.com> |
While lowering dbg_declare, emit DBG_VALUE machine instruction if alloca matching llvm.dbg.declare intrinsic is missing.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@102513 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
|
| 7abe37e4aee38cc79d91dd069a37d7e91d5bef53 |
28-Apr-2010 |
Shih-wei Liao <sliao@google.com> |
Sync upstream to r102410.
Re-turn on sdk.
Change-Id: I91a890863989a67243b4d2dfd1ae09b843ebaeaf
MakeLists.txt
AGCombiner.cpp
astISel.cpp
unctionLoweringInfo.cpp
unctionLoweringInfo.h
nstrEmitter.cpp
nstrEmitter.h
egalizeDAG.cpp
egalizeFloatTypes.cpp
egalizeIntegerTypes.cpp
egalizeTypes.cpp
egalizeTypes.h
egalizeTypesGeneric.cpp
egalizeVectorOps.cpp
egalizeVectorTypes.cpp
DDbgValue.h
DNodeDbgValue.h
cheduleDAGRRList.cpp
cheduleDAGSDNodes.cpp
cheduleDAGSDNodes.h
electionDAG.cpp
electionDAGBuilder.cpp
electionDAGBuilder.h
electionDAGISel.cpp
argetLowering.cpp
argetSelectionDAGInfo.cpp
|
| 7d1357abe48d8ec4c34dc887c106b9169287cdb3 |
28-Apr-2010 |
Evan Cheng <evan.cheng@apple.com> |
Try operation promotion only if regular dag combine and target-specific ones failed to do anything.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@102492 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| b3a3d5e858d6613d24a23056bf8b4ce80dcaec41 |
28-Apr-2010 |
Evan Cheng <evan.cheng@apple.com> |
Try operation promotion only if regular dag combine and target-specific ones failed to do anything.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@102492 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 7f78e21c44fcdfbe2f95fd3882f9b5a9b938b137 |
27-Apr-2010 |
Devang Patel <dpatel@apple.com> |
Ignore DBG_VALUE instructions that points to undef values.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@102463 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| 0f9d95254291418a548d1341db540b5d5c11e8f4 |
27-Apr-2010 |
Devang Patel <dpatel@apple.com> |
Ignore DBG_VALUE instructions that points to undef values.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@102463 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| 3a2a7d379409ccf8f5cefeb23c5c4feaf59652fd |
27-Apr-2010 |
Evan Cheng <evan.cheng@apple.com> |
- When legal, promote a load to zextload rather than ext load.
- Catch more further dag combine opportunities as result of operand promotion, e.g. (i32 anyext (i16 trunc (i32 x))) -> (i32 x)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@102455 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| ac7eae5b89d82603c4cf315458380c6a401a8fb2 |
27-Apr-2010 |
Evan Cheng <evan.cheng@apple.com> |
- When legal, promote a load to zextload rather than ext load.
- Catch more further dag combine opportunities as result of operand promotion, e.g. (i32 anyext (i16 trunc (i32 x))) -> (i32 x)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@102455 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 13a9c28ea720bba420231537abbd3e4574d8fb2b |
27-Apr-2010 |
Dale Johannesen <dalej@apple.com> |
Revert a small part of 102372; this fixes at least one
of the dbg testsuite regressions. I don't think this is
really the right fix; this change exposed an existing problem
upstream somewhere.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@102410 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| fc0b860bcc886844cf80d31ef717e665dbbae0bd |
27-Apr-2010 |
Dale Johannesen <dalej@apple.com> |
Revert a small part of 102372; this fixes at least one
of the dbg testsuite regressions. I don't think this is
really the right fix; this change exposed an existing problem
upstream somewhere.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@102410 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| 1f5a127b1d0c26ed15d6d6301a5a6c3cc1d3c333 |
27-Apr-2010 |
Bob Wilson <bob.wilson@apple.com> |
Avoid adding a null MD node operand, which crashes with "-debug" when trying
to print the operand.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@102395 91177308-0d34-0410-b5e6-96231b3b80d8
nstrEmitter.cpp
|
| cc7354e9936595fd2654e1690310fcdc5ef10971 |
27-Apr-2010 |
Bob Wilson <bob.wilson@apple.com> |
Avoid adding a null MD node operand, which crashes with "-debug" when trying
to print the operand.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@102395 91177308-0d34-0410-b5e6-96231b3b80d8
nstrEmitter.cpp
|
| 30af6cb62139f95ec241fcea89523fe504b0d312 |
26-Apr-2010 |
Dale Johannesen <dalej@apple.com> |
Remove crufty comments.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@102380 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| 925965e6ba8013fcc25be2df0117d63319b4bce7 |
26-Apr-2010 |
Dale Johannesen <dalej@apple.com> |
Remove crufty comments.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@102380 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| f600a3dc179e28b00a08506e27f860bd8e824a32 |
26-Apr-2010 |
Dale Johannesen <dalej@apple.com> |
Add DBG_VALUE handling for byval parameters; this
produces a comment on targets that support it, but
the Dwarf writer is not hooked up yet.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@102372 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGSDNodes.cpp
electionDAG.cpp
electionDAGBuilder.cpp
|
| fdb42fa5fe794cc2c89e2ed7f57a89ed24d9952a |
26-Apr-2010 |
Dale Johannesen <dalej@apple.com> |
Add DBG_VALUE handling for byval parameters; this
produces a comment on targets that support it, but
the Dwarf writer is not hooked up yet.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@102372 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGSDNodes.cpp
electionDAG.cpp
electionDAGBuilder.cpp
|
| 17b0c672b8e2eec92c19b81fa192a5d74ebfdfe0 |
26-Apr-2010 |
Evan Cheng <evan.cheng@apple.com> |
- Move TargetLowering::EmitTargetCodeForFrameDebugValue to TargetInstrInfo and rename it to emitFrameIndexDebugValue.
- Teach spiller to modify DBG_VALUE instructions to reference spill slots.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@102323 91177308-0d34-0410-b5e6-96231b3b80d8
nstrEmitter.cpp
nstrEmitter.h
cheduleDAGSDNodes.cpp
|
| 962021bc7f6721c20c7dfe8ca809e2d98b1c554a |
26-Apr-2010 |
Evan Cheng <evan.cheng@apple.com> |
- Move TargetLowering::EmitTargetCodeForFrameDebugValue to TargetInstrInfo and rename it to emitFrameIndexDebugValue.
- Teach spiller to modify DBG_VALUE instructions to reference spill slots.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@102323 91177308-0d34-0410-b5e6-96231b3b80d8
nstrEmitter.cpp
nstrEmitter.h
cheduleDAGSDNodes.cpp
|
| 96310c0dd995c16e6fd45e7451c6ec8f88a99a74 |
25-Apr-2010 |
Dale Johannesen <dalej@apple.com> |
Stop abusing EmitInstrWithCustomInserter for target-dependent
form of DEBUG_VALUE, as it doesn't have reasonable default
behavior for unsupported targets. Add a new hook instead.
No functional change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@102320 91177308-0d34-0410-b5e6-96231b3b80d8
nstrEmitter.cpp
|
| f822e733aff93b34e6cd85b2f92d86e71fe67f87 |
25-Apr-2010 |
Dale Johannesen <dalej@apple.com> |
Stop abusing EmitInstrWithCustomInserter for target-dependent
form of DEBUG_VALUE, as it doesn't have reasonable default
behavior for unsupported targets. Add a new hook instead.
No functional change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@102320 91177308-0d34-0410-b5e6-96231b3b80d8
nstrEmitter.cpp
|
| f9265f21edaba93f944a49f3100907ef8c46ad9e |
25-Apr-2010 |
Dale Johannesen <dalej@apple.com> |
Add comment re byval args. Doesn't actually work this way yet.
xs
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@102316 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
|
| 7dc7840850eb4a61da80c846be85308734a47bf5 |
25-Apr-2010 |
Dale Johannesen <dalej@apple.com> |
Add comment re byval args. Doesn't actually work this way yet.
xs
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@102316 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
|
| 97fc8fdf4daba72cf80d38efe2bb2a345e51b9cd |
24-Apr-2010 |
Evan Cheng <evan.cheng@apple.com> |
When a load operand is promoted to an extload, replace other uses with uses of extload result truncated.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@102236 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 95c57ea1825fedc10dc2a311b0d97105f6e61148 |
24-Apr-2010 |
Evan Cheng <evan.cheng@apple.com> |
When a load operand is promoted to an extload, replace other uses with uses of extload result truncated.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@102236 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 0b116fb6460ad77f8e9b5719605af6876147ab09 |
24-Apr-2010 |
Dan Gohman <gohman@apple.com> |
Apply a fix for a vector setcc dagcombine from Jan Sjodin. No
testcase yet, as the testcase now fails downstream.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@102228 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| a7bcef1bce8c5b97b748e5cc7d6eca19cbbc2bef |
24-Apr-2010 |
Dan Gohman <gohman@apple.com> |
Apply a fix for a vector setcc dagcombine from Jan Sjodin. No
testcase yet, as the testcase now fails downstream.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@102228 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 1cf9cb5058d8c2846f51fb4eed2ec4550ee51bc4 |
23-Apr-2010 |
Evan Cheng <evan.cheng@apple.com> |
Code refactoring.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@102202 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| caf7740f96cdcd47b7ba7fc660b82e1f664363be |
23-Apr-2010 |
Evan Cheng <evan.cheng@apple.com> |
Code refactoring.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@102202 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 26c78408c25a33a232c062aa9cebc4463b6a5245 |
23-Apr-2010 |
Dan Gohman <gohman@apple.com> |
Move FastISel's HandlePHINodesInSuccessorBlocks call down into FastISel
itself too.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@102176 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
electionDAGISel.cpp
|
| e8c92dd439581bec7e3516cbdbea74e2e60fe7f0 |
23-Apr-2010 |
Dan Gohman <gohman@apple.com> |
Move FastISel's HandlePHINodesInSuccessorBlocks call down into FastISel
itself too.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@102176 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
electionDAGISel.cpp
|
| a81e33672bff2d2a45c9b65ac5f6f854aa96b463 |
22-Apr-2010 |
Dan Gohman <gohman@apple.com> |
Sink SelectionDAGBuilder's HandlePHINodesInSuccessorBlocks down
into SelectionDAGBuilder itself.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@102128 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
electionDAGBuilder.h
electionDAGISel.cpp
|
| c105a2b5b7d8969e78bd4b203e980dced8a1c689 |
22-Apr-2010 |
Dan Gohman <gohman@apple.com> |
Sink SelectionDAGBuilder's HandlePHINodesInSuccessorBlocks down
into SelectionDAGBuilder itself.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@102128 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
electionDAGBuilder.h
electionDAGISel.cpp
|
| c603a5e90a8b769326863a33a7dc1081a2a13a31 |
22-Apr-2010 |
Dan Gohman <gohman@apple.com> |
Move HandlePHINodesInSuccessorBlocks functions out of SelectionDAGISel
and into SelectionDAGBuilder and FastISel.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@102123 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
electionDAGBuilder.cpp
electionDAGBuilder.h
electionDAGISel.cpp
|
| f81eca0ab908fdcf98ae0efaa75acccc8ba40dc2 |
22-Apr-2010 |
Dan Gohman <gohman@apple.com> |
Move HandlePHINodesInSuccessorBlocks functions out of SelectionDAGISel
and into SelectionDAGBuilder and FastISel.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@102123 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
electionDAGBuilder.cpp
electionDAGBuilder.h
electionDAGISel.cpp
|
| 895cf79d141249ede2d7a7fcb42e788fa303fae7 |
22-Apr-2010 |
Evan Cheng <evan.cheng@apple.com> |
- It's not safe to promote rotates (at least not trivially).
- Some code refactoring.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@102111 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 07c4e1085d04fa773708d0bd91794d80c426eae6 |
22-Apr-2010 |
Evan Cheng <evan.cheng@apple.com> |
- It's not safe to promote rotates (at least not trivially).
- Some code refactoring.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@102111 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| b9f9295340d41f66173577be33359b9976636b5a |
22-Apr-2010 |
Dan Gohman <gohman@apple.com> |
Fix a comment.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@102110 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
|
| 3b172f1c018a093d0dae3105324d782103fcda6d |
22-Apr-2010 |
Dan Gohman <gohman@apple.com> |
Fix a comment.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@102110 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
|
| 174620f9f6fdf56a8319ccf801d617304bef08e1 |
22-Apr-2010 |
Dan Gohman <gohman@apple.com> |
Move PHINodesToUpdate out of SelectionDAGBuilder and into
FunctionLoweringInfo, as it isn't SelectionDAG-specific. This isn't
completely natural, as PHI node state is not per-function but rather
per-basic-block, however there's currently no other convenient
per-basic-block state to group it with.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@102109 91177308-0d34-0410-b5e6-96231b3b80d8
unctionLoweringInfo.h
electionDAGBuilder.cpp
electionDAGBuilder.h
electionDAGISel.cpp
|
| 620427d5a165d98d33ad6a5be2d01c3e8525c2f6 |
22-Apr-2010 |
Dan Gohman <gohman@apple.com> |
Move PHINodesToUpdate out of SelectionDAGBuilder and into
FunctionLoweringInfo, as it isn't SelectionDAG-specific. This isn't
completely natural, as PHI node state is not per-function but rather
per-basic-block, however there's currently no other convenient
per-basic-block state to group it with.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@102109 91177308-0d34-0410-b5e6-96231b3b80d8
unctionLoweringInfo.h
electionDAGBuilder.cpp
electionDAGBuilder.h
electionDAGISel.cpp
|
| b9305c0abac4003f96cbc46c2548211f294fd2ff |
21-Apr-2010 |
Dan Gohman <gohman@apple.com> |
Add more const qualifiers on TargetMachine and friends.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101977 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
argetLowering.cpp
|
| f0757b0edc1ef3d1998485d3f74cadaa3f7180a0 |
21-Apr-2010 |
Dan Gohman <gohman@apple.com> |
Add more const qualifiers on TargetMachine and friends.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101977 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
argetLowering.cpp
|
| db189c22c8bf5193452582d2a1913b18531ed831 |
21-Apr-2010 |
Dan Gohman <gohman@apple.com> |
Move several SelectionDAG-independent utility functions out of the
SelectionDAG directory and into a new Analysis.cpp file.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101975 91177308-0d34-0410-b5e6-96231b3b80d8
unctionLoweringInfo.cpp
unctionLoweringInfo.h
electionDAGBuilder.cpp
|
| 5eb6d65a27fd77a0bf10bd49f5cccb9f1796d98b |
21-Apr-2010 |
Dan Gohman <gohman@apple.com> |
Move several SelectionDAG-independent utility functions out of the
SelectionDAG directory and into a new Analysis.cpp file.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101975 91177308-0d34-0410-b5e6-96231b3b80d8
unctionLoweringInfo.cpp
unctionLoweringInfo.h
electionDAGBuilder.cpp
|
| a51d382b60efe52265502a72967ea32d5d1c7492 |
21-Apr-2010 |
Dan Gohman <gohman@apple.com> |
Add another variant of this test which found a place where
CodeGen's ComputeMaskedBits was being over-conservative when computing
bits for an ADD.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101963 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| bc7588eb6882466fe3cd2e36bfb3d01e4ce23faa |
21-Apr-2010 |
Dan Gohman <gohman@apple.com> |
Add another variant of this test which found a place where
CodeGen's ComputeMaskedBits was being over-conservative when computing
bits for an ADD.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101963 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 9413edc0257abc50efe873d949163718a0a3832c |
21-Apr-2010 |
Dale Johannesen <dalej@apple.com> |
Because of the EMMS problem, right now we have to support
user-defined operations that use MMX register types, but
the compiler shouldn't generate them on its own. This adds
a Synthesizable abstraction to represent this, and changes
the vector widening computation so it won't produce MMX types.
(The motivation is to remove noise from the ABI compatibility
part of the gcc test suite, which has some breakage right now.)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101951 91177308-0d34-0410-b5e6-96231b3b80d8
argetLowering.cpp
|
| 7609017dc3112337c3098e7d04dcd437549f8b14 |
21-Apr-2010 |
Dale Johannesen <dalej@apple.com> |
Because of the EMMS problem, right now we have to support
user-defined operations that use MMX register types, but
the compiler shouldn't generate them on its own. This adds
a Synthesizable abstraction to represent this, and changes
the vector widening computation so it won't produce MMX types.
(The motivation is to remove noise from the ABI compatibility
part of the gcc test suite, which has some breakage right now.)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101951 91177308-0d34-0410-b5e6-96231b3b80d8
argetLowering.cpp
|
| 648a9b2b40f51f9064a92db47a6c92f6412fceb5 |
20-Apr-2010 |
Dan Gohman <gohman@apple.com> |
Sink the CopyToExportRegsIfNeeded calls out of SelectionDAGISel
into SelectionDAGBuilder. This avoids a separate pass over the
instructions, and has the side effect of providing debug location
information to the copy.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101906 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
electionDAGISel.cpp
|
| 92884f7ee54186b136a1ade7fa0194097f225c81 |
20-Apr-2010 |
Dan Gohman <gohman@apple.com> |
Sink the CopyToExportRegsIfNeeded calls out of SelectionDAGISel
into SelectionDAGBuilder. This avoids a separate pass over the
instructions, and has the side effect of providing debug location
information to the copy.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101906 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
electionDAGISel.cpp
|
| a334412b0dbab13c2f8148293a4b9ddcb40044d4 |
20-Apr-2010 |
Dan Gohman <gohman@apple.com> |
Don't send PHI nodes down to SelectionDAGBuilder of FastISel, since
they end up doing nothing.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101904 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
electionDAGBuilder.cpp
electionDAGBuilder.h
electionDAGISel.cpp
|
| ba5be5c07bb19dcf484e3aa40cd139dd07c10407 |
20-Apr-2010 |
Dan Gohman <gohman@apple.com> |
Don't send PHI nodes down to SelectionDAGBuilder of FastISel, since
they end up doing nothing.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101904 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
electionDAGBuilder.cpp
electionDAGBuilder.h
electionDAGISel.cpp
|
| 8911d2138ed1bcf9878293606c2f566e1e33f0ee |
20-Apr-2010 |
Dan Gohman <gohman@apple.com> |
Sink this use_empty() check into isUsedOutsideOfDefiningBlock.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101902 91177308-0d34-0410-b5e6-96231b3b80d8
unctionLoweringInfo.cpp
|
| d84e806dd4b03fa711ae2665ac1acef646f16c5c |
20-Apr-2010 |
Dan Gohman <gohman@apple.com> |
Sink this use_empty() check into isUsedOutsideOfDefiningBlock.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101902 91177308-0d34-0410-b5e6-96231b3b80d8
unctionLoweringInfo.cpp
|
| dea0ab09fecb6b7c8a105ba528b489d6d7979732 |
20-Apr-2010 |
Dan Gohman <gohman@apple.com> |
If a PHI node somehow has debug info, propogate it to the MachineInstr PHI.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101901 91177308-0d34-0410-b5e6-96231b3b80d8
unctionLoweringInfo.cpp
|
| c025c853522feef9e8350c52b9013e5bf178dec3 |
20-Apr-2010 |
Dan Gohman <gohman@apple.com> |
If a PHI node somehow has debug info, propogate it to the MachineInstr PHI.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101901 91177308-0d34-0410-b5e6-96231b3b80d8
unctionLoweringInfo.cpp
|
| 2fad02dcd29f9da8769c945da3cec7abcfa7a17a |
20-Apr-2010 |
Dan Gohman <gohman@apple.com> |
Don't iterate through the whole block just to find the PHI nodes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101900 91177308-0d34-0410-b5e6-96231b3b80d8
unctionLoweringInfo.cpp
|
| 3f1403f14e45a862ff97c14d80a1daf28518722a |
20-Apr-2010 |
Dan Gohman <gohman@apple.com> |
Don't iterate through the whole block just to find the PHI nodes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101900 91177308-0d34-0410-b5e6-96231b3b80d8
unctionLoweringInfo.cpp
|
| 3799fdc10724d4bcbd88b186e49dcb695ace4adf |
20-Apr-2010 |
Dan Gohman <gohman@apple.com> |
Delete a redundant return statement.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101860 91177308-0d34-0410-b5e6-96231b3b80d8
nstrEmitter.cpp
|
| 8b1dbebc1e783fde62d01608d5f3a436c5a1a737 |
20-Apr-2010 |
Dan Gohman <gohman@apple.com> |
Delete a redundant return statement.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101860 91177308-0d34-0410-b5e6-96231b3b80d8
nstrEmitter.cpp
|
| dfbd6e1d86989c35dccac586c556fbb0404b8963 |
20-Apr-2010 |
Bill Wendling <isanbard@gmail.com> |
The visitXOR method can return the same SDNode. If so, we don't want to delete
it as it's not dead.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101855 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 86c5abb4c0edfffdd24729e142a62b9b949f025d |
20-Apr-2010 |
Bill Wendling <isanbard@gmail.com> |
The visitXOR method can return the same SDNode. If so, we don't want to delete
it as it's not dead.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101855 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 752cd58fa3bd2180cbc5d741ec8a95367bfe43be |
20-Apr-2010 |
Dan Gohman <gohman@apple.com> |
Remove this debug output; it isn't that useful, and it's incomplete
in the case where a basic block is split.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101850 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| a9056dbec17fe2d83d61b934ccb3f8088eca5d08 |
20-Apr-2010 |
Dan Gohman <gohman@apple.com> |
Remove this debug output; it isn't that useful, and it's incomplete
in the case where a basic block is split.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101850 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 550184afe7e057c65a8d498c81b629cca7def656 |
20-Apr-2010 |
Dan Gohman <gohman@apple.com> |
Sink DebugLoc handling out of SelectionDAGISel into FastISel and
SelectionDAGBuilder, where it doesn't have to be as complicated.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101848 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
electionDAGBuilder.cpp
electionDAGBuilder.h
electionDAGISel.cpp
|
| 8ba3aa7f9c5048c31172788f98ad2b90ffad565a |
20-Apr-2010 |
Dan Gohman <gohman@apple.com> |
Sink DebugLoc handling out of SelectionDAGISel into FastISel and
SelectionDAGBuilder, where it doesn't have to be as complicated.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101848 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
electionDAGBuilder.cpp
electionDAGBuilder.h
electionDAGISel.cpp
|
| d0e9b6728ee42919652fd1fe450f2c73ebe0ea79 |
20-Apr-2010 |
Dan Gohman <gohman@apple.com> |
Remove MachineFunction's DefaultDebugLoc member, and make DwarfDebug.cpp
responsible for figuring out what that's supposed to be on its own.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101844 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 084751cd16c3b8017b5a237bd2575b65a6543f79 |
20-Apr-2010 |
Dan Gohman <gohman@apple.com> |
Remove MachineFunction's DefaultDebugLoc member, and make DwarfDebug.cpp
responsible for figuring out what that's supposed to be on its own.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101844 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 0f8f498760c8743fcc0a7a6165558a0a8b11b698 |
20-Apr-2010 |
Dan Gohman <gohman@apple.com> |
Reapply the removal of SelectionDAGISel's BB, with a fix for the case
where multiple blocks are emitted; functions which do this need to return
the new BB so that their callers can stay current.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101843 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| a9a3321938aac13477bdc53af0018bce88b45d78 |
20-Apr-2010 |
Dan Gohman <gohman@apple.com> |
Reapply the removal of SelectionDAGISel's BB, with a fix for the case
where multiple blocks are emitted; functions which do this need to return
the new BB so that their callers can stay current.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101843 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 4991063c792ad7bfa20d3660ff76678da4fdde20 |
20-Apr-2010 |
Dan Gohman <gohman@apple.com> |
Revert 101825, which is causing trouble.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101832 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 68b7960c1a09b047dbac8eab185d2ca0dd7a2134 |
20-Apr-2010 |
Dan Gohman <gohman@apple.com> |
Revert 101825, which is causing trouble.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101832 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 4d7bf110597da67d71ae81903d7a262dddda0faf |
20-Apr-2010 |
Dan Gohman <gohman@apple.com> |
Eliminate SelectionDAGISel's "current block" member. Just pass it as
an argument to things that need it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101825 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 35bb85b7ee108a265a20686e97d1b011f4ab5ce9 |
20-Apr-2010 |
Dan Gohman <gohman@apple.com> |
Eliminate SelectionDAGISel's "current block" member. Just pass it as
an argument to things that need it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101825 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 49e2c678a41530c1a2af5d78b9c3bf2d8e436b8f |
20-Apr-2010 |
Dan Gohman <gohman@apple.com> |
Eliminate the CurMBB member from SelectionDAGBuilder. For places that
need it, just pass around the parent block of the current instruction
explicitly.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101822 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
electionDAGBuilder.h
electionDAGISel.cpp
|
| 99be8ae3898d87373ef0c8f1159b287e28a8d81b |
20-Apr-2010 |
Dan Gohman <gohman@apple.com> |
Eliminate the CurMBB member from SelectionDAGBuilder. For places that
need it, just pass around the parent block of the current instruction
explicitly.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101822 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
electionDAGBuilder.h
electionDAGISel.cpp
|
| 1f79d43e4bf4e29624c784835968099ecd439296 |
19-Apr-2010 |
Evan Cheng <evan.cheng@apple.com> |
More progress on promoting i16 operations to i32 for x86. Work in progress.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101808 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 4c26e93e895bfd72a66076de22a216316115f531 |
19-Apr-2010 |
Evan Cheng <evan.cheng@apple.com> |
More progress on promoting i16 operations to i32 for x86. Work in progress.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101808 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 96e471458768f250d37913a720ebb74f4177f218 |
19-Apr-2010 |
Dan Gohman <gohman@apple.com> |
Give SelectionDAG a TargetMachine too, rather than having it
fetch one from the MachineFunction.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101807 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
electionDAGISel.cpp
|
| 50d2b1ac029d63500ea9b9347561b1454fa6ed6a |
19-Apr-2010 |
Dan Gohman <gohman@apple.com> |
Give SelectionDAG a TargetMachine too, rather than having it
fetch one from the MachineFunction.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101807 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
electionDAGISel.cpp
|
| 71c7dc15e8a5dc493183770aa87a4e385ba68408 |
19-Apr-2010 |
Evan Cheng <evan.cheng@apple.com> |
More 80 col violation.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101806 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeIntegerTypes.cpp
|
| 285fb1cc4a7ea924b4d94e9c2cb890125d56a7e0 |
19-Apr-2010 |
Evan Cheng <evan.cheng@apple.com> |
More 80 col violation.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101806 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeIntegerTypes.cpp
|
| 60257f555b0a59ac0f04198236878cb24f113fdc |
19-Apr-2010 |
Dan Gohman <gohman@apple.com> |
Code that needs a TargetMachine should have access to one directly, rather
than just getting one through a TargetLowering.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101802 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
electionDAGBuilder.cpp
electionDAGBuilder.h
electionDAGISel.cpp
|
| 55e59c186303ff02c0be7429da3b1b36c347f164 |
19-Apr-2010 |
Dan Gohman <gohman@apple.com> |
Code that needs a TargetMachine should have access to one directly, rather
than just getting one through a TargetLowering.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101802 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
electionDAGBuilder.cpp
electionDAGBuilder.h
electionDAGISel.cpp
|
| 46086310d44e564e5a025bd9a80cdec4eb053d1e |
19-Apr-2010 |
Dan Gohman <gohman@apple.com> |
Move isInTailCallPosition out of SelectionDAGBuilder, as it isn't
SelectionDAG-specific.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101801 91177308-0d34-0410-b5e6-96231b3b80d8
unctionLoweringInfo.cpp
unctionLoweringInfo.h
electionDAGBuilder.cpp
|
| 46007b3712290c09d895f4bd245ac852f412556c |
19-Apr-2010 |
Dan Gohman <gohman@apple.com> |
Move isInTailCallPosition out of SelectionDAGBuilder, as it isn't
SelectionDAG-specific.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101801 91177308-0d34-0410-b5e6-96231b3b80d8
unctionLoweringInfo.cpp
unctionLoweringInfo.h
electionDAGBuilder.cpp
|
| 2491664d4979d33da2b90fc471cab2287c863e59 |
17-Apr-2010 |
Dan Gohman <gohman@apple.com> |
Fix -Wcast-qual warnings.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101655 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGSDNodes.cpp
|
| 3fb150a9024a38872ec4abbc3300e08a8bfc1812 |
17-Apr-2010 |
Dan Gohman <gohman@apple.com> |
Fix -Wcast-qual warnings.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101655 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGSDNodes.cpp
|
| 32ce037e2a83aa4761ebf33ce5b40548f98032ec |
17-Apr-2010 |
Dan Gohman <gohman@apple.com> |
Delete now-unnecessary const_casts.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101637 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
electionDAGBuilder.cpp
|
| 383b5f6b91914454a9a8a6d829b4eeb714c75113 |
17-Apr-2010 |
Dan Gohman <gohman@apple.com> |
Delete now-unnecessary const_casts.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101637 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
electionDAGBuilder.cpp
|
| dbb121b1f19bf77e0bef8725d5ee42c1b8761caf |
17-Apr-2010 |
Dan Gohman <gohman@apple.com> |
Use const qualifiers with TargetLowering. This eliminates several
const_casts, and it reinforces the design of the Target classes being
immutable.
SelectionDAGISel::IsLegalToFold is now a static member function, because
PIC16 uses it in an unconventional way. There is more room for API
cleanup here.
And PIC16's AsmPrinter no longer uses TargetLowering.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101635 91177308-0d34-0410-b5e6-96231b3b80d8
unctionLoweringInfo.cpp
unctionLoweringInfo.h
egalizeDAG.cpp
egalizeTypes.h
egalizeVectorOps.cpp
electionDAG.cpp
electionDAGBuilder.cpp
electionDAGBuilder.h
electionDAGISel.cpp
|
| d858e90f039f5fcdc2fa93035e911a5a9505cc50 |
17-Apr-2010 |
Dan Gohman <gohman@apple.com> |
Use const qualifiers with TargetLowering. This eliminates several
const_casts, and it reinforces the design of the Target classes being
immutable.
SelectionDAGISel::IsLegalToFold is now a static member function, because
PIC16 uses it in an unconventional way. There is more room for API
cleanup here.
And PIC16's AsmPrinter no longer uses TargetLowering.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101635 91177308-0d34-0410-b5e6-96231b3b80d8
unctionLoweringInfo.cpp
unctionLoweringInfo.h
egalizeDAG.cpp
egalizeTypes.h
egalizeVectorOps.cpp
electionDAG.cpp
electionDAGBuilder.cpp
electionDAGBuilder.h
electionDAGISel.cpp
|
| 3cbcbbb034222376591cff2913ba8d4d67f3d48e |
17-Apr-2010 |
Evan Cheng <evan.cheng@apple.com> |
More work to allow dag combiner to promote 16-bit ops to 32-bit.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101621 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
electionDAGISel.cpp
argetLowering.cpp
|
| e5b51ac7708402473f0a558f4aac74fab63d4f7e |
17-Apr-2010 |
Evan Cheng <evan.cheng@apple.com> |
More work to allow dag combiner to promote 16-bit ops to 32-bit.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101621 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
electionDAGISel.cpp
argetLowering.cpp
|
| 3cbdec6dedc906ff84cedfa4fe96e11b9a786c0b |
17-Apr-2010 |
Evan Cheng <evan.cheng@apple.com> |
Another 80 col violation.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101620 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeIntegerTypes.cpp
|
| 4ff28527bb8e5ed4ae4b65f0fa6967eb79a05d4c |
17-Apr-2010 |
Evan Cheng <evan.cheng@apple.com> |
Another 80 col violation.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101620 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeIntegerTypes.cpp
|
| fbf918ba42cda25ba57d28eecd0aee89a83a1ecc |
17-Apr-2010 |
Eric Christopher <echristo@apple.com> |
Revert 101465, it broke internal OpenGL testing.
Probably the best way to know that all getOperand() calls have been handled
is to replace that API instead of updating.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101579 91177308-0d34-0410-b5e6-96231b3b80d8
unctionLoweringInfo.cpp
electionDAGBuilder.cpp
|
| 551754c4958086cc6910da7c950f2875e212f5cf |
17-Apr-2010 |
Eric Christopher <echristo@apple.com> |
Revert 101465, it broke internal OpenGL testing.
Probably the best way to know that all getOperand() calls have been handled
is to replace that API instead of updating.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101579 91177308-0d34-0410-b5e6-96231b3b80d8
unctionLoweringInfo.cpp
electionDAGBuilder.cpp
|
| a475cffeb463990d6e0c7eca6460da78428c233c |
17-Apr-2010 |
Evan Cheng <evan.cheng@apple.com> |
(i32 sext_in_reg (i32 aext (i16 x)), i16) -> (i32 sext x). No known test case until -promote-16bit is enabled.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101551 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 003d7c4b5d639fcb0231604fe21339dd7071f418 |
17-Apr-2010 |
Evan Cheng <evan.cheng@apple.com> |
(i32 sext_in_reg (i32 aext (i16 x)), i16) -> (i32 sext x). No known test case until -promote-16bit is enabled.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101551 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| fe8017b12f996ebfdc9ef29dd936e607bd4812db |
16-Apr-2010 |
Dan Gohman <gohman@apple.com> |
Create a new TargetSelectionDAGInfo class. This will eventually acquire
SelectionDAG-specific parts of TargetLowering.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101537 91177308-0d34-0410-b5e6-96231b3b80d8
MakeLists.txt
argetSelectionDAGInfo.cpp
|
| 8c0e89925d6b76b7671fe904a97c618d155dea42 |
16-Apr-2010 |
Dan Gohman <gohman@apple.com> |
Create a new TargetSelectionDAGInfo class. This will eventually acquire
SelectionDAG-specific parts of TargetLowering.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101537 91177308-0d34-0410-b5e6-96231b3b80d8
MakeLists.txt
argetSelectionDAGInfo.cpp
|
| 5002ea3266303651474a1a3034f55e71e79dc869 |
16-Apr-2010 |
Dan Gohman <gohman@apple.com> |
Commit this, which should have accompanied 101531.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101532 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 4bcf0a9233e334532d86111829375f73776984ad |
16-Apr-2010 |
Dan Gohman <gohman@apple.com> |
Commit this, which should have accompanied 101531.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101532 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 4b380387d14ecc0ef71c64555d0ab3e7e3bff6b3 |
16-Apr-2010 |
Evan Cheng <evan.cheng@apple.com> |
80 col.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101501 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeIntegerTypes.cpp
|
| 53f6ed9560aa4586ba217fbf94acbfada52f561f |
16-Apr-2010 |
Evan Cheng <evan.cheng@apple.com> |
80 col.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101501 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeIntegerTypes.cpp
|
| 8028064fa56a65bd94ba104ee4a173c1256e9800 |
16-Apr-2010 |
Evan Cheng <evan.cheng@apple.com> |
80 col.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101500 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeIntegerTypes.cpp
|
| 182465c589f95ff165331d06035ec53ff05bf1f5 |
16-Apr-2010 |
Evan Cheng <evan.cheng@apple.com> |
80 col.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101500 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeIntegerTypes.cpp
|
| 0d3e7be65f6ad6ec6c49fb8f99f88d0c0dd82b66 |
16-Apr-2010 |
Dan Gohman <gohman@apple.com> |
Avoid creating virtual registers for unused values.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101480 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
electionDAGISel.cpp
|
| 33b7a291aa1bd477bc09e3ef5fccb76249502a5e |
16-Apr-2010 |
Dan Gohman <gohman@apple.com> |
Avoid creating virtual registers for unused values.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101480 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
electionDAGISel.cpp
|
| 2008c183b287fe50d9252eba6d3eb179d3aa77b3 |
16-Apr-2010 |
Dan Gohman <gohman@apple.com> |
Fix an assertion string.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101478 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| ac7d05c4bfbd988a08e9cd8ac817be7b22cd9953 |
16-Apr-2010 |
Dan Gohman <gohman@apple.com> |
Fix an assertion string.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101478 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| 25a14aa84b7d02b310abf7eb5e34b5bcf079f0b2 |
16-Apr-2010 |
Dan Gohman <gohman@apple.com> |
Fix a comment.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101477 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| a44e522b7df67e4a895850b6813e980c3321fb78 |
16-Apr-2010 |
Dan Gohman <gohman@apple.com> |
Fix a comment.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101477 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| b86413602e2d1d0d510016044092949168ac4d3f |
16-Apr-2010 |
Gabor Greif <ggreif@gmail.com> |
reapply r101434
with a fix for self-hosting
rotate CallInst operands, i.e. move callee to the back
of the operand array
the motivation for this patch are laid out in my mail to llvm-commits:
more efficient access to operands and callee, faster callgraph-construction,
smaller compiler binary
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101465 91177308-0d34-0410-b5e6-96231b3b80d8
unctionLoweringInfo.cpp
electionDAGBuilder.cpp
|
| 4ec2258ffb495d7ce00177e447740ef1123a27db |
16-Apr-2010 |
Gabor Greif <ggreif@gmail.com> |
reapply r101434
with a fix for self-hosting
rotate CallInst operands, i.e. move callee to the back
of the operand array
the motivation for this patch are laid out in my mail to llvm-commits:
more efficient access to operands and callee, faster callgraph-construction,
smaller compiler binary
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101465 91177308-0d34-0410-b5e6-96231b3b80d8
unctionLoweringInfo.cpp
electionDAGBuilder.cpp
|
| c4f94dae2a4060c4c9d86f0f10a95df9eff3979d |
16-Apr-2010 |
Evan Cheng <evan.cheng@apple.com> |
Adding support for dag combiner to promote operations for profit. This requires target specific queries. For example, x86 should promote i16 to i32 when it does not impact load folding.
x86 support is off by default. It can be enabled with -promote-16bit.
Work in progress.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101448 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 64b7bf71e84094193b40ab81aa7dacad921ecbea |
16-Apr-2010 |
Evan Cheng <evan.cheng@apple.com> |
Adding support for dag combiner to promote operations for profit. This requires target specific queries. For example, x86 should promote i16 to i32 when it does not impact load folding.
x86 support is off by default. It can be enabled with -promote-16bit.
Work in progress.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101448 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 28efe60cc84a70c449e296b4f47a19bb0a748a51 |
16-Apr-2010 |
Dan Gohman <gohman@apple.com> |
Refine further the scope where the global DebugLoc value is active.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101443 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| f89d1dc9b77ee006324653f70496d29ac3d3bc6c |
16-Apr-2010 |
Dan Gohman <gohman@apple.com> |
Refine further the scope where the global DebugLoc value is active.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101443 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| ab05d8fcf61f7b926cf3e08f111794c69ca60690 |
16-Apr-2010 |
Gabor Greif <ggreif@gmail.com> |
back out r101423 and r101397, they break llvm-gcc self-host on darwin10
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101434 91177308-0d34-0410-b5e6-96231b3b80d8
unctionLoweringInfo.cpp
electionDAGBuilder.cpp
|
| 607a7ab3da72a2eb53553a520507cbb8068dd1d8 |
16-Apr-2010 |
Gabor Greif <ggreif@gmail.com> |
back out r101423 and r101397, they break llvm-gcc self-host on darwin10
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101434 91177308-0d34-0410-b5e6-96231b3b80d8
unctionLoweringInfo.cpp
electionDAGBuilder.cpp
|
| 763153ef8466ad11db0c5bb55647483cc5d69a2a |
15-Apr-2010 |
Gabor Greif <ggreif@gmail.com> |
reapply r101364, which has been backed out in r101368
with a fix
rotate CallInst operands, i.e. move callee to the back
of the operand array
the motivation for this patch are laid out in my mail to llvm-commits:
more efficient access to operands and callee, faster callgraph-construction,
smaller compiler binary
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101397 91177308-0d34-0410-b5e6-96231b3b80d8
unctionLoweringInfo.cpp
electionDAGBuilder.cpp
|
| 2ff961f66816daab8bbc58a19025161d969821c2 |
15-Apr-2010 |
Gabor Greif <ggreif@gmail.com> |
reapply r101364, which has been backed out in r101368
with a fix
rotate CallInst operands, i.e. move callee to the back
of the operand array
the motivation for this patch are laid out in my mail to llvm-commits:
more efficient access to operands and callee, faster callgraph-construction,
smaller compiler binary
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101397 91177308-0d34-0410-b5e6-96231b3b80d8
unctionLoweringInfo.cpp
electionDAGBuilder.cpp
|
| 738422fa501a08e58d1d55ebebdf0ca499059d72 |
15-Apr-2010 |
Dan Gohman <gohman@apple.com> |
Fix a bunch of namespace polution.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101376 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| b35798347ea87b8b6d36155b211016a7769f01ab |
15-Apr-2010 |
Dan Gohman <gohman@apple.com> |
Fix a bunch of namespace polution.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101376 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 52f155ee5d607b3773c2bc19fa688758f8887e35 |
15-Apr-2010 |
Gabor Greif <ggreif@gmail.com> |
back out r101364, as it trips the linux nightlybot on some clang C++ tests
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101368 91177308-0d34-0410-b5e6-96231b3b80d8
unctionLoweringInfo.cpp
electionDAGBuilder.cpp
|
| 9ee17208115482441953127615231c59a2f4d052 |
15-Apr-2010 |
Gabor Greif <ggreif@gmail.com> |
back out r101364, as it trips the linux nightlybot on some clang C++ tests
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101368 91177308-0d34-0410-b5e6-96231b3b80d8
unctionLoweringInfo.cpp
electionDAGBuilder.cpp
|
| d46fdb45387f46beeadc04472b3a66ad1da3aca1 |
15-Apr-2010 |
Gabor Greif <ggreif@gmail.com> |
rotate CallInst operands, i.e. move callee to the back
of the operand array
the motivation for this patch are laid out in my mail to llvm-commits:
more efficient access to operands and callee, faster callgraph-construction,
smaller compiler binary
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101364 91177308-0d34-0410-b5e6-96231b3b80d8
unctionLoweringInfo.cpp
electionDAGBuilder.cpp
|
| 165dac08d1bb8428b32a5f39cdd3dbee2888987f |
15-Apr-2010 |
Gabor Greif <ggreif@gmail.com> |
rotate CallInst operands, i.e. move callee to the back
of the operand array
the motivation for this patch are laid out in my mail to llvm-commits:
more efficient access to operands and callee, faster callgraph-construction,
smaller compiler binary
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101364 91177308-0d34-0410-b5e6-96231b3b80d8
unctionLoweringInfo.cpp
electionDAGBuilder.cpp
|
| f22ee1aa7f6fb51f3123055f81fdc0c21630b5eb |
15-Apr-2010 |
Chris Lattner <sabre@nondot.org> |
enhance the load/store narrowing optimization to handle a
tokenfactor in between the load/store. This allows us to
optimize test7 into:
_test7: ## @test7
## BB#0: ## %entry
movl (%rdx), %eax
## kill: SIL<def> ESI<kill>
movb %sil, 5(%rdi)
ret
instead of:
_test7: ## @test7
## BB#0: ## %entry
movl 4(%esp), %ecx
movl $-65281, %eax ## imm = 0xFFFFFFFFFFFF00FF
andl 4(%ecx), %eax
movzbl 8(%esp), %edx
shll $8, %edx
addl %eax, %edx
movl 12(%esp), %eax
movl (%eax), %eax
movl %edx, 4(%ecx)
ret
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101355 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| e6987587d62bb4de0f57e103f677f6bfb43a09f3 |
15-Apr-2010 |
Chris Lattner <sabre@nondot.org> |
enhance the load/store narrowing optimization to handle a
tokenfactor in between the load/store. This allows us to
optimize test7 into:
_test7: ## @test7
## BB#0: ## %entry
movl (%rdx), %eax
## kill: SIL<def> ESI<kill>
movb %sil, 5(%rdi)
ret
instead of:
_test7: ## @test7
## BB#0: ## %entry
movl 4(%esp), %ecx
movl $-65281, %eax ## imm = 0xFFFFFFFFFFFF00FF
andl 4(%ecx), %eax
movzbl 8(%esp), %edx
shll $8, %edx
addl %eax, %edx
movl 12(%esp), %eax
movl (%eax), %eax
movl %edx, 4(%ecx)
ret
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101355 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 01f604a270eb7519eae006f3c6491bef6f9f8a8f |
15-Apr-2010 |
Chris Lattner <sabre@nondot.org> |
teach codegen to turn trunc(zextload) into load when possible.
This doesn't occur much at all, it only seems to formed in the case
when the trunc optimization kicks in due to phase ordering. In that
case it is saves a few bytes on x86-32.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101350 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 6dc868581b20380802e6a011de8dd9766790cf7a |
15-Apr-2010 |
Chris Lattner <sabre@nondot.org> |
teach codegen to turn trunc(zextload) into load when possible.
This doesn't occur much at all, it only seems to formed in the case
when the trunc optimization kicks in due to phase ordering. In that
case it is saves a few bytes on x86-32.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101350 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 828c441a908fce30c16921936fcab5a9c063ea69 |
15-Apr-2010 |
Chris Lattner <sabre@nondot.org> |
add a simple dag combine to replace trivial shl+lshr with
and. This happens with the store->load narrowing stuff.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101348 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| efcddc33256512a08d7182783e2262da27f27cdd |
15-Apr-2010 |
Chris Lattner <sabre@nondot.org> |
add a simple dag combine to replace trivial shl+lshr with
and. This happens with the store->load narrowing stuff.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101348 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| b7920f1c4e1cb2aeb06740780c1f7a23fdb8f505 |
15-Apr-2010 |
Chris Lattner <sabre@nondot.org> |
Implement rdar://7860110 (also in target/readme.txt) narrowing
a load/or/and/store sequence into a narrower store when it is
safe. Daniel tells me that clang will start producing this sort
of thing with bitfields, and this does trigger a few dozen times
on 176.gcc produced by llvm-gcc even now.
This compiles code like CodeGen/X86/2009-05-28-DAGCombineCrash.ll
into:
movl %eax, 36(%rdi)
instead of:
movl $4294967295, %eax ## imm = 0xFFFFFFFF
andq 32(%rdi), %rax
shlq $32, %rcx
addq %rax, %rcx
movq %rcx, 32(%rdi)
and each of the testcases into a single store. Each of them used
to compile into craziness like this:
_test4:
movl $65535, %eax ## imm = 0xFFFF
andl (%rdi), %eax
shll $16, %esi
addl %eax, %esi
movl %esi, (%rdi)
ret
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101343 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 2392ae7d7344674dc3d946e324342515f4771b90 |
15-Apr-2010 |
Chris Lattner <sabre@nondot.org> |
Implement rdar://7860110 (also in target/readme.txt) narrowing
a load/or/and/store sequence into a narrower store when it is
safe. Daniel tells me that clang will start producing this sort
of thing with bitfields, and this does trigger a few dozen times
on 176.gcc produced by llvm-gcc even now.
This compiles code like CodeGen/X86/2009-05-28-DAGCombineCrash.ll
into:
movl %eax, 36(%rdi)
instead of:
movl $4294967295, %eax ## imm = 0xFFFFFFFF
andq 32(%rdi), %rax
shlq $32, %rcx
addq %rax, %rcx
movq %rcx, 32(%rdi)
and each of the testcases into a single store. Each of them used
to compile into craziness like this:
_test4:
movl $65535, %eax ## imm = 0xFFFF
andl (%rdi), %eax
shll $16, %esi
addl %eax, %esi
movl %esi, (%rdi)
ret
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101343 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 1eb7a9cc529c07b6dba2a2c205ef3a9b055e1b15 |
15-Apr-2010 |
Dan Gohman <gohman@apple.com> |
Add more const qualifiers for LLVM IR pointers in CodeGen.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101342 91177308-0d34-0410-b5e6-96231b3b80d8
unctionLoweringInfo.cpp
unctionLoweringInfo.h
electionDAGBuilder.cpp
electionDAGISel.cpp
|
| ae541aad5c36cb3e4256514447d1f81e253079c7 |
15-Apr-2010 |
Dan Gohman <gohman@apple.com> |
Add more const qualifiers for LLVM IR pointers in CodeGen.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101342 91177308-0d34-0410-b5e6-96231b3b80d8
unctionLoweringInfo.cpp
unctionLoweringInfo.h
electionDAGBuilder.cpp
electionDAGISel.cpp
|
| 36c56d0353f1a9c4e878f509aff85a62e5087dd4 |
15-Apr-2010 |
Dan Gohman <gohman@apple.com> |
Add const qualifiers to CodeGen's use of LLVM IR constructs.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101334 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
astISel.cpp
unctionLoweringInfo.cpp
nstrEmitter.cpp
DNodeDbgValue.h
electionDAG.cpp
electionDAGBuilder.cpp
electionDAGBuilder.h
electionDAGISel.cpp
argetLowering.cpp
|
| 46510a73e977273ec67747eb34cbdb43f815e451 |
15-Apr-2010 |
Dan Gohman <gohman@apple.com> |
Add const qualifiers to CodeGen's use of LLVM IR constructs.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101334 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
astISel.cpp
unctionLoweringInfo.cpp
nstrEmitter.cpp
DNodeDbgValue.h
electionDAG.cpp
electionDAGBuilder.cpp
electionDAGBuilder.h
electionDAGISel.cpp
argetLowering.cpp
|
| a0d172caced780efbecdb003f5cbb6607078b72b |
15-Apr-2010 |
Evan Cheng <evan.cheng@apple.com> |
More 80 violations.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101330 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
egalizeFloatTypes.cpp
egalizeIntegerTypes.cpp
egalizeTypesGeneric.cpp
egalizeVectorTypes.cpp
|
| adf979900c84d00e1fe0872a68d2819c654b6f29 |
15-Apr-2010 |
Evan Cheng <evan.cheng@apple.com> |
More 80 violations.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101330 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
egalizeFloatTypes.cpp
egalizeIntegerTypes.cpp
egalizeTypesGeneric.cpp
egalizeVectorTypes.cpp
|
| 9a9a23034d8b32b9b210222243bf6f17a5eaeea5 |
15-Apr-2010 |
Evan Cheng <evan.cheng@apple.com> |
80 col violations.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101325 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeTypes.cpp
|
| 22d286b218f3267d57c507678b1af0fccc3a5df0 |
15-Apr-2010 |
Evan Cheng <evan.cheng@apple.com> |
80 col violations.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101325 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeTypes.cpp
|
| c5a13c6844bf9a0e20e019e6b2a3c3ecd669c45a |
14-Apr-2010 |
Dan Gohman <gohman@apple.com> |
Delete unneeeded arguments.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101276 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| 6465265ae1b9d2d9ffb6cfcebf4b46ad97914aa7 |
14-Apr-2010 |
Dan Gohman <gohman@apple.com> |
Delete unneeeded arguments.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101276 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| cec4f389ab60e95e328bec6bafab03f2752db9e7 |
14-Apr-2010 |
Dan Gohman <gohman@apple.com> |
Delete unused arguments.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101275 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 6a732b5a669c85505a5785ee7ccb72eb9d1a4e6d |
14-Apr-2010 |
Dan Gohman <gohman@apple.com> |
Delete unused arguments.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101275 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 68cd2d98006541f382b71db28dcf15c2a49c903d |
14-Apr-2010 |
Dan Gohman <gohman@apple.com> |
Factor out EH landing pad code into a separate function, and constify
a bunch of stuff to support it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101273 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
unctionLoweringInfo.cpp
unctionLoweringInfo.h
electionDAGISel.cpp
|
| 2520864773dcb73d76d297605f4bc41c0cf3fa39 |
14-Apr-2010 |
Dan Gohman <gohman@apple.com> |
Factor out EH landing pad code into a separate function, and constify
a bunch of stuff to support it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101273 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
unctionLoweringInfo.cpp
unctionLoweringInfo.h
electionDAGISel.cpp
|
| d822b79314cdb86991d08a6616ad272a8fb2d156 |
14-Apr-2010 |
Dan Gohman <gohman@apple.com> |
Reset the debug location even if the instruction was a terminator.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101272 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 7f6b8b8891adedce162ce23f5b540f98af202b22 |
14-Apr-2010 |
Dan Gohman <gohman@apple.com> |
Reset the debug location even if the instruction was a terminator.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101272 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 118e5b6b2f70ed0ec6787435bf2afba56cabbbc3 |
14-Apr-2010 |
Dan Gohman <gohman@apple.com> |
Refine #includes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101269 91177308-0d34-0410-b5e6-96231b3b80d8
unctionLoweringInfo.h
|
| 11609451a5e9921d02dea5f1b6c6cd362a3cd676 |
14-Apr-2010 |
Dan Gohman <gohman@apple.com> |
Refine #includes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101269 91177308-0d34-0410-b5e6-96231b3b80d8
unctionLoweringInfo.h
|
| dd90d696ea50a7192861ddeb7efc7f46691bd503 |
14-Apr-2010 |
Dan Gohman <gohman@apple.com> |
Pull utility routines with no SelectionDAG dependence out of
SelectionDAGBuilder. FunctionLoweringInfo isn't an ideal place for
them to live, but it's better than SelectionDAGBuilder for now.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101267 91177308-0d34-0410-b5e6-96231b3b80d8
unctionLoweringInfo.cpp
unctionLoweringInfo.h
electionDAGBuilder.cpp
|
| fe85e764736f4d87104f3d1508c173f566c8c461 |
14-Apr-2010 |
Dan Gohman <gohman@apple.com> |
Pull utility routines with no SelectionDAG dependence out of
SelectionDAGBuilder. FunctionLoweringInfo isn't an ideal place for
them to live, but it's better than SelectionDAGBuilder for now.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101267 91177308-0d34-0410-b5e6-96231b3b80d8
unctionLoweringInfo.cpp
unctionLoweringInfo.h
electionDAGBuilder.cpp
|
| 4e3b4439e2bf6843c945edb45559846c795fb230 |
14-Apr-2010 |
Dan Gohman <gohman@apple.com> |
Fix typos in comments.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101266 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
electionDAGBuilder.h
|
| b02b62a2719bf5cfe12cfc902ab4e85d675450a0 |
14-Apr-2010 |
Dan Gohman <gohman@apple.com> |
Fix typos in comments.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101266 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
electionDAGBuilder.h
|
| 40ba3d21580f18bc87f9a784b84b88fc21964b10 |
14-Apr-2010 |
Dan Gohman <gohman@apple.com> |
Delete an obsolete comment.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101264 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.h
|
| 988099700a68eb7814841d036e03d3275fc2c001 |
14-Apr-2010 |
Dan Gohman <gohman@apple.com> |
Delete an obsolete comment.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101264 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.h
|
| ad3f65b502541717f90991f3bcf10adb3e845c94 |
14-Apr-2010 |
Dan Gohman <gohman@apple.com> |
Delete an unused function.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101263 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| c21a2dc8dfc7edd7722a09b61a0afdd3eaaa8637 |
14-Apr-2010 |
Dan Gohman <gohman@apple.com> |
Delete an unused function.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101263 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 7291f03b52404219400f2972b9c37814dcb9f1ce |
14-Apr-2010 |
Dan Gohman <gohman@apple.com> |
Clear the FunctionLoweringInfo object before doing other things that
don't need it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101262 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 5dc44335b19dde981e4ad69ab7a650269460ed3c |
14-Apr-2010 |
Dan Gohman <gohman@apple.com> |
Clear the FunctionLoweringInfo object before doing other things that
don't need it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101262 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 1be5d1ea7a3eaf309cde36d8531078570a1075eb |
14-Apr-2010 |
Dan Gohman <gohman@apple.com> |
Move this assert out of SelectionDAGISel into FunctionLoweringInfo, and
drop the redundant #ifndef NDEBUG.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101261 91177308-0d34-0410-b5e6-96231b3b80d8
unctionLoweringInfo.cpp
electionDAGISel.cpp
|
| 0e026729aef35523e4f8d6124a569dceb4286bbb |
14-Apr-2010 |
Dan Gohman <gohman@apple.com> |
Move this assert out of SelectionDAGISel into FunctionLoweringInfo, and
drop the redundant #ifndef NDEBUG.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101261 91177308-0d34-0410-b5e6-96231b3b80d8
unctionLoweringInfo.cpp
electionDAGISel.cpp
|
| c21e9ba3b53c716218bcfcceb95159bd7d368761 |
14-Apr-2010 |
Dan Gohman <gohman@apple.com> |
Add a comment.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101260 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 046fe6b6ba9851d3b8fed164493a54db3ac107e6 |
14-Apr-2010 |
Dan Gohman <gohman@apple.com> |
Add a comment.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101260 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| df317fed1e01f90c280562e38c1c7cc9401e9585 |
14-Apr-2010 |
Dan Gohman <gohman@apple.com> |
Move the code for initialing the entry block livein set out of
SelectionDAGISel.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101258 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| b13033f61c897224a0be2784faa721ff294c5254 |
14-Apr-2010 |
Dan Gohman <gohman@apple.com> |
Move the code for initialing the entry block livein set out of
SelectionDAGISel.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101258 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 8927a372950be8591f298fb9650b2059e0f0a6e8 |
14-Apr-2010 |
Dan Gohman <gohman@apple.com> |
Reorgnaize this code to be more tidy and readable.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101256 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| c0fb65da040668df543db514f05e4be571edf700 |
14-Apr-2010 |
Dan Gohman <gohman@apple.com> |
Reorgnaize this code to be more tidy and readable.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101256 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 2e3cbc9d2a1c43f42103f973f8965c909006d6d4 |
14-Apr-2010 |
Dan Gohman <gohman@apple.com> |
Trim #includes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101255 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 441516fb3def0125765532e4fe1b507cc89998e9 |
14-Apr-2010 |
Dan Gohman <gohman@apple.com> |
Trim #includes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101255 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 2b95c891744fc912f93f1972b7e49b9085b64400 |
14-Apr-2010 |
Dan Gohman <gohman@apple.com> |
Move the code for emitting livein copies out of SelectionDAGISel.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101254 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 98708260f55cab997a5db77e930a2bd35f4172aa |
14-Apr-2010 |
Dan Gohman <gohman@apple.com> |
Move the code for emitting livein copies out of SelectionDAGISel.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101254 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| ea01bf65af49643fd74b20beacf9bbaaec7afb0f |
14-Apr-2010 |
Dan Gohman <gohman@apple.com> |
Sink landing-pad marking code out of
SelectionDAGISel::runOnMachineFunction into FunctionLowering.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101252 91177308-0d34-0410-b5e6-96231b3b80d8
unctionLoweringInfo.cpp
electionDAGISel.cpp
|
| de4c0a7da7cfa1693ad9e6e09969003b610af08a |
14-Apr-2010 |
Dan Gohman <gohman@apple.com> |
Sink landing-pad marking code out of
SelectionDAGISel::runOnMachineFunction into FunctionLowering.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101252 91177308-0d34-0410-b5e6-96231b3b80d8
unctionLoweringInfo.cpp
electionDAGISel.cpp
|
| 732b510ba3d3ca77cc6d958b3f17acee94aa2c62 |
14-Apr-2010 |
Dan Gohman <gohman@apple.com> |
It's not necessary to recompute EB here.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101251 91177308-0d34-0410-b5e6-96231b3b80d8
unctionLoweringInfo.cpp
|
| d0d8275cb264b17bed836ccd35c923476a236426 |
14-Apr-2010 |
Dan Gohman <gohman@apple.com> |
It's not necessary to recompute EB here.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101251 91177308-0d34-0410-b5e6-96231b3b80d8
unctionLoweringInfo.cpp
|
| 91bdbdd927fe62cfacff7e2fc0fb08a8cd63e060 |
14-Apr-2010 |
Dan Gohman <gohman@apple.com> |
Generalize this code to handle Instructions in addition to ConstantExprs.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101210 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
|
| 32acbc1e50defdb7e27a4e8274f78988cf302c14 |
14-Apr-2010 |
Dan Gohman <gohman@apple.com> |
Generalize this code to handle Instructions in addition to ConstantExprs.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101210 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
|
| c6bbe1b544cf6f431bef31704c21273879b6f520 |
14-Apr-2010 |
Dan Gohman <gohman@apple.com> |
Reorder the methods of this class to be a little more organized.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101206 91177308-0d34-0410-b5e6-96231b3b80d8
unctionLoweringInfo.h
|
| b4be71e11215c8c02065097cb9b15ed7edbab7eb |
14-Apr-2010 |
Dan Gohman <gohman@apple.com> |
Reorder the methods of this class to be a little more organized.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101206 91177308-0d34-0410-b5e6-96231b3b80d8
unctionLoweringInfo.h
|
| 37391a533739b3f8ec0ca56f9ff08a4b8f8485af |
13-Apr-2010 |
Dan Gohman <gohman@apple.com> |
Add a few comments.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101148 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
|
| 4183e31978146ea529a87a2fc47b96aeb6cbe000 |
13-Apr-2010 |
Dan Gohman <gohman@apple.com> |
Add a few comments.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101148 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
|
| e0c1c1805e6a7522bcf5ac444078b8b7ff560a2c |
12-Apr-2010 |
Dan Gohman <gohman@apple.com> |
Remove unnecessary parens.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101010 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
electionDAG.cpp
|
| 58c2587ed8e2cd0928a959dbb213bdcc028b1213 |
12-Apr-2010 |
Dan Gohman <gohman@apple.com> |
Remove unnecessary parens.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101010 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
electionDAG.cpp
|
| 601b38c57717a77518a10464e32d427f028b0daa |
09-Apr-2010 |
Dan Gohman <gohman@apple.com> |
Add variants of ult, ule, etc. which take a uint64_t RHS, for convenience.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100824 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| e05678132345eb8a632362dbd320ee7d36226e67 |
09-Apr-2010 |
Dan Gohman <gohman@apple.com> |
Add variants of ult, ule, etc. which take a uint64_t RHS, for convenience.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100824 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| fbdd3aeb585c4eedfac31235313886768ed81558 |
08-Apr-2010 |
Ted Kremenek <kremenek@apple.com> |
Fix -Wsign-compare warning (issued by clang++).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100799 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| d0e88f3596fb214fd26bf91c481d87ffe499d992 |
08-Apr-2010 |
Ted Kremenek <kremenek@apple.com> |
Fix -Wsign-compare warning (issued by clang++).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100799 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| b8f832d331b5206b235262e4395b969d68cf439c |
08-Apr-2010 |
Benjamin Kramer <benny.kra@googlemail.com> |
Use twines to simplify calls to report_fatal_error. For code size and readability.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100756 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| 1bd7335a17010bd4d8f86736cf73cac9f3fb80a5 |
08-Apr-2010 |
Benjamin Kramer <benny.kra@googlemail.com> |
Use twines to simplify calls to report_fatal_error. For code size and readability.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100756 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| 6371648280456bf7052b8a6f4ee03cfdf2094fe6 |
08-Apr-2010 |
Evan Cheng <evan.cheng@apple.com> |
Avoid using f64 to lower memcpy from constant string. It's cheaper to use i32 store of immediates.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100751 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| c3b0c341e731b27b550ee9dcded9c17232b296b8 |
08-Apr-2010 |
Evan Cheng <evan.cheng@apple.com> |
Avoid using f64 to lower memcpy from constant string. It's cheaper to use i32 store of immediates.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100751 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 878bcb1edf2fd25ec5b30b71d66365248fe33e71 |
08-Apr-2010 |
Chris Lattner <sabre@nondot.org> |
convert a report_fatal_error that I was able to trigger into a nice error
so the user at least knows what inline asm is a problem. For example:
error: inline asm not supported yet: don't know how to handle tied indirect register inputs
pr8788-1.c:14:10: note: generated from here
asm ("\n" : "+r" (stack->regs)
^
Instead of:
fatal error: error in backend: Don't know how to handle tied indirect register inputs yet!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100731 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| 6129c376935db12dc79f6d515a1d96632adb480c |
08-Apr-2010 |
Chris Lattner <sabre@nondot.org> |
convert a report_fatal_error that I was able to trigger into a nice error
so the user at least knows what inline asm is a problem. For example:
error: inline asm not supported yet: don't know how to handle tied indirect register inputs
pr8788-1.c:14:10: note: generated from here
asm ("\n" : "+r" (stack->regs)
^
Instead of:
fatal error: error in backend: Don't know how to handle tied indirect register inputs yet!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100731 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| c09d2cffe8a20019079c372ad39ea9987b25f4da |
08-Apr-2010 |
Chris Lattner <sabre@nondot.org> |
minor tidying.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100725 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
electionDAGISel.cpp
|
| 87d677c1856bfdcb91d9daeb69dc5f261c73851e |
08-Apr-2010 |
Chris Lattner <sabre@nondot.org> |
minor tidying.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100725 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
electionDAGISel.cpp
|
| f089358a6614476111863ca914f7f07a1a8c69b2 |
08-Apr-2010 |
Chris Lattner <sabre@nondot.org> |
use assertions instead of unreachable for logic errors.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100724 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 35a389344d21178ee280c2410401b2060b5b879c |
08-Apr-2010 |
Chris Lattner <sabre@nondot.org> |
use assertions instead of unreachable for logic errors.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100724 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 8316f2d3810dd37bae0f847bc3efd495432b5893 |
08-Apr-2010 |
Chris Lattner <sabre@nondot.org> |
rename llvm::llvm_report_error -> llvm::report_fatal_error
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100709 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
electionDAGBuilder.cpp
electionDAGISel.cpp
|
| 75361b69f3f327842b9dad69fa7f28ae3b688412 |
08-Apr-2010 |
Chris Lattner <sabre@nondot.org> |
rename llvm::llvm_report_error -> llvm::report_fatal_error
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100709 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
electionDAGBuilder.cpp
electionDAGISel.cpp
|
| e4454320b3cfffe926a487c33fbeb454366de2f8 |
07-Apr-2010 |
Shih-wei Liao <sliao@google.com> |
libbcc
Change-Id: Ieaa3ebd5a38f370752495549f8870b534eeedfc5
ndroid.mk
AGCombiner.cpp
astISel.cpp
nstrEmitter.cpp
nstrEmitter.h
egalizeDAG.cpp
egalizeFloatTypes.cpp
egalizeIntegerTypes.cpp
egalizeTypes.cpp
egalizeTypesGeneric.cpp
egalizeVectorTypes.cpp
DDbgValue.h
cheduleDAGSDNodes.cpp
electionDAG.cpp
electionDAGBuilder.cpp
electionDAGISel.cpp
argetLowering.cpp
|
| 67825e3b8bfb36b3e3b9a273b644a99dec1f227b |
07-Apr-2010 |
Chris Lattner <sabre@nondot.org> |
fix 80 col violation, patch by Alastair Lynn
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100639 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 7f893c0712a080470b8c0bb8e7e711c7650eb2bd |
07-Apr-2010 |
Chris Lattner <sabre@nondot.org> |
fix 80 col violation, patch by Alastair Lynn
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100639 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| bafc8377097d73be2dbc1a4cf344a50ac9e69fe8 |
07-Apr-2010 |
Chris Lattner <sabre@nondot.org> |
Have the inst emitter add the !srcloc mdnode to the machine instr.
Have the asmprinter use the mdnode to scavenge a source location if
present. Document this nonsense in langref.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100607 91177308-0d34-0410-b5e6-96231b3b80d8
nstrEmitter.cpp
|
| cf9a415182aca6a432105a2a12168e1049de180a |
07-Apr-2010 |
Chris Lattner <sabre@nondot.org> |
Have the inst emitter add the !srcloc mdnode to the machine instr.
Have the asmprinter use the mdnode to scavenge a source location if
present. Document this nonsense in langref.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100607 91177308-0d34-0410-b5e6-96231b3b80d8
nstrEmitter.cpp
|
| b9a3f3d2d395ff32a4f40fe6642d5f0e38a2c0be |
07-Apr-2010 |
Chris Lattner <sabre@nondot.org> |
Three changes:
1. Introduce some enums and accessors in the InlineAsm class
that eliminate a ton of magic numbers when handling inline
asm SDNode.
2. Add a new MDNodeSDNode selection dag node type that holds
a MDNode (shocking!)
3. Add a new argument to ISD::INLINEASM nodes that hold !srcloc
metadata, propagating it to the instruction emitter, which
drops it.
No functionality change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100605 91177308-0d34-0410-b5e6-96231b3b80d8
nstrEmitter.cpp
cheduleDAGRRList.cpp
cheduleDAGSDNodes.h
electionDAG.cpp
electionDAGBuilder.cpp
electionDAGISel.cpp
|
| decc2671516e6c52ee2f29f7746f8d02753845ea |
07-Apr-2010 |
Chris Lattner <sabre@nondot.org> |
Three changes:
1. Introduce some enums and accessors in the InlineAsm class
that eliminate a ton of magic numbers when handling inline
asm SDNode.
2. Add a new MDNodeSDNode selection dag node type that holds
a MDNode (shocking!)
3. Add a new argument to ISD::INLINEASM nodes that hold !srcloc
metadata, propagating it to the instruction emitter, which
drops it.
No functionality change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100605 91177308-0d34-0410-b5e6-96231b3b80d8
nstrEmitter.cpp
cheduleDAGRRList.cpp
cheduleDAGSDNodes.h
electionDAG.cpp
electionDAGBuilder.cpp
electionDAGISel.cpp
|
| fbd947e63c59e0d8012b8358102e6f344b482c04 |
07-Apr-2010 |
Dale Johannesen <dalej@apple.com> |
Move printing of target-indepedent DEBUG_VALUE comments
into AsmPrinter. Target-dependent form is still generated
by FastISel and still handled in X86 code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100596 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
|
| 343b42e428079363ab09828734b2debfd7dbdc9e |
07-Apr-2010 |
Dale Johannesen <dalej@apple.com> |
Move printing of target-indepedent DEBUG_VALUE comments
into AsmPrinter. Target-dependent form is still generated
by FastISel and still handled in X86 code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100596 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
|
| 95b69e06d48f80e7e296fca634fa7c170958d02a |
06-Apr-2010 |
Dale Johannesen <dalej@apple.com> |
Allow for the possibility that a debug-value points
to a SDNode that didn't have code generated for it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100566 91177308-0d34-0410-b5e6-96231b3b80d8
nstrEmitter.cpp
|
| c4d7b14a92a9b34449eccdccce1263c4b68ad474 |
06-Apr-2010 |
Dale Johannesen <dalej@apple.com> |
Allow for the possibility that a debug-value points
to a SDNode that didn't have code generated for it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100566 91177308-0d34-0410-b5e6-96231b3b80d8
nstrEmitter.cpp
|
| b7ba5e6f47d281d3cab5bf448ca347bbea2247c1 |
06-Apr-2010 |
Mon P Wang <wangmp@apple.com> |
Remove assert to treat memmove and memset like memcpy
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100521 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 01f0e8561d8e95b1de94d3971b8ad0aa29c20951 |
06-Apr-2010 |
Mon P Wang <wangmp@apple.com> |
Remove assert to treat memmove and memset like memcpy
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100521 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 0cc7973e7339e7fdcac5b9228b1ecfc2c42f38e7 |
06-Apr-2010 |
Evan Cheng <evan.cheng@apple.com> |
Fix an obvious copy-n-paste bug. It's not known to cause any miscompilation.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100494 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 18141eed26d90b225ed4451a6b6521fb01f8eb31 |
06-Apr-2010 |
Evan Cheng <evan.cheng@apple.com> |
Fix an obvious copy-n-paste bug. It's not known to cause any miscompilation.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100494 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 75d54582ea85dd864fb7331ad27a988277de4f5e |
05-Apr-2010 |
Dan Gohman <gohman@apple.com> |
Add a comment.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100459 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 7b55d3665cc1f19859a77426f65218c8083b3142 |
05-Apr-2010 |
Dan Gohman <gohman@apple.com> |
Add a comment.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100459 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| b1074fff4cc946ff0fd10e7dccca3b73181f4e6a |
05-Apr-2010 |
Chris Lattner <sabre@nondot.org> |
lowering a volatile llvm.memcpy to a libc memcpy is ok.
PR6779
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100457 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 5c06a20814875d4b073204d5662491a4d00d7880 |
05-Apr-2010 |
Chris Lattner <sabre@nondot.org> |
lowering a volatile llvm.memcpy to a libc memcpy is ok.
PR6779
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100457 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 511b66984f119cd5486d815fb238d3dae5e45c90 |
05-Apr-2010 |
Chris Lattner <sabre@nondot.org> |
remove the now-redundant MMI pointer in SelectionDAG.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100419 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
electionDAGBuilder.cpp
electionDAGBuilder.h
|
| 512063dd0f91a76b9dd904dfff72a52b4d09e89f |
05-Apr-2010 |
Chris Lattner <sabre@nondot.org> |
remove the now-redundant MMI pointer in SelectionDAG.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100419 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
electionDAGBuilder.cpp
electionDAGBuilder.h
|
| d3d234dad3a3eddf2995606a050b699e4c676df8 |
05-Apr-2010 |
Chris Lattner <sabre@nondot.org> |
remove some redundant MMI arguments.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100417 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
electionDAGISel.cpp
|
| de6e783b2490447866b592cd39855e6f4d25efff |
05-Apr-2010 |
Chris Lattner <sabre@nondot.org> |
remove some redundant MMI arguments.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100417 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
electionDAGISel.cpp
|
| bc49100fb2399436fe15bc8892d81f79e6947003 |
05-Apr-2010 |
Chris Lattner <sabre@nondot.org> |
unthread MMI from FastISel
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100416 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
electionDAGISel.cpp
|
| ed3a8067a60ecf2c215e77327a57904c3ebc3355 |
05-Apr-2010 |
Chris Lattner <sabre@nondot.org> |
unthread MMI from FastISel
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100416 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
electionDAGISel.cpp
|
| 8b9430cbf64da05fcefd445f6a997260ba7fbc28 |
05-Apr-2010 |
Chris Lattner <sabre@nondot.org> |
trim some spurious references to DwarfWriter. SDIsel really doesn't
need it anymore, so don't addRequire it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100400 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
electionDAGISel.cpp
|
| ea761868b5e4c0166721daf259f86c3816b44f42 |
05-Apr-2010 |
Chris Lattner <sabre@nondot.org> |
trim some spurious references to DwarfWriter. SDIsel really doesn't
need it anymore, so don't addRequire it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100400 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
electionDAGISel.cpp
|
| 3c00f8936502465d080aa1a79a3b51d0fb89820c |
05-Apr-2010 |
Chris Lattner <sabre@nondot.org> |
selection dag doesn't need DwarfWriter, remove some tendrils.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100382 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
electionDAGBuilder.cpp
electionDAGISel.cpp
|
| ba79d72eab446e64d360e8263d77732b5e13d556 |
05-Apr-2010 |
Chris Lattner <sabre@nondot.org> |
selection dag doesn't need DwarfWriter, remove some tendrils.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100382 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
electionDAGBuilder.cpp
electionDAGISel.cpp
|
| a52b6176994e25280cf69a8b9069c1ebc5ef4fab |
05-Apr-2010 |
Chris Lattner <sabre@nondot.org> |
fastisel doesn't need DwarfWriter, remove some tendricles.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100381 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
electionDAGISel.cpp
|
| d850ac79b57e6e0bf68ee93a94d0b3dcd9f6ca35 |
05-Apr-2010 |
Chris Lattner <sabre@nondot.org> |
fastisel doesn't need DwarfWriter, remove some tendricles.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100381 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
electionDAGISel.cpp
|
| 483af3c218eaedddcf8873e6af35eba739f593ab |
04-Apr-2010 |
Mon P Wang <wangmp@apple.com> |
Reapply address space patch after fixing an issue in MemCopyOptimizer.
Added support for address spaces and added a isVolatile field to memcpy, memmove, and memset,
e.g., llvm.memcpy.i32(i8*, i8*, i32, i32) -> llvm.memcpy.p0i8.p0i8.i32(i8*, i8*, i32, i32, i1)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100304 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
electionDAGBuilder.cpp
|
| 20adc9dc4650313f017b27d9818eb2176238113d |
04-Apr-2010 |
Mon P Wang <wangmp@apple.com> |
Reapply address space patch after fixing an issue in MemCopyOptimizer.
Added support for address spaces and added a isVolatile field to memcpy, memmove, and memset,
e.g., llvm.memcpy.i32(i8*, i8*, i32, i32) -> llvm.memcpy.p0i8.p0i8.i32(i8*, i8*, i32, i32, i1)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100304 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
electionDAGBuilder.cpp
|
| a226fcbadb7db1393bdfea948c37878cd0ef6cd6 |
02-Apr-2010 |
Benjamin Kramer <benny.kra@googlemail.com> |
Fix anachronism.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100225 91177308-0d34-0410-b5e6-96231b3b80d8
DNodeDbgValue.h
|
| fd919200d4f678ff751f96a1d3b7e14785fb2338 |
02-Apr-2010 |
Benjamin Kramer <benny.kra@googlemail.com> |
Fix anachronism.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100225 91177308-0d34-0410-b5e6-96231b3b80d8
DNodeDbgValue.h
|
| 5da5274cba288ccb160edc1dda3c614f38d8f218 |
02-Apr-2010 |
Chris Lattner <sabre@nondot.org> |
fix the llvm-x86_64-linux buildbot.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100223 91177308-0d34-0410-b5e6-96231b3b80d8
DNodeDbgValue.h
|
| 42f95ca96b4dc252d334426729113d54c95f092a |
02-Apr-2010 |
Chris Lattner <sabre@nondot.org> |
fix the llvm-x86_64-linux buildbot.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100223 91177308-0d34-0410-b5e6-96231b3b80d8
DNodeDbgValue.h
|
| 65657aea6fd982c141b764915a45d015b7057431 |
02-Apr-2010 |
Chris Lattner <sabre@nondot.org> |
stop using DebugLoc::getUnknownLoc()
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100215 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
electionDAGBuilder.cpp
electionDAGBuilder.h
electionDAGISel.cpp
|
| a4f2bb08de92ccec21cbb3d0a9518384b0173660 |
02-Apr-2010 |
Chris Lattner <sabre@nondot.org> |
stop using DebugLoc::getUnknownLoc()
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100215 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
electionDAGBuilder.cpp
electionDAGBuilder.h
electionDAGISel.cpp
|
| b9692a7da0e45bd941437ae1974ee6919aff5a34 |
02-Apr-2010 |
Chris Lattner <sabre@nondot.org> |
Switch the code generator (except the JIT) onto the new DebugLoc
representation. This eliminates the 'DILocation' MDNodes for
file/line/col tuples from -O0 -g codegen.
This remove the old DebugLoc class, making it a typedef for DebugLoc,
I'll rename NewDebugLoc next.
I didn't update the JIT to use the new apis, so it will continue to
work, but be as slow as before. Someone should eventually do this
or, better yet, rip out the JIT debug info stuff and build the JIT
on top of MC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100209 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
electionDAGBuilder.cpp
electionDAGISel.cpp
|
| de4845c163a5847c82d7ce10ed0c320098bce6e0 |
02-Apr-2010 |
Chris Lattner <sabre@nondot.org> |
Switch the code generator (except the JIT) onto the new DebugLoc
representation. This eliminates the 'DILocation' MDNodes for
file/line/col tuples from -O0 -g codegen.
This remove the old DebugLoc class, making it a typedef for DebugLoc,
I'll rename NewDebugLoc next.
I didn't update the JIT to use the new apis, so it will continue to
work, but be as slow as before. Someone should eventually do this
or, better yet, rip out the JIT debug info stuff and build the JIT
on top of MC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100209 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
electionDAGBuilder.cpp
electionDAGISel.cpp
|
| 52ff54e483c6882e5876d1f8081feef428a459a4 |
02-Apr-2010 |
Evan Cheng <evan.cheng@apple.com> |
Correctly lower memset / memcpy of undef. It should be a nop. PR6767.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100208 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| f28f8bc40eedc6304ab25dd8bed486fa08f51f70 |
02-Apr-2010 |
Evan Cheng <evan.cheng@apple.com> |
Correctly lower memset / memcpy of undef. It should be a nop. PR6767.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100208 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| f9f760e09acb520d70f23cdbd6b2d288b9094a46 |
02-Apr-2010 |
Mon P Wang <wangmp@apple.com> |
Revert r100191 since it breaks objc in clang
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100199 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
electionDAGBuilder.cpp
|
| e754d3fb852abdeaf910c7331eed60f6303597c1 |
02-Apr-2010 |
Mon P Wang <wangmp@apple.com> |
Revert r100191 since it breaks objc in clang
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100199 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
electionDAGBuilder.cpp
|
| 703dd7c7eda9ffea68170bd9d8cdbc74322825dc |
02-Apr-2010 |
Mon P Wang <wangmp@apple.com> |
Reapply address space patch after fixing an issue in MemCopyOptimizer.
Added support for address spaces and added a isVolatile field to memcpy, memmove, and memset,
e.g., llvm.memcpy.i32(i8*, i8*, i32, i32) -> llvm.memcpy.p0i8.p0i8.i32(i8*, i8*, i32, i32, i1)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100191 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
electionDAGBuilder.cpp
|
| e33c848fa481b038d5ad0c7c898c33b2b27ec71e |
02-Apr-2010 |
Mon P Wang <wangmp@apple.com> |
Reapply address space patch after fixing an issue in MemCopyOptimizer.
Added support for address spaces and added a isVolatile field to memcpy, memmove, and memset,
e.g., llvm.memcpy.i32(i8*, i8*, i32, i32) -> llvm.memcpy.p0i8.p0i8.i32(i8*, i8*, i32, i32, i1)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100191 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
electionDAGBuilder.cpp
|
| 4a5fdcb5b8c91893fbf3cfce117ef15bd14d5b8a |
01-Apr-2010 |
Evan Cheng <evan.cheng@apple.com> |
Skip checking preferred alignment of GVs defined in other translation units all together.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100133 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 6cdb7e22aaa229d2b2845d7e8a5a11a30eeaac99 |
01-Apr-2010 |
Evan Cheng <evan.cheng@apple.com> |
Skip checking preferred alignment of GVs defined in other translation units all together.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100133 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 7fed26826a06a92975666b6a555af27261827a4a |
01-Apr-2010 |
Evan Cheng <evan.cheng@apple.com> |
- Avoid using floating point stores to implement memset unless the value is zero.
- Do not try to infer GV alignment unless its type is sized. It's not possible to infer alignment if it has opaque type.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100118 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 94107ba9ceaa199f8e5c03912511b0619c84226d |
01-Apr-2010 |
Evan Cheng <evan.cheng@apple.com> |
- Avoid using floating point stores to implement memset unless the value is zero.
- Do not try to infer GV alignment unless its type is sized. It's not possible to infer alignment if it has opaque type.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100118 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 0b592c03bc7cc8c973f5fbda6c149c1b3de2bf84 |
01-Apr-2010 |
Evan Cheng <evan.cheng@apple.com> |
Fix sdisel memcpy, memset, memmove lowering:
1. Makes it possible to lower with floating point loads and stores.
2. Avoid unaligned loads / stores unless it's fast.
3. Fix some memcpy lowering logic bug related to when to optimize a
load from constant string into a constant.
4. Adjust x86 memcpy lowering threshold to make it more sane.
5. Fix x86 target hook so it uses vector and floating point memory
ops more effectively.
rdar://7774704
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100090 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
electionDAG.cpp
|
| 255f20f7f76e4ca1ac1c73294852cb6fcb18c77d |
01-Apr-2010 |
Evan Cheng <evan.cheng@apple.com> |
Fix sdisel memcpy, memset, memmove lowering:
1. Makes it possible to lower with floating point loads and stores.
2. Avoid unaligned loads / stores unless it's fast.
3. Fix some memcpy lowering logic bug related to when to optimize a
load from constant string into a constant.
4. Adjust x86 memcpy lowering threshold to make it more sane.
5. Fix x86 target hook so it uses vector and floating point memory
ops more effectively.
rdar://7774704
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100090 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
electionDAG.cpp
|
| 0ab86bed697bb390c97bd73a66cc4945ec75275b |
31-Mar-2010 |
Chris Lattner <sabre@nondot.org> |
use the optimized debug info apis in sdisel.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@99986 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 23dbf6683b5de64bd0b2f05a5a311a98480b3a72 |
31-Mar-2010 |
Chris Lattner <sabre@nondot.org> |
use the optimized debug info apis in sdisel.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@99986 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 0b44e49f000a4da6b9948bdaa923b48911d2f47a |
31-Mar-2010 |
Chris Lattner <sabre@nondot.org> |
add new apis for getting/setting !dbg metadata on
instructions. In addition to being a convenience,
they are faster than the old apis, particularly when
not going from an MDKindID like people should be
doing.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@99982 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
electionDAGBuilder.cpp
|
| 870cfcf9a6189b65a8ee805b93a2c737c0183e62 |
31-Mar-2010 |
Chris Lattner <sabre@nondot.org> |
add new apis for getting/setting !dbg metadata on
instructions. In addition to being a convenience,
they are faster than the old apis, particularly when
not going from an MDKindID like people should be
doing.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@99982 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
electionDAGBuilder.cpp
|
| 76821a73c39a21f7116ef99aa60940b07aedefac |
31-Mar-2010 |
Bob Wilson <bob.wilson@apple.com> |
Revert Mon Ping's change 99928, since it broke all the llvm-gcc buildbots.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@99948 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
electionDAGBuilder.cpp
|
| 100f090adde26005b9f1eca96871dff52825b27b |
31-Mar-2010 |
Bob Wilson <bob.wilson@apple.com> |
Revert Mon Ping's change 99928, since it broke all the llvm-gcc buildbots.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@99948 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
electionDAGBuilder.cpp
|
| f4862b06ca84fae2bb80e4936b3b2e598419c704 |
30-Mar-2010 |
Mon P Wang <wangmp@apple.com> |
Added support for address spaces and added a isVolatile field to memcpy, memmove, and memset,
e.g., llvm.memcpy.i32(i8*, i8*, i32, i32) -> llvm.memcpy.p0i8.p0i8.i32(i8*, i8*, i32, i32, i1)
A update of langref will occur in a subsequent checkin.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@99928 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
electionDAGBuilder.cpp
|
| 808bab0169ab7d2e8dfdc72dd2c991cd8ff2396d |
30-Mar-2010 |
Mon P Wang <wangmp@apple.com> |
Added support for address spaces and added a isVolatile field to memcpy, memmove, and memset,
e.g., llvm.memcpy.i32(i8*, i8*, i32, i32) -> llvm.memcpy.p0i8.p0i8.i32(i8*, i8*, i32, i32, i1)
A update of langref will occur in a subsequent checkin.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@99928 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
electionDAGBuilder.cpp
|
| 1ac55a69f0e84c14ed2d4651dcd574f14f30e751 |
30-Mar-2010 |
Evan Cheng <evan.cheng@apple.com> |
Funky indentation.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@99901 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 87bd1916024497ceaf3cdc050e743a532813e82b |
30-Mar-2010 |
Evan Cheng <evan.cheng@apple.com> |
Funky indentation.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@99901 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| f9d000304234675eb34c984e846251bb643bf170 |
29-Mar-2010 |
Evan Cheng <evan.cheng@apple.com> |
Fix PR4975. Avoid referencing empty vector.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@99840 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| 8e36a5c960e07555d80fb98d71c692c20f3ea6c4 |
29-Mar-2010 |
Evan Cheng <evan.cheng@apple.com> |
Fix PR4975. Avoid referencing empty vector.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@99840 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| e392242edab8709353202295344ec92cc620c927 |
29-Mar-2010 |
Evan Cheng <evan.cheng@apple.com> |
Pool allocate SDDbgValue nodes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@99836 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
electionDAGBuilder.cpp
|
| 31441b7e95e0840e1ae144e5db6f791d6a36bc60 |
29-Mar-2010 |
Evan Cheng <evan.cheng@apple.com> |
Pool allocate SDDbgValue nodes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@99836 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
electionDAGBuilder.cpp
|
| b9eb9ebef6db1f9e7cc885c41d257cf5b1237e97 |
28-Mar-2010 |
Chris Lattner <sabre@nondot.org> |
add a statistic for the # times isel has to backtrack.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@99774 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| bed993d8a4ede75a24a142437057b42498ce5b9f |
28-Mar-2010 |
Chris Lattner <sabre@nondot.org> |
add a statistic for the # times isel has to backtrack.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@99774 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 8b09306a76d9260af846a841f414bb10833a52fa |
28-Mar-2010 |
Chris Lattner <sabre@nondot.org> |
finally remove the immAllOnesV_bc/immAllZerosV_bc patterns
and those derived from them. These are obnoxious because
they were written as: PatLeaf<(bitconvert). Not having an
argument was foiling adding better type checking for operand
count matching up with what was required (in this case,
bitconvert always requires an operand!)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@99759 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| caa8870fe09f5526e611434b6bb9f7040c7dfa60 |
28-Mar-2010 |
Chris Lattner <sabre@nondot.org> |
finally remove the immAllOnesV_bc/immAllZerosV_bc patterns
and those derived from them. These are obnoxious because
they were written as: PatLeaf<(bitconvert). Not having an
argument was foiling adding better type checking for operand
count matching up with what was required (in this case,
bitconvert always requires an operand!)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@99759 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| c1900d9f5d5565be00eaa8c69bde61f6b95dc3c8 |
28-Mar-2010 |
Chris Lattner <sabre@nondot.org> |
comply with the wishes of a fixme.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@99742 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 5d9a1bce83a18a4f972c5974fa9d7fa3c4de001f |
28-Mar-2010 |
Chris Lattner <sabre@nondot.org> |
comply with the wishes of a fixme.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@99742 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| e185c2a24de741374f1286111ac69d911b4f8ab0 |
28-Mar-2010 |
Chris Lattner <sabre@nondot.org> |
now that (parallel) is gone and a variety of bugs in targets
are cleaned up, we can remove an old fixme.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@99741 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| b0e483e2c47c122f58cec4c83e37ceef92c36aef |
28-Mar-2010 |
Chris Lattner <sabre@nondot.org> |
now that (parallel) is gone and a variety of bugs in targets
are cleaned up, we can remove an old fixme.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@99741 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 05a383ab4d46656b57c5b36337ca5e819350796d |
28-Mar-2010 |
Chris Lattner <sabre@nondot.org> |
add an optimized form of OPC_EmitMergeInputChains for the 1, 0 and
1, 1 cases which are by-far the most frequent. This shrinks the X86
isel table from 77014 -> 74657 bytes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@99740 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| aa4e3391c8814c6ce0bbc530ea4d5905414b2763 |
28-Mar-2010 |
Chris Lattner <sabre@nondot.org> |
add an optimized form of OPC_EmitMergeInputChains for the 1, 0 and
1, 1 cases which are by-far the most frequent. This shrinks the X86
isel table from 77014 -> 74657 bytes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@99740 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 32ac9e77eb4519d019bf8a7c9c3be71dd21530c0 |
28-Mar-2010 |
Chris Lattner <sabre@nondot.org> |
don't add nodes to the now-dead nodes list multiple times, this
can cause a crash on crazy situations in msp430 when morph-node-to
is disabled.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@99739 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 856fb395e46a8d485081acbf11928047d852c636 |
28-Mar-2010 |
Chris Lattner <sabre@nondot.org> |
don't add nodes to the now-dead nodes list multiple times, this
can cause a crash on crazy situations in msp430 when morph-node-to
is disabled.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@99739 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| c16022adcf2f6e76d8d0c9bf003d6ab7dbb8781b |
28-Mar-2010 |
Chris Lattner <sabre@nondot.org> |
don't add flag nodes with chain results to the NowDeadNodes
list multiple times when MorphNodeTo can't be applied.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@99735 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 19e37cbf4fa202fc7ca1d769e5ce476f83290dd5 |
28-Mar-2010 |
Chris Lattner <sabre@nondot.org> |
don't add flag nodes with chain results to the NowDeadNodes
list multiple times when MorphNodeTo can't be applied.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@99735 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 92800f1a0d2d20c82a99a437c1096de4c2e388a4 |
27-Mar-2010 |
Chris Lattner <sabre@nondot.org> |
improve -debug-only=isel comments for cases when we don't enter a
scope due to obviously false predicate.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@99723 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| a6f8693385636b18ae05e30f5017393ad1309bb2 |
27-Mar-2010 |
Chris Lattner <sabre@nondot.org> |
improve -debug-only=isel comments for cases when we don't enter a
scope due to obviously false predicate.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@99723 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 7012a49c6957952e247b43516739d57daf28ad30 |
27-Mar-2010 |
Bill Wendling <isanbard@gmail.com> |
Forgot the part where we handle the ".llvm.eh.catch.all.value".
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@99697 91177308-0d34-0410-b5e6-96231b3b80d8
unctionLoweringInfo.cpp
|
| e6b293b78d8eb3eb749771d2201ace3ecd076010 |
27-Mar-2010 |
Bill Wendling <isanbard@gmail.com> |
Forgot the part where we handle the ".llvm.eh.catch.all.value".
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@99697 91177308-0d34-0410-b5e6-96231b3b80d8
unctionLoweringInfo.cpp
|
| cad2210dad6c96b53b0d9a63b3caa74e7baa59aa |
26-Mar-2010 |
Anton Korobeynikov <asl@math.spbu.ru> |
Add few missed libcalls and correct names for others.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@99656 91177308-0d34-0410-b5e6-96231b3b80d8
argetLowering.cpp
|
| de0118c324a3fb8b0b5afa8e46996d9b81666bfd |
26-Mar-2010 |
Anton Korobeynikov <asl@math.spbu.ru> |
Add few missed libcalls and correct names for others.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@99656 91177308-0d34-0410-b5e6-96231b3b80d8
argetLowering.cpp
|
| ae54e1b9db4e89e926f5e73b17d388dc1eb676fa |
26-Mar-2010 |
Evan Cheng <evan.cheng@apple.com> |
LiveVariables should clear kill / dead markers first. This allows us to remove a hack in the scheduler.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@99597 91177308-0d34-0410-b5e6-96231b3b80d8
nstrEmitter.cpp
|
| d05e8055362be52fc33dcc685ba2ae5c722506b5 |
26-Mar-2010 |
Evan Cheng <evan.cheng@apple.com> |
LiveVariables should clear kill / dead markers first. This allows us to remove a hack in the scheduler.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@99597 91177308-0d34-0410-b5e6-96231b3b80d8
nstrEmitter.cpp
|
| b9a3008079b89fcfc2cde8c46f4db45536260166 |
25-Mar-2010 |
Chris Lattner <sabre@nondot.org> |
fix a valgrind error on copy-constructor-synthesis.cpp, which is caused when
the custom insertion hook deletes the instruction, then we try to set dead
flags on it. Neither the code that I added nor the code that was there
before was safe.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@99538 91177308-0d34-0410-b5e6-96231b3b80d8
nstrEmitter.cpp
|
| 7bf198fd607b356e767e0577cac81c3491c4bc90 |
25-Mar-2010 |
Chris Lattner <sabre@nondot.org> |
fix a valgrind error on copy-constructor-synthesis.cpp, which is caused when
the custom insertion hook deletes the instruction, then we try to set dead
flags on it. Neither the code that I added nor the code that was there
before was safe.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@99538 91177308-0d34-0410-b5e6-96231b3b80d8
nstrEmitter.cpp
|
| a77e51ef30db86c78c4ab0c0b377cfbc4da4892e |
25-Mar-2010 |
Evan Cheng <evan.cheng@apple.com> |
Scheduler assumes SDDbgValue nodes are in source order. That's true currently. But add an assertion to verify it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@99501 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGSDNodes.cpp
|
| 4ec9bd9a6f92a10185870bae2cebce199f6acc5a |
25-Mar-2010 |
Evan Cheng <evan.cheng@apple.com> |
Scheduler assumes SDDbgValue nodes are in source order. That's true currently. But add an assertion to verify it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@99501 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGSDNodes.cpp
|
| 0de5856fbeb6a3e9001d478f4c6df257154d6a87 |
25-Mar-2010 |
Chris Lattner <sabre@nondot.org> |
Change tblgen to emit FOOISD opcode names as two
bytes instead of one byte. This is important because
we're running up to too many opcodes to fit in a byte
and it is aggrevated by FIRST_TARGET_MEMORY_OPCODE
making the numbering sparse. This just bites the
bullet and bloats out the table. In practice, this
increases the size of the x86 isel table from 74.5K
to 76K. I think we'll cope :)
This fixes rdar://7791648
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@99494 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| d5d5a3dcbaa4e7f394ba045e2d7d0ec3aa76f50c |
25-Mar-2010 |
Chris Lattner <sabre@nondot.org> |
Change tblgen to emit FOOISD opcode names as two
bytes instead of one byte. This is important because
we're running up to too many opcodes to fit in a byte
and it is aggrevated by FIRST_TARGET_MEMORY_OPCODE
making the numbering sparse. This just bites the
bullet and bloats out the table. In practice, this
increases the size of the x86 isel table from 74.5K
to 76K. I think we'll cope :)
This fixes rdar://7791648
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@99494 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| fbd664a8030a17e7731b2d85839cca9ceefb196c |
25-Mar-2010 |
Evan Cheng <evan.cheng@apple.com> |
Remove a fixme that doesn't make sense any more.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@99489 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGSDNodes.cpp
|
| 167bda4baa9482fa72d7b320aaa8aee50a0aa520 |
25-Mar-2010 |
Evan Cheng <evan.cheng@apple.com> |
Remove a fixme that doesn't make sense any more.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@99489 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGSDNodes.cpp
|
| ef134fd771b161666b5417dc2ed4594f7927b1eb |
25-Mar-2010 |
Evan Cheng <evan.cheng@apple.com> |
Make sure SDDbgValue.Invalid is initialized to false by all the constructors.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@99487 91177308-0d34-0410-b5e6-96231b3b80d8
DNodeDbgValue.h
|
| c388ace6f9012c503630eb633e3977e0fc42bb00 |
25-Mar-2010 |
Evan Cheng <evan.cheng@apple.com> |
Make sure SDDbgValue.Invalid is initialized to false by all the constructors.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@99487 91177308-0d34-0410-b5e6-96231b3b80d8
DNodeDbgValue.h
|
| cc2f056d727637ecbb355842c575d280024f0040 |
25-Mar-2010 |
Chris Lattner <sabre@nondot.org> |
Make the NDEBUG assertion stronger and more clear what is
happening.
Enhance scheduling to set the DEAD flag on implicit defs
more aggressively. Before, we'd set an implicit def operand
to dead if it were present in the SDNode corresponding to
the machineinstr but had no use. Now we do it in this case
AND if the implicit def does not exist in the SDNode at all.
This exposes a couple of problems: one is the FIXME, which
causes a live intervals crash on CodeGen/X86/sibcall.ll.
The second is that it makes machinecse and licm more
aggressive (which is a good thing) but also exposes a case
where licm hoists a set0 and then it doesn't get resunk.
Talking to codegen folks about both these issues, but I need
this patch in in the meantime.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@99485 91177308-0d34-0410-b5e6-96231b3b80d8
nstrEmitter.cpp
|
| 47cdf4abff20eb9d7d05406cc1a9be2890ed39bb |
25-Mar-2010 |
Chris Lattner <sabre@nondot.org> |
Make the NDEBUG assertion stronger and more clear what is
happening.
Enhance scheduling to set the DEAD flag on implicit defs
more aggressively. Before, we'd set an implicit def operand
to dead if it were present in the SDNode corresponding to
the machineinstr but had no use. Now we do it in this case
AND if the implicit def does not exist in the SDNode at all.
This exposes a couple of problems: one is the FIXME, which
causes a live intervals crash on CodeGen/X86/sibcall.ll.
The second is that it makes machinecse and licm more
aggressive (which is a good thing) but also exposes a case
where licm hoists a set0 and then it doesn't get resunk.
Talking to codegen folks about both these issues, but I need
this patch in in the meantime.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@99485 91177308-0d34-0410-b5e6-96231b3b80d8
nstrEmitter.cpp
|
| 4575d32812f946d69cd29c306b5e323f12fef37c |
25-Mar-2010 |
Chris Lattner <sabre@nondot.org> |
reapply 99444/99445, which I speculatively reverted in
r99453.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@99482 91177308-0d34-0410-b5e6-96231b3b80d8
nstrEmitter.cpp
nstrEmitter.h
|
| 3d7d07ef038696cefcaf3ce5335072964199a78d |
25-Mar-2010 |
Chris Lattner <sabre@nondot.org> |
reapply 99444/99445, which I speculatively reverted in
r99453.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@99482 91177308-0d34-0410-b5e6-96231b3b80d8
nstrEmitter.cpp
nstrEmitter.h
|
| fd9760502d0fc87ac49dac834660a657f6b78370 |
25-Mar-2010 |
Evan Cheng <evan.cheng@apple.com> |
Change how dbg_value sdnodes are converted into machine instructions. Their placement should be determined by the relative order of incoming llvm instructions. The scheduler will now use the SDNode ordering information to determine where to insert them. A dbg_value instruction is inserted after the instruction with the last highest source order and before the instruction with the next highest source order. It will optimize the placement by inserting right after the instruction that produces the value if they have consecutive order numbers.
Here is a theoretical example that illustrates why the placement is important.
tmp1 =
store tmp1 -> x
...
tmp2 = add ...
...
call
...
store tmp2 -> x
Now mem2reg comes along:
tmp1 =
dbg_value (tmp1 -> x)
...
tmp2 = add ...
...
call
...
dbg_value (tmp2 -> x)
When the debugger examine the value of x after the add instruction but before the call, it should have the value of tmp1.
Furthermore, for dbg_value's that reference constants, they should not be emitted at the beginning of the block (since they do not have "producers").
This patch also cleans up how SDISel manages DbgValue nodes. It allow a SDNode to be referenced by multiple SDDbgValue nodes. When a SDNode is deleted, it uses the information to find the SDDbgValues and invalidate them. They are not deleted until the corresponding SelectionDAG is destroyed.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@99469 91177308-0d34-0410-b5e6-96231b3b80d8
nstrEmitter.cpp
nstrEmitter.h
DNodeDbgValue.h
cheduleDAGSDNodes.cpp
electionDAG.cpp
electionDAGBuilder.cpp
|
| bfcb3051899b7141a946d769fcf6e8a8453bc530 |
25-Mar-2010 |
Evan Cheng <evan.cheng@apple.com> |
Change how dbg_value sdnodes are converted into machine instructions. Their placement should be determined by the relative order of incoming llvm instructions. The scheduler will now use the SDNode ordering information to determine where to insert them. A dbg_value instruction is inserted after the instruction with the last highest source order and before the instruction with the next highest source order. It will optimize the placement by inserting right after the instruction that produces the value if they have consecutive order numbers.
Here is a theoretical example that illustrates why the placement is important.
tmp1 =
store tmp1 -> x
...
tmp2 = add ...
...
call
...
store tmp2 -> x
Now mem2reg comes along:
tmp1 =
dbg_value (tmp1 -> x)
...
tmp2 = add ...
...
call
...
dbg_value (tmp2 -> x)
When the debugger examine the value of x after the add instruction but before the call, it should have the value of tmp1.
Furthermore, for dbg_value's that reference constants, they should not be emitted at the beginning of the block (since they do not have "producers").
This patch also cleans up how SDISel manages DbgValue nodes. It allow a SDNode to be referenced by multiple SDDbgValue nodes. When a SDNode is deleted, it uses the information to find the SDDbgValues and invalidate them. They are not deleted until the corresponding SelectionDAG is destroyed.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@99469 91177308-0d34-0410-b5e6-96231b3b80d8
nstrEmitter.cpp
nstrEmitter.h
DNodeDbgValue.h
cheduleDAGSDNodes.cpp
electionDAG.cpp
electionDAGBuilder.cpp
|
| ed62517410e3e16d5c80bad448063c1bc9e6ad20 |
25-Mar-2010 |
Chris Lattner <sabre@nondot.org> |
revert 99444/99445. This doesn't cause the failure of
2006-07-19-stwbrx-crash.ll for me, but it's the only likely
patch in the blame list of several bots. Lets see if this
fixes it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@99453 91177308-0d34-0410-b5e6-96231b3b80d8
nstrEmitter.cpp
nstrEmitter.h
|
| d41952da109565ab11b7f435c39a0c524c75298e |
25-Mar-2010 |
Chris Lattner <sabre@nondot.org> |
revert 99444/99445. This doesn't cause the failure of
2006-07-19-stwbrx-crash.ll for me, but it's the only likely
patch in the blame list of several bots. Lets see if this
fixes it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@99453 91177308-0d34-0410-b5e6-96231b3b80d8
nstrEmitter.cpp
nstrEmitter.h
|
| 5d957ad9d56383c90eef0576413b0c94f4c34222 |
24-Mar-2010 |
Chris Lattner <sabre@nondot.org> |
remove dead argument.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@99445 91177308-0d34-0410-b5e6-96231b3b80d8
nstrEmitter.cpp
nstrEmitter.h
|
| 4020670195e96f98f949737f95dcd4916282a5e8 |
24-Mar-2010 |
Chris Lattner <sabre@nondot.org> |
remove dead argument.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@99445 91177308-0d34-0410-b5e6-96231b3b80d8
nstrEmitter.cpp
nstrEmitter.h
|
| 389f3b84f5a1535bb9be169ff1896c24723764c9 |
24-Mar-2010 |
Chris Lattner <sabre@nondot.org> |
split EmitNode in half to reduce indentation.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@99444 91177308-0d34-0410-b5e6-96231b3b80d8
nstrEmitter.cpp
nstrEmitter.h
|
| c243dea003bfe11cb4cdc0cef80997b06b96cb21 |
24-Mar-2010 |
Chris Lattner <sabre@nondot.org> |
split EmitNode in half to reduce indentation.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@99444 91177308-0d34-0410-b5e6-96231b3b80d8
nstrEmitter.cpp
nstrEmitter.h
|
| 53ea1f185f7a15b80b68e6124fa0e41eb8648d74 |
24-Mar-2010 |
Dan Gohman <gohman@apple.com> |
Remove the ConvertActions table and associated code, which is unused.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@99372 91177308-0d34-0410-b5e6-96231b3b80d8
argetLowering.cpp
|
| 0f920e55fcdc5c678a389e2aa4c792be5062c4ea |
24-Mar-2010 |
Dan Gohman <gohman@apple.com> |
Remove the ConvertActions table and associated code, which is unused.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@99372 91177308-0d34-0410-b5e6-96231b3b80d8
argetLowering.cpp
|
| 1296c8c5a5aa965e377f011b4b3d742b3a80f9f8 |
23-Mar-2010 |
Dan Gohman <gohman@apple.com> |
Revert 99335. getTypeToExpandTo's iterative behavior is actually
needed here.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@99339 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeIntegerTypes.cpp
|
| bc7a902713c4e3f13a93c383e647d2a18712f447 |
23-Mar-2010 |
Dan Gohman <gohman@apple.com> |
Revert 99335. getTypeToExpandTo's iterative behavior is actually
needed here.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@99339 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeIntegerTypes.cpp
|
| 37d4cb15530e2548de231844437786fcd162af28 |
23-Mar-2010 |
Dan Gohman <gohman@apple.com> |
Remove getTypeToExpandTo, since it isn't adding much value
beyond just calling getTypeToTransformTo.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@99335 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeIntegerTypes.cpp
|
| 349074896f17cdebf484f6be97248c6545ecf93b |
23-Mar-2010 |
Dan Gohman <gohman@apple.com> |
Remove getTypeToExpandTo, since it isn't adding much value
beyond just calling getTypeToTransformTo.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@99335 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeIntegerTypes.cpp
|
| 242cfb9313ebd53ae2c91c10f706c9ed8699e9a1 |
19-Mar-2010 |
Mon P Wang <wangmp@apple.com> |
Fixed a widening bug where we were not using the correct size for the load
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98920 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeVectorTypes.cpp
|
| c1e5d491a0bd99a71c87f6a69bafbecd2f948c82 |
19-Mar-2010 |
Mon P Wang <wangmp@apple.com> |
Fixed a widening bug where we were not using the correct size for the load
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98920 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeVectorTypes.cpp
|
| c761f639f56add3f00ac84e2379d30d648a8bb81 |
18-Mar-2010 |
Anton Korobeynikov <asl@math.spbu.ru> |
Get rid of target-specific nodes for fp16 <-> fp32 conversion.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98888 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| f0d500768d1a42e91c6324e6c8677cbe26df6e27 |
18-Mar-2010 |
Anton Korobeynikov <asl@math.spbu.ru> |
Get rid of target-specific nodes for fp16 <-> fp32 conversion.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98888 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 7616a1ef5c411f4503cc99bf0a12a863551edf95 |
18-Mar-2010 |
Dan Gohman <gohman@apple.com> |
Define placement new wrappers for BumpPtrAllocator and
RecyclingAllocator to allow client code to be simpler, and
simplify several clients.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98847 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 9553188fccbf0ae9c5b6bef26d0d2bd5feff8b59 |
18-Mar-2010 |
Dan Gohman <gohman@apple.com> |
Define placement new wrappers for BumpPtrAllocator and
RecyclingAllocator to allow client code to be simpler, and
simplify several clients.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98847 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 1f8f580940e6374729d9190b931175c8636d8ad2 |
18-Mar-2010 |
Bob Wilson <bob.wilson@apple.com> |
Fix pr6543: svn r88806 changed MachineJumpTableInfo::getJumpTableIndex() to
always create a new jump table. The intention was to avoid merging jump
tables in SelectionDAGBuilder, and to wait for the branch folding pass to
merge tables. Unfortunately, the same getJumpTableIndex() method is also
used to merge tables in branch folding, so as a result of this change
branch tables are never merged. Worse, the branch folding code is expecting
getJumpTableIndex to always return the index of an existing table, but with
this change, it never does so. In at least some cases, e.g., pr6543, this
creates references to non-existent tables.
I've fixed the problem by adding a new createJumpTableIndex function, which
will always create a new table, and I've changed getJumpTableIndex to only
look at existing tables.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98845 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| d1ec31dca534a8816d7f2fcbfdc7ed4476b471d3 |
18-Mar-2010 |
Bob Wilson <bob.wilson@apple.com> |
Fix pr6543: svn r88806 changed MachineJumpTableInfo::getJumpTableIndex() to
always create a new jump table. The intention was to avoid merging jump
tables in SelectionDAGBuilder, and to wait for the branch folding pass to
merge tables. Unfortunately, the same getJumpTableIndex() method is also
used to merge tables in branch folding, so as a result of this change
branch tables are never merged. Worse, the branch folding code is expecting
getJumpTableIndex to always return the index of an existing table, but with
this change, it never does so. In at least some cases, e.g., pr6543, this
creates references to non-existent tables.
I've fixed the problem by adding a new createJumpTableIndex function, which
will always create a new table, and I've changed getJumpTableIndex to only
look at existing tables.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98845 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| 67b64b54702d1363b1740d7743c147be04d48905 |
18-Mar-2010 |
Devang Patel <dpatel@apple.com> |
Fix comment.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98830 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| 1ac2429d1f1b89a9a9c0397ef63c4f4fa535fee8 |
18-Mar-2010 |
Devang Patel <dpatel@apple.com> |
Fix comment.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98830 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| 1fa4f857d2edaaa97c35715f3adce2beba923480 |
18-Mar-2010 |
Devang Patel <dpatel@apple.com> |
Debug info intrinsic does not intefer during tail call optimization.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98778 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| c3188ce0f1ff2d1b830702a93134905b9719f410 |
18-Mar-2010 |
Devang Patel <dpatel@apple.com> |
Debug info intrinsic does not intefer during tail call optimization.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98778 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| 535969b90b24725bd3145ffd638077a5dd5e50fd |
16-Mar-2010 |
Chris Lattner <sabre@nondot.org> |
reapply r98656 unmodified, which exposed the asmprinter not
handling constant unions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98680 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| 93b122d3c484a8451024d6947be0f4037f86def0 |
16-Mar-2010 |
Chris Lattner <sabre@nondot.org> |
reapply r98656 unmodified, which exposed the asmprinter not
handling constant unions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98680 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| 15b64f335b2d8566d58a5e791c12c0ca0a17fe7a |
16-Mar-2010 |
Daniel Dunbar <daniel@zuster.org> |
Revert r98656, its breaking all over the place.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98662 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| b85c7100c5f1ef34bace56c6978eca429df798f6 |
16-Mar-2010 |
Daniel Dunbar <daniel@zuster.org> |
Revert r98656, its breaking all over the place.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98662 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| 777448f6491b6b82e2c39f11d353e39c24dd20e2 |
16-Mar-2010 |
Chris Lattner <sabre@nondot.org> |
improve support for uniontype and ConstantUnion, patch by Tim Northover!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98656 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| 8b3b34f410f2bd05943e1c6f9b0514209731421d |
16-Mar-2010 |
Chris Lattner <sabre@nondot.org> |
improve support for uniontype and ConstantUnion, patch by Tim Northover!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98656 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| 893a97f1da187009c5028ffd3a93f99fc728c3c0 |
15-Mar-2010 |
Devang Patel <dpatel@apple.com> |
Create SDDbgValue for dbg_value intrinsics and remember its connections with DAG nodes.
This is a work in progress. Patch by Dale Johannesen!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98568 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| 001903485fc78a4ae5f33420b25db73a22bfdf4a |
15-Mar-2010 |
Devang Patel <dpatel@apple.com> |
Create SDDbgValue for dbg_value intrinsics and remember its connections with DAG nodes.
This is a work in progress. Patch by Dale Johannesen!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98568 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| 14da02f654287314ec1235a165cd11bab1ec62b4 |
15-Mar-2010 |
Devang Patel <dpatel@apple.com> |
Emit dwarf variable info communicated by code generator through DBG_VALUE machine instructions.
This is a work in progress.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98556 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 90a48adf9cbea48f5318a5eb778056b4413e2ec0 |
15-Mar-2010 |
Devang Patel <dpatel@apple.com> |
Emit dwarf variable info communicated by code generator through DBG_VALUE machine instructions.
This is a work in progress.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98556 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 63607d03b36007ff135dff8103b42a33e64ef80b |
15-Mar-2010 |
Chris Lattner <sabre@nondot.org> |
SIGN_EXTEND from the same type as the dest is valid.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98548 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| ed7d10e1000ae88c9ec7a0db6002eb8b8543a470 |
15-Mar-2010 |
Chris Lattner <sabre@nondot.org> |
SIGN_EXTEND from the same type as the dest is valid.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98548 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| f53c2c785cd37ffd76f0a5db506fdef0ca9f100e |
15-Mar-2010 |
Chris Lattner <sabre@nondot.org> |
sink the call to VT.getSizeInBits() down into its uses,
not all unary nodes necessarily have a simple result type.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98547 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 7fb5c2dbec26b7de959269ade8906a7a1b6c7539 |
15-Mar-2010 |
Chris Lattner <sabre@nondot.org> |
sink the call to VT.getSizeInBits() down into its uses,
not all unary nodes necessarily have a simple result type.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98547 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 7e59edf0656c5211c0021bcf443ff05c5dfcd334 |
14-Mar-2010 |
Duncan Sands <baldrick@free.fr> |
Turn calls to copysignl into an FCOPYSIGN node. Handle FCOPYSIGN nodes
with ppc_f128 type by having the type legalizer turn these back into a
call to copysignl.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98514 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeFloatTypes.cpp
egalizeTypes.h
electionDAGBuilder.cpp
argetLowering.cpp
|
| d2c817eff1d158398fb0a620fa762bf95207922f |
14-Mar-2010 |
Duncan Sands <baldrick@free.fr> |
Turn calls to copysignl into an FCOPYSIGN node. Handle FCOPYSIGN nodes
with ppc_f128 type by having the type legalizer turn these back into a
call to copysignl.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98514 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeFloatTypes.cpp
egalizeTypes.h
electionDAGBuilder.cpp
argetLowering.cpp
|
| 1899ca3358e0f0477781472c3b0f4868b9d6e42b |
14-Mar-2010 |
Evan Cheng <evan.cheng@apple.com> |
Rename SDDbgValue.h to SDNodeDbgValue.h for consistency.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98513 91177308-0d34-0410-b5e6-96231b3b80d8
nstrEmitter.cpp
DDbgValue.h
DNodeDbgValue.h
cheduleDAGSDNodes.cpp
electionDAG.cpp
|
| a8efe28a44996978faa42a387f1a6087a7b942c7 |
14-Mar-2010 |
Evan Cheng <evan.cheng@apple.com> |
Rename SDDbgValue.h to SDNodeDbgValue.h for consistency.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98513 91177308-0d34-0410-b5e6-96231b3b80d8
nstrEmitter.cpp
DDbgValue.h
DNodeDbgValue.h
cheduleDAGSDNodes.cpp
electionDAG.cpp
|
| 214e738aabd76b123b2d1a0529b4f709141d014c |
14-Mar-2010 |
Chris Lattner <sabre@nondot.org> |
fix ShrinkDemandedOps to not leave dead nodes around,
fixing PR6607
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98512 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| c4a3f23b9251b07785cca646ad27b426dfa23230 |
14-Mar-2010 |
Chris Lattner <sabre@nondot.org> |
fix ShrinkDemandedOps to not leave dead nodes around,
fixing PR6607
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98512 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| b6e225c0ede0d38e557b4f2bf77e617dc5c1e858 |
14-Mar-2010 |
Chris Lattner <sabre@nondot.org> |
rewrite ShrinkDemandedOps to be faster and indent less,
no functionality change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98511 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 25e0ab9ae5507b0589be852f54693dec66796f0e |
14-Mar-2010 |
Chris Lattner <sabre@nondot.org> |
rewrite ShrinkDemandedOps to be faster and indent less,
no functionality change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98511 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 628fdf4475a248a496afb3c167d49a18a3fe006c |
14-Mar-2010 |
Chris Lattner <sabre@nondot.org> |
make -view-isel-dags print after the 'ShrinkDemandedOps' pass.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98509 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 552186dfd3238a43655ffda1b5adadec461c9886 |
14-Mar-2010 |
Chris Lattner <sabre@nondot.org> |
make -view-isel-dags print after the 'ShrinkDemandedOps' pass.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98509 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 899c5cfbecf4221a3268384e417e85c29c130594 |
14-Mar-2010 |
Anton Korobeynikov <asl@math.spbu.ru> |
Make default expansion for FP16 <-> FP32 nodes into libcalls
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98501 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
egalizeFloatTypes.cpp
egalizeIntegerTypes.cpp
egalizeTypes.h
electionDAG.cpp
argetLowering.cpp
|
| 927411b7ce0b7852fe4f392d8cd4faaa3881f852 |
14-Mar-2010 |
Anton Korobeynikov <asl@math.spbu.ru> |
Make default expansion for FP16 <-> FP32 nodes into libcalls
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98501 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
egalizeFloatTypes.cpp
egalizeIntegerTypes.cpp
egalizeTypes.h
electionDAG.cpp
argetLowering.cpp
|
| 819e9e696f01ab31a92f558848b0a1e7f0b2ff18 |
14-Mar-2010 |
Anton Korobeynikov <asl@math.spbu.ru> |
Add DAG nodes to represent FP16 <-> FP32 intrinsics
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98500 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| be5b032e4b06ae001098856c2dc4ebca41528132 |
14-Mar-2010 |
Anton Korobeynikov <asl@math.spbu.ru> |
Add DAG nodes to represent FP16 <-> FP32 intrinsics
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98500 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| 4489414d44a8621632e5e97253055452b2c66382 |
14-Mar-2010 |
Chris Lattner <sabre@nondot.org> |
fix AsmPrinter::GetBlockAddressSymbol to always return a unique
label instead of trying to form one based on the BB name (which
causes collisions if the name is empty). This fixes PR6608
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98495 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 3b9d6216a41cfd43759e787db26d797e1f0ba0a8 |
14-Mar-2010 |
Chris Lattner <sabre@nondot.org> |
fix AsmPrinter::GetBlockAddressSymbol to always return a unique
label instead of trying to form one based on the BB name (which
causes collisions if the name is empty). This fixes PR6608
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98495 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 54e56f247fa9361208901ff6009499cdffe41b05 |
14-Mar-2010 |
Chris Lattner <sabre@nondot.org> |
get MMI out of the label uniquing business, just go to MCContext
to get unique assembler temporary labels.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98489 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| 63d7836267298f5b6cde43f0a89acbabfc109f48 |
14-Mar-2010 |
Chris Lattner <sabre@nondot.org> |
get MMI out of the label uniquing business, just go to MCContext
to get unique assembler temporary labels.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98489 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| 8574dddd63edcb47af66df3ea309ff03a6b04549 |
14-Mar-2010 |
Chris Lattner <sabre@nondot.org> |
change the LabelSDNode to be EHLabelSDNode and make it hold
an MCSymbol. Make the EH_LABEL MachineInstr hold its label
with an MCSymbol instead of ID. Fix a bug in MMI.cpp which
would return labels named "Label4" instead of "label4".
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98463 91177308-0d34-0410-b5e6-96231b3b80d8
nstrEmitter.cpp
electionDAG.cpp
electionDAGBuilder.cpp
electionDAGISel.cpp
|
| 7561d480953e0a2faa4af9be0a00b1180097c4bd |
14-Mar-2010 |
Chris Lattner <sabre@nondot.org> |
change the LabelSDNode to be EHLabelSDNode and make it hold
an MCSymbol. Make the EH_LABEL MachineInstr hold its label
with an MCSymbol instead of ID. Fix a bug in MMI.cpp which
would return labels named "Label4" instead of "label4".
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98463 91177308-0d34-0410-b5e6-96231b3b80d8
nstrEmitter.cpp
electionDAG.cpp
electionDAGBuilder.cpp
electionDAGISel.cpp
|
| e3330170d608053806e37c4dc953f15cf47b3388 |
14-Mar-2010 |
Chris Lattner <sabre@nondot.org> |
change EH related stuff (other than EH_LABEL) to use MCSymbol
instead of label ID's. This cleans up and regularizes a bunch
of code and makes way for future progress.
Unfortunately, this pointed out to me that JITDwarfEmitter.cpp
is largely copy and paste from DwarfException/MachineModuleInfo
and other places. This is very sad and disturbing. :(
One major change here is that TidyLandingPads moved from being
called in DwarfException::BeginFunction to being called in
DwarfException::EndFunction. There should not be any
functionality change from doing this, but I'm not an EH expert.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98459 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| 1611273351d75b5cbe2a67485bb9831d5916fe26 |
14-Mar-2010 |
Chris Lattner <sabre@nondot.org> |
change EH related stuff (other than EH_LABEL) to use MCSymbol
instead of label ID's. This cleans up and regularizes a bunch
of code and makes way for future progress.
Unfortunately, this pointed out to me that JITDwarfEmitter.cpp
is largely copy and paste from DwarfException/MachineModuleInfo
and other places. This is very sad and disturbing. :(
One major change here is that TidyLandingPads moved from being
called in DwarfException::BeginFunction to being called in
DwarfException::EndFunction. There should not be any
functionality change from doing this, but I'm not an EH expert.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98459 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| 21c2a825b0362e5ac2fba700dbe903425647f2b6 |
12-Mar-2010 |
Duncan Sands <baldrick@free.fr> |
Revert turning copysignl into a COPYSIGN node for the moment:
ppc calls copysignl with a 128 bit ppc long double, resulting
in a node that the type legalizer doesn't know how to expand.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98357 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| 0ac5d2d7ffd1a8cfbecf4c3834dc557a18c7ee0a |
12-Mar-2010 |
Duncan Sands <baldrick@free.fr> |
Revert turning copysignl into a COPYSIGN node for the moment:
ppc calls copysignl with a 128 bit ppc long double, resulting
in a node that the type legalizer doesn't know how to expand.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98357 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| 0617f31129f3223f5e307793e20fd03c0273fa84 |
12-Mar-2010 |
Duncan Sands <baldrick@free.fr> |
Now that it's supported, turn copysignl into a COPYSIGN node.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98348 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| bb2f0c541c1bcf05131b66e4aa036229fc5f068b |
12-Mar-2010 |
Duncan Sands <baldrick@free.fr> |
Now that it's supported, turn copysignl into a COPYSIGN node.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98348 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| fbb152823a5f8b97ea606152cdf0507551fa7c9c |
12-Mar-2010 |
Duncan Sands <baldrick@free.fr> |
Fix PR6522: implement copysign expansion for x86 long double
(it seems that FreeBSD doesn't have copysignl). Done by
removing a bunch of assumptions from the code. This may also
help with sparc 128 bit floats.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98346 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 5d54b4112d7b8bcd49a07e398ebff263fac1eb9c |
12-Mar-2010 |
Duncan Sands <baldrick@free.fr> |
Fix PR6522: implement copysign expansion for x86 long double
(it seems that FreeBSD doesn't have copysignl). Done by
removing a bunch of assumptions from the code. This may also
help with sparc 128 bit floats.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98346 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 219a8bed7b44ee401da3ec15109f39daa5f31fa2 |
12-Mar-2010 |
Chris Lattner <sabre@nondot.org> |
fix PR6577, a bug in sdbuilder lowering select instructions
whose true value was not Val#0.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98336 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| b3e87b2262087cf69f7461e4bc586cdb747434f7 |
12-Mar-2010 |
Chris Lattner <sabre@nondot.org> |
fix PR6577, a bug in sdbuilder lowering select instructions
whose true value was not Val#0.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98336 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| a14fdab9680e07363a2784ff0cf6604f7bdd414d |
11-Mar-2010 |
Dan Gohman <gohman@apple.com> |
Remove getWidenVectorType, which is no longer used.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98289 91177308-0d34-0410-b5e6-96231b3b80d8
argetLowering.cpp
|
| a257095ebb29fd223be2fdbf86d542c5bdfe05f0 |
11-Mar-2010 |
Dan Gohman <gohman@apple.com> |
Remove getWidenVectorType, which is no longer used.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98289 91177308-0d34-0410-b5e6-96231b3b80d8
argetLowering.cpp
|
| 12e32e6ca75ba22c09d7dcbd4836c7604a2f58c0 |
11-Mar-2010 |
Evan Cheng <evan.cheng@apple.com> |
In case of tail call size of Ins and InVals may not match.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98277 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| af1871fa6dc916ef1ab5b4b30cf56aa134fcff19 |
11-Mar-2010 |
Evan Cheng <evan.cheng@apple.com> |
In case of tail call size of Ins and InVals may not match.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98277 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| c920384bda471d0861967e9b84db1180ac59ed13 |
11-Mar-2010 |
Daniel Dunbar <daniel@zuster.org> |
Remove dead include.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98225 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
|
| 0193c0994bddb24225e47f91c19b9e75f8aebd44 |
11-Mar-2010 |
Daniel Dunbar <daniel@zuster.org> |
Remove dead include.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98225 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
|
| d9a7d298929fc46d2093be94a3901c98dac3ecc8 |
11-Mar-2010 |
Chris Lattner <sabre@nondot.org> |
fix PR6533 by updating the br(xor) code to remember the case
when it looked past a trunc.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98203 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| f2f64e906372a3008112420b15daeb68c3e942e3 |
11-Mar-2010 |
Chris Lattner <sabre@nondot.org> |
fix PR6533 by updating the br(xor) code to remember the case
when it looked past a trunc.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98203 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 9ff9443988f5cc98d698d7a2a5623fb90954c8d9 |
11-Mar-2010 |
Dale Johannesen <dalej@apple.com> |
Cosmetic: lengthen names and improve comments.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98202 91177308-0d34-0410-b5e6-96231b3b80d8
nstrEmitter.cpp
DDbgValue.h
|
| e3b8533e711718ffa5366cbc8fdf7c6881b8cb02 |
11-Mar-2010 |
Dale Johannesen <dalej@apple.com> |
Cosmetic: lengthen names and improve comments.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98202 91177308-0d34-0410-b5e6-96231b3b80d8
nstrEmitter.cpp
DDbgValue.h
|
| f4243fbef8bbe9ad6fe63831f32883038058f746 |
10-Mar-2010 |
Dale Johannesen <dalej@apple.com> |
Progress towards shepherding debug info through SelectionDAG.
No functional effect yet. This is still evolving and should
not be viewed as final.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98195 91177308-0d34-0410-b5e6-96231b3b80d8
nstrEmitter.cpp
nstrEmitter.h
DDbgValue.h
cheduleDAGSDNodes.cpp
electionDAG.cpp
|
| bfdf7f38523bd38ae0538861a2bfd8bdc46e5c33 |
10-Mar-2010 |
Dale Johannesen <dalej@apple.com> |
Progress towards shepherding debug info through SelectionDAG.
No functional effect yet. This is still evolving and should
not be viewed as final.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98195 91177308-0d34-0410-b5e6-96231b3b80d8
nstrEmitter.cpp
nstrEmitter.h
DDbgValue.h
cheduleDAGSDNodes.cpp
electionDAG.cpp
|
| 05719e6bdef6162bcd4c74882f28ad88c6d9747a |
10-Mar-2010 |
Dan Gohman <gohman@apple.com> |
Fix another bitwidth calculation to handle vector types; based on a
patch by Micah Villmow for PR6572.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98188 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 8f78e3c87d462e71ddcd3d4f53446b902cc5c593 |
10-Mar-2010 |
Dan Gohman <gohman@apple.com> |
Fix another bitwidth calculation to handle vector types; based on a
patch by Micah Villmow for PR6572.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98188 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 27a54bce61f9f1578542bbecb0043145740aac4f |
09-Mar-2010 |
Dan Gohman <gohman@apple.com> |
Attempt to make this debug output meaningful, both in the case of
multibyte opcodes and in the case of multiple scopes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98036 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 19b3826d0f0e299447d0a1c47d4fb2899d32d31f |
09-Mar-2010 |
Dan Gohman <gohman@apple.com> |
Attempt to make this debug output meaningful, both in the case of
multibyte opcodes and in the case of multiple scopes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98036 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 416bc0a3195b13cfbdba5b9c09b67cdcc4447323 |
09-Mar-2010 |
Dan Gohman <gohman@apple.com> |
Print the correct index in the "match failed at index" message.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98013 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 8f03d751619b72bffebbcd2161dcdaa4578a31e0 |
09-Mar-2010 |
Dan Gohman <gohman@apple.com> |
Print the correct index in the "match failed at index" message.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98013 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 62ced028e5ec7247bc5ba21703845bed2742361b |
08-Mar-2010 |
Dale Johannesen <dalej@apple.com> |
Add Order to SDDbgValue
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97939 91177308-0d34-0410-b5e6-96231b3b80d8
DDbgValue.h
|
| fab4a25d46cdd178c20e6a8029a2eed10f61f0ba |
08-Mar-2010 |
Dale Johannesen <dalej@apple.com> |
Add Order to SDDbgValue
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97939 91177308-0d34-0410-b5e6-96231b3b80d8
DDbgValue.h
|
| d700ed3e880cdd2cd29d65bed84f8a92f77caed9 |
07-Mar-2010 |
Chris Lattner <sabre@nondot.org> |
Use Other as a sentinel instead of iAny.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97914 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| acee647b13d6e3e92cdbfe9657622a3daa2a6da1 |
07-Mar-2010 |
Chris Lattner <sabre@nondot.org> |
Use Other as a sentinel instead of iAny.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97914 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 740089a49a70d6a5ba13dae28e43a2bfeaf1e860 |
06-Mar-2010 |
Dale Johannesen <dalej@apple.com> |
Add some new bits of debug info handling. No
functional change yet.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97855 91177308-0d34-0410-b5e6-96231b3b80d8
nstrEmitter.cpp
nstrEmitter.h
DDbgValue.h
|
| 06a26637daff1bb785ef0945d1ba05f6ccdfab86 |
06-Mar-2010 |
Dale Johannesen <dalej@apple.com> |
Add some new bits of debug info handling. No
functional change yet.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97855 91177308-0d34-0410-b5e6-96231b3b80d8
nstrEmitter.cpp
nstrEmitter.h
DDbgValue.h
|
| 185b448620f102722e5ecee117fab6e80300219f |
06-Mar-2010 |
Dan Gohman <gohman@apple.com> |
Reapply r97778 and r97779, enabled only for unsigned i64 to f64
conversions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97854 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 0fa9d1d9011a98212b66daf27f6a8a3d734ae818 |
06-Mar-2010 |
Dan Gohman <gohman@apple.com> |
Reapply r97778 and r97779, enabled only for unsigned i64 to f64
conversions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97854 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 4f8e6669676759f830877d3f777ad967663a97e8 |
05-Mar-2010 |
Jakob Stoklund Olesen <stoklund@2pi.dk> |
Avoid creating bad PHI instructions when BR is being const-folded.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97836 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 580bba2b0dd2173c899699a87e109bfd1482c001 |
05-Mar-2010 |
Jakob Stoklund Olesen <stoklund@2pi.dk> |
Avoid creating bad PHI instructions when BR is being const-folded.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97836 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| f2ae2a4e14e17e359e3060a2615cb7eae4ab9880 |
05-Mar-2010 |
Chris Lattner <sabre@nondot.org> |
Fix PR6497, a bug where we'd fold a load into an addc
node which has a flag. That flag in turn was used by an
already-selected adde which turned into an ADC32ri8 which
used a selected load which was chained to the load we
folded. This flag use caused us to form a cycle. Fix
this by not ignoring chains in IsLegalToFold even in
cases where the isel thinks it can.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97791 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 18fdabadca110671b436de52fe7bd492ad49e656 |
05-Mar-2010 |
Chris Lattner <sabre@nondot.org> |
Fix PR6497, a bug where we'd fold a load into an addc
node which has a flag. That flag in turn was used by an
already-selected adde which turned into an ADC32ri8 which
used a selected load which was chained to the load we
folded. This flag use caused us to form a cycle. Fix
this by not ignoring chains in IsLegalToFold even in
cases where the isel thinks it can.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97791 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 3f799de278213e4c890af7a2662ac1fb6e205899 |
05-Mar-2010 |
Chris Lattner <sabre@nondot.org> |
inline a small function with one call site.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97789 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 9bbcd5ee5b9a34f82d7d0570256ff4b4f53fabe9 |
05-Mar-2010 |
Chris Lattner <sabre@nondot.org> |
inline a small function with one call site.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97789 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 2af1f30658e4bf432ed89e351bfd16d4e43786a2 |
05-Mar-2010 |
Dan Gohman <gohman@apple.com> |
Revert r97778 and r97779. They're somehow breaking llvm-gcc builds.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97781 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| b6b343d77acb5c290f7093e741fbce484d11cedc |
05-Mar-2010 |
Dan Gohman <gohman@apple.com> |
Revert r97778 and r97779. They're somehow breaking llvm-gcc builds.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97781 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 4497854a94c9d2f53e6e8005c60ab072059a3d9c |
05-Mar-2010 |
Dan Gohman <gohman@apple.com> |
Fix these constants to be more portable.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97779 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 808ab341b4572815a74235ef00ccb446d334b957 |
05-Mar-2010 |
Dan Gohman <gohman@apple.com> |
Fix these constants to be more portable.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97779 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 625f5cd301d073267ab2a78cf59fbf5085231c8d |
05-Mar-2010 |
Dan Gohman <gohman@apple.com> |
Rewrite i64-to-f64 conversion using an algorithm which handles
rounding correctly. This implementation is a generalization of
the x86_64 code in compiler-rt.
This fixes rdar://7683708.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97778 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| cfa7ca19974a463b47f16a61bfecf7f532dca07d |
05-Mar-2010 |
Dan Gohman <gohman@apple.com> |
Rewrite i64-to-f64 conversion using an algorithm which handles
rounding correctly. This implementation is a generalization of
the x86_64 code in compiler-rt.
This fixes rdar://7683708.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97778 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| b75a7b3f65a514955589404b304510f9d1663c7c |
04-Mar-2010 |
Chris Lattner <sabre@nondot.org> |
add a statistic for # times fastisel fails.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97738 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| c19ae9d91d30bc008e0be5f5d4727f333199f64c |
04-Mar-2010 |
Chris Lattner <sabre@nondot.org> |
add a statistic for # times fastisel fails.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97738 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| dbd638803fb4bd508c7aaf2447157b60e6105c0c |
04-Mar-2010 |
Dan Gohman <gohman@apple.com> |
Fix a typo Duncan noticed.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97735 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| ba72b0c4e17795fd61e18d022a6d86a680be00c5 |
04-Mar-2010 |
Dan Gohman <gohman@apple.com> |
Fix a typo Duncan noticed.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97735 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 609472bddef8b70aa4deb784e54e0775b1d4aa21 |
04-Mar-2010 |
Chris Lattner <sabre@nondot.org> |
change the new isel matcher to emit ComplexPattern matches
as the very last thing before node emission. This should
dramatically reduce the number of times we do 'MatchAddress'
on X86, speeding up compile time. This also improves comments
in the tables and shrinks the table a bit, now down to
80506 bytes for x86.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97703 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 57bf8a483edf97589c3e6085721e72fc187677a8 |
04-Mar-2010 |
Chris Lattner <sabre@nondot.org> |
change the new isel matcher to emit ComplexPattern matches
as the very last thing before node emission. This should
dramatically reduce the number of times we do 'MatchAddress'
on X86, speeding up compile time. This also improves comments
in the tables and shrinks the table a bit, now down to
80506 bytes for x86.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97703 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 2bafa4b0441e0174c80af34004ef3ceca92aa664 |
04-Mar-2010 |
Dan Gohman <gohman@apple.com> |
Fix more code to work properly with vector operands. Based on
a patch my Micah Villmow for PR6465.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97692 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 6900a39d28132d86529724ba4dc8302edf1a9b53 |
04-Mar-2010 |
Dan Gohman <gohman@apple.com> |
Fix more code to work properly with vector operands. Based on
a patch my Micah Villmow for PR6465.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97692 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 369679ef2fd29be0b8878f2045670522f38fa051 |
04-Mar-2010 |
Chris Lattner <sabre@nondot.org> |
inline CannotYetSelectIntrinsic into CannotYetSelect and simplify.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97690 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 2c4afd1d8e3cd7cdf47a163deaf345a747541367 |
04-Mar-2010 |
Chris Lattner <sabre@nondot.org> |
inline CannotYetSelectIntrinsic into CannotYetSelect and simplify.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97690 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 4f6bea00e74ce718c1e61a4b29b08a8d35c201ce |
03-Mar-2010 |
Dan Gohman <gohman@apple.com> |
Fix a bug in SelectionDAG's ReplaceAllUsesWith in the case where
CSE and recursive RAUW calls delete a node from the use list,
invalidating the use list iterator. There's currently no known
way to reproduce this in an unmodified LLVM, however there's no
fundamental reason why a SelectionDAG couldn't be formed which
would trigger this case.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97665 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| a72d2a210c61aa60f5e03bfc3cd697f809fee3e5 |
03-Mar-2010 |
Dan Gohman <gohman@apple.com> |
Fix a bug in SelectionDAG's ReplaceAllUsesWith in the case where
CSE and recursive RAUW calls delete a node from the use list,
invalidating the use list iterator. There's currently no known
way to reproduce this in an unmodified LLVM, however there's no
fundamental reason why a SelectionDAG couldn't be formed which
would trigger this case.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97665 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 9851e78217bb61e1626440fb09204bee37e22728 |
03-Mar-2010 |
Chris Lattner <sabre@nondot.org> |
add some of the more obscure predicate types to the
Scope accelerator.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97652 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| da828e3c8c869c0a62fefbd4c14811ca6fb4913d |
03-Mar-2010 |
Chris Lattner <sabre@nondot.org> |
add some of the more obscure predicate types to the
Scope accelerator.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97652 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 7f6953355214dbc1055049dd4496d5bb455718b6 |
03-Mar-2010 |
Chris Lattner <sabre@nondot.org> |
speed up scope node processing: if the first element of a scope
entry we're about to process is obviously going to fail, don't
bother pushing a scope only to have it immediately be popped.
This avoids a lot of scope stack traffic in common cases.
Unfortunately, this requires duplicating some of the predicate
dispatch. To avoid duplicating the actual logic I pulled each
predicate out to its own static function which gets used in
both places.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97651 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| f1b7c7d476a2f30f035c527cfe8e14c6c6255f07 |
03-Mar-2010 |
Chris Lattner <sabre@nondot.org> |
speed up scope node processing: if the first element of a scope
entry we're about to process is obviously going to fail, don't
bother pushing a scope only to have it immediately be popped.
This avoids a lot of scope stack traffic in common cases.
Unfortunately, this requires duplicating some of the predicate
dispatch. To avoid duplicating the actual logic I pulled each
predicate out to its own static function which gets used in
both places.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97651 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| c4188acb9c90d663f755aff45548df07006bceb2 |
03-Mar-2010 |
Chris Lattner <sabre@nondot.org> |
introduce a new SwitchTypeMatcher node (which is analogous to
SwitchOpcodeMatcher) and have DAGISelMatcherOpt form it. This
speeds up selection, particularly for X86 which has lots of
variants of instructions with only type differences.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97645 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| cfe2eab7446dedc471592fe702fefef783383171 |
03-Mar-2010 |
Chris Lattner <sabre@nondot.org> |
introduce a new SwitchTypeMatcher node (which is analogous to
SwitchOpcodeMatcher) and have DAGISelMatcherOpt form it. This
speeds up selection, particularly for X86 which has lots of
variants of instructions with only type differences.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97645 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 75c9f34b795e875808c0279a2e67ed31b6678a36 |
03-Mar-2010 |
Bill Wendling <isanbard@gmail.com> |
Use APInt instead of zext value.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97631 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 32f9eb2bc3ddaf17e790f086056829e4ad91ab66 |
03-Mar-2010 |
Bill Wendling <isanbard@gmail.com> |
Use APInt instead of zext value.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97631 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 72f81c05606ff41d5d7af4eea76d57d90bb29f43 |
03-Mar-2010 |
Bill Wendling <isanbard@gmail.com> |
This test case:
long test(long x) { return (x & 123124) | 3; }
Currently compiles to:
_test:
orl $3, %edi
movq %rdi, %rax
andq $123127, %rax
ret
This is because instruction and DAG combiners canonicalize
(or (and x, C), D) -> (and (or, D), (C | D))
However, this is only profitable if (C & D) != 0. It gets in the way of the
3-addressification because the input bits are known to be zero.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97616 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 7d9f2b93a356aa89186522bd61c5c565718ff555 |
03-Mar-2010 |
Bill Wendling <isanbard@gmail.com> |
This test case:
long test(long x) { return (x & 123124) | 3; }
Currently compiles to:
_test:
orl $3, %edi
movq %rdi, %rax
andq $123127, %rax
ret
This is because instruction and DAG combiners canonicalize
(or (and x, C), D) -> (and (or, D), (C | D))
However, this is only profitable if (C & D) != 0. It gets in the way of the
3-addressification because the input bits are known to be zero.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97616 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 017965026f37cd0b619b3f580f544566fe560950 |
02-Mar-2010 |
Chris Lattner <sabre@nondot.org> |
Fix some issues in WalkChainUsers dealing with
CopyToReg/CopyFromReg/INLINEASM. These are annoying because
they have the same opcode before an after isel. Fix this by
setting their NodeID to -1 to indicate that they are selected,
just like what automatically happens when selecting things that
end up being machine nodes.
With that done, give IsLegalToFold a new flag that causes it to
ignore chains. This lets the HandleMergeInputChains routine be
the one place that validates chains after a match is successful,
enabling the new hotness in chain processing. This smarter
chain processing eliminates the need for "PreprocessRMW" in the
X86 and MSP430 backends and enables MSP to start matching it's
multiple mem operand instructions more aggressively.
I currently #if out the dead code in the X86 backend and MSP
backend, I'll remove it for real in a follow-on patch.
The testcase changes are:
test/CodeGen/X86/sse3.ll: we generate better code
test/CodeGen/X86/store_op_load_fold2.ll: PreprocessRMW was
miscompiling this before, we now generate correct code
Convert it to filecheck while I'm at it.
test/CodeGen/MSP430/Inst16mm.ll: Add a testcase for mem/mem
folding to make anton happy. :)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97596 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| d1b738298359846b9cccaa0931e6ec1fc59a6d87 |
02-Mar-2010 |
Chris Lattner <sabre@nondot.org> |
Fix some issues in WalkChainUsers dealing with
CopyToReg/CopyFromReg/INLINEASM. These are annoying because
they have the same opcode before an after isel. Fix this by
setting their NodeID to -1 to indicate that they are selected,
just like what automatically happens when selecting things that
end up being machine nodes.
With that done, give IsLegalToFold a new flag that causes it to
ignore chains. This lets the HandleMergeInputChains routine be
the one place that validates chains after a match is successful,
enabling the new hotness in chain processing. This smarter
chain processing eliminates the need for "PreprocessRMW" in the
X86 and MSP430 backends and enables MSP to start matching it's
multiple mem operand instructions more aggressively.
I currently #if out the dead code in the X86 backend and MSP
backend, I'll remove it for real in a follow-on patch.
The testcase changes are:
test/CodeGen/X86/sse3.ll: we generate better code
test/CodeGen/X86/store_op_load_fold2.ll: PreprocessRMW was
miscompiling this before, we now generate correct code
Convert it to filecheck while I'm at it.
test/CodeGen/MSP430/Inst16mm.ll: Add a testcase for mem/mem
folding to make anton happy. :)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97596 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 0df32098702460a923c0654fc78394c7dc9c6d62 |
02-Mar-2010 |
Chris Lattner <sabre@nondot.org> |
run HandleMergeInputChains even if we only have one input chain.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97581 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 00592ec857b4c3f31b46412e2738924238c59983 |
02-Mar-2010 |
Chris Lattner <sabre@nondot.org> |
run HandleMergeInputChains even if we only have one input chain.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97581 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 385f39fc2a100a8411544ff4b0fe9c9d1cc7d6e3 |
02-Mar-2010 |
Chris Lattner <sabre@nondot.org> |
Fix the xfail I added a couple of patches back. The issue
was that we weren't properly handling the case when interior
nodes of a matched pattern become dead after updating chain
and flag uses. Now we handle this explicitly in
UpdateChainsAndFlags.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97561 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 82dd3d38d9b3bd49f19b8230f39d33e8ee6d4055 |
02-Mar-2010 |
Chris Lattner <sabre@nondot.org> |
Fix the xfail I added a couple of patches back. The issue
was that we weren't properly handling the case when interior
nodes of a matched pattern become dead after updating chain
and flag uses. Now we handle this explicitly in
UpdateChainsAndFlags.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97561 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| ad7c0f5649d9cee42bd54e02b817316dddb8db80 |
02-Mar-2010 |
Chris Lattner <sabre@nondot.org> |
I was confused about this, it turns out that MorphNodeTo
*does* delete ex-operands that become dead.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97559 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 61c97f693216670cda554d287cd871fdea1b36f9 |
02-Mar-2010 |
Chris Lattner <sabre@nondot.org> |
I was confused about this, it turns out that MorphNodeTo
*does* delete ex-operands that become dead.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97559 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| ad0310618a87ee72b74b75b1960603169e9f087d |
02-Mar-2010 |
Chris Lattner <sabre@nondot.org> |
factor node morphing out to its own helper method.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97558 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 3ff1e4db7896a8ccec74800d52a926118d025260 |
02-Mar-2010 |
Chris Lattner <sabre@nondot.org> |
factor node morphing out to its own helper method.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97558 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 6411e3e62ea9dfe23f5fa24b9d6a84da7ec70a98 |
02-Mar-2010 |
Chris Lattner <sabre@nondot.org> |
Sink InstructionSelect() out of each target into SDISel, and rename it
DoInstructionSelection. Inline "SelectRoot" into it from DAGISelHeader.
Sink some other stuff out of DAGISelHeader into SDISel.
Eliminate the various 'Indent' stuff from various targets, which dates
to when isel was recursive.
17 files changed, 114 insertions(+), 430 deletions(-)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97555 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 7c306da505e2d7f64e160890b274a47fa0740962 |
02-Mar-2010 |
Chris Lattner <sabre@nondot.org> |
Sink InstructionSelect() out of each target into SDISel, and rename it
DoInstructionSelection. Inline "SelectRoot" into it from DAGISelHeader.
Sink some other stuff out of DAGISelHeader into SDISel.
Eliminate the various 'Indent' stuff from various targets, which dates
to when isel was recursive.
17 files changed, 114 insertions(+), 430 deletions(-)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97555 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 4fd9d3136226bf472a0c3a22799f91be39a331a3 |
02-Mar-2010 |
Chris Lattner <sabre@nondot.org> |
Use the right induction variable.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97541 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 6183fbd7267a7de857e32a2106cfb46a219728f1 |
02-Mar-2010 |
Chris Lattner <sabre@nondot.org> |
Use the right induction variable.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97541 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| d9245c391fe16261902c9840e26a3d82a26f50f6 |
02-Mar-2010 |
Chris Lattner <sabre@nondot.org> |
Rewrite chain handling validation and input TokenFactor handling
stuff now that we don't care about emulating the old broken
behavior of the old isel. This eliminates the
'CheckChainCompatible' check (along with IsChainCompatible) which
did an incorrect and inefficient scan *up* the chain nodes which
happened as the pattern was being formed and does the validation
at the end in HandleMergeInputChains when it forms a structural
pattern. This scans "down" the graph, which means that it is
quickly bounded by nodes already selected. This also handles
token factors that get "trapped" in the dag.
Removing the CheckChainCompatible nodes also shrinks the
generated tables by about 6K for X86 (down to 83K).
There are two pieces remaining before I can nuke PreprocessRMW:
1. I xfailed a test because we're now producing worse code in a
case that has nothing to do with the change: it turns out that
our use of MorphNodeTo will leave dead nodes in the graph
which (depending on how the graph is walked) end up causing
bogus uses of chains and blocking matches. This is really
bad for other reasons, so I'll fix this in a follow-up patch.
2. CheckFoldableChainNode needs to be improved to handle the TF.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97539 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| c6d7ad3c7d83e9af29bf3ba3bf3280e72a952f98 |
02-Mar-2010 |
Chris Lattner <sabre@nondot.org> |
Rewrite chain handling validation and input TokenFactor handling
stuff now that we don't care about emulating the old broken
behavior of the old isel. This eliminates the
'CheckChainCompatible' check (along with IsChainCompatible) which
did an incorrect and inefficient scan *up* the chain nodes which
happened as the pattern was being formed and does the validation
at the end in HandleMergeInputChains when it forms a structural
pattern. This scans "down" the graph, which means that it is
quickly bounded by nodes already selected. This also handles
token factors that get "trapped" in the dag.
Removing the CheckChainCompatible nodes also shrinks the
generated tables by about 6K for X86 (down to 83K).
There are two pieces remaining before I can nuke PreprocessRMW:
1. I xfailed a test because we're now producing worse code in a
case that has nothing to do with the change: it turns out that
our use of MorphNodeTo will leave dead nodes in the graph
which (depending on how the graph is walked) end up causing
bogus uses of chains and blocking matches. This is really
bad for other reasons, so I'll fix this in a follow-up patch.
2. CheckFoldableChainNode needs to be improved to handle the TF.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97539 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 978e526b88f014cbbeb11afe1a27c76806e9ac9b |
02-Mar-2010 |
Dan Gohman <gohman@apple.com> |
Fix several places to handle vector operands properly.
Based on a patch by Micah Villmow for PR6438.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97538 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
egalizeIntegerTypes.cpp
argetLowering.cpp
|
| 5b870aff81da0c07413f0241087bb3722954b83d |
02-Mar-2010 |
Dan Gohman <gohman@apple.com> |
Fix several places to handle vector operands properly.
Based on a patch by Micah Villmow for PR6438.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97538 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
egalizeIntegerTypes.cpp
argetLowering.cpp
|
| 1ca34452bef99e9607f302b2abb54693b7114076 |
02-Mar-2010 |
Bill Wendling <isanbard@gmail.com> |
Remove dead parameter passing.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97536 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
egalizeTypes.cpp
electionDAG.cpp
electionDAGBuilder.cpp
|
| 46ada19645c981a0b7932487d163f7582074a4d9 |
02-Mar-2010 |
Bill Wendling <isanbard@gmail.com> |
Remove dead parameter passing.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97536 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
egalizeTypes.cpp
electionDAG.cpp
electionDAGBuilder.cpp
|
| eac59b0c6ce69beed03154b5d3f51a311b6dd9c1 |
02-Mar-2010 |
Chris Lattner <sabre@nondot.org> |
remove dead code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97529 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 319ef940303146dfb885794d21c98da1d5e84048 |
02-Mar-2010 |
Chris Lattner <sabre@nondot.org> |
remove dead code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97529 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 25f10c41e764fd73b3c03841e20c75b1169fbb7b |
02-Mar-2010 |
Chris Lattner <sabre@nondot.org> |
refactor some code out of OPC_EmitMergeInputChains into a
new helper function.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97525 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 6b30792d2d7d142b8192241e6232aee004f745fb |
02-Mar-2010 |
Chris Lattner <sabre@nondot.org> |
refactor some code out of OPC_EmitMergeInputChains into a
new helper function.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97525 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| b5b32a356894c7a60a508d836149caa19c6f5b16 |
01-Mar-2010 |
Chris Lattner <sabre@nondot.org> |
remove all but one version of SelectionDAG::MorphNodeTo
(the most general) the others are dead.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97511 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| df51247725143acb781c224faffd848cc7cf95d8 |
01-Mar-2010 |
Chris Lattner <sabre@nondot.org> |
remove all but one version of SelectionDAG::MorphNodeTo
(the most general) the others are dead.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97511 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 2418741aba10d6137858dbf7a7773c21f02ba640 |
01-Mar-2010 |
Chris Lattner <sabre@nondot.org> |
Accelerate isel dispatch for tables that start with a top-level
OPC_SwitchOpcode to use a table lookup instead of having to go
through the interpreter for this.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97469 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 7390eebd49b786f3293d24f76fedb02fe183468c |
01-Mar-2010 |
Chris Lattner <sabre@nondot.org> |
Accelerate isel dispatch for tables that start with a top-level
OPC_SwitchOpcode to use a table lookup instead of having to go
through the interpreter for this.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97469 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| f4aab034434769a98250611400b01a9f75cff607 |
01-Mar-2010 |
Dan Gohman <gohman@apple.com> |
Fix optimization of ISD::TRUNCATE on vector operands. Based on a patch
by Micah Villmow for PR6335.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97461 91177308-0d34-0410-b5e6-96231b3b80d8
argetLowering.cpp
|
| 042919c0c5f87f937e1a01ca548811af2f297e83 |
01-Mar-2010 |
Dan Gohman <gohman@apple.com> |
Fix optimization of ISD::TRUNCATE on vector operands. Based on a patch
by Micah Villmow for PR6335.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97461 91177308-0d34-0410-b5e6-96231b3b80d8
argetLowering.cpp
|
| a9578c4edc53ecd83f32022c0e12ab748ae2d3cd |
01-Mar-2010 |
Chris Lattner <sabre@nondot.org> |
some trivial microoptimizations.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97441 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
electionDAGISel.cpp
|
| 7d892d6e6d451e9a0d0f9db839a943a256126c05 |
01-Mar-2010 |
Chris Lattner <sabre@nondot.org> |
some trivial microoptimizations.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97441 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
electionDAGISel.cpp
|
| 220b968d46e3b86b47362794ddd81eda30b7e78e |
01-Mar-2010 |
Chris Lattner <sabre@nondot.org> |
eliminate the CheckMultiOpcodeMatcher code and have each
ComplexPattern at the root be generated multiple times, once
for each opcode they are part of. This encourages factoring
because the opcode checks get treated just like everything
else in the matcher.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97439 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| fa342faef9d1c89de356ed83a6c6529ed3e87610 |
01-Mar-2010 |
Chris Lattner <sabre@nondot.org> |
eliminate the CheckMultiOpcodeMatcher code and have each
ComplexPattern at the root be generated multiple times, once
for each opcode they are part of. This encourages factoring
because the opcode checks get treated just like everything
else in the matcher.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97439 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 2e9e684955d5da919a9a0daffe5ee19f3760d08e |
01-Mar-2010 |
Chris Lattner <sabre@nondot.org> |
add a new OPC_SwitchOpcode which is semantically equivalent
to a scope where every child starts with a CheckOpcode, but
executes more efficiently. Enhance DAGISelMatcherOpt to
form it.
This also fixes a bug in CheckOpcode: apparently the SDNodeInfo
objects are not pointer comparable, we have to compare the
enum name.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97438 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| eb66921adb943ea841e72c8eee4777607c48b70e |
01-Mar-2010 |
Chris Lattner <sabre@nondot.org> |
add a new OPC_SwitchOpcode which is semantically equivalent
to a scope where every child starts with a CheckOpcode, but
executes more efficiently. Enhance DAGISelMatcherOpt to
form it.
This also fixes a bug in CheckOpcode: apparently the SDNodeInfo
objects are not pointer comparable, we have to compare the
enum name.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97438 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 21181d1e6a08e95d701d593b5c500ce9afef7634 |
28-Feb-2010 |
Chris Lattner <sabre@nondot.org> |
eliminate GetInt1/2
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97426 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 14df8dc680d40173f34d693f9dc451f8a30c907b |
28-Feb-2010 |
Chris Lattner <sabre@nondot.org> |
eliminate GetInt1/2
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97426 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 65ff433eb3c69e3cd5e124f74aa1eca662b70759 |
28-Feb-2010 |
Chris Lattner <sabre@nondot.org> |
hoist the new isel interpreter out of DAGISelHeader.h
(which gets #included into the middle of each
target's DAGISel class) into a .cpp file where it is
only compiled once.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97425 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 2a49d57d2d9dd19125a9ba302e883f6ba6c38b83 |
28-Feb-2010 |
Chris Lattner <sabre@nondot.org> |
hoist the new isel interpreter out of DAGISelHeader.h
(which gets #included into the middle of each
target's DAGISel class) into a .cpp file where it is
only compiled once.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97425 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 7a58f525f4b84038aebb05a7ebe98960d836dbba |
28-Feb-2010 |
Chris Lattner <sabre@nondot.org> |
enhance the new isel to handle the 'node already exists'
case of MorphNodeTo directly.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97417 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 21221e357c6aa9ade3966ee86dab7d44c25220d0 |
28-Feb-2010 |
Chris Lattner <sabre@nondot.org> |
enhance the new isel to handle the 'node already exists'
case of MorphNodeTo directly.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97417 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| ae73795036ed372fd47ecf4b3ed6e334342910d3 |
28-Feb-2010 |
Chris Lattner <sabre@nondot.org> |
simplify this code, return only ever has zero or one operands.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97408 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| 25d5837889622584b53b6ffebcfa9ebf14f09d7b |
28-Feb-2010 |
Chris Lattner <sabre@nondot.org> |
simplify this code, return only ever has zero or one operands.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97408 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| cb611273cb26cdf5fefcdbbbaa862e87c8295c34 |
27-Feb-2010 |
Evan Cheng <evan.cheng@apple.com> |
Re-apply 97040 with fix. This survives a ppc self-host llvm-gcc bootstrap.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97310 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
argetLowering.cpp
|
| 2c755ba12a79e0bb2899c0bde00b2f7ea2c975a0 |
27-Feb-2010 |
Evan Cheng <evan.cheng@apple.com> |
Re-apply 97040 with fix. This survives a ppc self-host llvm-gcc bootstrap.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97310 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
argetLowering.cpp
|
| 10712669099c41e0c6f5a4d04be6d7af19cc1f6d |
26-Feb-2010 |
Dale Johannesen <dalej@apple.com> |
Move dbg_value generation to target-independent FastISel,
as X86 is currently the only FastISel target. Per review.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97255 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
|
| 45df7616528e3d101c5b2938bd4d865321205d33 |
26-Feb-2010 |
Dale Johannesen <dalej@apple.com> |
Move dbg_value generation to target-independent FastISel,
as X86 is currently the only FastISel target. Per review.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97255 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
|
| 1257158b2bd13e489275b940ae1e2909e27b51c7 |
25-Feb-2010 |
Dan Gohman <gohman@apple.com> |
Fix ExpandVectorBuildThroughStack for the case where the
operands are themselves vectors. Based on a patch by
Micah Villmow for PR6338.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97165 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 9949dd612c8100f7ea7e6daaa56e465f106dd0bd |
25-Feb-2010 |
Dan Gohman <gohman@apple.com> |
Fix ExpandVectorBuildThroughStack for the case where the
operands are themselves vectors. Based on a patch by
Micah Villmow for PR6338.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97165 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 2576a8eb5cb9a2d80fafe064d9cac6f6b32607f8 |
25-Feb-2010 |
Dan Gohman <gohman@apple.com> |
Revert r97064. Duncan pointed out that bitcasts are defined in
terms of store and load, which means bitcasting between scalar
integer and vector has endian-specific results, which undermines
this whole approach.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97137 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
egalizeTypes.cpp
egalizeVectorTypes.cpp
|
| aa9d854b334cab2f29ca6d95413a0946b8a38429 |
25-Feb-2010 |
Dan Gohman <gohman@apple.com> |
Revert r97064. Duncan pointed out that bitcasts are defined in
terms of store and load, which means bitcasting between scalar
integer and vector has endian-specific results, which undermines
this whole approach.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97137 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
egalizeTypes.cpp
egalizeVectorTypes.cpp
|
| ae64c5492ad209f288bd57c98e3519c9d2e35cba |
24-Feb-2010 |
Chris Lattner <sabre@nondot.org> |
clean up various VT manipulations, patch by Micah Villmow! PR6337
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97072 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 5cf0b6e4a94ab3baa991795051f63db139097ed3 |
24-Feb-2010 |
Chris Lattner <sabre@nondot.org> |
clean up various VT manipulations, patch by Micah Villmow! PR6337
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97072 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 4bc2134f965d55e32cd9caf7296f2f86b852bd36 |
24-Feb-2010 |
Dan Gohman <gohman@apple.com> |
Make getTypeSizeInBits work correctly for array types; it should return
the number of value bits, not the number of bits of allocation for in-memory
storage.
Make getTypeStoreSize and getTypeAllocSize work consistently for arrays and
vectors.
Fix several places in CodeGen which compute offsets into in-memory vectors
to use TargetData information.
This fixes PR1784.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97064 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
egalizeTypes.cpp
egalizeVectorTypes.cpp
|
| c382bc3c0f476bf94303d9892af4e2cee173bfe5 |
24-Feb-2010 |
Dan Gohman <gohman@apple.com> |
Make getTypeSizeInBits work correctly for array types; it should return
the number of value bits, not the number of bits of allocation for in-memory
storage.
Make getTypeStoreSize and getTypeAllocSize work consistently for arrays and
vectors.
Fix several places in CodeGen which compute offsets into in-memory vectors
to use TargetData information.
This fixes PR1784.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97064 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
egalizeTypes.cpp
egalizeVectorTypes.cpp
|
| 7de873559115ed9c149f09b3bc8b96cb19e7a480 |
24-Feb-2010 |
Chris Lattner <sabre@nondot.org> |
convert cycle checker to smallptrset, add comments and make it
more elegant.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97059 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 46ca5efdd5b748ba8aa62168f7753cb46b683bc5 |
24-Feb-2010 |
Chris Lattner <sabre@nondot.org> |
convert cycle checker to smallptrset, add comments and make it
more elegant.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97059 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 9e2aad9d672e7151a94413e5007b0c588ea77162 |
24-Feb-2010 |
Chris Lattner <sabre@nondot.org> |
revert david's patch which does not even build.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97057 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| a1461ccfa0f19b2a81afb401c1d772f751edf7ae |
24-Feb-2010 |
Chris Lattner <sabre@nondot.org> |
revert david's patch which does not even build.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97057 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 7f3a69fb451686b06bb99976b239af68580e5435 |
24-Feb-2010 |
David Greene <greened@obbligato.org> |
Use a SmallPtrSet as suggested by Chris.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97056 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 2f9b6851982608e8aa20ca99398daf949d0f707b |
24-Feb-2010 |
David Greene <greened@obbligato.org> |
Use a SmallPtrSet as suggested by Chris.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97056 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| a77358b755e6629917d2a12ed97065a6952b397e |
24-Feb-2010 |
Daniel Dunbar <daniel@zuster.org> |
Speculatively revert r97011, "Re-apply 96540 and 96556 with fixes.", again in
the hopes of fixing PPC bootstrap.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97040 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
argetLowering.cpp
|
| cfe30effbb952ae5b49a01de8329e3a2c14bad75 |
24-Feb-2010 |
Daniel Dunbar <daniel@zuster.org> |
Speculatively revert r97011, "Re-apply 96540 and 96556 with fixes.", again in
the hopes of fixing PPC bootstrap.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97040 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
argetLowering.cpp
|
| e8cc39fad0c152a1b03f52b3cc821b3ce418e89c |
24-Feb-2010 |
Dan Gohman <gohman@apple.com> |
When forming SSE min and max nodes for UGE and ULE comparisons, it's
necessary to swap the operands to handle NaN and negative zero properly.
Also, reintroduce logic for checking for NaN conditions when forming
SSE min and max instructions, fixed to take into consideration NaNs and
negative zeros. This allows forming min and max instructions in more
cases.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97025 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| e832693acbfc713bcaf44720efa8149e93a38027 |
24-Feb-2010 |
Dan Gohman <gohman@apple.com> |
When forming SSE min and max nodes for UGE and ULE comparisons, it's
necessary to swap the operands to handle NaN and negative zero properly.
Also, reintroduce logic for checking for NaN conditions when forming
SSE min and max instructions, fixed to take into consideration NaNs and
negative zeros. This allows forming min and max instructions in more
cases.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97025 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| deb48434e382de441595b0ac39cd585cab092080 |
24-Feb-2010 |
Chris Lattner <sabre@nondot.org> |
Change the scheduler from adding nodes in allnodes order
to adding them in a determinstic order (bottom up from
the root) based on the structure of the graph itself.
This updates tests for some random changes, interesting
bits: CodeGen/Blackfin/promote-logic.ll no longer crashes.
I have no idea why, but that's good right?
CodeGen/X86/2009-07-16-LoadFoldingBug.ll also fails, but
now compiles to have one fewer constant pool entry, making
the expected load that was being folded disappear. Since it
is an unreduced mass of gnast, I just removed it.
This fixes PR6370
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97023 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGSDNodes.cpp
|
| 736a6ea3a2a5322db0e09d97651a1acc07502e41 |
24-Feb-2010 |
Chris Lattner <sabre@nondot.org> |
Change the scheduler from adding nodes in allnodes order
to adding them in a determinstic order (bottom up from
the root) based on the structure of the graph itself.
This updates tests for some random changes, interesting
bits: CodeGen/Blackfin/promote-logic.ll no longer crashes.
I have no idea why, but that's good right?
CodeGen/X86/2009-07-16-LoadFoldingBug.ll also fails, but
now compiles to have one fewer constant pool entry, making
the expected load that was being folded disappear. Since it
is an unreduced mass of gnast, I just removed it.
This fixes PR6370
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97023 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGSDNodes.cpp
|
| 5a7626432cc08fabeaa6f00af467e37dcfad543e |
24-Feb-2010 |
Chris Lattner <sabre@nondot.org> |
add node #'s to debug dumps.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97019 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 91ff7f75f55a626eb41761f3ded9f3d13002980c |
24-Feb-2010 |
Chris Lattner <sabre@nondot.org> |
add node #'s to debug dumps.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97019 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 65d174147dd73e78cd0070c9a2113f3acdc3e924 |
24-Feb-2010 |
Evan Cheng <evan.cheng@apple.com> |
Re-apply 96540 and 96556 with fixes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97011 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
argetLowering.cpp
|
| 97e6b8390b405f9e7dd994f111a5950fca2962d2 |
24-Feb-2010 |
Evan Cheng <evan.cheng@apple.com> |
Re-apply 96540 and 96556 with fixes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97011 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
argetLowering.cpp
|
| def44715c1558a6bbf1e555b7ab0390c7e2ca26c |
24-Feb-2010 |
Chris Lattner <sabre@nondot.org> |
make selectnodeto set the nodeid to -1. This makes it more akin to
creating a new node then replacing uses.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97000 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 5857e0add8ab25825628d1ef19cec027e605dcd5 |
24-Feb-2010 |
Chris Lattner <sabre@nondot.org> |
make selectnodeto set the nodeid to -1. This makes it more akin to
creating a new node then replacing uses.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97000 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| be96dbf5a8f6742931bcc58d9edc556a6e322ccd |
23-Feb-2010 |
Chris Lattner <sabre@nondot.org> |
fix a bug in findNonImmUse (used by IsLegalToFold) where nodes with
no id's would cause early exit allowing IsLegalToFold to return true
instead of false, producing a cyclic dag.
This was striking the new isel because it isn't using SelectNodeTo yet,
which theoretically is just an optimization.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96972 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| da244a091dcde022ea4938793d81ee957903ed70 |
23-Feb-2010 |
Chris Lattner <sabre@nondot.org> |
fix a bug in findNonImmUse (used by IsLegalToFold) where nodes with
no id's would cause early exit allowing IsLegalToFold to return true
instead of false, producing a cyclic dag.
This was striking the new isel because it isn't using SelectNodeTo yet,
which theoretically is just an optimization.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96972 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 91d5e06c189787ac18cdf66148503d0d4198730f |
23-Feb-2010 |
Chris Lattner <sabre@nondot.org> |
Print node ID's in dumps and views if set.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96971 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 4548e02bd6336983a21afdf5f6a3ea333ce2daca |
23-Feb-2010 |
Chris Lattner <sabre@nondot.org> |
Print node ID's in dumps and views if set.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96971 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 923912cedf4cb6a97dc2bdde78b3bfdc9e0c2212 |
23-Feb-2010 |
David Greene <greened@obbligato.org> |
Speed up cycle checking significantly by caching results.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96956 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| e3d97c744772c075e11f372548cc8d848d555ee9 |
23-Feb-2010 |
David Greene <greened@obbligato.org> |
Speed up cycle checking significantly by caching results.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96956 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| a5fbee007bda63f348079de2966c3d56b5fe65f7 |
19-Feb-2010 |
Duncan Sands <baldrick@free.fr> |
Revert commits 96556 and 96640, because commit 96556 breaks the
dragonegg self-host build. I reverted 96640 in order to revert
96556 (96640 goes on top of 96556), but it also looks like with
both of them applied the breakage happens even earlier. The
symptom of the 96556 miscompile is the following crash:
llvm[3]: Compiling AlphaISelLowering.cpp for Release build
cc1plus: /home/duncan/tmp/tmp/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp:4982: void llvm::SelectionDAG::ReplaceAllUsesWith(llvm::SDNode*, llvm::SDNode*, llvm::SelectionDAG::DAGUpdateListener*): Assertion `(!From->hasAnyUseOfValue(i) || From->getValueType(i) == To->getValueType(i)) && "Cannot use this version of ReplaceAllUsesWith!"' failed.
Stack dump:
0. Running pass 'X86 DAG->DAG Instruction Selection' on function '@_ZN4llvm19AlphaTargetLowering14LowerOperationENS_7SDValueERNS_12SelectionDAGE'
g++: Internal error: Aborted (program cc1plus)
This occurs when building LLVM using LLVM built by LLVM (via
dragonegg). Probably LLVM has miscompiled itself, though it
may have miscompiled GCC and/or dragonegg itself: at this point
of the self-host build, all of GCC, LLVM and dragonegg were built
using LLVM. Unfortunately this kind of thing is extremely hard
to debug, and while I did rummage around a bit I didn't find any
smoking guns, aka obviously miscompiled code.
Found by bisection.
r96556 | evancheng | 2010-02-18 03:13:50 +0100 (Thu, 18 Feb 2010) | 5 lines
Some dag combiner goodness:
Transform br (xor (x, y)) -> br (x != y)
Transform br (xor (xor (x,y), 1)) -> br (x == y)
Also normalize (and (X, 1) == / != 1 -> (and (X, 1)) != / == 0 to match to "test on x86" and "tst on arm"
r96640 | evancheng | 2010-02-19 01:34:39 +0100 (Fri, 19 Feb 2010) | 16 lines
Transform (xor (setcc), (setcc)) == / != 1 to
(xor (setcc), (setcc)) != / == 1.
e.g. On x86_64
%0 = icmp eq i32 %x, 0
%1 = icmp eq i32 %y, 0
%2 = xor i1 %1, %0
br i1 %2, label %bb, label %return
=>
testl %edi, %edi
sete %al
testl %esi, %esi
sete %cl
cmpb %al, %cl
je LBB1_2
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96672 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
argetLowering.cpp
|
| 3eba667081cb63761861e4543715c90f8fc47b18 |
19-Feb-2010 |
Duncan Sands <baldrick@free.fr> |
Revert commits 96556 and 96640, because commit 96556 breaks the
dragonegg self-host build. I reverted 96640 in order to revert
96556 (96640 goes on top of 96556), but it also looks like with
both of them applied the breakage happens even earlier. The
symptom of the 96556 miscompile is the following crash:
llvm[3]: Compiling AlphaISelLowering.cpp for Release build
cc1plus: /home/duncan/tmp/tmp/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp:4982: void llvm::SelectionDAG::ReplaceAllUsesWith(llvm::SDNode*, llvm::SDNode*, llvm::SelectionDAG::DAGUpdateListener*): Assertion `(!From->hasAnyUseOfValue(i) || From->getValueType(i) == To->getValueType(i)) && "Cannot use this version of ReplaceAllUsesWith!"' failed.
Stack dump:
0. Running pass 'X86 DAG->DAG Instruction Selection' on function '@_ZN4llvm19AlphaTargetLowering14LowerOperationENS_7SDValueERNS_12SelectionDAGE'
g++: Internal error: Aborted (program cc1plus)
This occurs when building LLVM using LLVM built by LLVM (via
dragonegg). Probably LLVM has miscompiled itself, though it
may have miscompiled GCC and/or dragonegg itself: at this point
of the self-host build, all of GCC, LLVM and dragonegg were built
using LLVM. Unfortunately this kind of thing is extremely hard
to debug, and while I did rummage around a bit I didn't find any
smoking guns, aka obviously miscompiled code.
Found by bisection.
r96556 | evancheng | 2010-02-18 03:13:50 +0100 (Thu, 18 Feb 2010) | 5 lines
Some dag combiner goodness:
Transform br (xor (x, y)) -> br (x != y)
Transform br (xor (xor (x,y), 1)) -> br (x == y)
Also normalize (and (X, 1) == / != 1 -> (and (X, 1)) != / == 0 to match to "test on x86" and "tst on arm"
r96640 | evancheng | 2010-02-19 01:34:39 +0100 (Fri, 19 Feb 2010) | 16 lines
Transform (xor (setcc), (setcc)) == / != 1 to
(xor (setcc), (setcc)) != / == 1.
e.g. On x86_64
%0 = icmp eq i32 %x, 0
%1 = icmp eq i32 %y, 0
%2 = xor i1 %1, %0
br i1 %2, label %bb, label %return
=>
testl %edi, %edi
sete %al
testl %esi, %esi
sete %cl
cmpb %al, %cl
je LBB1_2
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96672 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
argetLowering.cpp
|
| 7ef91d5d2ed4129318c2e297cac5601bbc8c0c75 |
19-Feb-2010 |
Evan Cheng <evan.cheng@apple.com> |
Transform (xor (setcc), (setcc)) == / != 1 to
(xor (setcc), (setcc)) != / == 1.
e.g. On x86_64
%0 = icmp eq i32 %x, 0
%1 = icmp eq i32 %y, 0
%2 = xor i1 %1, %0
br i1 %2, label %bb, label %return
=>
testl %edi, %edi
sete %al
testl %esi, %esi
sete %cl
cmpb %al, %cl
je LBB1_2
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96640 91177308-0d34-0410-b5e6-96231b3b80d8
argetLowering.cpp
|
| 97a35fc3a744c905e1aeed8542fae366c7940f95 |
19-Feb-2010 |
Evan Cheng <evan.cheng@apple.com> |
Transform (xor (setcc), (setcc)) == / != 1 to
(xor (setcc), (setcc)) != / == 1.
e.g. On x86_64
%0 = icmp eq i32 %x, 0
%1 = icmp eq i32 %y, 0
%2 = xor i1 %1, %0
br i1 %2, label %bb, label %return
=>
testl %edi, %edi
sete %al
testl %esi, %esi
sete %cl
cmpb %al, %cl
je LBB1_2
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96640 91177308-0d34-0410-b5e6-96231b3b80d8
argetLowering.cpp
|
| 33a29e431f2f235aaae4f2d53fbfaca1c445a5a5 |
18-Feb-2010 |
Evan Cheng <evan.cheng@apple.com> |
Some dag combiner goodness:
Transform br (xor (x, y)) -> br (x != y)
Transform br (xor (xor (x,y), 1)) -> br (x == y)
Also normalize (and (X, 1) == / != 1 -> (and (X, 1)) != / == 0 to match to "test on x86" and "tst on arm"
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96556 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
argetLowering.cpp
|
| 89bb7b56407bf81a5d5fdcdac7106d94bb30dd65 |
18-Feb-2010 |
Evan Cheng <evan.cheng@apple.com> |
Some dag combiner goodness:
Transform br (xor (x, y)) -> br (x != y)
Transform br (xor (xor (x,y), 1)) -> br (x == y)
Also normalize (and (X, 1) == / != 1 -> (and (X, 1)) != / == 0 to match to "test on x86" and "tst on arm"
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96556 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
argetLowering.cpp
|
| 05a001f8364754dc202260edd890d4846857525f |
17-Feb-2010 |
David Greene <greened@obbligato.org> |
Make the non-temporal bit "significant" in MemSDNodes so they aren't
CSE'd or otherwise combined with temporal MemSDNodes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96505 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 1157f791c967668f0838bb6edb66103c760f1a5b |
17-Feb-2010 |
David Greene <greened@obbligato.org> |
Make the non-temporal bit "significant" in MemSDNodes so they aren't
CSE'd or otherwise combined with temporal MemSDNodes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96505 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| d7fb4b22530b0bc5da92d73750f6036f6d8a1a43 |
17-Feb-2010 |
Chris Lattner <sabre@nondot.org> |
sink special case "cannotyetselect" for intrinsics out of the
tblgen splatted code into the implementation.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96460 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 409ac586e83525a760692cf0affb01f1c9efa594 |
17-Feb-2010 |
Chris Lattner <sabre@nondot.org> |
sink special case "cannotyetselect" for intrinsics out of the
tblgen splatted code into the implementation.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96460 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 10343d91c52ddbfd7572032a95724f0c1ba10c7b |
16-Feb-2010 |
Duncan Sands <baldrick@free.fr> |
There are two ways of checking for a given type, for example isa<PointerType>(T)
and T->isPointerTy(). Convert most instances of the first form to the second form.
Requested by Chris.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96344 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
electionDAGBuilder.cpp
|
| 1df9859c40492511b8aa4321eb76496005d3b75b |
16-Feb-2010 |
Duncan Sands <baldrick@free.fr> |
There are two ways of checking for a given type, for example isa<PointerType>(T)
and T->isPointerTy(). Convert most instances of the first form to the second form.
Requested by Chris.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96344 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
electionDAGBuilder.cpp
|
| 7e80b27fc4d48723bf82d91dda904e88e4d66908 |
16-Feb-2010 |
Evan Cheng <evan.cheng@apple.com> |
Fix a memory leak. Patch by Nicolas Geoffray.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96295 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| f76de0011ff062d8fd6ba81382a7c7c36c9151c2 |
16-Feb-2010 |
Evan Cheng <evan.cheng@apple.com> |
Fix a memory leak. Patch by Nicolas Geoffray.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96295 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| f80681ead6c31677f300779fe356c77e34678396 |
15-Feb-2010 |
Evan Cheng <evan.cheng@apple.com> |
Split SelectionDAGISel::IsLegalAndProfitableToFold to
IsLegalToFold and IsProfitableToFold. The generic version of the later simply checks whether the folding candidate has a single use.
This allows the target isel routines more flexibility in deciding whether folding makes sense. The specific case we are interested in is folding constant pool loads with multiple uses.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96255 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 014bf215c3457bb34fee348265e8f63a70b4d503 |
15-Feb-2010 |
Evan Cheng <evan.cheng@apple.com> |
Split SelectionDAGISel::IsLegalAndProfitableToFold to
IsLegalToFold and IsProfitableToFold. The generic version of the later simply checks whether the folding candidate has a single use.
This allows the target isel routines more flexibility in deciding whether folding makes sense. The specific case we are interested in is folding constant pool loads with multiple uses.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96255 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 7c5a506c74431cbdb99e5147fe5a0dadd395cf06 |
15-Feb-2010 |
David Greene <greened@obbligato.org> |
Add non-temporal flags and remove an assumption of default arguments.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96240 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
egalizeDAG.cpp
egalizeFloatTypes.cpp
egalizeIntegerTypes.cpp
egalizeTypes.cpp
egalizeTypesGeneric.cpp
egalizeVectorTypes.cpp
electionDAG.cpp
electionDAGBuilder.cpp
argetLowering.cpp
|
| 1e559443a17d1b335f697551c6263ba60d5dd827 |
15-Feb-2010 |
David Greene <greened@obbligato.org> |
Add non-temporal flags and remove an assumption of default arguments.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96240 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
egalizeDAG.cpp
egalizeFloatTypes.cpp
egalizeIntegerTypes.cpp
egalizeTypes.cpp
egalizeTypesGeneric.cpp
egalizeVectorTypes.cpp
electionDAG.cpp
electionDAGBuilder.cpp
argetLowering.cpp
|
| e92dee17fa016e12fa9fad042f3d19bf9322908b |
15-Feb-2010 |
Duncan Sands <baldrick@free.fr> |
Uniformize the names of type predicates: rather than having isFloatTy and
isInteger, we now have isFloatTy and isIntegerTy. Requested by Chris!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96223 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| b0bc6c361da9009e8414efde317d9bbff755f6c0 |
15-Feb-2010 |
Duncan Sands <baldrick@free.fr> |
Uniformize the names of type predicates: rather than having isFloatTy and
isInteger, we now have isFloatTy and isIntegerTy. Requested by Chris!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96223 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| b867128dfeb2cdd5016516489e38bd35710f4e2f |
11-Feb-2010 |
Jakob Stoklund Olesen <stoklund@2pi.dk> |
Use array_pod_sort instead of std::sort for improved code size.
Use SmallVector instead of std::vector for better speed when indirectbr has
few successors.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95879 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| b5b90eddcd5e0a3199a7d5064b9d7551cc1dff9c |
11-Feb-2010 |
Jakob Stoklund Olesen <stoklund@2pi.dk> |
Use array_pod_sort instead of std::sort for improved code size.
Use SmallVector instead of std::vector for better speed when indirectbr has
few successors.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95879 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| a2d21bdb882e18a753d36e22304bd88000e820b2 |
11-Feb-2010 |
Jakob Stoklund Olesen <stoklund@2pi.dk> |
Remove duplicate successors from indirectbr instructions before building the machine CFG.
This makes early tail duplication run 60 times faster when compiling the Firefox
JavaScript interpreter, see PR6186.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95831 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| 598b24c6d1d6eecb558051d79d8b801542663e09 |
11-Feb-2010 |
Jakob Stoklund Olesen <stoklund@2pi.dk> |
Remove duplicate successors from indirectbr instructions before building the machine CFG.
This makes early tail duplication run 60 times faster when compiling the Firefox
JavaScript interpreter, see PR6186.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95831 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| 15e34200c767d0edbd2256d4eae312c30a08b1b8 |
11-Feb-2010 |
Mon P Wang <wangmp@apple.com> |
The previous fix of widening divides that trap was too fragile as it depends on custom
lowering and requires that certain types exist in ValueTypes.h. Modified widening to
check if an op can trap and if so, the widening algorithm will apply only the op on
the defined elements. It is safer to do this in widening because the optimizer can't
guarantee removing unused ops in some cases.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95823 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeVectorTypes.cpp
argetLowering.cpp
|
| f7ea6c3ee89e605c8d0bb7cdb0ade79706c750e8 |
11-Feb-2010 |
Mon P Wang <wangmp@apple.com> |
The previous fix of widening divides that trap was too fragile as it depends on custom
lowering and requires that certain types exist in ValueTypes.h. Modified widening to
check if an op can trap and if so, the widening algorithm will apply only the op on
the defined elements. It is safer to do this in widening because the optimizer can't
guarantee removing unused ops in some cases.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95823 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeVectorTypes.cpp
argetLowering.cpp
|
| e264f62ca09a8f65c87a46d562a4d0f9ec5d457e |
10-Feb-2010 |
Shih-wei Liao <sliao@google.com> |
Check in LLVM r95781.
MakeLists.txt
allingConvLower.cpp
AGCombiner.cpp
astISel.cpp
unctionLoweringInfo.cpp
unctionLoweringInfo.h
nstrEmitter.cpp
nstrEmitter.h
egalizeDAG.cpp
egalizeFloatTypes.cpp
egalizeIntegerTypes.cpp
egalizeTypes.cpp
egalizeTypes.h
egalizeTypesGeneric.cpp
egalizeVectorOps.cpp
egalizeVectorTypes.cpp
akefile
DNodeOrdering.h
cheduleDAGFast.cpp
cheduleDAGList.cpp
cheduleDAGRRList.cpp
cheduleDAGSDNodes.cpp
cheduleDAGSDNodes.h
electionDAG.cpp
electionDAGBuilder.cpp
electionDAGBuilder.h
electionDAGISel.cpp
electionDAGPrinter.cpp
argetLowering.cpp
|
| df1a7ffe7f19756ba874b3c07615d93ece611a1d |
10-Feb-2010 |
Dan Gohman <gohman@apple.com> |
Fix "the the" and similar typos.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95781 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
egalizeDAG.cpp
electionDAGBuilder.cpp
argetLowering.cpp
|
| f451cb870efcf9e0302d25ed05f4cac6bb494e42 |
10-Feb-2010 |
Dan Gohman <gohman@apple.com> |
Fix "the the" and similar typos.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95781 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
egalizeDAG.cpp
electionDAGBuilder.cpp
argetLowering.cpp
|
| 238a8d4c3d6868ba4d75158fb7320ef716b1f496 |
10-Feb-2010 |
Evan Cheng <evan.cheng@apple.com> |
Now that ShrinkDemandedOps() is separated out from DAG combine. It sometimes leave some obvious nops which dag combine used to clean up afterwards e.g. (trunk (ext n)) -> n. Look for them and squash them.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95757 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 046632f272b22a653c204c0ef56eb4076368d4bb |
10-Feb-2010 |
Evan Cheng <evan.cheng@apple.com> |
Now that ShrinkDemandedOps() is separated out from DAG combine. It sometimes leave some obvious nops which dag combine used to clean up afterwards e.g. (trunk (ext n)) -> n. Look for them and squash them.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95757 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 784555218036dd9945a7f060ad5660e838bb4978 |
10-Feb-2010 |
Evan Cheng <evan.cheng@apple.com> |
Emit an error for illegal inline asm constraint (which uses illegal type) rather than asserting.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95746 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| 8112b5322ef60c2dc3cbf0c05671de76df31cf02 |
10-Feb-2010 |
Evan Cheng <evan.cheng@apple.com> |
Emit an error for illegal inline asm constraint (which uses illegal type) rather than asserting.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95746 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| e186ea09c2ee992bfec603ae61052c37043607a0 |
10-Feb-2010 |
Dale Johannesen <dalej@apple.com> |
Fix comments to reflect renaming elsewhere.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95730 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
|
| 10fedd21d3d5e9527b13e38addd7002da2c1dc61 |
10-Feb-2010 |
Dale Johannesen <dalej@apple.com> |
Fix comments to reflect renaming elsewhere.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95730 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
|
| 4e45d4038f73a9f9b011973cccc141f3188480b8 |
10-Feb-2010 |
David Greene <greened@obbligato.org> |
Only dump output in debug mode.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95711 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 39143700a41cc450252bf2e0b000ce1dd723eb0c |
10-Feb-2010 |
David Greene <greened@obbligato.org> |
Only dump output in debug mode.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95711 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 4052b296030e3523b9a4a8d1e4a9af9091a8d7e8 |
09-Feb-2010 |
Chris Lattner <sabre@nondot.org> |
move target-independent opcodes out of TargetInstrInfo
into TargetOpcodes.h. #include the new TargetOpcodes.h
into MachineInstr. Add new inline accessors (like isPHI())
to MachineInstr, and start using them throughout the
codebase.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95687 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
unctionLoweringInfo.cpp
nstrEmitter.cpp
cheduleDAGRRList.cpp
electionDAG.cpp
electionDAGISel.cpp
|
| 518bb53485df640d7b7e3f6b0544099020c42aa7 |
09-Feb-2010 |
Chris Lattner <sabre@nondot.org> |
move target-independent opcodes out of TargetInstrInfo
into TargetOpcodes.h. #include the new TargetOpcodes.h
into MachineInstr. Add new inline accessors (like isPHI())
to MachineInstr, and start using them throughout the
codebase.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95687 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
unctionLoweringInfo.cpp
nstrEmitter.cpp
cheduleDAGRRList.cpp
electionDAG.cpp
electionDAGISel.cpp
|
| 9cfc4c0346214456c6e77f4e1a6f6546ef44d337 |
08-Feb-2010 |
Dale Johannesen <dalej@apple.com> |
Apply the 95471 fix to SelectionDAGBuilder as well;
we can get in here if FastISel gives up in a block.
(Actually the two copies of this need to be unified. Later.)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95579 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| 8ac38f2a616d303423e66023d2d2a6ff96c5040a |
08-Feb-2010 |
Dale Johannesen <dalej@apple.com> |
Apply the 95471 fix to SelectionDAGBuilder as well;
we can get in here if FastISel gives up in a block.
(Actually the two copies of this need to be unified. Later.)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95579 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| 4bfece3213313d8e89a2c1b539e2248dfdd8c157 |
08-Feb-2010 |
Dan Gohman <gohman@apple.com> |
In guaranteed tailcall mode, don't decline the tailcall optimization
for blocks ending in "unreachable".
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95565 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| c2e93b255e120f066ad8c16b0593b05f7e9f3d19 |
08-Feb-2010 |
Dan Gohman <gohman@apple.com> |
In guaranteed tailcall mode, don't decline the tailcall optimization
for blocks ending in "unreachable".
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95565 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| 1a68ec1d4aae7947e5f0462c82077f93333cca9f |
06-Feb-2010 |
Dale Johannesen <dalej@apple.com> |
After Victor's latest commits I am seeing null
addresses in dbg.declare; ignore this for the
moment to prevent things from breaking.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95471 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
|
| dc9185657593b5c1db86cb95a04a68fc09194993 |
06-Feb-2010 |
Dale Johannesen <dalej@apple.com> |
After Victor's latest commits I am seeing null
addresses in dbg.declare; ignore this for the
moment to prevent things from breaking.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95471 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
|
| 8558d763f21b4a35b2aeccf5de6dcb809d66ff19 |
05-Feb-2010 |
Evan Cheng <evan.cheng@apple.com> |
When the scheduler unfold a load folding instruction it move some of the predecessors to the unfolded load. It decides what gets moved to the load by checking whether the new load is using the predecessor as an operand. The check neglects the cases whether the predecessor is a flagged scheduling unit.
rdar://7604000
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95339 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGRRList.cpp
|
| 5ba8bf6d28ad350114a4b02f01d70ebe08612cfe |
05-Feb-2010 |
Evan Cheng <evan.cheng@apple.com> |
When the scheduler unfold a load folding instruction it move some of the predecessors to the unfolded load. It decides what gets moved to the load by checking whether the new load is using the predecessor as an operand. The check neglects the cases whether the predecessor is a flagged scheduling unit.
rdar://7604000
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95339 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGRRList.cpp
|
| 217685b229a3b5d8bb1416126b1b64ab15e963bd |
04-Feb-2010 |
Evan Cheng <evan.cheng@apple.com> |
Fix typo Duncan noticed.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95322 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| 6fdce6590261476964cb921a959ed83353e8b096 |
04-Feb-2010 |
Evan Cheng <evan.cheng@apple.com> |
Fix typo Duncan noticed.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95322 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| 9a7226ffee3f2bcbf895b61c992fd52aad703048 |
04-Feb-2010 |
Evan Cheng <evan.cheng@apple.com> |
It's too risky to eliminate sext / zext of call results for tail call optimization even if the caller / callee attributes completely match. The callee may have been bitcast'ed (or otherwise lied about what it's doing).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95282 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| 446bc10085482aba8cde79d22e10c1fe90ac54b9 |
04-Feb-2010 |
Evan Cheng <evan.cheng@apple.com> |
It's too risky to eliminate sext / zext of call results for tail call optimization even if the caller / callee attributes completely match. The callee may have been bitcast'ed (or otherwise lied about what it's doing).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95282 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| c41310c1debf41b0fe1569982719fe571866888d |
03-Feb-2010 |
Evan Cheng <evan.cheng@apple.com> |
Revert 94937 and move the noreturn check to codegen.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95198 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| febc81680c80a53f15f85b1812cba07fc179b9fd |
03-Feb-2010 |
Evan Cheng <evan.cheng@apple.com> |
Revert 94937 and move the noreturn check to codegen.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95198 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| 411c05288da7bed30b35be92bcf6cca5466364db |
03-Feb-2010 |
Evan Cheng <evan.cheng@apple.com> |
Allow all types of callee's to be tail called. But avoid automatic tailcall if the callee is a result of bitcast to avoid losing necessary zext / sext etc.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95195 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| 86809ccdaddf48a87ed772bc01464812caaf4baf |
03-Feb-2010 |
Evan Cheng <evan.cheng@apple.com> |
Allow all types of callee's to be tail called. But avoid automatic tailcall if the callee is a result of bitcast to avoid losing necessary zext / sext etc.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95195 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| ff116f99c64e1ca085c9d1387f7bd6eb8e4dbd67 |
03-Feb-2010 |
Evan Cheng <evan.cheng@apple.com> |
Revert 95130.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95160 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| 022d9e1cef7586a80a96446ae8691a37def9bbf4 |
03-Feb-2010 |
Evan Cheng <evan.cheng@apple.com> |
Revert 95130.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95160 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| ca6c93430e98e3fb0eaf40aa543ea1dc45cf35d7 |
02-Feb-2010 |
Evan Cheng <evan.cheng@apple.com> |
Pass callsite return type to TargetLowering::LowerCall and use that to check sibcall eligibility.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95130 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| 942619695f4bd77934c09a1cae0fb39ae59edac3 |
02-Feb-2010 |
Evan Cheng <evan.cheng@apple.com> |
Pass callsite return type to TargetLowering::LowerCall and use that to check sibcall eligibility.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95130 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| 98e9782ff492262ecec571cd33f32478547a06f4 |
01-Feb-2010 |
Mon P Wang <wangmp@apple.com> |
Improve EXTRACT_VECTOR_ELT patch based on comments from Duncan
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95012 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
electionDAG.cpp
|
| 87c46d8a0e9d85d39bfd93a4e6307a871075add6 |
01-Feb-2010 |
Mon P Wang <wangmp@apple.com> |
Improve EXTRACT_VECTOR_ELT patch based on comments from Duncan
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95012 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
electionDAG.cpp
|
| 6c9f1bc1ea2a0476659c4547d5c0b175258f1ebc |
01-Feb-2010 |
Chris Lattner <sabre@nondot.org> |
eliminate a bunch of pointless LLVMContext arguments.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95001 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| b29d596072d2ba32a0bb59241baf7a1c0ff5ed94 |
01-Feb-2010 |
Chris Lattner <sabre@nondot.org> |
eliminate a bunch of pointless LLVMContext arguments.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95001 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| 7b92d04e46c4997309eb4ec2ab30423d118d259e |
01-Feb-2010 |
Dale Johannesen <dalej@apple.com> |
fix PR 6157. Testcase pending.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@94996 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| 904c2fadbf44c47b418860f928f435a58da08bb6 |
01-Feb-2010 |
Dale Johannesen <dalej@apple.com> |
fix PR 6157. Testcase pending.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@94996 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| 3a04886c19b3f2bf53a6f8c6c4955118f3408fd3 |
01-Feb-2010 |
Mon P Wang <wangmp@apple.com> |
Fixed a couple of optimization with EXTRACT_VECTOR_ELT that assumes the result
type is the same as the element type of the vector. EXTRACT_VECTOR_ELT can
be used to extended the width of an integer type. This fixes a bug for
Generic/vector-casts.ll on a ppc750.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@94990 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
electionDAG.cpp
|
| c6654ec498698919ae8388c53fe91d0366ac24c7 |
01-Feb-2010 |
Mon P Wang <wangmp@apple.com> |
Fixed a couple of optimization with EXTRACT_VECTOR_ELT that assumes the result
type is the same as the element type of the vector. EXTRACT_VECTOR_ELT can
be used to extended the width of an integer type. This fixes a bug for
Generic/vector-casts.ll on a ppc750.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@94990 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
electionDAG.cpp
|
| 574e2b262fa8c930144a709a97c84583b5281a3e |
29-Jan-2010 |
Duncan Sands <baldrick@free.fr> |
Change the SREM case to match the logic in the IR version ComputeMaskedBits.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@94805 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 5c2873a74bffaf608e268761b30439e158369413 |
29-Jan-2010 |
Duncan Sands <baldrick@free.fr> |
Change the SREM case to match the logic in the IR version ComputeMaskedBits.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@94805 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 87589f79a98529ea2d65c1fcd572d37c38ae93a1 |
28-Jan-2010 |
Bill Wendling <isanbard@gmail.com> |
Assign the ordering of SDNodes in a much less intrusive fashion. After the
"visit*" method is called, take the newly created nodes, walk them in a DFS
fashion, and if they don't have an ordering set, then give it one.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@94757 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
electionDAGBuilder.cpp
electionDAGBuilder.h
|
| 4533cac557cdcc13e7c990942758ec8338d9172a |
28-Jan-2010 |
Bill Wendling <isanbard@gmail.com> |
Assign the ordering of SDNodes in a much less intrusive fashion. After the
"visit*" method is called, take the newly created nodes, walk them in a DFS
fashion, and if they don't have an ordering set, then give it one.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@94757 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
electionDAGBuilder.cpp
electionDAGBuilder.h
|
| 1db5d985d6cc883ad90073f979c483aa7c1b8955 |
28-Jan-2010 |
Jim Grosbach <grosbach@apple.com> |
Update of 94055 to track the IR level call site information via an intrinsic.
This allows code gen and the exception table writer to cooperate to make sure
landing pads are associated with the correct invoke locations.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@94726 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| ca752c9020a1b1cf151142bd9e0cbca9af12d807 |
28-Jan-2010 |
Jim Grosbach <grosbach@apple.com> |
Update of 94055 to track the IR level call site information via an intrinsic.
This allows code gen and the exception table writer to cooperate to make sure
landing pads are associated with the correct invoke locations.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@94726 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| 6b6ed5994d4c2be6e2087a969b35f55226d82608 |
27-Jan-2010 |
Evan Cheng <evan.cheng@apple.com> |
Eliminate target hook IsEligibleForTailCallOptimization.
Target independent isel should always pass along the "tail call" property. Change
target hook LowerCall's parameter "isTailCall" into a refernce. If the target
decides it's impossible to honor the tail call request, it should set isTailCall
to false to make target independent isel happy.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@94626 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| 0c439eb2c8397996cbccaf2798e598052d9982c8 |
27-Jan-2010 |
Evan Cheng <evan.cheng@apple.com> |
Eliminate target hook IsEligibleForTailCallOptimization.
Target independent isel should always pass along the "tail call" property. Change
target hook LowerCall's parameter "isTailCall" into a refernce. If the target
decides it's impossible to honor the tail call request, it should set isTailCall
to false to make target independent isel happy.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@94626 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| f69d87ca0cc23a4459e074edb2e4c1b20a5c7a93 |
27-Jan-2010 |
Evan Cheng <evan.cheng@apple.com> |
Allow some automatic tailcall optimization without changing ABI.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@94611 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| 11e679324b693125a98d865fe3e9fc9b2a9e5d22 |
27-Jan-2010 |
Evan Cheng <evan.cheng@apple.com> |
Allow some automatic tailcall optimization without changing ABI.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@94611 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| af70642ef1bba99e7e3ff099d21722a1934c28f9 |
26-Jan-2010 |
Chris Lattner <sabre@nondot.org> |
eliminate the TargetLowering::UsesGlobalOffsetTable bool, which is
subsumed by TargetLowering::getJumpTableEncoding(). Change uses of
it to be more specific.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@94529 91177308-0d34-0410-b5e6-96231b3b80d8
argetLowering.cpp
|
| f1214cbf3c2d151d3a2353d82143da186313a42a |
26-Jan-2010 |
Chris Lattner <sabre@nondot.org> |
eliminate the TargetLowering::UsesGlobalOffsetTable bool, which is
subsumed by TargetLowering::getJumpTableEncoding(). Change uses of
it to be more specific.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@94529 91177308-0d34-0410-b5e6-96231b3b80d8
argetLowering.cpp
|
| 541d8904203676afa54e8763baaf6e8963a9dc3a |
26-Jan-2010 |
Chris Lattner <sabre@nondot.org> |
Move getJTISymbol from MachineJumpTableInfo to MachineFunction,
which is more convenient, and change getPICJumpTableRelocBaseExpr
to take a MachineFunction to match.
Next, move the X86 code that create a PICBase symbol to
X86TargetLowering::getPICBaseSymbol from
X86MCInstLower::GetPICBaseSymbol, which was an asmprinter specific
library. This eliminates a 'gross hack', and allows us to
implement X86ISelLowering::getPICJumpTableRelocBaseExpr which now
calls it.
This in turn allows us to eliminate the
X86AsmPrinter::printPICJumpTableSetLabel method, which was the
only overload of printPICJumpTableSetLabel.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@94526 91177308-0d34-0410-b5e6-96231b3b80d8
argetLowering.cpp
|
| 589c6f620e8dcf3d59af1ae0e15372c934647c82 |
26-Jan-2010 |
Chris Lattner <sabre@nondot.org> |
Move getJTISymbol from MachineJumpTableInfo to MachineFunction,
which is more convenient, and change getPICJumpTableRelocBaseExpr
to take a MachineFunction to match.
Next, move the X86 code that create a PICBase symbol to
X86TargetLowering::getPICBaseSymbol from
X86MCInstLower::GetPICBaseSymbol, which was an asmprinter specific
library. This eliminates a 'gross hack', and allows us to
implement X86ISelLowering::getPICJumpTableRelocBaseExpr which now
calls it.
This in turn allows us to eliminate the
X86AsmPrinter::printPICJumpTableSetLabel method, which was the
only overload of printPICJumpTableSetLabel.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@94526 91177308-0d34-0410-b5e6-96231b3b80d8
argetLowering.cpp
|
| 978b977ac6a900c6645201b9bd346bdfd5687274 |
26-Jan-2010 |
Chris Lattner <sabre@nondot.org> |
add a new MachineJumpTableInfo::getJTISymbol method,
use it to implement the default TargetLowering::getPICJumpTableRelocBaseExpr
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@94523 91177308-0d34-0410-b5e6-96231b3b80d8
argetLowering.cpp
|
| beeb93e6ba48af2661eabc4872d8b159fb43e5db |
26-Jan-2010 |
Chris Lattner <sabre@nondot.org> |
add a new MachineJumpTableInfo::getJTISymbol method,
use it to implement the default TargetLowering::getPICJumpTableRelocBaseExpr
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@94523 91177308-0d34-0410-b5e6-96231b3b80d8
argetLowering.cpp
|
| 9f5b9c18ef28e8b61bf04bba0470933d25c05830 |
26-Jan-2010 |
Chris Lattner <sabre@nondot.org> |
stub out a new target hook, need some refactoring before I can
implement it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@94521 91177308-0d34-0410-b5e6-96231b3b80d8
argetLowering.cpp
|
| 13e97a29d9dfa5602f93a8c546f112c5d029e8f7 |
26-Jan-2010 |
Chris Lattner <sabre@nondot.org> |
stub out a new target hook, need some refactoring before I can
implement it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@94521 91177308-0d34-0410-b5e6-96231b3b80d8
argetLowering.cpp
|
| 506f6f00593b8b872bbc4341f552b40266554d73 |
26-Jan-2010 |
Evan Cheng <evan.cheng@apple.com> |
Implement cond ? -1 : 0 with sbb.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@94490 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 8c7ecaf524ec3040a9c1c7be5f37e574eb1d0207 |
26-Jan-2010 |
Evan Cheng <evan.cheng@apple.com> |
Implement cond ? -1 : 0 with sbb.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@94490 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 4a99cf04ecc8f28bc9c9ad11e0eb4ffbca2c00ff |
26-Jan-2010 |
Dale Johannesen <dalej@apple.com> |
Generate DEBUG_VALUE comments on x86. The (limited)
dbg.declare's we currently generate go through both
register allocators without perturbing the results.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@94480 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
|
| 5ed17ae92a9239c2ff7d3ba494bf96651598ee7a |
26-Jan-2010 |
Dale Johannesen <dalej@apple.com> |
Generate DEBUG_VALUE comments on x86. The (limited)
dbg.declare's we currently generate go through both
register allocators without perturbing the results.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@94480 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
|
| 1d196bc4e7da96ffa86fa5f42f411ac81f211e3e |
26-Jan-2010 |
Chris Lattner <sabre@nondot.org> |
Rearrange handling of jump tables. Highlights:
1. MachineJumpTableInfo is now created lazily for a function the first time
it actually makes a jump table instead of for every function.
2. The encoding of jump table entries is now described by the
MachineJumpTableInfo::JTEntryKind enum. This enum is determined by the
TLI::getJumpTableEncoding() hook, instead of by lots of code scattered
throughout the compiler that "knows" that jump table entries are always
32-bits in pic mode (for example).
3. The size and alignment of jump table entries is now calculated based on
their kind, instead of at machinefunction creation time.
Future work includes using the EntryKind in more places in the compiler,
eliminating other logic that "knows" the layout of jump tables in various
situations.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@94470 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
electionDAGBuilder.cpp
argetLowering.cpp
|
| 071c62fad0b25ad4131e7f984173a796c1e63f61 |
26-Jan-2010 |
Chris Lattner <sabre@nondot.org> |
Rearrange handling of jump tables. Highlights:
1. MachineJumpTableInfo is now created lazily for a function the first time
it actually makes a jump table instead of for every function.
2. The encoding of jump table entries is now described by the
MachineJumpTableInfo::JTEntryKind enum. This enum is determined by the
TLI::getJumpTableEncoding() hook, instead of by lots of code scattered
throughout the compiler that "knows" that jump table entries are always
32-bits in pic mode (for example).
3. The size and alignment of jump table entries is now calculated based on
their kind, instead of at machinefunction creation time.
Future work includes using the EntryKind in more places in the compiler,
eliminating other logic that "knows" the layout of jump tables in various
situations.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@94470 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
electionDAGBuilder.cpp
argetLowering.cpp
|
| e9a40677cd1fd95ed7e9b75a1df19449f432ad9e |
24-Jan-2010 |
Chris Lattner <sabre@nondot.org> |
make -fno-rtti the default unless a directory builds with REQUIRES_RTTI.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@94378 91177308-0d34-0410-b5e6-96231b3b80d8
akefile
|
| 43b5f9312d56be400af031f7487a99b75b7b0f97 |
24-Jan-2010 |
Chris Lattner <sabre@nondot.org> |
make -fno-rtti the default unless a directory builds with REQUIRES_RTTI.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@94378 91177308-0d34-0410-b5e6-96231b3b80d8
akefile
|
| 84889a98056cdb015a20ae9c01c08d768e49edae |
24-Jan-2010 |
Mon P Wang <wangmp@apple.com> |
It seems better to scalarize vectors of size 1 instead of widening them.
Add support to widen SETCC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@94342 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeTypes.h
egalizeVectorTypes.cpp
argetLowering.cpp
|
| 6fb474bd3c3e291973ae8e087787090cf2be73f8 |
24-Jan-2010 |
Mon P Wang <wangmp@apple.com> |
It seems better to scalarize vectors of size 1 instead of widening them.
Add support to widen SETCC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@94342 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeTypes.h
egalizeVectorTypes.cpp
argetLowering.cpp
|
| a8ff0dddb04db54c7c54d3f84babe100e577fc49 |
24-Jan-2010 |
Mon P Wang <wangmp@apple.com> |
Improved widening loads by adding support for wider loads if
the alignment allows. Fixed a bug where we didn't use a
vector load/store for PR5626.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@94338 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
egalizeTypes.h
egalizeVectorTypes.cpp
|
| eb38ebf15c326a5bb45ca9da6329cdf19ad6df95 |
24-Jan-2010 |
Mon P Wang <wangmp@apple.com> |
Improved widening loads by adding support for wider loads if
the alignment allows. Fixed a bug where we didn't use a
vector load/store for PR5626.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@94338 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
egalizeTypes.h
egalizeVectorTypes.cpp
|
| 0df2cd581b55fd36b2fd0c93711812fd4773fa05 |
23-Jan-2010 |
Bill Wendling <isanbard@gmail.com> |
Remove the '-disable-scheduling' flag and replace it with the 'source' option of
the '-pre-RA-sched' flag. It actually makes more sense to do it this way. Also,
keep track of the SDNode ordering by default. Eventually, we would like to make
this ordering a way to break a "tie" in the scheduler. However, doing that now
breaks the "CodeGen/X86/abi-isel.ll" test for 32-bit Linux.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@94308 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGRRList.cpp
electionDAG.cpp
electionDAGBuilder.cpp
electionDAGISel.cpp
|
| 187361b056823df4ff292561fe47468dad956872 |
23-Jan-2010 |
Bill Wendling <isanbard@gmail.com> |
Remove the '-disable-scheduling' flag and replace it with the 'source' option of
the '-pre-RA-sched' flag. It actually makes more sense to do it this way. Also,
keep track of the SDNode ordering by default. Eventually, we would like to make
this ordering a way to break a "tie" in the scheduler. However, doing that now
breaks the "CodeGen/X86/abi-isel.ll" test for 32-bit Linux.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@94308 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGRRList.cpp
electionDAG.cpp
electionDAGBuilder.cpp
electionDAGISel.cpp
|
| 8884788be78ac43ed8600ba8203b1f72ae20f7fe |
23-Jan-2010 |
Evan Cheng <evan.cheng@apple.com> |
Enable pre-regalloc scheduling load clustering by default.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@94255 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGSDNodes.cpp
|
| 42dae2d5ba0c22bed65e80ac56a7c304de911c33 |
23-Jan-2010 |
Evan Cheng <evan.cheng@apple.com> |
Enable pre-regalloc scheduling load clustering by default.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@94255 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGSDNodes.cpp
|
| 5c804558fe5a69a7534b8a3bb7420ec1a483a1c8 |
22-Jan-2010 |
Chris Lattner <sabre@nondot.org> |
Stop building RTTI information for *most* llvm libraries. Notable
missing ones are libsupport, libsystem and libvmcore. libvmcore is
currently blocked on bugpoint, which uses EH. Once it stops using
EH, we can switch it off.
This #if 0's out 3 unit tests, because gtest requires RTTI information.
Suggestions welcome on how to fix this.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@94164 91177308-0d34-0410-b5e6-96231b3b80d8
akefile
|
| e73a31f667ad2fe03e25c97ac45b58c30d7f07c3 |
22-Jan-2010 |
Chris Lattner <sabre@nondot.org> |
Stop building RTTI information for *most* llvm libraries. Notable
missing ones are libsupport, libsystem and libvmcore. libvmcore is
currently blocked on bugpoint, which uses EH. Once it stops using
EH, we can switch it off.
This #if 0's out 3 unit tests, because gtest requires RTTI information.
Suggestions welcome on how to fix this.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@94164 91177308-0d34-0410-b5e6-96231b3b80d8
akefile
|
| ee574550fadaa4471c2b6179d20bc2808a1560d4 |
22-Jan-2010 |
Evan Cheng <evan.cheng@apple.com> |
Teach pre-regalloc scheduler to schedule loads from nearby addresses. It may improve cache locality. This is controlled by -cluster-loads for now.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@94148 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGSDNodes.cpp
cheduleDAGSDNodes.h
|
| c589e03865bb31da70e0037d5c32fdaaa5f79f24 |
22-Jan-2010 |
Evan Cheng <evan.cheng@apple.com> |
Teach pre-regalloc scheduler to schedule loads from nearby addresses. It may improve cache locality. This is controlled by -cluster-loads for now.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@94148 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGSDNodes.cpp
cheduleDAGSDNodes.h
|
| 4507456b1f57372fef5019f846fe5aaab5382f34 |
21-Jan-2010 |
Evan Cheng <evan.cheng@apple.com> |
Trim unneeded includes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@94105 91177308-0d34-0410-b5e6-96231b3b80d8
unctionLoweringInfo.cpp
nstrEmitter.cpp
cheduleDAGFast.cpp
|
| 80ffc965f513bed2252316af8530c14c36c2e295 |
21-Jan-2010 |
Evan Cheng <evan.cheng@apple.com> |
Trim unneeded includes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@94105 91177308-0d34-0410-b5e6-96231b3b80d8
unctionLoweringInfo.cpp
nstrEmitter.cpp
cheduleDAGFast.cpp
|
| f056e023189e48d0337c7198d9fed32a9285a434 |
21-Jan-2010 |
Jim Grosbach <grosbach@apple.com> |
back this out for now. Growing Function is not good.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@94097 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| f38a33cd0aafff87a8f48debccb09971d2b82dd9 |
21-Jan-2010 |
Jim Grosbach <grosbach@apple.com> |
back this out for now. Growing Function is not good.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@94097 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| 469967b02bdd853dc6f1fc8e04df869d945c8f17 |
21-Jan-2010 |
Jim Grosbach <grosbach@apple.com> |
Make sure that landing pad entries in the EH call site table are in the proper
order for SjLj style exception handling.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@94055 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| d0a0c382ea51d36dc7e5938291763da73b4262dc |
21-Jan-2010 |
Jim Grosbach <grosbach@apple.com> |
Make sure that landing pad entries in the EH call site table are in the proper
order for SjLj style exception handling.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@94055 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| c25757ceb6bbbd77d28eb1e07e8d7f557ced33fa |
20-Jan-2010 |
David Greene <greened@obbligato.org> |
When XDEBUG is enabled, check for SelectionDAG cycles at some key
points. This will help us find future problems like the one
described in PR6019.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@94019 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| cf495bc2e505e52ad018da55bed11c7b8bc97db5 |
20-Jan-2010 |
David Greene <greened@obbligato.org> |
When XDEBUG is enabled, check for SelectionDAG cycles at some key
points. This will help us find future problems like the one
described in PR6019.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@94019 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| a05f25bba28c58ad154d1198e0eb9d9199bbef31 |
20-Jan-2010 |
David Greene <greened@obbligato.org> |
Add some asserts to check SelectionDAG problems earlier.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@93960 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 221925eccace7433cb3b3c42875645c499db91a2 |
20-Jan-2010 |
David Greene <greened@obbligato.org> |
Add some asserts to check SelectionDAG problems earlier.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@93960 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 9cb488e82728bba1cf27fb171e82de245f70d302 |
20-Jan-2010 |
Dan Gohman <gohman@apple.com> |
Fold (add x, shl(0 - y, n)) -> sub(x, shl(y, n)), to simplify some code
that SCEVExpander can produce when running on behalf of LSR.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@93949 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| cd9e155755dab1913238ffc0374111a39d500adf |
20-Jan-2010 |
Dan Gohman <gohman@apple.com> |
Fold (add x, shl(0 - y, n)) -> sub(x, shl(y, n)), to simplify some code
that SCEVExpander can produce when running on behalf of LSR.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@93949 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| b43b732b65703d4c76f04e44e7f370f7092be71a |
19-Jan-2010 |
David Greene <greened@obbligato.org> |
Add some new debugging APIs to print out "raw" SelectionDAGs to make
understanding CannotYTetSelect and other errors easier.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@93901 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
electionDAGISel.cpp
|
| ce6715faa37b2e44edcf400084aa808ae30d7085 |
19-Jan-2010 |
David Greene <greened@obbligato.org> |
Add some new debugging APIs to print out "raw" SelectionDAGs to make
understanding CannotYTetSelect and other errors easier.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@93901 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
electionDAGISel.cpp
|
| 0e073cd755d2582295de65b49ca2a7ead8ad48bf |
19-Jan-2010 |
Dale Johannesen <dalej@apple.com> |
Revert 93811 per request.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@93818 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
|
| f082d7abe1cbba4608b3d79c2e9d16be0f42d1bc |
19-Jan-2010 |
Dale Johannesen <dalej@apple.com> |
Revert 93811 per request.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@93818 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
|
| 892c2d9df22f22c6d1e7b6f3d0109344050c1f80 |
19-Jan-2010 |
Dale Johannesen <dalej@apple.com> |
Enable code to emit dbg.declare as DEBUG_VALUE
comments (fast isel, X86). This doesn't seem
to break any functionality, but will introduce
cases where -g affects the generated code. I'll
be fixing that.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@93811 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
|
| 1b346b7f8fe5913c253106e49cb4c848fac953d5 |
19-Jan-2010 |
Dale Johannesen <dalej@apple.com> |
Enable code to emit dbg.declare as DEBUG_VALUE
comments (fast isel, X86). This doesn't seem
to break any functionality, but will introduce
cases where -g affects the generated code. I'll
be fixing that.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@93811 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
|
| 029251769c9afbbb1bd066c0ec37347aedf59013 |
18-Jan-2010 |
Evan Cheng <evan.cheng@apple.com> |
Canonicalize -1 - x to ~x.
Instcombine does this but apparently there are situations where this pattern will escape the optimizer and / or created by isel. Here is a case that's seen in JavaScriptCore:
%t1 = sub i32 0, %a
%t2 = add i32 %t1, -1
The dag combiner pattern: ((c1-A)+c2) -> (c1+c2)-A
will fold it to -1 - %a.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@93773 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 1ad0e8b5769f25ca442f3d77bf374d03469010bc |
18-Jan-2010 |
Evan Cheng <evan.cheng@apple.com> |
Canonicalize -1 - x to ~x.
Instcombine does this but apparently there are situations where this pattern will escape the optimizer and / or created by isel. Here is a case that's seen in JavaScriptCore:
%t1 = sub i32 0, %a
%t2 = add i32 %t1, -1
The dag combiner pattern: ((c1-A)+c2) -> (c1+c2)-A
will fold it to -1 - %a.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@93773 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 395885b0c037e6fdce3690c092e22ff1613ae728 |
17-Jan-2010 |
Kenneth Uildriks <kennethuil@gmail.com> |
When checking for sret-demotion, it needs to use legal types. When using the return value of an sret-demoted call, it needs to use possibly illegal types that match the declared Type of the callee.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@93667 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| 93ae407ec3d300805d42a6e2f81ab8c4538eb494 |
17-Jan-2010 |
Kenneth Uildriks <kennethuil@gmail.com> |
When checking for sret-demotion, it needs to use legal types. When using the return value of an sret-demoted call, it needs to use possibly illegal types that match the declared Type of the callee.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@93667 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| 2fecfc64c6973de9c1653841108ca7dd99f65780 |
15-Jan-2010 |
David Greene <greened@obbligato.org> |
Add some debug routines to SelectionDAG to dump full DAGs.
print/dumpWithDepth allows one to dump a DAG up to N levels deep.
dump/printWithFullDepth prints the whole DAG, subject to a depth limit
on 100 in the default case (to prevent infinite recursion).
Have CannotYetSelect to a dumpWithFullDepth so it is clearer exactly
what the non-matching DAG looks like.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@93538 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
electionDAGISel.cpp
|
| ac931c011fae9392b5d68e763ec64ee25181c267 |
15-Jan-2010 |
David Greene <greened@obbligato.org> |
Add some debug routines to SelectionDAG to dump full DAGs.
print/dumpWithDepth allows one to dump a DAG up to N levels deep.
dump/printWithFullDepth prints the whole DAG, subject to a depth limit
on 100 in the default case (to prevent infinite recursion).
Have CannotYetSelect to a dumpWithFullDepth so it is clearer exactly
what the non-matching DAG looks like.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@93538 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
electionDAGISel.cpp
|
| d22820bc0989a6df50b40f65cde66d4218151074 |
15-Jan-2010 |
Victor Hernandez <vhernandez@apple.com> |
Improve llvm.dbg.declare intrinsic by referring directly to the storage in its first argument, via function-local metadata (instead of via a bitcast).
This patch also cleans up code that expects there to be a bitcast in the first argument and testcases that call llvm.dbg.declare.
It also strips old llvm.dbg.declare intrinsics that did not pass metadata as the first argument.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@93531 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
|
| 3a32865d58f015e7058444eab7085195c34da95a |
15-Jan-2010 |
Victor Hernandez <vhernandez@apple.com> |
Improve llvm.dbg.declare intrinsic by referring directly to the storage in its first argument, via function-local metadata (instead of via a bitcast).
This patch also cleans up code that expects there to be a bitcast in the first argument and testcases that call llvm.dbg.declare.
It also strips old llvm.dbg.declare intrinsics that did not pass metadata as the first argument.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@93531 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
|
| 797ddec380dfcd01f74055185b31d8d3ce33186f |
15-Jan-2010 |
Victor Hernandez <vhernandez@apple.com> |
Revert r93504 because older uses of llvm.dbg.declare intrinsics need to be auto-upgraded
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@93515 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
|
| 5f03238d629c32bb0bab78d112a42293838558e9 |
15-Jan-2010 |
Victor Hernandez <vhernandez@apple.com> |
Revert r93504 because older uses of llvm.dbg.declare intrinsics need to be auto-upgraded
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@93515 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
|
| a2e6f234901138c6fe3fa53b1b0cfa6f9c595e03 |
15-Jan-2010 |
Victor Hernandez <vhernandez@apple.com> |
Improve llvm.dbg.declare intrinsic by referring directly to the storage in its first argument, via function-local metadata (instead of via a bitcast).
This patch also cleans up code that expects there to be a bitcast in the first argument and testcases that call llvm.dbg.declare.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@93504 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
|
| 283ba2fbb4a40d5f7615aba070f2f7ec161d19ac |
15-Jan-2010 |
Victor Hernandez <vhernandez@apple.com> |
Improve llvm.dbg.declare intrinsic by referring directly to the storage in its first argument, via function-local metadata (instead of via a bitcast).
This patch also cleans up code that expects there to be a bitcast in the first argument and testcases that call llvm.dbg.declare.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@93504 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
|
| c5d373ab6892c9210e618ae6e5394cd4f301978d |
15-Jan-2010 |
Jim Grosbach <grosbach@apple.com> |
fix 80-column violations
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@93487 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| f4549b02a7d9907d06e7fb8afefd129452d1f7c5 |
15-Jan-2010 |
Jim Grosbach <grosbach@apple.com> |
fix 80-column violations
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@93487 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 4e57a87a7823a9734e67aeba2ce067db7e972ab4 |
14-Jan-2010 |
Dan Gohman <gohman@apple.com> |
Fix a codegen abort seen in 483.xalancbmk.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@93417 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| ff00a555171cac0a77c0434fd85ff5a0ae672ade |
14-Jan-2010 |
Dan Gohman <gohman@apple.com> |
Fix a codegen abort seen in 483.xalancbmk.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@93417 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 62f23d34678c30606705a432f268fadf85aa162b |
12-Jan-2010 |
Dan Gohman <gohman@apple.com> |
Update a partially obsolete comment.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@93228 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 21c14e3649b3e2a70ac36ebb148f17648f10a2a9 |
12-Jan-2010 |
Dan Gohman <gohman@apple.com> |
Update a partially obsolete comment.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@93228 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| c90588049c6c7577366bdc59364f89cc631a1e6d |
12-Jan-2010 |
Dan Gohman <gohman@apple.com> |
Fix a typo in a comment.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@93227 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
|
| 5c9cf19d1e7d044e786f03331bc3f004966a69d2 |
12-Jan-2010 |
Dan Gohman <gohman@apple.com> |
Fix a typo in a comment.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@93227 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
|
| 1f50af772b65865868f332792dd3150aeaba8660 |
11-Jan-2010 |
Jakob Stoklund Olesen <stoklund@2pi.dk> |
Avoid adding PHI arguments for a predecessor that has gone away when a BRCOND was constant folded.
This fixes PR5980.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@93184 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| dd437ba15e00d1a137e0c6e3ca1ff213ed6a2aa0 |
11-Jan-2010 |
Jakob Stoklund Olesen <stoklund@2pi.dk> |
Avoid adding PHI arguments for a predecessor that has gone away when a BRCOND was constant folded.
This fixes PR5980.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@93184 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 313485a4c25a8eb93e035b3d457c2a0d2069258c |
11-Jan-2010 |
Mon P Wang <wangmp@apple.com> |
Disable transformation of select of two loads to a select of address and then a load if the
loads are not in the default address space because the transformation discards src value info.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@93180 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| fe240b1066badd7a56d9a99637cdc7cd25f8305c |
11-Jan-2010 |
Mon P Wang <wangmp@apple.com> |
Disable transformation of select of two loads to a select of address and then a load if the
loads are not in the default address space because the transformation discards src value info.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@93180 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 7196cb17f2a16ed5c57325c7eddef90b25ad306b |
09-Jan-2010 |
Dan Gohman <gohman@apple.com> |
Revert an earlier change to SIGN_EXTEND_INREG for vectors. The VTSDNode
really does need to be a vector type, because
TargetLowering::getOperationAction for SIGN_EXTEND_INREG uses that type,
and it needs to be able to distinguish between vectors and scalars.
Also, fix some more issues with legalization of vector casts.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@93043 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
egalizeDAG.cpp
egalizeTypes.h
egalizeVectorOps.cpp
egalizeVectorTypes.cpp
electionDAG.cpp
argetLowering.cpp
|
| d1996360399ad6dbe75ee185b661b16c83146373 |
09-Jan-2010 |
Dan Gohman <gohman@apple.com> |
Revert an earlier change to SIGN_EXTEND_INREG for vectors. The VTSDNode
really does need to be a vector type, because
TargetLowering::getOperationAction for SIGN_EXTEND_INREG uses that type,
and it needs to be able to distinguish between vectors and scalars.
Also, fix some more issues with legalization of vector casts.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@93043 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
egalizeDAG.cpp
egalizeTypes.h
egalizeVectorOps.cpp
egalizeVectorTypes.cpp
electionDAG.cpp
argetLowering.cpp
|
| 61a04a4863bec3aafeaac93f24cdb99fc9c78fe0 |
09-Jan-2010 |
Evan Cheng <evan.cheng@apple.com> |
Dan pointed out checking whether a node is dead by comparing its opcode to ISD::DELETED_NODE is not safe. Use a DAGUpdateListener to remove dead nodes from work list instead.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@93031 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 54e146b935123d3d325e8eb30c2e1f2eca3377ac |
09-Jan-2010 |
Evan Cheng <evan.cheng@apple.com> |
Dan pointed out checking whether a node is dead by comparing its opcode to ISD::DELETED_NODE is not safe. Use a DAGUpdateListener to remove dead nodes from work list instead.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@93031 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| cadeefe319b2b8b79baa3201754f647b5c08f6c1 |
08-Jan-2010 |
Evan Cheng <evan.cheng@apple.com> |
ReplaceAllUsesOfValueWith may delete other nodes that the one being replaced. Do not delete dead nodes again.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@92988 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 6f279e0bda35a35740cc8c5479d579890bc1d3f7 |
08-Jan-2010 |
Evan Cheng <evan.cheng@apple.com> |
ReplaceAllUsesOfValueWith may delete other nodes that the one being replaced. Do not delete dead nodes again.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@92988 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 73f59c1f111309e9de59444020bcd0993b054699 |
07-Jan-2010 |
Chris Lattner <sabre@nondot.org> |
Fix rdar://7517201, a regression introduced by r92849.
When folding a and(any_ext(load)) both the any_ext and the
load have to have only a single use.
This removes the anyext-uses.ll testcase which started failing
because it is unreduced and unclear what it is testing.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@92950 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| bd1fccfad59f24267b6fa8b898711d63a3574c7d |
07-Jan-2010 |
Chris Lattner <sabre@nondot.org> |
Fix rdar://7517201, a regression introduced by r92849.
When folding a and(any_ext(load)) both the any_ext and the
load have to have only a single use.
This removes the anyext-uses.ll testcase which started failing
because it is unreduced and unclear what it is testing.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@92950 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 4dbb99a59e8afbbf26ca2e2046694317d174e805 |
07-Jan-2010 |
Chris Lattner <sabre@nondot.org> |
factor this code better and reduce nesting at the same
time, no functionality change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@92948 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| ef7634ca48c7ed33a88bd80207f3457c07ad85f2 |
07-Jan-2010 |
Chris Lattner <sabre@nondot.org> |
factor this code better and reduce nesting at the same
time, no functionality change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@92948 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 746ff38b996b0a2c8233f4679a543d8cf7dfc8c8 |
07-Jan-2010 |
Evan Cheng <evan.cheng@apple.com> |
APInt'fy TargetLowering::SimplifySetCC to fix PR5963.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@92943 91177308-0d34-0410-b5e6-96231b3b80d8
argetLowering.cpp
|
| 347a9cb5070be6473a5f881dd29997b46081d23b |
07-Jan-2010 |
Evan Cheng <evan.cheng@apple.com> |
APInt'fy TargetLowering::SimplifySetCC to fix PR5963.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@92943 91177308-0d34-0410-b5e6-96231b3b80d8
argetLowering.cpp
|
| 947f3a6e79834ed0e7a5310c43eb0ca64fd24b8c |
07-Jan-2010 |
Benjamin Kramer <benny.kra@googlemail.com> |
Use pop_back_val instead of back()+pop_back.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@92918 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 7b1e2a50a51793428a792a15d2777a4c48e0db49 |
07-Jan-2010 |
Benjamin Kramer <benny.kra@googlemail.com> |
Use pop_back_val instead of back()+pop_back.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@92918 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| d917041c2164560446871f451b25580dbe137838 |
06-Jan-2010 |
Evan Cheng <evan.cheng@apple.com> |
Comment.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@92850 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 54eb4c2991796c3014e831fc07e4a6c0a3df10f0 |
06-Jan-2010 |
Evan Cheng <evan.cheng@apple.com> |
Comment.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@92850 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 095dac2acc996c523aa6ec5b44e0c1e0099286e1 |
06-Jan-2010 |
Evan Cheng <evan.cheng@apple.com> |
Teach dag combine to fold the following transformation more aggressively:
(OP (trunc x), (trunc y)) -> (trunc (OP x, y))
Unfortunately this simple change causes dag combine to infinite looping. The problem is the shrink demanded ops optimization tend to canonicalize expressions in the opposite manner. That is badness. This patch disable those optimizations in dag combine but instead it is done as a late pass in sdisel.
This also exposes some deficiencies in dag combine and x86 setcc / brcond lowering. Teach them to look pass ISD::TRUNCATE in various places.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@92849 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
electionDAG.cpp
electionDAGISel.cpp
argetLowering.cpp
|
| d40d03e1bd1d51857fc2f9f9230e334c3a32b249 |
06-Jan-2010 |
Evan Cheng <evan.cheng@apple.com> |
Teach dag combine to fold the following transformation more aggressively:
(OP (trunc x), (trunc y)) -> (trunc (OP x, y))
Unfortunately this simple change causes dag combine to infinite looping. The problem is the shrink demanded ops optimization tend to canonicalize expressions in the opposite manner. That is badness. This patch disable those optimizations in dag combine but instead it is done as a late pass in sdisel.
This also exposes some deficiencies in dag combine and x86 setcc / brcond lowering. Teach them to look pass ISD::TRUNCATE in various places.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@92849 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
electionDAG.cpp
electionDAGISel.cpp
argetLowering.cpp
|
| 036a1980b77b60c8af9c5ce84c7ede5dadf3e96c |
06-Jan-2010 |
Bill Wendling <isanbard@gmail.com> |
The previous code could potentially cause a cycle. Allow ordering w.r.t. a 0 order.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@92810 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGRRList.cpp
|
| 3f09487404bc46297dc6fd91ca3ac478c3a7fa34 |
06-Jan-2010 |
Bill Wendling <isanbard@gmail.com> |
The previous code could potentially cause a cycle. Allow ordering w.r.t. a 0 order.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@92810 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGRRList.cpp
|
| 882f79a3e629020bcd5b5059bf6df67764aaaa67 |
06-Jan-2010 |
Bill Wendling <isanbard@gmail.com> |
Only check the ordering if there is an ordering for each nodes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@92807 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGRRList.cpp
|
| cfeea4b92aa5be102e58efea947ca40a95b0c999 |
06-Jan-2010 |
Bill Wendling <isanbard@gmail.com> |
Only check the ordering if there is an ordering for each nodes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@92807 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGRRList.cpp
|
| 1da5cacca96a3488451cb9627ec3407d861db35a |
06-Jan-2010 |
Bill Wendling <isanbard@gmail.com> |
Add a semi-primitive form of scheduling via the "SDNode ordering" to the
bottom-up scheduler. We prefer the lower order number.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@92806 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGRRList.cpp
|
| 247fb4ebd363323b6642ce2bb08e53db705ca094 |
06-Jan-2010 |
Bill Wendling <isanbard@gmail.com> |
Add a semi-primitive form of scheduling via the "SDNode ordering" to the
bottom-up scheduler. We prefer the lower order number.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@92806 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGRRList.cpp
|
| f5b856e21b2b84bb43646bd047010472b348c0f6 |
05-Jan-2010 |
Bill Wendling <isanbard@gmail.com> |
Don't assign the shift the same type as the variable being shifted. This could
result in illegal types for the SHL operator.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@92797 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 9f7c5c0dca1e63bca39eb6511e8847b02030cb1f |
05-Jan-2010 |
Bill Wendling <isanbard@gmail.com> |
Don't assign the shift the same type as the variable being shifted. This could
result in illegal types for the SHL operator.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@92797 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| f45e5d183036079f51ff374e8e1ecb06978b286e |
05-Jan-2010 |
Dan Gohman <gohman@apple.com> |
Don't use the ISD::NodeType enum for SDNode opcodes, as CodeGen
uses several kinds of opcode values which are not declared within
that enum. This fixes PR5946.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@92794 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
|
| 7c3ecb6838ef7a2ca306c0f3cd68022f0855ae71 |
05-Jan-2010 |
Dan Gohman <gohman@apple.com> |
Don't use the ISD::NodeType enum for SDNode opcodes, as CodeGen
uses several kinds of opcode values which are not declared within
that enum. This fixes PR5946.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@92794 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
|
| f2052d5e0eb5028a06f41d2cebb8e22b6876ebc0 |
05-Jan-2010 |
Benjamin Kramer <benny.kra@googlemail.com> |
Avoid going through the LLVMContext for type equality where it's safe to dereference the type pointer.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@92726 91177308-0d34-0410-b5e6-96231b3b80d8
unctionLoweringInfo.cpp
electionDAGBuilder.cpp
electionDAGISel.cpp
|
| f012705c7e4ca8cf90b6b734ce1d5355daca5ba5 |
05-Jan-2010 |
Benjamin Kramer <benny.kra@googlemail.com> |
Avoid going through the LLVMContext for type equality where it's safe to dereference the type pointer.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@92726 91177308-0d34-0410-b5e6-96231b3b80d8
unctionLoweringInfo.cpp
electionDAGBuilder.cpp
electionDAGISel.cpp
|
| 4efb3b2015b855a403ad0963000fe2b125059e6a |
05-Jan-2010 |
Devang Patel <dpatel@apple.com> |
Delete renaming use of dead dbg intrinsics.
Intrinsic::dbg_stoppoint
Intrinsic::dbg_region_start
Intrinsic::dbg_region_end
Intrinsic::dbg_func_start
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@92672 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
electionDAGBuilder.cpp
|
| 614d2ad0afaaee874684c3945afda659d587b7e6 |
05-Jan-2010 |
Devang Patel <dpatel@apple.com> |
Delete renaming use of dead dbg intrinsics.
Intrinsic::dbg_stoppoint
Intrinsic::dbg_region_start
Intrinsic::dbg_region_end
Intrinsic::dbg_func_start
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@92672 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
electionDAGBuilder.cpp
|
| a0e147ae0b909678c1d4562b7896637ed4542016 |
05-Jan-2010 |
David Greene <greened@obbligato.org> |
Change errs() to dbgs().
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@92597 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 1a053236f165ac60ee88edca370a732d278aa2c1 |
05-Jan-2010 |
David Greene <greened@obbligato.org> |
Change errs() to dbgs().
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@92597 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| fffdb84d03d0e1912cefa513d2e6295a70229916 |
05-Jan-2010 |
David Greene <greened@obbligato.org> |
Change errs() to dbgs().
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@92581 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGSDNodes.cpp
|
| 84fa8229bbd3813505b7e8d6555fb2e522104e30 |
05-Jan-2010 |
David Greene <greened@obbligato.org> |
Change errs() to dbgs().
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@92581 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGSDNodes.cpp
|
| 2b40464eef49685fbe83d4267656c246c466a693 |
05-Jan-2010 |
David Greene <greened@obbligato.org> |
Change errs() to dbgs().
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@92580 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGFast.cpp
|
| 33db62ce23790b5db57dad66e77a1a06cccfb06e |
05-Jan-2010 |
David Greene <greened@obbligato.org> |
Change errs() to dbgs().
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@92580 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGFast.cpp
|
| 1332f4c84eeb009f35d5987342593f9ac9cabe2d |
05-Jan-2010 |
David Greene <greened@obbligato.org> |
Change errs() to dbgs().
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@92579 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeTypes.cpp
|
| bb22223d5b4eb27d238bcc1b67b033975c43db7b |
05-Jan-2010 |
David Greene <greened@obbligato.org> |
Change errs() to dbgs().
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@92579 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeTypes.cpp
|
| 377b0d9f96ff88cfbf07b81aa65dce1bc4ae16c8 |
05-Jan-2010 |
David Greene <greened@obbligato.org> |
Change errs() to dbgs().
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@92578 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| f10902981c775828bfdd807c88704c965c47ede1 |
05-Jan-2010 |
David Greene <greened@obbligato.org> |
Change errs() to dbgs().
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@92578 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 7adcad670c1e89e9167488cba092bb7b794c0086 |
05-Jan-2010 |
David Greene <greened@obbligato.org> |
Change errs() to dbgs().
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@92577 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| 4b69d9909dfdef1ea54a56e6f0e0640031635a9d |
05-Jan-2010 |
David Greene <greened@obbligato.org> |
Change errs() to dbgs().
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@92577 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| 5dc5458c3b0bccd7e914a02f56c5310842d3f270 |
05-Jan-2010 |
David Greene <greened@obbligato.org> |
Change errs() to dbgs().
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@92576 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGRRList.cpp
|
| e492ae13edd83b120d665c0503cf4de2925b5e56 |
05-Jan-2010 |
David Greene <greened@obbligato.org> |
Change errs() to dbgs().
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@92576 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGRRList.cpp
|
| 88a0d487622b323fe6a332235406c1c225d68171 |
05-Jan-2010 |
David Greene <greened@obbligato.org> |
Change errs() to dbgs().
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@92575 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 993aacedfdc3f156f667b4efa280ee79eab3b898 |
05-Jan-2010 |
David Greene <greened@obbligato.org> |
Change errs() to dbgs().
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@92575 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| d4d6f27ce5b0d80c6506f8ea8b903dd3b7ed3c3d |
05-Jan-2010 |
David Greene <greened@obbligato.org> |
Change errs() to dbgs().
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@92574 91177308-0d34-0410-b5e6-96231b3b80d8
allingConvLower.cpp
|
| ad61b129ee283f6399ecf6fa5f64f82760e9a56a |
05-Jan-2010 |
David Greene <greened@obbligato.org> |
Change errs() to dbgs().
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@92574 91177308-0d34-0410-b5e6-96231b3b80d8
allingConvLower.cpp
|
| 07e35180efbd5448db29837423bcd02954e9761a |
05-Jan-2010 |
David Greene <greened@obbligato.org> |
Change errs() to dbgs().
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@92573 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeFloatTypes.cpp
|
| f0dee89b0224199c8a8799b26867767f20997363 |
05-Jan-2010 |
David Greene <greened@obbligato.org> |
Change errs() to dbgs().
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@92573 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeFloatTypes.cpp
|
| b67509c0d508f21ab06fe141c30dd76861f3423f |
05-Jan-2010 |
David Greene <greened@obbligato.org> |
Change errs() to dbgs().
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@92572 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGPrinter.cpp
|
| 9abe0bbd9089c98ae4ad7bae589ea0ebb51bb3f5 |
05-Jan-2010 |
David Greene <greened@obbligato.org> |
Change errs() to dbgs().
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@92572 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGPrinter.cpp
|
| 2e75f53a6068120c5868b2012cdb4933024bae5d |
05-Jan-2010 |
David Greene <greened@obbligato.org> |
Change errs() to dbgs().
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@92571 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGList.cpp
|
| ec2d7fe92473bab113747833d22e73ce35d8e16b |
05-Jan-2010 |
David Greene <greened@obbligato.org> |
Change errs() to dbgs().
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@92571 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGList.cpp
|
| 953082637ec85149bcbaa6db75ab98936a4e34c2 |
05-Jan-2010 |
David Greene <greened@obbligato.org> |
Change errs() to dbgs().
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@92570 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeVectorTypes.cpp
|
| 7419b1806a1c3abdc23b62de76fae737b763fb33 |
05-Jan-2010 |
David Greene <greened@obbligato.org> |
Change errs() to dbgs().
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@92570 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeVectorTypes.cpp
|
| d44636d9ca283f76b764d33f9f926e35051fd4c0 |
05-Jan-2010 |
David Greene <greened@obbligato.org> |
Change errs() to dbgs().
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@92569 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 55d146e0f9ed00d4e3934bcc00c4179a88f83353 |
05-Jan-2010 |
David Greene <greened@obbligato.org> |
Change errs() to dbgs().
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@92569 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 27ac1087e59d89f46961c015d450b1df92bd654c |
05-Jan-2010 |
David Greene <greened@obbligato.org> |
Change errs() to dbgs().
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@92568 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeIntegerTypes.cpp
|
| d765353da89988e949fd4c021d8860f36ab7c392 |
05-Jan-2010 |
David Greene <greened@obbligato.org> |
Change errs() to dbgs().
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@92568 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeIntegerTypes.cpp
|
| 5f082a7df38fa6d7b53c0d7baeca8d74f097d659 |
05-Jan-2010 |
Dan Gohman <gohman@apple.com> |
Change SelectCode's argument from SDValue to SDNode *, to make it more
clear what information these functions are actually using.
This is also a micro-optimization, as passing a SDNode * around is
simpler than passing a { SDNode *, int } by value or reference.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@92564 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| eeb3a00b84b7767d236ec8cf0619b9217fc247b9 |
05-Jan-2010 |
Dan Gohman <gohman@apple.com> |
Change SelectCode's argument from SDValue to SDNode *, to make it more
clear what information these functions are actually using.
This is also a micro-optimization, as passing a SDNode * around is
simpler than passing a { SDNode *, int } by value or reference.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@92564 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 5a7d25d7dab282dfc0a9ac2d7c8eda3a7e5deab2 |
04-Jan-2010 |
Dan Gohman <gohman@apple.com> |
Use a pointer type rather than MVT::Other for the ExternalSymbol node used
in an inline asm.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@92512 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| f2d7fb3eac30e2c018bad0c8db7f89130da9c89f |
04-Jan-2010 |
Dan Gohman <gohman@apple.com> |
Use a pointer type rather than MVT::Other for the ExternalSymbol node used
in an inline asm.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@92512 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| 257964986869fc5dc01c473f96f590f070f3f1e6 |
02-Jan-2010 |
Chris Lattner <sabre@nondot.org> |
Teach codegen to handle:
(X != null) | (Y != null) --> (X|Y) != 0
(X == null) & (Y == null) --> (X|Y) == 0
so that instcombine can stop doing this for pointers. This is part of PR3351,
which is a case where instcombine doing this for pointers (inserting ptrtoint)
is pessimizing code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@92406 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| 133ce871df8bc161928970216ff9b195b1fa3a14 |
02-Jan-2010 |
Chris Lattner <sabre@nondot.org> |
Teach codegen to handle:
(X != null) | (Y != null) --> (X|Y) != 0
(X == null) & (Y == null) --> (X|Y) == 0
so that instcombine can stop doing this for pointers. This is part of PR3351,
which is a case where instcombine doing this for pointers (inserting ptrtoint)
is pessimizing code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@92406 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| c57dcd5e708420c240dbd5423443c7fb8a59ccbd |
02-Jan-2010 |
Chris Lattner <sabre@nondot.org> |
whitespace cleanup
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@92404 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.h
|
| 53334ca5acc43500bb2744ed1a44e16442e92d0d |
02-Jan-2010 |
Chris Lattner <sabre@nondot.org> |
whitespace cleanup
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@92404 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.h
|
| 2cd8f1641e082a41c508c0f3a0fb8fb29d452728 |
01-Jan-2010 |
Mikhail Glushenkov <foldr@codedgers.com> |
Fix a warning on gcc 4.4.
SelectionDAGBuilder.cpp:4294: warning: suggest explicit braces to avoid
ambiguous ‘else’
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@92395 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| bfdfea86a1489b7249e52f67fe91a0bf028148a9 |
01-Jan-2010 |
Mikhail Glushenkov <foldr@codedgers.com> |
Fix a warning on gcc 4.4.
SelectionDAGBuilder.cpp:4294: warning: suggest explicit braces to avoid
ambiguous ‘else’
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@92395 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| 77a6244975d208df2a06bb37232aa7d7c0f8e557 |
01-Jan-2010 |
Mikhail Glushenkov <foldr@codedgers.com> |
Trailing whitespace, 80-col violations.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@92394 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| b3c0199f6aff85f918bac8748b4b9178f029a7bf |
01-Jan-2010 |
Mikhail Glushenkov <foldr@codedgers.com> |
Trailing whitespace, 80-col violations.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@92394 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| 53aa27c8f9e088dd1f4eaab6188dedc0791f6622 |
01-Jan-2010 |
Chris Lattner <sabre@nondot.org> |
Teach codegen to lower llvm.powi to an efficient (but not optimal)
multiply sequence when the power is a constant integer. Before, our
codegen for std::pow(.., int) always turned into a libcall, which was
really inefficient.
This should also make many gfortran programs happier I'd imagine.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@92388 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| f031e8ad011e9ad95d7c965936da07e3a9c42add |
01-Jan-2010 |
Chris Lattner <sabre@nondot.org> |
Teach codegen to lower llvm.powi to an efficient (but not optimal)
multiply sequence when the power is a constant integer. Before, our
codegen for std::pow(.., int) always turned into a libcall, which was
really inefficient.
This should also make many gfortran programs happier I'd imagine.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@92388 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| 6d8d8157e6b3996d6c6ebe50909c8bfaabf40a31 |
29-Dec-2009 |
Chris Lattner <sabre@nondot.org> |
remove a bunch of unneeded functions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@92263 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
electionDAGBuilder.cpp
|
| bf0ca2b477e761e2c81f6c36d6c7bec055933b15 |
29-Dec-2009 |
Chris Lattner <sabre@nondot.org> |
remove a bunch of unneeded functions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@92263 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
electionDAGBuilder.cpp
|
| a0d451f0c3b152920c0bc50ab6c5fb6b9eef89b4 |
29-Dec-2009 |
Chris Lattner <sabre@nondot.org> |
Final step in the metadata API restructuring: move the
getMDKindID/getMDKindNames methods to LLVMContext (and add
convenience methods to Module), eliminating MetadataContext.
Move the state that it maintains out to LLVMContext.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@92259 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 081134741b40b342fb2f85722c9cea5d412489a8 |
29-Dec-2009 |
Chris Lattner <sabre@nondot.org> |
Final step in the metadata API restructuring: move the
getMDKindID/getMDKindNames methods to LLVMContext (and add
convenience methods to Module), eliminating MetadataContext.
Move the state that it maintains out to LLVMContext.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@92259 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| dcf0657604692cafafdd6ff729087344271c2ace |
29-Dec-2009 |
Chris Lattner <sabre@nondot.org> |
This is a major cleanup of the instruction metadata interfaces that
I asked Devang to do back on Sep 27. Instead of going through the
MetadataContext class with methods like getMD() and getMDs(), just
ask the instruction directly for its metadata with getMetadata()
and getAllMetadata().
This includes a variety of other fixes and improvements: previously
all Value*'s were bloated because the HasMetadata bit was thrown into
value, adding a 9th bit to a byte. Now this is properly sunk down to
the Instruction class (the only place where it makes sense) and it
will be folded away somewhere soon.
This also fixes some confusion in getMDs and its clients about
whether the returned list is indexed by the MDID or densely packed.
This is now returned sorted and densely packed and the comments make
this clear.
This introduces a number of fixme's which I'll follow up on.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@92235 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
electionDAGBuilder.cpp
electionDAGISel.cpp
|
| 3990b121cf4a0b280ed3e54cf13870cbf4259e78 |
29-Dec-2009 |
Chris Lattner <sabre@nondot.org> |
This is a major cleanup of the instruction metadata interfaces that
I asked Devang to do back on Sep 27. Instead of going through the
MetadataContext class with methods like getMD() and getMDs(), just
ask the instruction directly for its metadata with getMetadata()
and getAllMetadata().
This includes a variety of other fixes and improvements: previously
all Value*'s were bloated because the HasMetadata bit was thrown into
value, adding a 9th bit to a byte. Now this is properly sunk down to
the Instruction class (the only place where it makes sense) and it
will be folded away somewhere soon.
This also fixes some confusion in getMDs and its clients about
whether the returned list is indexed by the MDID or densely packed.
This is now returned sorted and densely packed and the comments make
this clear.
This introduces a number of fixme's which I'll follow up on.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@92235 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
electionDAGBuilder.cpp
electionDAGISel.cpp
|
| 9741b1d2ca9e6fca4cb6ffa33022eb35c446cd8e |
28-Dec-2009 |
Chris Lattner <sabre@nondot.org> |
rename getMDKind -> getMDKindID, make it autoinsert if an MD Kind
doesn't exist already, eliminate registerMDKind. Tidy up a bunch
of random stuff.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@92225 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
electionDAGBuilder.cpp
electionDAGISel.cpp
|
| 0eb419800ae51d6e0e00a656ede0627483755361 |
28-Dec-2009 |
Chris Lattner <sabre@nondot.org> |
rename getMDKind -> getMDKindID, make it autoinsert if an MD Kind
doesn't exist already, eliminate registerMDKind. Tidy up a bunch
of random stuff.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@92225 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
electionDAGBuilder.cpp
electionDAGISel.cpp
|
| 1061961da58b9e10f2d5677d620a50c64fe2cf19 |
28-Dec-2009 |
Sanjiv Gupta <sanjiv.gupta@microchip.com> |
Allow targets to specify the return type of libcalls that are generated for floating point comparisons, rather than hard-coding them as i32.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@92199 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeFloatTypes.cpp
argetLowering.cpp
|
| 8f17a36d3107bdc4ffed53ce782c1724ef6460e7 |
28-Dec-2009 |
Sanjiv Gupta <sanjiv.gupta@microchip.com> |
Allow targets to specify the return type of libcalls that are generated for floating point comparisons, rather than hard-coding them as i32.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@92199 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeFloatTypes.cpp
argetLowering.cpp
|
| 5204deeef9752b2b7b6b127de709c810341c3f62 |
28-Dec-2009 |
Bill Wendling <isanbard@gmail.com> |
Remove dead store.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@92190 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 9882007003b12466df717cdf66824120ede405be |
28-Dec-2009 |
Bill Wendling <isanbard@gmail.com> |
Remove dead store.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@92190 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 4feaae46274e91f5614de5901216a1129eb0f8fb |
28-Dec-2009 |
Bill Wendling <isanbard@gmail.com> |
Remove dead variable.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@92189 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeIntegerTypes.cpp
|
| 551aa9979651885ec315cf5b6d32d53dfcdc1720 |
28-Dec-2009 |
Bill Wendling <isanbard@gmail.com> |
Remove dead variable.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@92189 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeIntegerTypes.cpp
|
| d949baceb4758e5d3dbb753fe3f0b8fda72c4e57 |
28-Dec-2009 |
Bill Wendling <isanbard@gmail.com> |
Remove dead variable.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@92188 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| d831181f89e913bb17233b5c753e1683e56f5e05 |
28-Dec-2009 |
Bill Wendling <isanbard@gmail.com> |
Remove dead variable.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@92188 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 53ba77c4965127df0cd5de618be703588f22c988 |
28-Dec-2009 |
Bill Wendling <isanbard@gmail.com> |
Remove dead variable.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@92180 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
|
| 86888887872737f614a66e3e25b896248c29c6c2 |
28-Dec-2009 |
Bill Wendling <isanbard@gmail.com> |
Remove dead variable.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@92180 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
|
| 18bdaa57e25cf10bc088cb82c7cb4f7412346086 |
28-Dec-2009 |
Bill Wendling <isanbard@gmail.com> |
Remove dead variable.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@92178 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeTypesGeneric.cpp
|
| b17f15b25f101b96981c1e03f1a9295fa764606b |
28-Dec-2009 |
Bill Wendling <isanbard@gmail.com> |
Remove dead variable.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@92178 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeTypesGeneric.cpp
|
| 7f42f87c5eca549b951c85212c511df9b91d9e15 |
24-Dec-2009 |
Chris Lattner <sabre@nondot.org> |
handle equality memcmp of 8 bytes on x86-64 with two unaligned loads and a
compare. On other targets we end up with a call to memcmp because we don't
want 16 individual byte loads. We should be able to use movups as well, but
we're failing to select the generated icmp.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@92107 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| 04b091a7822c60512285ee66b058f98399bf1cf9 |
24-Dec-2009 |
Chris Lattner <sabre@nondot.org> |
handle equality memcmp of 8 bytes on x86-64 with two unaligned loads and a
compare. On other targets we end up with a call to memcmp because we don't
want 16 individual byte loads. We should be able to use movups as well, but
we're failing to select the generated icmp.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@92107 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| b600ec7a01408cc8fd4341d25f75ffed5a9686c2 |
24-Dec-2009 |
Chris Lattner <sabre@nondot.org> |
move an optimization for memcmp out of simplifylibcalls and into
SDISel. This optimization was causing simplifylibcalls to
introduce type-unsafe nastiness. This is the first step, I'll be
expanding the memcmp optimizations shortly, covering things that
we really really wouldn't want simplifylibcalls to do.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@92098 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
electionDAGBuilder.h
|
| 8047d9a6be9c6261c4d3f286786be856d619ed0f |
24-Dec-2009 |
Chris Lattner <sabre@nondot.org> |
move an optimization for memcmp out of simplifylibcalls and into
SDISel. This optimization was causing simplifylibcalls to
introduce type-unsafe nastiness. This is the first step, I'll be
expanding the memcmp optimizations shortly, covering things that
we really really wouldn't want simplifylibcalls to do.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@92098 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
electionDAGBuilder.h
|
| b28ebcf8a5701004b772a6be27ab098e29acab95 |
23-Dec-2009 |
Nuno Lopes <nunoplopes@sapo.pt> |
move a few more symbols to .rodata
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@92011 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| ec9d8b00470b2ddabef4e1b58b4f60d69995d8ce |
23-Dec-2009 |
Nuno Lopes <nunoplopes@sapo.pt> |
move a few more symbols to .rodata
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@92011 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| abdde47c8044f868bd415b69c54ea722830fcddb |
23-Dec-2009 |
Dale Johannesen <dalej@apple.com> |
Use more sensible type for flags in asms. PR 5570.
Patch by Sylve`re Teissier (sorry, ASCII only).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91988 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
electionDAGISel.cpp
|
| 9949933d6eb406bc74f7df7a0180a11c050a236f |
23-Dec-2009 |
Dale Johannesen <dalej@apple.com> |
Use more sensible type for flags in asms. PR 5570.
Patch by Sylve`re Teissier (sorry, ASCII only).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91988 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
electionDAGISel.cpp
|
| 94ff09ba5fca224ef3467e96eb30b91ddc100f7e |
23-Dec-2009 |
Eric Christopher <echristo@apple.com> |
Update objectsize intrinsic and associated dependencies. Fix
lowering code and update testcases.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91979 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| d060b2576ab10d463e339186bcc61860500cbce0 |
23-Dec-2009 |
Eric Christopher <echristo@apple.com> |
Update objectsize intrinsic and associated dependencies. Fix
lowering code and update testcases.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91979 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| 73864c49f649d78d9d59fba71e99181cd0aa1687 |
23-Dec-2009 |
Bill Wendling <isanbard@gmail.com> |
Remove superfluous SDNode ordering.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91971 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| 0d58013c3ff43f077dc5662e6715bb4dd2cb2bc3 |
23-Dec-2009 |
Bill Wendling <isanbard@gmail.com> |
Remove superfluous SDNode ordering.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91971 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| eae0bc06342d18eb54766946f83d4404398bdfd5 |
23-Dec-2009 |
Bill Wendling <isanbard@gmail.com> |
Remove node ordering from inline asm nodes. It's not needed.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91961 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| fc67bbe7bc2e0aa09832c232a5fbb1be796deb4c |
23-Dec-2009 |
Bill Wendling <isanbard@gmail.com> |
Remove node ordering from inline asm nodes. It's not needed.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91961 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| 8a45dc832b7b6af0c1985781b400e1207aa6ed32 |
23-Dec-2009 |
Bill Wendling <isanbard@gmail.com> |
Remove node ordering from VA nodes. It's not needed.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91958 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| c1d3c944ab4410b6dc0e3718cef08d166665b68f |
23-Dec-2009 |
Bill Wendling <isanbard@gmail.com> |
Remove node ordering from VA nodes. It's not needed.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91958 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| fed365211d2a91d829f2cf3dba77b510a06adf95 |
23-Dec-2009 |
Bill Wendling <isanbard@gmail.com> |
Revert r91949 r91942 and r91936.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91953 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 775db97a50fb56fece6fbd68e1a6f86418e8063a |
23-Dec-2009 |
Bill Wendling <isanbard@gmail.com> |
Revert r91949 r91942 and r91936.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91953 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 5d15bd195e84093744f6e2430251b1e2ff1a3766 |
23-Dec-2009 |
Bill Wendling <isanbard@gmail.com> |
Finish up node ordering in ExpandNode.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91949 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 122d06de7482dcb39e7dbcbfe302e39cc55627e5 |
23-Dec-2009 |
Bill Wendling <isanbard@gmail.com> |
Finish up node ordering in ExpandNode.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91949 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 9c32618579c2579ca4a7f483cceef43a53ff1cbf |
23-Dec-2009 |
Bill Wendling <isanbard@gmail.com> |
Assign ordering to nodes created in ExpandNode. Only roughly 1/2 of the function
is finished.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91942 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 3dbcb55b40e3916d538fb6e21ba1662dc82c8fa6 |
23-Dec-2009 |
Bill Wendling <isanbard@gmail.com> |
Assign ordering to nodes created in ExpandNode. Only roughly 1/2 of the function
is finished.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91942 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| d210c4a75a6da94bfb5154d87ed4e3a97755636d |
22-Dec-2009 |
Bill Wendling <isanbard@gmail.com> |
Assign ordering to SDNodes in PromoteNode. Also fixing a subtle bug where BSWAP
was using "Tmp1" in the first getNode call instead of Node->getOperand(0).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91936 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
electionDAGBuilder.cpp
|
| 167bea71a4bd19329a218f5e1bd8facfd90a0cf9 |
22-Dec-2009 |
Bill Wendling <isanbard@gmail.com> |
Assign ordering to SDNodes in PromoteNode. Also fixing a subtle bug where BSWAP
was using "Tmp1" in the first getNode call instead of Node->getOperand(0).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91936 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
electionDAGBuilder.cpp
|
| c1904271abb2fa89e453a1933623f1faaa5bd67f |
22-Dec-2009 |
Bill Wendling <isanbard@gmail.com> |
Allow 0 as an order number. Don't assign an order to formal arguments.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91920 91177308-0d34-0410-b5e6-96231b3b80d8
DNodeOrdering.h
electionDAGBuilder.cpp
|
| 3ea58b6d7a6357018f4f78396b457f86198a7afa |
22-Dec-2009 |
Bill Wendling <isanbard@gmail.com> |
Allow 0 as an order number. Don't assign an order to formal arguments.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91920 91177308-0d34-0410-b5e6-96231b3b80d8
DNodeOrdering.h
electionDAGBuilder.cpp
|
| 9ba2a903c7fd3e01bf7ec1aa6e2c45c12908982e |
22-Dec-2009 |
Bob Wilson <bob.wilson@apple.com> |
Report an error for bad inline assembly, where the value passed for an
"indirect" operand is not a pointer.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91913 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| e261b0c90b25b7ce7a68953e7adecf370c87256e |
22-Dec-2009 |
Bob Wilson <bob.wilson@apple.com> |
Report an error for bad inline assembly, where the value passed for an
"indirect" operand is not a pointer.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91913 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| aa18176a76f0e31db7af3973c7ca6072f1c15318 |
22-Dec-2009 |
Bill Wendling <isanbard@gmail.com> |
Add more plumbing. This time in the LowerArguments and "get" functions which
return partial registers. This affected the back-end lowering code some.
Also patch up some places I missed before in the "get" functions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91880 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
egalizeTypes.cpp
electionDAG.cpp
electionDAGBuilder.cpp
electionDAGBuilder.h
|
| 3ea3c2461932d96d3defa0a9aa93ffaf631bb19d |
22-Dec-2009 |
Bill Wendling <isanbard@gmail.com> |
Add more plumbing. This time in the LowerArguments and "get" functions which
return partial registers. This affected the back-end lowering code some.
Also patch up some places I missed before in the "get" functions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91880 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
egalizeTypes.cpp
electionDAG.cpp
electionDAGBuilder.cpp
electionDAGBuilder.h
|
| 6168feb2057980c8dbf709b2029c34c3a3389972 |
22-Dec-2009 |
Bill Wendling <isanbard@gmail.com> |
Add SDNode ordering to inlined asm and VA functions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91876 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| 651ad13d3c0a232de84d8efe02b11f272b3dee3e |
22-Dec-2009 |
Bill Wendling <isanbard@gmail.com> |
Add SDNode ordering to inlined asm and VA functions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91876 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| 8ee5e5211b17cf9268f7ba0a182afebfdda05b2f |
22-Dec-2009 |
Bill Wendling <isanbard@gmail.com> |
Adding more assignment of ordering to SDNodes. This time in the "call" and
generic copy functions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91872 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| ec72e32fb032cdf367f47ed3a953c3aa2fa93197 |
22-Dec-2009 |
Bill Wendling <isanbard@gmail.com> |
Adding more assignment of ordering to SDNodes. This time in the "call" and
generic copy functions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91872 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| e9869d33ebd51b368e91a633f31a280c07a5fa3c |
22-Dec-2009 |
Bill Wendling <isanbard@gmail.com> |
Add ordering of SDNodes to LowerCallTo.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91866 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| e80ae836f24604dc309d0fc7a2842d8704f3e5d1 |
22-Dec-2009 |
Bill Wendling <isanbard@gmail.com> |
Add ordering of SDNodes to LowerCallTo.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91866 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| 18eda83684adfce0295bf34d4673aef48bb1fcbf |
22-Dec-2009 |
Bill Wendling <isanbard@gmail.com> |
Now add ordering to SDNodes created by the massive intrinsic lowering function.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91863 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| d0283fa69f81a48ec98643ae155706bd201b897e |
22-Dec-2009 |
Bill Wendling <isanbard@gmail.com> |
Now add ordering to SDNodes created by the massive intrinsic lowering function.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91863 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| 1b811d556804786c3abfe51bbc93fefd1a265e0a |
22-Dec-2009 |
Bill Wendling <isanbard@gmail.com> |
To make things interesting, I added MORE code to set the ordering of
SDNodes. This time in the load/store and limited-precision code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91860 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| 856ff41079560697605058ea11d709047a2b00de |
22-Dec-2009 |
Bill Wendling <isanbard@gmail.com> |
To make things interesting, I added MORE code to set the ordering of
SDNodes. This time in the load/store and limited-precision code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91860 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| 1a56f951ebaf80bdd9ff5a71fbd551d254135be5 |
22-Dec-2009 |
Bill Wendling <isanbard@gmail.com> |
Add more plumbing to assign ordering to SDNodes. Have the "getValue" method
assign the ordering when called. Combine some of the ordering assignments to
keep things simple.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91857 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| 87710f04e551655c0c98fb7c0bfd9ec58224a804 |
22-Dec-2009 |
Bill Wendling <isanbard@gmail.com> |
Add more plumbing to assign ordering to SDNodes. Have the "getValue" method
assign the ordering when called. Combine some of the ordering assignments to
keep things simple.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91857 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| bb3929eb9298e1a224601d907406a679406ae0b2 |
22-Dec-2009 |
Bill Wendling <isanbard@gmail.com> |
More ordering plumbing. This time for GEP. I need to remember to assign
orderings to values returned by getValue().
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91850 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| e1a9042041b97d223a65179fb26eb03a4fbe723b |
22-Dec-2009 |
Bill Wendling <isanbard@gmail.com> |
More ordering plumbing. This time for GEP. I need to remember to assign
orderings to values returned by getValue().
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91850 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| 71dac16402a187d9e3dbb52e2ae1fe5cbf559723 |
21-Dec-2009 |
Bill Wendling <isanbard@gmail.com> |
Another incremental check-in for assigning ordering to SDNodes. This time for
shuffle and insert vector.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91847 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| b85b6e888225acac6fd6cf4ef005657fe4ee7096 |
21-Dec-2009 |
Bill Wendling <isanbard@gmail.com> |
Another incremental check-in for assigning ordering to SDNodes. This time for
shuffle and insert vector.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91847 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| 470c75ee68c407f2840b485413d3c380ca9e3a67 |
21-Dec-2009 |
Bill Wendling <isanbard@gmail.com> |
Assign ordering to more instructions. Incremental check-in.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91846 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| 49fcff8a5ded8a0101891ce2ad10cfae54b42c95 |
21-Dec-2009 |
Bill Wendling <isanbard@gmail.com> |
Assign ordering to more instructions. Incremental check-in.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91846 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| db23bbba3bc9eb25d9470c03382478701e38bdd6 |
21-Dec-2009 |
Bill Wendling <isanbard@gmail.com> |
- Add a bit more plumbing assigning an order to SDNodes.
- Modify the "dump" method to emit the order of an SDNode.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91845 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
electionDAGBuilder.cpp
|
| 0777e927214c61c5d681e5b7dd5d00665c81133a |
21-Dec-2009 |
Bill Wendling <isanbard@gmail.com> |
- Add a bit more plumbing assigning an order to SDNodes.
- Modify the "dump" method to emit the order of an SDNode.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91845 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
electionDAGBuilder.cpp
|
| a9ac9ed4db099399deb500d7c4a79fc1554f9c28 |
21-Dec-2009 |
Bill Wendling <isanbard@gmail.com> |
First wave of plumbing for assigning an ordering to SDNodes. This takes care of
a lot of the branching instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91838 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| 3b7a41ce9053b75b7726c0bd56d698e307495de9 |
21-Dec-2009 |
Bill Wendling <isanbard@gmail.com> |
First wave of plumbing for assigning an ordering to SDNodes. This takes care of
a lot of the branching instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91838 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| cb2504ff73c3e9e2aaa1008ba3b83a31c51d819d |
21-Dec-2009 |
Bill Wendling <isanbard@gmail.com> |
Place SDNodeOrdering.h in the directory it's used.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91834 91177308-0d34-0410-b5e6-96231b3b80d8
DNodeOrdering.h
electionDAG.cpp
|
| e36025ec18a3fcadd121ded6792d82c66498c614 |
21-Dec-2009 |
Bill Wendling <isanbard@gmail.com> |
Place SDNodeOrdering.h in the directory it's used.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91834 91177308-0d34-0410-b5e6-96231b3b80d8
DNodeOrdering.h
electionDAG.cpp
|
| 957d2c3e976da9f11eb43bf54f852012227d30d3 |
19-Dec-2009 |
Anton Korobeynikov <asl@math.spbu.ru> |
Use 4-arg getVTList) variant instead of generic one, when possible
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91744 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| cc62c3c9282d927c6af1a0f4b5d73dbac53ea977 |
19-Dec-2009 |
Anton Korobeynikov <asl@math.spbu.ru> |
Use 4-arg getVTList) variant instead of generic one, when possible
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91744 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 339b153899f19a616db8b73b6813e82bfd917f44 |
19-Dec-2009 |
Bill Wendling <isanbard@gmail.com> |
Changes from review:
- Move DisableScheduling flag into TargetOption.h
- Move SDNodeOrdering into its own header file. Give it a minimal interface that
doesn't conflate construction with storage.
- Move assigning the ordering into the SelectionDAGBuilder.
This isn't used yet, so there should be no functional changes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91727 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGSDNodes.cpp
electionDAG.cpp
electionDAGBuilder.cpp
electionDAGBuilder.h
|
| b4e6a5df5dada0cd919cc6e2717eb3118db9cc45 |
19-Dec-2009 |
Bill Wendling <isanbard@gmail.com> |
Changes from review:
- Move DisableScheduling flag into TargetOption.h
- Move SDNodeOrdering into its own header file. Give it a minimal interface that
doesn't conflate construction with storage.
- Move assigning the ordering into the SelectionDAGBuilder.
This isn't used yet, so there should be no functional changes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91727 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGSDNodes.cpp
electionDAG.cpp
electionDAGBuilder.cpp
electionDAGBuilder.h
|
| 675aba0501045ffd2a6dc21168892f338fb787ea |
18-Dec-2009 |
Evan Cheng <evan.cheng@apple.com> |
Increase opportunities to optimize (brcond (srl (and c1), c2)).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91717 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 9ab2b98ba586b366ad49ea141d83b9821f91d8f3 |
18-Dec-2009 |
Evan Cheng <evan.cheng@apple.com> |
Increase opportunities to optimize (brcond (srl (and c1), c2)).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91717 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 4a463881df0d3cb915f252f12958eeda9256445d |
18-Dec-2009 |
Bob Wilson <bob.wilson@apple.com> |
Handle ARM inline asm "w" constraints with 64-bit ("d") registers.
The change in SelectionDAGBuilder is needed to allow using bitcasts to convert
between f64 (the default type for ARM "d" registers) and 64-bit Neon vector
types. Radar 7457110.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91649 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| 5afffaed5c0095930020947322633f0d0b02ffed |
18-Dec-2009 |
Bob Wilson <bob.wilson@apple.com> |
Handle ARM inline asm "w" constraints with 64-bit ("d") registers.
The change in SelectionDAGBuilder is needed to allow using bitcasts to convert
between f64 (the default type for ARM "d" registers) and 64-bit Neon vector
types. Radar 7457110.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91649 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| 4e92f37dccefd7c215fb38cd830d0b0592852f61 |
17-Dec-2009 |
Ken Dyck <ken.dyck@onsemi.com> |
Introduce EVT::getHalfSizedIntegerVT() for use in ExpandUnalignedStore() in
LegalizeDAG.cpp. Unlike the code it replaces, which simply decrements the simple
type by one, getHalfSizedIntegerVT() searches for the smallest simple integer
type that is at least half the size of the type it is called on. This approach
has the advantage that it will continue working if a new value type (such as
i24) is added to MVT.
Also, in preparation for new value types, remove the assertions that
non-power-of-2 8-bit-mutiple types are Extended when legalizing extload and
truncstore operations.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91614 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| bceddbdc919fc2ca7bc8c3911586ba93367686f0 |
17-Dec-2009 |
Ken Dyck <ken.dyck@onsemi.com> |
Introduce EVT::getHalfSizedIntegerVT() for use in ExpandUnalignedStore() in
LegalizeDAG.cpp. Unlike the code it replaces, which simply decrements the simple
type by one, getHalfSizedIntegerVT() searches for the smallest simple integer
type that is at least half the size of the type it is called on. This approach
has the advantage that it will continue working if a new value type (such as
i24) is added to MVT.
Also, in preparation for new value types, remove the assertions that
non-power-of-2 8-bit-mutiple types are Extended when legalizing extload and
truncstore operations.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91614 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 3c06eac1ead1ee19d5da7f6244fc1eba2ca17240 |
17-Dec-2009 |
Bob Wilson <bob.wilson@apple.com> |
Fix a comment grammaro.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91584 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| 266d945fff195c65e46b1226eb7ee95a632b5e58 |
17-Dec-2009 |
Bob Wilson <bob.wilson@apple.com> |
Fix a comment grammaro.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91584 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| 7d8baee6a05ca3383f39a5745c3c93aeb09aa749 |
17-Dec-2009 |
Evan Cheng <evan.cheng@apple.com> |
Revert this dag combine change:
Fold (zext (and x, cst)) -> (and (zext x), cst)
DAG combiner likes to optimize expression in the other way so this would end up cause an infinite looping.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91574 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 4c2b001f1359d10807c89ff0480e8799a1adbe96 |
17-Dec-2009 |
Evan Cheng <evan.cheng@apple.com> |
Revert this dag combine change:
Fold (zext (and x, cst)) -> (and (zext x), cst)
DAG combiner likes to optimize expression in the other way so this would end up cause an infinite looping.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91574 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| b3fc6a97363135cc1bf0f825a2424b1faf53eb26 |
16-Dec-2009 |
Daniel Dunbar <daniel@zuster.org> |
Reapply r91392, it was only unmasking the bug, and since TOT is still broken having it reverted does no good.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91560 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGSDNodes.cpp
electionDAG.cpp
electionDAGBuilder.cpp
|
| 819309efec6f11ba752bd7cbfe186495745f020b |
16-Dec-2009 |
Daniel Dunbar <daniel@zuster.org> |
Reapply r91392, it was only unmasking the bug, and since TOT is still broken having it reverted does no good.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91560 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGSDNodes.cpp
electionDAG.cpp
electionDAGBuilder.cpp
|
| e95e6c2b9690abed80c74de593f537d230318a98 |
16-Dec-2009 |
Daniel Dunbar <daniel@zuster.org> |
Revert "Initial work on disabling the scheduler. This is a work in progress, and
this", this broke llvm-gcc bootstrap for release builds on
x86_64-apple-darwin10.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91533 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGSDNodes.cpp
electionDAG.cpp
electionDAGBuilder.cpp
|
| 222518d0bb2786a14cf3adf6030c55213d5399f8 |
16-Dec-2009 |
Daniel Dunbar <daniel@zuster.org> |
Revert "Initial work on disabling the scheduler. This is a work in progress, and
this", this broke llvm-gcc bootstrap for release builds on
x86_64-apple-darwin10.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91533 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGSDNodes.cpp
electionDAG.cpp
electionDAGBuilder.cpp
|
| d629d80a80bfd6094563000bc82ed37b42acfffa |
15-Dec-2009 |
Evan Cheng <evan.cheng@apple.com> |
Make 91378 more conservative.
1. Only perform (zext (shl (zext x), y)) -> (shl (zext x), y) when y is a constant. This makes sure it remove at least one zest.
2. If the shift is a left shift, make sure the original shift cannot shift out bits.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91399 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 9818c043d2ef1be70780de92bb42edd53d1da62a |
15-Dec-2009 |
Evan Cheng <evan.cheng@apple.com> |
Make 91378 more conservative.
1. Only perform (zext (shl (zext x), y)) -> (shl (zext x), y) when y is a constant. This makes sure it remove at least one zest.
2. If the shift is a left shift, make sure the original shift cannot shift out bits.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91399 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| e8aa0b417ca5d0fc33b6079aa11b81cf86667956 |
15-Dec-2009 |
Bill Wendling <isanbard@gmail.com> |
Initial work on disabling the scheduler. This is a work in progress, and this
stuff isn't used just yet.
We want to model the GCC `-fno-schedule-insns' and `-fno-schedule-insns2'
flags. The hypothesis is that the people who use these flags know what they are
doing, and have hand-optimized the C code to reduce latencies and other
conflicts.
The idea behind our scheme to turn off scheduling is to create a map "on the
side" during DAG generation. It will order the nodes by how they appeared in the
code. This map is then used during scheduling to get the ordering.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91392 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGSDNodes.cpp
electionDAG.cpp
electionDAGBuilder.cpp
|
| 614407a9d21d10ee4f6c45295852c72ad86cb029 |
15-Dec-2009 |
Bill Wendling <isanbard@gmail.com> |
Initial work on disabling the scheduler. This is a work in progress, and this
stuff isn't used just yet.
We want to model the GCC `-fno-schedule-insns' and `-fno-schedule-insns2'
flags. The hypothesis is that the people who use these flags know what they are
doing, and have hand-optimized the C code to reduce latencies and other
conflicts.
The idea behind our scheme to turn off scheduling is to create a map "on the
side" during DAG generation. It will order the nodes by how they appeared in the
code. This map is then used during scheduling to get the ordering.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91392 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGSDNodes.cpp
electionDAG.cpp
electionDAGBuilder.cpp
|
| 5b6187226b44f590ce7f614b128480b9c2d823ef |
15-Dec-2009 |
Evan Cheng <evan.cheng@apple.com> |
Fold (zext (and x, cst)) -> (and (zext x), cst).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91380 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 8acb3100de9cfc02048b7ab23490134ed735b051 |
15-Dec-2009 |
Evan Cheng <evan.cheng@apple.com> |
Fold (zext (and x, cst)) -> (and (zext x), cst).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91380 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 3ff63ae679cf08e69db6770e7965e4f3d04637b9 |
15-Dec-2009 |
Evan Cheng <evan.cheng@apple.com> |
Propagate zest through logical shift.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91378 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 99b653c36f0141f6b9515d688960ac8c2cb857ff |
15-Dec-2009 |
Evan Cheng <evan.cheng@apple.com> |
Propagate zest through logical shift.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91378 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| c6cfdd3f717bfa1b43351c354e39c066dbd167cd |
15-Dec-2009 |
Dan Gohman <gohman@apple.com> |
Fix integer cast code to handle vector types.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91362 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
electionDAG.cpp
|
| 2e141d744ee1354f49a99d9da49dbd9570e4269d |
15-Dec-2009 |
Dan Gohman <gohman@apple.com> |
Fix integer cast code to handle vector types.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91362 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
electionDAG.cpp
|
| a34782d2b71b5fd6b3b32fa4943de1fc89d47115 |
15-Dec-2009 |
Dan Gohman <gohman@apple.com> |
Fix this to properly clear the FastISel debug location. Thanks to
Bill for spotting this!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91355 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 688fb80334e1ad7b259a051411bb72e18abea9e7 |
15-Dec-2009 |
Dan Gohman <gohman@apple.com> |
Fix this to properly clear the FastISel debug location. Thanks to
Bill for spotting this!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91355 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 7c29ae320a827facfbcc32b91d6d98c6b06e44ea |
13-Dec-2009 |
Anton Korobeynikov <asl@math.spbu.ru> |
Fix weird typo which leads to unallocated memory access for nodes with 4 results.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91233 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 60283f9bc9da85e032006db5e2ccc364cef89267 |
13-Dec-2009 |
Anton Korobeynikov <asl@math.spbu.ru> |
Fix weird typo which leads to unallocated memory access for nodes with 4 results.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91233 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 552423de4ce3985cee3e44d2b34afc81aef5b5b4 |
12-Dec-2009 |
Dan Gohman <gohman@apple.com> |
Delete an unnecessary line. The VTSDNode on a SIGN_EXTEND_REG is never
a vector type.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91181 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| a0474a83bfa75757866c9ce361ddb8462a585882 |
12-Dec-2009 |
Dan Gohman <gohman@apple.com> |
Delete an unnecessary line. The VTSDNode on a SIGN_EXTEND_REG is never
a vector type.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91181 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 9d501bd6024424a0d85836f2e61a5fcd3f717d23 |
11-Dec-2009 |
Dan Gohman <gohman@apple.com> |
Implement vector widening, splitting, and scalarizing for SIGN_EXTEND_INREG.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91158 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
egalizeDAG.cpp
egalizeTypes.h
egalizeVectorOps.cpp
egalizeVectorTypes.cpp
electionDAG.cpp
argetLowering.cpp
|
| 87862e77bbf90cf1b68c9eea1f3641ad81435e38 |
11-Dec-2009 |
Dan Gohman <gohman@apple.com> |
Implement vector widening, splitting, and scalarizing for SIGN_EXTEND_INREG.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91158 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
egalizeDAG.cpp
egalizeTypes.h
egalizeVectorOps.cpp
egalizeVectorTypes.cpp
electionDAG.cpp
argetLowering.cpp
|
| 2c4c4dc0dc9c48f7ec593798916cab05c68ec44b |
11-Dec-2009 |
Dan Gohman <gohman@apple.com> |
Fix the result type of SELECT nodes lowered from Select instructions with
aggregate return values. This fixes PR5754.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91145 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| a4f9cc4e55fa12ddff95c2e9d0091077797f0b22 |
11-Dec-2009 |
Dan Gohman <gohman@apple.com> |
Fix the result type of SELECT nodes lowered from Select instructions with
aggregate return values. This fixes PR5754.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91145 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuilder.cpp
|
| 76ebe86e74ce108a129259fb52663edb0483da9d |
09-Dec-2009 |
Evan Cheng <evan.cheng@apple.com> |
Teach InferPtrAlignment to infer GV+cst alignment and use it to simplify x86 isl lowering code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@90925 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 7bd6478cd6a1264f884b46f3694af3a68a6fab0a |
09-Dec-2009 |
Evan Cheng <evan.cheng@apple.com> |
Teach InferPtrAlignment to infer GV+cst alignment and use it to simplify x86 isl lowering code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@90925 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 1a029cbee8f0bb7d1798aa474bdc46f017ba1871 |
09-Dec-2009 |
Evan Cheng <evan.cheng@apple.com> |
Move isConsecutiveLoad to SelectionDAG. It's not target dependent and it's primary used by selectdag passes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@90922 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
electionDAG.cpp
argetLowering.cpp
|
| 64fa4a9584113f63eccc1a650e7e0cc4ddbab3f6 |
09-Dec-2009 |
Evan Cheng <evan.cheng@apple.com> |
Move isConsecutiveLoad to SelectionDAG. It's not target dependent and it's primary used by selectdag passes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@90922 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
electionDAG.cpp
argetLowering.cpp
|
| a711e2664a880bc4b941d2690371cf811167bf95 |
09-Dec-2009 |
Evan Cheng <evan.cheng@apple.com> |
Infer alignment for non-fixed stack object.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@90919 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| de2ace1758286f8442a13532d9cd7d3c4cce47ef |
09-Dec-2009 |
Evan Cheng <evan.cheng@apple.com> |
Infer alignment for non-fixed stack object.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@90919 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| d3caa135e4a12b56cf586dc4d2a3d89d821b2f46 |
09-Dec-2009 |
Evan Cheng <evan.cheng@apple.com> |
Add const qualifier.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@90918 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 7ced2e0b304e76ab746c7d9a54ad8d4930445a38 |
09-Dec-2009 |
Evan Cheng <evan.cheng@apple.com> |
Add const qualifier.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@90918 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 684647dabc65cd039ddd73daf25112d1b6a98072 |
09-Dec-2009 |
Evan Cheng <evan.cheng@apple.com> |
Refactor InferAlignment out of DAGCombine.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@90917 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
electionDAG.cpp
|
| f2dc5c785dea1816cbc064b58b4b6ea23c4fd7d4 |
09-Dec-2009 |
Evan Cheng <evan.cheng@apple.com> |
Refactor InferAlignment out of DAGCombine.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@90917 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
electionDAG.cpp
|
| c15c59e7601f48d83728faa47d5bf676ad084383 |
07-Dec-2009 |
Anton Korobeynikov <asl@math.spbu.ru> |
Truncate the arguments of llvm.frameaddress / llvm.returnaddress intrinsics from i32 to platform's largest native type
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@90741 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeIntegerTypes.cpp
egalizeTypes.h
|
| 1c3436a67afcfaee5f972836ff1ffff2985adce1 |
07-Dec-2009 |
Anton Korobeynikov <asl@math.spbu.ru> |
Truncate the arguments of llvm.frameaddress / llvm.returnaddress intrinsics from i32 to platform's largest native type
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@90741 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeIntegerTypes.cpp
egalizeTypes.h
|
| a182b3f8ba53a7b042461fd206a0807697ae6e85 |
05-Dec-2009 |
Dan Gohman <gohman@apple.com> |
Remove old DBG_LABEL code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@90669 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 87bad707ed0fa98a986dc4621648f96da607e81b |
05-Dec-2009 |
Dan Gohman <gohman@apple.com> |
Remove old DBG_LABEL code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@90669 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 955748e8b311172018ee5ab478e84b1f663d6547 |
05-Dec-2009 |
Dan Gohman <gohman@apple.com> |
Remove the unused DisableLegalizeTypes option and related code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@90668 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
electionDAGISel.cpp
|
| 714efc63d4319b771d89a95aa7a42d400f03d8c9 |
05-Dec-2009 |
Dan Gohman <gohman@apple.com> |
Remove the unused DisableLegalizeTypes option and related code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@90668 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
electionDAGISel.cpp
|
| c5b50fbff2c7d0f0e5f225da1c2f3f58299b35da |
05-Dec-2009 |
Dan Gohman <gohman@apple.com> |
Don't blindly set the debug location for PHI node copies.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@90637 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 381ca5572e3c37824e1c5be0fa02f7b5bdd4a1ce |
05-Dec-2009 |
Dan Gohman <gohman@apple.com> |
Don't blindly set the debug location for PHI node copies.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@90637 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 581cdf90ade3d318dedde0c645d478ffede09e0d |
05-Dec-2009 |
Dan Gohman <gohman@apple.com> |
Make TargetSelectInstruction protected and called from FastISel.cpp
instead of SelectionDAGISel.cpp.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@90636 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
electionDAGISel.cpp
|
| 6e3ff375474c4fd78feb0b8463eb273a23cb4404 |
05-Dec-2009 |
Dan Gohman <gohman@apple.com> |
Make TargetSelectInstruction protected and called from FastISel.cpp
instead of SelectionDAGISel.cpp.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@90636 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
electionDAGISel.cpp
|
| 1ca1ac3967582cd4c02a12054b927adc1e111e52 |
05-Dec-2009 |
Dan Gohman <gohman@apple.com> |
The debug information for an LLVM Instruction applies to that Instruction
and that Instruction only. Implement this by setting the "current debug position"
back to Unknown after processing each instruction.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@90632 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 07f111e7b746747cade8371eeaf8c613058cb3a0 |
05-Dec-2009 |
Dan Gohman <gohman@apple.com> |
The debug information for an LLVM Instruction applies to that Instruction
and that Instruction only. Implement this by setting the "current debug position"
back to Unknown after processing each instruction.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@90632 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| c4c88cfd8ee8bff54a68d0642d671ea778782e6d |
04-Dec-2009 |
Duncan Sands <baldrick@free.fr> |
Add note about a subtle bug in this code. Does not effect the main
architectures that LLVM targets, because they don't use this code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@90564 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeIntegerTypes.cpp
|
| 36236b76a45be2a50315d1926c49bd3c63786b49 |
04-Dec-2009 |
Duncan Sands <baldrick@free.fr> |
Add note about a subtle bug in this code. Does not effect the main
architectures that LLVM targets, because they don't use this code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@90564 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeIntegerTypes.cpp
|
| b956e74994c0d0e41f2862e79d96ec699de782de |
03-Dec-2009 |
Duncan Sands <baldrick@free.fr> |
Fix ExpandShiftWithUnknownAmountBit, which was completely bogus.
Pointed out by Javier Martinez (who also provided a patch). Since
this logic is not used on (for example) x86, I guess nobody noticed.
Tested by generating SHL, SRL, SRA on various choices of i64 for all
possible shift amounts, and comparing with gcc. Since I did this on
x86-32, I had to force the use of ExpandShiftWithUnknownAmountBit.
What I'm saying here is that I don't have a testcase I can add to the
repository.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@90482 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeIntegerTypes.cpp
|
| 9993b88f06fd54c0be31d35f0970ada70a4c0439 |
03-Dec-2009 |
Duncan Sands <baldrick@free.fr> |
Fix ExpandShiftWithUnknownAmountBit, which was completely bogus.
Pointed out by Javier Martinez (who also provided a patch). Since
this logic is not used on (for example) x86, I guess nobody noticed.
Tested by generating SHL, SRL, SRA on various choices of i64 for all
possible shift amounts, and comparing with gcc. Since I did this on
x86-32, I had to force the use of ExpandShiftWithUnknownAmountBit.
What I'm saying here is that I don't have a testcase I can add to the
repository.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@90482 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeIntegerTypes.cpp
|
| ea5d5940df6894c2efc4c6ac76700922df97d8b2 |
03-Dec-2009 |
Nate Begeman <natebegeman@mac.com> |
Don't pull vector sext through both hands of a logical operation, since doing so prevents the fusion of vector sext and setcc into vsetcc.
Add a testcase for the above transformation.
Fix a bogus use of APInt noticed while tracking this down.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@90423 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 93e0ed31c54cea6bf3f1f20244bd56a4770b2780 |
03-Dec-2009 |
Nate Begeman <natebegeman@mac.com> |
Don't pull vector sext through both hands of a logical operation, since doing so prevents the fusion of vector sext and setcc into vsetcc.
Add a testcase for the above transformation.
Fix a bogus use of APInt noticed while tracking this down.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@90423 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 1ac6732b47ec36df1b6d990a62d21da02fddee2b |
03-Dec-2009 |
Jakob Stoklund Olesen <stoklund@2pi.dk> |
Don't call getValueType() on a null SDValue
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@90415 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 9f0d4e631d73659e8a94495b9a6d5ecbb6ad68a1 |
03-Dec-2009 |
Jakob Stoklund Olesen <stoklund@2pi.dk> |
Don't call getValueType() on a null SDValue
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@90415 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| b44b429549bc4c4f950d56d4f6fa0ba486856cc6 |
03-Dec-2009 |
Chris Lattner <sabre@nondot.org> |
improve portability to avoid conflicting with std::next in c++'0x.
Patch by Howard Hinnant!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@90365 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
egalizeDAG.cpp
egalizeVectorOps.cpp
electionDAGISel.cpp
|
| 7896c9f436a4eda5ec15e882a7505ba482a2fcd0 |
03-Dec-2009 |
Chris Lattner <sabre@nondot.org> |
improve portability to avoid conflicting with std::next in c++'0x.
Patch by Howard Hinnant!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@90365 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
egalizeDAG.cpp
egalizeVectorOps.cpp
electionDAGISel.cpp
|
| 69be7878c045ac40c9c847fe8d04f44e51663c04 |
01-Dec-2009 |
Dan Gohman <gohman@apple.com> |
Add edge source labels to SelectionDAG graphs, now that the graph printing
framework omits differentiated edge sources in the case where the labels
are empty strings.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@90254 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGPrinter.cpp
|
| 5b69fe767ca0786ecb50e703f2da8ea09de5da7c |
01-Dec-2009 |
Dan Gohman <gohman@apple.com> |
Add edge source labels to SelectionDAG graphs, now that the graph printing
framework omits differentiated edge sources in the case where the labels
are empty strings.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@90254 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGPrinter.cpp
|
| 8cb3747a8bb51ba03b38cf87e606e2bb33032d6e |
01-Dec-2009 |
Dan Gohman <gohman@apple.com> |
Minor cleanups.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@90253 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGPrinter.cpp
|
| 0baf2a302fe6e130756bf8b3da831547f0b87190 |
01-Dec-2009 |
Dan Gohman <gohman@apple.com> |
Minor cleanups.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@90253 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGPrinter.cpp
|
| 0bf95848e06bdfa04ec8a28cc22730ae139b9786 |
01-Dec-2009 |
Dan Gohman <gohman@apple.com> |
Trim an unnecessary #include.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@90252 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGPrinter.cpp
|
| 241c59578676845143ea32ee6a2e59f5f196b39f |
01-Dec-2009 |
Dan Gohman <gohman@apple.com> |
Trim an unnecessary #include.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@90252 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGPrinter.cpp
|
| bf4ea99c2887e55d18206e093bccdc43636c9b1b |
30-Nov-2009 |
Tobias Grosser <grosser@fim.uni-passau.de> |
Fix last DOTGraphTraits problems in CompilationGraph.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@90136 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGPrinter.cpp
|
| ab01069fcdb1fed655cf0ca851400a104e4b46d1 |
30-Nov-2009 |
Tobias Grosser <grosser@fim.uni-passau.de> |
Fix last DOTGraphTraits problems in CompilationGraph.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@90136 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGPrinter.cpp
|
| 810b18c4cc8b022f79f0dd886cc9092a3e4f6d2c |
30-Nov-2009 |
Tobias Grosser <grosser@fim.uni-passau.de> |
Remove ShortNames from getNodeLabel in DOTGraphTraits
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@90134 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGPrinter.cpp
|
| 56f4ef3232850e29c4635d0923910acce8887bd0 |
30-Nov-2009 |
Tobias Grosser <grosser@fim.uni-passau.de> |
Remove ShortNames from getNodeLabel in DOTGraphTraits
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@90134 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGPrinter.cpp
|
| e2c3aec2cf16ee6ea233d3ec13a83e71e21523b9 |
30-Nov-2009 |
Tobias Grosser <grosser@fim.uni-passau.de> |
Instantiate DefaultDOTGraphTraits
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@90133 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGPrinter.cpp
|
| a10d598602308549d87d2c5d9848f5a72fda2b43 |
30-Nov-2009 |
Tobias Grosser <grosser@fim.uni-passau.de> |
Instantiate DefaultDOTGraphTraits
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@90133 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGPrinter.cpp
|
| c707f3ff7cdb427155b7ca707a3efd2c8b34bcd1 |
30-Nov-2009 |
Mon P Wang <wangmp@apple.com> |
Added support to allow clients to custom widen. For X86, custom widen vectors for
divide/remainder since these operations can trap by unroll them and adding undefs
for the resulting vector.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@90108 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeTypes.cpp
egalizeTypes.h
egalizeVectorOps.cpp
egalizeVectorTypes.cpp
electionDAG.cpp
|
| cd6e725f21852e2f8cdf5fd0e65eb42c224776f8 |
30-Nov-2009 |
Mon P Wang <wangmp@apple.com> |
Added support to allow clients to custom widen. For X86, custom widen vectors for
divide/remainder since these operations can trap by unroll them and adding undefs
for the resulting vector.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@90108 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeTypes.cpp
egalizeTypes.h
egalizeVectorOps.cpp
egalizeVectorTypes.cpp
electionDAG.cpp
|
| c61b56c8b54d3abdf197464c00ea9b3613aa5889 |
24-Nov-2009 |
Dan Gohman <gohman@apple.com> |
Remove ISD::DEBUG_LOC and ISD::DBG_LABEL, which are no longer used.
Note that "hasDotLocAndDotFile"-style debug info was already broken;
people wanting this functionality should implement it in the
AsmPrinter/DwarfWriter code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89711 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
electionDAG.cpp
argetLowering.cpp
|
| 735afe14eea8049bf69210ce8a3512e391fc643f |
24-Nov-2009 |
Dan Gohman <gohman@apple.com> |
Remove ISD::DEBUG_LOC and ISD::DBG_LABEL, which are no longer used.
Note that "hasDotLocAndDotFile"-style debug info was already broken;
people wanting this functionality should implement it in the
AsmPrinter/DwarfWriter code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89711 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
electionDAG.cpp
argetLowering.cpp
|
| 7d3b3e40e16069bbc07c2acb20594cfffe406572 |
23-Nov-2009 |
Dan Gohman <gohman@apple.com> |
Move CopyCatchInfo into FunctionLoweringInfo.cpp too, for consistency.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89683 91177308-0d34-0410-b5e6-96231b3b80d8
unctionLoweringInfo.cpp
unctionLoweringInfo.h
electionDAGISel.cpp
|
| 5fca8b1c8dc0b9efb0a9822222a6505d1eea6bdd |
23-Nov-2009 |
Dan Gohman <gohman@apple.com> |
Move CopyCatchInfo into FunctionLoweringInfo.cpp too, for consistency.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89683 91177308-0d34-0410-b5e6-96231b3b80d8
unctionLoweringInfo.cpp
unctionLoweringInfo.h
electionDAGISel.cpp
|
| 7ec2051989d074e3ffef5fe74fed228d61b5f428 |
23-Nov-2009 |
Dan Gohman <gohman@apple.com> |
Rename SelectionDAGLowering to SelectionDAGBuilder, and rename
SelectionDAGBuild.cpp to SelectionDAGBuilder.cpp.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89681 91177308-0d34-0410-b5e6-96231b3b80d8
MakeLists.txt
astISel.cpp
electionDAGBuild.cpp
electionDAGBuild.h
electionDAGBuilder.cpp
electionDAGBuilder.h
electionDAGISel.cpp
|
| 2048b85c7c2c987874b9423e682ec8e60b60574b |
23-Nov-2009 |
Dan Gohman <gohman@apple.com> |
Rename SelectionDAGLowering to SelectionDAGBuilder, and rename
SelectionDAGBuild.cpp to SelectionDAGBuilder.cpp.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89681 91177308-0d34-0410-b5e6-96231b3b80d8
MakeLists.txt
astISel.cpp
electionDAGBuild.cpp
electionDAGBuild.h
electionDAGBuilder.cpp
electionDAGBuilder.h
electionDAGISel.cpp
|
| 78105759c1482cdea69c13d7bedcd1867c40efad |
23-Nov-2009 |
Dan Gohman <gohman@apple.com> |
Move RegsForValue to an anonymous namespace, since it is only used
in this file.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89675 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuild.cpp
|
| f9bd450a1074ad7b08e691b08388f0e39d5b06cc |
23-Nov-2009 |
Dan Gohman <gohman@apple.com> |
Move RegsForValue to an anonymous namespace, since it is only used
in this file.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89675 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuild.cpp
|
| c073abf312a796da1dd5c567aa92affe77f62e1b |
23-Nov-2009 |
Dan Gohman <gohman@apple.com> |
Move some more code out of SelectionDAGBuild.cpp and into
FunctionLoweringInfo.cpp.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89674 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
unctionLoweringInfo.cpp
unctionLoweringInfo.h
electionDAGBuild.cpp
electionDAGBuild.h
|
| 66336edf823f8d64d77dc5ab2bbefc21ef82f6ec |
23-Nov-2009 |
Dan Gohman <gohman@apple.com> |
Move some more code out of SelectionDAGBuild.cpp and into
FunctionLoweringInfo.cpp.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89674 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
unctionLoweringInfo.cpp
unctionLoweringInfo.h
electionDAGBuild.cpp
electionDAGBuild.h
|
| ead611c1b544ed84281bfb255c2677ad58d63494 |
23-Nov-2009 |
Ted Kremenek <kremenek@apple.com> |
Update CMake file.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89671 91177308-0d34-0410-b5e6-96231b3b80d8
MakeLists.txt
|
| 9977ed0290b7ca62c05c7ed087ab5b841636bd89 |
23-Nov-2009 |
Ted Kremenek <kremenek@apple.com> |
Update CMake file.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89671 91177308-0d34-0410-b5e6-96231b3b80d8
MakeLists.txt
|
| 39a0cdff39ccce6633deb6ca4427a96796fef1b3 |
23-Nov-2009 |
Dan Gohman <gohman@apple.com> |
Move the FunctionLoweringInfo class and some related utility functions out
of SelectionDAGBuild.h/cpp into its own files, to help separate
general lowering logic from SelectionDAG-specific lowering logic.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89667 91177308-0d34-0410-b5e6-96231b3b80d8
unctionLoweringInfo.cpp
unctionLoweringInfo.h
electionDAGBuild.cpp
electionDAGBuild.h
electionDAGISel.cpp
|
| 6277eb2bb997a5da0808a8a5a57f18fd9faaf336 |
23-Nov-2009 |
Dan Gohman <gohman@apple.com> |
Move the FunctionLoweringInfo class and some related utility functions out
of SelectionDAGBuild.h/cpp into its own files, to help separate
general lowering logic from SelectionDAG-specific lowering logic.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89667 91177308-0d34-0410-b5e6-96231b3b80d8
unctionLoweringInfo.cpp
unctionLoweringInfo.h
electionDAGBuild.cpp
electionDAGBuild.h
electionDAGISel.cpp
|
| 1432b62b04c33ad89f4249ef73f2e73740db18c7 |
21-Nov-2009 |
Devang Patel <dpatel@apple.com> |
We are not using DBG_STOPPOINT anymore.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89536 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
electionDAG.cpp
|
| bef8888a9197655512f156e50b10799da7240252 |
21-Nov-2009 |
Devang Patel <dpatel@apple.com> |
We are not using DBG_STOPPOINT anymore.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89536 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
electionDAG.cpp
|
| fa1ce6a3b1b8d9f6ee587449741239c59f2b107e |
21-Nov-2009 |
Dale Johannesen <dalej@apple.com> |
When generating a vector the really slow way, via loads
and stores, handle the case where the element size is not
a valid target type correctly (PPC).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89521 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 5b8bce11d60694a651965cf019b9cb5d84ed3b90 |
21-Nov-2009 |
Dale Johannesen <dalej@apple.com> |
When generating a vector the really slow way, via loads
and stores, handle the case where the element size is not
a valid target type correctly (PPC).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89521 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 885793baaed110c848ccfdfb460bbc91774d8981 |
21-Nov-2009 |
Dan Gohman <gohman@apple.com> |
Target-independent support for TargetFlags on BlockAddress operands,
and support for blockaddresses in x86-32 PIC mode.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89506 91177308-0d34-0410-b5e6-96231b3b80d8
nstrEmitter.cpp
electionDAG.cpp
electionDAGBuild.cpp
|
| 29cbade25aa094ca9a149a96a8614cf6f3247480 |
21-Nov-2009 |
Dan Gohman <gohman@apple.com> |
Target-independent support for TargetFlags on BlockAddress operands,
and support for blockaddresses in x86-32 PIC mode.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89506 91177308-0d34-0410-b5e6-96231b3b80d8
nstrEmitter.cpp
electionDAG.cpp
electionDAGBuild.cpp
|
| 6888fe797e7b7ee3cd9028cbc8d54aa67a878147 |
20-Nov-2009 |
Duncan Sands <baldrick@free.fr> |
Fix PR5558, which was caused by a wrong fix for PR3393 (see commit 63048),
which was an expensive checks failure due to a bug in the checking. This
patch in essence reverts the original fix for PR3393, and refixes it by a
tweak to the way expensive checking is done.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89454 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeTypes.cpp
egalizeTypes.h
|
| c088ae8b84bfcdefb57efafb022430312bddf638 |
20-Nov-2009 |
Duncan Sands <baldrick@free.fr> |
Fix PR5558, which was caused by a wrong fix for PR3393 (see commit 63048),
which was an expensive checks failure due to a bug in the checking. This
patch in essence reverts the original fix for PR3393, and refixes it by a
tweak to the way expensive checking is done.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89454 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeTypes.cpp
egalizeTypes.h
|
| 40b0a2e6bb0787bc7c36a8fc79910a33e1a58965 |
20-Nov-2009 |
Dan Gohman <gohman@apple.com> |
Fix fast-isel to avoid selecting the return instruction if a
tail call has been encountered.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89444 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| b4afb137efbc38462707bab9f5e8bc5c2d07cd2d |
20-Nov-2009 |
Dan Gohman <gohman@apple.com> |
Fix fast-isel to avoid selecting the return instruction if a
tail call has been encountered.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89444 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 7f9c46ffbb2f96175858d78814fa52a3416ee81e |
17-Nov-2009 |
Dan Gohman <gohman@apple.com> |
Remove the optimizations that convert BRCOND and BR_CC into
unconditional branches or fallthroghes. Instcombine/SimplifyCFG
should be simplifying branches with known conditions.
This fixes some problems caused by these transformations not
updating the MachineBasicBlock CFG.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89017 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| e0f06c78d3ee56cea4e7195c616aafc200cb0ba2 |
17-Nov-2009 |
Dan Gohman <gohman@apple.com> |
Remove the optimizations that convert BRCOND and BR_CC into
unconditional branches or fallthroghes. Instcombine/SimplifyCFG
should be simplifying branches with known conditions.
This fixes some problems caused by these transformations not
updating the MachineBasicBlock CFG.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89017 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 57d7aeffb1f29269aefed5240d6637436676184b |
16-Nov-2009 |
Dan Gohman <gohman@apple.com> |
Fix a typo in a comment.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@88953 91177308-0d34-0410-b5e6-96231b3b80d8
nstrEmitter.cpp
nstrEmitter.h
|
| 552c0dff3408424404d1e9639a5710207b862964 |
16-Nov-2009 |
Dan Gohman <gohman@apple.com> |
Fix a typo in a comment.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@88953 91177308-0d34-0410-b5e6-96231b3b80d8
nstrEmitter.cpp
nstrEmitter.h
|
| c0c961121927e428d6279512dd45c634aafd1593 |
14-Nov-2009 |
Dan Gohman <gohman@apple.com> |
Enable the tail call optimization when the caller returns undef.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@88737 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuild.cpp
|
| ed9bab3b4da0a5c5581fdd477c19c02420dd2fc7 |
14-Nov-2009 |
Dan Gohman <gohman@apple.com> |
Enable the tail call optimization when the caller returns undef.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@88737 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuild.cpp
|
| 3510e118fbdf09887c4b804f1eba0cb62a2d3493 |
13-Nov-2009 |
Dan Gohman <gohman@apple.com> |
Don't let a noalias difference disrupt the tailcall optimization.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@88672 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuild.cpp
|
| 01205a80f5c789234029813f8c09488891c0b23e |
13-Nov-2009 |
Dan Gohman <gohman@apple.com> |
Don't let a noalias difference disrupt the tailcall optimization.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@88672 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuild.cpp
|
| 48fd1e4422178b0f4989d6c06fc8abfb5b9fd12d |
13-Nov-2009 |
Dale Johannesen <dalej@apple.com> |
Adjust isConstantSplat to allow for big-endian targets.
PPC is such a target; make it work.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@87060 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 1e608819aa26c06b1552521469f2211339e3bfe0 |
13-Nov-2009 |
Dale Johannesen <dalej@apple.com> |
Adjust isConstantSplat to allow for big-endian targets.
PPC is such a target; make it work.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@87060 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 6424ab9738972c0a9d5f588c59645f85782cf68c |
12-Nov-2009 |
David Greene <greened@obbligato.org> |
Add a bool flag to StackObjects telling whether they reference spill
slots. The AsmPrinter will use this information to determine whether to
print a spill/reload comment.
Remove default argument values. It's too easy to pass a wrong argument
value when multiple arguments have default values. Make everything
explicit to trap bugs early.
Update all targets to adhere to the new interfaces..
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@87022 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
electionDAGBuild.cpp
|
| 3f2bf85d14759cc4b28a86805f566ac805a54d00 |
12-Nov-2009 |
David Greene <greened@obbligato.org> |
Add a bool flag to StackObjects telling whether they reference spill
slots. The AsmPrinter will use this information to determine whether to
print a spill/reload comment.
Remove default argument values. It's too easy to pass a wrong argument
value when multiple arguments have default values. Make everything
explicit to trap bugs early.
Update all targets to adhere to the new interfaces..
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@87022 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
electionDAGBuild.cpp
|
| ea862b03de56f3746e10b93b4aaea3f5c781fd21 |
12-Nov-2009 |
Benjamin Kramer <benny.kra@googlemail.com> |
Add compare_lower and equals_lower methods to StringRef. Switch all users of
StringsEqualNoCase (from StringExtras.h) to it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@87020 91177308-0d34-0410-b5e6-96231b3b80d8
argetLowering.cpp
|
| 05872ea804cdc9534960b30d28a391928c61481a |
12-Nov-2009 |
Benjamin Kramer <benny.kra@googlemail.com> |
Add compare_lower and equals_lower methods to StringRef. Switch all users of
StringsEqualNoCase (from StringExtras.h) to it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@87020 91177308-0d34-0410-b5e6-96231b3b80d8
argetLowering.cpp
|
| 4a7ef8dcbe4c986ba7f4267b56d4779567bc91ff |
12-Nov-2009 |
Devang Patel <dpatel@apple.com> |
"Attach debug info with llvm instructions" mode was enabled a month ago. Now make it permanent and remove old way of inserting intrinsics to encode debug info for line number and scopes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@87014 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
electionDAGBuild.cpp
|
| 70d75ca3107ce05bc30ad3511aa669b9fab5eb90 |
12-Nov-2009 |
Devang Patel <dpatel@apple.com> |
"Attach debug info with llvm instructions" mode was enabled a month ago. Now make it permanent and remove old way of inserting intrinsics to encode debug info for line number and scopes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@87014 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
electionDAGBuild.cpp
|
| cec9c63631255076665e2adec25fc785e6945e34 |
11-Nov-2009 |
Kenneth Uildriks <kennethuil@gmail.com> |
x86 users can now return arbitrary sized structs. Structs too large to fit in return registers will be returned through a hidden sret parameter introduced during SelectionDAG construction.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86876 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuild.cpp
electionDAGBuild.h
|
| c158dde21944f2dc016d8d34b46e301d61243ca2 |
11-Nov-2009 |
Kenneth Uildriks <kennethuil@gmail.com> |
x86 users can now return arbitrary sized structs. Structs too large to fit in return registers will be returned through a hidden sret parameter introduced during SelectionDAG construction.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86876 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuild.cpp
electionDAGBuild.h
|
| 8b8c35b2d8a380c7ce06cce6618bb5875f5c5294 |
11-Nov-2009 |
Dale Johannesen <dalej@apple.com> |
Emit correct code when making a ConstantPool entry for a vector
constant whose component type is not a legal type for the target.
(If the target ConstantPool cannot handle this type either, it has
an opportunity to merge elements. In practice any target with
8-bit bytes must support i8 *as data*). 7320806 (partial).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86751 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 9a645cd9d4c0e7d25e4b8836ed31deb5881c8101 |
11-Nov-2009 |
Dale Johannesen <dalej@apple.com> |
Emit correct code when making a ConstantPool entry for a vector
constant whose component type is not a legal type for the target.
(If the target ConstantPool cannot handle this type either, it has
an opportunity to merge elements. In practice any target with
8-bit bytes must support i8 *as data*). 7320806 (partial).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86751 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 90a0fe3bd6043f897285b967b196f6ab26dfdcae |
11-Nov-2009 |
Devang Patel <dpatel@apple.com> |
Implement support to debug inlined functions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86748 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
electionDAGBuild.cpp
electionDAGISel.cpp
|
| 53bb5c95afe4ff2627cac513221af2e4e7c5d2e3 |
11-Nov-2009 |
Devang Patel <dpatel@apple.com> |
Implement support to debug inlined functions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86748 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
electionDAGBuild.cpp
electionDAGISel.cpp
|
| bb0ae064da8981a29f17d289d341d6fa981e2976 |
10-Nov-2009 |
Duncan Sands <baldrick@free.fr> |
Codegen support for the llvm.invariant/lifetime.start/end intrinsics:
just throw them away.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86678 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuild.cpp
|
| f07c9497b2ad030457c9314db5bfb8b0b204a0da |
10-Nov-2009 |
Duncan Sands <baldrick@free.fr> |
Codegen support for the llvm.invariant/lifetime.start/end intrinsics:
just throw them away.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86678 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuild.cpp
|
| de65e53debdf767545ba31e5bb8f2fd7095f9e8f |
09-Nov-2009 |
Dan Gohman <gohman@apple.com> |
Remove an unneeded #include.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86601 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| ba565bfc2117b401ecd55631fb3e4e6428a62a5c |
09-Nov-2009 |
Dan Gohman <gohman@apple.com> |
Remove an unneeded #include.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86601 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 0dd119b2f1709f252b0ba64f6966bc2077f14ac8 |
09-Nov-2009 |
Mike Stump <mrs@apple.com> |
Fix for 64-bit builds.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86600 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuild.cpp
|
| 70e5e6834cb5065186f82c3a459681f3f22cd1e0 |
09-Nov-2009 |
Mike Stump <mrs@apple.com> |
Fix for 64-bit builds.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86600 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuild.cpp
|
| 48ac7b971f7e6cbd60c4d1c70663cb0d328cacf2 |
09-Nov-2009 |
Evan Cheng <evan.cheng@apple.com> |
Hide a couple of options.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86522 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| df8ed024735b651d6e0082262d4e7a00b2fa4d32 |
09-Nov-2009 |
Evan Cheng <evan.cheng@apple.com> |
Hide a couple of options.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86522 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 0e459b4d02c73518bf209236d7e406259e56408e |
07-Nov-2009 |
Anton Korobeynikov <asl@math.spbu.ru> |
Add 8 bit libcalls and make use of them for msp430
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86384 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
argetLowering.cpp
|
| 8983da729aa1ca99a11a3b98ae6280dfcdbadb39 |
07-Nov-2009 |
Anton Korobeynikov <asl@math.spbu.ru> |
Add 8 bit libcalls and make use of them for msp430
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86384 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
argetLowering.cpp
|
| 87c965591afc72dca6b805427a322cd5adf40d11 |
07-Nov-2009 |
Chris Lattner <sabre@nondot.org> |
Fix PR5421 by APInt'izing switch lowering.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86354 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuild.cpp
electionDAGBuild.h
|
| e880efe446f731b73558542c12a6f980b8baa765 |
07-Nov-2009 |
Chris Lattner <sabre@nondot.org> |
Fix PR5421 by APInt'izing switch lowering.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86354 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuild.cpp
electionDAGBuild.h
|
| e6f60f14e1adc950bfd1529325db1acedf9cf97e |
07-Nov-2009 |
Mon P Wang <wangmp@apple.com> |
Fix memoizing of CvtRndSatSDNode
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86340 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| bdea34807aadf7a27ebaf1b7c5b7c199afda3e91 |
07-Nov-2009 |
Mon P Wang <wangmp@apple.com> |
Fix memoizing of CvtRndSatSDNode
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86340 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 87d0426c569d606dca1d32dc23cae9dee245fc76 |
07-Nov-2009 |
Kenneth Uildriks <kennethuil@gmail.com> |
Add code to check at SelectionDAGISel::LowerArguments time to see if return values can be lowered to registers. Coming soon, code to perform sret-demotion if return values cannot be lowered to registers
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86324 91177308-0d34-0410-b5e6-96231b3b80d8
allingConvLower.cpp
electionDAGBuild.cpp
|
| b4997aeab74934ffa6fc0409afc4d8704245e372 |
07-Nov-2009 |
Kenneth Uildriks <kennethuil@gmail.com> |
Add code to check at SelectionDAGISel::LowerArguments time to see if return values can be lowered to registers. Coming soon, code to perform sret-demotion if return values cannot be lowered to registers
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86324 91177308-0d34-0410-b5e6-96231b3b80d8
allingConvLower.cpp
electionDAGBuild.cpp
|
| 63e2b7e7ea21976b0922a76e4cd10ebf3a2591ea |
05-Nov-2009 |
Dan Gohman <gohman@apple.com> |
Avoid printing a redundant space in SDNode->dump().
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86151 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| c5600c89d61e25f0662847a81af8afbf264caee4 |
05-Nov-2009 |
Dan Gohman <gohman@apple.com> |
Avoid printing a redundant space in SDNode->dump().
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86151 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 57b31659358cd7ae9cd045ec2ce3019b5adc234a |
31-Oct-2009 |
Dan Gohman <gohman@apple.com> |
Make -print-machineinstrs more readable.
- Be consistent when referring to MachineBasicBlocks: BB#0.
- Be consistent when referring to virtual registers: %reg1024.
- Be consistent when referring to unknown physical registers: %physreg10.
- Be consistent when referring to known physical registers: %RAX
- Be consistent when referring to register 0: %reg0
- Be consistent when printing alignments: align=16
- Print jump table contents.
- Don't print host addresses, in general.
- and various other cleanups.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85682 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 0ba90f3e34b826b039bdfece1415ef032c4ad3f5 |
31-Oct-2009 |
Dan Gohman <gohman@apple.com> |
Make -print-machineinstrs more readable.
- Be consistent when referring to MachineBasicBlocks: BB#0.
- Be consistent when referring to virtual registers: %reg1024.
- Be consistent when referring to unknown physical registers: %physreg10.
- Be consistent when referring to known physical registers: %RAX
- Be consistent when referring to register 0: %reg0
- Be consistent when printing alignments: align=16
- Print jump table contents.
- Don't print host addresses, in general.
- and various other cleanups.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85682 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 9c98ce3d0b7bca679abebf6c6e2e9f6de6bbb02e |
31-Oct-2009 |
Dan Gohman <gohman@apple.com> |
When discarding SrcValue information, discard all of it so that code
that uses this information knows to behave conservatively.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85654 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 75832d7d4f23e5151affd167662f0b2c80d0e90d |
31-Oct-2009 |
Dan Gohman <gohman@apple.com> |
When discarding SrcValue information, discard all of it so that code
that uses this information knows to behave conservatively.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85654 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 6de661ad137c60e288bd4626f5817e39fc695e51 |
31-Oct-2009 |
Eric Christopher <echristo@apple.com> |
Fix warning with gcc-4.0 and signed/unsigned.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85648 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuild.cpp
|
| cdfa666c309ddb3dc655f805fb3d47205c4182d0 |
31-Oct-2009 |
Eric Christopher <echristo@apple.com> |
Fix warning with gcc-4.0 and signed/unsigned.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85648 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuild.cpp
|
| c00047af5603cf63b34c76c740d4a29fd22ff60a |
31-Oct-2009 |
Dan Gohman <gohman@apple.com> |
Don't mark registers dead here when processing nodes with MVT::Flag
results. This works around a problem affecting targets which rely on
MVT::Flag to handle physical register defs.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85638 91177308-0d34-0410-b5e6-96231b3b80d8
nstrEmitter.cpp
|
| 4cddfd9b6f2b770c0dce66792b79ac9d18bb0ca3 |
31-Oct-2009 |
Dan Gohman <gohman@apple.com> |
Don't mark registers dead here when processing nodes with MVT::Flag
results. This works around a problem affecting targets which rely on
MVT::Flag to handle physical register defs.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85638 91177308-0d34-0410-b5e6-96231b3b80d8
nstrEmitter.cpp
|
| 9105751c7ce64082e5769142e14b0c65cd06bb0a |
30-Oct-2009 |
Dan Gohman <gohman@apple.com> |
Initial target-independent CodeGen support for BlockAddresses.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85556 91177308-0d34-0410-b5e6-96231b3b80d8
nstrEmitter.cpp
cheduleDAGSDNodes.h
electionDAG.cpp
electionDAGBuild.cpp
|
| 8c2b52552c90f39e4b2fed43e309e599e742b6ac |
30-Oct-2009 |
Dan Gohman <gohman@apple.com> |
Initial target-independent CodeGen support for BlockAddresses.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85556 91177308-0d34-0410-b5e6-96231b3b80d8
nstrEmitter.cpp
cheduleDAGSDNodes.h
electionDAG.cpp
electionDAGBuild.cpp
|
| 438d4105eeb47c5bc1c5e5464b47a3df46ff2bbd |
30-Oct-2009 |
Dan Gohman <gohman@apple.com> |
Remove some unnecessary spaces in debug output.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85536 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 6c1de1830b233e61f6f122923ba5bcf3c81dc288 |
30-Oct-2009 |
Dan Gohman <gohman@apple.com> |
Remove some unnecessary spaces in debug output.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85536 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| b65e3acb4a07cbc809bc22fbc67675c7233d0f79 |
29-Oct-2009 |
Dan Gohman <gohman@apple.com> |
Move some code from being emitted as boilerplate duplicated in every
*ISelDAGToDAG.cpp to being regular code in SelectionDAGISel.cpp.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85530 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| e1f188fe27050ec812e5b64cc996e6bb93300392 |
29-Oct-2009 |
Dan Gohman <gohman@apple.com> |
Move some code from being emitted as boilerplate duplicated in every
*ISelDAGToDAG.cpp to being regular code in SelectionDAGISel.cpp.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85530 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 30afe01e7ef78e1d2c01c924161ebe53bf02a3de |
29-Oct-2009 |
Dan Gohman <gohman@apple.com> |
Rename usesCustomDAGSchedInserter to usesCustomInserter, and update a
bunch of associated comments, because it doesn't have anything to do
with DAGs or scheduling. This is another step in decoupling MachineInstr
emitting from scheduling.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85517 91177308-0d34-0410-b5e6-96231b3b80d8
nstrEmitter.cpp
electionDAGISel.cpp
|
| 533297b58da8c74bec65551e1aface9801fc2259 |
29-Oct-2009 |
Dan Gohman <gohman@apple.com> |
Rename usesCustomDAGSchedInserter to usesCustomInserter, and update a
bunch of associated comments, because it doesn't have anything to do
with DAGs or scheduling. This is another step in decoupling MachineInstr
emitting from scheduling.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85517 91177308-0d34-0410-b5e6-96231b3b80d8
nstrEmitter.cpp
electionDAGISel.cpp
|
| 220daf6b5c39b425ef06192ce461538f29efabd6 |
28-Oct-2009 |
Eric Christopher <echristo@apple.com> |
Make sure we return the right sized type here.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85436 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuild.cpp
|
| 7e5d2ff20fb4ca86b27f28fc5fb9d589bc0752fd |
28-Oct-2009 |
Eric Christopher <echristo@apple.com> |
Make sure we return the right sized type here.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85436 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuild.cpp
|
| 927dcecba16c04d82b567cbe00479256465bd5c2 |
28-Oct-2009 |
Dan Gohman <gohman@apple.com> |
Don't call SDNode::isPredecessorOf when it isn't necessary. If the load's
chains have no users, they can't be predecessors of the condition.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85394 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 1507cd03a64679f6999f51218a3a0180d51ab673 |
28-Oct-2009 |
Dan Gohman <gohman@apple.com> |
Don't call SDNode::isPredecessorOf when it isn't necessary. If the load's
chains have no users, they can't be predecessors of the condition.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85394 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| ed7cc32565a72f3a40d03cfc7e313515bca7b9e2 |
28-Oct-2009 |
Dan Gohman <gohman@apple.com> |
Rewrite SelectionDAG::isPredecessorOf to be iterative instead of
recursive to avoid consuming extraordinary amounts of stack space
when processing tall graphs.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85369 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 6688d617978b338f96d27c6d73a396fbd2bf8e9c |
28-Oct-2009 |
Dan Gohman <gohman@apple.com> |
Rewrite SelectionDAG::isPredecessorOf to be iterative instead of
recursive to avoid consuming extraordinary amounts of stack space
when processing tall graphs.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85369 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| a0e6778c5f1e124bc15fceeca0c875614a082c79 |
28-Oct-2009 |
Evan Cheng <evan.cheng@apple.com> |
Add a second ValueType argument to isFPImmLegal.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85361 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| a1eaa3c52b75d4fe2bcd4f7c52e56c405ee91d3c |
28-Oct-2009 |
Evan Cheng <evan.cheng@apple.com> |
Add a second ValueType argument to isFPImmLegal.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85361 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 48c10d1e1fdd6f7d2f1ce5a9e2380b281dbe3006 |
28-Oct-2009 |
Dan Gohman <gohman@apple.com> |
Mark dead physregdefs dead immediately. This helps MachineSink and
MachineLICM and other things which run before LiveVariables is run.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85360 91177308-0d34-0410-b5e6-96231b3b80d8
nstrEmitter.cpp
|
| a104d1eab279a39ebf0481269426c2e2de8f5587 |
28-Oct-2009 |
Dan Gohman <gohman@apple.com> |
Mark dead physregdefs dead immediately. This helps MachineSink and
MachineLICM and other things which run before LiveVariables is run.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85360 91177308-0d34-0410-b5e6-96231b3b80d8
nstrEmitter.cpp
|
| 4c3800f0172e2fdc0b3b2e78dbaf89b150f4e04f |
28-Oct-2009 |
Chris Lattner <sabre@nondot.org> |
rename indbr -> indirectbr to appease the residents of #llvm.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85351 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuild.cpp
electionDAGBuild.h
|
| ab21db79ef1d2530880ad11f21f0b87ffca02dd4 |
28-Oct-2009 |
Chris Lattner <sabre@nondot.org> |
rename indbr -> indirectbr to appease the residents of #llvm.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85351 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuild.cpp
electionDAGBuild.h
|
| b34bcfc17c7c84a3b9be34a99b40f7596c2174cd |
27-Oct-2009 |
Dan Gohman <gohman@apple.com> |
Update the MachineBasicBlock CFG for an indirect branch.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85325 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuild.cpp
|
| eef55dc3fdebf915128e5d3848f372c7db6c38e8 |
27-Oct-2009 |
Dan Gohman <gohman@apple.com> |
Update the MachineBasicBlock CFG for an indirect branch.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85325 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuild.cpp
|
| 2b87f2ae510bb5298482aba49c63c49840b0db7d |
27-Oct-2009 |
Dan Gohman <gohman@apple.com> |
Add CodeGen support for indirect branches.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85323 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuild.cpp
|
| 64825153a219b40bcdb79861fb6ac4fd8eadd616 |
27-Oct-2009 |
Dan Gohman <gohman@apple.com> |
Add CodeGen support for indirect branches.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85323 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuild.cpp
|
| dab00f86c61d0de362877671ffb2c835e59b84a1 |
27-Oct-2009 |
Chris Lattner <sabre@nondot.org> |
don't use stdio
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85296 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuild.cpp
|
| 98eef869aeee2edcba7a212060b6002339abffbf |
27-Oct-2009 |
Chris Lattner <sabre@nondot.org> |
don't use stdio
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85296 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuild.cpp
|
| 6337b551d01bc8239f0bd6440ac82bce2b313f4c |
27-Oct-2009 |
Evan Cheng <evan.cheng@apple.com> |
Do away with addLegalFPImmediate. Add a target hook isFPImmLegal which returns true if the fp immediate can be natively codegened by target.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85281 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
argetLowering.cpp
|
| eb2f969a4ddfb0bc8fdcb5bce3b52e53abff321d |
27-Oct-2009 |
Evan Cheng <evan.cheng@apple.com> |
Do away with addLegalFPImmediate. Add a target hook isFPImmLegal which returns true if the fp immediate can be natively codegened by target.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85281 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
argetLowering.cpp
|
| e0787286429c486909bd3b01b5dfedacbc2d7394 |
27-Oct-2009 |
Chris Lattner <sabre@nondot.org> |
add enough support for indirect branch for the feature test to pass
(assembler,asmprinter, bc reader+writer) and document it. Codegen
currently aborts on it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85274 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuild.cpp
electionDAGBuild.h
|
| f9be95f867745b6754b2402b9b72f9eaeabd637f |
27-Oct-2009 |
Chris Lattner <sabre@nondot.org> |
add enough support for indirect branch for the feature test to pass
(assembler,asmprinter, bc reader+writer) and document it. Codegen
currently aborts on it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85274 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuild.cpp
electionDAGBuild.h
|
| 6d15db7cb3b93b99d16ff5d7c0b87ceb0bf02f21 |
27-Oct-2009 |
Chris Lattner <sabre@nondot.org> |
pseudosourcevalue is also still using getGlobalContext(), so it isn't
thread safe either.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85253 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 75c478a96a542dc386152e00518441e63d22058d |
27-Oct-2009 |
Chris Lattner <sabre@nondot.org> |
pseudosourcevalue is also still using getGlobalContext(), so it isn't
thread safe either.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85253 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 37115cc04ea3dc2516d34a1b0f8dc262652fbb63 |
27-Oct-2009 |
Eric Christopher <echristo@apple.com> |
Add objectsize intrinsic and hook it up through codegen. Doesn't
do anything than return "I don't know" at the moment.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85189 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuild.cpp
|
| 7b5e61707a128a222e5e7ab20eb8154ca81001cb |
27-Oct-2009 |
Eric Christopher <echristo@apple.com> |
Add objectsize intrinsic and hook it up through codegen. Doesn't
do anything than return "I don't know" at the moment.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85189 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuild.cpp
|
| f9a7a33126ed4def13851a4d77a442db55ffe307 |
27-Oct-2009 |
Victor Hernandez <vhernandez@apple.com> |
Remove FreeInst.
Remove LowerAllocations pass.
Update some more passes to treate free calls just like they were treating FreeInst.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85176 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuild.cpp
electionDAGBuild.h
|
| 046e78ce55a7c3d82b7b6758d2d77f2d99f970bf |
27-Oct-2009 |
Victor Hernandez <vhernandez@apple.com> |
Remove FreeInst.
Remove LowerAllocations pass.
Update some more passes to treate free calls just like they were treating FreeInst.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85176 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuild.cpp
electionDAGBuild.h
|
| 5a44ef9fd5f7c3964ad79b94778261175dea5c33 |
25-Oct-2009 |
Nick Lewycky <nicholas@mxc.ca> |
Remove includes of Support/Compiler.h that are no longer needed after the
VISIBILITY_HIDDEN removal.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85043 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
egalizeDAG.cpp
cheduleDAGFast.cpp
cheduleDAGList.cpp
cheduleDAGRRList.cpp
|
| f5a86f45e75ec744c203270ffa03659eb0a220c1 |
25-Oct-2009 |
Nick Lewycky <nicholas@mxc.ca> |
Remove includes of Support/Compiler.h that are no longer needed after the
VISIBILITY_HIDDEN removal.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85043 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
egalizeDAG.cpp
cheduleDAGFast.cpp
cheduleDAGList.cpp
cheduleDAGRRList.cpp
|
| 492d06efde44a4e38a6ed321ada4af5a75494df6 |
25-Oct-2009 |
Nick Lewycky <nicholas@mxc.ca> |
Remove VISIBILITY_HIDDEN from class/struct found inside anonymous namespaces.
Chris claims we should never have visibility_hidden inside any .cpp file but
that's still not true even after this commit.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85042 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
egalizeDAG.cpp
egalizeTypes.cpp
cheduleDAGFast.cpp
cheduleDAGList.cpp
cheduleDAGRRList.cpp
|
| 6726b6d75a8b679068a58cb954ba97cf9d1690ba |
25-Oct-2009 |
Nick Lewycky <nicholas@mxc.ca> |
Remove VISIBILITY_HIDDEN from class/struct found inside anonymous namespaces.
Chris claims we should never have visibility_hidden inside any .cpp file but
that's still not true even after this commit.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85042 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
egalizeDAG.cpp
egalizeTypes.cpp
cheduleDAGFast.cpp
cheduleDAGList.cpp
cheduleDAGRRList.cpp
|
| 6530ae50de6d78e90f499b67ee9db01da894ff4a |
23-Oct-2009 |
Dan Gohman <gohman@apple.com> |
APInt-ify the gep scaling code, so that it correctly handles the case where
the scale overflows pointer-sized arithmetic. This fixes PR5281.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84954 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuild.cpp
|
| 7abbd04e90489c087bfae03ad25c3a99aafbaded |
23-Oct-2009 |
Dan Gohman <gohman@apple.com> |
APInt-ify the gep scaling code, so that it correctly handles the case where
the scale overflows pointer-sized arithmetic. This fixes PR5281.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84954 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuild.cpp
|
| fcfa3114e0922e6a127cd9e63dce10d98fb77757 |
22-Oct-2009 |
Anton Korobeynikov <asl@math.spbu.ru> |
Fix null pointer dereference.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84806 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 443b2153e3c1c039f5fbf229bd2df2da179f3875 |
22-Oct-2009 |
Anton Korobeynikov <asl@math.spbu.ru> |
Fix null pointer dereference.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84806 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 672de0aa03c5943cfdd1e49206326d1955c8b3a1 |
20-Oct-2009 |
Anton Korobeynikov <asl@math.spbu.ru> |
Fix invalid for vector types fneg(bitconvert(x)) => bitconvert(x ^ sign)
transform.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84683 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 2bcf60a9cc435658ca8a02ee692af225599cf9e4 |
20-Oct-2009 |
Anton Korobeynikov <asl@math.spbu.ru> |
Fix invalid for vector types fneg(bitconvert(x)) => bitconvert(x ^ sign)
transform.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84683 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 174e2cf99df2011a0d56e96dcdb32c1ccaf4f464 |
18-Oct-2009 |
Evan Cheng <evan.cheng@apple.com> |
-Revert parts of 84326 and 84411. Distinquishing between fixed and non-fixed
stack slots and giving them different PseudoSourceValue's did not fix the
problem of post-alloc scheduling miscompiling llvm itself.
- Apply Dan's conservative workaround by assuming any non fixed stack slots can
alias other memory locations. This means a load from spill slot #1 cannot
move above a store of spill slot #2.
- Enable post-alloc scheduling for x86 at optimization leverl Default and above.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84424 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
egalizeTypesGeneric.cpp
egalizeVectorTypes.cpp
electionDAG.cpp
electionDAGBuild.cpp
|
| ff89dcb06fbd103373436e2d0ae85f252fae2254 |
18-Oct-2009 |
Evan Cheng <evan.cheng@apple.com> |
-Revert parts of 84326 and 84411. Distinquishing between fixed and non-fixed
stack slots and giving them different PseudoSourceValue's did not fix the
problem of post-alloc scheduling miscompiling llvm itself.
- Apply Dan's conservative workaround by assuming any non fixed stack slots can
alias other memory locations. This means a load from spill slot #1 cannot
move above a store of spill slot #2.
- Enable post-alloc scheduling for x86 at optimization leverl Default and above.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84424 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
egalizeTypesGeneric.cpp
egalizeVectorTypes.cpp
electionDAG.cpp
electionDAGBuild.cpp
|
| 3820341c59acd9a1d0a664a2ce86745015d8fccb |
18-Oct-2009 |
Evan Cheng <evan.cheng@apple.com> |
Only fixed stack objects and spill slots should be get FixedStack PseudoSourceValue.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84411 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
egalizeTypesGeneric.cpp
egalizeVectorTypes.cpp
electionDAG.cpp
electionDAGBuild.cpp
|
| 20270c909357e5e501cac1f5393430dfacfc57d8 |
18-Oct-2009 |
Evan Cheng <evan.cheng@apple.com> |
Only fixed stack objects and spill slots should be get FixedStack PseudoSourceValue.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84411 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
egalizeTypesGeneric.cpp
egalizeVectorTypes.cpp
electionDAG.cpp
electionDAGBuild.cpp
|
| 1f99657b2abd791d220018261e21d9f4008708b4 |
17-Oct-2009 |
Evan Cheng <evan.cheng@apple.com> |
Revert 84315 for now. Re-thinking the patch.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84321 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
egalizeTypesGeneric.cpp
egalizeVectorTypes.cpp
electionDAG.cpp
electionDAGBuild.cpp
|
| 6553155172a2e74feff1253837daa608123de54a |
17-Oct-2009 |
Evan Cheng <evan.cheng@apple.com> |
Revert 84315 for now. Re-thinking the patch.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84321 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
egalizeTypesGeneric.cpp
egalizeVectorTypes.cpp
electionDAG.cpp
electionDAGBuild.cpp
|
| 77e61b46fce5e165ecfedb5666c43b3d2c1dc971 |
17-Oct-2009 |
Evan Cheng <evan.cheng@apple.com> |
Rename getFixedStack to getStackObject. The stack objects represented are not
necessarily fixed. Only those will negative frame indices are "fixed."
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84315 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
egalizeTypesGeneric.cpp
egalizeVectorTypes.cpp
electionDAG.cpp
electionDAGBuild.cpp
|
| bf125583f8bd8196a34921276add7f304b7c1433 |
17-Oct-2009 |
Evan Cheng <evan.cheng@apple.com> |
Rename getFixedStack to getStackObject. The stack objects represented are not
necessarily fixed. Only those will negative frame indices are "fixed."
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84315 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
egalizeTypesGeneric.cpp
egalizeVectorTypes.cpp
electionDAG.cpp
electionDAGBuild.cpp
|
| 1adc252eb5e951fc26ff19d06854d7828f9c5f48 |
17-Oct-2009 |
Evan Cheng <evan.cheng@apple.com> |
80 col violation.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84311 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeTypesGeneric.cpp
|
| cac25a9452c75b24e33fffe3390de8b2b8983e92 |
17-Oct-2009 |
Evan Cheng <evan.cheng@apple.com> |
80 col violation.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84311 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeTypesGeneric.cpp
|
| bb39ea144fef229366341ab9636934e73de09b43 |
17-Oct-2009 |
Dan Gohman <gohman@apple.com> |
Delete an obsolete comment.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84300 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| f77fc92b03efe455008474894d217282e2a03cad |
17-Oct-2009 |
Dan Gohman <gohman@apple.com> |
Delete an obsolete comment.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84300 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 37f513df87ceb54e873adc113a1fcf4af9556833 |
17-Oct-2009 |
Victor Hernandez <vhernandez@apple.com> |
Remove MallocInst from LLVM Instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84299 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuild.cpp
electionDAGBuild.h
|
| a276c603b82a11b0bf0b59f0517a69e4b63adeab |
17-Oct-2009 |
Victor Hernandez <vhernandez@apple.com> |
Remove MallocInst from LLVM Instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84299 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuild.cpp
electionDAGBuild.h
|
| e50ac8f2f5743922862162859c658dfb3ca4ab14 |
17-Oct-2009 |
Mon P Wang <wangmp@apple.com> |
Allow widening of extract subvector
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84279 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeTypes.h
egalizeVectorTypes.cpp
|
| 3b7ee20d58f526c3904dc6e068c55e9e07b54c90 |
17-Oct-2009 |
Mon P Wang <wangmp@apple.com> |
Allow widening of extract subvector
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84279 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeTypes.h
egalizeVectorTypes.cpp
|
| 722d96604ba2eed55fc01e166566935979f4739b |
16-Oct-2009 |
Zhongxing Xu <xuzhongxing@gmail.com> |
Indent code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84247 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 931424a7d8b8b15ddda7308d6c5b08277d8bdc0e |
16-Oct-2009 |
Zhongxing Xu <xuzhongxing@gmail.com> |
Indent code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84247 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 75dbdd10525ae7cb7c2f16ecc7092a667b69556f |
15-Oct-2009 |
Jakob Stoklund Olesen <stoklund@2pi.dk> |
Report errors correctly for unselected target intrinsics.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84193 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 11ee508d7bd37f2b007da735fbd2c1497ed51848 |
15-Oct-2009 |
Jakob Stoklund Olesen <stoklund@2pi.dk> |
Report errors correctly for unselected target intrinsics.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84193 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 4205cfe3fe4c86814b91248d25f0cf01ecf642b4 |
14-Oct-2009 |
Duncan Sands <baldrick@free.fr> |
I don't see any point in having both eh.selector.i32 and eh.selector.i64,
so get rid of eh.selector.i64 and rename eh.selector.i32 to eh.selector.
Likewise for eh.typeid.for. This aligns us with gcc, which always uses a
32 bit value for the selector on all platforms. My understanding is that
the register allocator used to assert if the selector intrinsic size didn't
match the pointer size, and this was the reason for introducing the two
variants. However my testing shows that this is no longer the case (I
fixed some bugs in selector lowering yesterday, and some more today in the
fastisel path; these might have caused the original problems).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84106 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
electionDAGBuild.cpp
|
| b01bbdcc1af27bd90b552bb1b62b48916e0d4be3 |
14-Oct-2009 |
Duncan Sands <baldrick@free.fr> |
I don't see any point in having both eh.selector.i32 and eh.selector.i64,
so get rid of eh.selector.i64 and rename eh.selector.i32 to eh.selector.
Likewise for eh.typeid.for. This aligns us with gcc, which always uses a
32 bit value for the selector on all platforms. My understanding is that
the register allocator used to assert if the selector intrinsic size didn't
match the pointer size, and this was the reason for introducing the two
variants. However my testing shows that this is no longer the case (I
fixed some bugs in selector lowering yesterday, and some more today in the
fastisel path; these might have caused the original problems).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84106 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
electionDAGBuild.cpp
|
| fc1df34dea6dae98d823f9cf95afbb364201ec97 |
14-Oct-2009 |
Devang Patel <dpatel@apple.com> |
s/DebugLoc.CompileUnit/DebugLoc.Scope/g
s/DebugLoc.InlinedLoc/DebugLoc.InlinedAtLoc/g
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84054 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
electionDAGBuild.cpp
|
| 1619dc3b9ee2573c481591764c2d26d5ff16b483 |
14-Oct-2009 |
Devang Patel <dpatel@apple.com> |
s/DebugLoc.CompileUnit/DebugLoc.Scope/g
s/DebugLoc.InlinedLoc/DebugLoc.InlinedAtLoc/g
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84054 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
electionDAGBuild.cpp
|
| dd7bd93b11d18bc0bcb64e8ee5261c5724b25614 |
13-Oct-2009 |
Duncan Sands <baldrick@free.fr> |
Introduce new convenience methods for sign extending or
truncating an SDValue (depending on whether the target
type is bigger or smaller than the value's type); or zero
extending or truncating it. Use it in a few places (this
seems to be a popular operation, but I only modified cases
of it in SelectionDAGBuild). In particular, the eh_selector
lowering was doing this wrong due to a repeated rather than
inverted test, fixed with this change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84027 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
electionDAGBuild.cpp
|
| 3a66a68b0cc81193abfc074b1d360a4950151d38 |
13-Oct-2009 |
Duncan Sands <baldrick@free.fr> |
Introduce new convenience methods for sign extending or
truncating an SDValue (depending on whether the target
type is bigger or smaller than the value's type); or zero
extending or truncating it. Use it in a few places (this
seems to be a popular operation, but I only modified cases
of it in SelectionDAGBuild). In particular, the eh_selector
lowering was doing this wrong due to a repeated rather than
inverted test, fixed with this change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84027 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
electionDAGBuild.cpp
|
| 9cd02c5e750dea8637fe300b27a0bf14a53e22bd |
13-Oct-2009 |
Devang Patel <dpatel@apple.com> |
Set default location for a function if it is not set.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83921 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 1f03471a2dfb02fa39f7168244bb8c0891a56ab9 |
13-Oct-2009 |
Devang Patel <dpatel@apple.com> |
Set default location for a function if it is not set.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83921 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| e4e67c4d7b48ad44a7647ae33fac429025963387 |
12-Oct-2009 |
Nate Begeman <natebegeman@mac.com> |
More heuristics for Combiner-AA. Still catches all important cases, but
compile time penalty on gnugo, the worst case in MultiSource, is down to
about 2.5% from 30%
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83824 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 677c89d8bfaf17587076703816730c75c68c894b |
12-Oct-2009 |
Nate Begeman <natebegeman@mac.com> |
More heuristics for Combiner-AA. Still catches all important cases, but
compile time penalty on gnugo, the worst case in MultiSource, is down to
about 2.5% from 30%
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83824 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| f5ee5165329daef7db0c6a8a0abc23d344e9e6f9 |
10-Oct-2009 |
Dan Gohman <gohman@apple.com> |
Create a new InstrEmitter class for translating SelectionDAG nodes
into MachineInstrs. This is mostly just moving the code from
ScheduleDAGSDNodesEmit.cpp into a new class. This decouples MachineInstr
emitting from scheduling.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83699 91177308-0d34-0410-b5e6-96231b3b80d8
MakeLists.txt
nstrEmitter.cpp
nstrEmitter.h
cheduleDAGSDNodes.cpp
cheduleDAGSDNodes.h
cheduleDAGSDNodesEmit.cpp
|
| bcea859fc1dd1af9ac66ec93ea04ce9a19c8451c |
10-Oct-2009 |
Dan Gohman <gohman@apple.com> |
Create a new InstrEmitter class for translating SelectionDAG nodes
into MachineInstrs. This is mostly just moving the code from
ScheduleDAGSDNodesEmit.cpp into a new class. This decouples MachineInstr
emitting from scheduling.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83699 91177308-0d34-0410-b5e6-96231b3b80d8
MakeLists.txt
nstrEmitter.cpp
nstrEmitter.h
cheduleDAGSDNodes.cpp
cheduleDAGSDNodes.h
cheduleDAGSDNodesEmit.cpp
|
| e1c0b3bed2a6e94779604ba226ee8721496f20e7 |
10-Oct-2009 |
Dan Gohman <gohman@apple.com> |
Make getMachineNode return a MachineSDNode* instead of a generic SDNode*
since it won't do any folding. This will help avoid some inconvenient
casting.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83698 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| c81b783e2777b70f4533a4750489d058b6b74ad9 |
10-Oct-2009 |
Dan Gohman <gohman@apple.com> |
Make getMachineNode return a MachineSDNode* instead of a generic SDNode*
since it won't do any folding. This will help avoid some inconvenient
casting.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83698 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 04e1b1d338e24537ab7c42bd0a1f0bf544732080 |
10-Oct-2009 |
Dan Gohman <gohman@apple.com> |
The ScheduleDAG framework now requires an AliasAnalysis argument, though
it isn't needed in the ScheduleDAGSDNodes schedulers.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83691 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGFast.cpp
cheduleDAGList.cpp
cheduleDAGRRList.cpp
cheduleDAGSDNodes.cpp
cheduleDAGSDNodes.h
|
| 98976e4dcd18adbbe676048c0069e67346eb4ade |
10-Oct-2009 |
Dan Gohman <gohman@apple.com> |
The ScheduleDAG framework now requires an AliasAnalysis argument, though
it isn't needed in the ScheduleDAGSDNodes schedulers.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83691 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGFast.cpp
cheduleDAGList.cpp
cheduleDAGRRList.cpp
cheduleDAGSDNodes.cpp
cheduleDAGSDNodes.h
|
| 40c80212c1c0be155e7a561f0a18a94856d7eb2f |
10-Oct-2009 |
Devang Patel <dpatel@apple.com> |
Extract scope information from the variable itself, instead of relying on alloca or llvm.dbg.declare location.
While recording beginning of a function, use scope info from the first location entry instead of just relying on first location entry itself.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83684 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
electionDAGBuild.cpp
|
| ac1ceb3dd33cb79ecb0dbd64b6abafa7ce067c5f |
10-Oct-2009 |
Devang Patel <dpatel@apple.com> |
Extract scope information from the variable itself, instead of relying on alloca or llvm.dbg.declare location.
While recording beginning of a function, use scope info from the first location entry instead of just relying on first location entry itself.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83684 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
electionDAGBuild.cpp
|
| fcaa4cff1b4f3a5b7a731c6e591f345ce5fcdbc1 |
08-Oct-2009 |
Bob Wilson <bob.wilson@apple.com> |
Add a SelectionDAG getTargetInsertSubreg convenience function,
similar to getTargetExtractSubreg.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83564 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 5fcbf0d26ecb99d54c182f542bf8db43ff048d6d |
08-Oct-2009 |
Bob Wilson <bob.wilson@apple.com> |
Add a SelectionDAG getTargetInsertSubreg convenience function,
similar to getTargetExtractSubreg.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83564 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 0feae424692b07197998bd7a451d8da44fd0ac9a |
06-Oct-2009 |
Devang Patel <dpatel@apple.com> |
Add support to handle debug info attached to an instruction.
This is not yet enabled.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83400 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
|
| 60b35bd8ecb2c3358b80d8441873cfffa0d27851 |
06-Oct-2009 |
Devang Patel <dpatel@apple.com> |
Add support to handle debug info attached to an instruction.
This is not yet enabled.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83400 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
|
| 93d2e89b3e82de8ab53b252b5f86de4e3b6980b6 |
06-Oct-2009 |
Devang Patel <dpatel@apple.com> |
Set default location for the function if it is not already set.
This code is not yet enabled.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83349 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 454e957979727bd29d75ec70623e50795f5824d9 |
06-Oct-2009 |
Devang Patel <dpatel@apple.com> |
Set default location for the function if it is not already set.
This code is not yet enabled.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83349 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 539f434334ae6cc5becba8b3099eb20ab7fe48dc |
01-Oct-2009 |
Devang Patel <dpatel@apple.com> |
If location info is attached with an instruction then keep track of alloca slots used by a variable. This info will be used by AsmPrinter to emit debug info for variables.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83189 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
|
| 75549f4444cbb14e73c8f10ab90ec36c60413e8e |
01-Oct-2009 |
Devang Patel <dpatel@apple.com> |
If location info is attached with an instruction then keep track of alloca slots used by a variable. This info will be used by AsmPrinter to emit debug info for variables.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83189 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
|
| 4d23d84af58fc21b50dce528a8a26a30a62db355 |
01-Oct-2009 |
Devang Patel <dpatel@apple.com> |
Use MDNode * directly as an RecordSourceLine() argument.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83182 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 3d910835fc5da1ccddefd7cc5978ffe8c903cbf0 |
01-Oct-2009 |
Devang Patel <dpatel@apple.com> |
Use MDNode * directly as an RecordSourceLine() argument.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83182 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 64ccb3919aa594caf4c2196eed9e72cc9797fe57 |
30-Sep-2009 |
Reid Kleckner <reid@kleckner.net> |
Silence comparison always false warning in -Asserts mode.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83164 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGRRList.cpp
|
| 3a90c9b8edb53ea1ea57d94f7ab256608b5b30c6 |
30-Sep-2009 |
Reid Kleckner <reid@kleckner.net> |
Silence comparison always false warning in -Asserts mode.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83164 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGRRList.cpp
|
| e9b95fd1ebb1f046d17afd0123d7c3afcd4ddef0 |
30-Sep-2009 |
Reid Kleckner <reid@kleckner.net> |
Fix integer overflow in instruction scheduling. This can happen if we have
basic blocks that are so long that their size overflows a short.
Also assert that overflow does not happen in the future, as requested by Evan.
This fixes PR4401.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83159 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGFast.cpp
cheduleDAGList.cpp
cheduleDAGRRList.cpp
|
| c277ab08a24d2dbe9b4ff1a9154ea6115ed6a4e3 |
30-Sep-2009 |
Reid Kleckner <reid@kleckner.net> |
Fix integer overflow in instruction scheduling. This can happen if we have
basic blocks that are so long that their size overflows a short.
Also assert that overflow does not happen in the future, as requested by Evan.
This fixes PR4401.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83159 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGFast.cpp
cheduleDAGList.cpp
cheduleDAGRRList.cpp
|
| 50ffdfb9df7dceaba43fd40a1053d22787257fd6 |
29-Sep-2009 |
Devang Patel <dpatel@apple.com> |
Remove unnecessary cast.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83100 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 9dddf9748025cb65a951e6807bc156cf5bcd046d |
29-Sep-2009 |
Devang Patel <dpatel@apple.com> |
Remove unnecessary cast.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83100 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 6de78e26bd0bb682ac466ae1b46a8a29c9d6ae9c |
28-Sep-2009 |
Devang Patel <dpatel@apple.com> |
s/class Metadata/class MetadataContext/g
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83019 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| e30e678865b8dc1b69ef1c26e7567ffd1300553c |
28-Sep-2009 |
Devang Patel <dpatel@apple.com> |
s/class Metadata/class MetadataContext/g
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83019 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| b5896160216cae66e3a06cb58c3c38ba09f6969e |
28-Sep-2009 |
Devang Patel <dpatel@apple.com> |
Do not use global typedef for MDKindID.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83016 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| a2148402ce39fb3aad09e98a32078d3853a01ae9 |
28-Sep-2009 |
Devang Patel <dpatel@apple.com> |
Do not use global typedef for MDKindID.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83016 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| c7d0e9d24270f52cdc47b94ebaad316d4fcc2b44 |
28-Sep-2009 |
Dan Gohman <gohman@apple.com> |
Use VerifySchedule instead of doing the work manually.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@82995 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGFast.cpp
|
| 937d2d86242339c17e77a6016b96999f439a1714 |
28-Sep-2009 |
Dan Gohman <gohman@apple.com> |
Use VerifySchedule instead of doing the work manually.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@82995 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGFast.cpp
|
| 2221f5657297e8c645617e7304d360aceda1b409 |
26-Sep-2009 |
Dan Gohman <gohman@apple.com> |
Convert comparisons like (x == infinity) to (x >= infinity) on targets
where FCMP_OEQ is not legal and FCMP_OGE is, such as x86.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@82861 91177308-0d34-0410-b5e6-96231b3b80d8
argetLowering.cpp
|
| 11eab02b770086c119a18aae0fe214fbe5eed0d0 |
26-Sep-2009 |
Dan Gohman <gohman@apple.com> |
Convert comparisons like (x == infinity) to (x >= infinity) on targets
where FCMP_OEQ is not legal and FCMP_OGE is, such as x86.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@82861 91177308-0d34-0410-b5e6-96231b3b80d8
argetLowering.cpp
|
| 4e3bb1bc735783b73f2dcca82c86b7faca1a87e8 |
25-Sep-2009 |
Dan Gohman <gohman@apple.com> |
Improve MachineMemOperand handling.
- Allocate MachineMemOperands and MachineMemOperand lists in MachineFunctions.
This eliminates MachineInstr's std::list member and allows the data to be
created by isel and live for the remainder of codegen, avoiding a lot of
copying and unnecessary translation. This also shrinks MemSDNode.
- Delete MemOperandSDNode. Introduce MachineSDNode which has dedicated
fields for MachineMemOperands.
- Change MemSDNode to have a MachineMemOperand member instead of its own
fields with the same information. This introduces some redundancy, but
it's more consistent with what MachineInstr will eventually want.
- Ignore alignment when searching for redundant loads for CSE, but remember
the greatest alignment.
Target-specific code which previously used MemOperandSDNodes with generic
SDNodes now use MemIntrinsicSDNodes, with opcodes in a designated range
so that the SelectionDAG framework knows that MachineMemOperand information
is available.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@82794 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGSDNodes.cpp
cheduleDAGSDNodes.h
cheduleDAGSDNodesEmit.cpp
electionDAG.cpp
|
| c76909abfec876c6b751d693ebd3df07df686aa0 |
25-Sep-2009 |
Dan Gohman <gohman@apple.com> |
Improve MachineMemOperand handling.
- Allocate MachineMemOperands and MachineMemOperand lists in MachineFunctions.
This eliminates MachineInstr's std::list member and allows the data to be
created by isel and live for the remainder of codegen, avoiding a lot of
copying and unnecessary translation. This also shrinks MemSDNode.
- Delete MemOperandSDNode. Introduce MachineSDNode which has dedicated
fields for MachineMemOperands.
- Change MemSDNode to have a MachineMemOperand member instead of its own
fields with the same information. This introduces some redundancy, but
it's more consistent with what MachineInstr will eventually want.
- Ignore alignment when searching for redundant loads for CSE, but remember
the greatest alignment.
Target-specific code which previously used MemOperandSDNodes with generic
SDNodes now use MemIntrinsicSDNodes, with opcodes in a designated range
so that the SelectionDAG framework knows that MachineMemOperand information
is available.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@82794 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGSDNodes.cpp
cheduleDAGSDNodes.h
cheduleDAGSDNodesEmit.cpp
electionDAG.cpp
|
| 61fda0d889b3578fe435455679182c231a649aac |
25-Sep-2009 |
Dan Gohman <gohman@apple.com> |
Rename getTargetNode to getMachineNode, for consistency with the
naming scheme used in SelectionDAG, where there are multiple kinds
of "target" nodes, but "machine" nodes are nodes which represent
a MachineInstr.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@82790 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 602b0c8c17f458d2c80f2deb3c8e554d516ee316 |
25-Sep-2009 |
Dan Gohman <gohman@apple.com> |
Rename getTargetNode to getMachineNode, for consistency with the
naming scheme used in SelectionDAG, where there are multiple kinds
of "target" nodes, but "machine" nodes are nodes which represent
a MachineInstr.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@82790 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| bccd219ac7eb590d369f9bda03ade6467aa49e24 |
25-Sep-2009 |
Dale Johannesen <dalej@apple.com> |
Make sure sin, cos, sqrt calls are marked readonly
before producing FSIN, FCOS, FSQRT. If they aren't
so marked we have to assume they might set errno.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@82781 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuild.cpp
|
| a45bfd31de14321262dd5f5123d04fc953a79ff1 |
25-Sep-2009 |
Dale Johannesen <dalej@apple.com> |
Make sure sin, cos, sqrt calls are marked readonly
before producing FSIN, FCOS, FSQRT. If they aren't
so marked we have to assume they might set errno.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@82781 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuild.cpp
|
| 8891e4478909879ca4f4e745312b542cc8aca7e6 |
25-Sep-2009 |
Dale Johannesen <dalej@apple.com> |
Generate FSQRT from calls to the sqrt function, which
allows appropriate backends to generate a sqrt instruction.
On x86, this isn't done at -O0 because we go through
FastISel instead. This is a behavior change from before
this series of sqrt patches started. I think this is OK
considering that compile speed is most important at -O0, but
could be convinced otherwise.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@82778 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuild.cpp
|
| 52fb79b7f9792999b18c1230b5ababaa48df9c85 |
25-Sep-2009 |
Dale Johannesen <dalej@apple.com> |
Generate FSQRT from calls to the sqrt function, which
allows appropriate backends to generate a sqrt instruction.
On x86, this isn't done at -O0 because we go through
FastISel instead. This is a behavior change from before
this series of sqrt patches started. I think this is OK
considering that compile speed is most important at -O0, but
could be convinced otherwise.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@82778 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuild.cpp
|
| aec69ee8287d0ac26b45fb20240af79e5497ef01 |
25-Sep-2009 |
Nate Begeman <natebegeman@mac.com> |
Fix combiner-aa issue with bases which are different, but can alias.
Previously, it treated GV+28 GV+0 as different bases, and assumed they could
not alias.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@82753 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| cc66cdd79c7500e8184a837418debdfae4407b5f |
25-Sep-2009 |
Nate Begeman <natebegeman@mac.com> |
Fix combiner-aa issue with bases which are different, but can alias.
Previously, it treated GV+28 GV+0 as different bases, and assumed they could
not alias.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@82753 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 594bb86a065af025a8fd90ef486d9f54fb869f95 |
25-Sep-2009 |
Dan Gohman <gohman@apple.com> |
Add a version of dumpr() that has a SelectionDAG* argument.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@82742 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 8fc13cb4f7a2997f993ffdfe6e488046ec6c834e |
25-Sep-2009 |
Dan Gohman <gohman@apple.com> |
Add a version of dumpr() that has a SelectionDAG* argument.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@82742 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| ad4880332c61c808014c202255dce5f8fafe581e |
23-Sep-2009 |
Dan Gohman <gohman@apple.com> |
Use getStoreSize() instead of getStoreSizeInBits()/8.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@82656 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
egalizeIntegerTypes.cpp
electionDAG.cpp
|
| 4e918b2c8ca81edd63f6708e08835b2c14648615 |
23-Sep-2009 |
Dan Gohman <gohman@apple.com> |
Use getStoreSize() instead of getStoreSizeInBits()/8.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@82656 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
egalizeIntegerTypes.cpp
electionDAG.cpp
|
| 3bab1f776cf32aadd62d490f54cec968ef38eec7 |
23-Sep-2009 |
Dan Gohman <gohman@apple.com> |
Rename several variables from EVT to more descriptive names, now that EVT
is also the name of their type, as declarations like "EVT EVT" look
really odd.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@82654 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
egalizeIntegerTypes.cpp
electionDAG.cpp
argetLowering.cpp
|
| 8a55ce4a392f07ac1f3c183100ac591b7ad7c693 |
23-Sep-2009 |
Dan Gohman <gohman@apple.com> |
Rename several variables from EVT to more descriptive names, now that EVT
is also the name of their type, as declarations like "EVT EVT" look
really odd.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@82654 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
egalizeIntegerTypes.cpp
electionDAG.cpp
argetLowering.cpp
|
| 915d872b7a05774ea93ba7fbb25f0944d62e10fb |
23-Sep-2009 |
Dan Gohman <gohman@apple.com> |
Give MachineMemOperand an operator<<, factoring out code from
two different places for printing MachineMemOperands.
Drop the virtual from Value::dump and instead give Value a
protected virtual hook that can be overridden by subclasses
to implement custom printing. This lets printing be more
consistent, and simplifies printing of PseudoSourceValue
values.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@82599 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| cd26ec5f3c089b3b24f80ff200e94e681eb9e1ee |
23-Sep-2009 |
Dan Gohman <gohman@apple.com> |
Give MachineMemOperand an operator<<, factoring out code from
two different places for printing MachineMemOperands.
Drop the virtual from Value::dump and instead give Value a
protected virtual hook that can be overridden by subclasses
to implement custom printing. This lets printing be more
consistent, and simplifies printing of PseudoSourceValue
values.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@82599 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 169948d4180417313f5332b85d2572520592de3c |
21-Sep-2009 |
Dan Gohman <gohman@apple.com> |
Change MachineMemOperand's alignment value to be the alignment of
the base pointer, without the offset. This matches MemSDNode's
new alignment behavior, and holds more interesting information.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@82473 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 28f02fdd76f4efc05d14649e0eec90ce8e71e17e |
21-Sep-2009 |
Dan Gohman <gohman@apple.com> |
Change MachineMemOperand's alignment value to be the alignment of
the base pointer, without the offset. This matches MemSDNode's
new alignment behavior, and holds more interesting information.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@82473 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 9c220f60be3a50de7fd2a5c491ccfa63c5d3a342 |
20-Sep-2009 |
Chris Lattner <sabre@nondot.org> |
tidy up
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@82397 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 7453f8a68f506837d332056733c14001b828d6e1 |
20-Sep-2009 |
Chris Lattner <sabre@nondot.org> |
tidy up
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@82397 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 3be44e69724c80460d2ef5abab22d802f78615cc |
20-Sep-2009 |
Daniel Dunbar <daniel@zuster.org> |
Tabs -> spaces, and remove trailing whitespace.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@82355 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| a279bc3da55691784064cb47200a1c584408b8ab |
20-Sep-2009 |
Daniel Dunbar <daniel@zuster.org> |
Tabs -> spaces, and remove trailing whitespace.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@82355 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 5f3a54090af5d61d35de2158542ff76fc9ef053f |
19-Sep-2009 |
Evan Cheng <evan.cheng@apple.com> |
Fix PR4926. When target hook EmitInstrWithCustomInserter() insert new basic blocks and update CFG, it should also inform sdisel of the changes so the phi source operands will come from the right basic blocks.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@82311 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| ce31910eae5bd4896fa6c27798e7b26885691d3b |
19-Sep-2009 |
Evan Cheng <evan.cheng@apple.com> |
Fix PR4926. When target hook EmitInstrWithCustomInserter() insert new basic blocks and update CFG, it should also inform sdisel of the changes so the phi source operands will come from the right basic blocks.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@82311 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| d7dc983029cf293dd67637c27b92c04c0baf968b |
18-Sep-2009 |
Evan Cheng <evan.cheng@apple.com> |
Enhance EmitInstrWithCustomInserter() so target can specify CFG changes that sdisel will use to properly complete phi nodes.
Not functionality change yet.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@82273 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGSDNodes.h
cheduleDAGSDNodesEmit.cpp
electionDAGBuild.cpp
electionDAGBuild.h
electionDAGISel.cpp
|
| fb2e752e4175920d0531f2afc93a23d0cdf4db14 |
18-Sep-2009 |
Evan Cheng <evan.cheng@apple.com> |
Enhance EmitInstrWithCustomInserter() so target can specify CFG changes that sdisel will use to properly complete phi nodes.
Not functionality change yet.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@82273 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGSDNodes.h
cheduleDAGSDNodesEmit.cpp
electionDAGBuild.cpp
electionDAGBuild.h
electionDAGISel.cpp
|
| 600abb363005c6b5abc9385b35c37720cb2eacbf |
18-Sep-2009 |
Chris Lattner <sabre@nondot.org> |
duncan points out the EH selector values are signed.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@82245 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuild.cpp
|
| 6ba2e87061bad9a24c75db69ab9b80bb6e16d96b |
18-Sep-2009 |
Chris Lattner <sabre@nondot.org> |
duncan points out the EH selector values are signed.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@82245 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuild.cpp
|
| f3233f2b427e9abfbe1633a91e8e84e7bbb19b43 |
18-Sep-2009 |
Evan Cheng <evan.cheng@apple.com> |
Revert r82214. It broke 403.gcc on x86_64 / Darwin.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@82215 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 8be58a11868ae081c195c107cd39a07f1f523877 |
18-Sep-2009 |
Evan Cheng <evan.cheng@apple.com> |
Revert r82214. It broke 403.gcc on x86_64 / Darwin.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@82215 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| ac00d566d4070167ca5aa1cb48f83fa55b1535b9 |
18-Sep-2009 |
Evan Cheng <evan.cheng@apple.com> |
Fix a bug in sdisel switch lowering code. When it updates the phi nodes in switch successor blocks, it can introduce multiple phi operands of the same value from different blocks (and may not be on the predecessor list).
This can be seen on CodeGen/Generic/2006-09-06-SwitchLowering.ll. But it's not known to cause any real regression (but I have added an assertion for it now).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@82214 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| f8a56255a54bf60d0cfa6b20d10dad969cce9f81 |
18-Sep-2009 |
Evan Cheng <evan.cheng@apple.com> |
Fix a bug in sdisel switch lowering code. When it updates the phi nodes in switch successor blocks, it can introduce multiple phi operands of the same value from different blocks (and may not be on the predecessor list).
This can be seen on CodeGen/Generic/2006-09-06-SwitchLowering.ll. But it's not known to cause any real regression (but I have added an assertion for it now).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@82214 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| b51aa3322dc54cc149250513132c30574b2e003c |
18-Sep-2009 |
Chris Lattner <sabre@nondot.org> |
tolerate llvm.eh.selector.i64 on 32-bit systems and llvm.eh.selector.i32 on
64-bit systems.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@82180 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuild.cpp
|
| 3a5815f90feb1eb791f6383acd62e6c5ed75cada |
18-Sep-2009 |
Chris Lattner <sabre@nondot.org> |
tolerate llvm.eh.selector.i64 on 32-bit systems and llvm.eh.selector.i32 on
64-bit systems.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@82180 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuild.cpp
|
| 3f7aeddf89537d10eebd50196576e3ec91d066e9 |
16-Sep-2009 |
Devang Patel <dpatel@apple.com> |
Fix typo.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@82080 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 713f043c16220b746804f668a72f4e0344cbe4d1 |
16-Sep-2009 |
Devang Patel <dpatel@apple.com> |
Fix typo.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@82080 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| a0fbb00ae6d27128232f1c11550b70bddb6fa76d |
16-Sep-2009 |
Devang Patel <dpatel@apple.com> |
At iSel time, update DebugLoc based on debug info attached with an instruction.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@82077 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 123eaa71b50f5ac2ea2233685baedddbb72f387b |
16-Sep-2009 |
Devang Patel <dpatel@apple.com> |
At iSel time, update DebugLoc based on debug info attached with an instruction.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@82077 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 4c9a0d70e34e1cc679f71bc5ca8e9554255b18d6 |
16-Sep-2009 |
Nate Begeman <natebegeman@mac.com> |
Do not add the SVOffset to the Node CSE ID. The same pointer argument cannot have different
SVOffsets.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@81937 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 40fe16fadaccb86d9bff13ebe1c9a0cb20b2251b |
16-Sep-2009 |
Nate Begeman <natebegeman@mac.com> |
Do not add the SVOffset to the Node CSE ID. The same pointer argument cannot have different
SVOffsets.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@81937 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 2494777a2cb2e6e78713b12c0658523856b44ecb |
15-Sep-2009 |
Nate Begeman <natebegeman@mac.com> |
Better solution for tracking both the original alignment of the access, and the current alignment based
on the source value offset. This avoids increasing the size of mem nodes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@81897 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeVectorTypes.cpp
electionDAG.cpp
electionDAGBuild.cpp
|
| 101b25c028706c61c7dd9fb92d0b3c1541cb12b6 |
15-Sep-2009 |
Nate Begeman <natebegeman@mac.com> |
Better solution for tracking both the original alignment of the access, and the current alignment based
on the source value offset. This avoids increasing the size of mem nodes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@81897 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeVectorTypes.cpp
electionDAG.cpp
electionDAGBuild.cpp
|
| 6647b934fcb19a24d6eb7a07750ce292d79205c3 |
15-Sep-2009 |
Nate Begeman <natebegeman@mac.com> |
Remove incorrect CSE code from r81813.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@81819 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 71524d716ad7da8f5a8e75085f9739aa6b772f9d |
15-Sep-2009 |
Nate Begeman <natebegeman@mac.com> |
Remove incorrect CSE code from r81813.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@81819 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 722f41892d746e32e0456a8e90640be7b93b4175 |
15-Sep-2009 |
Nate Begeman <natebegeman@mac.com> |
Substantially speed up combiner-aa in the following ways:
1. Switch from an std::set to a SmallPtrSet for visited chain nodes.
2. Do not force the recursive flattening of token factor nodes, regardless of
use count.
3. Immediately process newly created TokenFactor nodes.
Also, improve combiner-aa by teaching it that loads to non-overlapping offsets
of relatively aligned objects cannot alias.
These changes result in a >5x speedup for combiner-aa on most testcases.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@81816 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| b6aef5c86736accefb1c61cacaf1bd29e9b25ecd |
15-Sep-2009 |
Nate Begeman <natebegeman@mac.com> |
Substantially speed up combiner-aa in the following ways:
1. Switch from an std::set to a SmallPtrSet for visited chain nodes.
2. Do not force the recursive flattening of token factor nodes, regardless of
use count.
3. Immediately process newly created TokenFactor nodes.
Also, improve combiner-aa by teaching it that loads to non-overlapping offsets
of relatively aligned objects cannot alias.
These changes result in a >5x speedup for combiner-aa on most testcases.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@81816 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 9e1b9b6fc8c9553b28a676fda614db3d057aa368 |
15-Sep-2009 |
Nate Begeman <natebegeman@mac.com> |
Teach the legalizer to propagate the original alignment of loads and store when
it splits them.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@81815 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeVectorTypes.cpp
|
| 9cae7053c0381e5ba8c9e758231bfc9a1ccf57de |
15-Sep-2009 |
Nate Begeman <natebegeman@mac.com> |
Teach the legalizer to propagate the original alignment of loads and store when
it splits them.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@81815 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeVectorTypes.cpp
|
| e22356dcb8d97062576619c5419a1140c76059dd |
15-Sep-2009 |
Nate Begeman <natebegeman@mac.com> |
Add an "original alignment" field to load and store nodes. This enables the
DAG Combiner to disambiguate chains for loads and stores of types which are
broken up by the Legalizer into smaller pieces.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@81813 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
electionDAGBuild.cpp
|
| e6798372ea38e5ea24c26282a0d69aa6e3829854 |
15-Sep-2009 |
Nate Begeman <natebegeman@mac.com> |
Add an "original alignment" field to load and store nodes. This enables the
DAG Combiner to disambiguate chains for loads and stores of types which are
broken up by the Legalizer into smaller pieces.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@81813 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
electionDAGBuild.cpp
|
| 00512f63d4d10e60ae18c8b46392ce49e663f0bd |
14-Sep-2009 |
Chris Lattner <sabre@nondot.org> |
kill off the last use of TRI::AsmName.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@81727 91177308-0d34-0410-b5e6-96231b3b80d8
argetLowering.cpp
|
| 6a6570a312d4757d2a6555d40dd83c203e43d644 |
14-Sep-2009 |
Chris Lattner <sabre@nondot.org> |
kill off the last use of TRI::AsmName.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@81727 91177308-0d34-0410-b5e6-96231b3b80d8
argetLowering.cpp
|
| 8c5f55f3e68092a732e6d3fa0dac6de724461a44 |
11-Sep-2009 |
Dan Gohman <gohman@apple.com> |
Make fast-isel try ISD::FNEG before resorting to bitcasts and xors.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@81493 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
|
| 4a215a13c3035a8818254b61267be77def4a2a37 |
11-Sep-2009 |
Dan Gohman <gohman@apple.com> |
Make fast-isel try ISD::FNEG before resorting to bitcasts and xors.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@81493 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
|
| b144a5210c2df1b248b0c92fbf18f0cb1f9f9f91 |
11-Sep-2009 |
Dan Gohman <gohman@apple.com> |
Reapply r81171 with a fix: don't try to use i64 when it
isn't legal.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@81492 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
|
| 5e5abb77fe9eeb92a55f119fdb721bca4508094a |
11-Sep-2009 |
Dan Gohman <gohman@apple.com> |
Reapply r81171 with a fix: don't try to use i64 when it
isn't legal.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@81492 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
|
| bdebfa961d5a71ebab1e0e622dd2abb463fff8aa |
11-Sep-2009 |
Bob Wilson <bob.wilson@apple.com> |
Don't swap the operands of a subtraction when trying to create a
post-decrement load/store.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@81464 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 92ad363f58681df785933a75a9b9955f13885e7d |
11-Sep-2009 |
Bob Wilson <bob.wilson@apple.com> |
Don't swap the operands of a subtraction when trying to create a
post-decrement load/store.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@81464 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 9aadf0b01025e9a91a285fe87cf58353cc8aa61e |
10-Sep-2009 |
Bob Wilson <bob.wilson@apple.com> |
Revert r81171 which was causing pr4927.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@81415 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
|
| 2a16e6b22c558f9ba0b25096dfe0697488e51c8e |
10-Sep-2009 |
Bob Wilson <bob.wilson@apple.com> |
Revert r81171 which was causing pr4927.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@81415 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
|
| da58ebcc2659fad293f11e4cd48f9d92b7fc594b |
09-Sep-2009 |
Dan Gohman <gohman@apple.com> |
When widening a vector load, use the correct chain. This fixes PR4891.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@81343 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeVectorTypes.cpp
|
| 607a0508ba5732716809b926a271a9152bdcec12 |
09-Sep-2009 |
Dan Gohman <gohman@apple.com> |
When widening a vector load, use the correct chain. This fixes PR4891.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@81343 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeVectorTypes.cpp
|
| 0ac501ab8363823363bb62cba3f3bde409d8c5b5 |
09-Sep-2009 |
Chris Lattner <sabre@nondot.org> |
change selectiondag to add the sign extended versions of immediate operands
to instructions instead of zero extended ones. This makes the asmprinter
print signed values more consistently. This apparently only really affects
the X86 backend.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@81265 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGSDNodesEmit.cpp
|
| d842962e27b10b6831c2421fa257e3fd58a85b18 |
09-Sep-2009 |
Chris Lattner <sabre@nondot.org> |
change selectiondag to add the sign extended versions of immediate operands
to instructions instead of zero extended ones. This makes the asmprinter
print signed values more consistently. This apparently only really affects
the X86 backend.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@81265 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGSDNodesEmit.cpp
|
| 1b9f83a3e87d2b6cbcf1af525f0b1796c17fd571 |
08-Sep-2009 |
Dan Gohman <gohman@apple.com> |
Fix an abort on a store of an empty struct member. getValue returns
null in the case of an empty struct, so don't try to call getNumValues
on it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@81180 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuild.cpp
|
| ed48caf5e703c8ee088a8ffa7fb77ebd1b25e97b |
08-Sep-2009 |
Dan Gohman <gohman@apple.com> |
Fix an abort on a store of an empty struct member. getValue returns
null in the case of an empty struct, so don't try to call getNumValues
on it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@81180 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuild.cpp
|
| c4d34a74cd602a2a0438efade40a536d67ed38a3 |
08-Sep-2009 |
Dan Gohman <gohman@apple.com> |
Fix a thinko: When lowering fneg with xor, bitcast the operands
from floating-point to integer first, and bitcast the result
back to floating-point. Previously, this test was passing by
falling back to SelectionDAG lowering. The resulting code isn't
as nice, but it's correct and CodeGen now stays on the fast path.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@81171 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
|
| fd06aa7c076f397b307ddd638a2666f4090ee2b1 |
08-Sep-2009 |
Dan Gohman <gohman@apple.com> |
Fix a thinko: When lowering fneg with xor, bitcast the operands
from floating-point to integer first, and bitcast the result
back to floating-point. Previously, this test was passing by
falling back to SelectionDAG lowering. The resulting code isn't
as nice, but it's correct and CodeGen now stays on the fast path.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@81171 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
|
| 950b9861ba3a7964bc911df9b97fa8d136e0bcd5 |
06-Sep-2009 |
Duncan Sands <baldrick@free.fr> |
Simplify. Testing shows that this is not equivalent to BBI = CR.CaseBB + 1.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@81124 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuild.cpp
|
| 514985297520dbe79441a7af743a5941422a1b69 |
06-Sep-2009 |
Duncan Sands <baldrick@free.fr> |
Simplify. Testing shows that this is not equivalent to BBI = CR.CaseBB + 1.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@81124 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuild.cpp
|
| 05db668fe21feee223e19fe50ddeb6456ddebafb |
06-Sep-2009 |
Duncan Sands <baldrick@free.fr> |
Remove some not-really-used variables, as warned
about by icc (#593, partial). Patch by Erick Tryzelaar.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@81115 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGSDNodes.cpp
electionDAGBuild.cpp
|
| c2d98bc0d682419f09659d94afefd6a6266dd6ee |
06-Sep-2009 |
Duncan Sands <baldrick@free.fr> |
Remove some not-really-used variables, as warned
about by icc (#593, partial). Patch by Erick Tryzelaar.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@81115 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGSDNodes.cpp
electionDAGBuild.cpp
|
| 5c3f915679bede35de38a5702359ab5befc38b95 |
06-Sep-2009 |
Duncan Sands <baldrick@free.fr> |
Remove some unused variables and methods warned about by
icc (#177, partial). Patch by Erick Tryzelaar.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@81106 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| b7c5bdf843419e4222770475c27932c4c8e5c303 |
06-Sep-2009 |
Duncan Sands <baldrick@free.fr> |
Remove some unused variables and methods warned about by
icc (#177, partial). Patch by Erick Tryzelaar.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@81106 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 5290ac201f2bd669d8e09cfc45f98b6f39784324 |
05-Sep-2009 |
Devang Patel <dpatel@apple.com> |
Detect VLAs.
Do not use DenseMap operator[] because it inserts new entry if lookup fails. Use find() to check an entry in a DenseMap first.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@81058 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuild.cpp
|
| bd1d6a8ce1197de640df52e1da2e63e8ce8d8705 |
05-Sep-2009 |
Devang Patel <dpatel@apple.com> |
Detect VLAs.
Do not use DenseMap operator[] because it inserts new entry if lookup fails. Use find() to check an entry in a DenseMap first.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@81058 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuild.cpp
|
| f154271b8e81b6fc65137b7fda7c935b9fe93203 |
04-Sep-2009 |
Dan Gohman <gohman@apple.com> |
LLVM currently represents floating-point negation as -0.0 - x. Fix
FastISel to recognize this pattern and emit a floating-point
negation using xor.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@80963 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
|
| 3d45a853db014fdddcdb79424e663dfed5eccbc7 |
04-Sep-2009 |
Dan Gohman <gohman@apple.com> |
LLVM currently represents floating-point negation as -0.0 - x. Fix
FastISel to recognize this pattern and emit a floating-point
negation using xor.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@80963 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
|
| 41b3f4abc695b3ce178e1db7610b34d3745ed22d |
03-Sep-2009 |
Dan Gohman <gohman@apple.com> |
Recognize more opportunities to use SSE min and max instructions,
swapping the operands if necessary.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@80940 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 8d44b28bc6f615b9ad79b066987d53b1ea2a2942 |
03-Sep-2009 |
Dan Gohman <gohman@apple.com> |
Recognize more opportunities to use SSE min and max instructions,
swapping the operands if necessary.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@80940 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 5838baa4a8aedfd453a5b0663425979c77e4e285 |
02-Sep-2009 |
Sandeep Patel <deeppatel1987@gmail.com> |
Retype from unsigned to CallingConv::ID accordingly. Approved by Bob Wilson.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@80773 91177308-0d34-0410-b5e6-96231b3b80d8
allingConvLower.cpp
electionDAGBuild.cpp
|
| 65c3c8f323198b99b88b109654194540cf9b3fa5 |
02-Sep-2009 |
Sandeep Patel <deeppatel1987@gmail.com> |
Retype from unsigned to CallingConv::ID accordingly. Approved by Bob Wilson.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@80773 91177308-0d34-0410-b5e6-96231b3b80d8
allingConvLower.cpp
electionDAGBuild.cpp
|
| 9f086b93c3bb001b72590024114ac8c19f5abdaa |
02-Sep-2009 |
Daniel Dunbar <daniel@zuster.org> |
Remove Offset from ExternalSybmol MachineOperands, this is unused (and at least partly unsupported, in X86 encoding at least).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@80726 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGSDNodesEmit.cpp
|
| 31e2c7b4c13c2f31774614b1124533628958d0cd |
02-Sep-2009 |
Daniel Dunbar <daniel@zuster.org> |
Remove Offset from ExternalSybmol MachineOperands, this is unused (and at least partly unsupported, in X86 encoding at least).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@80726 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGSDNodesEmit.cpp
|
| 15e723d2c6021bbeacad9baa9c0d946d4a19867e |
29-Aug-2009 |
Devang Patel <dpatel@apple.com> |
Reapply 79977.
Use MDNodes to encode debug info in llvm IR.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@80406 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
egalizeDAG.cpp
electionDAG.cpp
electionDAGBuild.cpp
|
| e4b275610a7a05b7ee4c0378a906a6330e4c4ab0 |
29-Aug-2009 |
Devang Patel <dpatel@apple.com> |
Reapply 79977.
Use MDNodes to encode debug info in llvm IR.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@80406 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
egalizeDAG.cpp
electionDAG.cpp
electionDAGBuild.cpp
|
| 0defefd8ce9f13cecba8c988897c3224a25e96f8 |
26-Aug-2009 |
Anton Korobeynikov <asl@math.spbu.ru> |
Add extload expansion for f128
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@80116 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 62c77d33b18937ea0b246be3631df082cd621126 |
26-Aug-2009 |
Anton Korobeynikov <asl@math.spbu.ru> |
Add extload expansion for f128
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@80116 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 94060421ce73922e71c183fba0fda8bace7d0e2d |
26-Aug-2009 |
Devang Patel <dpatel@apple.com> |
Revert 79977. It causes llvm-gcc bootstrap failures on some platforms.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@80073 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
egalizeDAG.cpp
electionDAG.cpp
electionDAGBuild.cpp
|
| 824598883513789516a919651f4b35e7a638ec5c |
26-Aug-2009 |
Devang Patel <dpatel@apple.com> |
Revert 79977. It causes llvm-gcc bootstrap failures on some platforms.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@80073 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
egalizeDAG.cpp
electionDAG.cpp
electionDAGBuild.cpp
|
| 97be9d37d93c38bc82950e0373cd3a8d1d2aa024 |
26-Aug-2009 |
Owen Anderson <resistor@mac.com> |
Get rid of this horrible "benign race" by exploiting ManagedStatic to initialize
the array on its first access.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@80040 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| d8110fb7264993f30133c532cd074313bead0afa |
26-Aug-2009 |
Owen Anderson <resistor@mac.com> |
Get rid of this horrible "benign race" by exploiting ManagedStatic to initialize
the array on its first access.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@80040 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 57b83c78f56324e3a8ff636b311235f6f2350b4e |
25-Aug-2009 |
Devang Patel <dpatel@apple.com> |
Update DebugInfo interface to use metadata, instead of special named llvm.dbg.... global variables, to encode debugging information in llvm IR. This is mostly a mechanical change that tests metadata support very well.
This change speeds up llvm-gcc by more then 6% at "-O0 -g" (measured by compiling InstructionCombining.cpp!)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79977 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
egalizeDAG.cpp
electionDAG.cpp
electionDAGBuild.cpp
|
| 2a610c7387664bc557a35ce3bb4c0d4df56e4755 |
25-Aug-2009 |
Devang Patel <dpatel@apple.com> |
Update DebugInfo interface to use metadata, instead of special named llvm.dbg.... global variables, to encode debugging information in llvm IR. This is mostly a mechanical change that tests metadata support very well.
This change speeds up llvm-gcc by more then 6% at "-O0 -g" (measured by compiling InstructionCombining.cpp!)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79977 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
egalizeDAG.cpp
electionDAG.cpp
electionDAGBuild.cpp
|
| 33b2663488b0f8f188c1a6003faabd5ee89f7749 |
23-Aug-2009 |
Daniel Dunbar <daniel@zuster.org> |
Fix some refactos for iostream changes (in -Asserts mode).
- The world needs better C++ refactoring tools, can I get an Amen!?
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79843 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGPrinter.cpp
|
| 43ed267db3512823a9698f810be4e64bee227270 |
23-Aug-2009 |
Daniel Dunbar <daniel@zuster.org> |
Fix some refactos for iostream changes (in -Asserts mode).
- The world needs better C++ refactoring tools, can I get an Amen!?
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79843 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGPrinter.cpp
|
| 36eef827f1576cb240418a78e2323863ef6b4f8c |
23-Aug-2009 |
Chris Lattner <sabre@nondot.org> |
eliminate uses of cerr()
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79834 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeTypes.cpp
egalizeVectorTypes.cpp
cheduleDAGFast.cpp
cheduleDAGList.cpp
cheduleDAGRRList.cpp
electionDAGISel.cpp
|
| 4437ae213d5435390f0750213b53ec807c047f22 |
23-Aug-2009 |
Chris Lattner <sabre@nondot.org> |
eliminate uses of cerr()
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79834 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeTypes.cpp
egalizeVectorTypes.cpp
cheduleDAGFast.cpp
cheduleDAGList.cpp
cheduleDAGRRList.cpp
electionDAGISel.cpp
|
| 2b40c564224cda719903f8f552caefd285716632 |
23-Aug-2009 |
Chris Lattner <sabre@nondot.org> |
remove a few DOUTs here and there.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79832 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
cheduleDAGFast.cpp
cheduleDAGList.cpp
cheduleDAGRRList.cpp
electionDAGISel.cpp
electionDAGPrinter.cpp
|
| bbbfa99d3d18fe9f20265305e833666645ada528 |
23-Aug-2009 |
Chris Lattner <sabre@nondot.org> |
remove a few DOUTs here and there.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79832 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
cheduleDAGFast.cpp
cheduleDAGList.cpp
cheduleDAGRRList.cpp
electionDAGISel.cpp
electionDAGPrinter.cpp
|
| 397f4560780d34da0bd1e4c9b9101c6f0774e8ff |
23-Aug-2009 |
Chris Lattner <sabre@nondot.org> |
Change Pass::print to take a raw ostream instead of std::ostream,
update all code that this affects.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79830 91177308-0d34-0410-b5e6-96231b3b80d8
allingConvLower.cpp
egalizeDAG.cpp
electionDAG.cpp
|
| 45cfe545ec8177262dabc70580ce05feaa1c3880 |
23-Aug-2009 |
Chris Lattner <sabre@nondot.org> |
Change Pass::print to take a raw ostream instead of std::ostream,
update all code that this affects.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79830 91177308-0d34-0410-b5e6-96231b3b80d8
allingConvLower.cpp
egalizeDAG.cpp
electionDAG.cpp
|
| a719605589c78aeb0b790709cfa3ef811d544d0d |
23-Aug-2009 |
Eli Friedman <eli.friedman@gmail.com> |
Add check for completeness. Note that this doesn't actually have any
effect with the way the current code is structured.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79792 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 5aba5c0e882fca505e3e0fc784c37a85babb872e |
23-Aug-2009 |
Eli Friedman <eli.friedman@gmail.com> |
Add check for completeness. Note that this doesn't actually have any
effect with the way the current code is structured.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79792 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 621c44d3606307a3e9e56add33539c78c0009ab9 |
22-Aug-2009 |
Chris Lattner <sabre@nondot.org> |
Rename TargetAsmInfo (and its subclasses) to MCAsmInfo.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79763 91177308-0d34-0410-b5e6-96231b3b80d8
argetLowering.cpp
|
| af76e592c7f9deff0e55c13dbb4a34f07f1c7f64 |
22-Aug-2009 |
Chris Lattner <sabre@nondot.org> |
Rename TargetAsmInfo (and its subclasses) to MCAsmInfo.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79763 91177308-0d34-0410-b5e6-96231b3b80d8
argetLowering.cpp
|
| c3d25a1ce7c6718d6304464aacb2005c1ae99de7 |
22-Aug-2009 |
Devang Patel <dpatel@apple.com> |
Record variable debug info at ISel time directly.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79742 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
egalizeDAG.cpp
electionDAG.cpp
electionDAGBuild.cpp
|
| 24f20e083280d979e8fa1bc88959ae9e8339ee99 |
22-Aug-2009 |
Devang Patel <dpatel@apple.com> |
Record variable debug info at ISel time directly.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79742 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
egalizeDAG.cpp
electionDAG.cpp
electionDAGBuild.cpp
|
| 1a285c21708d469a799ba3d59292b8d23a137bb9 |
22-Aug-2009 |
Owen Anderson <resistor@mac.com> |
Reapply r79708 with the appropriate fix for the case that still requires locking.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79731 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 02b10347bb2497e18d3a4019beed2974aa715cd4 |
22-Aug-2009 |
Owen Anderson <resistor@mac.com> |
Reapply r79708 with the appropriate fix for the case that still requires locking.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79731 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 28ab49bc9e73b5f8267b8fafc6f03de9c740f775 |
22-Aug-2009 |
Chris Lattner <sabre@nondot.org> |
revert r79708 + r79711
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79720 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 895a55e66d107aa96a1e763a62a97e8ad62284a0 |
22-Aug-2009 |
Chris Lattner <sabre@nondot.org> |
revert r79708 + r79711
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79720 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| b48b4e26e91c039464b8dd91847aa58b64cc4cb0 |
22-Aug-2009 |
Eric Christopher <echristo@apple.com> |
Actually remove unused static. Previous commit removed trailing
whitespace.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79711 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 8dde7c0ff1a568a0739ff7581464c31dbc063527 |
22-Aug-2009 |
Eric Christopher <echristo@apple.com> |
Actually remove unused static. Previous commit removed trailing
whitespace.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79711 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 440d9eb4e03c42ede30b2e4e5e4b2b5c126f4aff |
22-Aug-2009 |
Eric Christopher <echristo@apple.com> |
Remove unused static.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79710 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 4d7c18c49bdc6e39ea6e862072ec224de499a2a1 |
22-Aug-2009 |
Eric Christopher <echristo@apple.com> |
Remove unused static.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79710 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| b08876f050758a11800831e3e4b61c86de3852b5 |
22-Aug-2009 |
Owen Anderson <resistor@mac.com> |
Ease contention on this lock by noticing that all writes to the VTs array will
be of (dynamically) constant values, so races on it are immaterial. We just need
to ensure that at least one write has completed before return the pointer into it.
With this change, parllc exhibits essentially no overhead on 403.gcc.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79708 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 0b7401d3cdb4a2ecd266396ef1a77c8533a4476d |
22-Aug-2009 |
Owen Anderson <resistor@mac.com> |
Ease contention on this lock by noticing that all writes to the VTs array will
be of (dynamically) constant values, so races on it are immaterial. We just need
to ensure that at least one write has completed before return the pointer into it.
With this change, parllc exhibits essentially no overhead on 403.gcc.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79708 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 370c21dacb4b4569e172f89e1b1b272cddf4c038 |
21-Aug-2009 |
Bill Wendling <isanbard@gmail.com> |
Fix typo. Should check both values of RangeUse for 0. Patch by Marius Wachtler.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79649 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuild.cpp
|
| 636e258a53b20695e841a70774f42c052c4c0bfd |
21-Aug-2009 |
Bill Wendling <isanbard@gmail.com> |
Fix typo. Should check both values of RangeUse for 0. Patch by Marius Wachtler.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79649 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuild.cpp
|
| 7ffdd43aca7b74e449b88905738ac5815005071c |
19-Aug-2009 |
Dan Gohman <gohman@apple.com> |
Add an x86 peep that narrows TEST instructions to forms that use
a smaller encoding. These kinds of patterns are very frequent in
sqlite3, for example.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79439 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 6a402dc952ccad3f8fd0d9e272dbdd261f50854e |
19-Aug-2009 |
Dan Gohman <gohman@apple.com> |
Add an x86 peep that narrows TEST instructions to forms that use
a smaller encoding. These kinds of patterns are very frequent in
sqlite3, for example.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79439 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 5c6eabba721e46860a318447cc227e3a50bbd0db |
19-Aug-2009 |
David Goodwin <david_goodwin@apple.com> |
Use the schedule itinerary operand use/def cycle information to adjust dependence edge latency for post-RA scheduling.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79425 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGSDNodes.cpp
|
| dc4bdcdef1c8dd1a28b82deb08df039e5c0ffc5a |
19-Aug-2009 |
David Goodwin <david_goodwin@apple.com> |
Use the schedule itinerary operand use/def cycle information to adjust dependence edge latency for post-RA scheduling.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79425 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGSDNodes.cpp
|
| 67ebebabfb0a1879a297abbcd979dee1065111c6 |
19-Aug-2009 |
Eli Friedman <eli.friedman@gmail.com> |
PR4737: Fix a nasty bug in load narrowing with non-power-of-two types.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79415 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| d68eea2b6d5ff284d3c7371c4f201c25ca030747 |
19-Aug-2009 |
Eli Friedman <eli.friedman@gmail.com> |
PR4737: Fix a nasty bug in load narrowing with non-power-of-two types.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79415 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 1bc9cd58ffa9e34acc8c8c46715ce4c90d2e894c |
19-Aug-2009 |
Dan Gohman <gohman@apple.com> |
Be tidy and use a break to exit from a switch block rather than
just falling through the end.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79383 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 2c9489d6e96d99f77b6c31919805b5e61954deb2 |
19-Aug-2009 |
Dan Gohman <gohman@apple.com> |
Be tidy and use a break to exit from a switch block rather than
just falling through the end.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79383 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| d97b83c65f677d7ac5c28adb430a7a3d7462561c |
19-Aug-2009 |
Dan Gohman <gohman@apple.com> |
Legalize the shift amount operand of SRL_PARTS, SHL_PARTS, and
SRA_PARTS, as is done for SRL, SHL, and SRA.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79380 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| db8dc2b9faf346fbfa04c07f501981250948f5e2 |
19-Aug-2009 |
Dan Gohman <gohman@apple.com> |
Legalize the shift amount operand of SRL_PARTS, SHL_PARTS, and
SRA_PARTS, as is done for SRL, SHL, and SRA.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79380 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 13ed51fec3ac63666184b6d540bc7126fa8bbfa6 |
17-Aug-2009 |
Jim Grosbach <grosbach@apple.com> |
Remove a bit more cruft from the sjlj moving to a backend pass.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79272 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuild.cpp
|
| 29626642271ae810dd526de8afa151484452abe0 |
17-Aug-2009 |
Jim Grosbach <grosbach@apple.com> |
Remove a bit more cruft from the sjlj moving to a backend pass.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79272 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuild.cpp
|
| 3686358eaccd713c89f1d2abeda4f9ef73fbd702 |
16-Aug-2009 |
Jakob Stoklund Olesen <stoklund@2pi.dk> |
Be more clever about regclasses in ScheduleDAGSDNodes::EmitCopyFromReg.
If two uses of a CopyFromReg want different regclasses, first try a common
sub-class, then fall back on the copy emitted in AddRegisterOperand. There is
no need for an assert here. The cross-class joiner usually cleans up nicely.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79193 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGSDNodesEmit.cpp
|
| f7e8af925cee687b94ed4b84235cf0efed75a68b |
16-Aug-2009 |
Jakob Stoklund Olesen <stoklund@2pi.dk> |
Be more clever about regclasses in ScheduleDAGSDNodes::EmitCopyFromReg.
If two uses of a CopyFromReg want different regclasses, first try a common
sub-class, then fall back on the copy emitted in AddRegisterOperand. There is
no need for an assert here. The cross-class joiner usually cleans up nicely.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79193 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGSDNodesEmit.cpp
|
| 4e3d397c057e265fbd055301010139a0da8ed621 |
16-Aug-2009 |
Evan Cheng <evan.cheng@apple.com> |
Needs to check whether unaligned load / store of i64 is legal here.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79150 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 8a9d5f96a5681ffe6e48dab9c8c383e71fd82a2c |
16-Aug-2009 |
Evan Cheng <evan.cheng@apple.com> |
Needs to check whether unaligned load / store of i64 is legal here.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79150 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 8e8abb34c093ceec4976fca482502a00990ae25a |
15-Aug-2009 |
Benjamin Kramer <benny.kra@googlemail.com> |
Unbreak build. Evan, please make sure my changes are correct.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79133 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
electionDAG.cpp
argetLowering.cpp
|
| bc037cfcdef8e88274d7dd167fb9d8ba545f2229 |
15-Aug-2009 |
Benjamin Kramer <benny.kra@googlemail.com> |
Unbreak build. Evan, please make sure my changes are correct.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79133 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
electionDAG.cpp
argetLowering.cpp
|
| 9505df6da56cc2e7bbbed44dc6f581520a6bbbcd |
15-Aug-2009 |
Evan Cheng <evan.cheng@apple.com> |
80 col violations.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79087 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| e96507c73111d88743a15db6d6329f4fbdde7dec |
15-Aug-2009 |
Evan Cheng <evan.cheng@apple.com> |
80 col violations.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79087 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 788fabf85cc009b61c75e9959fbdc6be116b6c62 |
15-Aug-2009 |
Dan Gohman <gohman@apple.com> |
Simplify this code to not depend as much on CurMBB.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79068 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuild.cpp
|
| 0d24bfbf92ee0c3fa604df6c2099f46ec9ad3a94 |
15-Aug-2009 |
Dan Gohman <gohman@apple.com> |
Simplify this code to not depend as much on CurMBB.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79068 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuild.cpp
|
| cdab71fbe3e03cd2481f648ce9f8ea24e3fc73a5 |
14-Aug-2009 |
Anton Korobeynikov <asl@math.spbu.ru> |
Allow targets to specify their choice of calling conventions per
libcall. Take advantage of this in the ARM backend to rectify broken
choice of CC when hard float is in effect. PIC16 may want to see if
it could be of use in MakePIC16Libcall, which works unchanged.
Patch by Sandeep!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79033 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
egalizeTypes.cpp
electionDAG.cpp
argetLowering.cpp
|
| 72977a45a8ad9d9524c9b49399e89fb9a3a676ed |
14-Aug-2009 |
Anton Korobeynikov <asl@math.spbu.ru> |
Allow targets to specify their choice of calling conventions per
libcall. Take advantage of this in the ARM backend to rectify broken
choice of CC when hard float is in effect. PIC16 may want to see if
it could be of use in MakePIC16Libcall, which works unchanged.
Patch by Sandeep!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79033 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
egalizeTypes.cpp
electionDAG.cpp
argetLowering.cpp
|
| 83a83d4cca16132415a22d99c6be5ae76fc0a8f9 |
14-Aug-2009 |
Evan Cheng <evan.cheng@apple.com> |
Indentation change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78978 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuild.cpp
|
| 7cefd80bd52f239dbb002abdc1c4a7a5f76dd47e |
14-Aug-2009 |
Evan Cheng <evan.cheng@apple.com> |
Indentation change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78978 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuild.cpp
|
| 35b4707edb32008b1a7976dcbf3920b1160fc1c6 |
13-Aug-2009 |
Owen Anderson <resistor@mac.com> |
Push LLVMContexts through the IntegerType APIs.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78948 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
egalizeDAG.cpp
electionDAG.cpp
electionDAGBuild.cpp
electionDAGISel.cpp
argetLowering.cpp
|
| 1d0be15f89cb5056e20e2d24faa8d6afb1573bca |
13-Aug-2009 |
Owen Anderson <resistor@mac.com> |
Push LLVMContexts through the IntegerType APIs.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78948 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
egalizeDAG.cpp
electionDAG.cpp
electionDAGBuild.cpp
electionDAGISel.cpp
argetLowering.cpp
|
| 88c6f889620a5d749e86df844da667f5d91e717b |
13-Aug-2009 |
David Goodwin <david_goodwin@apple.com> |
Add callback to allow target to adjust latency of schedule dependency edge.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78910 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGSDNodes.cpp
|
| 710461688bba935f0ad5c75da7fec2ad0f225c00 |
13-Aug-2009 |
David Goodwin <david_goodwin@apple.com> |
Add callback to allow target to adjust latency of schedule dependency edge.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78910 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGSDNodes.cpp
|
| 77f4eb53ebe58e44972a4f99d8b67a91dcbfe2cb |
12-Aug-2009 |
Owen Anderson <resistor@mac.com> |
Add contexts to some of the MVT APIs. No functionality change yet, just the infrastructure work needed to get the contexts to where they need to be first.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78759 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
astISel.cpp
egalizeDAG.cpp
egalizeFloatTypes.cpp
egalizeIntegerTypes.cpp
egalizeTypes.cpp
egalizeTypes.h
egalizeTypesGeneric.cpp
egalizeVectorTypes.cpp
electionDAG.cpp
electionDAGBuild.cpp
argetLowering.cpp
|
| 23b9b19b1a5a00faa9fce0788155c7dbfd00bfb1 |
12-Aug-2009 |
Owen Anderson <resistor@mac.com> |
Add contexts to some of the MVT APIs. No functionality change yet, just the infrastructure work needed to get the contexts to where they need to be first.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78759 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
astISel.cpp
egalizeDAG.cpp
egalizeFloatTypes.cpp
egalizeIntegerTypes.cpp
egalizeTypes.cpp
egalizeTypes.h
egalizeTypesGeneric.cpp
egalizeVectorTypes.cpp
electionDAG.cpp
electionDAGBuild.cpp
argetLowering.cpp
|
| 2dd68a20cb6e307a7e46dfa363b8ba75d5072b01 |
11-Aug-2009 |
Owen Anderson <resistor@mac.com> |
Fix warnings.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78725 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
electionDAG.cpp
|
| 766b5efd99c01e26f00f22d81b57d1385b3d2ab0 |
11-Aug-2009 |
Owen Anderson <resistor@mac.com> |
Fix warnings.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78725 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
electionDAG.cpp
|
| 36e3a6e235ee8b21eba777686b4508f71248b869 |
11-Aug-2009 |
Owen Anderson <resistor@mac.com> |
Split EVT into MVT and EVT, the former representing _just_ a primitive type, while
the latter is capable of representing either a primitive or an extended type.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78713 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
astISel.cpp
egalizeDAG.cpp
egalizeFloatTypes.cpp
egalizeIntegerTypes.cpp
egalizeTypes.h
egalizeTypesGeneric.cpp
egalizeVectorOps.cpp
egalizeVectorTypes.cpp
cheduleDAGFast.cpp
cheduleDAGRRList.cpp
cheduleDAGSDNodes.cpp
cheduleDAGSDNodesEmit.cpp
electionDAG.cpp
electionDAGBuild.cpp
electionDAGISel.cpp
electionDAGPrinter.cpp
argetLowering.cpp
|
| 825b72b0571821bf2d378749f69d6c4cfb52d2f9 |
11-Aug-2009 |
Owen Anderson <resistor@mac.com> |
Split EVT into MVT and EVT, the former representing _just_ a primitive type, while
the latter is capable of representing either a primitive or an extended type.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78713 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
astISel.cpp
egalizeDAG.cpp
egalizeFloatTypes.cpp
egalizeIntegerTypes.cpp
egalizeTypes.h
egalizeTypesGeneric.cpp
egalizeVectorOps.cpp
egalizeVectorTypes.cpp
cheduleDAGFast.cpp
cheduleDAGRRList.cpp
cheduleDAGSDNodes.cpp
cheduleDAGSDNodesEmit.cpp
electionDAG.cpp
electionDAGBuild.cpp
electionDAGISel.cpp
electionDAGPrinter.cpp
argetLowering.cpp
|
| 45f13d4db24058e9ad3aa3e818b12758b9d8664c |
11-Aug-2009 |
Dan Gohman <gohman@apple.com> |
Tidy #includes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78677 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| ffef8acc3e3398bdd04e947c7949befdd52faf86 |
11-Aug-2009 |
Dan Gohman <gohman@apple.com> |
Tidy #includes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78677 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 29feb6a583204de0948def1d59d186e4b837ef52 |
11-Aug-2009 |
Jim Grosbach <grosbach@apple.com> |
SjLj based exception handling unwinding support. This patch is nasty, brutish
and short. Well, it's kinda short. Definitely nasty and brutish.
The front-end generates the register/unregister calls into the SjLj runtime,
call-site indices and landing pad dispatch. The back end fills in the LSDA
with the call-site information provided by the front end. Catch blocks are
not yet implemented.
Built on Darwin and verified no llvm-core "make check" regressions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78625 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
electionDAGBuild.cpp
|
| 1b747ad8a0694b86e8d98a8b9a05ddfe74ec0cd3 |
11-Aug-2009 |
Jim Grosbach <grosbach@apple.com> |
SjLj based exception handling unwinding support. This patch is nasty, brutish
and short. Well, it's kinda short. Definitely nasty and brutish.
The front-end generates the register/unregister calls into the SjLj runtime,
call-site indices and landing pad dispatch. The back end fills in the LSDA
with the call-site information provided by the front end. Catch blocks are
not yet implemented.
Built on Darwin and verified no llvm-core "make check" regressions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78625 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
electionDAGBuild.cpp
|
| d546ef7f4201acea72797d80d21f50451646c589 |
11-Aug-2009 |
Dan Gohman <gohman@apple.com> |
Fix a bug in the DAGCombiner's handling of multiple linked
MERGE_VALUES nodes. Replacing the result values with the
operands in one MERGE_VALUES node may cause another
MERGE_VALUES node be CSE'd with the first one, and bring
its uses along, so that the first one isn't dead, as this
code expects. Fix this by iterating until the node is
really dead. This fixes PR4699.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78619 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 00edf39b3447db1b8dc0030d716ef70675f55755 |
11-Aug-2009 |
Dan Gohman <gohman@apple.com> |
Fix a bug in the DAGCombiner's handling of multiple linked
MERGE_VALUES nodes. Replacing the result values with the
operands in one MERGE_VALUES node may cause another
MERGE_VALUES node be CSE'd with the first one, and bring
its uses along, so that the first one isn't dead, as this
code expects. Fix this by iterating until the node is
really dead. This fixes PR4699.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78619 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 3f20cb6d9679205620a4fd51d3ec9aa73bf3a508 |
11-Aug-2009 |
Dan Gohman <gohman@apple.com> |
Fix a bug where DAGCombine was producing an illegal ConstantFP
node after legalize, and remove the workaround code from the
ARM backend.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78615 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| a407ca16c29b4e91ef3cf9e188ac2e3ab6920cd8 |
11-Aug-2009 |
Dan Gohman <gohman@apple.com> |
Fix a bug where DAGCombine was producing an illegal ConstantFP
node after legalize, and remove the workaround code from the
ARM backend.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78615 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| ac9de036dc0e4065ee2c03419f11515a34ce505e |
11-Aug-2009 |
Owen Anderson <resistor@mac.com> |
Rename MVT to EVT, in preparation for splitting SimpleValueType out into its own struct type.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78610 91177308-0d34-0410-b5e6-96231b3b80d8
allingConvLower.cpp
AGCombiner.cpp
astISel.cpp
egalizeDAG.cpp
egalizeFloatTypes.cpp
egalizeIntegerTypes.cpp
egalizeTypes.cpp
egalizeTypes.h
egalizeTypesGeneric.cpp
egalizeVectorOps.cpp
egalizeVectorTypes.cpp
cheduleDAGFast.cpp
cheduleDAGRRList.cpp
cheduleDAGSDNodes.cpp
cheduleDAGSDNodesEmit.cpp
electionDAG.cpp
electionDAGBuild.cpp
electionDAGBuild.h
electionDAGISel.cpp
electionDAGPrinter.cpp
argetLowering.cpp
|
| e50ed30282bb5b4a9ed952580523f2dda16215ac |
11-Aug-2009 |
Owen Anderson <resistor@mac.com> |
Rename MVT to EVT, in preparation for splitting SimpleValueType out into its own struct type.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78610 91177308-0d34-0410-b5e6-96231b3b80d8
allingConvLower.cpp
AGCombiner.cpp
astISel.cpp
egalizeDAG.cpp
egalizeFloatTypes.cpp
egalizeIntegerTypes.cpp
egalizeTypes.cpp
egalizeTypes.h
egalizeTypesGeneric.cpp
egalizeVectorOps.cpp
egalizeVectorTypes.cpp
cheduleDAGFast.cpp
cheduleDAGRRList.cpp
cheduleDAGSDNodes.cpp
cheduleDAGSDNodesEmit.cpp
electionDAG.cpp
electionDAGBuild.cpp
electionDAGBuild.h
electionDAGISel.cpp
electionDAGPrinter.cpp
argetLowering.cpp
|
| 27bfb67d9ac01e9bf33a7b105c7fe842525b7582 |
10-Aug-2009 |
Owen Anderson <resistor@mac.com> |
Start moving TargetLowering away from using full MVTs and towards SimpleValueType, which will simplify the privatization of IntegerType in the future.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78584 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
electionDAG.cpp
electionDAGBuild.cpp
argetLowering.cpp
|
| 77547befdc430633aaedf4130ddf17d953ed552e |
10-Aug-2009 |
Owen Anderson <resistor@mac.com> |
Start moving TargetLowering away from using full MVTs and towards SimpleValueType, which will simplify the privatization of IntegerType in the future.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78584 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
electionDAG.cpp
electionDAGBuild.cpp
argetLowering.cpp
|
| c1a090ff401564c2b00b3a5f4942fecf03cc16fe |
10-Aug-2009 |
Dan Gohman <gohman@apple.com> |
Make this comment more closely reflect the code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78569 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| eb1fedc62d0a3e3901d79edf40a585747dde2e1e |
10-Aug-2009 |
Dan Gohman <gohman@apple.com> |
Make this comment more closely reflect the code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78569 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 4b9e0c7cc6946cfab67e08d3f484da8a4fecff17 |
08-Aug-2009 |
Jakob Stoklund Olesen <stoklund@2pi.dk> |
Don't build illegal ops in DAGCombiner::SimplifyBinOpWithSameOpcodeHands().
Blackfin supports and/or/xor on i32 but not on i16. Teach
DAGCombiner::SimplifyBinOpWithSameOpcodeHands to not produce illegal nodes
after legalize ops.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78497 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 17421d81fdbc94dbd8b3549b095303baaf52e689 |
08-Aug-2009 |
Jakob Stoklund Olesen <stoklund@2pi.dk> |
Don't build illegal ops in DAGCombiner::SimplifyBinOpWithSameOpcodeHands().
Blackfin supports and/or/xor on i32 but not on i16. Teach
DAGCombiner::SimplifyBinOpWithSameOpcodeHands to not produce illegal nodes
after legalize ops.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78497 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 0be51482b5d2786f28747f46dc9ec98541234439 |
07-Aug-2009 |
Dale Johannesen <dalej@apple.com> |
Use stripPointerCasts instead of partially rewriting it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78350 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuild.cpp
|
| 76711246d9905575290fa7eebac4d1cad6000c60 |
07-Aug-2009 |
Dale Johannesen <dalej@apple.com> |
Use stripPointerCasts instead of partially rewriting it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78350 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuild.cpp
|
| e9a0775fe34ff3e86c70e41ccd7f2d94bf62c9c1 |
06-Aug-2009 |
Dan Gohman <gohman@apple.com> |
Add assertion checks after the calls to LowerFormalArguments, LowerCall,
and LowerReturn, to verify that the targets' hooks have respected some
of their postconditions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78312 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuild.cpp
|
| 5e86606f457d074769c1ee95aeaf718a5853f212 |
06-Aug-2009 |
Dan Gohman <gohman@apple.com> |
Add assertion checks after the calls to LowerFormalArguments, LowerCall,
and LowerReturn, to verify that the targets' hooks have respected some
of their postconditions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78312 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuild.cpp
|
| aeee93f666ef04039e6bed630027c6967d1fe021 |
06-Aug-2009 |
Dan Gohman <gohman@apple.com> |
Remove an over-aggressive assert. Functions with empty struct return
types don't have any return values, from CodeGen's perspective.
This fixes PR4688.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78311 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuild.cpp
|
| e483feded9a66b9a634f3dbdbf21eaaa65c69781 |
06-Aug-2009 |
Dan Gohman <gohman@apple.com> |
Remove an over-aggressive assert. Functions with empty struct return
types don't have any return values, from CodeGen's perspective.
This fixes PR4688.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78311 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuild.cpp
|
| 0cee5f4752c0ee0c90afaf20bb63d6cff167b92d |
06-Aug-2009 |
Dan Gohman <gohman@apple.com> |
Fix a few places in DAGCombiner that were creating all-ones-bits
and high-bits values in ways that weren't correct for integer
types wider than 64 bits. This fixes a miscompile in
PPMacroExpansion.cpp in clang on x86-64.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78295 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 5cbd37e5056f6a715333553e9d529e0ddddb3e78 |
06-Aug-2009 |
Dan Gohman <gohman@apple.com> |
Fix a few places in DAGCombiner that were creating all-ones-bits
and high-bits values in ways that weren't correct for integer
types wider than 64 bits. This fixes a miscompile in
PPMacroExpansion.cpp in clang on x86-64.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78295 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 9178de1d2b1e0787539b83ed54ad505ff13169e8 |
05-Aug-2009 |
Dan Gohman <gohman@apple.com> |
Major calling convention code refactoring.
Instead of awkwardly encoding calling-convention information with ISD::CALL,
ISD::FORMAL_ARGUMENTS, ISD::RET, and ISD::ARG_FLAGS nodes, TargetLowering
provides three virtual functions for targets to override:
LowerFormalArguments, LowerCall, and LowerRet, which replace the custom
lowering done on the special nodes. They provide the same information, but
in a more immediately usable format.
This also reworks much of the target-independent tail call logic. The
decision of whether or not to perform a tail call is now cleanly split
between target-independent portions, and the target dependent portion
in IsEligibleForTailCallOptimization.
This also synchronizes all in-tree targets, to help enable future
refactoring and feature work.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78142 91177308-0d34-0410-b5e6-96231b3b80d8
allingConvLower.cpp
egalizeDAG.cpp
egalizeTypes.cpp
egalizeVectorOps.cpp
electionDAG.cpp
electionDAGBuild.cpp
electionDAGBuild.h
electionDAGISel.cpp
argetLowering.cpp
|
| 98ca4f2a325f72374a477f9deba7d09e8999c29b |
05-Aug-2009 |
Dan Gohman <gohman@apple.com> |
Major calling convention code refactoring.
Instead of awkwardly encoding calling-convention information with ISD::CALL,
ISD::FORMAL_ARGUMENTS, ISD::RET, and ISD::ARG_FLAGS nodes, TargetLowering
provides three virtual functions for targets to override:
LowerFormalArguments, LowerCall, and LowerRet, which replace the custom
lowering done on the special nodes. They provide the same information, but
in a more immediately usable format.
This also reworks much of the target-independent tail call logic. The
decision of whether or not to perform a tail call is now cleanly split
between target-independent portions, and the target dependent portion
in IsEligibleForTailCallOptimization.
This also synchronizes all in-tree targets, to help enable future
refactoring and feature work.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78142 91177308-0d34-0410-b5e6-96231b3b80d8
allingConvLower.cpp
egalizeDAG.cpp
egalizeTypes.cpp
egalizeVectorOps.cpp
electionDAG.cpp
electionDAGBuild.cpp
electionDAGBuild.h
electionDAGISel.cpp
argetLowering.cpp
|
| dd5cdf6d64445371826b9223a24210e92a419919 |
04-Aug-2009 |
Dan Gohman <gohman@apple.com> |
Propogate the Depth argument when calling
TLI.computeMaskedBitsForTargetNode from ComputeMaskedBits, since
the former may call back into the latter. This fixes a major
compile time problem on a testcase that happnened to hit this
in a particularly bad way, PR4643.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78023 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 206ad10c14e5dda3bf7b2dc8faf84b2f75124844 |
04-Aug-2009 |
Dan Gohman <gohman@apple.com> |
Propogate the Depth argument when calling
TLI.computeMaskedBitsForTargetNode from ComputeMaskedBits, since
the former may call back into the latter. This fixes a major
compile time problem on a testcase that happnened to hit this
in a particularly bad way, PR4643.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78023 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 564f681bc2473228458c54d34cf0f95a174553aa |
03-Aug-2009 |
Bob Wilson <bob.wilson@apple.com> |
Revert 77974. It breaks 3 of the ARM tests.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77982 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeFloatTypes.cpp
|
| 6e7a85c075ac1fc8fc7f11cad07e51839c80ee39 |
03-Aug-2009 |
Bob Wilson <bob.wilson@apple.com> |
Revert 77974. It breaks 3 of the ARM tests.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77982 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeFloatTypes.cpp
|
| a76e198fbda9797ec9dc173a4b8abc9e6b5dc5fb |
03-Aug-2009 |
Sanjiv Gupta <sanjiv.gupta@microchip.com> |
Allow targets to custom handle softening of results or operands before trying the standard stuff.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77974 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeFloatTypes.cpp
|
| 2caf1b212e2db36c52f3a7c3e391ea2800802c60 |
03-Aug-2009 |
Sanjiv Gupta <sanjiv.gupta@microchip.com> |
Allow targets to custom handle softening of results or operands before trying the standard stuff.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77974 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeFloatTypes.cpp
|
| 98c00ab7ee4842f1faa79d2fcf46476d02c4eb99 |
03-Aug-2009 |
Benjamin Kramer <benny.kra@googlemail.com> |
llvm_report_error already prints "LLVM ERROR:". So stop reporting errors like "LLVM ERROR: llvm: error:" or "LLVM ERROR: ERROR:".
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77971 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuild.cpp
|
| d5fe92efbc1774ada25a1cfa18009bfc5c6e625c |
03-Aug-2009 |
Benjamin Kramer <benny.kra@googlemail.com> |
llvm_report_error already prints "LLVM ERROR:". So stop reporting errors like "LLVM ERROR: llvm: error:" or "LLVM ERROR: ERROR:".
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77971 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuild.cpp
|
| 8804e0ab44a86d0ca176575161b8ecf4ac9e6b57 |
02-Aug-2009 |
Dan Gohman <gohman@apple.com> |
Avoid forming a SELECT_CC in a type that the target doesn't
support. This isn't immediately interesting, because Legalize
ends up lowering SELECT_CC if the target doesn't support it,
but this simplifies the process.
Also, if the SELECT_CC would be expanded in Legalize, it
can potentially end up with two copies of the condition
expression. By leaving it as SELECT+SETCC, the SELECT can be
expanded into two SELECTs that use a single SETCC.
The two comparisons are usually CSE'd, but depending on
when various expressions get legalized, the comparison
expression could involve calls to library functions, such
that the comparison expression may not be able to be CSE'd.
This will be needed by a future patch.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77896 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 4ea480499c40cd7e28bf35cacda33ccbab2aab07 |
02-Aug-2009 |
Dan Gohman <gohman@apple.com> |
Avoid forming a SELECT_CC in a type that the target doesn't
support. This isn't immediately interesting, because Legalize
ends up lowering SELECT_CC if the target doesn't support it,
but this simplifies the process.
Also, if the SELECT_CC would be expanded in Legalize, it
can potentially end up with two copies of the condition
expression. By leaving it as SELECT+SETCC, the SELECT can be
expanded into two SELECTs that use a single SETCC.
The two comparisons are usually CSE'd, but depending on
when various expressions get legalized, the comparison
expression could involve calls to library functions, such
that the comparison expression may not be able to be CSE'd.
This will be needed by a future patch.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77896 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 3625126a1e082647476e760bf416889ed2a8f021 |
01-Aug-2009 |
Dan Gohman <gohman@apple.com> |
Print the target flags as an int instead of a char, as they aren't
actually characters.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77794 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 1944da1c5af82e95c9a4970a7f6a7310db0f6707 |
01-Aug-2009 |
Dan Gohman <gohman@apple.com> |
Print the target flags as an int instead of a char, as they aren't
actually characters.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77794 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 8b797f5ab7527c243fa1d1310c083100ca6bdd9b |
01-Aug-2009 |
Dan Gohman <gohman@apple.com> |
Delete a redundant variable.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77774 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 8a0336a44bff2fcabc2de07cf482707c9508012f |
01-Aug-2009 |
Dan Gohman <gohman@apple.com> |
Delete a redundant variable.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77774 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| fbd8829cd08d286b79f44ba24bb96a6be4b70a5e |
01-Aug-2009 |
Dan Gohman <gohman@apple.com> |
Minor code simplifications.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77769 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| f7d6cd46e920776bb33913b2498347cf99358dc4 |
01-Aug-2009 |
Dan Gohman <gohman@apple.com> |
Minor code simplifications.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77769 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 4021660154c087c5a57a8018569ca41951dcc4bb |
01-Aug-2009 |
Dan Gohman <gohman@apple.com> |
SelectionDAGISel no longer needs to check hasAvailableExternallyLinkage,
as it is now a MachineFunctionPass, and MachineFunctionPass now handles
this.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77760 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| c32304e56e85b89f426354dddf98c765eeb16333 |
01-Aug-2009 |
Dan Gohman <gohman@apple.com> |
SelectionDAGISel no longer needs to check hasAvailableExternallyLinkage,
as it is now a MachineFunctionPass, and MachineFunctionPass now handles
this.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77760 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 03354410a05e9b2d4af041326bcc7c363880e703 |
01-Aug-2009 |
Dan Gohman <gohman@apple.com> |
SelectionDAGISel does not "preserve all", since it makes lots of changes
to the MachineFunction.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77753 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| a3477fe06df794e0eae26ea243f25912c619a6c4 |
01-Aug-2009 |
Dan Gohman <gohman@apple.com> |
SelectionDAGISel does not "preserve all", since it makes lots of changes
to the MachineFunction.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77753 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| b067fe1f969786a0971638338e4122fe78d81595 |
01-Aug-2009 |
Dan Gohman <gohman@apple.com> |
Use a range insert instead of an explicit loop.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77752 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeTypes.cpp
|
| 2d147c440178044aa2af1d9c276f9c4e540fcb8e |
01-Aug-2009 |
Dan Gohman <gohman@apple.com> |
Use a range insert instead of an explicit loop.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77752 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeTypes.cpp
|
| 45ab48e34fe0f640ee1587f6edb157a03b02a315 |
01-Aug-2009 |
Bob Wilson <bob.wilson@apple.com> |
Allow target intrinsics that return multiple values, i.e., struct types,
in SelectionDAGLowering::visitTargetIntrinsic.
This removes a bit of special-case code for vector types. After staring
at it for a while, I managed to convince myself that it is not necessary.
The only case where TLI.getValueType() differs from MVT::getMVT is for iPTR,
so this code could potentially make a difference for a vector of pointers.
But, it looks like that is not supported. Calling TLI.getValueType() on
a vector of pointers leads to the following sequence of calls:
TargetLowering::getValueType
MVT::getMVT
MVT::getVectorVT(iPTR, num elements)
MVT::getExtendedVectorVT
MVT::getTypeForMVT for iPTR
assertion fails "Type is not extended!"
So, unless I'm really missing something, this bit of code is irrelevant to
the current version of LLVM, which is consistent with the fact that I don't
see this code in other similar places.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77747 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuild.cpp
|
| 8d91955d2b985bfbb70aeadcd5fed0d68f939000 |
01-Aug-2009 |
Bob Wilson <bob.wilson@apple.com> |
Allow target intrinsics that return multiple values, i.e., struct types,
in SelectionDAGLowering::visitTargetIntrinsic.
This removes a bit of special-case code for vector types. After staring
at it for a while, I managed to convince myself that it is not necessary.
The only case where TLI.getValueType() differs from MVT::getMVT is for iPTR,
so this code could potentially make a difference for a vector of pointers.
But, it looks like that is not supported. Calling TLI.getValueType() on
a vector of pointers leads to the following sequence of calls:
TargetLowering::getValueType
MVT::getMVT
MVT::getVectorVT(iPTR, num elements)
MVT::getExtendedVectorVT
MVT::getTypeForMVT for iPTR
assertion fails "Type is not extended!"
So, unless I'm really missing something, this bit of code is irrelevant to
the current version of LLVM, which is consistent with the fact that I don't
see this code in other similar places.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77747 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuild.cpp
|
| aac2837c17cafaf4ff6487a54bab42e6618b5945 |
31-Jul-2009 |
Owen Anderson <resistor@mac.com> |
Move a few more APIs back to 2.5 forms. The only remaining ones left to change back are
metadata related, which I'm waiting on to avoid conflicting with Devang.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77721 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
|
| a7235ea7245028a0723e8ab7fd011386b3900777 |
31-Jul-2009 |
Owen Anderson <resistor@mac.com> |
Move a few more APIs back to 2.5 forms. The only remaining ones left to change back are
metadata related, which I'm waiting on to avoid conflicting with Devang.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77721 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
|
| fdf9ee278b684165014055069f407362bf9044f3 |
31-Jul-2009 |
Dan Gohman <gohman@apple.com> |
Reapply r77654 with a fix: MachineFunctionPass's getAnalysisUsage
shouldn't do AU.setPreservesCFG(), because even though CodeGen passes
don't modify the LLVM IR CFG, they may modify the MachineFunction CFG,
and passes like MachineLoop are registered with isCFGOnly set to true.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77691 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| ad2afc2a421a0e41603d5eee412d4d8c77e9bc1c |
31-Jul-2009 |
Dan Gohman <gohman@apple.com> |
Reapply r77654 with a fix: MachineFunctionPass's getAnalysisUsage
shouldn't do AU.setPreservesCFG(), because even though CodeGen passes
don't modify the LLVM IR CFG, they may modify the MachineFunction CFG,
and passes like MachineLoop are registered with isCFGOnly set to true.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77691 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 4f720fae677b937ace6ffd2bdbfb670ddbadc663 |
31-Jul-2009 |
Owen Anderson <resistor@mac.com> |
Move getTrue() and getFalse() to 2.5-like APIs.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77685 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuild.cpp
|
| 5defacc6e605f4651c6300237cef8e9bb2eb6d0e |
31-Jul-2009 |
Owen Anderson <resistor@mac.com> |
Move getTrue() and getFalse() to 2.5-like APIs.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77685 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuild.cpp
|
| 696630149187f2f0f435c02c3a7fdc85817a7638 |
31-Jul-2009 |
Daniel Dunbar <daniel@zuster.org> |
Revert r77654, it appears to be causing llvm-gcc bootstrap failures, and many
failures when building assorted projects with clang.
--- Reverse-merging r77654 into '.':
U include/llvm/CodeGen/Passes.h
U include/llvm/CodeGen/MachineFunctionPass.h
U include/llvm/CodeGen/MachineFunction.h
U include/llvm/CodeGen/LazyLiveness.h
U include/llvm/CodeGen/SelectionDAGISel.h
D include/llvm/CodeGen/MachineFunctionAnalysis.h
U include/llvm/Function.h
U lib/Target/CellSPU/SPUISelDAGToDAG.cpp
U lib/Target/PowerPC/PPCISelDAGToDAG.cpp
U lib/CodeGen/LLVMTargetMachine.cpp
U lib/CodeGen/MachineVerifier.cpp
U lib/CodeGen/MachineFunction.cpp
U lib/CodeGen/PrologEpilogInserter.cpp
U lib/CodeGen/MachineLoopInfo.cpp
U lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
D lib/CodeGen/MachineFunctionAnalysis.cpp
D lib/CodeGen/MachineFunctionPass.cpp
U lib/CodeGen/LiveVariables.cpp
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77661 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| c5b19b21d84814d19692a6bbea11fbd135f4b094 |
31-Jul-2009 |
Daniel Dunbar <daniel@zuster.org> |
Revert r77654, it appears to be causing llvm-gcc bootstrap failures, and many
failures when building assorted projects with clang.
--- Reverse-merging r77654 into '.':
U include/llvm/CodeGen/Passes.h
U include/llvm/CodeGen/MachineFunctionPass.h
U include/llvm/CodeGen/MachineFunction.h
U include/llvm/CodeGen/LazyLiveness.h
U include/llvm/CodeGen/SelectionDAGISel.h
D include/llvm/CodeGen/MachineFunctionAnalysis.h
U include/llvm/Function.h
U lib/Target/CellSPU/SPUISelDAGToDAG.cpp
U lib/Target/PowerPC/PPCISelDAGToDAG.cpp
U lib/CodeGen/LLVMTargetMachine.cpp
U lib/CodeGen/MachineVerifier.cpp
U lib/CodeGen/MachineFunction.cpp
U lib/CodeGen/PrologEpilogInserter.cpp
U lib/CodeGen/MachineLoopInfo.cpp
U lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
D lib/CodeGen/MachineFunctionAnalysis.cpp
D lib/CodeGen/MachineFunctionPass.cpp
U lib/CodeGen/LiveVariables.cpp
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77661 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 7b829a2e9945416837d3ce0dee9648b7b6810c97 |
31-Jul-2009 |
Dan Gohman <gohman@apple.com> |
Manage MachineFunctions with an analysis Pass instead of the Annotable
mechanism. To support this, make MachineFunctionPass a little more
complete.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77654 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 933c762371fe8cc6e2ef5d00d6866f4924852fed |
31-Jul-2009 |
Dan Gohman <gohman@apple.com> |
Manage MachineFunctions with an analysis Pass instead of the Annotable
mechanism. To support this, make MachineFunctionPass a little more
complete.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77654 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| b99ecca4954cbc3fbff77ffb252952cc19c4d799 |
31-Jul-2009 |
Owen Anderson <resistor@mac.com> |
Move more code back to 2.5 APIs.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77635 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 9e9a0d5fc26878e51a58a8b57900fcbf952c2691 |
31-Jul-2009 |
Owen Anderson <resistor@mac.com> |
Move more code back to 2.5 APIs.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77635 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| f4e64d64cace387219b5c8f9c0ec6e362d589c9e |
30-Jul-2009 |
Sanjiv Gupta <sanjiv.gupta@microchip.com> |
Allow targets to define libcall names for mem(cpy,set,move) intrinsics, rather than hardcoding them in DAG lowering.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77586 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
argetLowering.cpp
|
| a114baa5bf0d70aed8b8cf576a864005c0d6a128 |
30-Jul-2009 |
Sanjiv Gupta <sanjiv.gupta@microchip.com> |
Allow targets to define libcall names for mem(cpy,set,move) intrinsics, rather than hardcoding them in DAG lowering.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77586 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
argetLowering.cpp
|
| b723fb501aee51fa80022635611a9d38b1e044df |
30-Jul-2009 |
Evan Cheng <evan.cheng@apple.com> |
Optimize some common usage patterns of atomic built-ins __sync_add_and_fetch() and __sync_sub_and_fetch.
When the return value is not used (i.e. only care about the value in the memory), x86 does not have to use add to implement these. Instead, it can use add, sub, inc, dec instructions with the "lock" prefix.
This is currently implemented using a bit of instruction selection trick. The issue is the target independent pattern produces one output and a chain and we want to map it into one that just output a chain. The current trick is to select it into a merge_values with the first definition being an implicit_def. The proper solution is to add new ISD opcodes for the no-output variant. DAG combiner can then transform the node before it gets to target node selection.
Problem #2 is we are adding a whole bunch of x86 atomic instructions when in fact these instructions are identical to the non-lock versions. We need a way to add target specific information to target nodes and have this information carried over to machine instructions. Asm printer (or JIT) can use this information to add the "lock" prefix.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77582 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGSDNodesEmit.cpp
|
| 37b7387da90ffd42d28ad0f08fca00b684294b2c |
30-Jul-2009 |
Evan Cheng <evan.cheng@apple.com> |
Optimize some common usage patterns of atomic built-ins __sync_add_and_fetch() and __sync_sub_and_fetch.
When the return value is not used (i.e. only care about the value in the memory), x86 does not have to use add to implement these. Instead, it can use add, sub, inc, dec instructions with the "lock" prefix.
This is currently implemented using a bit of instruction selection trick. The issue is the target independent pattern produces one output and a chain and we want to map it into one that just output a chain. The current trick is to select it into a merge_values with the first definition being an implicit_def. The proper solution is to add new ISD opcodes for the no-output variant. DAG combiner can then transform the node before it gets to target node selection.
Problem #2 is we are adding a whole bunch of x86 atomic instructions when in fact these instructions are identical to the non-lock versions. We need a way to add target specific information to target nodes and have this information carried over to machine instructions. Asm printer (or JIT) can use this information to add the "lock" prefix.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77582 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGSDNodesEmit.cpp
|
| 6b6e2d9392782724c48110bcca4bee2c8fbbd7b9 |
30-Jul-2009 |
Owen Anderson <resistor@mac.com> |
Move types back to the 2.5 API.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77516 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
egalizeDAG.cpp
egalizeTypes.cpp
egalizeTypesGeneric.cpp
egalizeVectorTypes.cpp
electionDAG.cpp
electionDAGBuild.cpp
|
| debcb01b0f0a15f568ca69e8f288fade4bfc7297 |
30-Jul-2009 |
Owen Anderson <resistor@mac.com> |
Move types back to the 2.5 API.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77516 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
egalizeDAG.cpp
egalizeTypes.cpp
egalizeTypesGeneric.cpp
egalizeVectorTypes.cpp
electionDAG.cpp
electionDAGBuild.cpp
|
| a0c38e6f80d46291fd3ce11c7b82026fd8745308 |
29-Jul-2009 |
Chris Lattner <sabre@nondot.org> |
inline the global 'getInstrOperandRegClass' function into its callers
now that TargetOperandInfo does the heavy lifting.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77508 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGSDNodesEmit.cpp
|
| 2a3868849438a0a0ad4f9a50f2b94eb1639b554e |
29-Jul-2009 |
Chris Lattner <sabre@nondot.org> |
inline the global 'getInstrOperandRegClass' function into its callers
now that TargetOperandInfo does the heavy lifting.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77508 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGSDNodesEmit.cpp
|
| 5666e684f4a22393526786ce6cd8c354b0a30ced |
29-Jul-2009 |
Benjamin Kramer <benny.kra@googlemail.com> |
Remove now unused Context variables.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77495 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 6c1e983a1756e914b328644e6cab7b4a39eb7853 |
29-Jul-2009 |
Benjamin Kramer <benny.kra@googlemail.com> |
Remove now unused Context variables.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77495 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 02b48c3be2112c64d8fc9cf5419c9c8d4ec30b71 |
29-Jul-2009 |
Owen Anderson <resistor@mac.com> |
Move ConstantExpr to 2.5 API.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77494 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| baf3c404409d5e47b13984a7f95bfbd6d1f2e79e |
29-Jul-2009 |
Owen Anderson <resistor@mac.com> |
Move ConstantExpr to 2.5 API.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77494 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 2f422e06e096ae765ced5d4c67ac063c3e216424 |
28-Jul-2009 |
Owen Anderson <resistor@mac.com> |
Return ConstantVector to 2.5 API.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77366 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
electionDAGBuild.cpp
|
| af7ec975870f92245f1f1484ac80a1e2db6a0afa |
28-Jul-2009 |
Owen Anderson <resistor@mac.com> |
Return ConstantVector to 2.5 API.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77366 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
electionDAGBuild.cpp
|
| 7b4f9f8b74cd8f8d476787763ea02030762b00e7 |
28-Jul-2009 |
Owen Anderson <resistor@mac.com> |
Change ConstantArray to 2.5 API.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77347 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 1fd7096407d5e598ed3366a1141548e71273f1c5 |
28-Jul-2009 |
Owen Anderson <resistor@mac.com> |
Change ConstantArray to 2.5 API.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77347 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| c4c40a9f14d66de770ba7c0922be07dca7e3b827 |
28-Jul-2009 |
Chris Lattner <sabre@nondot.org> |
Rip all of the global variable lowering logic out of TargetAsmInfo. Since
it is highly specific to the object file that will be generated in the end,
this introduces a new TargetLoweringObjectFile interface that is implemented
for each of ELF/MachO/COFF/Alpha/PIC16 and XCore.
Though still is still a brutal and ugly refactoring, this is a major step
towards goodness.
This patch also:
1. fixes a bunch of dangling pointer problems in the PIC16 backend.
2. disables the TargetLowering copy ctor which PIC16 was accidentally using.
3. gets us closer to xcore having its own crazy target section flags and
pic16 not having to shadow sections with its own objects.
4. fixes wierdness where ELF targets would set CStringSection but not
CStringSection_. Factor the code better.
5. fixes some bugs in string lowering on ELF targets.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77294 91177308-0d34-0410-b5e6-96231b3b80d8
argetLowering.cpp
|
| f0144127b98425d214e59e4a1a4b342b78e3642b |
28-Jul-2009 |
Chris Lattner <sabre@nondot.org> |
Rip all of the global variable lowering logic out of TargetAsmInfo. Since
it is highly specific to the object file that will be generated in the end,
this introduces a new TargetLoweringObjectFile interface that is implemented
for each of ELF/MachO/COFF/Alpha/PIC16 and XCore.
Though still is still a brutal and ugly refactoring, this is a major step
towards goodness.
This patch also:
1. fixes a bunch of dangling pointer problems in the PIC16 backend.
2. disables the TargetLowering copy ctor which PIC16 was accidentally using.
3. gets us closer to xcore having its own crazy target section flags and
pic16 not having to shadow sections with its own objects.
4. fixes wierdness where ELF targets would set CStringSection but not
CStringSection_. Factor the code better.
5. fixes some bugs in string lowering on ELF targets.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77294 91177308-0d34-0410-b5e6-96231b3b80d8
argetLowering.cpp
|
| d363a0e9b128db489f429405944607e672a7d92c |
27-Jul-2009 |
Owen Anderson <resistor@mac.com> |
Move ConstantFP construction back to the 2.5-ish API.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77247 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
electionDAGBuild.cpp
|
| 6f83c9c6ef0e7f79825a0a8f22941815e4b684c7 |
27-Jul-2009 |
Owen Anderson <resistor@mac.com> |
Move ConstantFP construction back to the 2.5-ish API.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77247 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
electionDAGBuild.cpp
|
| 060189a1adac5da66282926539fb02324bd355e6 |
27-Jul-2009 |
Eli Friedman <eli.friedman@gmail.com> |
Reorganize code a bit to reduce indentation. No visible functionality
change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77171 91177308-0d34-0410-b5e6-96231b3b80d8
argetLowering.cpp
|
| b101b0bdbd22fa1bef3502fd7521da60038ac333 |
27-Jul-2009 |
Eli Friedman <eli.friedman@gmail.com> |
Reorganize code a bit to reduce indentation. No visible functionality
change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77171 91177308-0d34-0410-b5e6-96231b3b80d8
argetLowering.cpp
|
| 0653dc6fadc3b459dd15e6a47a43f5b410130b14 |
26-Jul-2009 |
Daniel Dunbar <daniel@zuster.org> |
Remove Value::getNameLen
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77148 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuild.cpp
|
| f0443c1eb44d737d9bd78962932fc80f74c6113c |
26-Jul-2009 |
Daniel Dunbar <daniel@zuster.org> |
Remove Value::getNameLen
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77148 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuild.cpp
|
| 0be10b0b53610b5c543713acf5d4f3ff68ed8319 |
25-Jul-2009 |
Dan Gohman <gohman@apple.com> |
Convert a few more things to use raw_ostream.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77039 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeFloatTypes.cpp
egalizeIntegerTypes.cpp
|
| fd87a544c00c2ca04ee23aae67bbcad4dc852a54 |
25-Jul-2009 |
Dan Gohman <gohman@apple.com> |
Convert a few more things to use raw_ostream.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77039 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeFloatTypes.cpp
egalizeIntegerTypes.cpp
|
| 005975c04c5ffc4ee07107ad60dd7d465464e6f7 |
25-Jul-2009 |
Daniel Dunbar <daniel@zuster.org> |
More migration to raw_ostream, the water has dried up around the iostream hole.
- Some clients which used DOUT have moved to DEBUG. We are deprecating the
"magic" DOUT behavior which avoided calling printing functions when the
statement was disabled. In addition to being unnecessary magic, it had the
downside of leaving code in -Asserts builds, and of hiding potentially
unnecessary computations.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77019 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| ce63ffb52f249b62cdf2d250c128007b13f27e71 |
25-Jul-2009 |
Daniel Dunbar <daniel@zuster.org> |
More migration to raw_ostream, the water has dried up around the iostream hole.
- Some clients which used DOUT have moved to DEBUG. We are deprecating the
"magic" DOUT behavior which avoided calling printing functions when the
statement was disabled. In addition to being unnecessary magic, it had the
downside of leaving code in -Asserts builds, and of hiding potentially
unnecessary computations.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77019 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| eacb44d0bb89c608c4465b7900eea3afc0f0be0d |
25-Jul-2009 |
Owen Anderson <resistor@mac.com> |
Revert the ConstantInt constructors back to their 2.5 forms where possible, thanks to contexts-on-types. More to come.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77011 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
egalizeDAG.cpp
egalizeIntegerTypes.cpp
electionDAG.cpp
|
| eed707b1e6097aac2bb6b3d47271f6300ace7f2e |
25-Jul-2009 |
Owen Anderson <resistor@mac.com> |
Revert the ConstantInt constructors back to their 2.5 forms where possible, thanks to contexts-on-types. More to come.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77011 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
egalizeDAG.cpp
egalizeIntegerTypes.cpp
electionDAG.cpp
|
| ca037dfe5d198f134bc9c7866a8345a0056acb39 |
24-Jul-2009 |
Jakob Stoklund Olesen <stoklund@2pi.dk> |
Add support for promoting SETCC operations.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76987 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
egalizeDAG.cpp
egalizeIntegerTypes.cpp
argetLowering.cpp
|
| 78d12644b905dc54cf6cf984af02a49d30d29744 |
24-Jul-2009 |
Jakob Stoklund Olesen <stoklund@2pi.dk> |
Add support for promoting SETCC operations.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76987 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
egalizeDAG.cpp
egalizeIntegerTypes.cpp
argetLowering.cpp
|
| f55f61f8a105e225f3589cac07ae98c08c26b1f6 |
24-Jul-2009 |
Daniel Dunbar <daniel@zuster.org> |
Move more to raw_ostream, provide support for writing MachineBasicBlock,
LiveInterval, etc to raw_ostream.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76965 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGSDNodes.cpp
|
| 1cd1d98232c3c3a0bd3810c3bf6c2572ea02f208 |
24-Jul-2009 |
Daniel Dunbar <daniel@zuster.org> |
Move more to raw_ostream, provide support for writing MachineBasicBlock,
LiveInterval, etc to raw_ostream.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76965 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGSDNodes.cpp
|
| 1e13b9756098b2d657c09fc2910dd66f255d9592 |
24-Jul-2009 |
Daniel Dunbar <daniel@zuster.org> |
Switch to getNameStr().
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76962 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
electionDAGPrinter.cpp
|
| f6ccee5a9d2b9573f679bca6266ade3eb8cd3f88 |
24-Jul-2009 |
Daniel Dunbar <daniel@zuster.org> |
Switch to getNameStr().
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76962 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
electionDAGPrinter.cpp
|
| b8523fae98888e969edc2fd5452887c686a0477c |
23-Jul-2009 |
Chris Lattner <sabre@nondot.org> |
"fix" PR4612, which is a crash on:
%0 = malloc [3758096384 x i32]
The "malloc" instruction doesn't support 64-bits correctly (see PR715),
and should be removed. Victor is actively working on fixing this, in
the meantime just don't crash.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76899 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuild.cpp
|
| 50340f666b5b1fceb2c781464779b4a0f583db9a |
23-Jul-2009 |
Chris Lattner <sabre@nondot.org> |
"fix" PR4612, which is a crash on:
%0 = malloc [3758096384 x i32]
The "malloc" instruction doesn't support 64-bits correctly (see PR715),
and should be removed. Victor is actively working on fixing this, in
the meantime just don't crash.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76899 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuild.cpp
|
| 175b6540352920afd47979cecb8c2667a3f7fdd3 |
22-Jul-2009 |
Owen Anderson <resistor@mac.com> |
Get rid of the Pass+Context magic.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76702 91177308-0d34-0410-b5e6-96231b3b80d8
allingConvLower.cpp
astISel.cpp
electionDAG.cpp
|
| e922c0201916e0b980ab3cfe91e1413e68d55647 |
22-Jul-2009 |
Owen Anderson <resistor@mac.com> |
Get rid of the Pass+Context magic.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76702 91177308-0d34-0410-b5e6-96231b3b80d8
allingConvLower.cpp
astISel.cpp
electionDAG.cpp
|
| ff45145136161b5399af8fcda61d1cc253703ebd |
21-Jul-2009 |
Eli Friedman <eli.friedman@gmail.com> |
Remove shift amount flavor. It isn't actually complete enough to
be useful, and it's currently unused. (Some issues: it isn't actually
rich enough to capture the semantics on many architectures, and
semantics can vary depending on the type being shifted.)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76633 91177308-0d34-0410-b5e6-96231b3b80d8
argetLowering.cpp
|
| b3e717192635873a0d8491fc45ddb64c0e4bda15 |
21-Jul-2009 |
Eli Friedman <eli.friedman@gmail.com> |
Remove shift amount flavor. It isn't actually complete enough to
be useful, and it's currently unused. (Some issues: it isn't actually
rich enough to capture the semantics on many architectures, and
semantics can vary depending on the type being shifted.)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76633 91177308-0d34-0410-b5e6-96231b3b80d8
argetLowering.cpp
|
| 71f286c68d892cd26eab145e9de034f3d5fa41d4 |
21-Jul-2009 |
Owen Anderson <resistor@mac.com> |
Rename getConstantInt{True|False} to get{True|False} at Chris' behest.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76598 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuild.cpp
|
| b3056faa5554ded7ac1ac5865d10ef5839fb77d3 |
21-Jul-2009 |
Owen Anderson <resistor@mac.com> |
Rename getConstantInt{True|False} to get{True|False} at Chris' behest.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76598 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuild.cpp
|
| 9198e93dc38dc6d0fdc4893cd43da4808dfc012f |
21-Jul-2009 |
Daniel Dunbar <daniel@zuster.org> |
Simplify / normalize some uses of Value::getName.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76553 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| fbee579ed46016166d88b4defb81a2e7e253062d |
21-Jul-2009 |
Daniel Dunbar <daniel@zuster.org> |
Simplify / normalize some uses of Value::getName.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76553 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 3f8f2810f286608cd5f252354eeea26c99b53aa4 |
21-Jul-2009 |
Evan Cheng <evan.cheng@apple.com> |
Fix a dagga combiner bug: avoid creating illegal constant.
Is this really a winning transformation?
fold (shl (srl x, c1), c2) -> (shl (and x, (shl -1, c1)), (sub c2, c1)) or
(srl (and x, (shl -1, c1)), (sub c1, c2))
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76535 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| d101a72d79d910abf781e6573be0edac99061acc |
21-Jul-2009 |
Evan Cheng <evan.cheng@apple.com> |
Fix a dagga combiner bug: avoid creating illegal constant.
Is this really a winning transformation?
fold (shl (srl x, c1), c2) -> (shl (and x, (shl -1, c1)), (sub c2, c1)) or
(srl (and x, (shl -1, c1)), (sub c1, c2))
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76535 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 153afcae9b32c19724f869327822a53535bbfab0 |
21-Jul-2009 |
Owen Anderson <resistor@mac.com> |
Move a bit more state over to the LLVMContext.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76533 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuild.cpp
|
| f53c371983908f02678b0e12c5d18466dcc70ffd |
21-Jul-2009 |
Owen Anderson <resistor@mac.com> |
Move a bit more state over to the LLVMContext.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76533 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuild.cpp
|
| d3d20998946bc9067334debe57b79041b2bec722 |
21-Jul-2009 |
Dale Johannesen <dalej@apple.com> |
Move stripping of bitcasts in inline asm arguments
to a place where it affects everything. Occurs
only on calls AFAIK.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76502 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuild.cpp
argetLowering.cpp
|
| 5339c551b508d8231672b417d9df1629e42af89b |
21-Jul-2009 |
Dale Johannesen <dalej@apple.com> |
Move stripping of bitcasts in inline asm arguments
to a place where it affects everything. Occurs
only on calls AFAIK.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76502 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuild.cpp
argetLowering.cpp
|
| 43e3a62bc33eb3c0ba666041738247853fd0a4b7 |
19-Jul-2009 |
Daniel Dunbar <daniel@zuster.org> |
Fix some minor MSVC compiler warnings.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76356 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| cfb8a1bea15f50e6609283c0e06f815a1448a14b |
19-Jul-2009 |
Daniel Dunbar <daniel@zuster.org> |
Fix some minor MSVC compiler warnings.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76356 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| e3fef569eb316d234212a49110e06bbfe96b0c5e |
17-Jul-2009 |
Eli Friedman <eli.friedman@gmail.com> |
Make promotion in operation legalization for SETCC work correctly.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76153 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| a64eb92fe305424ebde2e3de2b12160b8bf76047 |
17-Jul-2009 |
Eli Friedman <eli.friedman@gmail.com> |
Make promotion in operation legalization for SETCC work correctly.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76153 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 8ad296e39b8b51cd15ea1bfdad0993769762265d |
16-Jul-2009 |
Jeffrey Yasskin <jyasskin@google.com> |
Add line numbers to OProfile. To do this, I added a processDebugLoc()
call to the MachineCodeEmitter interface and made copying the start
line of a function not conditional on whether we're emitting Dwarf
debug information. I'll propagate the processDebugLoc() calls to the
non-X86 targets in a followup patch.
In the long run, it'll probably be better to gather this information
through the DwarfWriter, but the DwarfWriter currently depends on the
AsmPrinter and TargetAsmInfo, and fixing that would be out of the way
for this patch.
There's a bug in OProfile 0.9.4 that makes it ignore line numbers for
addresses above 4G, and a patch fixing it at
http://thread.gmane.org/gmane.linux.oprofile/7634
Sample output:
$ sudo opcontrol --reset; sudo opcontrol --start-daemon; sudo opcontrol --start; `pwd`/Debug/bin/lli fib.bc; sudo opcontrol --stop
Signalling daemon... done
Profiler running.
fib(40) == 165580141
Stopping profiling.
$ opreport -g -d -l `pwd`/Debug/bin/lli|head -60
Overflow stats not available
CPU: Core 2, speed 1998 MHz (estimated)
Counted CPU_CLK_UNHALTED events (Clock cycles when not halted) with a unit mask of 0x00 (Unhalted core cycles) count 100000
vma samples % linenr info image name symbol name
00007f67a30370b0 25489 61.2554 fib.c:24 10946.jo fib_left
00007f67a30370b0 1634 6.4106 fib.c:24
00007f67a30370b1 83 0.3256 fib.c:24
00007f67a30370b9 1997 7.8348 fib.c:24
00007f67a30370c6 2080 8.1604 fib.c:27
00007f67a30370c8 988 3.8762 fib.c:27
00007f67a30370cd 1315 5.1591 fib.c:27
00007f67a30370cf 251 0.9847 fib.c:27
00007f67a30370d3 1191 4.6726 fib.c:27
00007f67a30370d6 975 3.8252 fib.c:27
00007f67a30370db 1010 3.9625 fib.c:27
00007f67a30370dd 242 0.9494 fib.c:27
00007f67a30370e1 2782 10.9145 fib.c:28
00007f67a30370e5 3768 14.7828 fib.c:28
00007f67a30370eb 615 2.4128 (no location information)
00007f67a30370f3 6558 25.7287 (no location information)
00007f67a3037100 15603 37.4973 fib.c:29 10946.jo fib_right
00007f67a3037100 1646 10.5493 fib.c:29
00007f67a3037101 45 0.2884 fib.c:29
00007f67a3037109 2372 15.2022 fib.c:29
00007f67a3037116 2234 14.3178 fib.c:32
00007f67a3037118 612 3.9223 fib.c:32
00007f67a303711d 622 3.9864 fib.c:32
00007f67a303711f 385 2.4675 fib.c:32
00007f67a3037123 404 2.5892 fib.c:32
00007f67a3037126 634 4.0633 fib.c:32
00007f67a303712b 870 5.5759 fib.c:32
00007f67a303712d 62 0.3974 fib.c:32
00007f67a3037131 1848 11.8439 fib.c:33
00007f67a3037135 2840 18.2016 fib.c:33
00007f67a303713a 1 0.0064 fib.c:33
00007f67a303713b 1023 6.5564 (no location information)
00007f67a3037143 5 0.0320 (no location information)
000000000080c1e4 15 0.0360 MachineOperand.h:150 lli llvm::MachineOperand::isReg() const
000000000080c1e4 6 40.0000 MachineOperand.h:150
000000000080c1ec 2 13.3333 MachineOperand.h:150
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76102 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuild.cpp
|
| 32360a7e21a4454aa7014992213823fb4319905a |
16-Jul-2009 |
Jeffrey Yasskin <jyasskin@google.com> |
Add line numbers to OProfile. To do this, I added a processDebugLoc()
call to the MachineCodeEmitter interface and made copying the start
line of a function not conditional on whether we're emitting Dwarf
debug information. I'll propagate the processDebugLoc() calls to the
non-X86 targets in a followup patch.
In the long run, it'll probably be better to gather this information
through the DwarfWriter, but the DwarfWriter currently depends on the
AsmPrinter and TargetAsmInfo, and fixing that would be out of the way
for this patch.
There's a bug in OProfile 0.9.4 that makes it ignore line numbers for
addresses above 4G, and a patch fixing it at
http://thread.gmane.org/gmane.linux.oprofile/7634
Sample output:
$ sudo opcontrol --reset; sudo opcontrol --start-daemon; sudo opcontrol --start; `pwd`/Debug/bin/lli fib.bc; sudo opcontrol --stop
Signalling daemon... done
Profiler running.
fib(40) == 165580141
Stopping profiling.
$ opreport -g -d -l `pwd`/Debug/bin/lli|head -60
Overflow stats not available
CPU: Core 2, speed 1998 MHz (estimated)
Counted CPU_CLK_UNHALTED events (Clock cycles when not halted) with a unit mask of 0x00 (Unhalted core cycles) count 100000
vma samples % linenr info image name symbol name
00007f67a30370b0 25489 61.2554 fib.c:24 10946.jo fib_left
00007f67a30370b0 1634 6.4106 fib.c:24
00007f67a30370b1 83 0.3256 fib.c:24
00007f67a30370b9 1997 7.8348 fib.c:24
00007f67a30370c6 2080 8.1604 fib.c:27
00007f67a30370c8 988 3.8762 fib.c:27
00007f67a30370cd 1315 5.1591 fib.c:27
00007f67a30370cf 251 0.9847 fib.c:27
00007f67a30370d3 1191 4.6726 fib.c:27
00007f67a30370d6 975 3.8252 fib.c:27
00007f67a30370db 1010 3.9625 fib.c:27
00007f67a30370dd 242 0.9494 fib.c:27
00007f67a30370e1 2782 10.9145 fib.c:28
00007f67a30370e5 3768 14.7828 fib.c:28
00007f67a30370eb 615 2.4128 (no location information)
00007f67a30370f3 6558 25.7287 (no location information)
00007f67a3037100 15603 37.4973 fib.c:29 10946.jo fib_right
00007f67a3037100 1646 10.5493 fib.c:29
00007f67a3037101 45 0.2884 fib.c:29
00007f67a3037109 2372 15.2022 fib.c:29
00007f67a3037116 2234 14.3178 fib.c:32
00007f67a3037118 612 3.9223 fib.c:32
00007f67a303711d 622 3.9864 fib.c:32
00007f67a303711f 385 2.4675 fib.c:32
00007f67a3037123 404 2.5892 fib.c:32
00007f67a3037126 634 4.0633 fib.c:32
00007f67a303712b 870 5.5759 fib.c:32
00007f67a303712d 62 0.3974 fib.c:32
00007f67a3037131 1848 11.8439 fib.c:33
00007f67a3037135 2840 18.2016 fib.c:33
00007f67a303713a 1 0.0064 fib.c:33
00007f67a303713b 1023 6.5564 (no location information)
00007f67a3037143 5 0.0320 (no location information)
000000000080c1e4 15 0.0360 MachineOperand.h:150 lli llvm::MachineOperand::isReg() const
000000000080c1e4 6 40.0000 MachineOperand.h:150
000000000080c1ec 2 13.3333 MachineOperand.h:150
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76102 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuild.cpp
|
| 48db02d0d921faded40a05912717a380e0f62642 |
16-Jul-2009 |
Owen Anderson <resistor@mac.com> |
Privatize the ConstantFP table. I'm on a roll!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76097 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
electionDAGBuild.cpp
|
| 914e50c841bbc248ab94144c11813b5785b1292d |
16-Jul-2009 |
Owen Anderson <resistor@mac.com> |
Privatize the ConstantFP table. I'm on a roll!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76097 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
electionDAGBuild.cpp
|
| e1f1f82a2c1506c57f77df09c0a86de6e59ff952 |
16-Jul-2009 |
Owen Anderson <resistor@mac.com> |
Move the ConstantInt uniquing table into LLVMContextImpl. This exposed a number of issues in
our current context-passing stuff, which is also fixed here
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76089 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
egalizeIntegerTypes.cpp
electionDAG.cpp
electionDAGBuild.cpp
|
| 001dbfebcbbded8c8e74b19e838b50da2b6c6fb5 |
16-Jul-2009 |
Owen Anderson <resistor@mac.com> |
Move the ConstantInt uniquing table into LLVMContextImpl. This exposed a number of issues in
our current context-passing stuff, which is also fixed here
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76089 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
egalizeIntegerTypes.cpp
electionDAG.cpp
electionDAGBuild.cpp
|
| 3942ed7e05f362b0c45d309609fb7c96a336d93e |
16-Jul-2009 |
Anton Korobeynikov <asl@math.spbu.ru> |
Propagate return result extension type
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75925 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuild.cpp
|
| 0692fabb4e681da2907361346ff984290dbb3e40 |
16-Jul-2009 |
Anton Korobeynikov <asl@math.spbu.ru> |
Propagate return result extension type
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75925 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuild.cpp
|
| 6361f97916fc9aa3fc9e983287bc69ca0570fde8 |
15-Jul-2009 |
Owen Anderson <resistor@mac.com> |
Move a few more convenience factory functions from Constant to LLVMContext.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75840 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
egalizeDAG.cpp
electionDAGBuild.cpp
|
| a90b3dc2f1f70ab7102ec3f1fc57f199fd56d7cc |
15-Jul-2009 |
Owen Anderson <resistor@mac.com> |
Move a few more convenience factory functions from Constant to LLVMContext.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75840 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
egalizeDAG.cpp
electionDAGBuild.cpp
|
| 129f8fea7b991a5a38ce147e6b2adcba475da817 |
15-Jul-2009 |
Ted Kremenek <kremenek@apple.com> |
Lexically order files in CMakeLists.txt files.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75831 91177308-0d34-0410-b5e6-96231b3b80d8
MakeLists.txt
|
| 193562982930fb7c094dbe2c8b10fd18a1fac1d6 |
15-Jul-2009 |
Ted Kremenek <kremenek@apple.com> |
Lexically order files in CMakeLists.txt files.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75831 91177308-0d34-0410-b5e6-96231b3b80d8
MakeLists.txt
|
| 9f5b2aa7fba203469386acc413c23dd41a713bc9 |
15-Jul-2009 |
Owen Anderson <resistor@mac.com> |
Move EVER MORE stuff over to LLVMContext.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75703 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 9adc0abad3c3ed40a268ccbcee0c74cb9e1359fe |
15-Jul-2009 |
Owen Anderson <resistor@mac.com> |
Move EVER MORE stuff over to LLVMContext.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75703 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| bd448e3ca993226084d7f53445388fcd8e46b996 |
14-Jul-2009 |
Edwin Török <edwintorok@gmail.com> |
llvm_unreachable->llvm_unreachable(0), LLVM_UNREACHABLE->llvm_unreachable.
This adds location info for all llvm_unreachable calls (which is a macro now) in
!NDEBUG builds.
In NDEBUG builds location info and the message is off (it only prints
"UREACHABLE executed").
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75640 91177308-0d34-0410-b5e6-96231b3b80d8
allingConvLower.cpp
AGCombiner.cpp
egalizeDAG.cpp
egalizeFloatTypes.cpp
egalizeIntegerTypes.cpp
egalizeTypes.cpp
egalizeVectorTypes.cpp
cheduleDAGFast.cpp
cheduleDAGList.cpp
cheduleDAGRRList.cpp
cheduleDAGSDNodesEmit.cpp
electionDAG.cpp
electionDAGBuild.cpp
electionDAGBuild.h
electionDAGISel.cpp
argetLowering.cpp
|
| c23197a26f34f559ea9797de51e187087c039c42 |
14-Jul-2009 |
Torok Edwin <edwintorok@gmail.com> |
llvm_unreachable->llvm_unreachable(0), LLVM_UNREACHABLE->llvm_unreachable.
This adds location info for all llvm_unreachable calls (which is a macro now) in
!NDEBUG builds.
In NDEBUG builds location info and the message is off (it only prints
"UREACHABLE executed").
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75640 91177308-0d34-0410-b5e6-96231b3b80d8
allingConvLower.cpp
AGCombiner.cpp
egalizeDAG.cpp
egalizeFloatTypes.cpp
egalizeIntegerTypes.cpp
egalizeTypes.cpp
egalizeVectorTypes.cpp
cheduleDAGFast.cpp
cheduleDAGList.cpp
cheduleDAGRRList.cpp
cheduleDAGSDNodesEmit.cpp
electionDAG.cpp
electionDAGBuild.cpp
electionDAGBuild.h
electionDAGISel.cpp
argetLowering.cpp
|
| 15b3932454f2777376ac500eae3999139a2c1f2e |
13-Jul-2009 |
Owen Anderson <resistor@mac.com> |
Begin the painful process of tearing apart the rat'ss nest that is Constants.cpp and ConstantFold.cpp.
This involves temporarily hard wiring some parts to use the global context. This isn't ideal, but it's
the only way I could figure out to make this process vaguely incremental.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75445 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
electionDAGBuild.cpp
electionDAGBuild.h
|
| 0a5372ed3e8cda10d724feda3c1a1c998db05ca0 |
13-Jul-2009 |
Owen Anderson <resistor@mac.com> |
Begin the painful process of tearing apart the rat'ss nest that is Constants.cpp and ConstantFold.cpp.
This involves temporarily hard wiring some parts to use the global context. This isn't ideal, but it's
the only way I could figure out to make this process vaguely incremental.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75445 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
electionDAGBuild.cpp
electionDAGBuild.h
|
| 92a8198f9346913f3db6f35d97ba6bbd8ca1ff37 |
12-Jul-2009 |
Chris Lattner <sabre@nondot.org> |
remove llvm.part.set.* and llvm.part.select.*. They have never been
implemented in codegen, have no frontend to generate them, and are
better implemented with pattern matching (like the ppc backend does
to generate rlwimi/rlwinm etc).
PR4543
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75430 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuild.cpp
|
| eaff5246707cc620736e895c239ff78298b3d95e |
12-Jul-2009 |
Chris Lattner <sabre@nondot.org> |
remove llvm.part.set.* and llvm.part.select.*. They have never been
implemented in codegen, have no frontend to generate them, and are
better implemented with pattern matching (like the ppc backend does
to generate rlwimi/rlwinm etc).
PR4543
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75430 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuild.cpp
|
| 280d15bd08f05838396f368f0de6ca63ab107f3f |
12-Jul-2009 |
Edwin Török <edwintorok@gmail.com> |
Fix assert(0) conversion, as suggested by Chris.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75423 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| f36892335b4919b9120e48a792e6b3630b9de978 |
12-Jul-2009 |
Torok Edwin <edwintorok@gmail.com> |
Fix assert(0) conversion, as suggested by Chris.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75423 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 635c9f0fbddb5aef75870f379522b9f279b77385 |
12-Jul-2009 |
Jakob Stoklund Olesen <stoklund@2pi.dk> |
Implement support for promotion of AND/OR/XOR on integer types.
The blackfin processor has a legal i16 type, but only logic operations on i32.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75419 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| c8ca3ae27b64fa785f944799a9bc133fac8f90d9 |
12-Jul-2009 |
Jakob Stoklund Olesen <stoklund@2pi.dk> |
Implement support for promotion of AND/OR/XOR on integer types.
The blackfin processor has a legal i16 type, but only logic operations on i32.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75419 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| f90244488d1e1ac608a9272ecb1d5950902234c6 |
12-Jul-2009 |
Jakob Stoklund Olesen <stoklund@2pi.dk> |
Fix types in PromoteNode handling of CTPOP and friends.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75418 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 9a4ba45f4cd0496c422f81e104adf6c03ebdd3ba |
12-Jul-2009 |
Jakob Stoklund Olesen <stoklund@2pi.dk> |
Fix types in PromoteNode handling of CTPOP and friends.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75418 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 675d56222b6b98d2c22a17aaf69a036e57d5426a |
11-Jul-2009 |
Edwin Török <edwintorok@gmail.com> |
assert(0) -> LLVM_UNREACHABLE.
Make llvm_unreachable take an optional string, thus moving the cerr<< out of
line.
LLVM_UNREACHABLE is now a simple wrapper that makes the message go away for
NDEBUG builds.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75379 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
egalizeDAG.cpp
egalizeIntegerTypes.cpp
egalizeVectorTypes.cpp
cheduleDAGFast.cpp
cheduleDAGList.cpp
cheduleDAGRRList.cpp
cheduleDAGSDNodesEmit.cpp
electionDAG.cpp
electionDAGBuild.cpp
electionDAGBuild.h
electionDAGISel.cpp
argetLowering.cpp
|
| c25e7581b9b8088910da31702d4ca21c4734c6d7 |
11-Jul-2009 |
Torok Edwin <edwintorok@gmail.com> |
assert(0) -> LLVM_UNREACHABLE.
Make llvm_unreachable take an optional string, thus moving the cerr<< out of
line.
LLVM_UNREACHABLE is now a simple wrapper that makes the message go away for
NDEBUG builds.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75379 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
egalizeDAG.cpp
egalizeIntegerTypes.cpp
egalizeVectorTypes.cpp
cheduleDAGFast.cpp
cheduleDAGList.cpp
cheduleDAGRRList.cpp
cheduleDAGSDNodesEmit.cpp
electionDAG.cpp
electionDAGBuild.cpp
electionDAGBuild.h
electionDAGISel.cpp
argetLowering.cpp
|
| ced9ff8ea2fac344da91d925294817ad51f51e06 |
11-Jul-2009 |
Edwin Török <edwintorok@gmail.com> |
Convert more assert(0)+abort() -> LLVM_UNREACHABLE,
and abort()/exit() -> llvm_report_error().
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75363 91177308-0d34-0410-b5e6-96231b3b80d8
allingConvLower.cpp
AGCombiner.cpp
egalizeDAG.cpp
egalizeFloatTypes.cpp
egalizeIntegerTypes.cpp
egalizeTypes.cpp
egalizeVectorTypes.cpp
cheduleDAGFast.cpp
electionDAGBuild.cpp
electionDAGISel.cpp
|
| 7d696d80409aad20bb5da0fc4eccab941dd371d4 |
11-Jul-2009 |
Torok Edwin <edwintorok@gmail.com> |
Convert more assert(0)+abort() -> LLVM_UNREACHABLE,
and abort()/exit() -> llvm_report_error().
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75363 91177308-0d34-0410-b5e6-96231b3b80d8
allingConvLower.cpp
AGCombiner.cpp
egalizeDAG.cpp
egalizeFloatTypes.cpp
egalizeIntegerTypes.cpp
egalizeTypes.cpp
egalizeVectorTypes.cpp
cheduleDAGFast.cpp
electionDAGBuild.cpp
electionDAGISel.cpp
|
| b5a5ab2df4bd8a61bac1be99f2e0a4b8493d964b |
11-Jul-2009 |
Evan Cheng <evan.cheng@apple.com> |
Fix up support for OptionalDefOperand when it defaults to an actual register def. I need this to get ready for major Thumb1 surgery.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75328 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGSDNodesEmit.cpp
|
| 8955e93b1ffa7645beea0b51e4b091b96063f613 |
11-Jul-2009 |
Evan Cheng <evan.cheng@apple.com> |
Fix up support for OptionalDefOperand when it defaults to an actual register def. I need this to get ready for major Thumb1 surgery.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75328 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGSDNodesEmit.cpp
|
| 23a154729df2ebd333211da7c184b123c945ca97 |
11-Jul-2009 |
Eli Friedman <eli.friedman@gmail.com> |
Use CreateStackStoreLoad helper in more places.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75320 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeIntegerTypes.cpp
egalizeVectorTypes.cpp
|
| aad3460086a1b29c55f7490c6d8743ea4e53f07d |
11-Jul-2009 |
Eli Friedman <eli.friedman@gmail.com> |
Use CreateStackStoreLoad helper in more places.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75320 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeIntegerTypes.cpp
egalizeVectorTypes.cpp
|
| e8c3da9e64cffdc3b06832eef97b175561146cd0 |
10-Jul-2009 |
Bob Wilson <bob.wilson@apple.com> |
Fix an apparent copy-and-paste problem in an error message.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75197 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuild.cpp
|
| 22023607345b083907591c32152b2c59e48e0cd7 |
10-Jul-2009 |
Bob Wilson <bob.wilson@apple.com> |
Fix an apparent copy-and-paste problem in an error message.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75197 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuild.cpp
|
| f1896f2694f5bc4aa4d10c3007821e0772889f24 |
10-Jul-2009 |
Eli Friedman <eli.friedman@gmail.com> |
Make EXTRACT_VECTOR_ELT a bit more flexible in terms of the returned
value. Adjust other code to deal with that correctly. Make
DAGTypeLegalizer::PromoteIntRes_EXTRACT_VECTOR_ELT take advantage of
this new flexibility to simplify the code and make it deal with unusual
vectors (like <4 x i1>) correctly. Fixes PR3037.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75176 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
egalizeIntegerTypes.cpp
egalizeVectorTypes.cpp
electionDAG.cpp
|
| c680ac90032bf455b2bba77de538fccea08eb267 |
10-Jul-2009 |
Eli Friedman <eli.friedman@gmail.com> |
Make EXTRACT_VECTOR_ELT a bit more flexible in terms of the returned
value. Adjust other code to deal with that correctly. Make
DAGTypeLegalizer::PromoteIntRes_EXTRACT_VECTOR_ELT take advantage of
this new flexibility to simplify the code and make it deal with unusual
vectors (like <4 x i1>) correctly. Fixes PR3037.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75176 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
egalizeIntegerTypes.cpp
egalizeVectorTypes.cpp
electionDAG.cpp
|
| f3a4d6b841de386e5604f99005d3ed19493505c3 |
09-Jul-2009 |
Owen Anderson <resistor@mac.com> |
As Chris pointed out, we don't actually need to pass the context around here.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75161 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
electionDAGISel.cpp
|
| 5dcaceb0a6a7fcf508d9898547e10d374b0e4cd1 |
09-Jul-2009 |
Owen Anderson <resistor@mac.com> |
As Chris pointed out, we don't actually need to pass the context around here.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75161 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
electionDAGISel.cpp
|
| a0167020062bbcfe0558faa29dd705ca6f9a8e2a |
09-Jul-2009 |
Owen Anderson <resistor@mac.com> |
Thread LLVMContext through MVT and related parts of SDISel.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75153 91177308-0d34-0410-b5e6-96231b3b80d8
allingConvLower.cpp
AGCombiner.cpp
egalizeDAG.cpp
egalizeTypes.cpp
egalizeTypesGeneric.cpp
egalizeVectorTypes.cpp
electionDAG.cpp
electionDAGBuild.cpp
electionDAGISel.cpp
|
| d1474d09cbe5fdeec8ba0d6c6b52f316f3422532 |
09-Jul-2009 |
Owen Anderson <resistor@mac.com> |
Thread LLVMContext through MVT and related parts of SDISel.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75153 91177308-0d34-0410-b5e6-96231b3b80d8
allingConvLower.cpp
AGCombiner.cpp
egalizeDAG.cpp
egalizeTypes.cpp
egalizeTypesGeneric.cpp
egalizeVectorTypes.cpp
electionDAG.cpp
electionDAGBuild.cpp
electionDAGISel.cpp
|
| 76a3e1ceae509c9918a92c643047e24c0a0aa67d |
09-Jul-2009 |
Dan Gohman <gohman@apple.com> |
Make SelectionDAG::getVectorShuffle work properly for VECTOR_SHUFFLE
nodes with operand types that differ from the result type. (This
doesn't normally happen right now, because
SelectionDAGLowering::visitShuffleVector normalizes vector shuffles.)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75081 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 2e4284de53fb70686c5c135387006d033171da2e |
09-Jul-2009 |
Dan Gohman <gohman@apple.com> |
Make SelectionDAG::getVectorShuffle work properly for VECTOR_SHUFFLE
nodes with operand types that differ from the result type. (This
doesn't normally happen right now, because
SelectionDAGLowering::visitShuffleVector normalizes vector shuffles.)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75081 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 4a8979320ced9b38019f6f2c074f2d3dbe1b189e |
09-Jul-2009 |
David Goodwin <david_goodwin@apple.com> |
Use common code for both ARM and Thumb-2 instruction and register info.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75067 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| f1daf7d8abebd6e0104a6b41a774ccbb19a51c60 |
09-Jul-2009 |
David Goodwin <david_goodwin@apple.com> |
Use common code for both ARM and Thumb-2 instruction and register info.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75067 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 54b74335fe618e24bc4c39cdbe4495de437541d4 |
08-Jul-2009 |
Duncan Sands <baldrick@free.fr> |
Nowadays vectors are only split if they have an even
number of elements. Make some simplifications based
on this (in particular SplitVecRes_SETCC). Tighten
up some checking while there.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75050 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeTypes.cpp
egalizeTypes.h
egalizeTypesGeneric.cpp
egalizeVectorTypes.cpp
|
| f2d754bb382cba0bad2774144ddac84be5354d16 |
08-Jul-2009 |
Duncan Sands <baldrick@free.fr> |
Nowadays vectors are only split if they have an even
number of elements. Make some simplifications based
on this (in particular SplitVecRes_SETCC). Tighten
up some checking while there.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75050 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeTypes.cpp
egalizeTypes.h
egalizeTypesGeneric.cpp
egalizeVectorTypes.cpp
|
| 568a8b0cb6eb7447707145b8d07fc778a98da09d |
08-Jul-2009 |
Duncan Sands <baldrick@free.fr> |
Remove trailing whitespace. Reorder some methods
and cases alphabetically. No functionality change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75001 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeFloatTypes.cpp
egalizeIntegerTypes.cpp
egalizeTypes.h
egalizeTypesGeneric.cpp
egalizeVectorTypes.cpp
|
| 8c899ee031481dbece5f111379a274c848cb5902 |
08-Jul-2009 |
Duncan Sands <baldrick@free.fr> |
Remove trailing whitespace. Reorder some methods
and cases alphabetically. No functionality change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75001 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeFloatTypes.cpp
egalizeIntegerTypes.cpp
egalizeTypes.h
egalizeTypesGeneric.cpp
egalizeVectorTypes.cpp
|
| 8f5253baafe027bb8939498d9eb1083febc7339a |
08-Jul-2009 |
Nick Lewycky <nicholas@mxc.ca> |
Remove the vicmp and vfcmp instructions. Because we never had a release with
these instructions, no autoupgrade or backwards compatibility support is
provided.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74991 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuild.cpp
electionDAGBuild.h
|
| 7f6aa2b162e5daaf7b9ccf05d749597d3d7cf460 |
08-Jul-2009 |
Nick Lewycky <nicholas@mxc.ca> |
Remove the vicmp and vfcmp instructions. Because we never had a release with
these instructions, no autoupgrade or backwards compatibility support is
provided.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74991 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuild.cpp
electionDAGBuild.h
|
| bb30203c9e9f60a5695451ee91b51fc0e560a6e5 |
08-Jul-2009 |
Chris Lattner <sabre@nondot.org> |
dag combine sext(setcc) -> vsetcc before legalize. To make this safe,
VSETCC must define all bits, which is different than it was documented
to before. Since all targets that implement VSETCC already have this
behavior, and we don't optimize based on this, just change the
documentation. We now get nice code for vec_compare.ll
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74978 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 2b7a271c713ff1db83990f691126bc33d6c59b52 |
08-Jul-2009 |
Chris Lattner <sabre@nondot.org> |
dag combine sext(setcc) -> vsetcc before legalize. To make this safe,
VSETCC must define all bits, which is different than it was documented
to before. Since all targets that implement VSETCC already have this
behavior, and we don't optimize based on this, just change the
documentation. We now get nice code for vec_compare.ll
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74978 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| b9e009a19589e91a91f0bc99395aa57569fa4d62 |
08-Jul-2009 |
Chris Lattner <sabre@nondot.org> |
SelectionDAG::SignBitIsZero doesn't work right for vectors,
for now, conservatively return false.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74969 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| a4f73182450ad6d7197c9229f6396f2e54faefdf |
08-Jul-2009 |
Chris Lattner <sabre@nondot.org> |
SelectionDAG::SignBitIsZero doesn't work right for vectors,
for now, conservatively return false.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74969 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| d438911f3eba133fcbb6f7df98bd3de7dca0f4eb |
08-Jul-2009 |
Dale Johannesen <dalej@apple.com> |
Operand of asm("call") (the callee function) is represented
as "X" constraint and "P" modifier on x86. Make this work.
(Change may not be sufficient to fix it for non-Darwin, but
I'm pretty sure it won't break anything.)
gcc.apple/asm-block-32.c
gcc.apple/asm-block-33.c
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74967 91177308-0d34-0410-b5e6-96231b3b80d8
argetLowering.cpp
|
| 8ea5ec681bd4838c84e545f8a1226a62d3b2f089 |
08-Jul-2009 |
Dale Johannesen <dalej@apple.com> |
Operand of asm("call") (the callee function) is represented
as "X" constraint and "P" modifier on x86. Make this work.
(Change may not be sufficient to fix it for non-Darwin, but
I'm pretty sure it won't break anything.)
gcc.apple/asm-block-32.c
gcc.apple/asm-block-33.c
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74967 91177308-0d34-0410-b5e6-96231b3b80d8
argetLowering.cpp
|
| 42005c0c20aec31b53f6052585ed7ca9258560f8 |
08-Jul-2009 |
Chris Lattner <sabre@nondot.org> |
add support for legalizing an icmp where the result is illegal (4xi1) but
the input is legal (4 x i32)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74964 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeVectorTypes.cpp
|
| c2c27b3627cf7a8724f2e1ec6a93b1dceea09c25 |
08-Jul-2009 |
Chris Lattner <sabre@nondot.org> |
add support for legalizing an icmp where the result is illegal (4xi1) but
the input is legal (4 x i32)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74964 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeVectorTypes.cpp
|
| 108801641f66c01031aa9062a8ece3bfbf0cff78 |
08-Jul-2009 |
Chris Lattner <sabre@nondot.org> |
random code cleanups.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74962 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeVectorTypes.cpp
|
| 0a6c2d8deab5124198e8cd5fbb3c43509be3e511 |
08-Jul-2009 |
Chris Lattner <sabre@nondot.org> |
random code cleanups.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74962 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeVectorTypes.cpp
|
| 8c5b707bc11ff73031e2e91bbeff5fc37c587a29 |
08-Jul-2009 |
Chris Lattner <sabre@nondot.org> |
implement support for spliting and scalarizing vector setcc's. This
finishes off enough support for vector compares to get the icmp/fcmp
version of 2008-07-23-VSetCC.ll passing.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74961 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeTypes.h
egalizeVectorTypes.cpp
|
| 5962ed0a36bfad0fb591998964a0da7ddecda1f2 |
08-Jul-2009 |
Chris Lattner <sabre@nondot.org> |
implement support for spliting and scalarizing vector setcc's. This
finishes off enough support for vector compares to get the icmp/fcmp
version of 2008-07-23-VSetCC.ll passing.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74961 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeTypes.h
egalizeVectorTypes.cpp
|
| 3937b129e61a03fc530011ffae9bbcc00d4cb3fa |
08-Jul-2009 |
Chris Lattner <sabre@nondot.org> |
lower vector icmp/fcmp to ICMP/FCMP nodes with the right result
(vector of bool).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74960 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuild.cpp
|
| 9800e849c10fbcf9f6fcff3698165a01930b8ac2 |
08-Jul-2009 |
Chris Lattner <sabre@nondot.org> |
lower vector icmp/fcmp to ICMP/FCMP nodes with the right result
(vector of bool).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74960 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuild.cpp
|
| 75b460578ee242104d7e8483b4ff6e04f5a20894 |
08-Jul-2009 |
Chris Lattner <sabre@nondot.org> |
ScalarizeVecRes_ShiftOp and ScalarizeVecRes_BinOp are the same,
eliminate the former.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74959 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeTypes.h
egalizeVectorTypes.cpp
|
| 87c411b5cc254a8d169b834f3487657a8dc1e17a |
08-Jul-2009 |
Chris Lattner <sabre@nondot.org> |
ScalarizeVecRes_ShiftOp and ScalarizeVecRes_BinOp are the same,
eliminate the former.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74959 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeTypes.h
egalizeVectorTypes.cpp
|
| e53009f0f4d85d1e9c3a2f902bf7fc672765d5a8 |
08-Jul-2009 |
Chris Lattner <sabre@nondot.org> |
add support for vector legalizing of *_EXTEND.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74957 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeVectorTypes.cpp
|
| 64a3fa23f8bd02d5b5f44faec6e9cbc26a417c44 |
08-Jul-2009 |
Chris Lattner <sabre@nondot.org> |
add support for vector legalizing of *_EXTEND.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74957 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeVectorTypes.cpp
|
| be44bedb7fe330e36f5ed544aa48c59742a52185 |
07-Jul-2009 |
Owen Anderson <resistor@mac.com> |
Have scoped mutexes take referenes instead of pointers.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74931 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| a9d1f2c559ef4b2549e29288fe6944e68913ba0f |
07-Jul-2009 |
Owen Anderson <resistor@mac.com> |
Have scoped mutexes take referenes instead of pointers.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74931 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 71c697382e6165ab1b601866a52c8f6628517e42 |
03-Jul-2009 |
Tilmann Scheller <tilmann.scheller@googlemail.com> |
Add NumFixedArgs attribute to CallSDNode which indicates the number of fixed arguments in a vararg call.
With the SVR4 ABI on PowerPC, vector arguments for vararg calls are passed differently depending on whether they are a fixed or a variable argument. Variable vector arguments always go into memory, fixed vector arguments are put
into vector registers. If there are no free vector registers available, fixed vector arguments are put on the stack.
The NumFixedArgs attribute allows to decide for an argument in a vararg call whether it belongs to the fixed or variable portion of the parameter list.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74764 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
egalizeTypes.cpp
electionDAG.cpp
electionDAGBuild.cpp
|
| 6b61cd185eeb90bec93f042535594132ae1f0f41 |
03-Jul-2009 |
Tilmann Scheller <tilmann.scheller@googlemail.com> |
Add NumFixedArgs attribute to CallSDNode which indicates the number of fixed arguments in a vararg call.
With the SVR4 ABI on PowerPC, vector arguments for vararg calls are passed differently depending on whether they are a fixed or a variable argument. Variable vector arguments always go into memory, fixed vector arguments are put
into vector registers. If there are no free vector registers available, fixed vector arguments are put on the stack.
The NumFixedArgs attribute allows to decide for an argument in a vararg call whether it belongs to the fixed or variable portion of the parameter list.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74764 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
egalizeTypes.cpp
electionDAG.cpp
electionDAGBuild.cpp
|
| 1540fd690f40c4771c411d89adeb142613064dbd |
03-Jul-2009 |
Devang Patel <dpatel@apple.com> |
Simplify debug info intrisinc lowering.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74733 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
electionDAGBuild.cpp
|
| 7e1e31f467d87c834d8baf673929865907901313 |
03-Jul-2009 |
Devang Patel <dpatel@apple.com> |
Simplify debug info intrisinc lowering.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74733 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
electionDAGBuild.cpp
|
| d097aa0cb5d160031b01d8831904cecbabc5ef81 |
02-Jul-2009 |
Douglas Gregor <doug.gregor@gmail.com> |
CMake build fixes, from Xerxes Ranby
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74720 91177308-0d34-0410-b5e6-96231b3b80d8
MakeLists.txt
|
| 033080cf6a6f6ca94f20c410204405471c19c535 |
02-Jul-2009 |
Douglas Gregor <dgregor@apple.com> |
CMake build fixes, from Xerxes Ranby
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74720 91177308-0d34-0410-b5e6-96231b3b80d8
MakeLists.txt
|
| f151969c988d7bebf22ded9bde88a860cd59878c |
02-Jul-2009 |
Devang Patel <dpatel@apple.com> |
Simplify.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74677 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
electionDAGBuild.cpp
|
| 6d8f1263f40e6b8fc2cd5cce3dfd9ce99fe09226 |
02-Jul-2009 |
Devang Patel <dpatel@apple.com> |
Simplify.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74677 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
electionDAGBuild.cpp
|
| 4fecd7e121ec5b2993b6ff05488f3068f7f1e4d6 |
02-Jul-2009 |
Devang Patel <dpatel@apple.com> |
Simplify. No intentional functionality change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74673 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuild.cpp
|
| 07b0ec0927e145458b2e49598b1bbe32262cda6f |
02-Jul-2009 |
Devang Patel <dpatel@apple.com> |
Simplify. No intentional functionality change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74673 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuild.cpp
|
| 1ad58170e3d570da9a7892a572ecdc18881af332 |
02-Jul-2009 |
Devang Patel <dpatel@apple.com> |
Refactor. No functionality change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74659 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuild.cpp
|
| ceddbe8e30a46f99a98033c4618c807bf058499a |
02-Jul-2009 |
Devang Patel <dpatel@apple.com> |
Refactor. No functionality change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74659 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuild.cpp
|
| 39bd365ee957d1ebb886dc77c4a251610bf3b83d |
01-Jul-2009 |
Devang Patel <dpatel@apple.com> |
llvm.dbg.declare is always used for local variable's debug info.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74625 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
|
| 30d7b650aa443b78cfa1e918bb0d5eaf288b0a2f |
01-Jul-2009 |
Devang Patel <dpatel@apple.com> |
llvm.dbg.declare is always used for local variable's debug info.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74625 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
|
| 9c73db1e61c42e4d658753ad2046af51e3bcbd5a |
30-Jun-2009 |
Evan Cheng <evan.cheng@apple.com> |
Add a bit IsUndef to MachineOperand. This indicates the def / use register operand is defined by an implicit_def. That means it can def / use any register and passes (e.g. register scavenger) can feel free to ignore them.
The register allocator, when it allocates a register to a virtual register defined by an implicit_def, can allocate any physical register without worrying about overlapping live ranges. It should mark all of operands of the said virtual register so later passes will do the right thing.
This is not the best solution. But it should be a lot less fragile to having the scavenger try to track what is defined by implicit_def.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74518 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGSDNodesEmit.cpp
|
| 4784f1fc73abf6005b7b7262d395af71b57b1255 |
30-Jun-2009 |
Evan Cheng <evan.cheng@apple.com> |
Add a bit IsUndef to MachineOperand. This indicates the def / use register operand is defined by an implicit_def. That means it can def / use any register and passes (e.g. register scavenger) can feel free to ignore them.
The register allocator, when it allocates a register to a virtual register defined by an implicit_def, can allocate any physical register without worrying about overlapping live ranges. It should mark all of operands of the said virtual register so later passes will do the right thing.
This is not the best solution. But it should be a lot less fragile to having the scavenger try to track what is defined by implicit_def.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74518 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGSDNodesEmit.cpp
|
| 093adbb08652b7b6179629f5c184f8a9e3b85792 |
27-Jun-2009 |
Chris Lattner <sabre@nondot.org> |
fix a typo that GCC should have caught that causes crashes with -view-*-dags
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74364 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 5b93ea1ca3cf55a750e58abee7ed845b210d14c8 |
27-Jun-2009 |
Chris Lattner <sabre@nondot.org> |
fix a typo that GCC should have caught that causes crashes with -view-*-dags
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74364 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| b31fb964f42d4b51d0a4c1e04a343741857d91cb |
26-Jun-2009 |
Chris Lattner <sabre@nondot.org> |
fix a really subtle bug in the cross section of aliases and TLS:
the SelectionDAG::getGlobalAddress function properly looks through
aliases to determine thread-localness, but then passes the GV* down
to GlobalAddressSDNode::GlobalAddressSDNode which does not. Instead
of passing down isTarget, just pass down the predetermined node
opcode. This fixes some assertions with out of tree changes I'm
working on.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74325 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 505e982040fe7482e5f3c09b0c899c4e09393b69 |
26-Jun-2009 |
Chris Lattner <sabre@nondot.org> |
fix a really subtle bug in the cross section of aliases and TLS:
the SelectionDAG::getGlobalAddress function properly looks through
aliases to determine thread-localness, but then passes the GV* down
to GlobalAddressSDNode::GlobalAddressSDNode which does not. Instead
of passing down isTarget, just pass down the predetermined node
opcode. This fixes some assertions with out of tree changes I'm
working on.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74325 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 367c851c0ad52339e6ada06a837fabbdac8e062f |
26-Jun-2009 |
Chris Lattner <sabre@nondot.org> |
implement DOTGraphTraits<SelectionDAG*>::getNodeLabel in terms of
SDNode::print_details to eliminate a ton of near-duplicate code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74311 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGPrinter.cpp
|
| d212bb8ef2b36628eb3b41d882472814d0aad509 |
26-Jun-2009 |
Chris Lattner <sabre@nondot.org> |
implement DOTGraphTraits<SelectionDAG*>::getNodeLabel in terms of
SDNode::print_details to eliminate a ton of near-duplicate code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74311 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGPrinter.cpp
|
| 0075855025ee9bd75b7901163fddcfc54af31846 |
26-Jun-2009 |
Chris Lattner <sabre@nondot.org> |
dot graph viewing is apparently not using SDNode::print_details, this is bad,
but in the meantime lets print targetflags on node labels.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74274 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGPrinter.cpp
|
| 7bea038b3e24772b1a89634836aa79cb99c68bd9 |
26-Jun-2009 |
Chris Lattner <sabre@nondot.org> |
dot graph viewing is apparently not using SDNode::print_details, this is bad,
but in the meantime lets print targetflags on node labels.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74274 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGPrinter.cpp
|
| 97b4ec7b1556b37d51bd5bf649ee6b9641e12ac5 |
26-Jun-2009 |
Chris Lattner <sabre@nondot.org> |
propagate target operand flags from dag nodes into MachineOperands.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74273 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGSDNodesEmit.cpp
|
| 6ec66dba123a46a4006e0169d9edb8f5d9e1fbdc |
26-Jun-2009 |
Chris Lattner <sabre@nondot.org> |
propagate target operand flags from dag nodes into MachineOperands.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74273 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGSDNodesEmit.cpp
|
| b7a6de3cf2722676d4226e2b7c49f8b821ce7844 |
26-Jun-2009 |
Chris Lattner <sabre@nondot.org> |
fit in 80 cols
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74270 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGSDNodesEmit.cpp
|
| 5202312d2ed5078b0451838ee2661f4eb5ff2ef9 |
26-Jun-2009 |
Chris Lattner <sabre@nondot.org> |
fit in 80 cols
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74270 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGSDNodesEmit.cpp
|
| 583c796287dad07f7b4a979af3515bf93d7a65a4 |
25-Jun-2009 |
Chris Lattner <sabre@nondot.org> |
add targetflags to jump tables and constant pool entries.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74204 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| f5a5546f435a261c93078defb41ed18d9cafd7d3 |
25-Jun-2009 |
Chris Lattner <sabre@nondot.org> |
add targetflags to jump tables and constant pool entries.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74204 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 7123ef7585122d114673a67b8c0fdc86f6e0f901 |
25-Jun-2009 |
Chris Lattner <sabre@nondot.org> |
allow setting target operand flags on TargetGlobalAddress nodes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74203 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 2a4ed82ce2ba4a02f2a02eb4ed8ce5186f3f93da |
25-Jun-2009 |
Chris Lattner <sabre@nondot.org> |
allow setting target operand flags on TargetGlobalAddress nodes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74203 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 8430a2950c737eef2d6c6d098e265f4ff6e4723b |
25-Jun-2009 |
Chris Lattner <sabre@nondot.org> |
start bringing targetoperand flags into isel, first up, ExternalSymbol.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74199 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 1af2231da64a14d638406d133c7912bfc1c8a9ce |
25-Jun-2009 |
Chris Lattner <sabre@nondot.org> |
start bringing targetoperand flags into isel, first up, ExternalSymbol.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74199 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| ef31ae3dfca1e5a2262f35d7b71419ac69ca1411 |
25-Jun-2009 |
Owen Anderson <resistor@mac.com> |
Provide guards for this shared structure. I'm not sure this actually needs
to be shared, but how/where to privatize it is not immediately clear to me.
If any SelectionDAG experts see a better solution, please share!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74180 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| b4459088d62670b0f0333eab1b260622955ec3e5 |
25-Jun-2009 |
Owen Anderson <resistor@mac.com> |
Provide guards for this shared structure. I'm not sure this actually needs
to be shared, but how/where to privatize it is not immediately clear to me.
If any SelectionDAG experts see a better solution, please share!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74180 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 8dea566175b014b144637cf098e5e03c68685e7e |
24-Jun-2009 |
David Greene <greened@obbligato.org> |
This increases the maximum for MVT::LAST_VALUETYPE
This change doubles the allowable value for MVT::LAST_VALUETYPE. It does
this by doing several things.
1. Introduces MVT::MAX_ALLOWED_LAST_VALUETYPE which in this change has a
value of 64. This value contains the current maximum for the
MVT::LAST_VALUETYPE.
2. Instead of checking "MVT::LAST_VALUETYPE <= 32", all of those uses
now become "MVT::LAST_VALUETYPE <= MVT::MAX_ALLOWED_LAST_VALUETYPE"
3. Changes the dimension of the ValueTypeActions from 2 elements to four
elements and adds comments ahead of the declaration indicating the it is
"(MVT::MAX_ALLOWED_LAST_VALUETYPE/32) * 2". This at least lets us find
what is affected if and when MVT::MAX_ALLOWED_LAST_VALUETYPE gets
changed.
4. Adds initializers for the new elements of ValueTypeActions.
This does NOT add any types in MVT. That would be done separately.
This doubles the size of ValueTypeActions from 64 bits to 128 bits and
gives us the freedom to add more types for AVX.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74110 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
egalizeTypes.h
argetLowering.cpp
|
| f2e19d5dcfa13472493bb18339555686182b7df9 |
24-Jun-2009 |
David Greene <greened@obbligato.org> |
This increases the maximum for MVT::LAST_VALUETYPE
This change doubles the allowable value for MVT::LAST_VALUETYPE. It does
this by doing several things.
1. Introduces MVT::MAX_ALLOWED_LAST_VALUETYPE which in this change has a
value of 64. This value contains the current maximum for the
MVT::LAST_VALUETYPE.
2. Instead of checking "MVT::LAST_VALUETYPE <= 32", all of those uses
now become "MVT::LAST_VALUETYPE <= MVT::MAX_ALLOWED_LAST_VALUETYPE"
3. Changes the dimension of the ValueTypeActions from 2 elements to four
elements and adds comments ahead of the declaration indicating the it is
"(MVT::MAX_ALLOWED_LAST_VALUETYPE/32) * 2". This at least lets us find
what is affected if and when MVT::MAX_ALLOWED_LAST_VALUETYPE gets
changed.
4. Adds initializers for the new elements of ValueTypeActions.
This does NOT add any types in MVT. That would be done separately.
This doubles the size of ValueTypeActions from 64 bits to 128 bits and
gives us the freedom to add more types for AVX.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74110 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
egalizeTypes.h
argetLowering.cpp
|
| f4a1546148d94d9dd8f7561ab4b9516398281476 |
24-Jun-2009 |
Owen Anderson <resistor@mac.com> |
Get rid of the global CFGOnly flag by threading a ShortNames parameters through the GraphViz rendering code.
Update other uses in the codebase for this change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74084 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGPrinter.cpp
|
| 8cbc94afb71fd2da72d8f1284f7f53e39019fdec |
24-Jun-2009 |
Owen Anderson <resistor@mac.com> |
Get rid of the global CFGOnly flag by threading a ShortNames parameters through the GraphViz rendering code.
Update other uses in the codebase for this change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74084 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGPrinter.cpp
|
| 6933df972036a610d499a3d00512fae64087d86e |
24-Jun-2009 |
Dale Johannesen <dalej@apple.com> |
Rewrite 73900 per Duncan's suggestion.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74082 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 8539cfd30e6058e605ed2f38fb29523ea42e17a1 |
24-Jun-2009 |
Dale Johannesen <dalej@apple.com> |
Rewrite 73900 per Duncan's suggestion.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74082 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 017511b99fcd1c192b62e45f3166f83b6466f063 |
24-Jun-2009 |
Chris Lattner <sabre@nondot.org> |
remove dead makefile flags.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74065 91177308-0d34-0410-b5e6-96231b3b80d8
akefile
|
| 929a49356e2b95ac5a054bb53697e67f2a0bc43e |
24-Jun-2009 |
Chris Lattner <sabre@nondot.org> |
remove dead makefile flags.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74065 91177308-0d34-0410-b5e6-96231b3b80d8
akefile
|
| 5ebb9308d8bec5fdc2fd0e1cfd556a86ced3eff2 |
22-Jun-2009 |
Dale Johannesen <dalej@apple.com> |
Fix memcpy expansion so it won't generate invalid
types for the target (I think). This was breaking
the PPC32 calling sequence.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73900 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 08bc98e3cc1c6859ee78f304c0182098b580b56f |
22-Jun-2009 |
Dale Johannesen <dalej@apple.com> |
Fix memcpy expansion so it won't generate invalid
types for the target (I think). This was breaking
the PPC32 calling sequence.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73900 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 4f25cfbf68a546010da73707896a2b799056fe65 |
20-Jun-2009 |
Devang Patel <dpatel@apple.com> |
mv CodeGen/DebugLoc.h Support/DebugLoc.h
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73786 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
|
| 1e86a66b00b94adc4ad6977ef6b47c516ac62cec |
20-Jun-2009 |
Devang Patel <dpatel@apple.com> |
mv CodeGen/DebugLoc.h Support/DebugLoc.h
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73786 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
|
| 12cdf5033f0a22e3639e82b69c9e3b98831d8442 |
19-Jun-2009 |
Eli Friedman <eli.friedman@gmail.com> |
Minor cleanup; fixes review comments for a previous patch. Sorry for
taking so long to get to this!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73757 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeTypesGeneric.cpp
|
| 2fb070bf5a34f3fae89beb8609c92abc1b1a2551 |
19-Jun-2009 |
Eli Friedman <eli.friedman@gmail.com> |
Minor cleanup; fixes review comments for a previous patch. Sorry for
taking so long to get to this!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73757 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeTypesGeneric.cpp
|
| 78842787afbcc1925497e524fb8e4accc71007ac |
16-Jun-2009 |
Sanjiv Gupta <sanjiv.gupta@microchip.com> |
Fixed names of libcalls checked in r73480.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73483 91177308-0d34-0410-b5e6-96231b3b80d8
argetLowering.cpp
|
| 7d8d36a69f4089d1829797aae90d276c9fb5b260 |
16-Jun-2009 |
Sanjiv Gupta <sanjiv.gupta@microchip.com> |
Fixed names of libcalls checked in r73480.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73483 91177308-0d34-0410-b5e6-96231b3b80d8
argetLowering.cpp
|
| a5790f9a25cb1ef8e43f6113e62df18492540413 |
16-Jun-2009 |
Sanjiv Gupta <sanjiv.gupta@microchip.com> |
Added required libcalls for PIC16 (mostly floating points to integer casting operations).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73480 91177308-0d34-0410-b5e6-96231b3b80d8
argetLowering.cpp
|
| 8aa207ee306b6a5ce753511a5f811fc1cd2468e2 |
16-Jun-2009 |
Sanjiv Gupta <sanjiv.gupta@microchip.com> |
Added required libcalls for PIC16 (mostly floating points to integer casting operations).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73480 91177308-0d34-0410-b5e6-96231b3b80d8
argetLowering.cpp
|
| 43bc4d665fc60c113ba5a78268b97b223e970c68 |
16-Jun-2009 |
Eli Friedman <eli.friedman@gmail.com> |
Add some generic expansion logic for SMULO and UMULO. Fixes UMULO
support for x86, and UMULO/SMULO for many architectures, including PPC
(PR4201), ARM, and Cell. The resulting expansion isn't perfect, but it's
not bad.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73477 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| db3c169f3a3102d40352ba63fd14a75c819c7adc |
16-Jun-2009 |
Eli Friedman <eli.friedman@gmail.com> |
Add some generic expansion logic for SMULO and UMULO. Fixes UMULO
support for x86, and UMULO/SMULO for many architectures, including PPC
(PR4201), ARM, and Cell. The resulting expansion isn't perfect, but it's
not bad.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73477 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 97ecc8b8f4ab1c3f1d9fe9ef94cf86297aea3532 |
16-Jun-2009 |
Dan Gohman <gohman@apple.com> |
Change this from an assert to a cerr+exit, since it's diagnosing an
unsupported inline asm construct, rather than verifying a code invariant.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73435 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuild.cpp
|
| 15480bd1747eeef5eb36b46743cba50fa4791c01 |
16-Jun-2009 |
Dan Gohman <gohman@apple.com> |
Change this from an assert to a cerr+exit, since it's diagnosing an
unsupported inline asm construct, rather than verifying a code invariant.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73435 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuild.cpp
|
| e0406af64fb0083eedff8f208b20d5e67d9c2879 |
15-Jun-2009 |
Devang Patel <dpatel@apple.com> |
Gracefully handle imbalanced inline function begin and end markers.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73426 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
|
| 11a407f43fc0fb21df3156350175eaeeffaf7085 |
15-Jun-2009 |
Devang Patel <dpatel@apple.com> |
Gracefully handle imbalanced inline function begin and end markers.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73426 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
|
| dd48b7096e38a82fe84fefdc45cf0aa1a69ea380 |
15-Jun-2009 |
Arnold Schwaighofer <arnold.schwaighofer@gmail.com> |
CheckTailCallReturnConstraints is missing a check on the
incomming chain of the RETURN node. The incomming chain must
be the outgoing chain of the CALL node. This causes the
backend to identify tail calls that are not tail calls. This
patch fixes this.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73387 91177308-0d34-0410-b5e6-96231b3b80d8
argetLowering.cpp
|
| 5d2c01e48afba59be7bd0eaa10db784bf2073c20 |
15-Jun-2009 |
Arnold Schwaighofer <arnold.schwaighofer@gmail.com> |
CheckTailCallReturnConstraints is missing a check on the
incomming chain of the RETURN node. The incomming chain must
be the outgoing chain of the CALL node. This causes the
backend to identify tail calls that are not tail calls. This
patch fixes this.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73387 91177308-0d34-0410-b5e6-96231b3b80d8
argetLowering.cpp
|
| a2caab9866b62cc33c90aa819a82a9f802feea39 |
07-Jun-2009 |
Eli Friedman <eli.friedman@gmail.com> |
Tweak the expansion code for BIT_CONVERT to generate better code
converting from an MMX vector to an i64.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73024 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeTypesGeneric.cpp
|
| f10d3a7bcda97d28f9d325cb58cec7e17d7ed101 |
07-Jun-2009 |
Eli Friedman <eli.friedman@gmail.com> |
Tweak the expansion code for BIT_CONVERT to generate better code
converting from an MMX vector to an i64.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73024 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeTypesGeneric.cpp
|
| e6bb1e57c7e9e84d6ad12baa89e7f6119b6c46a7 |
07-Jun-2009 |
Eli Friedman <eli.friedman@gmail.com> |
Slightly generalize the code that handles shuffles of consecutive loads
on x86 to handle more cases. Fix a bug in said code that would cause it
to read past the end of an object. Rewrite the code in
SelectionDAGLegalize::ExpandBUILD_VECTOR to be a bit more general.
Remove PerformBuildVectorCombine, which is no longer necessary with
these changes. In addition to simplifying the code, with this change,
we can now catch a few more cases of consecutive loads.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73012 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 7a5e55509b99d579d56d126a7b503ec6fe153a8f |
07-Jun-2009 |
Eli Friedman <eli.friedman@gmail.com> |
Slightly generalize the code that handles shuffles of consecutive loads
on x86 to handle more cases. Fix a bug in said code that would cause it
to read past the end of an object. Rewrite the code in
SelectionDAGLegalize::ExpandBUILD_VECTOR to be a bit more general.
Remove PerformBuildVectorCombine, which is no longer necessary with
these changes. In addition to simplifying the code, with this change,
we can now catch a few more cases of consecutive loads.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73012 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| b8427d805310c8a2ebab03b9082622e74d9cdd33 |
06-Jun-2009 |
Eli Friedman <eli.friedman@gmail.com> |
Fix the expansion for CONCAT_VECTORS so that it doesn't create illegal
types.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72993 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 5257106c4d396b5d932f7b282c3ba255c4605195 |
06-Jun-2009 |
Eli Friedman <eli.friedman@gmail.com> |
Fix the expansion for CONCAT_VECTORS so that it doesn't create illegal
types.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72993 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| a188a97e440525a0a6650cebb48175b5aec721f3 |
06-Jun-2009 |
Eli Friedman <eli.friedman@gmail.com> |
Factor out a couple of helpers.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72992 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 7ef3d178660b82d1571757e49f44b004d772a116 |
06-Jun-2009 |
Eli Friedman <eli.friedman@gmail.com> |
Factor out a couple of helpers.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72992 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 42b0e36979d7d385b6d5002bad5ac2d6f00fbd0d |
06-Jun-2009 |
Eli Friedman <eli.friedman@gmail.com> |
Make SINT_TO_FP/UINT_TO_FP vector legalization queries query on the
integer type to be consistent with normal operation legalization. No visible
change because nothing is actually using this at the moment.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72980 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeVectorOps.cpp
|
| 556929a84bb8842cb07bebf4df67810d17be096e |
06-Jun-2009 |
Eli Friedman <eli.friedman@gmail.com> |
Make SINT_TO_FP/UINT_TO_FP vector legalization queries query on the
integer type to be consistent with normal operation legalization. No visible
change because nothing is actually using this at the moment.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72980 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeVectorOps.cpp
|
| c386c848cead46ecd3e94764aa5ea39749db2671 |
05-Jun-2009 |
Devang Patel <dpatel@apple.com> |
Add new function attribute - noimplicitfloat
Update code generator to use this attribute and remove NoImplicitFloat target option.
Update llc to set this attribute when -no-implicit-float command line option is used.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72959 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 578efa920abd218ba75a0fb3c9b8398f4c0a774b |
05-Jun-2009 |
Devang Patel <dpatel@apple.com> |
Add new function attribute - noimplicitfloat
Update code generator to use this attribute and remove NoImplicitFloat target option.
Update llc to set this attribute when -no-implicit-float command line option is used.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72959 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 65e800308932871350c3512e5a4861bfdc839126 |
05-Jun-2009 |
Nate Begeman <natebegeman@mac.com> |
Adapt the x86 build_vector dagcombine to the current state of the legalizer.
build vectors with i64 elements will only appear on 32b x86 before legalize.
Since vector widening occurs during legalize, and produces i64 build_vector
elements, the dag combiner is never run on these before legalize splits them
into 32b elements.
Teach the build_vector dag combine in x86 back end to recognize consecutive
loads producing the low part of the vector.
Convert the two uses of TLI's consecutive load recognizer to pass LoadSDNodes
since that was required implicitly.
Add a testcase for the transform.
Old:
subl $28, %esp
movl 32(%esp), %eax
movl 4(%eax), %ecx
movl %ecx, 4(%esp)
movl (%eax), %eax
movl %eax, (%esp)
movaps (%esp), %xmm0
pmovzxwd %xmm0, %xmm0
movl 36(%esp), %eax
movaps %xmm0, (%eax)
addl $28, %esp
ret
New:
movl 4(%esp), %eax
pmovzxwd (%eax), %xmm0
movl 8(%esp), %eax
movaps %xmm0, (%eax)
ret
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72957 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
argetLowering.cpp
|
| abc019968067736a499467f7db7fb758a425ca06 |
05-Jun-2009 |
Nate Begeman <natebegeman@mac.com> |
Adapt the x86 build_vector dagcombine to the current state of the legalizer.
build vectors with i64 elements will only appear on 32b x86 before legalize.
Since vector widening occurs during legalize, and produces i64 build_vector
elements, the dag combiner is never run on these before legalize splits them
into 32b elements.
Teach the build_vector dag combine in x86 back end to recognize consecutive
loads producing the low part of the vector.
Convert the two uses of TLI's consecutive load recognizer to pass LoadSDNodes
since that was required implicitly.
Add a testcase for the transform.
Old:
subl $28, %esp
movl 32(%esp), %eax
movl 4(%eax), %ecx
movl %ecx, 4(%esp)
movl (%eax), %eax
movl %eax, (%esp)
movaps (%esp), %xmm0
pmovzxwd %xmm0, %xmm0
movl 36(%esp), %eax
movaps %xmm0, (%eax)
addl $28, %esp
ret
New:
movl 4(%esp), %eax
pmovzxwd (%eax), %xmm0
movl 8(%esp), %eax
movaps %xmm0, (%eax)
ret
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72957 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
argetLowering.cpp
|
| 170d69e3148e4d96f68a3b5ac8834d03ec346913 |
05-Jun-2009 |
Sanjiv Gupta <sanjiv.gupta@microchip.com> |
Allow libcalls for i16 sdiv/udiv/rem operations.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72941 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeIntegerTypes.cpp
|
| a43a7aefd753fe7d6005cbebc9619268db4ae139 |
05-Jun-2009 |
Sanjiv Gupta <sanjiv.gupta@microchip.com> |
Allow libcalls for i16 sdiv/udiv/rem operations.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72941 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeIntegerTypes.cpp
|
| 7ce405e7aa026ef683da9eb8cc39cce87fcfa1d6 |
05-Jun-2009 |
Dan Gohman <gohman@apple.com> |
Split the Add, Sub, and Mul instruction opcodes into separate
integer and floating-point opcodes, introducing
FAdd, FSub, and FMul.
For now, the AsmParser, BitcodeReader, and IRBuilder all preserve
backwards compatability, and the Core LLVM APIs preserve backwards
compatibility for IR producers. Most front-ends won't need to change
immediately.
This implements the first step of the plan outlined here:
http://nondot.org/sabre/LLVMNotes/IntegerOverflow.txt
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72897 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
electionDAGBuild.cpp
electionDAGBuild.h
|
| ae3a0be92e33bc716722aa600983fc1535acb122 |
05-Jun-2009 |
Dan Gohman <gohman@apple.com> |
Split the Add, Sub, and Mul instruction opcodes into separate
integer and floating-point opcodes, introducing
FAdd, FSub, and FMul.
For now, the AsmParser, BitcodeReader, and IRBuilder all preserve
backwards compatability, and the Core LLVM APIs preserve backwards
compatibility for IR producers. Most front-ends won't need to change
immediately.
This implements the first step of the plan outlined here:
http://nondot.org/sabre/LLVMNotes/IntegerOverflow.txt
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72897 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
electionDAGBuild.cpp
electionDAGBuild.h
|
| d87cf08c273a278afbd9583e25bd9c2c1755bf7b |
04-Jun-2009 |
Dale Johannesen <dalej@apple.com> |
Fix FP_TO_UINT->i32 on ppc32 -mcpu=g5. This was
using Promote which won't work because i64 isn't
a legal type. It's easy enough to use Custom, but
then we have the problem that when the type
legalizer is promoting FP_TO_UINT->i16, it has no
way of telling it should prefer FP_TO_SINT->i32
to FP_TO_UINT->i32. I have uncomfortably hacked
this by making the type legalizer choose FP_TO_SINT
when both are Custom.
This fixes several regressions in the testsuite.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72891 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeIntegerTypes.cpp
|
| 4c9369df57a52cec5e1fc735e61a979766288074 |
04-Jun-2009 |
Dale Johannesen <dalej@apple.com> |
Fix FP_TO_UINT->i32 on ppc32 -mcpu=g5. This was
using Promote which won't work because i64 isn't
a legal type. It's easy enough to use Custom, but
then we have the problem that when the type
legalizer is promoting FP_TO_UINT->i16, it has no
way of telling it should prefer FP_TO_SINT->i32
to FP_TO_UINT->i32. I have uncomfortably hacked
this by making the type legalizer choose FP_TO_SINT
when both are Custom.
This fixes several regressions in the testsuite.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72891 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeIntegerTypes.cpp
|
| a22a840c2c561f5cee6691c3ae13dfcf230b7e45 |
04-Jun-2009 |
Dan Gohman <gohman@apple.com> |
Don't do the X * 0.0 -> 0.0 transformation in instcombine, because
instcombine doesn't know when it's safe. To partially compensate
for this, introduce new code to do this transformation in
dagcombine, which can use UnsafeFPMath.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72872 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
electionDAG.cpp
|
| 77b81fe487de709d41dfcc97bbb2941ae1bb80af |
04-Jun-2009 |
Dan Gohman <gohman@apple.com> |
Don't do the X * 0.0 -> 0.0 transformation in instcombine, because
instcombine doesn't know when it's safe. To partially compensate
for this, introduce new code to do this transformation in
dagcombine, which can use UnsafeFPMath.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72872 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
electionDAG.cpp
|
| 2ac69f6a48cf68cfb33bb37b310b088120b4084b |
04-Jun-2009 |
Dan Gohman <gohman@apple.com> |
Fix comments.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72870 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 68f32cbb1f9e62d5e6047b048c0d7d217b8717e1 |
04-Jun-2009 |
Dan Gohman <gohman@apple.com> |
Fix comments.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72870 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 747fe522899b2cdc0366b3c125341745ef99f2ba |
02-Jun-2009 |
Dale Johannesen <dalej@apple.com> |
Revert 72707 and 72709, for the moment.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72712 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
egalizeIntegerTypes.cpp
egalizeTypes.h
cheduleDAGSDNodes.cpp
electionDAG.cpp
|
| 874ae251c317788391f9c3f113957802d390a063 |
02-Jun-2009 |
Dale Johannesen <dalej@apple.com> |
Revert 72707 and 72709, for the moment.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72712 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
egalizeIntegerTypes.cpp
egalizeTypes.h
cheduleDAGSDNodes.cpp
electionDAG.cpp
|
| d6758f98bfa1f02e5218ed484002ea120a691a44 |
02-Jun-2009 |
Dale Johannesen <dalej@apple.com> |
Make the implicit inputs and outputs of target-independent
ADDC/ADDE use MVT::i1 (later, whatever it gets legalized to)
instead of MVT::Flag. Remove CARRY_FALSE in favor of 0; adjust
all target-independent code to use this format.
Most targets will still produce a Flag-setting target-dependent
version when selection is done. X86 is converted to use i32
instead, which means TableGen needs to produce different code
in xxxGenDAGISel.inc. This keys off the new supportsHasI1 bit
in xxxInstrInfo, currently set only for X86; in principle this
is temporary and should go away when all other targets have
been converted. All relevant X86 instruction patterns are
modified to represent setting and using EFLAGS explicitly. The
same can be done on other targets.
The immediate behavior change is that an ADC/ADD pair are no
longer tightly coupled in the X86 scheduler; they can be
separated by instructions that don't clobber the flags (MOV).
I will soon add some peephole optimizations based on using
other instructions that set the flags to feed into ADC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72707 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
egalizeIntegerTypes.cpp
egalizeTypes.h
cheduleDAGSDNodes.cpp
electionDAG.cpp
|
| 4150d83abe90a5da4ddf86433b7bf4329acfa57c |
02-Jun-2009 |
Dale Johannesen <dalej@apple.com> |
Make the implicit inputs and outputs of target-independent
ADDC/ADDE use MVT::i1 (later, whatever it gets legalized to)
instead of MVT::Flag. Remove CARRY_FALSE in favor of 0; adjust
all target-independent code to use this format.
Most targets will still produce a Flag-setting target-dependent
version when selection is done. X86 is converted to use i32
instead, which means TableGen needs to produce different code
in xxxGenDAGISel.inc. This keys off the new supportsHasI1 bit
in xxxInstrInfo, currently set only for X86; in principle this
is temporary and should go away when all other targets have
been converted. All relevant X86 instruction patterns are
modified to represent setting and using EFLAGS explicitly. The
same can be done on other targets.
The immediate behavior change is that an ADC/ADD pair are no
longer tightly coupled in the X86 scheduler; they can be
separated by instructions that don't clobber the flags (MOV).
I will soon add some peephole optimizations based on using
other instructions that set the flags to feed into ADC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72707 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
egalizeIntegerTypes.cpp
egalizeTypes.h
cheduleDAGSDNodes.cpp
electionDAG.cpp
|
| bb7b585dbc0b6b4ead10e89399c444faa8d5c04a |
31-May-2009 |
Duncan Sands <baldrick@free.fr> |
Rename CustomLowerResults to CustomLowerNode, since
it is used both when a result is illegal and when an
operand is illegal.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72658 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeFloatTypes.cpp
egalizeIntegerTypes.cpp
egalizeTypes.cpp
egalizeTypes.h
|
| f43071beddb7ed5b2fd7d2f06c4130460616a13d |
31-May-2009 |
Duncan Sands <baldrick@free.fr> |
Rename CustomLowerResults to CustomLowerNode, since
it is used both when a result is illegal and when an
operand is illegal.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72658 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeFloatTypes.cpp
egalizeIntegerTypes.cpp
egalizeTypes.cpp
egalizeTypes.h
|
| c19467424889a76b42eb17134180e42ff528c55b |
30-May-2009 |
Bill Wendling <isanbard@gmail.com> |
Untabification.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72604 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 51b16f473759c1546acbf308a5d3f3e7bf3ea23c |
30-May-2009 |
Bill Wendling <isanbard@gmail.com> |
Untabification.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72604 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| cad47c045c8b01585e3302e51a23ade4c26dbfb2 |
29-May-2009 |
Evan Cheng <evan.cheng@apple.com> |
Do not try to create a MVT type of width 0.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72557 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| d3c76bb6fc3c066286850e91b8bf03484ea2a56e |
29-May-2009 |
Evan Cheng <evan.cheng@apple.com> |
Do not try to create a MVT type of width 0.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72557 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 5281c2132e2f0fd0219a7a9ab8d3ef2a3f80a310 |
28-May-2009 |
Eli Friedman <eli.friedman@gmail.com> |
Re-commit r72514 and r72516 with a fixed version of BR_CC lowering.
This patch removes some special cases for opcodes and does a bit of
cleanup.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72536 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| bbdd903c52897df78750aa0caf2fc34d55b5ead0 |
28-May-2009 |
Eli Friedman <eli.friedman@gmail.com> |
Re-commit r72514 and r72516 with a fixed version of BR_CC lowering.
This patch removes some special cases for opcodes and does a bit of
cleanup.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72536 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| f98ca6bcea7231a1cea2f2b7f7d04211d605d4f6 |
28-May-2009 |
Evan Cheng <evan.cheng@apple.com> |
Incorporate patch feedbacks.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72533 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| cdcecc03ce7d3cece0ef2a0d93fade05506849c1 |
28-May-2009 |
Evan Cheng <evan.cheng@apple.com> |
Incorporate patch feedbacks.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72533 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 724bd8f55345d8c58beba7b98472258ce945cf79 |
28-May-2009 |
Bill Wendling <isanbard@gmail.com> |
Temporarily revert r72514 (and dependent patch r72516). It was causing this
failure during llvm-gcc bootstrap:
Assertion failed: (!Tmp2.getNode() && "Can't legalize BR_CC with legal condition!"), function ExpandNode, file /Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvmCore.roots/llvmCore~obj/src/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp, line 2923.
/Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvmgcc42.roots/llvmgcc42~obj/src/gcc/libgcc2.c:1727: internal compiler error: Abort trap
Please submit a full bug report,
with preprocessed source if appropriate.
See <URL:http://developer.apple.com/bugreporter> for instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72530 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 43b41273f3e56f49449992436cc39b406c9a6350 |
28-May-2009 |
Bill Wendling <isanbard@gmail.com> |
Temporarily revert r72514 (and dependent patch r72516). It was causing this
failure during llvm-gcc bootstrap:
Assertion failed: (!Tmp2.getNode() && "Can't legalize BR_CC with legal condition!"), function ExpandNode, file /Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvmCore.roots/llvmCore~obj/src/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp, line 2923.
/Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvmgcc42.roots/llvmgcc42~obj/src/gcc/libgcc2.c:1727: internal compiler error: Abort trap
Please submit a full bug report,
with preprocessed source if appropriate.
See <URL:http://developer.apple.com/bugreporter> for instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72530 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 11108da1594427115f3f7d002e0d6dd487357abc |
28-May-2009 |
Eli Friedman <eli.friedman@gmail.com> |
Remove a couple of useless functions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72516 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| e727d7a08406265acb10d0c52943ef92859710f2 |
28-May-2009 |
Eli Friedman <eli.friedman@gmail.com> |
Remove a couple of useless functions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72516 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 9140bd22cf5936f73c51193ee94cde5c10220c07 |
28-May-2009 |
Eli Friedman <eli.friedman@gmail.com> |
Remove special cases for more opcodes.
This is basically the end of this series of patches for LegalizeDAG; the
remaining special cases can't be removed without more infrastructure
work. There's a FIXME for each relevant opcode near the beginning of
SelectionDAGLegalize::LegalizeOp.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72514 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 1c39965342453ce33a3b3f9a863c38fdb45fd6ef |
28-May-2009 |
Eli Friedman <eli.friedman@gmail.com> |
Remove special cases for more opcodes.
This is basically the end of this series of patches for LegalizeDAG; the
remaining special cases can't be removed without more infrastructure
work. There's a FIXME for each relevant opcode near the beginning of
SelectionDAGLegalize::LegalizeOp.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72514 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| b303fbab66223a5ca43d23022a49bef5ae5adbe0 |
28-May-2009 |
Eli Friedman <eli.friedman@gmail.com> |
Remove special case for SETCC opcode; add some comments explaining why
some special cases are necessary.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72511 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| ad75460e30aab135057355fa0712141bf2cb08fc |
28-May-2009 |
Eli Friedman <eli.friedman@gmail.com> |
Remove special case for SETCC opcode; add some comments explaining why
some special cases are necessary.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72511 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 36607b0dacdd0ea9c99caacdbfa8dace07329f42 |
28-May-2009 |
Eli Friedman <eli.friedman@gmail.com> |
Some minor cleanups.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72509 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 3be2e514c9e7b20135be5b9df3e9aa1cb08cb374 |
28-May-2009 |
Eli Friedman <eli.friedman@gmail.com> |
Some minor cleanups.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72509 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 2f5d3a50b3d4206d83f7ccc4e95c3c0465d6e460 |
28-May-2009 |
Evan Cheng <evan.cheng@apple.com> |
Added optimization that narrow load / op / store and the 'op' is a bit twiddling instruction and its second operand is an immediate. If bits that are touched by 'op' can be done with a narrower instruction, reduce the width of the load and store as well. This happens a lot with bitfield manipulation code.
e.g.
orl $65536, 8(%rax)
=>
orb $1, 10(%rax)
Since narrowing is not always a win, e.g. i32 -> i16 is a loss on x86, dag combiner consults with the target before performing the optimization.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72507 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 8b944d39b356135676459152385f05c496951f6c |
28-May-2009 |
Evan Cheng <evan.cheng@apple.com> |
Added optimization that narrow load / op / store and the 'op' is a bit twiddling instruction and its second operand is an immediate. If bits that are touched by 'op' can be done with a narrower instruction, reduce the width of the load and store as well. This happens a lot with bitfield manipulation code.
e.g.
orl $65536, 8(%rax)
=>
orb $1, 10(%rax)
Since narrowing is not always a win, e.g. i32 -> i16 is a loss on x86, dag combiner consults with the target before performing the optimization.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72507 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| e7fde9f81755b2d2b71146cc99f2a1d44342c65b |
27-May-2009 |
Eli Friedman <eli.friedman@gmail.com> |
Minor cleanups; add a better explanation for the issue with
BUILD_VECTOR.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72469 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| b5da3f6f98b28afc0c62572c164ffccb4004827f |
27-May-2009 |
Eli Friedman <eli.friedman@gmail.com> |
Minor cleanups; add a better explanation for the issue with
BUILD_VECTOR.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72469 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| ed053c0a914befdd1a83b5fe18e46eda1a9b3c48 |
27-May-2009 |
Eli Friedman <eli.friedman@gmail.com> |
Remove more special cases for opcodes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72468 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 4bc8c718218159fe410462f6e3670e7cb76c0c04 |
27-May-2009 |
Eli Friedman <eli.friedman@gmail.com> |
Remove more special cases for opcodes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72468 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| cad61b8f7471149e0ed5de0506dd782ea7bf8006 |
27-May-2009 |
Eli Friedman <eli.friedman@gmail.com> |
Remove special cases for more opcodes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72467 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
egalizeVectorOps.cpp
|
| 509150f973ae650a57b79010a3ec36e60e40f41d |
27-May-2009 |
Eli Friedman <eli.friedman@gmail.com> |
Remove special cases for more opcodes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72467 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
egalizeVectorOps.cpp
|
| 375652ba013c714e580a68f6c2d61ecdc65b556b |
27-May-2009 |
Eli Friedman <eli.friedman@gmail.com> |
Removing more special cases from LegalizeDAG.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72465 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| f6f20a7779c5308ccb3e4306552d749091a77a60 |
27-May-2009 |
Eli Friedman <eli.friedman@gmail.com> |
Removing more special cases from LegalizeDAG.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72465 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| ddb45ea7c3b1b064b732f37ae4fea58e9299058d |
27-May-2009 |
Eli Friedman <eli.friedman@gmail.com> |
Eliminate more special cases for opcodes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72464 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 26ea8f982fb58245d3735b80ce04bc8050348a19 |
27-May-2009 |
Eli Friedman <eli.friedman@gmail.com> |
Eliminate more special cases for opcodes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72464 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 0f7deb53c06791d05298505531800497e027deed |
27-May-2009 |
Eli Friedman <eli.friedman@gmail.com> |
Remove more special cases from LegalizeDAG.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72456 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| f6b23bfc79cf9f605a2e74942c90799ff4f1a17e |
27-May-2009 |
Eli Friedman <eli.friedman@gmail.com> |
Remove more special cases from LegalizeDAG.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72456 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 98cace6d4c701959b388a98e920c0214ce598412 |
27-May-2009 |
Eli Friedman <eli.friedman@gmail.com> |
Remove unused argument.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72455 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 47b41f7e20b6af7aaaf0e050200102d55d038b9d |
27-May-2009 |
Eli Friedman <eli.friedman@gmail.com> |
Remove unused argument.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72455 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 3404c523fe86ff6c82a9aafe7dfb33bb6f4dc028 |
27-May-2009 |
Eli Friedman <eli.friedman@gmail.com> |
Remove more opcode special cases.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72454 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 3f727d6c1b68e90a3ab2d95ec2229f8b2c40b84b |
27-May-2009 |
Eli Friedman <eli.friedman@gmail.com> |
Remove more opcode special cases.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72454 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 26cc99330bbab98aba15514fb37384fcf1e0a0d5 |
27-May-2009 |
Eli Friedman <eli.friedman@gmail.com> |
Start of refactoring LegalizeDAG so that we don't need specialized
handling for every single opcode.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72447 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 8c377c7296d8a8104231442c3f6c27296249ec5f |
27-May-2009 |
Eli Friedman <eli.friedman@gmail.com> |
Start of refactoring LegalizeDAG so that we don't need specialized
handling for every single opcode.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72447 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 0e88384d97a20d105270b8a070bde02a74290f14 |
26-May-2009 |
Eli Friedman <eli.friedman@gmail.com> |
Delete a bunch of dead code from LegalizeDAG.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72414 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 74807f2520715056be399a2bc59dfc8b6f8f3eb2 |
26-May-2009 |
Eli Friedman <eli.friedman@gmail.com> |
Delete a bunch of dead code from LegalizeDAG.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72414 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 63f7ac9eed9bded6e344bd5f31fff35a9ba990a0 |
24-May-2009 |
Eli Friedman <eli.friedman@gmail.com> |
Add a comment which should hopefully make the purpose of this method a
bit clearer.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72374 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeVectorOps.cpp
|
| c046c00d0a1f65483a8c69f26c66fc74f5228332 |
24-May-2009 |
Eli Friedman <eli.friedman@gmail.com> |
Add a comment which should hopefully make the purpose of this method a
bit clearer.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72374 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeVectorOps.cpp
|
| 66c5365caa055fbb305f16cc7e27149f21f84ea0 |
24-May-2009 |
Eli Friedman <eli.friedman@gmail.com> |
Minor improvement to FCOPYSIGN to use BIT_CONVERT in cases where the
corresponding integer type is legal.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72373 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 57f1a4bc40e9103cd41cf541b9d6a73b92f0acba |
24-May-2009 |
Eli Friedman <eli.friedman@gmail.com> |
Minor improvement to FCOPYSIGN to use BIT_CONVERT in cases where the
corresponding integer type is legal.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72373 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 57e542700d20f066920d4f0430b797990ec2661e |
24-May-2009 |
Eli Friedman <eli.friedman@gmail.com> |
Rewrite ISD::FCOPYSIGN lowering to never use i64. Not really ideal, but
it's late, and I don't have any better ideas at the moment. Fixes PR4257.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72363 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| ed2f8c557a86612ee14fea25e7be2d3c1445951a |
24-May-2009 |
Eli Friedman <eli.friedman@gmail.com> |
Rewrite ISD::FCOPYSIGN lowering to never use i64. Not really ideal, but
it's late, and I don't have any better ideas at the moment. Fixes PR4257.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72363 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 69eb9c201cbe6a289bb42973e00bf79bc545fbc6 |
24-May-2009 |
Eli Friedman <eli.friedman@gmail.com> |
Update for CMakeLists; untested, so tell me if there are issues.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72360 91177308-0d34-0410-b5e6-96231b3b80d8
MakeLists.txt
|
| 7d869fb062aee8a3de7dad23eb48d7a5d2d64190 |
24-May-2009 |
Eli Friedman <eli.friedman@gmail.com> |
Update for CMakeLists; untested, so tell me if there are issues.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72360 91177308-0d34-0410-b5e6-96231b3b80d8
MakeLists.txt
|
| 32874522768f22dd3f55dc5e1c2cff13715378d3 |
24-May-2009 |
Eli Friedman <eli.friedman@gmail.com> |
Remove checks of getTypeAction from LegalizeOp; we already assert that
all results and all operands are legal, so this change shouldn't affect
behavior at all.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72359 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 957bffaeca6a0e2ccc684d753df1d87e8e053fe2 |
24-May-2009 |
Eli Friedman <eli.friedman@gmail.com> |
Remove checks of getTypeAction from LegalizeOp; we already assert that
all results and all operands are legal, so this change shouldn't affect
behavior at all.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72359 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 65d41930c0358f7488100a740087e7ef29e4ac88 |
24-May-2009 |
Eli Friedman <eli.friedman@gmail.com> |
Disable type legalization in LegalizeDAG.
This leaves around 4000 lines of dead code; I'll clean that up
in subsequent commits.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72358 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 1fde9c5f771922f12fefc903850c4eca303297d9 |
24-May-2009 |
Eli Friedman <eli.friedman@gmail.com> |
Disable type legalization in LegalizeDAG.
This leaves around 4000 lines of dead code; I'll clean that up
in subsequent commits.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72358 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 4421bc828d03a462864519150a96c51b6c989f9c |
24-May-2009 |
Eli Friedman <eli.friedman@gmail.com> |
Fix a bug in the expansion of EXTRACT_SUBVECTOR in
ExpandExtractFromVectorThroughStack.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72351 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 2a35b1c54ba55a917e01e0043efcf67e20505953 |
24-May-2009 |
Eli Friedman <eli.friedman@gmail.com> |
Fix a bug in the expansion of EXTRACT_SUBVECTOR in
ExpandExtractFromVectorThroughStack.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72351 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| ed3d4b1c5cc683d7026c39cc76f2645bd436ed20 |
24-May-2009 |
Eli Friedman <eli.friedman@gmail.com> |
Add a proper implementation of EXTRACT_SUBVECTOR legalization that
doesn't split legal vector operands. This is necessary because the
type legalization (and therefore, vector splitting) code will be going
away soon.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72349 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 3d43b3f6d7e1d3516052f20bf2d14727ebddb8ff |
24-May-2009 |
Eli Friedman <eli.friedman@gmail.com> |
Add a proper implementation of EXTRACT_SUBVECTOR legalization that
doesn't split legal vector operands. This is necessary because the
type legalization (and therefore, vector splitting) code will be going
away soon.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72349 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| a9bb5d91c0090d8492df3314237c97cbbccfc02e |
23-May-2009 |
Edwin Török <edwintorok@gmail.com> |
Fix PR4254.
The DAGCombiner created a negative shiftamount, stored in an
unsigned variable. Later the optimizer eliminated the shift entirely as being
undefined.
Example: (srl (shl X, 56) 48). ShiftAmt is 4294967288.
Fix it by checking that the shiftamount is positive, and storing in a signed
variable.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72331 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 6bb4958543e2b7ff412b3dac3ebf01a184193ad7 |
23-May-2009 |
Torok Edwin <edwintorok@gmail.com> |
Fix PR4254.
The DAGCombiner created a negative shiftamount, stored in an
unsigned variable. Later the optimizer eliminated the shift entirely as being
undefined.
Example: (srl (shl X, 56) 48). ShiftAmt is 4294967288.
Fix it by checking that the shiftamount is positive, and storing in a signed
variable.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72331 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| e7cf6a8ec347079c178290e279b63451c4d633ea |
23-May-2009 |
Eli Friedman <eli.friedman@gmail.com> |
Add a new step to legalization to legalize vector math operations. This
will allow simplifying LegalizeDAG to eliminate type legalization. (I
have a patch to do that, but it's not quite finished; I'll commit it
once it's finished and I've fixed any review comments for this patch.)
See the comment at the beginning of
lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp for more details on the
motivation for this patch.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72325 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeVectorOps.cpp
electionDAGISel.cpp
|
| 5c22c8074404797f1313b1334757254fb5c6487a |
23-May-2009 |
Eli Friedman <eli.friedman@gmail.com> |
Add a new step to legalization to legalize vector math operations. This
will allow simplifying LegalizeDAG to eliminate type legalization. (I
have a patch to do that, but it's not quite finished; I'll commit it
once it's finished and I've fixed any review comments for this patch.)
See the comment at the beginning of
lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp for more details on the
motivation for this patch.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72325 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeVectorOps.cpp
electionDAGISel.cpp
|
| f325c4808b01ed9a5230faec3be5a8fbddf18c76 |
22-May-2009 |
Duncan Sands <baldrick@free.fr> |
Add a new codegen pass that normalizes dwarf exception handling
code in preparation for code generation. The main thing it does
is handle the case when eh.exception calls (and, in a future
patch, eh.selector calls) are far away from landing pads. Right
now in practice you only find eh.exception calls close to landing
pads: either in a landing pad (the common case) or in a landing
pad successor, due to loop passes shifting them about. However
future exception handling improvements will result in calls far
from landing pads:
(1) Inlining of rewinds. Consider the following case:
In function @f:
...
invoke @g to label %normal unwind label %unwinds
...
unwinds:
%ex = call i8* @llvm.eh.exception()
...
In function @g:
...
invoke @something to label %continue unwind label %handler
...
handler:
%ex = call i8* @llvm.eh.exception()
... perform cleanups ...
"rethrow exception"
Now inline @g into @f. Currently this is turned into:
In function @f:
...
invoke @something to label %continue unwind label %handler
...
handler:
%ex = call i8* @llvm.eh.exception()
... perform cleanups ...
invoke "rethrow exception" to label %normal unwind label %unwinds
unwinds:
%ex = call i8* @llvm.eh.exception()
...
However we would like to simplify invoke of "rethrow exception" into
a branch to the %unwinds label. Then %unwinds is no longer a landing
pad, and the eh.exception call there is then far away from any landing
pads.
(2) Using the unwind instruction for cleanups.
It would be nice to have codegen handle the following case:
invoke @something to label %continue unwind label %run_cleanups
...
handler:
... perform cleanups ...
unwind
This requires turning "unwind" into a library call, which
necessarily takes a pointer to the exception as an argument
(this patch also does this unwind lowering). But that means
you are using eh.exception again far from a landing pad.
(3) Bugpoint simplifications. When bugpoint is simplifying
exception handling code it often generates eh.exception calls
far from a landing pad, which then causes codegen to assert.
Bugpoint then latches on to this assertion and loses sight
of the original problem.
Note that it is currently rare for this pass to actually do
anything. And in fact it normally shouldn't do anything at
all given the code coming out of llvm-gcc! But it does fire
a few times in the testsuite. As far as I can see this is
almost always due to the LoopStrengthReduce codegen pass
introducing pointless loop preheader blocks which are landing
pads and only contain a branch to another block. This other
block contains an eh.exception call. So probably by tweaking
LoopStrengthReduce a bit this can be avoided.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72276 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
electionDAGBuild.cpp
argetLowering.cpp
|
| b0f1e1780c736c62fb99e5824825d2a60a53b53b |
22-May-2009 |
Duncan Sands <baldrick@free.fr> |
Add a new codegen pass that normalizes dwarf exception handling
code in preparation for code generation. The main thing it does
is handle the case when eh.exception calls (and, in a future
patch, eh.selector calls) are far away from landing pads. Right
now in practice you only find eh.exception calls close to landing
pads: either in a landing pad (the common case) or in a landing
pad successor, due to loop passes shifting them about. However
future exception handling improvements will result in calls far
from landing pads:
(1) Inlining of rewinds. Consider the following case:
In function @f:
...
invoke @g to label %normal unwind label %unwinds
...
unwinds:
%ex = call i8* @llvm.eh.exception()
...
In function @g:
...
invoke @something to label %continue unwind label %handler
...
handler:
%ex = call i8* @llvm.eh.exception()
... perform cleanups ...
"rethrow exception"
Now inline @g into @f. Currently this is turned into:
In function @f:
...
invoke @something to label %continue unwind label %handler
...
handler:
%ex = call i8* @llvm.eh.exception()
... perform cleanups ...
invoke "rethrow exception" to label %normal unwind label %unwinds
unwinds:
%ex = call i8* @llvm.eh.exception()
...
However we would like to simplify invoke of "rethrow exception" into
a branch to the %unwinds label. Then %unwinds is no longer a landing
pad, and the eh.exception call there is then far away from any landing
pads.
(2) Using the unwind instruction for cleanups.
It would be nice to have codegen handle the following case:
invoke @something to label %continue unwind label %run_cleanups
...
handler:
... perform cleanups ...
unwind
This requires turning "unwind" into a library call, which
necessarily takes a pointer to the exception as an argument
(this patch also does this unwind lowering). But that means
you are using eh.exception again far from a landing pad.
(3) Bugpoint simplifications. When bugpoint is simplifying
exception handling code it often generates eh.exception calls
far from a landing pad, which then causes codegen to assert.
Bugpoint then latches on to this assertion and loses sight
of the original problem.
Note that it is currently rare for this pass to actually do
anything. And in fact it normally shouldn't do anything at
all given the code coming out of llvm-gcc! But it does fire
a few times in the testsuite. As far as I can see this is
almost always due to the LoopStrengthReduce codegen pass
introducing pointless loop preheader blocks which are landing
pads and only contain a branch to another block. This other
block contains an eh.exception call. So probably by tweaking
LoopStrengthReduce a bit this can be avoided.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72276 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
electionDAGBuild.cpp
argetLowering.cpp
|
| 2d9b3cbe342bca2e2ec06f74e90a949c43b89fce |
21-May-2009 |
Jay Foad <jay.foad@gmail.com> |
Use v.data() instead of &v[0] when SmallVector v might be empty.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72210 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| e3e51c0038bd6ba2add82e2246e97edec0ab2204 |
21-May-2009 |
Jay Foad <jay.foad@gmail.com> |
Use v.data() instead of &v[0] when SmallVector v might be empty.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72210 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| bc121cc257b82165c7e476cd627e6236375f4dc9 |
21-May-2009 |
Bill Wendling <isanbard@gmail.com> |
Temporarily revert r72191. It was causing an assert during llvm-gcc
bootstrapping.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72200 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
electionDAGBuild.cpp
electionDAGBuild.h
|
| df7d5d317096c342ee1c459139914965008fbcd7 |
21-May-2009 |
Bill Wendling <isanbard@gmail.com> |
Temporarily revert r72191. It was causing an assert during llvm-gcc
bootstrapping.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72200 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
electionDAGBuild.cpp
electionDAGBuild.h
|
| 0c41264d8ca7e8bd4bab0413891e7fb1aa22d864 |
21-May-2009 |
Argiris Kirtzidis <akyrtzi@gmail.com> |
Introduce DebugScope which gets embedded into the machine instructions' DebugLoc.
DebugScope refers to a debug region, function or block.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72191 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
electionDAGBuild.cpp
electionDAGBuild.h
|
| a3437647dc6996499db4823c31242184c93e6e2e |
21-May-2009 |
Argyrios Kyrtzidis <akyrtzi@gmail.com> |
Introduce DebugScope which gets embedded into the machine instructions' DebugLoc.
DebugScope refers to a debug region, function or block.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72191 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
electionDAGBuild.cpp
electionDAGBuild.h
|
| f4e4613beefe9956dc2254f7d553a82db7296f3a |
20-May-2009 |
Eli Friedman <eli.friedman@gmail.com> |
Fix for PR4235: to build a floating-point value from integer parts,
build an integer and cast that to a float. This fixes a crash
caused by trying to split an f32 into two f16's.
This changes the behavior in test/CodeGen/XCore/fneg.ll because that
testcase now triggers a DAGCombine which converts the fneg into an integer
operation. If someone is interested, it's probably possible to tweak
the test to generate an actual fneg.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72162 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuild.cpp
|
| 2ac8b324eb4de4507858dcd33ce03ef9973bf1f3 |
20-May-2009 |
Eli Friedman <eli.friedman@gmail.com> |
Fix for PR4235: to build a floating-point value from integer parts,
build an integer and cast that to a float. This fixes a crash
caused by trying to split an f32 into two f16's.
This changes the behavior in test/CodeGen/XCore/fneg.ll because that
testcase now triggers a DAGCombine which converts the fneg into an integer
operation. If someone is interested, it's probably possible to tweak
the test to generate an actual fneg.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72162 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuild.cpp
|
| 1e1d610788e281a17a9073d86825d89d7358501d |
19-May-2009 |
Dan Gohman <gohman@apple.com> |
Remove the #ifndef NDEBUG from the FastISel debugging options. This
fixes dejagnu tests that use these options.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72094 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| dea4085da04e2e3993f9357ce5049a7fbe05e924 |
19-May-2009 |
Dan Gohman <gohman@apple.com> |
Remove the #ifndef NDEBUG from the FastISel debugging options. This
fixes dejagnu tests that use these options.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72094 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 7fb88bf0d090098142480431583a1f5d0c5bfdc1 |
18-May-2009 |
Bill Wendling <isanbard@gmail.com> |
Revert last commit. It was wrong.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72026 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuild.cpp
|
| 805da894cf7976e85ed001633fcaafbb5842dcf8 |
18-May-2009 |
Bill Wendling <isanbard@gmail.com> |
Revert last commit. It was wrong.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72026 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuild.cpp
|
| 087f6072c6c518c7693465989498d131af84619e |
18-May-2009 |
Bill Wendling <isanbard@gmail.com> |
Don't call RegionInlinedFnEnd if our optimization level isn't -O0.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72024 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuild.cpp
|
| 15ffc0826782bb498f4ea2722aa15f28cffd04ec |
18-May-2009 |
Bill Wendling <isanbard@gmail.com> |
Don't call RegionInlinedFnEnd if our optimization level isn't -O0.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72024 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuild.cpp
|
| a95d96c283d767f95b122f8064a3497ffb7ced07 |
18-May-2009 |
Daniel Dunbar <daniel@zuster.org> |
Silence Release-Asserts warnings.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72011 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
cheduleDAGSDNodesEmit.cpp
|
| 8c562e2d25d319f8bde7a1a60142203f316a2883 |
18-May-2009 |
Daniel Dunbar <daniel@zuster.org> |
Silence Release-Asserts warnings.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72011 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
cheduleDAGSDNodesEmit.cpp
|
| de74b17e55b3d9511ae5cd0ebf4c2c34f26a42f5 |
16-May-2009 |
Duncan Sands <baldrick@free.fr> |
Put back a bit of expensive checking logic that
was overenthusiastically deleted in r70234.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@71926 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeTypes.cpp
|
| 0394c4fb3d271b3a6736f167b812bbe445ddb5e9 |
16-May-2009 |
Duncan Sands <baldrick@free.fr> |
Put back a bit of expensive checking logic that
was overenthusiastically deleted in r70234.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@71926 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeTypes.cpp
|
| b875cf55f4406d6ad2f82001e992ce403673cf25 |
14-May-2009 |
Dan Gohman <gohman@apple.com> |
Add an assert to turn a segfault on an unsupported inline
asm construct into an assertion failure.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@71757 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuild.cpp
|
| e340e84196af8618b623d499a040150373ae5da4 |
14-May-2009 |
Dan Gohman <gohman@apple.com> |
Add an assert to turn a segfault on an unsupported inline
asm construct into an assertion failure.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@71757 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuild.cpp
|
| a0929a18ae6341fa1fcc786965cf3d5190ef4d2a |
14-May-2009 |
Jim Grosbach <grosbach@apple.com> |
Removing the HasBuiltinSetjmp flag and associated bits. Flagging the presence
of exception handling builtin sjlj targets in functions turns out not to
be necessary. Marking the intrinsic implementation in the .td file as
defining all registers is sufficient to get the context saved properly by
the containing function.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@71743 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuild.cpp
|
| 2afb3b7251dbcfadef7a8126e9516bde78fc13bb |
14-May-2009 |
Jim Grosbach <grosbach@apple.com> |
Removing the HasBuiltinSetjmp flag and associated bits. Flagging the presence
of exception handling builtin sjlj targets in functions turns out not to
be necessary. Marking the intrinsic implementation in the .td file as
defining all registers is sufficient to get the context saved properly by
the containing function.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@71743 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuild.cpp
|
| 79566823f83e7dc1719c5212404acf8995c1c4a0 |
13-May-2009 |
Evan Cheng <evan.cheng@apple.com> |
Run code placement optimization for targets that want it (arm and x86 for now).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@71726 91177308-0d34-0410-b5e6-96231b3b80d8
argetLowering.cpp
|
| 6ebf7bc7405ee79d27d50b70f0c1a474cbea820d |
13-May-2009 |
Evan Cheng <evan.cheng@apple.com> |
Run code placement optimization for targets that want it (arm and x86 for now).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@71726 91177308-0d34-0410-b5e6-96231b3b80d8
argetLowering.cpp
|
| c10915b85165887e1886179338c7d14925f95c52 |
13-May-2009 |
Jim Grosbach <grosbach@apple.com> |
Add support for GCC compatible builtin setjmp and longjmp intrinsics. This is
a supporting preliminary patch for GCC-compatible SjLJ exception handling. Note that these intrinsics are not designed to be invoked directly by the user, but
rather used by the front-end as target hooks for exception handling.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@71610 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuild.cpp
|
| 0e0da734bbdfa1d3f55cd04db31d83b97e4556f7 |
13-May-2009 |
Jim Grosbach <grosbach@apple.com> |
Add support for GCC compatible builtin setjmp and longjmp intrinsics. This is
a supporting preliminary patch for GCC-compatible SjLJ exception handling. Note that these intrinsics are not designed to be invoked directly by the user, but
rather used by the front-end as target hooks for exception handling.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@71610 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuild.cpp
|
| c13b734801e96c20256f0659c5ead91ba95caea3 |
11-May-2009 |
Dan Gohman <gohman@apple.com> |
When scalarizing a vector BITCAST, check whether the operand has vector
type, rather than assume that it does. If the operand is not vector, it
shouldn't be run through ScalarizeVectorOp. This fixes one of the
testcases in PR3886.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@71453 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 4e3fdf2c0fc58af9b3b52924708a6d162a52ba5f |
11-May-2009 |
Dan Gohman <gohman@apple.com> |
When scalarizing a vector BITCAST, check whether the operand has vector
type, rather than assume that it does. If the operand is not vector, it
shouldn't be run through ScalarizeVectorOp. This fixes one of the
testcases in PR3886.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@71453 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 9f5cd6ac683b552c750e10741d654b5c75dd61a7 |
10-May-2009 |
Bill Wendling <isanbard@gmail.com> |
--- Reverse-merging r71370 into '.':
U lib/CodeGen/SelectionDAG/SelectionDAGBuild.cpp
Revert r71370.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@71373 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuild.cpp
|
| c677fe5abaf903a3a5cb8fbd8e515c46e9e7a537 |
10-May-2009 |
Bill Wendling <isanbard@gmail.com> |
--- Reverse-merging r71370 into '.':
U lib/CodeGen/SelectionDAG/SelectionDAGBuild.cpp
Revert r71370.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@71373 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuild.cpp
|
| ff1fe04ab0bf21cd4e91bc13ad181bf5e5fdbee9 |
10-May-2009 |
Bill Wendling <isanbard@gmail.com> |
A debug function start was not being recorded when the optimization level wasn't
None. However, we were always recording the region end. There's no longer a good
reason for this code to be separated out between the different opt levels, as it
was doing pretty much the same thing anyway.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@71370 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuild.cpp
|
| e34b723d3ef31463210dcc538b3873d3841133f3 |
10-May-2009 |
Bill Wendling <isanbard@gmail.com> |
A debug function start was not being recorded when the optimization level wasn't
None. However, we were always recording the region end. There's no longer a good
reason for this code to be separated out between the different opt levels, as it
was doing pretty much the same thing anyway.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@71370 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuild.cpp
|
| ec4f97dd91023f63e05e94a333cdd2d4c57efedf |
09-May-2009 |
Duncan Sands <baldrick@free.fr> |
Rename PaddedSize to AllocSize, in the hope that this
will make it more obvious what it represents, and stop
it being confused with the StoreSize.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@71349 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
astISel.cpp
egalizeDAG.cpp
cheduleDAGSDNodesEmit.cpp
electionDAGBuild.cpp
|
| 777d2306b36816a53bc1ae1244c0dc7d998ae691 |
09-May-2009 |
Duncan Sands <baldrick@free.fr> |
Rename PaddedSize to AllocSize, in the hope that this
will make it more obvious what it represents, and stop
it being confused with the StoreSize.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@71349 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
astISel.cpp
egalizeDAG.cpp
cheduleDAGSDNodesEmit.cpp
electionDAGBuild.cpp
|
| 06b55d4444a31f816fb2ee27c5811a7382c0f9ab |
08-May-2009 |
Bill Wendling <isanbard@gmail.com> |
Mirror how Fast ISel determines if a region.end intrinsic is the end of an
inlined function or the end of a function. Before, this was never executing the
"inlined" version of the Record method.
This will become important once the inlined Dwarf writer patch lands.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@71268 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuild.cpp
|
| 6c4311dddbb57b0e4cdd30c37863706efe70cf9d |
08-May-2009 |
Bill Wendling <isanbard@gmail.com> |
Mirror how Fast ISel determines if a region.end intrinsic is the end of an
inlined function or the end of a function. Before, this was never executing the
"inlined" version of the Record method.
This will become important once the inlined Dwarf writer patch lands.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@71268 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuild.cpp
|
| da76d3224301c785aa971e60c20a75dd1bd8f52b |
08-May-2009 |
Anton Korobeynikov <asl@math.spbu.ru> |
Factor out cycle-finder code and make it generic.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@71241 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| c1c6ef8f74fc550f29cfec1f2fb699dd8c2fb94e |
08-May-2009 |
Anton Korobeynikov <asl@math.spbu.ru> |
Factor out cycle-finder code and make it generic.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@71241 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 3dfbdffbcff49319156b0f5c8910cfbb9c926ca8 |
08-May-2009 |
Anton Korobeynikov <asl@math.spbu.ru> |
Do not emit bit tests if target does not support natively left shift
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@71240 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuild.cpp
|
| d34167a4abbe576bef7dbe1b88771f09afc82a72 |
08-May-2009 |
Anton Korobeynikov <asl@math.spbu.ru> |
Do not emit bit tests if target does not support natively left shift
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@71240 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuild.cpp
|
| 5ee420258bca87825efaad969a5441f9367b231d |
08-May-2009 |
Anton Korobeynikov <asl@math.spbu.ru> |
Properly expand libcalls for urem / srem. Also make code more straightforward.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@71238 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 58c04e149629956185cdaa3b021793189008c0d2 |
08-May-2009 |
Anton Korobeynikov <asl@math.spbu.ru> |
Properly expand libcalls for urem / srem. Also make code more straightforward.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@71238 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| ba8652dbb02911c1e43c3dd6ad21813021a2f4ed |
08-May-2009 |
Anton Korobeynikov <asl@math.spbu.ru> |
Typo
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@71237 91177308-0d34-0410-b5e6-96231b3b80d8
argetLowering.cpp
|
| fb3f84fe16219467cef4ed181530e846177cb4df |
08-May-2009 |
Anton Korobeynikov <asl@math.spbu.ru> |
Typo
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@71237 91177308-0d34-0410-b5e6-96231b3b80d8
argetLowering.cpp
|
| d46dc02a07aa1fe353174d8b73aa1541bb0c1ec6 |
07-May-2009 |
Dan Gohman <gohman@apple.com> |
Revert 71165. It did more than just revert 71158 and it introduced
several regressions. The problem due to 71158 is now fixed.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@71176 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
electionDAGBuild.cpp
|
| 9a38e3e3991ea443e555d8060f91202a786acdd4 |
07-May-2009 |
Dan Gohman <gohman@apple.com> |
Revert 71165. It did more than just revert 71158 and it introduced
several regressions. The problem due to 71158 is now fixed.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@71176 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
electionDAGBuild.cpp
|
| d32c972780409e0415302847e3969acbb9ed9ad9 |
07-May-2009 |
Bill Wendling <isanbard@gmail.com> |
Temporarily revert r71158. It was causing a failure during a full bootstrap:
checking for bcopy... no
checking for getc_unlocked... Assertion failed: (0 && "Unknown SCEV kind!"), function operator(), file /Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvmCore.roots/llvmCore~obj/src/lib/Analysis/ScalarEvolution.cpp, line 511.
/Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvmgcc42.roots/llvmgcc42~obj/src/libdecnumber/decUtility.c:360: internal compiler error: Abort trap
Please submit a full bug report,
with preprocessed source if appropriate.
See <URL:http://developer.apple.com/bugreporter> for instructions.
make[4]: *** [decUtility.o] Error 1
make[4]: *** Waiting for unfinished jobs....
Assertion failed: (0 && "Unknown SCEV kind!"), function operator(), file /Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvmCore.roots/llvmCore~obj/src/lib/Analysis/ScalarEvolution.cpp, line 511.
/Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvmgcc42.roots/llvmgcc42~obj/src/libdecnumber/decNumber.c:5591: internal compiler error: Abort trap
Please submit a full bug report,
with preprocessed source if appropriate.
See <URL:http://developer.apple.com/bugreporter> for instructions.
make[4]: *** [decNumber.o] Error 1
make[3]: *** [all-stage2-libdecnumber] Error 2
make[3]: *** Waiting for unfinished jobs....
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@71165 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
electionDAGBuild.cpp
|
| 5b8479c38532a28d86dea8ded09a30ff68f26912 |
07-May-2009 |
Bill Wendling <isanbard@gmail.com> |
Temporarily revert r71158. It was causing a failure during a full bootstrap:
checking for bcopy... no
checking for getc_unlocked... Assertion failed: (0 && "Unknown SCEV kind!"), function operator(), file /Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvmCore.roots/llvmCore~obj/src/lib/Analysis/ScalarEvolution.cpp, line 511.
/Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvmgcc42.roots/llvmgcc42~obj/src/libdecnumber/decUtility.c:360: internal compiler error: Abort trap
Please submit a full bug report,
with preprocessed source if appropriate.
See <URL:http://developer.apple.com/bugreporter> for instructions.
make[4]: *** [decUtility.o] Error 1
make[4]: *** Waiting for unfinished jobs....
Assertion failed: (0 && "Unknown SCEV kind!"), function operator(), file /Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvmCore.roots/llvmCore~obj/src/lib/Analysis/ScalarEvolution.cpp, line 511.
/Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvmgcc42.roots/llvmgcc42~obj/src/libdecnumber/decNumber.c:5591: internal compiler error: Abort trap
Please submit a full bug report,
with preprocessed source if appropriate.
See <URL:http://developer.apple.com/bugreporter> for instructions.
make[4]: *** [decNumber.o] Error 1
make[3]: *** [all-stage2-libdecnumber] Error 2
make[3]: *** Waiting for unfinished jobs....
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@71165 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
electionDAGBuild.cpp
|
| f4510c09b01ed377583bd9ce57756f5a45fba00b |
07-May-2009 |
Argiris Kirtzidis <akyrtzi@gmail.com> |
Make DwarfWriter::RecordInlinedFnStart more like the other DwarfWriter's methods:
-Have it return a label ID
-Remove the unused Instruction parameter
No functionality change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@71132 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
electionDAGBuild.cpp
|
| 116b27444a206a2831d88fea5ce34ced8184ceca |
07-May-2009 |
Argyrios Kyrtzidis <akyrtzi@gmail.com> |
Make DwarfWriter::RecordInlinedFnStart more like the other DwarfWriter's methods:
-Have it return a label ID
-Remove the unused Instruction parameter
No functionality change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@71132 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
electionDAGBuild.cpp
|
| 427a8cc209def787169e2b2d7f54cdbdfab2d8ee |
06-May-2009 |
Evan Cheng <evan.cheng@apple.com> |
Do not use register as base ptr of pre- and post- inc/dec load / store nodes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@71098 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| caab129cd19441817906ea5ca69e341e81c598e3 |
06-May-2009 |
Evan Cheng <evan.cheng@apple.com> |
Do not use register as base ptr of pre- and post- inc/dec load / store nodes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@71098 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| cad542c6e68d975a35847b2a85f233ad34a004f5 |
06-May-2009 |
Duncan Sands <baldrick@free.fr> |
Add generic expansion of SUB when ADD and XOR
are legal. Based on a patch by Micah Villmow.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@71078 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| a9cad0e7e09e6d34de2fccb4f1294b7f0b8f3b68 |
06-May-2009 |
Duncan Sands <baldrick@free.fr> |
Add generic expansion of SUB when ADD and XOR
are legal. Based on a patch by Micah Villmow.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@71078 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 8058d70a45ea6f2da3ce0b8bae81a30acfe83395 |
05-May-2009 |
Evan Cheng <evan.cheng@apple.com> |
Move getInstrOperandRegClass from the scheduler to TargetInstrInfo.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70950 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGSDNodesEmit.cpp
|
| d923fc621ff5b5e500977edf9236c9e34e8d7ebc |
05-May-2009 |
Evan Cheng <evan.cheng@apple.com> |
Move getInstrOperandRegClass from the scheduler to TargetInstrInfo.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70950 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGSDNodesEmit.cpp
|
| d4c82b7b89758e475f5dedcf488deed0b0e531e9 |
05-May-2009 |
Chris Lattner <sabre@nondot.org> |
Make DBG_STOPPOINT nodes, and therefore DBG_LABEL labels, get a DebugLoc, so that it
shows up in -print-machineinstrs. This doesn't appear to affect anything, but it was
weird for some DBG_LABELs to have DebugLocs but not all of them.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70921 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
electionDAGBuild.cpp
|
| af29a5235d3a1a09e9fc2989a5d504f00fa9aaf3 |
05-May-2009 |
Chris Lattner <sabre@nondot.org> |
Make DBG_STOPPOINT nodes, and therefore DBG_LABEL labels, get a DebugLoc, so that it
shows up in -print-machineinstrs. This doesn't appear to affect anything, but it was
weird for some DBG_LABELs to have DebugLocs but not all of them.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70921 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
electionDAGBuild.cpp
|
| 7a969d8c47d8916099ff7a2dcb87cf42137e03c4 |
04-May-2009 |
asl <asl@91177308-0d34-0410-b5e6-96231b3b80d8> |
Fix code emission for conditional branches.
Patch by Collin Winter!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70898 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
electionDAGBuild.cpp
|
| fe095f39e7009c51d1c86769792ccbcad8cdd2ec |
04-May-2009 |
Mike Stump <mrs@apple.com> |
Restore minor deletion.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70892 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
electionDAGBuild.cpp
|
| 5e3ef11e85fa7208d4b08dea296680f93a46fbe0 |
04-May-2009 |
Argiris Kirtzidis <akyrtzi@gmail.com> |
Revert r70803 for now, it causes a regression.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70811 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
electionDAGBuild.cpp
|
| 1d783f9f34d2bef7772a07fe69e6d65e49182a7e |
04-May-2009 |
Argiris Kirtzidis <akyrtzi@gmail.com> |
-Remove the DwarfWriter::RecordSourceLine calls from the instruction selectors.
-Depend on DebugLocs for source line info.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70803 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
electionDAGBuild.cpp
|
| 9fe9c8ec7d7d1e260927cb66e91d5e69db8a6feb |
03-May-2009 |
Anton Korobeynikov <asl@math.spbu.ru> |
Fix typo
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70770 91177308-0d34-0410-b5e6-96231b3b80d8
argetLowering.cpp
|
| 6e8496f2a174ad9bcd0fa147a22e8e4e9ef3a583 |
03-May-2009 |
Anton Korobeynikov <asl@math.spbu.ru> |
Fix typo
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70770 91177308-0d34-0410-b5e6-96231b3b80d8
argetLowering.cpp
|
| 813090cf891325c715b9f6fb1546e6ce67fa8c8b |
03-May-2009 |
Anton Korobeynikov <asl@math.spbu.ru> |
Properly handle sdiv / udiv / srem / urem libcalls
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70764 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
argetLowering.cpp
|
| 38da80d0f58caa6b1a4709b1c614494360c1273c |
03-May-2009 |
Anton Korobeynikov <asl@math.spbu.ru> |
Properly handle sdiv / udiv / srem / urem libcalls
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70764 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
argetLowering.cpp
|
| c31642f7af64bfaed36064b52a5cb2366fd01064 |
03-May-2009 |
Anton Korobeynikov <asl@math.spbu.ru> |
Proper name 16 bit libcalls
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70750 91177308-0d34-0410-b5e6-96231b3b80d8
argetLowering.cpp
|
| eaef815cbd29e458410cac3ab0a3cd0811a13fa6 |
03-May-2009 |
Anton Korobeynikov <asl@math.spbu.ru> |
Proper name 16 bit libcalls
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70750 91177308-0d34-0410-b5e6-96231b3b80d8
argetLowering.cpp
|
| 2f25c2c63fdc46c3b5b093b5cbdc6729f12a413a |
03-May-2009 |
Anton Korobeynikov <asl@math.spbu.ru> |
Add libcall expansion for 16 and 128 bit muls
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70749 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 55e0249a9e49c060a94ace9c6bd36546ff24620f |
03-May-2009 |
Anton Korobeynikov <asl@math.spbu.ru> |
Add libcall expansion for 16 and 128 bit muls
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70749 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 77eaa6880b8209acc05de733ebaba5d146c321a0 |
03-May-2009 |
Argyrios Kyrtzidis <akyrtzi@gmail.com> |
-Move the DwarfWriter::ValidDebugInfo check to a static DIDescriptor::ValidDebugInfo
-Create DebugLocs without the need to have a DwarfWriter around
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70682 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
electionDAGBuild.cpp
|
| 2565734a60b19b69d83ca44e4a07d14e9ecb59b7 |
03-May-2009 |
Argiris Kirtzidis <akyrtzi@gmail.com> |
-Move the DwarfWriter::ValidDebugInfo check to a static DIDescriptor::ValidDebugInfo
-Create DebugLocs without the need to have a DwarfWriter around
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70682 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
electionDAGBuild.cpp
|
| 5ee24e54d76ab86279fe196c03d6e03f5b4b3b3b |
01-May-2009 |
Bob Wilson <bob.wilson@apple.com> |
Allow CONCAT_VECTORS nodes to be legal or have custom lowering for some targets.
Changes to take advantage of this will come later.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70560 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
argetLowering.cpp
|
| 7bc6b7a57b1252c6b79b32f331bc78bf01262b58 |
01-May-2009 |
Bob Wilson <bob.wilson@apple.com> |
Allow CONCAT_VECTORS nodes to be legal or have custom lowering for some targets.
Changes to take advantage of this will come later.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70560 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
argetLowering.cpp
|
| a26eae64ddf607549f9e47046d46ea5b9ec648b4 |
01-May-2009 |
Argyrios Kyrtzidis <akyrtzi@gmail.com> |
Make DebugLoc independent of DwarfWriter.
-Replace DebugLocTuple's Source ID with CompileUnit's GlobalVariable*
-Remove DwarfWriter::getOrCreateSourceID
-Make necessary changes for the above (fix callsites, etc.)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70520 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
egalizeDAG.cpp
electionDAGBuild.cpp
|
| 5b02f4c65921e7f0f0cc997aa6f0b614259e4aea |
01-May-2009 |
Argiris Kirtzidis <akyrtzi@gmail.com> |
Make DebugLoc independent of DwarfWriter.
-Replace DebugLocTuple's Source ID with CompileUnit's GlobalVariable*
-Remove DwarfWriter::getOrCreateSourceID
-Make necessary changes for the above (fix callsites, etc.)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70520 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
egalizeDAG.cpp
electionDAGBuild.cpp
|
| 4e5ea553d055512b0b8aa098e363ae17bafda957 |
30-Apr-2009 |
Jay Foad <jay.foad@gmail.com> |
Move helper functions for optimizing division by constant into the APInt
class.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70488 91177308-0d34-0410-b5e6-96231b3b80d8
argetLowering.cpp
|
| 56b11f9f93622a04dffaa9ac1697ef92ca3469dc |
30-Apr-2009 |
Jay Foad <jay.foad@gmail.com> |
Move helper functions for optimizing division by constant into the APInt
class.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70488 91177308-0d34-0410-b5e6-96231b3b80d8
argetLowering.cpp
|
| 6c147293d63e836e3677eb933ff0513c7cad1e6a |
30-Apr-2009 |
Chris Lattner <sabre@nondot.org> |
fix a regression handling indirect results: these need to be considered
memory operands otherwise the writebacks get lost when the inline asm
doesn't otherwise have side effects. This fixes rdar://6839427, though
clang really shouldn't generate these anymore.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70455 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuild.cpp
|
| 7bf555c9b91af340207cfe4581b61cc983d40b52 |
30-Apr-2009 |
Chris Lattner <sabre@nondot.org> |
fix a regression handling indirect results: these need to be considered
memory operands otherwise the writebacks get lost when the inline asm
doesn't otherwise have side effects. This fixes rdar://6839427, though
clang really shouldn't generate these anymore.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70455 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuild.cpp
|
| 98a366d547772010e94609e4584489b3e5ce0043 |
30-Apr-2009 |
Bill Wendling <isanbard@gmail.com> |
Instead of passing in an unsigned value for the optimization level, use an enum,
which better identifies what the optimization is doing. And is more flexible for
future uses.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70440 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
astISel.cpp
egalizeDAG.cpp
cheduleDAGFast.cpp
cheduleDAGList.cpp
cheduleDAGRRList.cpp
electionDAGBuild.cpp
electionDAGBuild.h
electionDAGISel.cpp
|
| 5ed22ac54c2530a1d0d140d259f881f3b2040e56 |
30-Apr-2009 |
Bill Wendling <isanbard@gmail.com> |
Instead of passing in an unsigned value for the optimization level, use an enum,
which better identifies what the optimization is doing. And is more flexible for
future uses.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70440 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
astISel.cpp
egalizeDAG.cpp
cheduleDAGFast.cpp
cheduleDAGList.cpp
cheduleDAGRRList.cpp
electionDAGBuild.cpp
electionDAGBuild.h
electionDAGISel.cpp
|
| ec8eee2d3a402dd001daae3865bc5c10b41c323e |
30-Apr-2009 |
Nate Begeman <natebegeman@mac.com> |
Fix infinite recursion in the C++ code which handles movddup by making it unnecessary.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70425 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| b44aad7c75421736354c1f04cd7f824d4720e6ae |
30-Apr-2009 |
Nate Begeman <natebegeman@mac.com> |
Fix infinite recursion in the C++ code which handles movddup by making it unnecessary.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70425 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| a641575828192c741531d431fbf191e6c1ba17c5 |
29-Apr-2009 |
Nate Begeman <natebegeman@mac.com> |
Update comment, replace theoretically impossible check with an assert.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70391 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 4da7620a38a361d4a28e3a5e267c8cfe13c8873f |
29-Apr-2009 |
Nate Begeman <natebegeman@mac.com> |
Update comment, replace theoretically impossible check with an assert.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70391 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 5a5ca1519e04310f585197c20e7ae584b7f2d11f |
29-Apr-2009 |
Nate Begeman <natebegeman@mac.com> |
Implement review feedback for vector shuffle work.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70372 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
egalizeDAG.cpp
egalizeTypes.h
egalizeVectorTypes.cpp
electionDAG.cpp
electionDAGBuild.cpp
|
| e8f61cb78f84e6fd82dabd4a5ab85691e70a7e88 |
29-Apr-2009 |
Nate Begeman <natebegeman@mac.com> |
Implement review feedback for vector shuffle work.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70372 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
egalizeDAG.cpp
egalizeTypes.h
egalizeVectorTypes.cpp
electionDAG.cpp
electionDAGBuild.cpp
|
| a3518a1d6a6a9a7519d3a8d434cde51617c1dc22 |
29-Apr-2009 |
Sanjiv Gupta <sanjiv.gupta@microchip.com> |
Add a public method called getAddressSpace() to the GlobalAddressSDNode.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70366 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| babc5c414464598c321c9889ad4cfa35581cbd53 |
29-Apr-2009 |
Sanjiv Gupta <sanjiv.gupta@microchip.com> |
Add a public method called getAddressSpace() to the GlobalAddressSDNode.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70366 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 672452d5a0dace689d7f9df9837c03afe3a74281 |
29-Apr-2009 |
Chris Lattner <sabre@nondot.org> |
Disable the load-shrinking optimization from looking at
anything larger than 64-bits, avoiding a crash. This should
really be fixed to use APInts, though type legalization happens
to help us out and we get good code on the attached testcase at
least.
This fixes rdar://6836460
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70360 91177308-0d34-0410-b5e6-96231b3b80d8
argetLowering.cpp
|
| fc447d9b3b0d8ddfbc4b39e2932baa1327e4eece |
29-Apr-2009 |
Chris Lattner <sabre@nondot.org> |
Disable the load-shrinking optimization from looking at
anything larger than 64-bits, avoiding a crash. This should
really be fixed to use APInts, though type legalization happens
to help us out and we get good code on the attached testcase at
least.
This fixes rdar://6836460
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70360 91177308-0d34-0410-b5e6-96231b3b80d8
argetLowering.cpp
|
| be8cc2a3dedeb7685f07e68cdc4b9502eb97eb2b |
29-Apr-2009 |
Bill Wendling <isanbard@gmail.com> |
Second attempt:
Massive check in. This changes the "-fast" flag to "-O#" in llc. If you want to
use the old behavior, the flag is -O0. This change allows for finer-grained
control over which optimizations are run at different -O levels.
Most of this work was pretty mechanical. The majority of the fixes came from
verifying that a "fast" variable wasn't used anymore. The JIT still uses a
"Fast" flag. I'll change the JIT with a follow-up patch.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70343 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
astISel.cpp
egalizeDAG.cpp
cheduleDAGFast.cpp
cheduleDAGList.cpp
cheduleDAGRRList.cpp
electionDAGBuild.cpp
electionDAGBuild.h
electionDAGISel.cpp
|
| 58ed5d27258df9688ac2694cf5e3d31f7dbdeef6 |
29-Apr-2009 |
Bill Wendling <isanbard@gmail.com> |
Second attempt:
Massive check in. This changes the "-fast" flag to "-O#" in llc. If you want to
use the old behavior, the flag is -O0. This change allows for finer-grained
control over which optimizations are run at different -O levels.
Most of this work was pretty mechanical. The majority of the fixes came from
verifying that a "fast" variable wasn't used anymore. The JIT still uses a
"Fast" flag. I'll change the JIT with a follow-up patch.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70343 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
astISel.cpp
egalizeDAG.cpp
cheduleDAGFast.cpp
cheduleDAGList.cpp
cheduleDAGRRList.cpp
electionDAGBuild.cpp
electionDAGBuild.h
electionDAGISel.cpp
|
| fa4677b483b85217ac216f7e8d401c40cbe348aa |
28-Apr-2009 |
Jakob Stoklund Olesen <stoklund@2pi.dk> |
Move getSubRegisterRegClass from ScheduleDagSDNodesEmit.cpp to a TargetRegisterClass method.
Also make the method non-asserting. It will return NULL when given an invalid subreg index.
The method is needed by an upcoming patch.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70296 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGSDNodesEmit.cpp
|
| 016eb210814b38d998775c26672e23dc84401f5d |
28-Apr-2009 |
Jakob Stoklund Olesen <stoklund@2pi.dk> |
Move getSubRegisterRegClass from ScheduleDagSDNodesEmit.cpp to a TargetRegisterClass method.
Also make the method non-asserting. It will return NULL when given an invalid subreg index.
The method is needed by an upcoming patch.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70296 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGSDNodesEmit.cpp
|
| c69d56f1154342a57c9bdd4c17a10333e3520127 |
28-Apr-2009 |
Bill Wendling <isanbard@gmail.com> |
r70270 isn't ready yet. Back this out. Sorry for the noise.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70275 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
astISel.cpp
egalizeDAG.cpp
cheduleDAGFast.cpp
cheduleDAGList.cpp
cheduleDAGRRList.cpp
electionDAGBuild.cpp
electionDAGBuild.h
electionDAGISel.cpp
|
| f4d0c73cc3d9ae305b162f336dc14fbe7972e2e8 |
28-Apr-2009 |
Bill Wendling <isanbard@gmail.com> |
r70270 isn't ready yet. Back this out. Sorry for the noise.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70275 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
astISel.cpp
egalizeDAG.cpp
cheduleDAGFast.cpp
cheduleDAGList.cpp
cheduleDAGRRList.cpp
electionDAGBuild.cpp
electionDAGBuild.h
electionDAGISel.cpp
|
| 2e9d5f912a9841d3685ba0241abe1131943fed29 |
28-Apr-2009 |
Bill Wendling <isanbard@gmail.com> |
Massive check in. This changes the "-fast" flag to "-O#" in llc. If you want to
use the old behavior, the flag is -O0. This change allows for finer-grained
control over which optimizations are run at different -O levels.
Most of this work was pretty mechanical. The majority of the fixes came from
verifying that a "fast" variable wasn't used anymore. The JIT still uses a
"Fast" flag. I'm not 100% sure if it's necessary to change it there...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70270 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
astISel.cpp
egalizeDAG.cpp
cheduleDAGFast.cpp
cheduleDAGList.cpp
cheduleDAGRRList.cpp
electionDAGBuild.cpp
electionDAGBuild.h
electionDAGISel.cpp
|
| 11a01bfa097cfe006de022154709b545ee125523 |
28-Apr-2009 |
Bill Wendling <isanbard@gmail.com> |
Massive check in. This changes the "-fast" flag to "-O#" in llc. If you want to
use the old behavior, the flag is -O0. This change allows for finer-grained
control over which optimizations are run at different -O levels.
Most of this work was pretty mechanical. The majority of the fixes came from
verifying that a "fast" variable wasn't used anymore. The JIT still uses a
"Fast" flag. I'm not 100% sure if it's necessary to change it there...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70270 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
astISel.cpp
egalizeDAG.cpp
cheduleDAGFast.cpp
cheduleDAGList.cpp
cheduleDAGRRList.cpp
electionDAGBuild.cpp
electionDAGBuild.h
electionDAGISel.cpp
|
| 9771b91c2b4ce3baefdb9ba4ddfd9a9dd5077004 |
27-Apr-2009 |
Duncan Sands <baldrick@free.fr> |
Now that PR2957 is resolved, remove a bunch of
no-longer needed workarounds.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70234 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
egalizeTypes.cpp
egalizeTypes.h
egalizeVectorTypes.cpp
|
| a52554e58e82a1e43ddf41ac96706b7c817b5dcc |
27-Apr-2009 |
Duncan Sands <baldrick@free.fr> |
Now that PR2957 is resolved, remove a bunch of
no-longer needed workarounds.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70234 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
egalizeTypes.cpp
egalizeTypes.h
egalizeVectorTypes.cpp
|
| 9008ca6b6b4f638cfafccb593cbc5b1d3f5ab877 |
27-Apr-2009 |
Nate Begeman <natebegeman@mac.com> |
2nd attempt, fixing SSE4.1 issues and implementing feedback from duncan.
PR2957
ISD::VECTOR_SHUFFLE now stores an array of integers representing the shuffle
mask internal to the node, rather than taking a BUILD_VECTOR of ConstantSDNodes
as the shuffle mask. A value of -1 represents UNDEF.
In addition to eliminating the creation of illegal BUILD_VECTORS just to
represent shuffle masks, we are better about canonicalizing the shuffle mask,
resulting in substantially better code for some classes of shuffles.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70225 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
egalizeDAG.cpp
egalizeVectorTypes.cpp
electionDAG.cpp
electionDAGBuild.cpp
|
| 543d214c596c7c0f186038ddfe00462563b75ca8 |
27-Apr-2009 |
Nate Begeman <natebegeman@mac.com> |
2nd attempt, fixing SSE4.1 issues and implementing feedback from duncan.
PR2957
ISD::VECTOR_SHUFFLE now stores an array of integers representing the shuffle
mask internal to the node, rather than taking a BUILD_VECTOR of ConstantSDNodes
as the shuffle mask. A value of -1 represents UNDEF.
In addition to eliminating the creation of illegal BUILD_VECTORS just to
represent shuffle masks, we are better about canonicalizing the shuffle mask,
resulting in substantially better code for some classes of shuffles.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70225 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
egalizeDAG.cpp
egalizeVectorTypes.cpp
electionDAG.cpp
electionDAGBuild.cpp
|
| c7b3444095f9aa5398d134c780e327a187cda231 |
27-Apr-2009 |
Dan Gohman <gohman@apple.com> |
When transforming sext(trunc(load(x))) into sext(smaller load(x)),
the trunc is directly replaced with the smaller load, so don't
try to create a new sext node. This fixes PR4050.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70179 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 66f593ebed83919f2884d0cf5e200d0f4cbdd005 |
27-Apr-2009 |
Dan Gohman <gohman@apple.com> |
When transforming sext(trunc(load(x))) into sext(smaller load(x)),
the trunc is directly replaced with the smaller load, so don't
try to create a new sext node. This fixes PR4050.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70179 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 2bee0afb7d023e029975abf7d3157759fa797d37 |
25-Apr-2009 |
Dan Gohman <gohman@apple.com> |
Refactor the code to grab the low and high parts of a value
using EXTRACT_ELEMENT into a utility function.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70056 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeFloatTypes.cpp
egalizeTypes.cpp
egalizeTypes.h
egalizeTypesGeneric.cpp
|
| ee7b6098003f3c61bd233b0ce99e7e95e6539cf7 |
25-Apr-2009 |
Dan Gohman <gohman@apple.com> |
Refactor the code to grab the low and high parts of a value
using EXTRACT_ELEMENT into a utility function.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70056 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeFloatTypes.cpp
egalizeTypes.cpp
egalizeTypes.h
egalizeTypesGeneric.cpp
|
| 4128700ab11d0db62e5ba7ed8a8fc301c7aaa8b1 |
25-Apr-2009 |
Dan Gohman <gohman@apple.com> |
Add a top-level comment about DAGCombiner's role in the compiler.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70052 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| a0754aca17517c539c61408d6cc0c4facf165cd4 |
25-Apr-2009 |
Dan Gohman <gohman@apple.com> |
Add a top-level comment about DAGCombiner's role in the compiler.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70052 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 2f91f30b932ad56cd82398d872d4874facf84220 |
24-Apr-2009 |
Dale Johannesen <dalej@apple.com> |
Fix PR 4057, a crash doing float->char const folding.
This particular one is undefined behavior (although this
isn't related to the crash), so it will no longer do it
at compile time, which seems better.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@69990 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 63d4503dc11f83298c82a64d21214b481a967e3f |
24-Apr-2009 |
Dale Johannesen <dalej@apple.com> |
Fix PR 4057, a crash doing float->char const folding.
This particular one is undefined behavior (although this
isn't related to the crash), so it will no longer do it
at compile time, which seems better.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@69990 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 15684b29552393553524171bff1913e750f390f8 |
24-Apr-2009 |
Rafael Espindola <rafael.espindola@gmail.com> |
Revert 69952. Causes testsuite failures on linux x86-64.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@69967 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
egalizeDAG.cpp
egalizeVectorTypes.cpp
electionDAG.cpp
electionDAGBuild.cpp
|
| 37f8e8ace433a675e90a9c45ded7827a4d06f21b |
24-Apr-2009 |
Rafael Espindola <rafael.espindola@gmail.com> |
Revert 69952. Causes testsuite failures on linux x86-64.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@69967 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
egalizeDAG.cpp
egalizeVectorTypes.cpp
electionDAG.cpp
electionDAGBuild.cpp
|
| b706d29f9c5ed3ed9acc82f7ab46205ba56b92dc |
24-Apr-2009 |
Nate Begeman <natebegeman@mac.com> |
PR2957
ISD::VECTOR_SHUFFLE now stores an array of integers representing the shuffle
mask internal to the node, rather than taking a BUILD_VECTOR of ConstantSDNodes
as the shuffle mask. A value of -1 represents UNDEF.
In addition to eliminating the creation of illegal BUILD_VECTORS just to
represent shuffle masks, we are better about canonicalizing the shuffle mask,
resulting in substantially better code for some classes of shuffles.
A clean up of x86 shuffle code, and some canonicalizing in DAGCombiner is next.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@69952 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
egalizeDAG.cpp
egalizeVectorTypes.cpp
electionDAG.cpp
electionDAGBuild.cpp
|
| da17a81c88162e6dfc070f18b14e34f194697407 |
24-Apr-2009 |
Nate Begeman <natebegeman@mac.com> |
PR2957
ISD::VECTOR_SHUFFLE now stores an array of integers representing the shuffle
mask internal to the node, rather than taking a BUILD_VECTOR of ConstantSDNodes
as the shuffle mask. A value of -1 represents UNDEF.
In addition to eliminating the creation of illegal BUILD_VECTORS just to
represent shuffle masks, we are better about canonicalizing the shuffle mask,
resulting in substantially better code for some classes of shuffles.
A clean up of x86 shuffle code, and some canonicalizing in DAGCombiner is next.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@69952 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
egalizeDAG.cpp
egalizeVectorTypes.cpp
electionDAG.cpp
electionDAGBuild.cpp
|
| 98d07102d67971118c73e7db84d8a05d58dcf3df |
24-Apr-2009 |
Dan Gohman <gohman@apple.com> |
Instead of requiring TLI.LowerCallTo to return an ISD::BUILD_PAIR,
use ISD::EXTRACT_ELEMENT. SelectionDAG has a special fast-path for
the cast of an EXTRACT_ELEMENT with a BUILD_PAIR operand, for the
common case.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@69948 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeFloatTypes.cpp
|
| bbb69ba45e6b90251bebed4f3a76456d9d51f903 |
24-Apr-2009 |
Dan Gohman <gohman@apple.com> |
Instead of requiring TLI.LowerCallTo to return an ISD::BUILD_PAIR,
use ISD::EXTRACT_ELEMENT. SelectionDAG has a special fast-path for
the cast of an EXTRACT_ELEMENT with a BUILD_PAIR operand, for the
common case.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@69948 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeFloatTypes.cpp
|
| ad62f53795ac3da0353afba7e83464679c91ce5c |
24-Apr-2009 |
Dan Gohman <gohman@apple.com> |
Factor out a bit of code that appears in several places into a
utility function.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@69937 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuild.cpp
electionDAGBuild.h
electionDAGISel.cpp
|
| d4760a5133c4c5547d1656035cd5c32ec53f0b28 |
24-Apr-2009 |
Dan Gohman <gohman@apple.com> |
Factor out a bit of code that appears in several places into a
utility function.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@69937 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuild.cpp
electionDAGBuild.h
electionDAGISel.cpp
|
| 5e5558bc66d593605ece81502bc310b7cf9e87f0 |
24-Apr-2009 |
Dan Gohman <gohman@apple.com> |
Handle Void types in ComputeValueVTs. This doesn't currently occur,
but this change makes the code more general and easier to adapt for
new purposes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@69935 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuild.cpp
|
| a9e5bc4df356b074e280ad444ffd5364272d37ec |
24-Apr-2009 |
Dan Gohman <gohman@apple.com> |
Handle Void types in ComputeValueVTs. This doesn't currently occur,
but this change makes the code more general and easier to adapt for
new purposes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@69935 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuild.cpp
|
| 70bc17dbf5a991ce8f8f5285f61c352fb55b533d |
21-Apr-2009 |
Dan Gohman <gohman@apple.com> |
Make X86's copyRegToReg able to handle copies to and from subclasses.
This makes the extra copyRegToReg calls in ScheduleDAGSDNodesEmit.cpp
unnecessary. Derived from a patch by Jakob Stoklund Olesen.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@69635 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGSDNodesEmit.cpp
|
| d4df625c05d6c54e623ed32aa75b90c35f116624 |
21-Apr-2009 |
Dan Gohman <gohman@apple.com> |
Make X86's copyRegToReg able to handle copies to and from subclasses.
This makes the extra copyRegToReg calls in ScheduleDAGSDNodesEmit.cpp
unnecessary. Derived from a patch by Jakob Stoklund Olesen.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@69635 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGSDNodesEmit.cpp
|
| bd209ab9bc0f6ad667c15df4453955c2ed4c2434 |
21-Apr-2009 |
Dan Gohman <gohman@apple.com> |
Simplify this code. getConstant knows how to make
broadcasted vector constants.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@69634 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 0b8972d71412db2496153ec28ed06ec43697b8ad |
21-Apr-2009 |
Dan Gohman <gohman@apple.com> |
Simplify this code. getConstant knows how to make
broadcasted vector constants.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@69634 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| c885165e664f3b465403e1b6ce57ba63f57c5f0c |
20-Apr-2009 |
Bob Wilson <bob.wilson@apple.com> |
Revise my previous change 68996 as suggested by Duncan.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@69607 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
egalizeIntegerTypes.cpp
electionDAG.cpp
|
| c21b202ac837dfeaf8de89fc9c930c47bd4501ae |
20-Apr-2009 |
Bob Wilson <bob.wilson@apple.com> |
Revise my previous change 68996 as suggested by Duncan.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@69607 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
egalizeIntegerTypes.cpp
electionDAG.cpp
|
| a507e5538f7fe999b18fd0403c5806cc5ae0b64f |
19-Apr-2009 |
Duncan Sands <baldrick@free.fr> |
Now that BUILD_VECTOR operands are allowed to be
bigger than the vector element type, turn checking
of the operand type back on again, appropriately
adjusted.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@69516 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 66f891e387a22d184ddb5e2b2ef0810dc923675d |
19-Apr-2009 |
Duncan Sands <baldrick@free.fr> |
Now that BUILD_VECTOR operands are allowed to be
bigger than the vector element type, turn checking
of the operand type back on again, appropriately
adjusted.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@69516 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 2f992d13ea0ccfe3f9ce359b4c534d9b34b0e7cd |
18-Apr-2009 |
Chris Lattner <sabre@nondot.org> |
Fix PR3898, which manifests as failures on are an Xcore,
patch by Jakob Stoklund Olesen!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@69472 91177308-0d34-0410-b5e6-96231b3b80d8
argetLowering.cpp
|
| abbee9c4f6195e670775cb2fe3a0decbe626e1db |
18-Apr-2009 |
Chris Lattner <sabre@nondot.org> |
Fix PR3898, which manifests as failures on are an Xcore,
patch by Jakob Stoklund Olesen!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@69472 91177308-0d34-0410-b5e6-96231b3b80d8
argetLowering.cpp
|
| b10b5ac8d9da43ca2db61401a20af6b676c98438 |
18-Apr-2009 |
Duncan Sands <baldrick@free.fr> |
Don't try to make BUILD_VECTOR operands have the same
type as the vector element type: allow them to be of
a wider integer type than the element type all the way
through the system, and not just as far as LegalizeDAG.
This should be safe because it used to be this way
(the old type legalizer would produce such nodes), so
backends should be able to handle it. In fact only
targets which have legal vector types with an illegal
promoted element type will ever see this (eg: <4 x i16>
on ppc). This fixes a regression with the new type
legalizer (vec_splat.ll). Also, treat SCALAR_TO_VECTOR
the same as BUILD_VECTOR. After all, it is just a
special case of BUILD_VECTOR.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@69467 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
egalizeDAG.cpp
egalizeIntegerTypes.cpp
egalizeTypesGeneric.cpp
egalizeVectorTypes.cpp
electionDAG.cpp
|
| 6a3a01eb07a391628766d95b3c4baeb3802b5b96 |
18-Apr-2009 |
Duncan Sands <baldrick@free.fr> |
Don't try to make BUILD_VECTOR operands have the same
type as the vector element type: allow them to be of
a wider integer type than the element type all the way
through the system, and not just as far as LegalizeDAG.
This should be safe because it used to be this way
(the old type legalizer would produce such nodes), so
backends should be able to handle it. In fact only
targets which have legal vector types with an illegal
promoted element type will ever see this (eg: <4 x i16>
on ppc). This fixes a regression with the new type
legalizer (vec_splat.ll). Also, treat SCALAR_TO_VECTOR
the same as BUILD_VECTOR. After all, it is just a
special case of BUILD_VECTOR.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@69467 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
egalizeDAG.cpp
egalizeIntegerTypes.cpp
egalizeTypesGeneric.cpp
egalizeVectorTypes.cpp
electionDAG.cpp
|
| 97d14fcb6aa54b66e8513fccea0d0470afa4056a |
18-Apr-2009 |
Dale Johannesen <dalej@apple.com> |
Inline asm's were still introducing bogus dependencies;
my earlier patch to this code only fixed half of it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@69408 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuild.cpp
|
| ac68b7b4ed36c550398bae5be995b2ea0296119c |
18-Apr-2009 |
Dale Johannesen <dalej@apple.com> |
Inline asm's were still introducing bogus dependencies;
my earlier patch to this code only fixed half of it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@69408 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuild.cpp
|
| 0e4042d30b2b47329166f5f784ef3c70f6b408cc |
16-Apr-2009 |
Dan Gohman <gohman@apple.com> |
In the list-burr's pseudo two-addr dependency heuristics, don't
add dependencies on nodes with exactly one successor which is a
COPY_TO_REGCLASS node. In the case that the copy is coalesced
away, the dependence should be on the user of the copy, rather
than the copy itself.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@69309 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGRRList.cpp
|
| ba6a6125f561d92163491c8756c816d5a3666452 |
16-Apr-2009 |
Dan Gohman <gohman@apple.com> |
In the list-burr's pseudo two-addr dependency heuristics, don't
add dependencies on nodes with exactly one successor which is a
COPY_TO_REGCLASS node. In the case that the copy is coalesced
away, the dependence should be on the user of the copy, rather
than the copy itself.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@69309 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGRRList.cpp
|
| 8af808a3d64dfdcc5d126e6ad762f57b1483671c |
16-Apr-2009 |
Dan Gohman <gohman@apple.com> |
Handle SUBREG_TO_REG instructions with the same heuristics
as INSERT_SUBREG instructions in the list-burr scheduler.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@69308 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGRRList.cpp
|
| 0b33cd55d1cfaa98fe4571d48caae4946a5e3a54 |
16-Apr-2009 |
Dan Gohman <gohman@apple.com> |
Handle SUBREG_TO_REG instructions with the same heuristics
as INSERT_SUBREG instructions in the list-burr scheduler.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@69308 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGRRList.cpp
|
| 02f8c410148ba3b6009ed67df41e2c97c1c07c3a |
16-Apr-2009 |
Devang Patel <dpatel@apple.com> |
Do not treat beginning of inlined scope as beginning of normal function scope if the location info is missing.
Insetad of doing ...
if (inlined_subroutine && known_location)
DW_TAG_inline_subroutine
else
DW_TAG_subprogram
do
if (inlined_subroutine) {
if (known_location)
DW_TAG_inline_subroutine
} else {
DW_TAG_subprogram
}
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@69300 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
electionDAGBuild.cpp
|
| ee9a58a24345acba20ecf8762bfcabf8840c20fd |
16-Apr-2009 |
Devang Patel <dpatel@apple.com> |
Do not treat beginning of inlined scope as beginning of normal function scope if the location info is missing.
Insetad of doing ...
if (inlined_subroutine && known_location)
DW_TAG_inline_subroutine
else
DW_TAG_subprogram
do
if (inlined_subroutine) {
if (known_location)
DW_TAG_inline_subroutine
} else {
DW_TAG_subprogram
}
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@69300 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
electionDAGBuild.cpp
|
| 906caf2ae45455a12696bb950429da28d7d63422 |
16-Apr-2009 |
Devang Patel <dpatel@apple.com> |
Record line number at the beginning of a func.start.
This line was accidently lost yesterday.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@69286 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
electionDAGBuild.cpp
|
| faa55f17b8fd2071b69b1104f5921f02d2f31ecc |
16-Apr-2009 |
Devang Patel <dpatel@apple.com> |
Record line number at the beginning of a func.start.
This line was accidently lost yesterday.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@69286 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
electionDAGBuild.cpp
|
| 16f2ffd1580a168a7fdd78bf48b26f0995e1c109 |
16-Apr-2009 |
Devang Patel <dpatel@apple.com> |
In -fast mode do what FastISel does.
This code could use some refactoring help!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@69254 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuild.cpp
electionDAGISel.cpp
|
| b519081460eba4406b23f69c9b41d565910b7af5 |
16-Apr-2009 |
Devang Patel <dpatel@apple.com> |
In -fast mode do what FastISel does.
This code could use some refactoring help!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@69254 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuild.cpp
electionDAGISel.cpp
|
| 390f3ace34855a3d4c9e0adf468976375f8c6dc1 |
16-Apr-2009 |
Devang Patel <dpatel@apple.com> |
If FastISel is run and it has known DebugLoc then use it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@69253 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuild.h
electionDAGISel.cpp
|
| 6bfb20561180e71214d12edd65c768829759b222 |
16-Apr-2009 |
Devang Patel <dpatel@apple.com> |
If FastISel is run and it has known DebugLoc then use it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@69253 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuild.h
electionDAGISel.cpp
|
| 682e0e6a72af42f31e6fcf329c7bb5cfaff7459d |
16-Apr-2009 |
Devang Patel <dpatel@apple.com> |
If location where the function was inlined is not know then do not emit debug info describing inlinied region.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@69252 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
|
| 9205f3870d58064a1c9f5d38fc3e35d8e05fa19c |
16-Apr-2009 |
Devang Patel <dpatel@apple.com> |
If location where the function was inlined is not know then do not emit debug info describing inlinied region.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@69252 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
|
| 8818b8f4437a56fc8f75a134f015c3b807e61f10 |
15-Apr-2009 |
Devang Patel <dpatel@apple.com> |
Add DISubprogram is not null check.
This fixes test/CodeGen//2009-01-21-invalid-debug-info.m test case.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@69210 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
|
| 12e528beb5b91114ccdc12e7ff1b6e6597202321 |
15-Apr-2009 |
Devang Patel <dpatel@apple.com> |
Add DISubprogram is not null check.
This fixes test/CodeGen//2009-01-21-invalid-debug-info.m test case.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@69210 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
|
| c23e4968790395053f3f52aeb3342637fcaafdbf |
15-Apr-2009 |
Dan Gohman <gohman@apple.com> |
Generalize one of the SelectionDAG::ReplaceAllUsesWith overloads
to support replacing a node with another that has a superset of
the result types. Use this instead of calling
ReplaceAllUsesOfValueWith for each value.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@69209 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
electionDAG.cpp
|
| 3209ac36502042636679ef030d609964891ccf57 |
15-Apr-2009 |
Dan Gohman <gohman@apple.com> |
Generalize one of the SelectionDAG::ReplaceAllUsesWith overloads
to support replacing a node with another that has a superset of
the result types. Use this instead of calling
ReplaceAllUsesOfValueWith for each value.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@69209 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
electionDAG.cpp
|
| 1be3eccecbd2fa50ed9008ffee01f6351df5d8f7 |
15-Apr-2009 |
Devang Patel <dpatel@apple.com> |
Construct and emit DW_TAG_inlined_subroutine DIEs for inlined subroutine scopes (only in FastISel mode).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@69116 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
|
| 8a9a7dc7ad2516b37f9d947a6b97ad62c24ff9b5 |
15-Apr-2009 |
Devang Patel <dpatel@apple.com> |
Construct and emit DW_TAG_inlined_subroutine DIEs for inlined subroutine scopes (only in FastISel mode).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@69116 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
|
| 5ec3b427c850d8c61aaa29e3421019bdff9b77f1 |
15-Apr-2009 |
Dan Gohman <gohman@apple.com> |
When the result of an EXTRACT_SUBREG, INSERT_SUBREG, or SUBREG_TO_REG
operator is used by a CopyToReg to export the value to a different
block, don't reuse the CopyToReg's register for the subreg operation
result if the register isn't precisely the right class for the
subreg operation.
Also, rename the h-registers.ll test, now that there are more
than one.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@69087 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGSDNodesEmit.cpp
|
| 31faeea6af95895a3a2d643e89dba18781a564a9 |
15-Apr-2009 |
Dan Gohman <gohman@apple.com> |
When the result of an EXTRACT_SUBREG, INSERT_SUBREG, or SUBREG_TO_REG
operator is used by a CopyToReg to export the value to a different
block, don't reuse the CopyToReg's register for the subreg operation
result if the register isn't precisely the right class for the
subreg operation.
Also, rename the h-registers.ll test, now that there are more
than one.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@69087 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGSDNodesEmit.cpp
|
| ec65a7d89b3c23183433c69f43220a93f3573551 |
14-Apr-2009 |
Dale Johannesen <dalej@apple.com> |
Do not force asm's to be chained if they don't touch
memory and aren't volatile. This was interfering with
good scheduling.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@69008 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuild.cpp
|
| 49fb89488e691cd78643d19bee08d7f617317332 |
14-Apr-2009 |
Dale Johannesen <dalej@apple.com> |
Do not force asm's to be chained if they don't touch
memory and aren't volatile. This was interfering with
good scheduling.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@69008 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuild.cpp
|
| 4cbb173d6cbf0196f3d2c817186fe6b599e68cf4 |
14-Apr-2009 |
Daniel Dunbar <daniel@zuster.org> |
Make these errors more noticable in build logs.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68998 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuild.cpp
|
| 74da6f45b8fedb879ff11b66af6db79260cb18b8 |
14-Apr-2009 |
Daniel Dunbar <daniel@zuster.org> |
Make these errors more noticable in build logs.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68998 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuild.cpp
|
| b1303d05a89972195de023fda432cc621375a27c |
14-Apr-2009 |
Bob Wilson <bob.wilson@apple.com> |
Change SelectionDAG type legalization to allow BUILD_VECTOR operands to be
promoted to legal types without changing the type of the vector. This is
following a suggestion from Duncan
(http://lists.cs.uiuc.edu/pipermail/llvmdev/2009-February/019923.html).
The transformation that used to be done during type legalization is now
postponed to DAG legalization. This allows the BUILD_VECTORs to be optimized
and potentially handled specially by target-specific code.
It turns out that this is also consistent with an optimization done by the
DAG combiner: a BUILD_VECTOR and INSERT_VECTOR_ELT may be combined by
replacing one of the BUILD_VECTOR operands with the newly inserted element;
but INSERT_VECTOR_ELT allows its scalar operand to be larger than the
element type, with any extra high bits being implicitly truncated. The
result is a BUILD_VECTOR where one of the operands has a type larger the
the vector element type.
Any code that operates on BUILD_VECTORs may now need to be aware of the
potential type discrepancy between the vector element type and the
BUILD_VECTOR operands. This patch updates all of the places that I could
find to handle that case.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68996 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
egalizeDAG.cpp
egalizeIntegerTypes.cpp
egalizeTypesGeneric.cpp
electionDAG.cpp
|
| 2b570bb741732deda2e9d7fdbf0a4ba72033942b |
14-Apr-2009 |
Bob Wilson <bob.wilson@apple.com> |
Change SelectionDAG type legalization to allow BUILD_VECTOR operands to be
promoted to legal types without changing the type of the vector. This is
following a suggestion from Duncan
(http://lists.cs.uiuc.edu/pipermail/llvmdev/2009-February/019923.html).
The transformation that used to be done during type legalization is now
postponed to DAG legalization. This allows the BUILD_VECTORs to be optimized
and potentially handled specially by target-specific code.
It turns out that this is also consistent with an optimization done by the
DAG combiner: a BUILD_VECTOR and INSERT_VECTOR_ELT may be combined by
replacing one of the BUILD_VECTOR operands with the newly inserted element;
but INSERT_VECTOR_ELT allows its scalar operand to be larger than the
element type, with any extra high bits being implicitly truncated. The
result is a BUILD_VECTOR where one of the operands has a type larger the
the vector element type.
Any code that operates on BUILD_VECTORs may now need to be aware of the
potential type discrepancy between the vector element type and the
BUILD_VECTOR operands. This patch updates all of the places that I could
find to handle that case.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68996 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
egalizeDAG.cpp
egalizeIntegerTypes.cpp
egalizeTypesGeneric.cpp
electionDAG.cpp
|
| 88c7af096b09ad26cbcebfdf40151e04094b7460 |
13-Apr-2009 |
Dan Gohman <gohman@apple.com> |
Rename COPY_TO_SUBCLASS to COPY_TO_REGCLASS, and generalize
it accordingly. Thanks to Jakob Stoklund Olesen for pointing
out how this might be useful.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68986 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGSDNodes.h
cheduleDAGSDNodesEmit.cpp
|
| 4c10fc7e94c9dc543db53c319a83de95896340b0 |
13-Apr-2009 |
Dan Gohman <gohman@apple.com> |
Rename COPY_TO_SUBCLASS to COPY_TO_REGCLASS, and generalize
it accordingly. Thanks to Jakob Stoklund Olesen for pointing
out how this might be useful.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68986 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGSDNodes.h
cheduleDAGSDNodesEmit.cpp
|
| 26cbf9eb99c779b8992f4865c6cf308318d39723 |
13-Apr-2009 |
Bob Wilson <bob.wilson@apple.com> |
Refactor some code in SelectionDAGLegalize::ExpandBUILD_VECTOR.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68981 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 27b4133f65fbea82ecc520035bafcb1559a4bbe4 |
13-Apr-2009 |
Bob Wilson <bob.wilson@apple.com> |
Refactor some code in SelectionDAGLegalize::ExpandBUILD_VECTOR.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68981 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 48c7fa21a3b5e491bdf0ffc41fe7aa9687450c5f |
13-Apr-2009 |
Devang Patel <dpatel@apple.com> |
Right now, Debugging information to encode scopes (DW_TAG_lexical_block) relies on DBG_LABEL. Unfortunately this intefers with the quality of optimized code.
This patch updates dwarf writer to encode scoping information in DWARF only in FastISel mode.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68973 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
electionDAGBuild.cpp
|
| 1899292055e88f11ae05c2e22e01b1b9e1485bf9 |
13-Apr-2009 |
Devang Patel <dpatel@apple.com> |
Right now, Debugging information to encode scopes (DW_TAG_lexical_block) relies on DBG_LABEL. Unfortunately this intefers with the quality of optimized code.
This patch updates dwarf writer to encode scoping information in DWARF only in FastISel mode.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68973 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
electionDAGBuild.cpp
|
| 0f7fef3872a37d09c806f52f1d03d74ebc73c171 |
13-Apr-2009 |
Devang Patel <dpatel@apple.com> |
Reapply 68847.
Now debug_inlined section is covered by TAI->doesDwarfUsesInlineInfoSection(), which is false by default.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68964 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
electionDAGBuild.cpp
|
| 88bf96e5db9d7fa999ad190277610595540dc3e0 |
13-Apr-2009 |
Devang Patel <dpatel@apple.com> |
Reapply 68847.
Now debug_inlined section is covered by TAI->doesDwarfUsesInlineInfoSection(), which is false by default.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68964 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
electionDAGBuild.cpp
|
| f8c7394781f7cf27ac52ca087e289436d36844da |
13-Apr-2009 |
Dan Gohman <gohman@apple.com> |
Add a new TargetInstrInfo MachineInstr opcode, COPY_TO_SUBCLASS.
This will be used to replace things like X86's MOV32to32_.
Enhance ScheduleDAGSDNodesEmit to be more flexible and robust
in the presense of subregister superclasses and subclasses. It
can now cope with the definition of a virtual register being in
a subclass of a use.
Re-introduce the code for recording register superreg classes and
subreg classes. This is needed because when subreg extracts and
inserts get coalesced away, the virtual registers are left in
the correct subclass.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68961 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGSDNodes.h
cheduleDAGSDNodesEmit.cpp
|
| 1aeb5dbe7ba14a4684f65f85f15f7d312c2eeeaf |
13-Apr-2009 |
Dan Gohman <gohman@apple.com> |
Add a new TargetInstrInfo MachineInstr opcode, COPY_TO_SUBCLASS.
This will be used to replace things like X86's MOV32to32_.
Enhance ScheduleDAGSDNodesEmit to be more flexible and robust
in the presense of subregister superclasses and subclasses. It
can now cope with the definition of a virtual register being in
a subclass of a use.
Re-introduce the code for recording register superreg classes and
subreg classes. This is needed because when subreg extracts and
inserts get coalesced away, the virtual registers are left in
the correct subclass.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68961 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGSDNodes.h
cheduleDAGSDNodesEmit.cpp
|
| 36e3946ac2f30a0bda66538ef2b974b1c8fbdc97 |
12-Apr-2009 |
Chris Lattner <sabre@nondot.org> |
make UpdateValueMap handle the possiblity that we could be
copying into the right register, avoiding a copy.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68889 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
|
| f0e7da2b3b5dd42770791b7f30d105c08321a93f |
12-Apr-2009 |
Chris Lattner <sabre@nondot.org> |
make UpdateValueMap handle the possiblity that we could be
copying into the right register, avoiding a copy.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68889 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
|
| c5040ab6065d5c569a1af0848b6e672b22b174b7 |
12-Apr-2009 |
Chris Lattner <sabre@nondot.org> |
optimize FastISel::UpdateValueMap to avoid duplicate map lookups,
and make it return the assigned register.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68888 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
|
| bc846230e533883273d3a6d44b303ce421b6ba02 |
12-Apr-2009 |
Chris Lattner <sabre@nondot.org> |
optimize FastISel::UpdateValueMap to avoid duplicate map lookups,
and make it return the assigned register.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68888 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
|
| c6fa3ff0bddca92e443ef9ff454d2a74cac867bd |
11-Apr-2009 |
Dan Gohman <gohman@apple.com> |
Revert r68847. It breaks the build on non-Darwin targets, with this message
from the assembler:
Error: unknown pseudo-op: `.debug_inlined'
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68863 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
electionDAGBuild.cpp
|
| a82ffb5c9866520ace26792d8d15094c3ea520e9 |
11-Apr-2009 |
Dan Gohman <gohman@apple.com> |
Revert r68847. It breaks the build on non-Darwin targets, with this message
from the assembler:
Error: unknown pseudo-op: `.debug_inlined'
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68863 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
electionDAGBuild.cpp
|
| 2057532679fc1045cfeb38b477ac9e749e6b1dd8 |
11-Apr-2009 |
Devang Patel <dpatel@apple.com> |
Keep track of inlined functions and their locations. This information is collected when nested llvm.dbg.func.start intrinsics are seen. (Right now, inliner removes nested llvm.dbg.func.start intrinisics during inlining.)
Create debug_inlined dwarf section using these information. This info is used by gdb, at least on Darwin, to enable better experience debugging inlined functions. See DwarfWriter.cpp for more information on structure of debug_inlined section.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68847 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
electionDAGBuild.cpp
|
| 962aaafe60b3a60b3bd5b97a82a48da0fe4d41b9 |
11-Apr-2009 |
Devang Patel <dpatel@apple.com> |
Keep track of inlined functions and their locations. This information is collected when nested llvm.dbg.func.start intrinsics are seen. (Right now, inliner removes nested llvm.dbg.func.start intrinisics during inlining.)
Create debug_inlined dwarf section using these information. This info is used by gdb, at least on Darwin, to enable better experience debugging inlined functions. See DwarfWriter.cpp for more information on structure of debug_inlined section.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68847 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
electionDAGBuild.cpp
|
| ec15bbfd2f8a3667313dcfa0f9a11497ae6732b8 |
10-Apr-2009 |
Bob Wilson <bob.wilson@apple.com> |
Clean up a bunch of whitespace issues and fix a comment typo.
No functional changes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68808 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 2e958a4285feeac673a3837ea2fd36bd9402cbcf |
10-Apr-2009 |
Bob Wilson <bob.wilson@apple.com> |
Clean up a bunch of whitespace issues and fix a comment typo.
No functional changes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68808 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 0355862f712ce23ebb82e9e9378e92ef3b34027b |
10-Apr-2009 |
Dan Gohman <gohman@apple.com> |
Now that register classes have names, include the name in debug output.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68786 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGSDNodesEmit.cpp
|
| b646b51e9fb0d5faf8f3705cc1d0eab54afb782f |
10-Apr-2009 |
Dan Gohman <gohman@apple.com> |
Now that register classes have names, include the name in debug output.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68786 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGSDNodesEmit.cpp
|
| fc1665793e62eb4f26d24b8a19eecf59cd872e2a |
10-Apr-2009 |
Dan Gohman <gohman@apple.com> |
Remove the obsolete SelectionDAG::getNodeValueTypes and simplify
code that uses it by using SelectionDAG::getVTList instead.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68744 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
egalizeIntegerTypes.cpp
electionDAG.cpp
electionDAGBuild.cpp
|
| ee03628d9fad683197b1839e23f23057e506de99 |
10-Apr-2009 |
Dan Gohman <gohman@apple.com> |
Remove the obsolete SelectionDAG::getNodeValueTypes and simplify
code that uses it by using SelectionDAG::getVTList instead.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68744 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
egalizeIntegerTypes.cpp
electionDAG.cpp
electionDAGBuild.cpp
|
| 923838533a005154c3a30271aa3186a633102a9c |
10-Apr-2009 |
Devang Patel <dpatel@apple.com> |
Silence unused variable warning.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68735 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
|
| 18dbad8536b3f4407f40fd71e937922337ac550e |
10-Apr-2009 |
Devang Patel <dpatel@apple.com> |
Silence unused variable warning.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68735 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
|
| b396992f68711e473d0cae2ac9c04569f20147b4 |
09-Apr-2009 |
Devang Patel <dpatel@apple.com> |
llvm.dbg.func_start also defines beginning of function scope.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68727 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
|
| 212307165fb4a13be73ca36f6487dd43770127f1 |
09-Apr-2009 |
Devang Patel <dpatel@apple.com> |
llvm.dbg.func_start also defines beginning of function scope.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68727 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
|
| 57fc82d409022e793446c1c5d7d6d8b0d7579f83 |
09-Apr-2009 |
Dan Gohman <gohman@apple.com> |
Generalize ExtendUsesToFormExtLoad to be usable for ANY_EXTEND,
in addition to ZERO_EXTEND and SIGN_EXTEND. Fix a bug in the
way it checked for live-out values, and simplify the way it
find users by using SDNode::use_iterator's (relatively) new
features. Also, make it slightly more permissive on targets
with free truncates.
In SelectionDAGBuild, avoid creating ANY_EXTEND nodes that are
larger than necessary. If the target's SwitchAmountTy has
enough bits, use it. This exposes the truncate to optimization
early, enabling more optimizations.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68670 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
electionDAGBuild.cpp
|
| 2eaea5996426c98d09fbd200c756587abce1a11a |
09-Apr-2009 |
Dan Gohman <gohman@apple.com> |
Generalize ExtendUsesToFormExtLoad to be usable for ANY_EXTEND,
in addition to ZERO_EXTEND and SIGN_EXTEND. Fix a bug in the
way it checked for live-out values, and simplify the way it
find users by using SDNode::use_iterator's (relatively) new
features. Also, make it slightly more permissive on targets
with free truncates.
In SelectionDAGBuild, avoid creating ANY_EXTEND nodes that are
larger than necessary. If the target's SwitchAmountTy has
enough bits, use it. This exposes the truncate to optimization
early, enabling more optimizations.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68670 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
electionDAGBuild.cpp
|
| 8e5c0da84892649254def8782dc041539209d4db |
09-Apr-2009 |
Dan Gohman <gohman@apple.com> |
Don't copy the operand of a SwitchInst into virtual registers as
eagerly. This helps avoid CopyToReg nodes in some cases where they
aren't needed, and also helps subsequent optimizer heuristics
in cases where the extra nodes would cause the node to appear
to have multiple results. This doesn't have a significant impact
currently; it'll help an upcoming change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68667 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuild.cpp
|
| ecb0ece7f75d85f3dd2a952fed979131534f9ebc |
09-Apr-2009 |
Dan Gohman <gohman@apple.com> |
Don't copy the operand of a SwitchInst into virtual registers as
eagerly. This helps avoid CopyToReg nodes in some cases where they
aren't needed, and also helps subsequent optimizer heuristics
in cases where the extra nodes would cause the node to appear
to have multiple results. This doesn't have a significant impact
currently; it'll help an upcoming change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68667 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuild.cpp
|
| 3d0355b825fa707f76dda05bd19730c096ae743c |
08-Apr-2009 |
Duncan Sands <baldrick@free.fr> |
Soft float support for FREM.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68614 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeFloatTypes.cpp
egalizeTypes.h
|
| 05bb215cb10fab8a4da75fc78ff04623ccd0f688 |
08-Apr-2009 |
Duncan Sands <baldrick@free.fr> |
Soft float support for FREM.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68614 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeFloatTypes.cpp
egalizeTypes.h
|
| 7beb1ec2988d6d223714c6bcc239fb2a89db7f67 |
08-Apr-2009 |
Duncan Sands <baldrick@free.fr> |
Soft float support for undef. Reported by Xerxes Rånby.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68607 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeFloatTypes.cpp
egalizeTypes.h
|
| cf3ce0867ab1a6de36bbd59f5a9220c745a778f5 |
08-Apr-2009 |
Duncan Sands <baldrick@free.fr> |
Soft float support for undef. Reported by Xerxes Rånby.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68607 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeFloatTypes.cpp
egalizeTypes.h
|
| 97121ba2afb8d566ff1bf5c4e8fc5d4077940a7f |
08-Apr-2009 |
Dan Gohman <gohman@apple.com> |
Implement support for using modeling implicit-zero-extension on x86-64
with SUBREG_TO_REG, teach SimpleRegisterCoalescing to coalesce
SUBREG_TO_REG instructions (which are similar to INSERT_SUBREG
instructions), and teach the DAGCombiner to take advantage of this on
targets which support it. This eliminates many redundant
zero-extension operations on x86-64.
This adds a new TargetLowering hook, isZExtFree. It's similar to
isTruncateFree, except it only applies to actual definitions, and not
no-op truncates which may not zero the high bits.
Also, this adds a new optimization to SimplifyDemandedBits: transform
operations like x+y into (zext (add (trunc x), (trunc y))) on targets
where all the casts are no-ops. In contexts where the high part of the
add is explicitly masked off, this allows the mask operation to be
eliminated. Fix the DAGCombiner to avoid undoing these transformations
to eliminate casts on targets where the casts are no-ops.
Also, this adds a new two-address lowering heuristic. Since
two-address lowering runs before coalescing, it helps to be able to
look through copies when deciding whether commuting and/or
three-address conversion are profitable.
Also, fix a bug in LiveInterval::MergeInClobberRanges. It didn't handle
the case that a clobber range extended both before and beyond an
existing live range. In that case, multiple live ranges need to be
added. This was exposed by the new subreg coalescing code.
Remove 2008-05-06-SpillerBug.ll. It was bugpoint-reduced, and the
spiller behavior it was looking for no longer occurrs with the new
instruction selection.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68576 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
argetLowering.cpp
|
| 4cedb1c3efcf949dd5c719a282a2ffadda9af200 |
08-Apr-2009 |
Dan Gohman <gohman@apple.com> |
Implement support for using modeling implicit-zero-extension on x86-64
with SUBREG_TO_REG, teach SimpleRegisterCoalescing to coalesce
SUBREG_TO_REG instructions (which are similar to INSERT_SUBREG
instructions), and teach the DAGCombiner to take advantage of this on
targets which support it. This eliminates many redundant
zero-extension operations on x86-64.
This adds a new TargetLowering hook, isZExtFree. It's similar to
isTruncateFree, except it only applies to actual definitions, and not
no-op truncates which may not zero the high bits.
Also, this adds a new optimization to SimplifyDemandedBits: transform
operations like x+y into (zext (add (trunc x), (trunc y))) on targets
where all the casts are no-ops. In contexts where the high part of the
add is explicitly masked off, this allows the mask operation to be
eliminated. Fix the DAGCombiner to avoid undoing these transformations
to eliminate casts on targets where the casts are no-ops.
Also, this adds a new two-address lowering heuristic. Since
two-address lowering runs before coalescing, it helps to be able to
look through copies when deciding whether commuting and/or
three-address conversion are profitable.
Also, fix a bug in LiveInterval::MergeInClobberRanges. It didn't handle
the case that a clobber range extended both before and beyond an
existing live range. In that case, multiple live ranges need to be
added. This was exposed by the new subreg coalescing code.
Remove 2008-05-06-SpillerBug.ll. It was bugpoint-reduced, and the
spiller behavior it was looking for no longer occurrs with the new
instruction selection.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68576 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
argetLowering.cpp
|
| a49a671efe24aa6e2e9e2280cf714ef97a40f177 |
08-Apr-2009 |
Devang Patel <dpatel@apple.com> |
Revert prev. patch for now.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68569 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuild.cpp
|
| 6d3db037bbc4aaa6631f4b001e644238b71d24e6 |
08-Apr-2009 |
Devang Patel <dpatel@apple.com> |
Revert prev. patch for now.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68569 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuild.cpp
|
| caf6129aba729cc6b085e3271c94af6fb33baf4d |
08-Apr-2009 |
Devang Patel <dpatel@apple.com> |
Right now DBG_LABEL are required for llvm.dbg.region_start and llvm.dbg.region_end in non-fast mode also.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68559 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuild.cpp
|
| 4e1bcaaa9f36fdc2563733e37df516cf14479240 |
08-Apr-2009 |
Devang Patel <dpatel@apple.com> |
Right now DBG_LABEL are required for llvm.dbg.region_start and llvm.dbg.region_end in non-fast mode also.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68559 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuild.cpp
|
| 4fd552880c9f42f117bd79929ea0179f99bd6bb7 |
07-Apr-2009 |
Dan Gohman <gohman@apple.com> |
Don't attempt to handle aggregate argument values in FastISel; let
SelectionDAG do those. This fixes PR3955.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68546 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
|
| 09532df84390ed3a68f551033f38b3bee755d349 |
07-Apr-2009 |
Dan Gohman <gohman@apple.com> |
Don't attempt to handle aggregate argument values in FastISel; let
SelectionDAG do those. This fixes PR3955.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68546 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
|
| f50c7981ae9b81f1212d72a06d1c05e20d0559af |
03-Apr-2009 |
Dan Gohman <gohman@apple.com> |
Fix a TargetLowering optimization so that it doesn't duplicate
loads when an input node has multiple uses.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68398 91177308-0d34-0410-b5e6-96231b3b80d8
argetLowering.cpp
|
| 563db99a7e374e4498c62cc7705bd57f269c3878 |
03-Apr-2009 |
Dan Gohman <gohman@apple.com> |
Fix a TargetLowering optimization so that it doesn't duplicate
loads when an input node has multiple uses.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68398 91177308-0d34-0410-b5e6-96231b3b80d8
argetLowering.cpp
|
| 8f9643f0f768d5dcff0ffea1de6191dba1b5b083 |
03-Apr-2009 |
Dan Gohman <gohman@apple.com> |
Delete ISD::INSERT_SUBREG and ISD::EXTRACT_SUBREG, which are unused.
Note that these are distinct from TargetInstrInfo::INSERT_SUBREG
and TargetInstrInfo::EXTRACT_SUBREG, which are used.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68355 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
electionDAG.cpp
|
| dc7c052506a20c64e2d5f8eff6478ff1370063e8 |
03-Apr-2009 |
Dan Gohman <gohman@apple.com> |
Delete ISD::INSERT_SUBREG and ISD::EXTRACT_SUBREG, which are unused.
Note that these are distinct from TargetInstrInfo::INSERT_SUBREG
and TargetInstrInfo::EXTRACT_SUBREG, which are used.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68355 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
electionDAG.cpp
|
| 5274a4afb720858bf1ab927fc90068f1a8f12eb2 |
02-Apr-2009 |
Sanjiv Gupta <sanjiv.gupta@microchip.com> |
To convert the StopPoint insn into an assembler directive by ISel, we need to have access to the line number field. So we convert that info as an operand by custom handling DBG_STOPPOINT in legalize.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68329 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| ec7cef48d6cfd4b864b5b815f0773806d6ac15dc |
02-Apr-2009 |
Sanjiv Gupta <sanjiv.gupta@microchip.com> |
To convert the StopPoint insn into an assembler directive by ISel, we need to have access to the line number field. So we convert that info as an operand by custom handling DBG_STOPPOINT in legalize.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68329 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 6fb2168aaed06e4685d064b6f63dc4c668b42728 |
31-Mar-2009 |
Evan Cheng <evan.cheng@apple.com> |
Fully general expansion of integer shift of any size.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68134 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeIntegerTypes.cpp
egalizeTypes.h
|
| dd72a3fc2a15a0e8e2fec286ff97ac5c9e349542 |
31-Mar-2009 |
Evan Cheng <evan.cheng@apple.com> |
Fully general expansion of integer shift of any size.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68134 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeIntegerTypes.cpp
egalizeTypes.h
|
| 456e281c11914034558f9878f88688ab7873647a |
31-Mar-2009 |
Dan Gohman <gohman@apple.com> |
Minor top-level comment fix.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68113 91177308-0d34-0410-b5e6-96231b3b80d8
allingConvLower.cpp
|
| f17684ec1e0a48745c7f5dc5b5192d490f743399 |
31-Mar-2009 |
Dan Gohman <gohman@apple.com> |
Minor top-level comment fix.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68113 91177308-0d34-0410-b5e6-96231b3b80d8
allingConvLower.cpp
|
| 07c26ee87e4060f487867f1e283801bd8ced62d1 |
31-Mar-2009 |
Dan Gohman <gohman@apple.com> |
Fix live-out reg logic to not insert over-aggressive AssertZExt
instructions. This fixes lua.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68083 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuild.cpp
|
| 133762779dc3727a80f73f2d03eebe3bc0853695 |
31-Mar-2009 |
Dan Gohman <gohman@apple.com> |
Fix live-out reg logic to not insert over-aggressive AssertZExt
instructions. This fixes lua.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68083 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuild.cpp
|
| 004e27cc1bba070f013589cc8e434b03589c3c22 |
29-Mar-2009 |
Duncan Sands <baldrick@free.fr> |
Fix PR3899: add support for extracting floats from vectors
when using -soft-float.
Based on a patch by Jakob Stoklund Olesen.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@67996 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeFloatTypes.cpp
egalizeTypes.cpp
egalizeTypes.h
|
| 754fad1088715119c7a5b404548582bde7d8419e |
29-Mar-2009 |
Duncan Sands <baldrick@free.fr> |
Fix PR3899: add support for extracting floats from vectors
when using -soft-float.
Based on a patch by Jakob Stoklund Olesen.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@67996 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeFloatTypes.cpp
egalizeTypes.cpp
egalizeTypes.h
|
| 11ff97801b93af0d36244fd5877b1552cdfa0a86 |
28-Mar-2009 |
Arnold Schwaighofer <arnold.schwaighofer@gmail.com> |
Make check in CheckTailCallReturnConstraints for ignorable instructions between
a CALL and a RET node more generic. Add a test for tail calls with a void
return.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@67943 91177308-0d34-0410-b5e6-96231b3b80d8
argetLowering.cpp
|
| e46f5508dcf45c7f4833913a49dfa3cd95ea74b3 |
28-Mar-2009 |
Arnold Schwaighofer <arnold.schwaighofer@gmail.com> |
Make check in CheckTailCallReturnConstraints for ignorable instructions between
a CALL and a RET node more generic. Add a test for tail calls with a void
return.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@67943 91177308-0d34-0410-b5e6-96231b3b80d8
argetLowering.cpp
|
| e75fd69f15dc1b35d20b12d0e765ea6f2b9ffe0b |
28-Mar-2009 |
Arnold Schwaighofer <arnold.schwaighofer@gmail.com> |
Enable tail call optimization for functions that return a struct (bug 3664) and for functions that return types that need extending (e.g i1).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@67934 91177308-0d34-0410-b5e6-96231b3b80d8
argetLowering.cpp
|
| 219f13d4d668ce168c20767ce52793359ad2e3f9 |
28-Mar-2009 |
Arnold Schwaighofer <arnold.schwaighofer@gmail.com> |
Enable tail call optimization for functions that return a struct (bug 3664) and for functions that return types that need extending (e.g i1).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@67934 91177308-0d34-0410-b5e6-96231b3b80d8
argetLowering.cpp
|
| 0b0cd9113af42c422c829563c3b12e6e52bd2d79 |
28-Mar-2009 |
Evan Cheng <evan.cheng@apple.com> |
Optimize some 64-bit multiplication by constants into two lea's or one lea + shl since imulq is slow (latency 5). e.g.
x * 40
=>
shlq $3, %rdi
leaq (%rdi,%rdi,4), %rax
This has the added benefit of allowing more multiply to be folded into addressing mode. e.g.
a * 24 + b
=>
leaq (%rdi,%rdi,2), %rax
leaq (%rsi,%rax,8), %rax
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@67917 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 04ecee185c120cc4a5bcdcbef9c66ba3f017e136 |
28-Mar-2009 |
Evan Cheng <evan.cheng@apple.com> |
Optimize some 64-bit multiplication by constants into two lea's or one lea + shl since imulq is slow (latency 5). e.g.
x * 40
=>
shlq $3, %rdi
leaq (%rdi,%rdi,4), %rax
This has the added benefit of allowing more multiply to be folded into addressing mode. e.g.
a * 24 + b
=>
leaq (%rdi,%rdi,2), %rax
leaq (%rsi,%rax,8), %rax
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@67917 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| a80efceb93211a22e13dfc68198da4a25c1a7762 |
28-Mar-2009 |
Dan Gohman <gohman@apple.com> |
Fix what surely must be a copy+pasto.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@67881 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| d38e97f8f5604a6e487633e94b489647c49ad733 |
28-Mar-2009 |
Dan Gohman <gohman@apple.com> |
Fix what surely must be a copy+pasto.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@67881 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 84d08db733f64d9c3da4d534a3c9b553e0f77ed8 |
28-Mar-2009 |
Dan Gohman <gohman@apple.com> |
Initialize LiveOutInfo's APInt members to zero, as APInt's
default constructor produces an uninitialized APInt.
This fixes PR3896.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@67879 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuild.h
|
| c6a39145b11356be3fcc21f17b4f2e7e27b41408 |
28-Mar-2009 |
Dan Gohman <gohman@apple.com> |
Initialize LiveOutInfo's APInt members to zero, as APInt's
default constructor produces an uninitialized APInt.
This fixes PR3896.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@67879 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuild.h
|
| a02a3dda5652995afaaf11148c11d98c9b9d908f |
26-Mar-2009 |
Bill Wendling <isanbard@gmail.com> |
Pull transform from target-dependent code into target-independent code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@67742 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 6ee0c45ef81ed447d4624f2dbc5b36c9f729f2e2 |
26-Mar-2009 |
Bill Wendling <isanbard@gmail.com> |
Pull transform from target-dependent code into target-independent code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@67742 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 3927f438b5a9fdadc17257802b09430b16d225f9 |
25-Mar-2009 |
Evan Cheng <evan.cheng@apple.com> |
Revert 67132. This is breaking some objective-c apps.
Also fixes SDISel so it *does not* force promote return value if the function is not marked signext / zeroext.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@67701 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuild.cpp
|
| 025098e3b1305b511b9d8b5286996c68e52b4dde |
25-Mar-2009 |
Evan Cheng <evan.cheng@apple.com> |
Revert 67132. This is breaking some objective-c apps.
Also fixes SDISel so it *does not* force promote return value if the function is not marked signext / zeroext.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@67701 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuild.cpp
|
| beaec4cbf6cfd756084eff1ee2ad18ee17c33284 |
25-Mar-2009 |
Dale Johannesen <dalej@apple.com> |
When optimizing with debug info, don't keep the
stoppoint nodes around until Legalize; doing this
imposed an ordering on a sequence of loads that
came from different lines, interfering with scheduling.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@67692 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuild.cpp
|
| db7b8a14081487faf549a0bf112d379ff8d8a664 |
25-Mar-2009 |
Dale Johannesen <dalej@apple.com> |
When optimizing with debug info, don't keep the
stoppoint nodes around until Legalize; doing this
imposed an ordering on a sequence of loads that
came from different lines, interfering with scheduling.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@67692 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuild.cpp
|
| e2f7bf8e2d273e94487f06094e3619250a485b51 |
24-Mar-2009 |
Chris Lattner <sabre@nondot.org> |
more tidying: name the components of PhysReg in the case when
the target constraint specifies a specific physreg.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@67618 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuild.cpp
|
| 2c723b76a8813224c31d1e66c690ca2c4736afe6 |
24-Mar-2009 |
Chris Lattner <sabre@nondot.org> |
more tidying: name the components of PhysReg in the case when
the target constraint specifies a specific physreg.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@67618 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuild.cpp
|
| b3b4484e3d9e36c4c24a5409f2272a806b7af908 |
24-Mar-2009 |
Chris Lattner <sabre@nondot.org> |
Tidy a bit more.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@67617 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuild.cpp
|
| 2cfec3239cbf4f7c18d8ffe3a29450e3d1740d7d |
24-Mar-2009 |
Chris Lattner <sabre@nondot.org> |
Tidy a bit more.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@67617 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuild.cpp
|
| fc9d161f16933498d572463edf952c03bc5b1ec0 |
24-Mar-2009 |
Chris Lattner <sabre@nondot.org> |
simplify this code a bit now that "allocation to a vreg class" can never
fail.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@67616 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuild.cpp
|
| 94b006b29b6e3ebf6b12f44cb944e061bdadfab4 |
24-Mar-2009 |
Chris Lattner <sabre@nondot.org> |
simplify this code a bit now that "allocation to a vreg class" can never
fail.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@67616 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuild.cpp
|
| 8f4aa333d02d0f48f90f4604d894a73ee53edcb5 |
24-Mar-2009 |
Dan Gohman <gohman@apple.com> |
Minor compile-time optimization; don't bother checking
canClobberPhysRegDefs if the successor node doesn't
clobber any physical registers.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@67587 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGRRList.cpp
|
| 8d14eecb05cad7ac34eb6661546af4d5de88be4f |
24-Mar-2009 |
Dan Gohman <gohman@apple.com> |
Minor compile-time optimization; don't bother checking
canClobberPhysRegDefs if the successor node doesn't
clobber any physical registers.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@67587 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGRRList.cpp
|
| 002b44f1d7c0b301b78dec1f24d406d4b351fdaa |
24-Mar-2009 |
Dan Gohman <gohman@apple.com> |
Add a pre-pass to the burr-list scheduler which makes adjustments to
help out the register pressure reduction heuristics in the case of
nodes with multiple uses. Currently this uses very conservative
heuristics, so it doesn't have a broad impact, but in cases where it
does help it can make a big difference.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@67586 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGRRList.cpp
|
| 190f233ef60b1dba27124bcc839cdb107926e74a |
24-Mar-2009 |
Dan Gohman <gohman@apple.com> |
Add a pre-pass to the burr-list scheduler which makes adjustments to
help out the register pressure reduction heuristics in the case of
nodes with multiple uses. Currently this uses very conservative
heuristics, so it doesn't have a broad impact, but in cases where it
does help it can make a big difference.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@67586 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGRRList.cpp
|
| fa9afef7eaa0865fb9f3489a68a04332b232ed82 |
23-Mar-2009 |
Dan Gohman <gohman@apple.com> |
When unfolding a load during scheduling, the new operator node has
a data dependency on the load node, so it really needs a
data-dependence edge to the load node, even if the load previously
existed.
And add a few comments.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@67554 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGRRList.cpp
|
| f30c6d266f1b764cc54d81a9233fca50a16436cc |
23-Mar-2009 |
Dan Gohman <gohman@apple.com> |
When unfolding a load during scheduling, the new operator node has
a data dependency on the load node, so it really needs a
data-dependence edge to the load node, even if the load previously
existed.
And add a few comments.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@67554 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGRRList.cpp
|
| 8cccf0ef0ced7f4d75ca574b596036a9b6cd4315 |
23-Mar-2009 |
Dan Gohman <gohman@apple.com> |
Don't set SUnit::hasPhysRegDefs to true unless the defs are
actually have uses, which reflects the way it's used.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@67540 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGSDNodes.cpp
|
| 945014267f0187b7921472ab05e576b1354c07fb |
23-Mar-2009 |
Dan Gohman <gohman@apple.com> |
Don't set SUnit::hasPhysRegDefs to true unless the defs are
actually have uses, which reflects the way it's used.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@67540 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGSDNodes.cpp
|
| a5c8ae233ebaef270b8fa96565ca7bf4fdcb3e15 |
23-Mar-2009 |
Dan Gohman <gohman@apple.com> |
Fix canClobberPhysRegDefs to check all SDNodes grouped together
in an SUnit, instead of just the first one. This fix is needed
by some upcoming scheduler changes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@67531 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGRRList.cpp
|
| c205518ef378865564b65ed216f27eb74763b5dc |
23-Mar-2009 |
Dan Gohman <gohman@apple.com> |
Fix canClobberPhysRegDefs to check all SDNodes grouped together
in an SUnit, instead of just the first one. This fix is needed
by some upcoming scheduler changes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@67531 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGRRList.cpp
|
| 3974667c1a6d48686e92f85bc4463bb239af7442 |
23-Mar-2009 |
Dan Gohman <gohman@apple.com> |
Add a new bit to SUnit to record whether a node has implicit physreg
defs, regardless of whether they are actually used.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@67528 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGSDNodes.cpp
|
| b872c7c9784c3b9a6c965379ed3ed2115c55f5b3 |
23-Mar-2009 |
Dan Gohman <gohman@apple.com> |
Add a new bit to SUnit to record whether a node has implicit physreg
defs, regardless of whether they are actually used.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@67528 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGSDNodes.cpp
|
| f871ccb853a2ccbe8675c912330c041b318be8cd |
23-Mar-2009 |
Dan Gohman <gohman@apple.com> |
Now that errs() is properly non-buffered, there's no need to
explicitly flush it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@67526 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| e7d7b0fd48792ea131995c5d55002ee14fdb6bc5 |
23-Mar-2009 |
Dan Gohman <gohman@apple.com> |
Now that errs() is properly non-buffered, there's no need to
explicitly flush it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@67526 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| fb11288109329cb736d9f49769581a0d0c23fe19 |
23-Mar-2009 |
Evan Cheng <evan.cheng@apple.com> |
Model inline asm constraint which ties an input to an output register as machine operand TIED_TO constraint. This eliminated the need to pre-allocate registers for these. This also allows register allocator can eliminate the unneeded copies.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@67512 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuild.cpp
|
| 2682ea07a439718636fb7f2d841dc1095331244f |
23-Mar-2009 |
Evan Cheng <evan.cheng@apple.com> |
Model inline asm constraint which ties an input to an output register as machine operand TIED_TO constraint. This eliminated the need to pre-allocate registers for these. This also allows register allocator can eliminate the unneeded copies.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@67512 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuild.cpp
|
| db95fa131a229652f925794ca7a5b84e9490050b |
20-Mar-2009 |
Dan Gohman <gohman@apple.com> |
Simplify this code; use a while instead of an if and a do-while.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@67400 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGSDNodes.cpp
|
| 8c8d09e7eb3e6ea2276d24ba009831d11bb62a9d |
20-Mar-2009 |
Dan Gohman <gohman@apple.com> |
Simplify this code; use a while instead of an if and a do-while.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@67400 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGSDNodes.cpp
|
| 697cbbfb00c318f98d6eb51945f077e2bfe8781e |
20-Mar-2009 |
Evan Cheng <evan.cheng@apple.com> |
For inline asm output operand that matches an input. Encode the input operand index in the high bits.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@67387 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
cheduleDAGRRList.cpp
cheduleDAGSDNodesEmit.cpp
electionDAGBuild.cpp
electionDAGISel.cpp
|
| 9216740fcc17e9442241a19034e9c1ad9cd65bc2 |
20-Mar-2009 |
Evan Cheng <evan.cheng@apple.com> |
For inline asm output operand that matches an input. Encode the input operand index in the high bits.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@67387 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
cheduleDAGRRList.cpp
cheduleDAGSDNodesEmit.cpp
electionDAGBuild.cpp
electionDAGISel.cpp
|
| b169426272b85ce28a9a56d13154e61b158fc47a |
20-Mar-2009 |
Sanjiv Gupta <sanjiv.gupta@microchip.com> |
Fixed the comment. No functionality change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@67370 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeTypes.cpp
|
| dd5d7fe66802b6687af835c57b17a06c37d5f315 |
20-Mar-2009 |
Sanjiv Gupta <sanjiv.gupta@microchip.com> |
Fixed the comment. No functionality change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@67370 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeTypes.cpp
|
| aa9df0b0c3cef33514095bde2eedead986677955 |
18-Mar-2009 |
Mon P Wang <wangmp@apple.com> |
Added missing support for widening when splitting an unary op (PR3683)
and expanding a bit convert (PR3711). In both cases, we extract the
valid part of the widen vector and then do the conversion.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@67175 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeIntegerTypes.cpp
egalizeTypes.h
egalizeTypesGeneric.cpp
egalizeVectorTypes.cpp
|
| 1b127eaad4867eb33176b5d65c0f043cf015e365 |
18-Mar-2009 |
Mon P Wang <wangmp@apple.com> |
Added missing support for widening when splitting an unary op (PR3683)
and expanding a bit convert (PR3711). In both cases, we extract the
valid part of the widen vector and then do the conversion.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@67175 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeIntegerTypes.cpp
egalizeTypes.h
egalizeTypesGeneric.cpp
egalizeVectorTypes.cpp
|
| 152932b71c488a6522c541f847eb3081cffb3793 |
18-Mar-2009 |
Rafael Espindola <rafael.espindola@gmail.com> |
Don't force promotion of return arguments on the callee.
Some architectures (like x86) don't require it.
This fixes bug 3779.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@67132 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuild.cpp
|
| 0c9872bc2ab82f4f3f105962da546679be3f2eb7 |
18-Mar-2009 |
Rafael Espindola <rafael.espindola@gmail.com> |
Don't force promotion of return arguments on the callee.
Some architectures (like x86) don't require it.
This fixes bug 3779.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@67132 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuild.cpp
|
| 0b18e59336dcb18e036540dd667fed8d17c3cc09 |
17-Mar-2009 |
Chris Lattner <sabre@nondot.org> |
Fix codegen to compute the size of an allocation by multiplying the
size by the array amount as an i32 value instead of promoting from
i32 to i64 then doing the multiply. Not doing this broke wrap-around
assumptions that the optimizers (validly) made. The ultimate real
fix for this is to introduce i64 version of alloca and remove mallocinst.
This fixes PR3829
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@67093 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuild.cpp
|
| 6ccad3bf0602e4771d53bb7d81ad26f37a6ea285 |
17-Mar-2009 |
Chris Lattner <sabre@nondot.org> |
Fix codegen to compute the size of an allocation by multiplying the
size by the array amount as an i32 value instead of promoting from
i32 to i64 then doing the multiply. Not doing this broke wrap-around
assumptions that the optimizers (validly) made. The ultimate real
fix for this is to introduce i64 version of alloca and remove mallocinst.
This fixes PR3829
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@67093 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuild.cpp
|
| 93b7415f4cc9a83126f1d89b2d2f51a204b09dd6 |
17-Mar-2009 |
Mon P Wang <wangmp@apple.com> |
Fix a problem with DAGCombine where we were building an illegal build
vector shuffle mask. Forced the mask to be built using i32. Note: this will
be irrelevant once vector_shuffle no longer takes a build vector for the
shuffle mask.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@67076 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| c9f167263d9a4e1a9b71497593b3c9bc42280eb5 |
17-Mar-2009 |
Mon P Wang <wangmp@apple.com> |
Fix a problem with DAGCombine where we were building an illegal build
vector shuffle mask. Forced the mask to be built using i32. Note: this will
be irrelevant once vector_shuffle no longer takes a build vector for the
shuffle mask.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@67076 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 0b7a786842fd6601b99b1073e5393ebc928c1e6c |
14-Mar-2009 |
Mon P Wang <wangmp@apple.com> |
Avoid doing the transformation c ? 1.0 : 2.0 as load { 2.0, 1.0 } + c*4
if FPConstant is legal because if the FPConstant doesn't need to be stored
in a constant pool, the transformation is unlikely to be profitable.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@66994 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| b9491a9aa3966c3be969284f4e92f4a087061505 |
14-Mar-2009 |
Mon P Wang <wangmp@apple.com> |
Avoid doing the transformation c ? 1.0 : 2.0 as load { 2.0, 1.0 } + c*4
if FPConstant is legal because if the FPConstant doesn't need to be stored
in a constant pool, the transformation is unlikely to be profitable.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@66994 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 474d3b3f40e117a66946e9fb9d2016b4c05caef0 |
14-Mar-2009 |
Dan Gohman <gohman@apple.com> |
Improve FastISel's handling of truncates to i1, and implement
ptrtoint and inttoptr in X86FastISel. These casts aren't always
handled in the generic FastISel code because X86 sometimes needs
custom code to do truncation and zero-extension.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@66988 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
|
| 94fc47afe6e708020394a53e7f435583e97b75db |
14-Mar-2009 |
Dan Gohman <gohman@apple.com> |
Improve FastISel's handling of truncates to i1, and implement
ptrtoint and inttoptr in X86FastISel. These casts aren't always
handled in the generic FastISel code because X86 sometimes needs
custom code to do truncation and zero-extension.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@66988 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
|
| 14ea1ec2324cb595f2e035bbf54ddcd483f17c11 |
13-Mar-2009 |
Dan Gohman <gohman@apple.com> |
Fix FastISel's assumption that i1 values are always zero-extended
by inserting explicit zero extensions where necessary. Included
is a testcase where SelectionDAG produces a virtual register
holding an i1 value which FastISel previously mistakenly assumed
to be zero-extended.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@66941 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
|
| 01648d9b73e596f3620e6177db7c1783547a74e4 |
13-Mar-2009 |
Dan Gohman <gohman@apple.com> |
Fix FastISel's assumption that i1 values are always zero-extended
by inserting explicit zero extensions where necessary. Included
is a testcase where SelectionDAG produces a virtual register
holding an i1 value which FastISel previously mistakenly assumed
to be zero-extended.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@66941 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
|
| 1606e8e4cd937e6de6681f686c266cf61722d972 |
13-Mar-2009 |
Evan Cheng <evan.cheng@apple.com> |
Fix some significant problems with constant pools that resulted in unnecessary paddings between constant pool entries, larger than necessary alignments (e.g. 8 byte alignment for .literal4 sections), and potentially other issues.
1. ConstantPoolSDNode alignment field is log2 value of the alignment requirement. This is not consistent with other SDNode variants.
2. MachineConstantPool alignment field is also a log2 value.
3. However, some places are creating ConstantPoolSDNode with alignment value rather than log2 values. This creates entries with artificially large alignments, e.g. 256 for SSE vector values.
4. Constant pool entry offsets are computed when they are created. However, asm printer group them by sections. That means the offsets are no longer valid. However, asm printer uses them to determine size of padding between entries.
5. Asm printer uses expensive data structure multimap to track constant pool entries by sections.
6. Asm printer iterate over SmallPtrSet when it's emitting constant pool entries. This is non-deterministic.
Solutions:
1. ConstantPoolSDNode alignment field is changed to keep non-log2 value.
2. MachineConstantPool alignment field is also changed to keep non-log2 value.
3. Functions that create ConstantPool nodes are passing in non-log2 alignments.
4. MachineConstantPoolEntry no longer keeps an offset field. It's replaced with an alignment field. Offsets are not computed when constant pool entries are created. They are computed on the fly in asm printer and JIT.
5. Asm printer uses cheaper data structure to group constant pool entries.
6. Asm printer compute entry offsets after grouping is done.
7. Change JIT code to compute entry offsets on the fly.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@66875 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
egalizeDAG.cpp
egalizeIntegerTypes.cpp
cheduleDAGSDNodesEmit.cpp
electionDAG.cpp
electionDAGPrinter.cpp
|
| 68c1868c4bdc04cd319ea92662aa5aaccf6ac378 |
13-Mar-2009 |
Evan Cheng <evan.cheng@apple.com> |
Fix some significant problems with constant pools that resulted in unnecessary paddings between constant pool entries, larger than necessary alignments (e.g. 8 byte alignment for .literal4 sections), and potentially other issues.
1. ConstantPoolSDNode alignment field is log2 value of the alignment requirement. This is not consistent with other SDNode variants.
2. MachineConstantPool alignment field is also a log2 value.
3. However, some places are creating ConstantPoolSDNode with alignment value rather than log2 values. This creates entries with artificially large alignments, e.g. 256 for SSE vector values.
4. Constant pool entry offsets are computed when they are created. However, asm printer group them by sections. That means the offsets are no longer valid. However, asm printer uses them to determine size of padding between entries.
5. Asm printer uses expensive data structure multimap to track constant pool entries by sections.
6. Asm printer iterate over SmallPtrSet when it's emitting constant pool entries. This is non-deterministic.
Solutions:
1. ConstantPoolSDNode alignment field is changed to keep non-log2 value.
2. MachineConstantPool alignment field is also changed to keep non-log2 value.
3. Functions that create ConstantPool nodes are passing in non-log2 alignments.
4. MachineConstantPoolEntry no longer keeps an offset field. It's replaced with an alignment field. Offsets are not computed when constant pool entries are created. They are computed on the fly in asm printer and JIT.
5. Asm printer uses cheaper data structure to group constant pool entries.
6. Asm printer compute entry offsets after grouping is done.
7. Change JIT code to compute entry offsets on the fly.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@66875 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
egalizeDAG.cpp
egalizeIntegerTypes.cpp
cheduleDAGSDNodesEmit.cpp
electionDAG.cpp
electionDAGPrinter.cpp
|
| 0582ae99ba75a556d6ff63b254da327d32ba036f |
13-Mar-2009 |
Bill Wendling <isanbard@gmail.com> |
Oops...I committed too much.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@66867 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
egalizeDAG.cpp
electionDAG.cpp
electionDAGBuild.cpp
electionDAGPrinter.cpp
|
| f3f16e873f4ab3369a996f2c07c84df94dca2d82 |
13-Mar-2009 |
Bill Wendling <isanbard@gmail.com> |
Oops...I committed too much.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@66867 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
egalizeDAG.cpp
electionDAG.cpp
electionDAGBuild.cpp
electionDAGPrinter.cpp
|
| c7a09ab3110b9462ad9646cb60c22c8527491ad9 |
13-Mar-2009 |
Bill Wendling <isanbard@gmail.com> |
Temporarily XFAIL this test.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@66866 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
egalizeDAG.cpp
electionDAG.cpp
electionDAGBuild.cpp
electionDAGPrinter.cpp
|
| ec6ffc713f5f6e584debda7c55e1b37652e63617 |
13-Mar-2009 |
Bill Wendling <isanbard@gmail.com> |
Temporarily XFAIL this test.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@66866 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
egalizeDAG.cpp
electionDAG.cpp
electionDAGBuild.cpp
electionDAGPrinter.cpp
|
| b398fca15bcca895526699f20336fa6c6a624013 |
13-Mar-2009 |
Dan Gohman <gohman@apple.com> |
Fix a typo in a comment.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@66843 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGRRList.cpp
|
| e68e538c04032fa0dfba8d59456b48281be12091 |
13-Mar-2009 |
Dan Gohman <gohman@apple.com> |
Fix a typo in a comment.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@66843 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGRRList.cpp
|
| d1980a5acd8509ea34ee2dec5e13de5dbe16af2d |
12-Mar-2009 |
Chris Lattner <sabre@nondot.org> |
Move 3 "(add (select cc, 0, c), x) -> (select cc, x, (add, x, c))"
related transformations out of target-specific dag combine into the
ARM backend. These were added by Evan in r37685 with no testcases
and only seems to help ARM (e.g. test/CodeGen/ARM/select_xform.ll).
Add some simple X86-specific (for now) DAG combines that turn things
like cond ? 8 : 0 -> (zext(cond) << 3). This happens frequently
with the recently added cp constant select optimization, but is a
very general xform. For example, we now compile the second example
in const-select.ll to:
_test:
movsd LCPI2_0, %xmm0
ucomisd 8(%esp), %xmm0
seta %al
movzbl %al, %eax
movl 4(%esp), %ecx
movsbl (%ecx,%eax,4), %eax
ret
instead of:
_test:
movl 4(%esp), %eax
leal 4(%eax), %ecx
movsd LCPI2_0, %xmm0
ucomisd 8(%esp), %xmm0
cmovbe %eax, %ecx
movsbl (%ecx), %eax
ret
This passes multisource and dejagnu.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@66779 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| e4577dcdb3554eb8306dff4731eda1fd695eee4b |
12-Mar-2009 |
Chris Lattner <sabre@nondot.org> |
Move 3 "(add (select cc, 0, c), x) -> (select cc, x, (add, x, c))"
related transformations out of target-specific dag combine into the
ARM backend. These were added by Evan in r37685 with no testcases
and only seems to help ARM (e.g. test/CodeGen/ARM/select_xform.ll).
Add some simple X86-specific (for now) DAG combines that turn things
like cond ? 8 : 0 -> (zext(cond) << 3). This happens frequently
with the recently added cp constant select optimization, but is a
very general xform. For example, we now compile the second example
in const-select.ll to:
_test:
movsd LCPI2_0, %xmm0
ucomisd 8(%esp), %xmm0
seta %al
movzbl %al, %eax
movl 4(%esp), %ecx
movsbl (%ecx,%eax,4), %eax
ret
instead of:
_test:
movl 4(%esp), %eax
leal 4(%eax), %ecx
movsd LCPI2_0, %xmm0
ucomisd 8(%esp), %xmm0
cmovbe %eax, %ecx
movsbl (%ecx), %eax
ret
This passes multisource and dejagnu.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@66779 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 8042255118ddaf49ac940805b95f77eddecc70e5 |
12-Mar-2009 |
Evan Cheng <evan.cheng@apple.com> |
Enable Chris' value propagation change. It make available known sign, zero, one bits information for values that are live out of basic blocks. The goal is to eliminate unnecessary sext, zext, truncate of values that are live-in to blocks. This does not handle PHI nodes yet.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@66777 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 48d23f62f30393c0a0226b91b7ddcfe40cf84a65 |
12-Mar-2009 |
Evan Cheng <evan.cheng@apple.com> |
Enable Chris' value propagation change. It make available known sign, zero, one bits information for values that are live out of basic blocks. The goal is to eliminate unnecessary sext, zext, truncate of values that are live-in to blocks. This does not handle PHI nodes yet.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@66777 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 600fec3cea2d1d894496cdb8dd4ae280a2395179 |
11-Mar-2009 |
Chris Lattner <sabre@nondot.org> |
reapply my previous patch (r66358) with a tweak to set the
alignment of the generated constant pool entry to the
desired alignment of a type. If we don't do this, we end up
trying to do movsd from 4-byte alignment memory. This fixes
450.soplex and 456.hmmer.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@66641 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 00fc17c744dfddfc6b9a41029024f262e49c2b17 |
11-Mar-2009 |
Chris Lattner <sabre@nondot.org> |
reapply my previous patch (r66358) with a tweak to set the
alignment of the generated constant pool entry to the
desired alignment of a type. If we don't do this, we end up
trying to do movsd from 4-byte alignment memory. This fixes
450.soplex and 456.hmmer.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@66641 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 41d88d2ac07d1ccbb3c0d1430d57102aada89390 |
10-Mar-2009 |
Evan Cheng <evan.cheng@apple.com> |
Revert 66358 for now. It's breaking povray, 450.soplex, and 456.hmmer on x86 / Darwin.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@66574 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| c34b4449be37df98eaf09e4c88e5648cb2a1f2c6 |
10-Mar-2009 |
Evan Cheng <evan.cheng@apple.com> |
Revert 66358 for now. It's breaking povray, 450.soplex, and 456.hmmer on x86 / Darwin.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@66574 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 66b8bc3289b872cd4b7480710a530f718cc536de |
09-Mar-2009 |
Chris Lattner <sabre@nondot.org> |
Fix PR3763 by using proper APInt methods instead of uint64_t's.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@66434 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 12e5aa81e6d5fed4ec2a96f0fe69d42699139133 |
09-Mar-2009 |
Chris Lattner <sabre@nondot.org> |
Fix PR3763 by using proper APInt methods instead of uint64_t's.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@66434 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| ccbdc7ab82792ac5d7863ef086f11fb010d88073 |
09-Mar-2009 |
Bill Wendling <isanbard@gmail.com> |
Pass in a std::string when getting the names of debugging things. This cuts down
on the number of times a std::string is created and copied.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@66396 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
egalizeDAG.cpp
electionDAGBuild.cpp
electionDAGPrinter.cpp
|
| 1c5842ba9921d6e1360ad6c859da81186545473a |
09-Mar-2009 |
Bill Wendling <isanbard@gmail.com> |
Pass in a std::string when getting the names of debugging things. This cuts down
on the number of times a std::string is created and copied.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@66396 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
egalizeDAG.cpp
electionDAGBuild.cpp
electionDAGPrinter.cpp
|
| 476769498e9d2f406a9f9f64218f513636734422 |
08-Mar-2009 |
Chris Lattner <sabre@nondot.org> |
implement an optimization to codegen c ? 1.0 : 2.0 as load { 2.0, 1.0 } + c*4.
For 2009-03-07-FPConstSelect.ll we now produce:
_f:
xorl %eax, %eax
testl %edi, %edi
movl $4, %ecx
cmovne %rax, %rcx
leaq LCPI1_0(%rip), %rax
movss (%rcx,%rax), %xmm0
ret
previously we produced:
_f:
subl $4, %esp
cmpl $0, 8(%esp)
movss LCPI1_0, %xmm0
je LBB1_2 ## entry
LBB1_1: ## entry
movss LCPI1_1, %xmm0
LBB1_2: ## entry
movss %xmm0, (%esp)
flds (%esp)
addl $4, %esp
ret
on PPC the code also improves to:
_f:
cntlzw r2, r3
srwi r2, r2, 5
li r3, lo16(LCPI1_0)
slwi r2, r2, 2
addis r3, r3, ha16(LCPI1_0)
lfsx f1, r3, r2
blr
from:
_f:
li r2, lo16(LCPI1_1)
cmplwi cr0, r3, 0
addis r2, r2, ha16(LCPI1_1)
beq cr0, LBB1_2 ; entry
LBB1_1: ; entry
li r2, lo16(LCPI1_0)
addis r2, r2, ha16(LCPI1_0)
LBB1_2: ; entry
lfs f1, 0(r2)
blr
This also improves the existing pic-cpool case from:
foo:
subl $12, %esp
call .Lllvm$1.$piclabel
.Lllvm$1.$piclabel:
popl %eax
addl $_GLOBAL_OFFSET_TABLE_ + [.-.Lllvm$1.$piclabel], %eax
cmpl $0, 16(%esp)
movsd .LCPI1_0@GOTOFF(%eax), %xmm0
je .LBB1_2 # entry
.LBB1_1: # entry
movsd .LCPI1_1@GOTOFF(%eax), %xmm0
.LBB1_2: # entry
movsd %xmm0, (%esp)
fldl (%esp)
addl $12, %esp
ret
to:
foo:
call .Lllvm$1.$piclabel
.Lllvm$1.$piclabel:
popl %eax
addl $_GLOBAL_OFFSET_TABLE_ + [.-.Lllvm$1.$piclabel], %eax
xorl %ecx, %ecx
cmpl $0, 4(%esp)
movl $8, %edx
cmovne %ecx, %edx
fldl .LCPI1_0@GOTOFF(%eax,%edx)
ret
This triggers a few dozen times in spec FP 2000.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@66358 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 2a4a70ad09a0328888ad0b014c7f2361eb90d284 |
08-Mar-2009 |
Chris Lattner <sabre@nondot.org> |
implement an optimization to codegen c ? 1.0 : 2.0 as load { 2.0, 1.0 } + c*4.
For 2009-03-07-FPConstSelect.ll we now produce:
_f:
xorl %eax, %eax
testl %edi, %edi
movl $4, %ecx
cmovne %rax, %rcx
leaq LCPI1_0(%rip), %rax
movss (%rcx,%rax), %xmm0
ret
previously we produced:
_f:
subl $4, %esp
cmpl $0, 8(%esp)
movss LCPI1_0, %xmm0
je LBB1_2 ## entry
LBB1_1: ## entry
movss LCPI1_1, %xmm0
LBB1_2: ## entry
movss %xmm0, (%esp)
flds (%esp)
addl $4, %esp
ret
on PPC the code also improves to:
_f:
cntlzw r2, r3
srwi r2, r2, 5
li r3, lo16(LCPI1_0)
slwi r2, r2, 2
addis r3, r3, ha16(LCPI1_0)
lfsx f1, r3, r2
blr
from:
_f:
li r2, lo16(LCPI1_1)
cmplwi cr0, r3, 0
addis r2, r2, ha16(LCPI1_1)
beq cr0, LBB1_2 ; entry
LBB1_1: ; entry
li r2, lo16(LCPI1_0)
addis r2, r2, ha16(LCPI1_0)
LBB1_2: ; entry
lfs f1, 0(r2)
blr
This also improves the existing pic-cpool case from:
foo:
subl $12, %esp
call .Lllvm$1.$piclabel
.Lllvm$1.$piclabel:
popl %eax
addl $_GLOBAL_OFFSET_TABLE_ + [.-.Lllvm$1.$piclabel], %eax
cmpl $0, 16(%esp)
movsd .LCPI1_0@GOTOFF(%eax), %xmm0
je .LBB1_2 # entry
.LBB1_1: # entry
movsd .LCPI1_1@GOTOFF(%eax), %xmm0
.LBB1_2: # entry
movsd %xmm0, (%esp)
fldl (%esp)
addl $12, %esp
ret
to:
foo:
call .Lllvm$1.$piclabel
.Lllvm$1.$piclabel:
popl %eax
addl $_GLOBAL_OFFSET_TABLE_ + [.-.Lllvm$1.$piclabel], %eax
xorl %ecx, %ecx
cmpl $0, 4(%esp)
movl $8, %edx
cmovne %ecx, %edx
fldl .LCPI1_0@GOTOFF(%eax,%edx)
ret
This triggers a few dozen times in spec FP 2000.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@66358 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| d2e936a513b01b2c5df91a9c0d80070e8c752ace |
08-Mar-2009 |
Chris Lattner <sabre@nondot.org> |
random cleanups.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@66357 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 50ce834a58fc70fe5755ee147f02a2bdee936190 |
08-Mar-2009 |
Chris Lattner <sabre@nondot.org> |
random cleanups.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@66357 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 667d4b8de6dea70195ff12ef39a4deebffa2f5c7 |
07-Mar-2009 |
Duncan Sands <baldrick@free.fr> |
Introduce new linkage types linkonce_odr, weak_odr, common_odr
and extern_weak_odr. These are the same as the non-odr versions,
except that they indicate that the global will only be overridden
by an *equivalent* global. In C, a function with weak linkage can
be overridden by a function which behaves completely differently.
This means that IP passes have to skip weak functions, since any
deductions made from the function definition might be wrong, since
the definition could be replaced by something completely different
at link time. This is not allowed in C++, thanks to the ODR
(One-Definition-Rule): if a function is replaced by another at
link-time, then the new function must be the same as the original
function. If a language knows that a function or other global can
only be overridden by an equivalent global, it can give it the
weak_odr linkage type, and the optimizers will understand that it
is alright to make deductions based on the function body. The
code generators on the other hand map weak and weak_odr linkage
to the same thing.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@66339 91177308-0d34-0410-b5e6-96231b3b80d8
argetLowering.cpp
|
| 19d161f714b83cd850fe489aa3fdaa3d3744157b |
07-Mar-2009 |
Duncan Sands <baldrick@free.fr> |
Introduce new linkage types linkonce_odr, weak_odr, common_odr
and extern_weak_odr. These are the same as the non-odr versions,
except that they indicate that the global will only be overridden
by an *equivalent* global. In C, a function with weak linkage can
be overridden by a function which behaves completely differently.
This means that IP passes have to skip weak functions, since any
deductions made from the function definition might be wrong, since
the definition could be replaced by something completely different
at link time. This is not allowed in C++, thanks to the ODR
(One-Definition-Rule): if a function is replaced by another at
link-time, then the new function must be the same as the original
function. If a language knows that a function or other global can
only be overridden by an equivalent global, it can give it the
weak_odr linkage type, and the optimizers will understand that it
is alright to make deductions based on the function body. The
code generators on the other hand map weak and weak_odr linkage
to the same thing.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@66339 91177308-0d34-0410-b5e6-96231b3b80d8
argetLowering.cpp
|
| 16e8eda4b8b0825d38ba37d31c99edba0fb25482 |
06-Mar-2009 |
Dan Gohman <gohman@apple.com> |
Fix ScheduleDAGRRList::CopyAndMoveSuccessors' handling of nodes
with multiple chain operands. This can occur when the scheduler
has added chain operands to a node that already has a chain
operand, in order to handle physical register dependencies.
This fixes an llvm-gcc bootstrap failure on x86-64 introduced
in r66058.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@66240 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGRRList.cpp
|
| 4e1187fbc7e8f8046311487c0801a010f3c20a75 |
06-Mar-2009 |
Dan Gohman <gohman@apple.com> |
Fix ScheduleDAGRRList::CopyAndMoveSuccessors' handling of nodes
with multiple chain operands. This can occur when the scheduler
has added chain operands to a node that already has a chain
operand, in order to handle physical register dependencies.
This fixes an llvm-gcc bootstrap failure on x86-64 introduced
in r66058.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@66240 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGRRList.cpp
|
| d344b884dd6e1fde91c631f99413b9553f3c5c59 |
04-Mar-2009 |
Bob Wilson <bob.wilson@apple.com> |
Fix BuildVectorSDNode::isConstantSplat to handle one-element vectors.
It is an error to call APInt::zext with a size that is equal to the value's
current size, so use zextOrTrunc instead.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@66039 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 0e94e91f8140a123512e7a658fcd9f54c7758c48 |
04-Mar-2009 |
Bob Wilson <bob.wilson@apple.com> |
Fix BuildVectorSDNode::isConstantSplat to handle one-element vectors.
It is an error to call APInt::zext with a size that is equal to the value's
current size, so use zextOrTrunc instead.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@66039 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 27759f41ca1c930e2860275c9ba2567a5890d7d2 |
04-Mar-2009 |
Eli Friedman <eli.friedman@gmail.com> |
PR3686: make the legalizer handle bitcast from i80 to x86 long double.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@66021 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeIntegerTypes.cpp
egalizeTypes.h
|
| 360dc9c99f00f7e767fbedfe022c135ce6b117c4 |
04-Mar-2009 |
Eli Friedman <eli.friedman@gmail.com> |
PR3686: make the legalizer handle bitcast from i80 to x86 long double.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@66021 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeIntegerTypes.cpp
egalizeTypes.h
|
| 599a6a88ce1925a6349ac7af9a9638aad1d832cc |
04-Mar-2009 |
Evan Cheng <evan.cheng@apple.com> |
Fix PR3701. 1. X86 target renamed eflags register to flags. This matches what llvm-gcc generates so codegen knows flags register is being clobbered by inline asm. 2. BURR scheduler should also check if inline asm nodes can clobber "live" physical registers. Previously it was only checking target nodes with implicit defs.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@65996 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGRRList.cpp
|
| 45be09ac15f81d34999bb276a24021d8fb91bca1 |
04-Mar-2009 |
Evan Cheng <evan.cheng@apple.com> |
Fix PR3701. 1. X86 target renamed eflags register to flags. This matches what llvm-gcc generates so codegen knows flags register is being clobbered by inline asm. 2. BURR scheduler should also check if inline asm nodes can clobber "live" physical registers. Previously it was only checking target nodes with implicit defs.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@65996 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGRRList.cpp
|
| 36ae6c182759871a4af71d9af85f970b29a669f1 |
04-Mar-2009 |
Bill Wendling <isanbard@gmail.com> |
The DAG combiner was performing a BT combine. The BT combine had a value of -1,
so it changed it into a 31 via the TLO.ShrinkDemandedConstant() call. Then it
would go through the DAG combiner again. This time it had a value of 31, which
was turned into a -1 by TLI.SimplifyDemandedBits(). This would ping pong
forever.
Teach the TLO.ShrinkDemandedConstant() call not to lower a value if the demanded
value is an XOR of all ones.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@65985 91177308-0d34-0410-b5e6-96231b3b80d8
argetLowering.cpp
|
| e16c4334eec988ae3573f48fd8fe1a748316eb46 |
04-Mar-2009 |
Bill Wendling <isanbard@gmail.com> |
The DAG combiner was performing a BT combine. The BT combine had a value of -1,
so it changed it into a 31 via the TLO.ShrinkDemandedConstant() call. Then it
would go through the DAG combiner again. This time it had a value of 31, which
was turned into a -1 by TLI.SimplifyDemandedBits(). This would ping pong
forever.
Teach the TLO.ShrinkDemandedConstant() call not to lower a value if the demanded
value is an XOR of all ones.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@65985 91177308-0d34-0410-b5e6-96231b3b80d8
argetLowering.cpp
|
| 24e338e8a3dab2923db30fe63d77a5ac95456ff9 |
03-Mar-2009 |
Bob Wilson <bob.wilson@apple.com> |
Generalize BuildVectorSDNode::isConstantSplat to use APInts and handle
arbitrary vector sizes. Add an optional MinSplatBits parameter to specify
a minimum for the splat element size. Update the PPC target to use the
revised interface.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@65899 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| e653968fa9cb34ee29cee7abb82607fe28608daf |
03-Mar-2009 |
Bob Wilson <bob.wilson@apple.com> |
Generalize BuildVectorSDNode::isConstantSplat to use APInts and handle
arbitrary vector sizes. Add an optional MinSplatBits parameter to specify
a minimum for the splat element size. Update the PPC target to use the
revised interface.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@65899 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| cbd88adea66261a2f4372906fe1e08c2093d8718 |
02-Mar-2009 |
Nate Begeman <natebegeman@mac.com> |
Fix a problem with DAGCombine on 64b targets where folding
extracts + build_vector into a shuffle would fail, because the
type of the new build_vector would not be legal. Try harder to
create a legal build_vector type. Note: this will be totally
irrelevant once vector_shuffle no longer takes a build_vector for
shuffle mask.
New:
_foo:
xorps %xmm0, %xmm0
xorps %xmm1, %xmm1
subps %xmm1, %xmm1
mulps %xmm0, %xmm1
addps %xmm0, %xmm1
movaps %xmm1, 0
Old:
_foo:
xorps %xmm0, %xmm0
movss %xmm0, %xmm1
xorps %xmm2, %xmm2
unpcklps %xmm1, %xmm2
pshufd $80, %xmm1, %xmm1
unpcklps %xmm1, %xmm2
pslldq $16, %xmm2
pshufd $57, %xmm2, %xmm1
subps %xmm0, %xmm1
mulps %xmm0, %xmm1
addps %xmm0, %xmm1
movaps %xmm1, 0
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@65791 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 1e06eca05d16f2776c9da8f48e198b986b331a75 |
02-Mar-2009 |
Nate Begeman <natebegeman@mac.com> |
Fix a problem with DAGCombine on 64b targets where folding
extracts + build_vector into a shuffle would fail, because the
type of the new build_vector would not be legal. Try harder to
create a legal build_vector type. Note: this will be totally
irrelevant once vector_shuffle no longer takes a build_vector for
shuffle mask.
New:
_foo:
xorps %xmm0, %xmm0
xorps %xmm1, %xmm1
subps %xmm1, %xmm1
mulps %xmm0, %xmm1
addps %xmm0, %xmm1
movaps %xmm1, 0
Old:
_foo:
xorps %xmm0, %xmm0
movss %xmm0, %xmm1
xorps %xmm2, %xmm2
unpcklps %xmm1, %xmm2
pshufd $80, %xmm1, %xmm1
unpcklps %xmm1, %xmm2
pslldq $16, %xmm2
pshufd $57, %xmm2, %xmm1
subps %xmm0, %xmm1
mulps %xmm0, %xmm1
addps %xmm0, %xmm1
movaps %xmm1, 0
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@65791 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| a27ea9e89f38e9bcca4d67defb0bae887a16d72c |
01-Mar-2009 |
Bob Wilson <bob.wilson@apple.com> |
Combine PPC's GetConstantBuildVectorBits and isConstantSplat functions to a new
method in a BuildVectorSDNode "pseudo-class".
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@65747 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| b6fc1fb5613d4ba9b41a74e9b86b9c4d0d395bb3 |
01-Mar-2009 |
Bob Wilson <bob.wilson@apple.com> |
Combine PPC's GetConstantBuildVectorBits and isConstantSplat functions to a new
method in a BuildVectorSDNode "pseudo-class".
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@65747 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 9a58023c6ce1e77447a21d07a3de4c1ac98a3d24 |
27-Feb-2009 |
Rafael Espindola <rafael.espindola@gmail.com> |
Refactor TLS code and add some tests. The tests and expected results are:
pic | declaration | linkage | visibility |
!pic | declaration | external | default | tls1.ll tls2.ll | local exec
pic | declaration | external | default | tls1-pic.ll tls2-pic.ll | general dynamic
!pic | !declaration | external | default | tls3.ll tls4.ll | initial exec
pic | !declaration | external | default | tls3-pic.ll tls4-pic.ll | general dynamic
!pic | declaration | external | hidden | tls7.ll tls8.ll | local exec
pic | declaration | external | hidden | X | local dynamic
!pic | !declaration | external | hidden | tls9.ll tls10.ll | local exec
pic | !declaration | external | hidden | X | local dynamic
!pic | declaration | internal | default | tls5.ll tls6.ll | local exec
pic | declaration | internal | default | X | local dynamic
The ones marked with an X have not been implemented since local dynamic is not implemented.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@65632 91177308-0d34-0410-b5e6-96231b3b80d8
argetLowering.cpp
|
| 7b620afb60382e26ea0c974175b50414f19fc0ff |
27-Feb-2009 |
Rafael Espindola <rafael.espindola@gmail.com> |
Refactor TLS code and add some tests. The tests and expected results are:
pic | declaration | linkage | visibility |
!pic | declaration | external | default | tls1.ll tls2.ll | local exec
pic | declaration | external | default | tls1-pic.ll tls2-pic.ll | general dynamic
!pic | !declaration | external | default | tls3.ll tls4.ll | initial exec
pic | !declaration | external | default | tls3-pic.ll tls4-pic.ll | general dynamic
!pic | declaration | external | hidden | tls7.ll tls8.ll | local exec
pic | declaration | external | hidden | X | local dynamic
!pic | !declaration | external | hidden | tls9.ll tls10.ll | local exec
pic | !declaration | external | hidden | X | local dynamic
!pic | declaration | internal | default | tls5.ll tls6.ll | local exec
pic | declaration | internal | default | X | local dynamic
The ones marked with an X have not been implemented since local dynamic is not implemented.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@65632 91177308-0d34-0410-b5e6-96231b3b80d8
argetLowering.cpp
|
| a87008d90b7d894cfca53d407642acfd7be2af3c |
25-Feb-2009 |
Evan Cheng <evan.cheng@apple.com> |
Revert BuildVectorSDNode related patches: 65426, 65427, and 65296.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@65482 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
egalizeDAG.cpp
egalizeIntegerTypes.cpp
egalizeTypesGeneric.cpp
egalizeVectorTypes.cpp
electionDAG.cpp
electionDAGBuild.cpp
|
| 907a2d20d36fb0bee4fb5e0cd1b37d4a94d6ec06 |
25-Feb-2009 |
Evan Cheng <evan.cheng@apple.com> |
Revert BuildVectorSDNode related patches: 65426, 65427, and 65296.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@65482 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
egalizeDAG.cpp
egalizeIntegerTypes.cpp
egalizeTypesGeneric.cpp
egalizeVectorTypes.cpp
electionDAG.cpp
electionDAGBuild.cpp
|
| 8a36f509cd0fd4c503c8564000f77713e1676c56 |
25-Feb-2009 |
Dale Johannesen <dalej@apple.com> |
Fix big-endian codegen bug. We're splitting up
overly long ints, e.g. i96, into pieces at PHIs
and the nodes that feed into them; however big-endian
reverses the order of the pieces (for some reason), and
wasn't doing it the same way on both sides, so
the pieces didn't match and runtime failures ensued.
Fixes 188.ammp and sqlite3 on ppc32.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@65481 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuild.cpp
|
| 2a4f1714597272e1369a16deb6025ffed3bab7e6 |
25-Feb-2009 |
Dale Johannesen <dalej@apple.com> |
Fix big-endian codegen bug. We're splitting up
overly long ints, e.g. i96, into pieces at PHIs
and the nodes that feed into them; however big-endian
reverses the order of the pieces (for some reason), and
wasn't doing it the same way on both sides, so
the pieces didn't match and runtime failures ensued.
Fixes 188.ammp and sqlite3 on ppc32.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@65481 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuild.cpp
|
| e3d423244ae288b2c9021dbb3cd7fb973d1cfc31 |
25-Feb-2009 |
Evan Cheng <evan.cheng@apple.com> |
Clean up dwarf writer, part 1. This eliminated the horrible recursive getGlobalVariablesUsing and replaced it something readable. It eliminated use of slow UniqueVector and replaced it with StringMap, SmallVector, and DenseMap, etc. It also fixed some non-deterministic behavior.
This is a very minor compile time win.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@65438 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
egalizeDAG.cpp
electionDAGBuild.cpp
|
| 3e2889135e4b11ec59744f6aae9d8f4ed64a28bb |
25-Feb-2009 |
Evan Cheng <evan.cheng@apple.com> |
Clean up dwarf writer, part 1. This eliminated the horrible recursive getGlobalVariablesUsing and replaced it something readable. It eliminated use of slow UniqueVector and replaced it with StringMap, SmallVector, and DenseMap, etc. It also fixed some non-deterministic behavior.
This is a very minor compile time win.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@65438 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
egalizeDAG.cpp
electionDAGBuild.cpp
|
| 8f1579aedca03f089e239552ba7f1398e657c6f5 |
25-Feb-2009 |
Scott Michel <scottm@aero.org> |
Expand tabs to spaces (overlooked in previous commit)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@65427 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| aef14ab1f83f6095eb2026b5ff4c5fbc35e008dd |
25-Feb-2009 |
Scott Michel <scottm@aero.org> |
Expand tabs to spaces (overlooked in previous commit)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@65427 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| df38043a46b873acb98e7ce0c700d82c1d888772 |
25-Feb-2009 |
Scott Michel <scottm@aero.org> |
Remove all "cached" data from BuildVectorSDNode, preferring to retrieve
results via reference parameters.
This patch also appears to fix Evan's reported problem supplied as a
reduced bugpoint test case.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@65426 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 0f73ff6a4a8cc66baf9c504b8a99953f3448fb55 |
25-Feb-2009 |
Scott Michel <scottm@aero.org> |
Remove all "cached" data from BuildVectorSDNode, preferring to retrieve
results via reference parameters.
This patch also appears to fix Evan's reported problem supplied as a
reduced bugpoint test case.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@65426 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 57f0db833dc30404f1f5d28b23df326e520698ec |
24-Feb-2009 |
Bill Wendling <isanbard@gmail.com> |
Overhaul my earlier submission due to feedback. It's a large patch, but most of
them are generic changes.
- Use the "fast" flag that's already being passed into the asm printers instead
of shoving it into the DwarfWriter.
- Instead of calling "MI->getParent()->getParent()" for every MI, set the
machine function when calling "runOnMachineFunction" in the asm printers.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@65379 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
electionDAGBuild.cpp
|
| 4f40531823c2b995149ff3a1b721171ad6942363 |
24-Feb-2009 |
Bill Wendling <isanbard@gmail.com> |
Overhaul my earlier submission due to feedback. It's a large patch, but most of
them are generic changes.
- Use the "fast" flag that's already being passed into the asm printers instead
of shoving it into the DwarfWriter.
- Instead of calling "MI->getParent()->getParent()" for every MI, set the
machine function when calling "runOnMachineFunction" in the asm printers.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@65379 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
electionDAGBuild.cpp
|
| 5aa4977fba97e816b5735f0bc53f16a46b24de63 |
24-Feb-2009 |
Bill Wendling <isanbard@gmail.com> |
- Use the "Fast" flag instead of "OptimizeForSize" to determine whether to emit
a DBG_LABEL or not. We want to fall back to the original way of emitting debug
info when we're in -O0/-fast mode.
- Add plumbing in to pass the "Fast" flag to places that need it.
- XFAIL DebugInfo/deaddebuglabel.ll. This is finding 11 labels instead of 8. I
need to investigate still.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@65367 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
egalizeDAG.cpp
electionDAGBuild.cpp
electionDAGISel.cpp
|
| 123374a4e21a05824aaf8535c5a59987818a18e5 |
24-Feb-2009 |
Bill Wendling <isanbard@gmail.com> |
- Use the "Fast" flag instead of "OptimizeForSize" to determine whether to emit
a DBG_LABEL or not. We want to fall back to the original way of emitting debug
info when we're in -O0/-fast mode.
- Add plumbing in to pass the "Fast" flag to places that need it.
- XFAIL DebugInfo/deaddebuglabel.ll. This is finding 11 labels instead of 8. I
need to investigate still.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@65367 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
egalizeDAG.cpp
electionDAGBuild.cpp
electionDAGISel.cpp
|
| 0001e56f15215ae4bc5fffb82eec5c4828b888f0 |
24-Feb-2009 |
Dan Gohman <gohman@apple.com> |
Fix a ValueTracking rule: RHS means operand 1, not 0. Add a simple
ashr instcombine to help expose this code. And apply the fix to
SelectionDAG's copy of this code too.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@65364 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 843649e3c242c13a5710e7eb4c7d8da5b3965fb9 |
24-Feb-2009 |
Dan Gohman <gohman@apple.com> |
Fix a ValueTracking rule: RHS means operand 1, not 0. Add a simple
ashr instcombine to help expose this code. And apply the fix to
SelectionDAG's copy of this code too.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@65364 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 4214a5531cdbe538a358033f1847e55c4436be1b |
23-Feb-2009 |
Scott Michel <scottm@aero.org> |
Introduce the BuildVectorSDNode class that encapsulates the ISD::BUILD_VECTOR
instruction. The class also consolidates the code for detecting constant
splats that's shared across PowerPC and the CellSPU backends (and might be
useful for other backends.) Also introduces SelectionDAG::getBUID_VECTOR() for
generating new BUILD_VECTOR nodes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@65296 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
egalizeDAG.cpp
egalizeIntegerTypes.cpp
egalizeTypesGeneric.cpp
egalizeVectorTypes.cpp
electionDAG.cpp
electionDAGBuild.cpp
|
| 78c70a063ae08cf2bae5a8316cb607ceb57defad |
23-Feb-2009 |
Scott Michel <scottm@aero.org> |
Introduce the BuildVectorSDNode class that encapsulates the ISD::BUILD_VECTOR
instruction. The class also consolidates the code for detecting constant
splats that's shared across PowerPC and the CellSPU backends (and might be
useful for other backends.) Also introduces SelectionDAG::getBUID_VECTOR() for
generating new BUILD_VECTOR nodes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@65296 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
egalizeDAG.cpp
egalizeIntegerTypes.cpp
egalizeTypesGeneric.cpp
egalizeVectorTypes.cpp
electionDAG.cpp
electionDAGBuild.cpp
|
| 278f83daebd1d2072a4ce6892fa3481db5cdefbe |
21-Feb-2009 |
Richard Pennington <rich@pennware.com> |
bug 3610: Floating point vaarg not softened.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@65239 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeFloatTypes.cpp
egalizeTypes.h
|
| 53e6b892e6db27ee44d65f1e740fe9adbcc37297 |
21-Feb-2009 |
Richard Pennington <rich@pennware.com> |
bug 3610: Floating point vaarg not softened.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@65239 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeFloatTypes.cpp
egalizeTypes.h
|
| 1ba519b7265397ab5a1f8d87ef5f573f7a2e6b83 |
21-Feb-2009 |
Dan Gohman <gohman@apple.com> |
Fix a bug that David Greene found in the DAGCombiner's logic
that checks whether it's safe to transform a store of a bitcast
value into a store of the original value.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@65201 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 4e06178d99a68d447d3a64400b5342ee54a10aa8 |
21-Feb-2009 |
Dan Gohman <gohman@apple.com> |
Fix a bug that David Greene found in the DAGCombiner's logic
that checks whether it's safe to transform a store of a bitcast
value into a store of the original value.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@65201 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 14a2e1eda01367d7f28cc39e59fb71822d32222f |
19-Feb-2009 |
Bill Wendling <isanbard@gmail.com> |
Temporarily revert r65065. It was causing test failures.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@65068 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuild.cpp
|
| a3d6d9ccd2116ba27b25feaec0a8490d798adb73 |
19-Feb-2009 |
Bill Wendling <isanbard@gmail.com> |
Temporarily revert r65065. It was causing test failures.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@65068 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuild.cpp
|
| 490359d6879a903a9d496cda317c0d21ff1deacf |
19-Feb-2009 |
Bill Wendling <isanbard@gmail.com> |
Check for -fast here too.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@65065 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuild.cpp
|
| 4f68d2f17ded55c56dece65671425e974859effb |
19-Feb-2009 |
Bill Wendling <isanbard@gmail.com> |
Check for -fast here too.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@65065 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuild.cpp
|
| dfdacee2abd53d71a5b9a9f4d38c7973cc722663 |
19-Feb-2009 |
Bill Wendling <isanbard@gmail.com> |
Generate these labels when we're in "fast" mode, not simply when we're no in
"optimize-for-size" mode.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@65064 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuild.cpp
electionDAGBuild.h
electionDAGISel.cpp
|
| 9a48eb0c5cfd820a8eb3d0edb5b989ba2d26d7b0 |
19-Feb-2009 |
Bill Wendling <isanbard@gmail.com> |
Generate these labels when we're in "fast" mode, not simply when we're no in
"optimize-for-size" mode.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@65064 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuild.cpp
electionDAGBuild.h
electionDAGISel.cpp
|
| fdc40a0a696c658d550d894ea03772e5f8af2c94 |
17-Feb-2009 |
Scott Michel <scottm@aero.org> |
Remove trailing whitespace to reduce later commit patch noise.
(Note: Eventually, commits like this will be handled via a pre-commit hook that
does this automagically, as well as expand tabs to spaces and look for 80-col
violations.)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@64827 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
egalizeDAG.cpp
egalizeIntegerTypes.cpp
egalizeVectorTypes.cpp
electionDAG.cpp
electionDAGBuild.cpp
|
| 91099d69c3f33ae818f27ae0f8f7f499b94ff95a |
17-Feb-2009 |
Scott Michel <scottm@aero.org> |
Remove trailing whitespace to reduce later commit patch noise.
(Note: Eventually, commits like this will be handled via a pre-commit hook that
does this automagically, as well as expand tabs to spaces and look for 80-col
violations.)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@64827 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
egalizeDAG.cpp
egalizeIntegerTypes.cpp
egalizeVectorTypes.cpp
electionDAG.cpp
electionDAGBuild.cpp
|
| 86e6cb924b85e7a288a4d8bfde5d1a8fb9810c88 |
17-Feb-2009 |
Bill Wendling <isanbard@gmail.com> |
--- Merging (from foreign repository) r64714 into '.':
U include/llvm/CodeGen/DebugLoc.h
U lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
U lib/CodeGen/SelectionDAG/SelectionDAGBuild.cpp
U lib/Target/X86/AsmPrinter/X86ATTAsmPrinter.cpp
Enable debug location generation at -Os. This goes with the reapplication of the
r63639 patch.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@64715 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
electionDAGBuild.cpp
|
| e3f43e53315441b0598d3ba528dd6ea62e1fa60a |
17-Feb-2009 |
Bill Wendling <isanbard@gmail.com> |
--- Merging (from foreign repository) r64714 into '.':
U include/llvm/CodeGen/DebugLoc.h
U lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
U lib/CodeGen/SelectionDAG/SelectionDAGBuild.cpp
U lib/Target/X86/AsmPrinter/X86ATTAsmPrinter.cpp
Enable debug location generation at -Os. This goes with the reapplication of the
r63639 patch.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@64715 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
electionDAGBuild.cpp
|
| 97d116346cdf47ce0c8536a69ff6c606309cb4c0 |
16-Feb-2009 |
Dan Gohman <gohman@apple.com> |
Don't assume that a left-shift of a value with one bit set will have
one bit set, because the bit may be shifted off the end. Instead,
just check for a constant 1 being shifted. This is still sufficient
to handle all the cases in test/CodeGen/X86/bt.ll. This fixes PR3583.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@64622 91177308-0d34-0410-b5e6-96231b3b80d8
argetLowering.cpp
|
| faab1fb9432740e076dff915265c30dacdc4c3f2 |
16-Feb-2009 |
Dan Gohman <gohman@apple.com> |
Don't assume that a left-shift of a value with one bit set will have
one bit set, because the bit may be shifted off the end. Instead,
just check for a constant 1 being shifted. This is still sufficient
to handle all the cases in test/CodeGen/X86/bt.ll. This fixes PR3583.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@64622 91177308-0d34-0410-b5e6-96231b3b80d8
argetLowering.cpp
|
| aff9c270de8de7d1a0bc138d391bc67136bad58e |
14-Feb-2009 |
Cedric Venet <cedric.venet@laposte.net> |
Unbreak the build on win32.
Cleanup some warning.
Remark: when struct/class are declared differently than they are defined, this make problem for VC++ since it seems to mangle class differently that struct. These error are very hard to understand and find. So please, try to keep your definition/declaration in sync.
Only tested with VS2008. hope it does not break anything. feel free to revert.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@64554 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuild.cpp
|
| ee2a3eb01b2d0f66b49bfb7d705ef36751bfc5ff |
14-Feb-2009 |
Cédric Venet <cedric.venet@laposte.net> |
Unbreak the build on win32.
Cleanup some warning.
Remark: when struct/class are declared differently than they are defined, this make problem for VC++ since it seems to mangle class differently that struct. These error are very hard to understand and find. So please, try to keep your definition/declaration in sync.
Only tested with VS2008. hope it does not break anything. feel free to revert.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@64554 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuild.cpp
|
| 92c1e126473dfa93eeb4c9a124af4fedb40f0d5b |
13-Feb-2009 |
Bill Wendling <isanbard@gmail.com> |
Revert this. It was breaking stuff.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@64428 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
egalizeDAG.cpp
electionDAGBuild.cpp
|
| b094016854943591284b7230d466cecc9bcce9ef |
13-Feb-2009 |
Bill Wendling <isanbard@gmail.com> |
Revert this. It was breaking stuff.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@64428 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
egalizeDAG.cpp
electionDAGBuild.cpp
|
| 54fc7d67146b2b95ae2d1c93ed59008d4338d8c8 |
13-Feb-2009 |
Bill Wendling <isanbard@gmail.com> |
Turn off the old way of handling debug information in the code generator. Use
the new way, where all of the information is passed on SDNodes and machine
instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@64427 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
egalizeDAG.cpp
electionDAGBuild.cpp
|
| 2ca91b1efb155855e8a02b7db90301c90394128b |
13-Feb-2009 |
Bill Wendling <isanbard@gmail.com> |
Turn off the old way of handling debug information in the code generator. Use
the new way, where all of the information is passed on SDNodes and machine
instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@64427 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
egalizeDAG.cpp
electionDAGBuild.cpp
|
| 78e3e521cd90e5f6382c14b6e4d809fb59610ed6 |
12-Feb-2009 |
Dale Johannesen <dalej@apple.com> |
Arrange to print constants that match "n" and "i" constraints
in inline asm as signed (what gcc does). Add partial support
for x86-specific "e" and "Z" constraints, with appropriate
signedness for printing.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@64400 91177308-0d34-0410-b5e6-96231b3b80d8
argetLowering.cpp
|
| f190a030835622ec1d15e32f30939f9495827e39 |
12-Feb-2009 |
Dale Johannesen <dalej@apple.com> |
Arrange to print constants that match "n" and "i" constraints
in inline asm as signed (what gcc does). Add partial support
for x86-specific "e" and "Z" constraints, with appropriate
signedness for printing.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@64400 91177308-0d34-0410-b5e6-96231b3b80d8
argetLowering.cpp
|
| 14c4c1ec0eca7f2f91957571288b4d918ed8c394 |
12-Feb-2009 |
Chris Lattner <sabre@nondot.org> |
make fast isel fall back to selectiondags for VLA llvm.declare intrinsics.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@64379 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
|
| d369addb615472147c45d6fe30509e7da9fc7246 |
12-Feb-2009 |
Chris Lattner <sabre@nondot.org> |
make fast isel fall back to selectiondags for VLA llvm.declare intrinsics.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@64379 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
|
| f2b14715d11e52adbb17a5860d1ce42f82f85a0c |
12-Feb-2009 |
Evan Cheng <evan.cheng@apple.com> |
Oops. Last second clean up messed things up.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@64373 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGRRList.cpp
|
| f11f9578e0e34d42ba884472968c5a649b9e3918 |
12-Feb-2009 |
Evan Cheng <evan.cheng@apple.com> |
Oops. Last second clean up messed things up.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@64373 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGRRList.cpp
|
| 8182347d70413174f2e80ea429801e887aee5cc3 |
12-Feb-2009 |
Evan Cheng <evan.cheng@apple.com> |
Replace one of burr scheduling heuristic with something more sensible. Now calcMaxScratches simply compute the number of true data dependencies. This actually improve a couple of tests in dejagnu suite as many tests in llvm nightly test suite.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@64369 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGRRList.cpp
|
| 1c71ffb3d277087f53e44cc81e270b9d85a36557 |
12-Feb-2009 |
Evan Cheng <evan.cheng@apple.com> |
Replace one of burr scheduling heuristic with something more sensible. Now calcMaxScratches simply compute the number of true data dependencies. This actually improve a couple of tests in dejagnu suite as many tests in llvm nightly test suite.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@64369 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGRRList.cpp
|
| c7fa16f782b0ef1d51bff0f88bffbbe37d03adf5 |
11-Feb-2009 |
Dan Gohman <gohman@apple.com> |
Fix a comment.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@64328 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGRRList.cpp
|
| b3eeffe7ee7dc62c5d9fed323567b797184addb0 |
11-Feb-2009 |
Dan Gohman <gohman@apple.com> |
Fix a comment.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@64328 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGRRList.cpp
|
| c8db34cb07fea88c4b8f3e0f095fd8aed568b28e |
11-Feb-2009 |
Dan Gohman <gohman@apple.com> |
Don't use special heuristics for nodes with no data predecessors
unless they actually have data successors, and likewise for nodes
with no data successors unless they actually have data precessors.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@64327 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGRRList.cpp
|
| 58e1af36a2e7e0e6ab0edc6a21f8105983ffd969 |
11-Feb-2009 |
Dan Gohman <gohman@apple.com> |
Don't use special heuristics for nodes with no data predecessors
unless they actually have data successors, and likewise for nodes
with no data successors unless they actually have data precessors.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@64327 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGRRList.cpp
|
| cc994ea36bd6f501334d8be4219fc23caff025d9 |
11-Feb-2009 |
Dan Gohman <gohman@apple.com> |
Delete the heuristic for non-livein CopyFromReg nodes. Non-liveinness
is determined by whether the node has a Flag operand. However, if the
node does have a Flag operand, it will be glued to its register's
def, so the heuristic would end up spuriously applying to whatever
node is the def.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@64319 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGRRList.cpp
|
| 3ea665c6357708b34e5fcacf7b882de1bd51a3c6 |
11-Feb-2009 |
Dan Gohman <gohman@apple.com> |
Delete the heuristic for non-livein CopyFromReg nodes. Non-liveinness
is determined by whether the node has a Flag operand. However, if the
node does have a Flag operand, it will be glued to its register's
def, so the heuristic would end up spuriously applying to whatever
node is the def.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@64319 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGRRList.cpp
|
| 85b0edec4672f6ac6c15f757b119d04232a61861 |
11-Feb-2009 |
Dale Johannesen <dalej@apple.com> |
Make a transformation added in 63266 a bit less aggressive.
It was transforming (x&y)==y to (x&y)!=0 in the case where
y is variable and known to have at most one bit set (e.g. z&1).
This is not correct; the expressions are not equivalent when y==0.
I believe this patch salvages what can be salvaged, including
all the cases in bt.ll. Dan, please review.
Fixes gcc.c-torture/execute/20040709-[12].c
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@64314 91177308-0d34-0410-b5e6-96231b3b80d8
argetLowering.cpp
|
| 0ca3f130fadb912319a80c849ffa0eae16f0ecb4 |
11-Feb-2009 |
Dale Johannesen <dalej@apple.com> |
Make a transformation added in 63266 a bit less aggressive.
It was transforming (x&y)==y to (x&y)!=0 in the case where
y is variable and known to have at most one bit set (e.g. z&1).
This is not correct; the expressions are not equivalent when y==0.
I believe this patch salvages what can be salvaged, including
all the cases in bt.ll. Dan, please review.
Fixes gcc.c-torture/execute/20040709-[12].c
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@64314 91177308-0d34-0410-b5e6-96231b3b80d8
argetLowering.cpp
|
| 47ac0f0c7c39289f5970688154e385be22b7f293 |
11-Feb-2009 |
Dan Gohman <gohman@apple.com> |
When scheduling a block in parts, keep track of the overall
instruction index across each part. Instruction indices are used
to make live range queries, and live ranges can extend beyond
scheduling region boundaries.
Refactor the ScheduleDAGSDNodes class some more so that it
doesn't have to worry about this additional information.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@64288 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGFast.cpp
cheduleDAGList.cpp
cheduleDAGRRList.cpp
cheduleDAGSDNodes.cpp
cheduleDAGSDNodes.h
cheduleDAGSDNodesEmit.cpp
electionDAGISel.cpp
|
| 7c968a8b1f4168e54fda5f3c418be83d86dcc68f |
11-Feb-2009 |
Dan Gohman <gohman@apple.com> |
When scheduling a block in parts, keep track of the overall
instruction index across each part. Instruction indices are used
to make live range queries, and live ranges can extend beyond
scheduling region boundaries.
Refactor the ScheduleDAGSDNodes class some more so that it
doesn't have to worry about this additional information.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@64288 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGFast.cpp
cheduleDAGList.cpp
cheduleDAGRRList.cpp
cheduleDAGSDNodes.cpp
cheduleDAGSDNodes.h
cheduleDAGSDNodesEmit.cpp
electionDAGISel.cpp
|
| 9e64bbb322417c09f27afdf08e3946287c9df5aa |
11-Feb-2009 |
Dan Gohman <gohman@apple.com> |
Factor out more code for computing register live-range informationfor
scheduling, and generalize is so that preserves state across
scheduling regions. This fixes incorrect live-range information around
terminators and labels, which are effective region boundaries.
In place of looking for terminators to anchor inter-block dependencies,
introduce special entry and exit scheduling units for this purpose.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@64254 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGFast.cpp
cheduleDAGList.cpp
cheduleDAGRRList.cpp
|
| a91eb05e88bd1afe30ac1e0ecb0eb718648e28bf |
11-Feb-2009 |
Dan Gohman <gohman@apple.com> |
Factor out more code for computing register live-range informationfor
scheduling, and generalize is so that preserves state across
scheduling regions. This fixes incorrect live-range information around
terminators and labels, which are effective region boundaries.
In place of looking for terminators to anchor inter-block dependencies,
introduce special entry and exit scheduling units for this purpose.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@64254 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGFast.cpp
cheduleDAGList.cpp
cheduleDAGRRList.cpp
|
| f0e366a929a1acb4bc14df5ef831cce74607a967 |
10-Feb-2009 |
Evan Cheng <evan.cheng@apple.com> |
Fix PR3457: Ignore control successors when looking for closest scheduled successor. A control successor doesn't read result(s) produced by the scheduling unit being evaluated.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@64210 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGRRList.cpp
|
| 4b38e9aa014d2d3fdb682b7f23b8a702fcbdd068 |
10-Feb-2009 |
Evan Cheng <evan.cheng@apple.com> |
Fix PR3457: Ignore control successors when looking for closest scheduled successor. A control successor doesn't read result(s) produced by the scheduling unit being evaluated.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@64210 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGRRList.cpp
|
| 4ded02f8bd31bad439f78c6d485babe932a18fc5 |
09-Feb-2009 |
Evan Cheng <evan.cheng@apple.com> |
If the target cannot issue a copy for the given source and dest registers, abort instead of silently continue.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@64184 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGSDNodesEmit.cpp
|
| 4b5c3f7da51afc15962dd4ff4dc819edf7dbcde7 |
09-Feb-2009 |
Evan Cheng <evan.cheng@apple.com> |
If the target cannot issue a copy for the given source and dest registers, abort instead of silently continue.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@64184 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGSDNodesEmit.cpp
|
| 65b52dffe02d6ffce8d63b4fe2d7714d69968476 |
09-Feb-2009 |
Evan Cheng <evan.cheng@apple.com> |
Simplify code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@64164 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuild.cpp
|
| c2541dd7d7246af95c0c6207e8769e47f4669623 |
09-Feb-2009 |
Evan Cheng <evan.cheng@apple.com> |
Simplify code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@64164 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuild.cpp
|
| b1032a8a2f322e031f7c0947c3fb60fe9e8a10e6 |
09-Feb-2009 |
Evan Cheng <evan.cheng@apple.com> |
Make sure constant subscript is truncated to ptr size if it may not fit.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@64163 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuild.cpp
|
| 5c23d3c2cf096d7f4d50e44baf9423261d3646bd |
09-Feb-2009 |
Evan Cheng <evan.cheng@apple.com> |
Make sure constant subscript is truncated to ptr size if it may not fit.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@64163 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuild.cpp
|
| 6f38cb61a94b3abab70f0ee463bdcf55d86d334e |
07-Feb-2009 |
Dale Johannesen <dalej@apple.com> |
Use getDebugLoc forwarder instead of getNode()->getDebugLoc.
No functional change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@64026 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
egalizeTypes.cpp
egalizeVectorTypes.cpp
electionDAG.cpp
electionDAGISel.cpp
argetLowering.cpp
|
| 2dbdb0ea777a13c6fa8e9fe708e728a84752c20a |
07-Feb-2009 |
Dale Johannesen <dalej@apple.com> |
Use getDebugLoc forwarder instead of getNode()->getDebugLoc.
No functional change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@64026 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
egalizeTypes.cpp
egalizeVectorTypes.cpp
electionDAG.cpp
electionDAGISel.cpp
argetLowering.cpp
|
| 1fdbc1dd4e9cb42c79a30e8dc308c322e923cc52 |
07-Feb-2009 |
Dan Gohman <gohman@apple.com> |
Constify TargetInstrInfo::EmitInstrWithCustomInserter, allowing
ScheduleDAG's TLI member to use const.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@64018 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 96d60921d8568680bad2788b80a163fecb1dbdbe |
07-Feb-2009 |
Dan Gohman <gohman@apple.com> |
Constify TargetInstrInfo::EmitInstrWithCustomInserter, allowing
ScheduleDAG's TLI member to use const.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@64018 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 92570c4a1a11cbdaf5ffb13547428dbee1103875 |
07-Feb-2009 |
Dale Johannesen <dalej@apple.com> |
Make SDNode constructors take a DebugLoc always.
Adjust derived classes to pass UnknownLoc where
a DebugLoc does not make sense. Pick one of
DebugLoc and non-DebugLoc variants to survive
for all such classes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@64000 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| f89c5ca0230558def61ded2a11d38c1539eeba2d |
07-Feb-2009 |
Dale Johannesen <dalej@apple.com> |
Make SDNode constructors take a DebugLoc always.
Adjust derived classes to pass UnknownLoc where
a DebugLoc does not make sense. Pick one of
DebugLoc and non-DebugLoc variants to survive
for all such classes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@64000 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| edb62c484e00daab09db92a2e512bb50752d9e50 |
07-Feb-2009 |
Dale Johannesen <dalej@apple.com> |
Remove now-unused constructors.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63995 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| be31a6ae340687d341333eec18c2c5cc8c15ebf7 |
07-Feb-2009 |
Dale Johannesen <dalej@apple.com> |
Remove now-unused constructors.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63995 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| b300d2aa3ef08b5074449e2c05804717f488f4e4 |
07-Feb-2009 |
Dale Johannesen <dalej@apple.com> |
Get rid of the last non-DebugLoc versions of getNode!
Many targets build placeholder nodes for special operands, e.g.
GlobalBaseReg on X86 and PPC for the PIC base. There's no
sensible way to associate debug info with these. I've left
them built with getNode calls with explicit DebugLoc::getUnknownLoc operands.
I'm not too happy about this but don't see a good improvement;
I considered adding a getPseudoOperand or something, but it
seems to me that'll just make it harder to read.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63992 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
egalizeFloatTypes.cpp
egalizeIntegerTypes.cpp
electionDAG.cpp
argetLowering.cpp
|
| 24dd9a56e50b4c931ae96a93e67c4ed85e65d989 |
07-Feb-2009 |
Dale Johannesen <dalej@apple.com> |
Get rid of the last non-DebugLoc versions of getNode!
Many targets build placeholder nodes for special operands, e.g.
GlobalBaseReg on X86 and PPC for the PIC base. There's no
sensible way to associate debug info with these. I've left
them built with getNode calls with explicit DebugLoc::getUnknownLoc operands.
I'm not too happy about this but don't see a good improvement;
I considered adding a getPseudoOperand or something, but it
seems to me that'll just make it harder to read.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63992 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
egalizeFloatTypes.cpp
egalizeIntegerTypes.cpp
electionDAG.cpp
argetLowering.cpp
|
| e8d7230f480654cdb8ff1c3d0a38e1e9ab0bd55f |
07-Feb-2009 |
Dale Johannesen <dalej@apple.com> |
Remove more non-DebugLoc getNode variants. Use
getCALLSEQ_{END,START} to permit passing no DebugLoc
there. UNDEF doesn't logically have DebugLoc; add
getUNDEF to encapsulate this.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63978 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
egalizeDAG.cpp
egalizeIntegerTypes.cpp
egalizeTypesGeneric.cpp
egalizeVectorTypes.cpp
electionDAG.cpp
electionDAGBuild.cpp
argetLowering.cpp
|
| 9bfc017ed383685dbc2f7db5b7f79763057effea |
07-Feb-2009 |
Dale Johannesen <dalej@apple.com> |
Remove more non-DebugLoc getNode variants. Use
getCALLSEQ_{END,START} to permit passing no DebugLoc
there. UNDEF doesn't logically have DebugLoc; add
getUNDEF to encapsulate this.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63978 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
egalizeDAG.cpp
egalizeIntegerTypes.cpp
egalizeTypesGeneric.cpp
egalizeVectorTypes.cpp
electionDAG.cpp
electionDAGBuild.cpp
argetLowering.cpp
|
| e72c5964d5263f2489bf2c7e9d32f71271d205fc |
06-Feb-2009 |
Dale Johannesen <dalej@apple.com> |
And one more file.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63971 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 18ae8afcca76dffc019ee213c8d84b30f97c3c54 |
06-Feb-2009 |
Dale Johannesen <dalej@apple.com> |
And one more file.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63971 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| de06470330260f5937e7ca558f5f5b3e171f2ee5 |
06-Feb-2009 |
Dale Johannesen <dalej@apple.com> |
Remove more non-DebugLoc versions of getNode.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63969 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
egalizeIntegerTypes.cpp
egalizeTypesGeneric.cpp
electionDAG.cpp
argetLowering.cpp
|
| 175fdefc4fe809d3d58c98a8172e63696e0e79e0 |
06-Feb-2009 |
Dale Johannesen <dalej@apple.com> |
Remove more non-DebugLoc versions of getNode.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63969 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
egalizeIntegerTypes.cpp
egalizeTypesGeneric.cpp
electionDAG.cpp
argetLowering.cpp
|
| 8fcf170a66de974989f730d1e0d01d5fc63d6b8b |
06-Feb-2009 |
Bill Wendling <isanbard@gmail.com> |
Clear out the CurDebugLoc info when doing a 'clear' on the SDL object.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63967 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuild.cpp
|
| a1f8ff40a4e457df77517503aabdc694419dc511 |
06-Feb-2009 |
Bill Wendling <isanbard@gmail.com> |
Clear out the CurDebugLoc info when doing a 'clear' on the SDL object.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63967 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuild.cpp
|
| f5f5dce897269885754fc79adeb809194da52942 |
06-Feb-2009 |
Dale Johannesen <dalej@apple.com> |
Eliminate remaining non-DebugLoc version of getTargetNode.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63951 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 5d398a378ab7be40fc3ea01e846f33b3dc83e265 |
06-Feb-2009 |
Dale Johannesen <dalej@apple.com> |
Eliminate remaining non-DebugLoc version of getTargetNode.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63951 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 0a3776dc6f702d4e3f4a189df7f43d8f99957773 |
06-Feb-2009 |
Dan Gohman <gohman@apple.com> |
Rename SelectionDAGISel::Schedule to
SelectionDAGISel::CreateScheduler, and make it just create the
scheduler. Leave running the scheduler to the higher-level code.
This makes the higher-level code a little more explicit and
easier to follow, and will help enable some future refactoring.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63944 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 29800e286ab59a83bb621de09a94344e04e6f2a9 |
06-Feb-2009 |
Dan Gohman <gohman@apple.com> |
Rename SelectionDAGISel::Schedule to
SelectionDAGISel::CreateScheduler, and make it just create the
scheduler. Leave running the scheduler to the higher-level code.
This makes the higher-level code a little more explicit and
easier to follow, and will help enable some future refactoring.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63944 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 56774d2b0d865b597f47235ad708e772636e6834 |
06-Feb-2009 |
Dan Gohman <gohman@apple.com> |
Delete an unused member function.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63941 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGSDNodes.h
|
| 2d7ded0b58014b081bc1e3cdc1bdbad2479d8915 |
06-Feb-2009 |
Dan Gohman <gohman@apple.com> |
Delete an unused member function.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63941 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGSDNodes.h
|
| 770bcc7b15adbc978800db70dbb1c3c22913b52c |
06-Feb-2009 |
Evan Cheng <evan.cheng@apple.com> |
Move getPointerRegClass from TargetInstrInfo to TargetRegisterInfo.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63938 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGSDNodesEmit.cpp
|
| afca4630b4689e3fd3997682add43f86a6e67a5c |
06-Feb-2009 |
Evan Cheng <evan.cheng@apple.com> |
Move getPointerRegClass from TargetInstrInfo to TargetRegisterInfo.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63938 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGSDNodesEmit.cpp
|
| 84fbac580941548a6ab1121ed3b0ffdc4e2bc080 |
06-Feb-2009 |
Dan Gohman <gohman@apple.com> |
Move ScheduleDAGSDNodes.h to be a private header. Front-ends
that previously included this header should include
SchedulerRegistry.h instead.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63937 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGFast.cpp
cheduleDAGList.cpp
cheduleDAGRRList.cpp
cheduleDAGSDNodes.cpp
cheduleDAGSDNodes.h
cheduleDAGSDNodesEmit.cpp
electionDAGISel.cpp
electionDAGPrinter.cpp
|
| 8afcc1df3a862d9e7b1d55e3040ddd16e9e2f7cb |
06-Feb-2009 |
Dan Gohman <gohman@apple.com> |
Move ScheduleDAGSDNodes.h to be a private header. Front-ends
that previously included this header should include
SchedulerRegistry.h instead.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63937 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGFast.cpp
cheduleDAGList.cpp
cheduleDAGRRList.cpp
cheduleDAGSDNodes.cpp
cheduleDAGSDNodes.h
cheduleDAGSDNodesEmit.cpp
electionDAGISel.cpp
electionDAGPrinter.cpp
|
| f90b2a7742ddeddc448586cc050818a664419e74 |
06-Feb-2009 |
Dale Johannesen <dalej@apple.com> |
get rid of some non-DebugLoc getTargetNode variants.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63909 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| b556ed0ac5ed6d7514adaaeafaefec51840d6458 |
06-Feb-2009 |
Dale Johannesen <dalej@apple.com> |
get rid of some non-DebugLoc getTargetNode variants.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63909 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| ed2eee63a6858312ed17582d8cb85a6856d8eb34 |
06-Feb-2009 |
Dale Johannesen <dalej@apple.com> |
Get rid of one more non-DebugLoc getNode and
its corresponding getTargetNode. Lots of
caller changes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63904 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 913ba76a560da1419879168a4a61e0739d636b18 |
06-Feb-2009 |
Dale Johannesen <dalej@apple.com> |
Get rid of one more non-DebugLoc getNode and
its corresponding getTargetNode. Lots of
caller changes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63904 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 3484c09e0da3c05c8a78946e090c7610208d937b |
05-Feb-2009 |
Dale Johannesen <dalej@apple.com> |
Remove a non-DebugLoc version of getNode.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63889 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 8a423f7fcba0ff1bbb0748a9f3b62c8074f5097f |
05-Feb-2009 |
Dale Johannesen <dalej@apple.com> |
Remove a non-DebugLoc version of getNode.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63889 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 9b36c631ebb9c68678b7ec5b9407a9b4d127e0f7 |
05-Feb-2009 |
Dale Johannesen <dalej@apple.com> |
Remove 3 non-DebugLoc variants of getNode.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63886 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| b57c48758fb557d6e6fb526bcc4ddbf8751384e3 |
05-Feb-2009 |
Dale Johannesen <dalej@apple.com> |
Remove 3 non-DebugLoc variants of getNode.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63886 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| b0e341bca13cc4c729ba577cfcc6257bb1da0b33 |
05-Feb-2009 |
Mon P Wang <wangmp@apple.com> |
Fix a bug where we were not emitting a cvt rnd sat node for converting
between a unsigned integer and signed integer.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63831 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 8a443d7da86c8e21dca4f102ba513714d2211cb3 |
05-Feb-2009 |
Mon P Wang <wangmp@apple.com> |
Fix a bug where we were not emitting a cvt rnd sat node for converting
between a unsigned integer and signed integer.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63831 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 49de98214b82fefeb8f16efbf8cdd8813a85469b |
05-Feb-2009 |
Dale Johannesen <dalej@apple.com> |
Reapply 63765. Patches for clang and llvm-gcc to follow.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63812 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuild.cpp
|
| fe5921a58b697ce8d9c423aaba11dc15bca9b8b1 |
05-Feb-2009 |
Dale Johannesen <dalej@apple.com> |
Reapply 63765. Patches for clang and llvm-gcc to follow.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63812 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuild.cpp
|
| 2fabcb27761e0f07368f065fda0144d824e1e51c |
05-Feb-2009 |
Dale Johannesen <dalej@apple.com> |
Get rid of 3 non-DebugLoc getNode variants.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63808 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| c0b654dd9ae78311a0c89dee815eb7be66416fd2 |
05-Feb-2009 |
Dale Johannesen <dalej@apple.com> |
Get rid of 3 non-DebugLoc getNode variants.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63808 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 4be0bdf7c1162824927dd3de89e016ae4934d0d6 |
05-Feb-2009 |
Dale Johannesen <dalej@apple.com> |
Remove non-DebugLoc versions of getMergeValues, ZeroExtendInReg.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63800 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeIntegerTypes.cpp
egalizeTypes.h
electionDAG.cpp
electionDAGBuild.cpp
|
| 2bfdee3625932d6590f6e45f4aba79faeb29988e |
05-Feb-2009 |
Dale Johannesen <dalej@apple.com> |
Remove non-DebugLoc versions of getMergeValues, ZeroExtendInReg.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63800 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeIntegerTypes.cpp
egalizeTypes.h
electionDAG.cpp
electionDAGBuild.cpp
|
| a05dca4f9e051fad19fe9b5f6cce2715c1e5d505 |
05-Feb-2009 |
Dale Johannesen <dalej@apple.com> |
Remove non-DebugLoc forms of CopyToReg and CopyFromReg.
Adjust callers.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63789 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| b03cc3f88f4585859ea7031f5c5bbecb64202f96 |
05-Feb-2009 |
Dale Johannesen <dalej@apple.com> |
Remove non-DebugLoc forms of CopyToReg and CopyFromReg.
Adjust callers.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63789 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 4d452de1506344bf1d28bb4a8c4ddb78c51a28c8 |
04-Feb-2009 |
Dale Johannesen <dalej@apple.com> |
Reverting 63765. This broke the build of both clang
and llvm-gcc.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63786 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuild.cpp
|
| 04c5fb64efecd366ef202f682d1d73ee215f0893 |
04-Feb-2009 |
Dale Johannesen <dalej@apple.com> |
Reverting 63765. This broke the build of both clang
and llvm-gcc.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63786 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuild.cpp
|
| 4caa0427bfae369854ecdfe60b94238e566a5475 |
04-Feb-2009 |
Stuart Hastings <stuart@apple.com> |
80 column rule.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63768 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 620a4d1aabde8cd05a56257b2f77618b11497345 |
04-Feb-2009 |
Stuart Hastings <stuart@apple.com> |
80 column rule.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63768 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 33c960f523f2308482d5b2816af46a7ec90a6d3d |
04-Feb-2009 |
Dale Johannesen <dalej@apple.com> |
Remove non-DebugLoc versions of getLoad and getStore.
Adjust the many callers of those versions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63767 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
electionDAG.cpp
|
| ea99692c6c7dac4b4280286323c548c778de9993 |
04-Feb-2009 |
Dale Johannesen <dalej@apple.com> |
Remove non-DebugLoc versions of getLoad and getStore.
Adjust the many callers of those versions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63767 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
electionDAG.cpp
|
| d24479730a8790d82c4859dc477bc2416d7a6bda |
04-Feb-2009 |
Nate Begeman <natebegeman@mac.com> |
New feature: add support for target intrinsics being defined in the
target directories themselves. This also means that VMCore no longer
needs to know about every target's list of intrinsics. Future work
will include converting the PowerPC target to this interface as an
example implementation.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63765 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuild.cpp
|
| 08e1f78b7874bf9fdff5fa6ce9d9ec61d61cb796 |
04-Feb-2009 |
Nate Begeman <natebegeman@mac.com> |
New feature: add support for target intrinsics being defined in the
target directories themselves. This also means that VMCore no longer
needs to know about every target's list of intrinsics. Future work
will include converting the PowerPC target to this interface as an
example implementation.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63765 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuild.cpp
|
| e5ab34e05d701da042619bf540046efc3c7bc41f |
04-Feb-2009 |
Mon P Wang <wangmp@apple.com> |
Avoids generating a legalization assert for the case where a vector type is legal
but when legalizing the operation, we split the vector type and generate a library
call whose type needs to be promoted. For example, X86 with SSE on but MMX off,
a divide v2i64 will be scalarized to 2 calls to a library using i64.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63760 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 7cba39473f88d1552f9bae5b27ad08014e610020 |
04-Feb-2009 |
Mon P Wang <wangmp@apple.com> |
Avoids generating a legalization assert for the case where a vector type is legal
but when legalizing the operation, we split the vector type and generate a library
call whose type needs to be promoted. For example, X86 with SSE on but MMX off,
a divide v2i64 will be scalarized to 2 calls to a library using i64.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63760 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 80d6977e90c22313d5a62ac28811e0386a806aff |
04-Feb-2009 |
Stuart Hastings <stuart@apple.com> |
Since I'm obliged to work with a development OS that currently doesn't
support GraphViz, I've been using the foo->dump() facility. This
patch is a minor rewrite to the SelectionDAG dump() stuff to make it a
little more helpful. The existing foo->dump() functionality does not
change; this patch adds foo->dumpr(). All of this is only useful when
running LLVM under a debugger.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63736 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| c625028753a5e4e500b164d91950a3641880074a |
04-Feb-2009 |
Stuart Hastings <stuart@apple.com> |
Since I'm obliged to work with a development OS that currently doesn't
support GraphViz, I've been using the foo->dump() facility. This
patch is a minor rewrite to the SelectionDAG dump() stuff to make it a
little more helpful. The existing foo->dump() functionality does not
change; this patch adds foo->dumpr(). All of this is only useful when
running LLVM under a debugger.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63736 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 39355f9fea790c5a1b12ef0fdcfeac3f533232ea |
04-Feb-2009 |
Dale Johannesen <dalej@apple.com> |
Remove non-DebugLoc forms of the exotic forms
of Lod and Sto; patch uses.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63716 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
electionDAG.cpp
|
| 3c4fb2211e7d04bd7abc2bc9dd5385928305841e |
04-Feb-2009 |
Dale Johannesen <dalej@apple.com> |
Remove non-DebugLoc forms of the exotic forms
of Lod and Sto; patch uses.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63716 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
electionDAG.cpp
|
| f5d9789a7fddc9173cee104c8f25a7564bad3f28 |
04-Feb-2009 |
Dale Johannesen <dalej@apple.com> |
Remove some more non-DebugLoc versions of construction
functions, with callers adjusted to fit.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63705 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
electionDAGBuild.cpp
|
| 85fc093918bb2bcb76d5ff8ef53d5f36f5515286 |
04-Feb-2009 |
Dale Johannesen <dalej@apple.com> |
Remove some more non-DebugLoc versions of construction
functions, with callers adjusted to fit.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63705 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
electionDAGBuild.cpp
|
| f8d3ec2c5725a2010f11de4ba78f6127712a5fe7 |
04-Feb-2009 |
Dale Johannesen <dalej@apple.com> |
Check in file I forgot.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63704 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeIntegerTypes.cpp
|
| 9f6079fd9db5614db7c3fdfd2d2142192eba7c66 |
04-Feb-2009 |
Dale Johannesen <dalej@apple.com> |
Check in file I forgot.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63704 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeIntegerTypes.cpp
|
| 8ad9b43e690e8773cf836b30e8da26bc71e18844 |
04-Feb-2009 |
Dale Johannesen <dalej@apple.com> |
Remove a few non-DebugLoc versions of node creation
functions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63703 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
electionDAGBuild.cpp
|
| e234ef920183f88af1fc0b57a4d5e83f8e5f7990 |
04-Feb-2009 |
Dale Johannesen <dalej@apple.com> |
Remove a few non-DebugLoc versions of node creation
functions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63703 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
electionDAGBuild.cpp
|
| c460ae90019ddb19d4c07b2cd2fbaecfa7adf67d |
04-Feb-2009 |
Dale Johannesen <dalej@apple.com> |
Fill in more omissions in DebugLog propagation.
I think that's it for this directory.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63690 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
egalizeIntegerTypes.cpp
egalizeTypesGeneric.cpp
egalizeVectorTypes.cpp
electionDAGISel.cpp
|
| 564036cdd7ebd2084d554536ac8fd5cdf6f32013 |
04-Feb-2009 |
Dale Johannesen <dalej@apple.com> |
Fill in more omissions in DebugLog propagation.
I think that's it for this directory.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63690 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
egalizeIntegerTypes.cpp
egalizeTypesGeneric.cpp
egalizeVectorTypes.cpp
electionDAGISel.cpp
|
| a04b75710910278334192b389c4c4c62600e162f |
04-Feb-2009 |
Dale Johannesen <dalej@apple.com> |
DebugLoc propagation; adjustment to things omitted
from SelectionDagBuild.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63680 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
electionDAGBuild.cpp
|
| 7140aaa0c46838fe2192026009fbb396bd020338 |
04-Feb-2009 |
Dale Johannesen <dalej@apple.com> |
DebugLoc propagation; adjustment to things omitted
from SelectionDagBuild.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63680 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
electionDAGBuild.cpp
|
| 0f502f6f44f2756f5cb7b17d8f1d8eae000d51b4 |
03-Feb-2009 |
Dale Johannesen <dalej@apple.com> |
Add some DL propagation to places that didn't
have it yet. More coming.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63673 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 7f2abf4d0113aca037317ea1d1674ee00f3b1f84 |
03-Feb-2009 |
Dale Johannesen <dalej@apple.com> |
Add some DL propagation to places that didn't
have it yet. More coming.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63673 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| b51d40cf40eac676dda3ae9dfeb55822fa403394 |
03-Feb-2009 |
Devang Patel <dpatel@apple.com> |
First initialize DAG otherwise dwarf writer is used uninitialized.
Duncan spotted this. Thanks!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63641 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
electionDAGISel.cpp
|
| eb4e0bd2d76bccc2c06b88fd21206917713c36bf |
03-Feb-2009 |
Devang Patel <dpatel@apple.com> |
First initialize DAG otherwise dwarf writer is used uninitialized.
Duncan spotted this. Thanks!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63641 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
electionDAGISel.cpp
|
| 95c5f05641e0afdfcbeb430090e1cd0356dddfbc |
03-Feb-2009 |
Duncan Sands <baldrick@free.fr> |
Fix PR3411. When replacing values, nodes are analyzed
in any old order. Since analyzing a node analyzes its
operands also, this can mean that when we pop a node
off the list of nodes to be analyzed, it may already
have been analyzed.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63632 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeTypes.cpp
|
| b3de15d2f4924e5e0f1f0eada3064dcb057bb14a |
03-Feb-2009 |
Duncan Sands <baldrick@free.fr> |
Fix PR3411. When replacing values, nodes are analyzed
in any old order. Since analyzing a node analyzes its
operands also, this can mean that when we pop a node
off the list of nodes to be analyzed, it may already
have been analyzed.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63632 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeTypes.cpp
|
| 6a8a0d74cb73956a9452943d4d4102ebede1f69e |
03-Feb-2009 |
Bill Wendling <isanbard@gmail.com> |
Pass in something sensible for the debug location information when creating the
initial PHI nodes of the machine function.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63598 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuild.cpp
electionDAGBuild.h
electionDAGISel.cpp
|
| 9391e1fb893c9a79957f6e95c5d2cfd3c2d73c00 |
03-Feb-2009 |
Bill Wendling <isanbard@gmail.com> |
Pass in something sensible for the debug location information when creating the
initial PHI nodes of the machine function.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63598 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuild.cpp
electionDAGBuild.h
electionDAGISel.cpp
|
| dbfd8dbdee81d016557dc77d34090492eda55562 |
03-Feb-2009 |
Dale Johannesen <dalej@apple.com> |
Fill in some missing DL propagation in getNode()s.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63595 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| f2103eedc60790603693c35704e38135c904a8df |
03-Feb-2009 |
Dale Johannesen <dalej@apple.com> |
Fill in some missing DL propagation in getNode()s.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63595 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| b288487a8e2291dd802e19b1a9bc930368f448bf |
03-Feb-2009 |
Bill Wendling <isanbard@gmail.com> |
Use SDL->getCurDebugLoc() instead of unknown loc for landing pads.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63594 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| eb4536c3d693518b2400060fced51676b6a0d360 |
03-Feb-2009 |
Bill Wendling <isanbard@gmail.com> |
Use SDL->getCurDebugLoc() instead of unknown loc for landing pads.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63594 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| ec37e98b3d943328795a06a3184a125583dec151 |
03-Feb-2009 |
Bill Wendling <isanbard@gmail.com> |
Explicitly pass in the "unknown" debug location. This is probably not
correct. We need more infrastructure before we can get the DebugLoc info for
these instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63593 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuild.cpp
electionDAGISel.cpp
|
| 2dae940597f756f61ea953326646bc6a0c694b95 |
03-Feb-2009 |
Bill Wendling <isanbard@gmail.com> |
Explicitly pass in the "unknown" debug location. This is probably not
correct. We need more infrastructure before we can get the DebugLoc info for
these instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63593 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuild.cpp
electionDAGISel.cpp
|
| 0eb96fd94bce94df680f1fc436c1d3d1c510f937 |
03-Feb-2009 |
Bill Wendling <isanbard@gmail.com> |
Alphabetize includes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63591 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuild.h
|
| 50293da508e4d9fe430290c630855174c4224245 |
03-Feb-2009 |
Bill Wendling <isanbard@gmail.com> |
Alphabetize includes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63591 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuild.h
|
| f2ad58d930aa18c8710cbd094eaf987eca0f2c1b |
03-Feb-2009 |
Bill Wendling <isanbard@gmail.com> |
Propagate debug loc info during SDNode -> machine instr creation.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63585 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGSDNodesEmit.cpp
|
| 1cb1c838c8a183fb57fd2396f8000a6b9644bb0b |
03-Feb-2009 |
Bill Wendling <isanbard@gmail.com> |
Propagate debug loc info during SDNode -> machine instr creation.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63585 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGSDNodesEmit.cpp
|
| 9bc96a57206cbebaa9b0ba9979f949eb10c1592c |
03-Feb-2009 |
Bill Wendling <isanbard@gmail.com> |
Create DebugLoc information in FastISel. Several temporary methods were
created. Specifically, those BuildMIs which use
"DebugLoc::getUnknownLoc()". I'll remove them soon.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63584 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
electionDAGBuild.cpp
|
| 5aa0ddb0f8b15d4d0f3e6385908593e977360812 |
03-Feb-2009 |
Bill Wendling <isanbard@gmail.com> |
Create DebugLoc information in FastISel. Several temporary methods were
created. Specifically, those BuildMIs which use
"DebugLoc::getUnknownLoc()". I'll remove them soon.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63584 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
electionDAGBuild.cpp
|
| ff97d4fe81ef0dcee9fe490bed8ab08e40251905 |
03-Feb-2009 |
Dale Johannesen <dalej@apple.com> |
Propagation in TargetLowering. Includes passing a DL
into SimplifySetCC which gets called elsewhere.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63583 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
egalizeDAG.cpp
egalizeIntegerTypes.cpp
electionDAG.cpp
argetLowering.cpp
|
| 38496ebf6f1efb9d29960d40cb9ee9877472cfb5 |
03-Feb-2009 |
Dale Johannesen <dalej@apple.com> |
Propagation in TargetLowering. Includes passing a DL
into SimplifySetCC which gets called elsewhere.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63583 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
egalizeDAG.cpp
egalizeIntegerTypes.cpp
electionDAG.cpp
argetLowering.cpp
|
| a7ce741ff0ab02510833854bfa6a1c8c265faee3 |
03-Feb-2009 |
Dan Gohman <gohman@apple.com> |
Use the SubclassData field to hold ExtType, isTrunc, and MemIndexedMode
information. This eliminates the need for the Flags field in MemSDNode,
so this makes LoadSDNode and StoreSDNode smaller. Also, it makes
FoldingSetNodeIDs for loads and stores two AddIntegers smaller.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63577 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 9d0f5020ac67131972cb9229f0749df139b7d254 |
03-Feb-2009 |
Dan Gohman <gohman@apple.com> |
Use the SubclassData field to hold ExtType, isTrunc, and MemIndexedMode
information. This eliminates the need for the Flags field in MemSDNode,
so this makes LoadSDNode and StoreSDNode smaller. Also, it makes
FoldingSetNodeIDs for loads and stores two AddIntegers smaller.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63577 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| ca57b84729303d6f0c5abf951563efcde97010cd |
03-Feb-2009 |
Dale Johannesen <dalej@apple.com> |
Last DebugLoc propagation for this file.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63574 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| bbf56a2eecbb8b46421be084874ed2935b2960d6 |
03-Feb-2009 |
Dale Johannesen <dalej@apple.com> |
Last DebugLoc propagation for this file.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63574 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| c6be110f9127982760f09f17b4910c51962d8d67 |
02-Feb-2009 |
Dale Johannesen <dalej@apple.com> |
More DebugLoc propagation. This should be everything
except LegalizeOp itself.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63560 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| d8fd5342565f882e8cf423253b1eb236e874289b |
02-Feb-2009 |
Dale Johannesen <dalej@apple.com> |
More DebugLoc propagation. This should be everything
except LegalizeOp itself.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63560 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 8a782a2a8c2f0c82f292d03a3f707232b0bae27b |
02-Feb-2009 |
Dale Johannesen <dalej@apple.com> |
DebugLoc propagation. ExpandOp and PromoteOp,
among others.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63555 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 82b5b72ad782a1d5054583206d2e2584c1f1694e |
02-Feb-2009 |
Dale Johannesen <dalej@apple.com> |
DebugLoc propagation. ExpandOp and PromoteOp,
among others.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63555 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 54c94525f420cab274af60e98a77f081f96e59c2 |
02-Feb-2009 |
Dale Johannesen <dalej@apple.com> |
Commit missing files.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63545 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| f3b911359a674bb471a39c8ea96887e02138f9fa |
02-Feb-2009 |
Dale Johannesen <dalej@apple.com> |
Commit missing files.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63545 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| bb5da918545efb54857a09c983a5a7f22a7e04d4 |
02-Feb-2009 |
Dale Johannesen <dalej@apple.com> |
More DebugLoc propagation.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63543 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 352c47e94c41411529e4f96cfbf559c0bfcf8513 |
02-Feb-2009 |
Dale Johannesen <dalej@apple.com> |
More DebugLoc propagation.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63543 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 7fb085871857134f8cbeb17499d4ab771ba8da42 |
02-Feb-2009 |
Duncan Sands <baldrick@free.fr> |
Remove trailing spaces.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63540 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeFloatTypes.cpp
egalizeIntegerTypes.cpp
egalizeTypesGeneric.cpp
|
| 5f9fbe3b2dde9942e1d6d80fbf7f9da14ac131fc |
02-Feb-2009 |
Duncan Sands <baldrick@free.fr> |
Remove trailing spaces.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63540 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeFloatTypes.cpp
egalizeIntegerTypes.cpp
egalizeTypesGeneric.cpp
|
| af435274e56af687b51f33b5bc6f005fe99ad46f |
02-Feb-2009 |
Dale Johannesen <dalej@apple.com> |
DebugLoc propagation for int<->fp conversions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63537 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 9972b639ede7c1b0fc564e99383249971b41ded2 |
02-Feb-2009 |
Dale Johannesen <dalej@apple.com> |
DebugLoc propagation for int<->fp conversions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63537 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 55467af31620c9d027e071ebcd9746b7593cff17 |
02-Feb-2009 |
Sanjiv Gupta <sanjiv.gupta@microchip.com> |
Duncan's patch. Further to 64382. Takes care of illegal types for shift amount.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63523 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeIntegerTypes.cpp
egalizeTypes.h
|
| 90e6ba2124fa09fbdcdfdfb34053a2042879ce2e |
02-Feb-2009 |
Sanjiv Gupta <sanjiv.gupta@microchip.com> |
Duncan's patch. Further to 64382. Takes care of illegal types for shift amount.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63523 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeIntegerTypes.cpp
egalizeTypes.h
|
| c82bf9b268eb63f7cf6f435d9ea222ddb8e3c5a8 |
02-Feb-2009 |
Mon P Wang <wangmp@apple.com> |
Preserve more SourceValue information.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63498 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeIntegerTypes.cpp
egalizeVectorTypes.cpp
|
| bfdf00409b65f485463733a373aeb92603b41c7a |
02-Feb-2009 |
Mon P Wang <wangmp@apple.com> |
Preserve more SourceValue information.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63498 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeIntegerTypes.cpp
egalizeVectorTypes.cpp
|
| b0d5cdd52e8448f769cd71aaee6a4b8592dc08b1 |
01-Feb-2009 |
Duncan Sands <baldrick@free.fr> |
Fix PR3453 and probably a bunch of other potential
crashes or wrong code with codegen of large integers:
eliminate the legacy getIntegerVTBitMask and
getIntegerVTSignBit methods, which returned their
value as a uint64_t, so couldn't handle huge types.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63494 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
egalizeDAG.cpp
electionDAG.cpp
|
| 505ba94e7557c4396dcbcd3ca8ec3d37fc280958 |
01-Feb-2009 |
Duncan Sands <baldrick@free.fr> |
Fix PR3453 and probably a bunch of other potential
crashes or wrong code with codegen of large integers:
eliminate the legacy getIntegerVTBitMask and
getIntegerVTSignBit methods, which returned their
value as a uint64_t, so couldn't handle huge types.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63494 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
egalizeDAG.cpp
electionDAG.cpp
|
| fc4b677cd526f1f6a3d6487782557af99fbf6c32 |
01-Feb-2009 |
Bill Wendling <isanbard@gmail.com> |
Forgot some more DebugLoc propagations.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63493 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 55b2b9d20c04019c67efeb9fcc7045b11f8e23b3 |
01-Feb-2009 |
Bill Wendling <isanbard@gmail.com> |
Forgot some more DebugLoc propagations.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63493 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 644f6f875ee6dae47a56692f36ae566c27008e07 |
31-Jan-2009 |
Dale Johannesen <dalej@apple.com> |
DebugLoc propagation.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63488 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeTypes.h
egalizeVectorTypes.cpp
|
| 701fa3918740cbb9d9c72bee19645d91feec672d |
31-Jan-2009 |
Dale Johannesen <dalej@apple.com> |
DebugLoc propagation.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63488 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeTypes.h
egalizeVectorTypes.cpp
|
| 35ba3d463834f83e2bf8e8ad631ffc4d73a0203c |
31-Jan-2009 |
Dale Johannesen <dalej@apple.com> |
DebugLoc propagation. Done with file.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63486 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeTypesGeneric.cpp
|
| a2f51e597fd5fc0e53a9e25c6fd6ac6f0f199e5e |
31-Jan-2009 |
Dale Johannesen <dalej@apple.com> |
DebugLoc propagation. Done with file.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63486 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeTypesGeneric.cpp
|
| 9c8ac447c464eedefa6acd8d71a3aff8280bb9d1 |
31-Jan-2009 |
Dale Johannesen <dalej@apple.com> |
DebugLoc propagation. Done with file.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63485 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeTypes.cpp
|
| 2784232ef760a13015a35533153d19493d002629 |
31-Jan-2009 |
Dale Johannesen <dalej@apple.com> |
DebugLoc propagation. Done with file.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63485 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeTypes.cpp
|
| 92abc62399881ba9c525be80362c134ad836e2d9 |
31-Jan-2009 |
Duncan Sands <baldrick@free.fr> |
Fix PR3401: when using large integers, the type
returned by getShiftAmountTy may be too small
to hold shift values (it is an i8 on x86-32).
Before and during type legalization, use a large
but legal type for shift amounts: getPointerTy;
afterwards use getShiftAmountTy, fixing up any
shift amounts with a big type during operation
legalization. Thanks to Dan for writing the
original patch (which I shamelessly pillaged).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63482 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
egalizeDAG.cpp
egalizeIntegerTypes.cpp
egalizeTypes.cpp
egalizeVectorTypes.cpp
electionDAG.cpp
electionDAGBuild.cpp
argetLowering.cpp
|
| 7d9e36100672b722b01c73fbb98ce2b6579dda3f |
31-Jan-2009 |
Duncan Sands <baldrick@free.fr> |
Fix PR3401: when using large integers, the type
returned by getShiftAmountTy may be too small
to hold shift values (it is an i8 on x86-32).
Before and during type legalization, use a large
but legal type for shift amounts: getPointerTy;
afterwards use getShiftAmountTy, fixing up any
shift amounts with a big type during operation
legalization. Thanks to Dan for writing the
original patch (which I shamelessly pillaged).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63482 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
egalizeDAG.cpp
egalizeIntegerTypes.cpp
egalizeTypes.cpp
egalizeVectorTypes.cpp
electionDAG.cpp
electionDAGBuild.cpp
argetLowering.cpp
|
| a7b6cff99f5015120f828c316823cb32eed93901 |
31-Jan-2009 |
Mon P Wang <wangmp@apple.com> |
If unsafe FP optimization is not set, don't allow -(A-B) => B-A because
when A==B, -0.0 != +0.0.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63474 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 4340d5da667ec32596dab97b636dce35ff58b175 |
31-Jan-2009 |
Mon P Wang <wangmp@apple.com> |
If unsafe FP optimization is not set, don't allow -(A-B) => B-A because
when A==B, -0.0 != +0.0.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63474 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 9729c5ad3413d3b69d4bc41aa918a7a8dd6bf9f0 |
31-Jan-2009 |
Bill Wendling <isanbard@gmail.com> |
Don't use DebugLoc::getUnknownLoc(). Default to something hopefully sensible.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63473 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| bd0cd9f1f5a1732a1fa8b839a9687d250c445787 |
31-Jan-2009 |
Bill Wendling <isanbard@gmail.com> |
Don't use DebugLoc::getUnknownLoc(). Default to something hopefully sensible.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63473 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 66978ee97773aa76c3f15bee2fc77e5905aaf068 |
31-Jan-2009 |
Dale Johannesen <dalej@apple.com> |
Move CurDebugLoc into SelectionDAGLowering.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63468 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuild.cpp
electionDAGBuild.h
|
| 3222146f4603812cbb91f376017e2c67ed77df34 |
31-Jan-2009 |
Dale Johannesen <dalej@apple.com> |
Move CurDebugLoc into SelectionDAGLowering.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63468 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuild.cpp
electionDAGBuild.h
|
| 91b49b910c088b332869ccfb3e35735be2000b57 |
31-Jan-2009 |
Dale Johannesen <dalej@apple.com> |
Propagate debug info in LegalizeFloatTypes.
Complete (modulo bugs).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63458 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeFloatTypes.cpp
egalizeTypes.h
|
| 1bea540b3dd3d0719cbbfeaabdfa871504de4c37 |
31-Jan-2009 |
Dale Johannesen <dalej@apple.com> |
Propagate debug info in LegalizeFloatTypes.
Complete (modulo bugs).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63458 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeFloatTypes.cpp
egalizeTypes.h
|
| 786fd4dded6a42561c0d82bbd9d13b9a4d8d9675 |
31-Jan-2009 |
Dale Johannesen <dalej@apple.com> |
Propagate debug info. This file complete
(modulo bugs)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63457 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeIntegerTypes.cpp
|
| e6c2a8329d13cf67e91852d40f848fbb21edb401 |
31-Jan-2009 |
Dale Johannesen <dalej@apple.com> |
Propagate debug info. This file complete
(modulo bugs)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63457 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeIntegerTypes.cpp
|
| c8fc99d66a03dc603f49d653937ad1d94e833006 |
31-Jan-2009 |
Dale Johannesen <dalej@apple.com> |
Propagate debug info through MakeLibCall and a
couple of things that use it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63456 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeFloatTypes.cpp
egalizeIntegerTypes.cpp
egalizeTypes.cpp
egalizeTypes.h
|
| f52bf3eb8a0f4f8787b2c80083e3b74a31764f61 |
31-Jan-2009 |
Dale Johannesen <dalej@apple.com> |
Propagate debug info through MakeLibCall and a
couple of things that use it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63456 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeFloatTypes.cpp
egalizeIntegerTypes.cpp
egalizeTypes.cpp
egalizeTypes.h
|
| 836ca7dc6e0dbffa83095ccf110ccd9f2bcfdb05 |
31-Jan-2009 |
Bill Wendling <isanbard@gmail.com> |
More DebugLoc propagation.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63454 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| e64b4632096bf3bd21413f0cd9131903146b2069 |
31-Jan-2009 |
Bill Wendling <isanbard@gmail.com> |
More DebugLoc propagation.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63454 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| c144a57e14faf52fd2223548922dc4174827df03 |
31-Jan-2009 |
Bill Wendling <isanbard@gmail.com> |
More DebugLoc propagation.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63452 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 3b1141d3f00eabc3c618d004f4af7fac4082154e |
31-Jan-2009 |
Bill Wendling <isanbard@gmail.com> |
More DebugLoc propagation.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63452 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| c0debad7168e252c34631a04f62577d792c71e07 |
31-Jan-2009 |
Bill Wendling <isanbard@gmail.com> |
More DebugLoc propagation in LOAD etc. methods.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63451 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 0be345950ad41f6035478b2a00910f26256a22ce |
31-Jan-2009 |
Bill Wendling <isanbard@gmail.com> |
More DebugLoc propagation in LOAD etc. methods.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63451 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 0225a1dcb1b1324192bf34c532c6d18503017cd4 |
31-Jan-2009 |
Bill Wendling <isanbard@gmail.com> |
More DebugLoc propagation in floating-point methods.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63446 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| fe063884f1789373b8779ebeeb7fcb7dff4f7f6c |
31-Jan-2009 |
Bill Wendling <isanbard@gmail.com> |
More DebugLoc propagation in floating-point methods.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63446 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 7d2ad624fa749a6d3edac0d94e9c107989c16304 |
31-Jan-2009 |
Dale Johannesen <dalej@apple.com> |
Make LowerCallTo and LowerArguments take a DebugLoc
argument. Adjust all callers and overloaded versions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63444 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
egalizeTypes.cpp
electionDAG.cpp
electionDAGBuild.cpp
|
| ca6237b16a68ff5256d47b79908cc3a3a4b61889 |
31-Jan-2009 |
Dale Johannesen <dalej@apple.com> |
Make LowerCallTo and LowerArguments take a DebugLoc
argument. Adjust all callers and overloaded versions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63444 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
egalizeTypes.cpp
electionDAG.cpp
electionDAGBuild.cpp
|
| d34470c4f76483f0f1098527d416cd065d46d950 |
31-Jan-2009 |
Bill Wendling <isanbard@gmail.com> |
Standardize comments about folding xforms.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63443 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 9cf9d38c8dbf76354faf51668911eb007fd3b03d |
31-Jan-2009 |
Bill Wendling <isanbard@gmail.com> |
Standardize comments about folding xforms.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63443 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 7581bfa2757a3149c6d17c0fe592e5c3808aa843 |
31-Jan-2009 |
Bill Wendling <isanbard@gmail.com> |
Get rid of the non-DebugLoc-ified getNOT() method.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63442 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
egalizeDAG.cpp
electionDAG.cpp
argetLowering.cpp
|
| fcfb47d11cb9071e35ce52a8fee893676f364221 |
31-Jan-2009 |
Bill Wendling <isanbard@gmail.com> |
Get rid of the non-DebugLoc-ified getNOT() method.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63442 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
egalizeDAG.cpp
electionDAG.cpp
argetLowering.cpp
|
| a03e74bf6795478fd0b8d8d09b86ab517cda84b5 |
30-Jan-2009 |
Bill Wendling <isanbard@gmail.com> |
Propagate debug loc info for some FP arithmetic methods.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63441 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| e2bf56b1fbf7cefd6d936a03d43dda569ddd4a5d |
30-Jan-2009 |
Bill Wendling <isanbard@gmail.com> |
Propagate debug loc info for some FP arithmetic methods.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63441 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| b0162f58c4dc07e325f47befcbb31c72d894bc1f |
30-Jan-2009 |
Bill Wendling <isanbard@gmail.com> |
Propagate debug loc info for some FP arithmetic methods.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63440 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 323674b28e207a1496c3405a915248746f700cb5 |
30-Jan-2009 |
Bill Wendling <isanbard@gmail.com> |
Propagate debug loc info for some FP arithmetic methods.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63440 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 67a6768375d29bfda9ebf79edd1d9089f6fea9f5 |
30-Jan-2009 |
Bill Wendling <isanbard@gmail.com> |
Propagate debug loc info for BIT_CONVERT.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63439 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 043d2c6ff8d2aba14e63a4931b096b6a5ac9fbb7 |
30-Jan-2009 |
Bill Wendling <isanbard@gmail.com> |
Propagate debug loc info for BIT_CONVERT.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63439 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 8509c90a206eb04ed11da44d357f7250db3df346 |
30-Jan-2009 |
Bill Wendling <isanbard@gmail.com> |
Propagate debug loc info for more *_EXTEND methods.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63437 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 49bff0a5626eab6c64426e0fe027f5724315920a |
30-Jan-2009 |
Bill Wendling <isanbard@gmail.com> |
Propagate debug loc info for more *_EXTEND methods.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63437 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 683c95764aa519ba21686e631fa8d2231c8dbd74 |
30-Jan-2009 |
Bill Wendling <isanbard@gmail.com> |
Propagate debug loc info for ANY_EXTEND.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63436 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| fb6f17d342bbe402fa745762f2f51fdb41dfb8e6 |
30-Jan-2009 |
Bill Wendling <isanbard@gmail.com> |
Propagate debug loc info for ANY_EXTEND.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63436 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 6ce610f04bb232ce8b57e50e885f30f65d19e1a6 |
30-Jan-2009 |
Bill Wendling <isanbard@gmail.com> |
Propagate debug loc info for some of the *_EXTEND functions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63434 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
electionDAG.cpp
|
| 085b207e3dd5ceb2810bb4a07d718a1cb7bac39c |
30-Jan-2009 |
Bill Wendling <isanbard@gmail.com> |
Propagate debug loc info for some of the *_EXTEND functions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63434 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
electionDAG.cpp
|
| 41b9d278add97c744930aa2a0048ff1c01e48c4f |
30-Jan-2009 |
Bill Wendling <isanbard@gmail.com> |
DebugLoc form of getNOT().
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63433 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 4b8dd44da84e0c9d7a130073c73fbefb5d3b0a10 |
30-Jan-2009 |
Bill Wendling <isanbard@gmail.com> |
DebugLoc form of getNOT().
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63433 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 34584e6aedf02a4123ac7605486093e798cdcb71 |
30-Jan-2009 |
Bill Wendling <isanbard@gmail.com> |
- Propagate debug loc info for SELECT.
- Added xform for (select X, 1, Y) and (select X, Y, 0), which was commented on,
but missing.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63428 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| d079e9fed642e22829d31f449ccf849f3d6a1530 |
30-Jan-2009 |
Bill Wendling <isanbard@gmail.com> |
- Propagate debug loc info for SELECT.
- Added xform for (select X, 1, Y) and (select X, Y, 0), which was commented on,
but missing.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63428 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 8810337e36fd56dacad557b016dfaacfc732730a |
30-Jan-2009 |
Bill Wendling <isanbard@gmail.com> |
Propagate debug loc info for Shifts.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63424 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| c73b8c2ef0aa388032e855d0e28f77c36e9f3027 |
30-Jan-2009 |
Bill Wendling <isanbard@gmail.com> |
Propagate debug loc info for Shifts.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63424 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 317bd709bdd119a286e4c2e10b59202dc7e81a13 |
30-Jan-2009 |
Bill Wendling <isanbard@gmail.com> |
Propagate debug loc info for XOR and MatchRotate.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63420 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 2e1865c0e88ef208aadab3599435291d5216f399 |
30-Jan-2009 |
Bill Wendling <isanbard@gmail.com> |
Propagate debug loc info for XOR and MatchRotate.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63420 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 09025644791ca400242c51a61aa633f3ded3f3a3 |
30-Jan-2009 |
Bill Wendling <isanbard@gmail.com> |
Propagate debug loc info for OR. Also clean up some comments.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63419 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 43f24b97050e83c75b523e3d1b68b259da54b74a |
30-Jan-2009 |
Bill Wendling <isanbard@gmail.com> |
Propagate debug loc info for OR. Also clean up some comments.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63419 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 6af7618b2378a3af378d681914976483b5b60c36 |
30-Jan-2009 |
Bill Wendling <isanbard@gmail.com> |
Perform obvious constant arithmetic folding.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63417 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| f8bc78488c1884b7916cc3206e8b21a1c149d86d |
30-Jan-2009 |
Bill Wendling <isanbard@gmail.com> |
Perform obvious constant arithmetic folding.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63417 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 2627a881e1ba1c7821537d607dbd80c0ef4d2363 |
30-Jan-2009 |
Bill Wendling <isanbard@gmail.com> |
Propagate debug loc info for AND. Also clean up some comments.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63416 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| d32f852eb99e80ac707faa5d00033fdac957be81 |
30-Jan-2009 |
Bill Wendling <isanbard@gmail.com> |
Propagate debug loc info for AND. Also clean up some comments.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63416 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| b74c8675b11db86c115f698f3d182f9039131161 |
30-Jan-2009 |
Bill Wendling <isanbard@gmail.com> |
Propagate debug loc info in SimplifyBinOpWithSameOpcodeHands.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63411 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| c93d72a164a326080318e3d8f599ed84789b8252 |
30-Jan-2009 |
Bill Wendling <isanbard@gmail.com> |
Propagate debug loc info in SimplifyBinOpWithSameOpcodeHands.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63411 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 826d11463b3fb0ecadae532821e6d11170276dc1 |
30-Jan-2009 |
Bill Wendling <isanbard@gmail.com> |
Propagate debug loc info in SimplifyNodeWithTwoResults.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63376 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 24ecb1b093539263f59298177088231004d72ed9 |
30-Jan-2009 |
Bill Wendling <isanbard@gmail.com> |
Propagate debug loc info in SimplifyNodeWithTwoResults.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63376 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 326411dc69db3ff6335a2b1351e05c80d20c2b3c |
30-Jan-2009 |
Bill Wendling <isanbard@gmail.com> |
Propagate debug loc info for MULHS.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63375 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| ff9beb9c31b526acc4b9c85a37a10f3d1b778983 |
30-Jan-2009 |
Bill Wendling <isanbard@gmail.com> |
Propagate debug loc info for MULHS.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63375 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 6d3bf8c4c3a1917f255df4ff0d47f4f51261bcc0 |
30-Jan-2009 |
Bill Wendling <isanbard@gmail.com> |
Propagate debug loc info for SREM and UREM.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63374 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| ceba88e7b4087634905939b7aff0c9f872fa36d9 |
30-Jan-2009 |
Bill Wendling <isanbard@gmail.com> |
Propagate debug loc info for SREM and UREM.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63374 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 07d85140497a8fb58d9d2daa723c6c8b64948b73 |
30-Jan-2009 |
Bill Wendling <isanbard@gmail.com> |
Propagate debug loc info for UDIV.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63373 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| b3552a58e84a840575f0b60903a766b96ed629e5 |
30-Jan-2009 |
Bill Wendling <isanbard@gmail.com> |
Propagate debug loc info for UDIV.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63373 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 944d34bfe8c79ddcb96516d3ba867be09ebf2890 |
30-Jan-2009 |
Bill Wendling <isanbard@gmail.com> |
Propagate debug loc info for SDIV.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63372 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 09f5dc803d3301f8564ae44107bad7861b7070f6 |
30-Jan-2009 |
Bill Wendling <isanbard@gmail.com> |
Propagate debug loc info for SDIV.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63372 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 73e16b2869fbc75ccb3506620b0342b6085fe843 |
30-Jan-2009 |
Bill Wendling <isanbard@gmail.com> |
Forgot to propagate debug loc info here.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63371 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| c80e5c4fa6810a0ef892aec3f6a0b343a73ce5a4 |
30-Jan-2009 |
Bill Wendling <isanbard@gmail.com> |
Forgot to propagate debug loc info here.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63371 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 9c8148ac93835b7d53c81c554cde2e6da3730771 |
30-Jan-2009 |
Bill Wendling <isanbard@gmail.com> |
Propagate debug loc info for MUL.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63369 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| db4984aebf62890ea2280115f6be096403d1e738 |
30-Jan-2009 |
Bill Wendling <isanbard@gmail.com> |
Propagate debug loc info for MUL.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63369 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| b0702e0b7e4a9b0a0b4e707512d25ab5a1204408 |
30-Jan-2009 |
Bill Wendling <isanbard@gmail.com> |
Propagate debug loc info in SUB.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63368 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 697795ac6cdf2df227b894556b6c55ae3612d7c8 |
30-Jan-2009 |
Bill Wendling <isanbard@gmail.com> |
Propagate debug loc info in SUB.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63368 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 14036c00c0b3a83805695afb50b6d42430b70979 |
30-Jan-2009 |
Bill Wendling <isanbard@gmail.com> |
Propagate debug loc info in ADDC and ADDE.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63367 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 4c196babb6a261e41aba4ced7656500ef042ee21 |
30-Jan-2009 |
Bill Wendling <isanbard@gmail.com> |
Propagate debug loc info in ADDC and ADDE.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63367 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| f4eb2269eba50a68d0227edc8c4b8872428fab33 |
30-Jan-2009 |
Bill Wendling <isanbard@gmail.com> |
Propagate debug loc info in DAG combine's "ADD".
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63366 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| d850aa53fc72f0196b52cedd2af859a077701791 |
30-Jan-2009 |
Bill Wendling <isanbard@gmail.com> |
Propagate debug loc info in DAG combine's "ADD".
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63366 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| d69c3141ed6d237ad19fdfbfcef8901491b24c2e |
30-Jan-2009 |
Bill Wendling <isanbard@gmail.com> |
- Propagate debug loc info in combineSelectAndUse().
- Modify ReassociateOps so that the resulting SDValue is what the comment claims
it is.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63365 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| e165f5a20b055825a342afb14872400f0e2b621d |
30-Jan-2009 |
Bill Wendling <isanbard@gmail.com> |
- Propagate debug loc info in combineSelectAndUse().
- Modify ReassociateOps so that the resulting SDValue is what the comment claims
it is.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63365 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| fa42dea48b76b32a17f2d777115790f364f1984f |
30-Jan-2009 |
Dale Johannesen <dalej@apple.com> |
Propagate debug info when building SelectionDAG.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63359 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuild.cpp
|
| 2fa55f8cca36bfaab433e4b8493d2686629765be |
30-Jan-2009 |
Dale Johannesen <dalej@apple.com> |
Propagate debug info when building SelectionDAG.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63359 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuild.cpp
|
| 5c71acfb0600ea9272a2dcce00e1610a5b8ee081 |
30-Jan-2009 |
Bill Wendling <isanbard@gmail.com> |
Propagate debug location info for the token factor.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63355 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 131d6e9c6492a719b8cd0c6bee7f89cfe82e08a0 |
30-Jan-2009 |
Bill Wendling <isanbard@gmail.com> |
Propagate debug location info for the token factor.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63355 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 35247c35136232bb30aa17543dbcf9c92fa24d29 |
30-Jan-2009 |
Bill Wendling <isanbard@gmail.com> |
Add DebugLoc propagation to some of the methods in DAG combiner.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63350 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| abb33a2414314ec94b3c72ec2a42b71715bc43f9 |
30-Jan-2009 |
Bill Wendling <isanbard@gmail.com> |
Add DebugLoc propagation to some of the methods in DAG combiner.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63350 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 15b3830bcda4f9958abf1c65e6e1c64c5cbb484d |
29-Jan-2009 |
Dan Gohman <gohman@apple.com> |
Explicitly add PseudoSourceValue information when lowering
BUILD_VECTOR and conversions to stack operations.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63333 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 8a8251aa84e32adc485310cf3428fb2383cb9a02 |
29-Jan-2009 |
Dan Gohman <gohman@apple.com> |
Explicitly add PseudoSourceValue information when lowering
BUILD_VECTOR and conversions to stack operations.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63333 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 1cc6b8ee787c183a7c88fec8fbb96c1404cf34e8 |
29-Jan-2009 |
Dan Gohman <gohman@apple.com> |
Make a few things const, fix some comments, and simplify
some assertions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63328 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGRRList.cpp
|
| 2867582126f112605e4205622165e440eb52c05a |
29-Jan-2009 |
Dan Gohman <gohman@apple.com> |
Make a few things const, fix some comments, and simplify
some assertions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63328 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGRRList.cpp
|
| 2c65c3dfe6589a630d1bdde085aec1b9cdc43ea8 |
29-Jan-2009 |
Dan Gohman <gohman@apple.com> |
Fix two typos that Duncan spotted in a comment.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63312 91177308-0d34-0410-b5e6-96231b3b80d8
argetLowering.cpp
|
| 8710f1c88efd7461a75ed6af8a3d313bb5b83f22 |
29-Jan-2009 |
Dan Gohman <gohman@apple.com> |
Fix two typos that Duncan spotted in a comment.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63312 91177308-0d34-0410-b5e6-96231b3b80d8
argetLowering.cpp
|
| 197e88f7963946dfdb4770ed27ee246eb087ca10 |
29-Jan-2009 |
Dan Gohman <gohman@apple.com> |
In the case of an extractelement on an insertelement value,
the element indices may be equal if either one is not a
constant.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63311 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| b38eabfc63c1a3741ff0057fe48abe9ee92cd3c7 |
29-Jan-2009 |
Dan Gohman <gohman@apple.com> |
In the case of an extractelement on an insertelement value,
the element indices may be equal if either one is not a
constant.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63311 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 56ab1a281511dde8c173cd2dc8ef55a916049037 |
29-Jan-2009 |
Bill Wendling <isanbard@gmail.com> |
Revert r63273. This was already implemented by Dale. There's no need for my
change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63301 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 6ed1f08a168e25dadd8c5e37ac97c1aad9dc8721 |
29-Jan-2009 |
Bill Wendling <isanbard@gmail.com> |
Revert r63273. This was already implemented by Dale. There's no need for my
change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63301 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 6e1bb38fb8dd64ece28ea5779a8bbf9b5ff7fb96 |
29-Jan-2009 |
Bill Wendling <isanbard@gmail.com> |
- Add DebugLoc to getTargetNode().
- Modify TableGen to add the DebugLoc when calling getTargetNode.
(The light-weight wrappers are only temporary. The non-DebugLoc version will be
removed once the whole debug info stuff is finished with.)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63273 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 66968015fbe5c43c457b486bd6918f15626a5535 |
29-Jan-2009 |
Bill Wendling <isanbard@gmail.com> |
- Add DebugLoc to getTargetNode().
- Modify TableGen to add the DebugLoc when calling getTargetNode.
(The light-weight wrappers are only temporary. The non-DebugLoc version will be
removed once the whole debug info stuff is finished with.)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63273 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| e5af2d3a224d4b38760a26d237cde040cb6e14eb |
29-Jan-2009 |
Dan Gohman <gohman@apple.com> |
Make x86's BT instruction matching more thorough, and add some
dagcombines that help it match in several more cases. Add
several more cases to test/CodeGen/X86/bt.ll. This doesn't
yet include matching for BT with an immediate operand, it
just covers more register+register cases.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63266 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
argetLowering.cpp
|
| 22cefb0de0d6b2dff668fd276a4650a6ce01c797 |
29-Jan-2009 |
Dan Gohman <gohman@apple.com> |
Make x86's BT instruction matching more thorough, and add some
dagcombines that help it match in several more cases. Add
several more cases to test/CodeGen/X86/bt.ll. This doesn't
yet include matching for BT with an immediate operand, it
just covers more register+register cases.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63266 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
argetLowering.cpp
|
| e8c17335c53f0f37262ee342f46b0d00ac0c1493 |
29-Jan-2009 |
Dale Johannesen <dalej@apple.com> |
Add DebugLoc-sensitive versions of many node creation
functions. Currently omitted: memcpy, memmove, memset.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63259 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| ba9d87fffb3ac331ec143eeeb555524abb76eff1 |
29-Jan-2009 |
Dale Johannesen <dalej@apple.com> |
Add DebugLoc-sensitive versions of many node creation
functions. Currently omitted: memcpy, memmove, memset.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63259 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 7ade28cd62f5188951387e1056a46001388a21f9 |
28-Jan-2009 |
Bill Wendling <isanbard@gmail.com> |
Add DebugLoc to the getNode() methods.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63245 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| df4de11679f71f3290834f21bdfc142407093fb0 |
28-Jan-2009 |
Bill Wendling <isanbard@gmail.com> |
Add DebugLoc to the getNode() methods.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63245 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 3edb43e6208493dec85a2e87942f7a4d59073727 |
28-Jan-2009 |
Dale Johannesen <dalej@apple.com> |
Add DebugLoc-aware constructors for SDNode derived
classes (those that reasonably have a DebugLoc
associated with them).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63236 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 08f344e789728a1b7dc8bf1b608a2eca6b49b53e |
28-Jan-2009 |
Dale Johannesen <dalej@apple.com> |
Add DebugLoc-aware constructors for SDNode derived
classes (those that reasonably have a DebugLoc
associated with them).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63236 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| f7eef6811c8b701b815c64e754a174691953a35f |
28-Jan-2009 |
Mon P Wang <wangmp@apple.com> |
Fixed extract element when the result needs to be promoted and the input widened.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63217 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeIntegerTypes.cpp
|
| 6394215c89316b9ecf56761dbd67c39c8a714edf |
28-Jan-2009 |
Mon P Wang <wangmp@apple.com> |
Fixed extract element when the result needs to be promoted and the input widened.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63217 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeIntegerTypes.cpp
|
| f560ffae1f1f6591859c7b70636a3eca6c03f083 |
28-Jan-2009 |
Dan Gohman <gohman@apple.com> |
Make isOperationLegal do what its name suggests, and introduce a
new isOperationLegalOrCustom, which does what isOperationLegal
previously did.
Update a bunch of callers to use isOperationLegalOrCustom
instead of isOperationLegal. In some case it wasn't obvious
which behavior is desired; when in doubt I changed then to
isOperationLegalOrCustom as that preserves their previous
behavior.
This is for the second half of PR3376.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63212 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
egalizeDAG.cpp
egalizeIntegerTypes.cpp
electionDAGBuild.cpp
argetLowering.cpp
|
| 52c51aab80e1ab56ad29ba2c5bf5d5e74e0574a6 |
28-Jan-2009 |
Dan Gohman <gohman@apple.com> |
Make isOperationLegal do what its name suggests, and introduce a
new isOperationLegalOrCustom, which does what isOperationLegal
previously did.
Update a bunch of callers to use isOperationLegalOrCustom
instead of isOperationLegal. In some case it wasn't obvious
which behavior is desired; when in doubt I changed then to
isOperationLegalOrCustom as that preserves their previous
behavior.
This is for the second half of PR3376.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63212 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
egalizeDAG.cpp
egalizeIntegerTypes.cpp
electionDAGBuild.cpp
argetLowering.cpp
|
| 0b3aa26384ff37597f1d686a834252f97a619380 |
28-Jan-2009 |
Duncan Sands <baldrick@free.fr> |
Formatting.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63199 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuild.cpp
|
| d5443caee8088bea5ba0c874bb85d227ab4fe074 |
28-Jan-2009 |
Duncan Sands <baldrick@free.fr> |
Formatting.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63199 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuild.cpp
|
| 1465d61bdd36cfd6021036a527895f0dd358e97d |
28-Jan-2009 |
Duncan Sands <baldrick@free.fr> |
Rename getAnalysisToUpdate to getAnalysisIfAvailable.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63198 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 4e0d6a7d48464188a1a25b544a6355326d3fd3bf |
28-Jan-2009 |
Duncan Sands <baldrick@free.fr> |
Rename getAnalysisToUpdate to getAnalysisIfAvailable.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63198 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| f83c81acbe5923ab6e0572f272d203d795e28185 |
28-Jan-2009 |
Dan Gohman <gohman@apple.com> |
Use ValueType::bitsLT to simplify some code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63170 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
egalizeVectorTypes.cpp
|
| 783a32c383a47fe8e34df27f1d75b0b206e89e3c |
28-Jan-2009 |
Dan Gohman <gohman@apple.com> |
Use ValueType::bitsLT to simplify some code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63170 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
egalizeVectorTypes.cpp
|
| 77f7a5771e01ec5ec5fdbb3af8fcc2ce31e1d4f7 |
28-Jan-2009 |
Dan Gohman <gohman@apple.com> |
Use ZERO_EXTEND instead of ANY_EXTEND when promoting
shift amounts, to avoid implicitly assuming that
target architectures will ignore the high bits.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63169 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
egalizeVectorTypes.cpp
|
| 34a8b45f9767286b0158f6a62c1d43777fc84287 |
28-Jan-2009 |
Dan Gohman <gohman@apple.com> |
Use ZERO_EXTEND instead of ANY_EXTEND when promoting
shift amounts, to avoid implicitly assuming that
target architectures will ignore the high bits.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63169 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
egalizeVectorTypes.cpp
|
| ce9bc12c6f3c3544f7518c0c60203f2f9dff342f |
27-Jan-2009 |
Dan Gohman <gohman@apple.com> |
Add an assertion to the form of SelectionDAG::getConstant that takes
a uint64_t to verify that the value is in range for the given type,
to help catch accidental overflow. Fix a few places that relied on
getConstant implicitly truncating the value.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63128 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
egalizeDAG.cpp
electionDAG.cpp
|
| 51bef2e7f3b8bd4bafc8b4e4e6d42d0b2ede47ee |
27-Jan-2009 |
djg <djg@91177308-0d34-0410-b5e6-96231b3b80d8> |
Add an assertion to the form of SelectionDAG::getConstant that takes
a uint64_t to verify that the value is in range for the given type,
to help catch accidental overflow. Fix a few places that relied on
getConstant implicitly truncating the value.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63128 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
egalizeDAG.cpp
electionDAG.cpp
|
| daac99cdfb7b730d4317a0152c7ef27cc19bdab9 |
27-Jan-2009 |
Dan Gohman <gohman@apple.com> |
Delete redundant return statements.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63120 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuild.cpp
|
| 0c797921a28ee71536ba20b7685edccc7ecb75a0 |
27-Jan-2009 |
djg <djg@91177308-0d34-0410-b5e6-96231b3b80d8> |
Delete redundant return statements.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63120 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuild.cpp
|
| 5bb11b89ddbc0f47eee9743b93df5aa872750d13 |
26-Jan-2009 |
Duncan Sands <baldrick@free.fr> |
Fix PR3393, which amounts to a bug in the expensive
checking logic. Rather than make the checking more
complicated, I've tweaked some logic to make things
conform to how the checking thought things ought to
be, since this results in a simpler "mental model".
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63048 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeTypes.cpp
egalizeTypes.h
|
| bd2b182f54dacfd73bb5a67ee30d0af5c89e5d89 |
26-Jan-2009 |
Duncan Sands <baldrick@free.fr> |
Fix PR3393, which amounts to a bug in the expensive
checking logic. Rather than make the checking more
complicated, I've tweaked some logic to make things
conform to how the checking thought things ought to
be, since this results in a simpler "mental model".
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63048 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeTypes.cpp
egalizeTypes.h
|
| 36c826ad958f74e1078cbe2ecfd07ae0a7170543 |
26-Jan-2009 |
Anton Korobeynikov <asl@math.spbu.ru> |
During bittest switch lowering emit shift in the test block, which should (theoretically)
allow us to generate more efficient code. We don't do this now though :)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63027 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuild.cpp
|
| bb1518f1f7125bf4bfe2235f8700e01d11d8c0cb |
26-Jan-2009 |
asl <asl@91177308-0d34-0410-b5e6-96231b3b80d8> |
During bittest switch lowering emit shift in the test block, which should (theoretically)
allow us to generate more efficient code. We don't do this now though :)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63027 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuild.cpp
|
| e7852d014432a06c783de3c350eb96e686f10f92 |
26-Jan-2009 |
Dan Gohman <gohman@apple.com> |
Take the next steps in making SDUse more consistent with LLVM Use, and
tidy up SDUse and related code.
- Replace the operator= member functions with a set method, like
LLVM Use has, and variants setInitial and setNode, which take
care up updating use lists, like LLVM Use's does. This simplifies
code that calls these functions.
- getSDValue() is renamed to get(), as in LLVM Use, though most
places can either use the implicit conversion to SDValue or the
convenience functions instead.
- Fix some more node vs. value terminology issues.
Also, eliminate the one remaining use of SDOperandPtr, and
SDOperandPtr itself.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62995 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
egalizeTypes.cpp
electionDAG.cpp
|
| c2517d3c633e362d4fc340b29902b90544302646 |
26-Jan-2009 |
djg <djg@91177308-0d34-0410-b5e6-96231b3b80d8> |
Take the next steps in making SDUse more consistent with LLVM Use, and
tidy up SDUse and related code.
- Replace the operator= member functions with a set method, like
LLVM Use has, and variants setInitial and setNode, which take
care up updating use lists, like LLVM Use's does. This simplifies
code that calls these functions.
- getSDValue() is renamed to get(), as in LLVM Use, though most
places can either use the implicit conversion to SDValue or the
convenience functions instead.
- Fix some more node vs. value terminology issues.
Also, eliminate the one remaining use of SDOperandPtr, and
SDOperandPtr itself.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62995 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
egalizeTypes.cpp
electionDAG.cpp
|
| 399461095b033438d1f5863cd0d6f82a616f74dc |
25-Jan-2009 |
Dan Gohman <gohman@apple.com> |
Eliminate the loop that searches through each of the operands
of each use in the SelectionDAG ReplaceAllUses* functions. Thanks
to Chris for spotting this opportunity.
Also, factor out code from all 5 of the ReplaceAllUses* functions
into AddNonLeafNodeToCSEMaps, which is now renamed
AddModifiedNodeToCSEMaps to more accurately reflect its purpose.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62964 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 943376a6cd1f5a793ea99fbdebbe69112c173895 |
25-Jan-2009 |
djg <djg@91177308-0d34-0410-b5e6-96231b3b80d8> |
Eliminate the loop that searches through each of the operands
of each use in the SelectionDAG ReplaceAllUses* functions. Thanks
to Chris for spotting this opportunity.
Also, factor out code from all 5 of the ReplaceAllUses* functions
into AddNonLeafNodeToCSEMaps, which is now renamed
AddModifiedNodeToCSEMaps to more accurately reflect its purpose.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62964 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 74692c0d65d92865674ff8e0491a21b98950284a |
25-Jan-2009 |
Dan Gohman <gohman@apple.com> |
Whitespace tidiments.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62963 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 08f48f53cb06d0d011f697744efc33ebe5ba4068 |
25-Jan-2009 |
djg <djg@91177308-0d34-0410-b5e6-96231b3b80d8> |
Whitespace tidiments.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62963 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| e77f89de8cb6690ac45b87b03c588e9d287c1eeb |
25-Jan-2009 |
Dan Gohman <gohman@apple.com> |
Move the N->use_empty() assert from DeleteNode to
DeleteNodeNotInCSEMaps, since DeleteNode just calls
DeleteNodeNotInCSEMaps.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62962 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| f03abfe8766b6ef802f6a470a056d40a33a8252d |
25-Jan-2009 |
djg <djg@91177308-0d34-0410-b5e6-96231b3b80d8> |
Move the N->use_empty() assert from DeleteNode to
DeleteNodeNotInCSEMaps, since DeleteNode just calls
DeleteNodeNotInCSEMaps.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62962 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 9b9948507474acd3c5941ad7d33a37cb066803ad |
24-Jan-2009 |
Nate Begeman <natebegeman@mac.com> |
Fix an indent and a typo.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62940 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| a0d77375cb66caf9235a698526f2b2aae389f723 |
24-Jan-2009 |
sampo <sampo@91177308-0d34-0410-b5e6-96231b3b80d8> |
Fix an indent and a typo.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62940 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| a90c8e690bd9103bb4a5d943f98279a55bf42ad1 |
23-Jan-2009 |
Dan Gohman <gohman@apple.com> |
Fold x-0 to x in unsafe-fp-math mode. This comes up in the
testcase from PR3376, and in fact is sufficient to completely
avoid the problem in that testcase.
There's an underlying problem though; TLI.isOperationLegal
considers Custom to be Legal, which might be ok in some
cases, but that's what DAGCombiner is using in many places
to test if something is legal when LegalOperations is true.
When DAGCombiner is running after legalize, this isn't
sufficient. I'll address this in a separate commit.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62860 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
electionDAG.cpp
|
| 46ef3eba061054be925fd2fe3ff0e3433d6cf31a |
23-Jan-2009 |
Dan Gohman <gohman@apple.com> |
Fold x-0 to x in unsafe-fp-math mode. This comes up in the
testcase from PR3376, and in fact is sufficient to completely
avoid the problem in that testcase.
There's an underlying problem though; TLI.isOperationLegal
considers Custom to be Legal, which might be ok in some
cases, but that's what DAGCombiner is using in many places
to test if something is legal when LegalOperations is true.
When DAGCombiner is running after legalize, this isn't
sufficient. I'll address this in a separate commit.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62860 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
electionDAG.cpp
|
| 67ba22318b49200ffdedb1f50a8d89f08e6c710c |
22-Jan-2009 |
Bob Wilson <bob.wilson@apple.com> |
Fix a minor bug in DAGCombiner's folding of SELECT. Folding "select C, 0, 1"
to "C ^ 1" is only valid when C is known to be either 0 or 1. Most of the
similar foldings in this function only handle "i1" types, but this one appears
intentionally written to handle larger integer types. If C has an integer
type larger than "i1", this needs to check if the high bits of a boolean
are known to be zero. I also changed the comment to describe this folding as
"C ^ 1" instead of "~C", since that is what the code does and since the latter
would only be valid for "i1" types. The good news is that most LLVM targets
use TargetLowering::ZeroOrOneBooleanContent so this change will not disable
the optimization; the bad news is that I've been unable to come up with a
testcase to demonstrate the problem.
I have also removed a "FIXME" comment for folding "select C, X, 0" to "C & X",
since the code looks correct to me. It could be made more aggressive by not
limiting the type to "i1", but that would then require checking for
TargetLowering::ZeroOrNegativeOneBooleanContent. Similar changes could be
done for the other SELECT foldings, but it was decided to be not worth the
trouble and complexity (see e.g., r44663).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62790 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| ee1fe314072a6c1dcc71a9ed5202c5c4b5da849e |
22-Jan-2009 |
Bob Wilson <bob.wilson@apple.com> |
Fix a minor bug in DAGCombiner's folding of SELECT. Folding "select C, 0, 1"
to "C ^ 1" is only valid when C is known to be either 0 or 1. Most of the
similar foldings in this function only handle "i1" types, but this one appears
intentionally written to handle larger integer types. If C has an integer
type larger than "i1", this needs to check if the high bits of a boolean
are known to be zero. I also changed the comment to describe this folding as
"C ^ 1" instead of "~C", since that is what the code does and since the latter
would only be valid for "i1" types. The good news is that most LLVM targets
use TargetLowering::ZeroOrOneBooleanContent so this change will not disable
the optimization; the bad news is that I've been unable to come up with a
testcase to demonstrate the problem.
I have also removed a "FIXME" comment for folding "select C, X, 0" to "C & X",
since the code looks correct to me. It could be made more aggressive by not
limiting the type to "i1", but that would then require checking for
TargetLowering::ZeroOrNegativeOneBooleanContent. Similar changes could be
done for the other SELECT foldings, but it was decided to be not worth the
trouble and complexity (see e.g., r44663).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62790 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 760f86f3395750ef6d03ecfe6f82d2867fbf568b |
22-Jan-2009 |
Dan Gohman <gohman@apple.com> |
Don't create ISD::FNEG nodes after legalize if they aren't legal.
Simplify x+0 to x in unsafe-fp-math mode. This avoids a bunch of
redundant work in many cases, because in unsafe-fp-math mode,
ISD::FADD with a constant is considered free to negate, so the
DAGCombiner often negates x+0 to -0-x thinking it's free, when
in reality the end result is -x, which is more expensive than x.
Also, combine x*0 to 0.
This fixes PR3374.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62789 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
electionDAG.cpp
|
| 3d01556ac63fa62acf14d1290d6326f1d1db2ee0 |
22-Jan-2009 |
Dan Gohman <gohman@apple.com> |
Don't create ISD::FNEG nodes after legalize if they aren't legal.
Simplify x+0 to x in unsafe-fp-math mode. This avoids a bunch of
redundant work in many cases, because in unsafe-fp-math mode,
ISD::FADD with a constant is considered free to negate, so the
DAGCombiner often negates x+0 to -0-x thinking it's free, when
in reality the end result is -x, which is more expensive than x.
Also, combine x*0 to 0.
This fixes PR3374.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62789 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
electionDAG.cpp
|
| 4c2454623841f05c6c665659b34c214950d12d7e |
22-Jan-2009 |
Bob Wilson <bob.wilson@apple.com> |
Add SelectionDAG::getNOT method to construct bitwise NOT operations,
corresponding to the "not" and "vnot" PatFrags. Use the new method
in some places where it seems appropriate.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62768 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
egalizeDAG.cpp
electionDAG.cpp
argetLowering.cpp
|
| 81a42cf05bf437d155f5491b490b1204c0acccfb |
22-Jan-2009 |
Bob Wilson <bob.wilson@apple.com> |
Add SelectionDAG::getNOT method to construct bitwise NOT operations,
corresponding to the "not" and "vnot" PatFrags. Use the new method
in some places where it seems appropriate.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62768 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
egalizeDAG.cpp
electionDAG.cpp
argetLowering.cpp
|
| 536ab130ec95cbb7bf30530251dafa7dfecc8471 |
22-Jan-2009 |
Evan Cheng <evan.cheng@apple.com> |
Eliminate a couple of fields from TargetRegisterClass: SubRegClasses and SuperRegClasses. These are not necessary. Also eliminate getSubRegisterRegClass and getSuperRegisterRegClass. These are slow and their results can change if register file names change. Just use TargetLowering::getRegClassFor() to get the right TargetRegisterClass instead.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62762 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
cheduleDAGSDNodesEmit.cpp
|
| bfda7277ae672402e976e4fb6dca92232fc105a5 |
22-Jan-2009 |
Evan Cheng <evan.cheng@apple.com> |
Eliminate a couple of fields from TargetRegisterClass: SubRegClasses and SuperRegClasses. These are not necessary. Also eliminate getSubRegisterRegClass and getSuperRegisterRegClass. These are slow and their results can change if register file names change. Just use TargetLowering::getRegClassFor() to get the right TargetRegisterClass instead.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62762 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
cheduleDAGSDNodesEmit.cpp
|
| e70909b8c94b18ae5fcfe8010251d2527704d58b |
22-Jan-2009 |
Chris Lattner <sabre@nondot.org> |
fix a typo
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62761 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| c5ffda94ad4791ba4b3094f27a2224729ba20de2 |
22-Jan-2009 |
Chris Lattner <sabre@nondot.org> |
fix a typo
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62761 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 764fd0cbc8a0ee512a9352cfeb123e8778542d28 |
21-Jan-2009 |
Dan Gohman <gohman@apple.com> |
Simplify ReduceLoadWidth's logic: it doesn't need several different
special cases after producing the new reduced-width load, because the
new load already has the needed adjustments built into it. This fixes
several bugs due to the special cases, including PR3317.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62692 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 054522078694b2ff7d262d9950994618bd0f5db6 |
21-Jan-2009 |
Dan Gohman <gohman@apple.com> |
Simplify ReduceLoadWidth's logic: it doesn't need several different
special cases after producing the new reduced-width load, because the
new load already has the needed adjustments built into it. This fixes
several bugs due to the special cases, including PR3317.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62692 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 9fbc7e2e7a765298fb4326885b407e0962f7ab62 |
21-Jan-2009 |
Duncan Sands <baldrick@free.fr> |
Cleanup whitespace and comments, and tweak some
prototypes, in operand type legalization. No
functionality change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62680 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeFloatTypes.cpp
egalizeIntegerTypes.cpp
egalizeTypes.cpp
egalizeTypes.h
electionDAGBuild.cpp
|
| 1497b52861fa267815ae822ce247ca74746ef211 |
21-Jan-2009 |
Duncan Sands <baldrick@free.fr> |
Cleanup whitespace and comments, and tweak some
prototypes, in operand type legalization. No
functionality change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62680 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeFloatTypes.cpp
egalizeIntegerTypes.cpp
egalizeTypes.cpp
egalizeTypes.h
electionDAGBuild.cpp
|
| d1e8d9c0a5dc821b6b52f7872181edeeec5df7ba |
21-Jan-2009 |
Scott Michel <scottm@aero.org> |
CellSPU:
- Ensure that (operation) legalization emits proper FDIV libcall when needed.
- Fix various bugs encountered during llvm-spu-gcc build, along with various
cleanups.
- Start supporting double precision comparisons for remaining libgcc2 build.
Discovered interesting DAGCombiner feature, which is currently solved via
custom lowering (64-bit constants are not legal on CellSPU, but DAGCombiner
insists on inserting one anyway.)
- Update README.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62664 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 8c67fa4e560a7e7ad7cdde160a29b14c81be027a |
21-Jan-2009 |
Scott Michel <scottm@aero.org> |
CellSPU:
- Ensure that (operation) legalization emits proper FDIV libcall when needed.
- Fix various bugs encountered during llvm-spu-gcc build, along with various
cleanups.
- Start supporting double precision comparisons for remaining libgcc2 build.
Discovered interesting DAGCombiner feature, which is currently solved via
custom lowering (64-bit constants are not legal on CellSPU, but DAGCombiner
insists on inserting one anyway.)
- Update README.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62664 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| bb326bbe88d0b243d5d9d224308eb0c028d4d4af |
21-Jan-2009 |
Sanjiv Gupta <sanjiv.gupta@microchip.com> |
Allow targets to legalize operations (with illegal operands) that produces multiple values. For example, a load with an illegal operand (a load produces two values, a value and chain).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62663 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeFloatTypes.cpp
egalizeIntegerTypes.cpp
egalizeTypes.cpp
egalizeTypes.h
electionDAGBuild.cpp
|
| b01fb4d9793bb62e48ca0d91be0c181fd3dd69b4 |
21-Jan-2009 |
Sanjiv Gupta <sanjiv.gupta@microchip.com> |
Allow targets to legalize operations (with illegal operands) that produces multiple values. For example, a load with an illegal operand (a load produces two values, a value and chain).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62663 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeFloatTypes.cpp
egalizeIntegerTypes.cpp
egalizeTypes.cpp
egalizeTypes.h
electionDAGBuild.cpp
|
| e9a7286087a87cc1c5fe03453ca087f7b1a30271 |
20-Jan-2009 |
Bill Wendling <isanbard@gmail.com> |
Use "SINT_TO_FP" instead of "UINT_TO_FP" when getting the exponent. This was
causing the limited precision stuff to produce the wrong result for values in
the range [0, 1).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62615 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuild.cpp
|
| 8e76c3406e5f8fa7f04316386627c7660c449a3a |
20-Jan-2009 |
Bill Wendling <isanbard@gmail.com> |
Use "SINT_TO_FP" instead of "UINT_TO_FP" when getting the exponent. This was
causing the limited precision stuff to produce the wrong result for values in
the range [0, 1).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62615 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuild.cpp
|
| 04ee5a1d9267e5e6fab8f088095fcb83c3c5cbd1 |
20-Jan-2009 |
Evan Cheng <evan.cheng@apple.com> |
Change TargetInstrInfo::isMoveInstr to return source and destination sub-register indices as well.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62600 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| f97496a054876b3bb9c0acf424379eb2f48377ce |
20-Jan-2009 |
Evan Cheng <evan.cheng@apple.com> |
Change TargetInstrInfo::isMoveInstr to return source and destination sub-register indices as well.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62600 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 6c53334b905eaf91469134c8e5506c643276c607 |
20-Jan-2009 |
Bill Wendling <isanbard@gmail.com> |
Shift types need to match.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62571 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuild.cpp
|
| 583c9c4552e7b0fc01c4d39d4196275a1aedf28c |
20-Jan-2009 |
Bill Wendling <isanbard@gmail.com> |
Shift types need to match.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62571 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuild.cpp
|
| f5add58549fe8ecd9a15cbb7c230282bd693516b |
20-Jan-2009 |
Dan Gohman <gohman@apple.com> |
Fix a dagcombine to not generate loads of non-round integer types,
as its comment says, even in the case where it will be generating
extending loads. This fixes PR3216.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62557 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 50187c2d138fe3f002e0a8c8f6c7c92939684ff5 |
20-Jan-2009 |
Dan Gohman <gohman@apple.com> |
Fix a dagcombine to not generate loads of non-round integer types,
as its comment says, even in the case where it will be generating
extending loads. This fixes PR3216.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62557 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| b79b5359fbe44bc82bedff2c081ed1db787f8d49 |
20-Jan-2009 |
Devang Patel <dpatel@apple.com> |
Verify debug info.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62545 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
electionDAGBuild.cpp
|
| 208098ba9cdd450ea53c98a66e174ffaa210fd2e |
20-Jan-2009 |
Devang Patel <dpatel@apple.com> |
Verify debug info.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62545 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
electionDAGBuild.cpp
|
| c53361294957b63a9c1e405256c6f0a81db1685c |
19-Jan-2009 |
Dan Gohman <gohman@apple.com> |
Remove SDNode's virtual destructor. This makes it impossible for
SDNode subclasses to keep state that requires non-trivial
destructors, however it was already effectively impossible,
since the destructor isn't actually ever called. There currently
aren't any SDNode subclasses affected by this, and in general
it's desireable to keep SDNode objects light-weight.
This eliminates the last virtual member function in the SDNode
class, so it eliminates the need for a vtable pointer, making
SDNode smaller.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62539 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 98a355c16d7083f4da20096d0cb5a72ec93b75c0 |
19-Jan-2009 |
Dan Gohman <gohman@apple.com> |
Remove SDNode's virtual destructor. This makes it impossible for
SDNode subclasses to keep state that requires non-trivial
destructors, however it was already effectively impossible,
since the destructor isn't actually ever called. There currently
aren't any SDNode subclasses affected by this, and in general
it's desireable to keep SDNode objects light-weight.
This eliminates the last virtual member function in the SDNode
class, so it eliminates the need for a vtable pointer, making
SDNode smaller.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62539 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| dbe664adcddd8610952968d86791478c874cf1cd |
19-Jan-2009 |
Dan Gohman <gohman@apple.com> |
Fix SelectionDAG::ReplaceAllUsesWith to behave correctly when
uses are added to the From node while it is processing From's
use list, because of automatic local CSE. The fix is to avoid
visiting any new uses.
Fix a few places in the DAGCombiner that assumed that after
a RAUW call, the From node has no users and may be deleted.
This fixes PR3018.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62533 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
electionDAG.cpp
|
| 86bf13990559866858a9f806c2ab20dd14851bc0 |
19-Jan-2009 |
Dan Gohman <gohman@apple.com> |
Fix SelectionDAG::ReplaceAllUsesWith to behave correctly when
uses are added to the From node while it is processing From's
use list, because of automatic local CSE. The fix is to avoid
visiting any new uses.
Fix a few places in the DAGCombiner that assumed that after
a RAUW call, the From node has no users and may be deleted.
This fixes PR3018.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62533 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
electionDAG.cpp
|
| 15c94d08ab2be2e3d00de4edbfc7adde6545a7db |
18-Jan-2009 |
Sanjiv Gupta <sanjiv.gupta@microchip.com> |
Few targets like PIC16 wants libcall generation for illegal type i16.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62467 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeIntegerTypes.cpp
argetLowering.cpp
|
| 5ad046568e2dd0b8079c871577950810a9d62d0a |
18-Jan-2009 |
Sanjiv Gupta <sanjiv.gupta@microchip.com> |
Few targets like PIC16 wants libcall generation for illegal type i16.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62467 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeIntegerTypes.cpp
argetLowering.cpp
|
| e3bc6ae92a17c28824fb4b6cf606d8ab07cae974 |
18-Jan-2009 |
Mon P Wang <wangmp@apple.com> |
Simplify extract element based on comments from Duncan Sands.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62459 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 017cf18077032a7754942cdfc9530533e502c6df |
18-Jan-2009 |
Mon P Wang <wangmp@apple.com> |
Simplify extract element based on comments from Duncan Sands.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62459 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 7ac9cdfc991db344a1e0f642aefc6db6b868b9b0 |
17-Jan-2009 |
Mon P Wang <wangmp@apple.com> |
Simplify extract element of a scalar to vector.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62383 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 3512a535f7c8bb494ecdc491eebd8d8893264fac |
17-Jan-2009 |
Mon P Wang <wangmp@apple.com> |
Simplify extract element of a scalar to vector.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62383 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| f7119393a97c2a10757084b6bc186380f8c19a73 |
16-Jan-2009 |
Dan Gohman <gohman@apple.com> |
Instead of adding dependence edges between terminator instructions
and every other instruction in their blocks to keep the terminator
instructions at the end, teach the post-RA scheduler how to operate
on ranges of instructions, and exclude terminators from the range
of instructions that get scheduled.
Also, exclude mid-block labels, such as EH_LABEL instructions, and
schedule code before them separately from code after them. This
fixes problems with the post-RA scheduler moving code past
EH_LABELs.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62366 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGSDNodesEmit.cpp
electionDAGISel.cpp
|
| 14bb992f8671302f8fad58ee842aa54e0b31edc1 |
16-Jan-2009 |
Dan Gohman <gohman@apple.com> |
Instead of adding dependence edges between terminator instructions
and every other instruction in their blocks to keep the terminator
instructions at the end, teach the post-RA scheduler how to operate
on ranges of instructions, and exclude terminators from the range
of instructions that get scheduled.
Also, exclude mid-block labels, such as EH_LABEL instructions, and
schedule code before them separately from code after them. This
fixes problems with the post-RA scheduler moving code past
EH_LABELs.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62366 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGSDNodesEmit.cpp
electionDAGISel.cpp
|
| b6a6164832572b2daeba604d6378ad49128d212f |
16-Jan-2009 |
Dan Gohman <gohman@apple.com> |
Use the getNode() accessor instead of accessing the Node
member directly, which is private as of r55504.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62364 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| e19c60d0bb1823552e917dfe61e7f4eb90ac4ced |
16-Jan-2009 |
Dan Gohman <gohman@apple.com> |
Use the getNode() accessor instead of accessing the Node
member directly, which is private as of r55504.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62364 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| df874eed5695420c71bf55cc6a11725631ec2b88 |
16-Jan-2009 |
Chris Lattner <sabre@nondot.org> |
new nodes should be added to the worklist, not old nodes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62359 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| e755e2ae6119343c79c84f3ceb1315ae13e57ca0 |
16-Jan-2009 |
Chris Lattner <sabre@nondot.org> |
new nodes should be added to the worklist, not old nodes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62359 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| e57187cbe321a286f6a7f409a7badd1ae4e4642c |
16-Jan-2009 |
Evan Cheng <evan.cheng@apple.com> |
CreateVirtualRegisters does trivial copy coalescing. If a node def is used by a single CopyToReg, it reuses the virtual register assigned to the CopyToReg. This won't work for SDNode that is a clone or is itself cloned. Disable this optimization for those nodes or it can end up with non-SSA machine instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62356 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGSDNodes.cpp
cheduleDAGSDNodesEmit.cpp
|
| 0a3c912d53f7aa0ab60608a886685ca2ab0d8de7 |
16-Jan-2009 |
Evan Cheng <evan.cheng@apple.com> |
CreateVirtualRegisters does trivial copy coalescing. If a node def is used by a single CopyToReg, it reuses the virtual register assigned to the CopyToReg. This won't work for SDNode that is a clone or is itself cloned. Disable this optimization for those nodes or it can end up with non-SSA machine instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62356 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGSDNodes.cpp
cheduleDAGSDNodesEmit.cpp
|
| 2388a588bdf32610e18a66c0c6ef248087fd1cdc |
16-Jan-2009 |
Mikhail Glushenkov <foldr@codedgers.com> |
Registry.h should not depend on CommandLine.h.
Split Support/Registry.h into two files so that we have less to
recompile every time CommandLine.h is changed.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62312 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuild.cpp
|
| 61fc6c80cf9d50c19fe46decedc592251918d78d |
16-Jan-2009 |
Mikhail Glushenkov <foldr@codedgers.com> |
Registry.h should not depend on CommandLine.h.
Split Support/Registry.h into two files so that we have less to
recompile every time CommandLine.h is changed.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62312 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuild.cpp
|
| 5c1799b29375fcd899f67a31fb4dda4ef3e2127f |
16-Jan-2009 |
Mikhail Glushenkov <foldr@codedgers.com> |
Delete trailing whitespace.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62307 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuild.cpp
|
| 26e9aed70cc520d39e32813513217163ff254e72 |
16-Jan-2009 |
Mikhail Glushenkov <foldr@codedgers.com> |
Delete trailing whitespace.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62307 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuild.cpp
|
| 2836c283bb1c14baa50994f60769d665da608ad7 |
16-Jan-2009 |
Dan Gohman <gohman@apple.com> |
Initial hazard recognizer support in post-pass scheduling. This includes
a new toy hazard recognizier heuristic which attempts to direct the
scheduler to avoid clumping large groups of loads or stores too densely.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62291 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGList.cpp
|
| 99603bb2e0d81b55ef3f4d219a3fecc067ced3b2 |
16-Jan-2009 |
Dan Gohman <gohman@apple.com> |
Initial hazard recognizer support in post-pass scheduling. This includes
a new toy hazard recognizier heuristic which attempts to direct the
scheduler to avoid clumping large groups of loads or stores too densely.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62291 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGList.cpp
|
| cf3a4487c0627d15d03fb6fedc10b58f6e2c9ebe |
16-Jan-2009 |
Devang Patel <dpatel@apple.com> |
Validate dbg_* intrinsics before lowering them.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62286 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
electionDAGBuild.cpp
|
| 2da0cc4c377b09f2d52689a5095f0960750e30c4 |
16-Jan-2009 |
Devang Patel <dpatel@apple.com> |
Validate dbg_* intrinsics before lowering them.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62286 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
electionDAGBuild.cpp
|
| fa9c5eac33bef67e2faef166c902e3bb16efa30f |
15-Jan-2009 |
Mon P Wang <wangmp@apple.com> |
Added missing support to widen an operand from a bit convert.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62285 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeTypes.h
egalizeVectorTypes.cpp
|
| 639095bd76b07891ca0177d6e925ce7be3178382 |
15-Jan-2009 |
Mon P Wang <wangmp@apple.com> |
Added missing support to widen an operand from a bit convert.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62285 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeTypes.h
egalizeVectorTypes.cpp
|
| fc54c552963545a81e4ea38e60460590afb2d5ae |
15-Jan-2009 |
Dan Gohman <gohman@apple.com> |
Generalize the HazardRecognizer interface so that it can be used
to support MachineInstr-based scheduling in addition to
SDNode-based scheduling.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62284 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGList.cpp
electionDAGISel.cpp
|
| dd6547db865163f5292361d2b8bfdb0217b25f33 |
15-Jan-2009 |
Dan Gohman <gohman@apple.com> |
Generalize the HazardRecognizer interface so that it can be used
to support MachineInstr-based scheduling in addition to
SDNode-based scheduling.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62284 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGList.cpp
electionDAGISel.cpp
|
| bb46f52027416598a662dc1c58f48d9d56b1a65b |
15-Jan-2009 |
Rafael Espindola <rafael.espindola@gmail.com> |
Add the private linkage.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62279 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuild.cpp
|
| a168fc98dedfc8cac01c34f84b699fe5f48ad76d |
15-Jan-2009 |
Rafael Espindola <rafael.espindola@gmail.com> |
Add the private linkage.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62279 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuild.cpp
|
| 79ce276083ced01256a0eb7d80731e4948ca6e87 |
15-Jan-2009 |
Dan Gohman <gohman@apple.com> |
Move a few containers out of ScheduleDAGInstrs::BuildSchedGraph
and into the ScheduleDAGInstrs class, so that they don't get
destructed and re-constructed for each block. This fixes a
compile-time hot spot in the post-pass scheduler.
To help facilitate this, tidy and do some minor reorganization
in the scheduler constructor functions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62275 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
cheduleDAGFast.cpp
cheduleDAGList.cpp
cheduleDAGRRList.cpp
cheduleDAGSDNodes.cpp
cheduleDAGSDNodesEmit.cpp
electionDAGISel.cpp
|
| 96eb47aa1be2f07003241a148e7b7db87bfa9104 |
15-Jan-2009 |
Dan Gohman <gohman@apple.com> |
Move a few containers out of ScheduleDAGInstrs::BuildSchedGraph
and into the ScheduleDAGInstrs class, so that they don't get
destructed and re-constructed for each block. This fixes a
compile-time hot spot in the post-pass scheduler.
To help facilitate this, tidy and do some minor reorganization
in the scheduler constructor functions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62275 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
cheduleDAGFast.cpp
cheduleDAGList.cpp
cheduleDAGRRList.cpp
cheduleDAGSDNodes.cpp
cheduleDAGSDNodesEmit.cpp
electionDAGISel.cpp
|
| 65b7f27bb7a628e02df7a863227deda6bc326f44 |
15-Jan-2009 |
Dan Gohman <gohman@apple.com> |
Make getWidenVectorType const; this file was missed in the
previous commit.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62266 91177308-0d34-0410-b5e6-96231b3b80d8
argetLowering.cpp
|
| 612f9d52905f1a3e3250c132fcc51447d93763b1 |
15-Jan-2009 |
Dan Gohman <gohman@apple.com> |
Make getWidenVectorType const; this file was missed in the
previous commit.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62266 91177308-0d34-0410-b5e6-96231b3b80d8
argetLowering.cpp
|
| e9530ecae4897fe8157bd4d7616043bd8c0484e2 |
15-Jan-2009 |
Dan Gohman <gohman@apple.com> |
More consts on TargetLowering references.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62262 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
electionDAG.cpp
electionDAGBuild.cpp
electionDAGISel.cpp
|
| a0c429eecdba4926d61591f84e73c8d473715e3a |
15-Jan-2009 |
Dan Gohman <gohman@apple.com> |
More consts on TargetLowering references.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62262 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
electionDAG.cpp
electionDAGBuild.cpp
electionDAGISel.cpp
|
| 0d137d7f35fba98f668098b3badf644efacf0e08 |
15-Jan-2009 |
Dan Gohman <gohman@apple.com> |
Use const with TargetLowering references in a few more places.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62260 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
egalizeVectorTypes.cpp
|
| 0275b138ada11dd70e02f6fc56829304ab7a0559 |
15-Jan-2009 |
Dan Gohman <gohman@apple.com> |
Use const with TargetLowering references in a few more places.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62260 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
egalizeVectorTypes.cpp
|
| b67e6b3b65f88d63cf483f47057beac5b8f55edf |
15-Jan-2009 |
Gabor Greif <ggreif@gmail.com> |
minor refactoring: use a more specific API
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62256 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuild.cpp
|
| 4c99d82f4a25697e025772d728275e7e9100eb5e |
15-Jan-2009 |
Gabor Greif <ggreif@gmail.com> |
minor refactoring: use a more specific API
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62256 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuild.cpp
|
| bbdc8207d587026212e176026d3e37ae043a6661 |
14-Jan-2009 |
Devang Patel <dpatel@apple.com> |
Removoe MachineModuleInfo methods (and related DebugInfoDesc class hierarchy) that were used to handle debug info.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62199 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 42f6bed060d1c8b242acf605cf1ecd8ce05f04a3 |
14-Jan-2009 |
Devang Patel <dpatel@apple.com> |
Removoe MachineModuleInfo methods (and related DebugInfoDesc class hierarchy) that were used to handle debug info.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62199 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 35fe7344aedec52c3fa048237e8554f97dff9182 |
13-Jan-2009 |
Devang Patel <dpatel@apple.com> |
Undo previous checkin.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62190 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| fb3a488e60c23d05db946b900e2184332e9d62bb |
13-Jan-2009 |
Devang Patel <dpatel@apple.com> |
Undo previous checkin.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62190 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| bb8c5959c83504fbc438e6efade30fa4b70a25b6 |
13-Jan-2009 |
Devang Patel <dpatel@apple.com> |
Use dwarf writer to decide whether the module has debug info or not.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62184 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 70190877b7aff395f931cc568f376a07d0ba416e |
13-Jan-2009 |
Devang Patel <dpatel@apple.com> |
Use dwarf writer to decide whether the module has debug info or not.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62184 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| bc0b56732a2d1dc22767e0f3930f22a76d99470a |
13-Jan-2009 |
Dan Gohman <gohman@apple.com> |
The list-td and list-tdrr schedulers don't yet support physreg
scheduling dependencies. Add assertion checks to help catch
this.
It appears the Mips target defaults to list-td, and it has a
regression test that uses a physreg dependence. Such code was
liable to be miscompiled, and now evokes an assertion failure.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62177 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGList.cpp
cheduleDAGRRList.cpp
|
| 0f0e2c84f9e1202d5a9fad1cc18f75d3fd661003 |
13-Jan-2009 |
Dan Gohman <gohman@apple.com> |
The list-td and list-tdrr schedulers don't yet support physreg
scheduling dependencies. Add assertion checks to help catch
this.
It appears the Mips target defaults to list-td, and it has a
regression test that uses a physreg dependence. Such code was
liable to be miscompiled, and now evokes an assertion failure.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62177 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGList.cpp
cheduleDAGRRList.cpp
|
| 2ecf88d1751c847b87a7119bf34fff85a3d272e2 |
13-Jan-2009 |
Duncan Sands <baldrick@free.fr> |
When replacing uses and the same node is reached
via two paths, process it once not twice, d'oh!
Analysis, testcase and original patch thanks to
Mon Ping Wang.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62169 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeTypes.cpp
|
| d1ec1991d8521b8a8c62dfb4b12023f088204b2f |
13-Jan-2009 |
Duncan Sands <baldrick@free.fr> |
When replacing uses and the same node is reached
via two paths, process it once not twice, d'oh!
Analysis, testcase and original patch thanks to
Mon Ping Wang.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62169 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeTypes.cpp
|
| 1bec3dd28a47b7e27e6f30de22a307521ce45b28 |
13-Jan-2009 |
Duncan Sands <baldrick@free.fr> |
Fix some typos. Also, the WidenedVectors map
was not being cleaned by ExpungeNode.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62167 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeTypes.cpp
egalizeTypes.h
|
| 4161b96979bc909062216488a194980c8d229806 |
13-Jan-2009 |
Duncan Sands <baldrick@free.fr> |
Fix some typos. Also, the WidenedVectors map
was not being cleaned by ExpungeNode.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62167 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeTypes.cpp
egalizeTypes.h
|
| 042fb3199f480cd8096d9c51ba1aceecd9af6f0e |
13-Jan-2009 |
Duncan Sands <baldrick@free.fr> |
Correct a comment - this is not a sign extension.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62166 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeIntegerTypes.cpp
|
| f54ff27d4aa92d5dde327b0ba524a4a4ec2ae00c |
13-Jan-2009 |
Duncan Sands <baldrick@free.fr> |
Correct a comment - this is not a sign extension.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62166 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeIntegerTypes.cpp
|
| 83489bb7700c69b7a4a8da59365c42d3f5c8129b |
13-Jan-2009 |
Devang Patel <dpatel@apple.com> |
Use DebugInfo interface to lower dbg_* intrinsics.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62127 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
egalizeDAG.cpp
electionDAG.cpp
electionDAGBuild.cpp
electionDAGISel.cpp
electionDAGPrinter.cpp
|
| fcf1c75c71c5246afd5dd3f6fcddf259233d8b22 |
13-Jan-2009 |
Devang Patel <dpatel@apple.com> |
Use DebugInfo interface to lower dbg_* intrinsics.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62127 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
egalizeDAG.cpp
electionDAG.cpp
electionDAGBuild.cpp
electionDAGISel.cpp
electionDAGPrinter.cpp
|
| ceb4d1aecb9deffe59b3dcdc9a783ffde8477be9 |
12-Jan-2009 |
Duncan Sands <baldrick@free.fr> |
Rename getABITypeSize to getTypePaddedSize, as
suggested by Chris.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62099 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
egalizeDAG.cpp
cheduleDAGSDNodesEmit.cpp
electionDAGBuild.cpp
|
| d68f13bf716faa496767a21140fab558adddc19a |
12-Jan-2009 |
Duncan Sands <baldrick@free.fr> |
Rename getABITypeSize to getTypePaddedSize, as
suggested by Chris.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62099 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
egalizeDAG.cpp
cheduleDAGSDNodesEmit.cpp
electionDAGBuild.cpp
|
| c29a56dedbe4297dad94b9bf2e19035c5903fd1f |
12-Jan-2009 |
Evan Cheng <evan.cheng@apple.com> |
Fix PR3241: Currently EmitCopyFromReg emits a copy from the physical register to a virtual register unless it requires an expensive cross class copy. That means we are only treating "expensive to copy" register dependency as physical register dependency.
Also future proof the scheduler to handle "normal" physical register dependencies. The code is not exercised yet.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62074 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGFast.cpp
cheduleDAGRRList.cpp
cheduleDAGSDNodes.cpp
cheduleDAGSDNodesEmit.cpp
|
| e2321b01a24bdfea92d682834529ae6c9bb36b13 |
12-Jan-2009 |
Evan Cheng <evan.cheng@apple.com> |
Fix PR3241: Currently EmitCopyFromReg emits a copy from the physical register to a virtual register unless it requires an expensive cross class copy. That means we are only treating "expensive to copy" register dependency as physical register dependency.
Also future proof the scheduler to handle "normal" physical register dependencies. The code is not exercised yet.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62074 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGFast.cpp
cheduleDAGRRList.cpp
cheduleDAGSDNodes.cpp
cheduleDAGSDNodesEmit.cpp
|
| 9aacec1f26cd9ee328c461624ffcbde3aa2f6ab1 |
11-Jan-2009 |
Evan Cheng <evan.cheng@apple.com> |
CheckForPhysRegDependency should not return copy cost. It's not used. No functionality change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62036 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGSDNodes.cpp
|
| ef59ca0839362d4f6135366910502b41fe2c2ed9 |
11-Jan-2009 |
Evan Cheng <evan.cheng@apple.com> |
CheckForPhysRegDependency should not return copy cost. It's not used. No functionality change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62036 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGSDNodes.cpp
|
| 5c3c5a4d9c21e73f7a0e11d77a85997c9f34f2ba |
09-Jan-2009 |
Evan Cheng <evan.cheng@apple.com> |
Duplicated node may produce a non-physical register def.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62015 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGSDNodesEmit.cpp
|
| 6aa342d88f9748e85731ea7c10a5ca13c624b3ba |
09-Jan-2009 |
Evan Cheng <evan.cheng@apple.com> |
Duplicated node may produce a non-physical register def.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62015 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGSDNodesEmit.cpp
|
| 84036a77a36a934514e51c99f83e6c3632bf98f5 |
09-Jan-2009 |
Evan Cheng <evan.cheng@apple.com> |
Minor debug output tweak.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62005 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGRRList.cpp
|
| 51132e266517cd5b3148f9a69f8b2f151aaeb54d |
09-Jan-2009 |
Evan Cheng <evan.cheng@apple.com> |
Minor debug output tweak.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62005 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGRRList.cpp
|
| 6e7a1617ac4a34792d9097b8d3644b72f57a45f7 |
09-Jan-2009 |
Devang Patel <dpatel@apple.com> |
Request DwarfWriter. This will be used to handle dbg_* intrinsics.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61999 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
electionDAGISel.cpp
|
| 10e63334f4a4a2bb420dc6aad7d4a0b7a5a70dec |
09-Jan-2009 |
Devang Patel <dpatel@apple.com> |
Request DwarfWriter. This will be used to handle dbg_* intrinsics.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61999 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
electionDAGISel.cpp
|
| 9b8f542e2746b28721b3ec603c3aaaa10ea708fc |
09-Jan-2009 |
Misha Brukman <brukman+llvm@gmail.com> |
Removed trailing whitespace from Makefiles.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61991 91177308-0d34-0410-b5e6-96231b3b80d8
akefile
|
| e025bcca322301af5c4a5178b1a64080cb900ec1 |
09-Jan-2009 |
Misha Brukman <brukman+llvm@gmail.com> |
Removed trailing whitespace from Makefiles.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61991 91177308-0d34-0410-b5e6-96231b3b80d8
akefile
|
| 25fd4037a7f698877eedb69bf32d8591344e86ee |
07-Jan-2009 |
Dan Gohman <gohman@apple.com> |
Remove redundant 'else's. No functionality change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61891 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGRRList.cpp
|
| 81f6f05b29b24862734608cc25e180de0804726a |
07-Jan-2009 |
Dan Gohman <gohman@apple.com> |
Remove redundant 'else's. No functionality change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61891 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGRRList.cpp
|
| 2c91d102ec29bc766b7172a3062d399dc12640fe |
06-Jan-2009 |
Dan Gohman <gohman@apple.com> |
Fix a bug in ComputeLinearIndex computation handling multi-level
aggregate types. Don't increment the current index after reaching
the end of a struct, as it will already be pointing at
one-past-the end. This fixes PR3288.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61828 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuild.cpp
|
| fe3972ffb4a002d6b8ee79fb2a847ff41ec7127b |
06-Jan-2009 |
Dan Gohman <gohman@apple.com> |
Fix a bug in ComputeLinearIndex computation handling multi-level
aggregate types. Don't increment the current index after reaching
the end of a struct, as it will already be pointing at
one-past-the end. This fixes PR3288.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61828 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuild.cpp
|
| ce0d4b7a77da716f234d42edd0472e97b3ba5f57 |
06-Jan-2009 |
Dan Gohman <gohman@apple.com> |
Update these argument lists for the isNormalMemory
argument. This doesn't affect current functionality.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61779 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGRRList.cpp
|
| 485cc19e301e62100bf55fc142530a4bfe12955b |
06-Jan-2009 |
Dan Gohman <gohman@apple.com> |
Update these argument lists for the isNormalMemory
argument. This doesn't affect current functionality.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61779 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGRRList.cpp
|
| fd2163bcf77df6b3e58868483c089bd3869b01d6 |
06-Jan-2009 |
Dan Gohman <gohman@apple.com> |
Use a latency value of 0 for the artificial edges inserted by
AddPseudoTwoAddrDeps. This lets the scheduling infrastructure
avoid recalculating node heights. In very large testcases this
was a major bottleneck. Thanks to Roman Levenstein for finding
this!
As a side effect, fold-pcmpeqd-0.ll is now scheduled better
and it no longer requires spilling on x86-32.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61778 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGRRList.cpp
|
| d6f5787fe37439fca6120ae2b6a39e183402052c |
06-Jan-2009 |
Dan Gohman <gohman@apple.com> |
Use a latency value of 0 for the artificial edges inserted by
AddPseudoTwoAddrDeps. This lets the scheduling infrastructure
avoid recalculating node heights. In very large testcases this
was a major bottleneck. Thanks to Roman Levenstein for finding
this!
As a side effect, fold-pcmpeqd-0.ll is now scheduled better
and it no longer requires spilling on x86-32.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61778 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGRRList.cpp
|
| 11df7e5157352d082bcb556907c3c8239228ae7f |
05-Jan-2009 |
Dan Gohman <gohman@apple.com> |
TargetLowering.h #includes SelectionDAGNodes.h, so it doesn't need its
own OpActionsCapacity magic number; it can just use ISD::BUILTIN_OP_END,
as long as it takes care to round up when needed.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61733 91177308-0d34-0410-b5e6-96231b3b80d8
argetLowering.cpp
|
| 64554a9d6bf88198d98135cd59081877fef2b729 |
05-Jan-2009 |
Dan Gohman <gohman@apple.com> |
TargetLowering.h #includes SelectionDAGNodes.h, so it doesn't need its
own OpActionsCapacity magic number; it can just use ISD::BUILTIN_OP_END,
as long as it takes care to round up when needed.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61733 91177308-0d34-0410-b5e6-96231b3b80d8
argetLowering.cpp
|
| d68a07650cdb2e18f18f362ba533459aa10e01b6 |
05-Jan-2009 |
Dan Gohman <gohman@apple.com> |
Tidy up #includes, deleting a bunch of unnecessary #includes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61715 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGRRList.cpp
electionDAGISel.cpp
|
| c24a3f87f866e96b2a9ad691c78113651eaa77d1 |
05-Jan-2009 |
Dan Gohman <gohman@apple.com> |
Tidy up #includes, deleting a bunch of unnecessary #includes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61715 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGRRList.cpp
electionDAGISel.cpp
|
| 8a84e4402a1ab7ff36f52acdf5e1891e283a947e |
05-Jan-2009 |
Devang Patel <dpatel@apple.com> |
squash warnings.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61707 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuild.cpp
|
| f3707e8e88775edca2b09fbcf1c2fe66883ae1ec |
05-Jan-2009 |
Devang Patel <dpatel@apple.com> |
squash warnings.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61707 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuild.cpp
|
| cc91d63ab7b3ee5c80497acf77f75ad9f76e985c |
03-Jan-2009 |
Dan Gohman <gohman@apple.com> |
Fix a DAGCombiner abort on an invalid shift count constant. This fixes PR3250.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61613 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 77d852f90cea554d2baabb73a621f0284b596db4 |
03-Jan-2009 |
Dan Gohman <gohman@apple.com> |
Fix a DAGCombiner abort on an invalid shift count constant. This fixes PR3250.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61613 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 1eb9268080498bc7b6d2d5df6fe8c13d6f939de0 |
03-Jan-2009 |
Dan Gohman <gohman@apple.com> |
CommuteNodesToReducePressure() is now removed.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61612 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGRRList.cpp
|
| 32e8e114a7a4f61aa02463298b51aea926d0272b |
03-Jan-2009 |
Dan Gohman <gohman@apple.com> |
CommuteNodesToReducePressure() is now removed.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61612 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGRRList.cpp
|
| 223942a420cf5b9e888524186134cc652be8a921 |
03-Jan-2009 |
Dan Gohman <gohman@apple.com> |
Remove the code from the scheduler that commuted two-address
instructions to avoid copies, because TwoAddressInstructionPass
also does this optimization. The scheduler's version didn't
account for live-out values, which resulted in spurious commutes
and missed opportunities.
Now, TwoAddressInstructionPass handles all the opportunities,
instead of just those that the scheduler missed. The result is
usually the same, though there are occasional trivial differences
resulting from the avoidance of spurious commutes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61611 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGRRList.cpp
cheduleDAGSDNodesEmit.cpp
|
| 9a57ab02dfb82e186a8b04c6f7d73180d7cfaa7a |
03-Jan-2009 |
Dan Gohman <gohman@apple.com> |
Remove the code from the scheduler that commuted two-address
instructions to avoid copies, because TwoAddressInstructionPass
also does this optimization. The scheduler's version didn't
account for live-out values, which resulted in spurious commutes
and missed opportunities.
Now, TwoAddressInstructionPass handles all the opportunities,
instead of just those that the scheduler missed. The result is
usually the same, though there are occasional trivial differences
resulting from the avoidance of spurious commutes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61611 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGRRList.cpp
cheduleDAGSDNodesEmit.cpp
|
| b6e223a9e806921183da972253c49082a2e07944 |
01-Jan-2009 |
Duncan Sands <baldrick@free.fr> |
Factorize (and generalize) the code promoting SELECT
and BRCOND conditions. Reorder a few methods while
there.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61547 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeIntegerTypes.cpp
egalizeTypes.cpp
egalizeTypes.h
|
| 70528df613d3087dc051ffc2e2776c57a8799791 |
01-Jan-2009 |
Duncan Sands <baldrick@free.fr> |
Factorize (and generalize) the code promoting SELECT
and BRCOND conditions. Reorder a few methods while
there.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61547 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeIntegerTypes.cpp
egalizeTypes.cpp
egalizeTypes.h
|
| ba6d26275f5d0561b9afdc59ebe1d11567fa4fde |
01-Jan-2009 |
Duncan Sands <baldrick@free.fr> |
Remove trailing spaces.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61545 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeTypes.h
egalizeVectorTypes.cpp
|
| 8c3c3020414fbac3bbf73626f373eba60c157c96 |
01-Jan-2009 |
Duncan Sands <baldrick@free.fr> |
Remove trailing spaces.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61545 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeTypes.h
egalizeVectorTypes.cpp
|
| 5480c0469e5c0323ffb12f1ead2abd169d6cc0e7 |
01-Jan-2009 |
Duncan Sands <baldrick@free.fr> |
Fix PR3274: when promoting the condition of a BRCOND node,
promote from i1 all the way up to the canonical SetCC type.
In order to discover an appropriate type to use, pass
MVT::Other to getSetCCResultType. In order to be able to
do this, change getSetCCResultType to take a type as an
argument, not a value (this is also more logical).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61542 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
egalizeDAG.cpp
egalizeFloatTypes.cpp
egalizeIntegerTypes.cpp
egalizeVectorTypes.cpp
electionDAGBuild.cpp
argetLowering.cpp
|
| 4a36127089bb2f78811d3f5a43c76b3d6f24f213 |
01-Jan-2009 |
Duncan Sands <baldrick@free.fr> |
Fix PR3274: when promoting the condition of a BRCOND node,
promote from i1 all the way up to the canonical SetCC type.
In order to discover an appropriate type to use, pass
MVT::Other to getSetCCResultType. In order to be able to
do this, change getSetCCResultType to take a type as an
argument, not a value (this is also more logical).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61542 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
egalizeDAG.cpp
egalizeFloatTypes.cpp
egalizeIntegerTypes.cpp
egalizeVectorTypes.cpp
electionDAGBuild.cpp
argetLowering.cpp
|
| 845145f8b5f7feb8617bcfcfd3803ef80b17765d |
29-Dec-2008 |
Scott Michel <scottm@aero.org> |
Teach LeaglizeDAG that i64 mul can be a libcall.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61463 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 8121504200287caf76a42be5548afc82b051a7fa |
29-Dec-2008 |
Scott Michel <scottm@aero.org> |
Teach LeaglizeDAG that i64 mul can be a libcall.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61463 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 7c7bc722ecdeec365074cac4bdb9e2679c02177f |
24-Dec-2008 |
Dale Johannesen <dalej@apple.com> |
Change comments so everybody can understand them, hopefully.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61405 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| d32a96063395c27fc0ef1cbfa8ae987f3e19ac13 |
24-Dec-2008 |
Dale Johannesen <dalej@apple.com> |
Change comments so everybody can understand them, hopefully.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61405 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| f9cbc1f9ac087937641c16b218d10986f5b406ad |
24-Dec-2008 |
Dale Johannesen <dalej@apple.com> |
Add another permutation where we should get rid of a-a.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61401 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| d546e83ac57d9927aadaf78dc4e879481b2c1c76 |
24-Dec-2008 |
Dale Johannesen <dalej@apple.com> |
Add another permutation where we should get rid of a-a.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61401 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 56d245ba8bec6008d7924afbdfd8e10473df54f8 |
23-Dec-2008 |
Anton Korobeynikov <asl@math.spbu.ru> |
Restore debug printing
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61398 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuild.cpp
|
| f5b5f6b81611a7b0533ca0934b82e496bf0830b3 |
23-Dec-2008 |
Anton Korobeynikov <asl@math.spbu.ru> |
Restore debug printing
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61398 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuild.cpp
|
| e2f95e9b6123204638e140731b5c8c1b36144356 |
23-Dec-2008 |
Anton Korobeynikov <asl@math.spbu.ru> |
Sometimes APInt syntax is really ugly... :(
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61397 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuild.cpp
|
| 6981ab277ccbefb70952c169b26c966733349312 |
23-Dec-2008 |
Anton Korobeynikov <asl@math.spbu.ru> |
Sometimes APInt syntax is really ugly... :(
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61397 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuild.cpp
|
| 1bfe237d69f50be4e0ef8f5afeac320469092abf |
23-Dec-2008 |
Anton Korobeynikov <asl@math.spbu.ru> |
Indent stuff properly
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61396 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuild.cpp
|
| 1718d3af89c552d1b57c339c124c881c4504b911 |
23-Dec-2008 |
Anton Korobeynikov <asl@math.spbu.ru> |
Indent stuff properly
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61396 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuild.cpp
|
| 2321858c8cf5583a77b1318d5275188058ab5504 |
23-Dec-2008 |
Anton Korobeynikov <asl@math.spbu.ru> |
Initial checkin of APInt'ififcation of switch lowering
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61395 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuild.cpp
electionDAGBuild.h
|
| 7e50c0d934d5496f348808caf3a3daab0218b45b |
23-Dec-2008 |
Anton Korobeynikov <asl@math.spbu.ru> |
Initial checkin of APInt'ififcation of switch lowering
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61395 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuild.cpp
electionDAGBuild.h
|
| 0b1d4a798d1dd2f39521b6b381cd1c1911c9ab52 |
23-Dec-2008 |
Dan Gohman <gohman@apple.com> |
Clean up the atomic opcodes in SelectionDAG.
This removes all the _8, _16, _32, and _64 opcodes and replaces each
group with an unsuffixed opcode. The MemoryVT field of the AtomicSDNode
is now used to carry the size information. In tablegen, the size-specific
opcodes are replaced by size-independent opcodes that utilize the
ability to compose them with predicates.
This shrinks the per-opcode tables and makes the code that handles
atomics much more concise.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61389 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
egalizeIntegerTypes.cpp
electionDAG.cpp
electionDAGBuild.cpp
|
| bebba8d5cc675a8b9d7695c6105cff81b2e73fbd |
23-Dec-2008 |
Dan Gohman <gohman@apple.com> |
Clean up the atomic opcodes in SelectionDAG.
This removes all the _8, _16, _32, and _64 opcodes and replaces each
group with an unsuffixed opcode. The MemoryVT field of the AtomicSDNode
is now used to carry the size information. In tablegen, the size-specific
opcodes are replaced by size-independent opcodes that utilize the
ability to compose them with predicates.
This shrinks the per-opcode tables and makes the code that handles
atomics much more concise.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61389 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
egalizeIntegerTypes.cpp
electionDAG.cpp
electionDAGBuild.cpp
|
| c9a5b9e38b442c2ae6b115213a07df3fcd14708d |
23-Dec-2008 |
Dan Gohman <gohman@apple.com> |
Rename BuildSchedUnits to BuildSchedGraph, and refactor the
code in ScheduleDAGSDNodes' BuildSchedGraph into separate functions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61376 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGFast.cpp
cheduleDAGList.cpp
cheduleDAGRRList.cpp
cheduleDAGSDNodes.cpp
|
| 9e7bcd67ef5a160cc4fa3d1f92329d8296c62840 |
23-Dec-2008 |
Dan Gohman <gohman@apple.com> |
Rename BuildSchedUnits to BuildSchedGraph, and refactor the
code in ScheduleDAGSDNodes' BuildSchedGraph into separate functions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61376 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGFast.cpp
cheduleDAGList.cpp
cheduleDAGRRList.cpp
cheduleDAGSDNodes.cpp
|
| e1dfc7da8991270db5094aa736fde273bfab6061 |
23-Dec-2008 |
Dan Gohman <gohman@apple.com> |
Avoid an unnecessary call to allnodes_size(), which is linear.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61372 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGSDNodes.cpp
|
| bdf3e272f9b0df3779e4569e4eb3eae64e921c76 |
23-Dec-2008 |
Dan Gohman <gohman@apple.com> |
Avoid an unnecessary call to allnodes_size(), which is linear.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61372 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGSDNodes.cpp
|
| 58e39b0200f448b796a89e2b7e9b8a5607a1771a |
23-Dec-2008 |
Dale Johannesen <dalej@apple.com> |
One more permutation of subtracting off a base value.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61361 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| fbc2e4b3c7f8487556a5dbb044ac3dbeff31a388 |
23-Dec-2008 |
Dale Johannesen <dalej@apple.com> |
One more permutation of subtracting off a base value.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61361 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 87c8a8f304d1ee72829086ce2c41a8fa3813ba6a |
18-Dec-2008 |
Mon P Wang <wangmp@apple.com> |
Added support for vector widening.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61209 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
egalizeIntegerTypes.cpp
egalizeTypes.cpp
egalizeTypes.h
egalizeVectorTypes.cpp
argetLowering.cpp
|
| 26342923118b8df5e99bf6acbac36d9af9255810 |
18-Dec-2008 |
Mon P Wang <wangmp@apple.com> |
Added support for vector widening.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61209 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
egalizeIntegerTypes.cpp
egalizeTypes.cpp
egalizeTypes.h
egalizeVectorTypes.cpp
argetLowering.cpp
|
| 84aff84cfab7fe9822a60ca378c66079bad6be85 |
17-Dec-2008 |
Mon P Wang <wangmp@apple.com> |
Fix expansion of vsetcc to set the high bit for true instead of 1.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61129 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 77bc9cd34ef03421f1b8c773fb4797fccd137fbe |
17-Dec-2008 |
Mon P Wang <wangmp@apple.com> |
Fix expansion of vsetcc to set the high bit for true instead of 1.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61129 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 89b64bd7e5032292adc308da0d867979734da8c1 |
17-Dec-2008 |
Dan Gohman <gohman@apple.com> |
Double the amount of memory reserved for SUnits. This is a
temporary workaround for an obscure bug. When node cloning is
used, it is possible that more SUnits will be created, and
if the SUnits std::vector has to reallocate, it will
invalidate all the graph edges.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61122 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGSDNodes.cpp
|
| 0b299309c54a51e8a7eef7e807f71749863ebebb |
17-Dec-2008 |
Dan Gohman <gohman@apple.com> |
Double the amount of memory reserved for SUnits. This is a
temporary workaround for an obscure bug. When node cloning is
used, it is possible that more SUnits will be created, and
if the SUnits std::vector has to reallocate, it will
invalidate all the graph edges.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61122 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGSDNodes.cpp
|
| 28dc98f7521933872b93156e3ebf5c9f8327b2b3 |
17-Dec-2008 |
Eli Friedman <eli.friedman@gmail.com> |
Fix for PR3225: disable a broken optimization in
DAGTypeLegalizer::ExpandShiftWithKnownAmountBit.
In terms of restoring the optimization, the best fix here isn't
obvious... any ideas?
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61119 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeIntegerTypes.cpp
|
| 683d2fd82549a8b6caf96d9d91de3dc150c8e8e8 |
17-Dec-2008 |
Eli Friedman <eli.friedman@gmail.com> |
Fix for PR3225: disable a broken optimization in
DAGTypeLegalizer::ExpandShiftWithKnownAmountBit.
In terms of restoring the optimization, the best fix here isn't
obvious... any ideas?
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61119 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeIntegerTypes.cpp
|
| fd3b7b7df3d539d1244933d375a766d7a7fe6c91 |
16-Dec-2008 |
Dale Johannesen <dalej@apple.com> |
A new dag combine; several permutations of this
are there under ADD, this one was missing.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61107 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 0b58ffac380b4128b2b100e807a88f4c65d498ac |
16-Dec-2008 |
Dale Johannesen <dalej@apple.com> |
A new dag combine; several permutations of this
are there under ADD, this one was missing.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61107 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 905ff1ebc4f383088e6af6fc37504cd06ba62b57 |
16-Dec-2008 |
Dan Gohman <gohman@apple.com> |
Preserve SourceValue information when lowering produces multiple loads from
different offsets within the same stack slot.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61093 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeTypesGeneric.cpp
|
| f6b65367db9e02b7439c9bf284ed2cf291e575e6 |
16-Dec-2008 |
Dan Gohman <gohman@apple.com> |
Preserve SourceValue information when lowering produces multiple loads from
different offsets within the same stack slot.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61093 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeTypesGeneric.cpp
|
| 09dc9c0c8363a689aa5559ae0e3ac33e381c2bb2 |
16-Dec-2008 |
Evan Cheng <evan.cheng@apple.com> |
We have decided not to support inline asm where an output operand with a matching input operand with incompatible type (i.e. either one is a floating point and the other is an integer or the sizes of the types differ). SelectionDAGBuild will catch these and exit with an error.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61092 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuild.cpp
|
| 596801f1964c9e7063b4effd76610ce9da379502 |
16-Dec-2008 |
Evan Cheng <evan.cheng@apple.com> |
We have decided not to support inline asm where an output operand with a matching input operand with incompatible type (i.e. either one is a floating point and the other is an integer or the sizes of the types differ). SelectionDAGBuild will catch these and exit with an error.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61092 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuild.cpp
|
| 9a65d6afc203fb8e44a807f84e3d370f16b08a5a |
16-Dec-2008 |
Dan Gohman <gohman@apple.com> |
Remove some special-case logic in ScheduleDAGSDNodes's
latency computation code that is no longer needed with the
new method for handling latencies.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61074 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGSDNodes.cpp
|
| 504bb6e644387f2ff37a018d02d5d924504a76dc |
16-Dec-2008 |
Dan Gohman <gohman@apple.com> |
Remove some special-case logic in ScheduleDAGSDNodes's
latency computation code that is no longer needed with the
new method for handling latencies.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61074 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGSDNodes.cpp
|
| 3f23744df4809eba94284e601e81489212c974d4 |
16-Dec-2008 |
Dan Gohman <gohman@apple.com> |
Fix some register-alias-related bugs in the post-RA scheduler liveness
computation code. Also, avoid adding output-depenency edges when both
defs are dead, which frequently happens with EFLAGS defs.
Compute Depth and Height lazily, and always in terms of edge latency
values. For the schedulers that don't care about latency, edge latencies
are set to 1.
Eliminate Cycle and CycleBound, and LatencyPriorityQueue's Latencies array.
These are all subsumed by the Depth and Height fields.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61073 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGFast.cpp
cheduleDAGList.cpp
cheduleDAGRRList.cpp
cheduleDAGSDNodes.cpp
|
| 6b2ee8f599ed38492b69b1b5bf0e53ddf8d94195 |
16-Dec-2008 |
Dan Gohman <gohman@apple.com> |
Fix some register-alias-related bugs in the post-RA scheduler liveness
computation code. Also, avoid adding output-depenency edges when both
defs are dead, which frequently happens with EFLAGS defs.
Compute Depth and Height lazily, and always in terms of edge latency
values. For the schedulers that don't care about latency, edge latencies
are set to 1.
Eliminate Cycle and CycleBound, and LatencyPriorityQueue's Latencies array.
These are all subsumed by the Depth and Height fields.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61073 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGFast.cpp
cheduleDAGList.cpp
cheduleDAGRRList.cpp
cheduleDAGSDNodes.cpp
|
| ffa391272bad598d73fd5404dadf3686b69f2a63 |
16-Dec-2008 |
Dan Gohman <gohman@apple.com> |
Make addPred and removePred return void, since the return value is not
currently used by anything.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61066 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGFast.cpp
cheduleDAGRRList.cpp
|
| 51107eaca992d79502be86717376cc9331b5276c |
16-Dec-2008 |
Dan Gohman <gohman@apple.com> |
Make addPred and removePred return void, since the return value is not
currently used by anything.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61066 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGFast.cpp
cheduleDAGRRList.cpp
|
| 93b3b928d70df956b81ab1bffb7e8bab4b0c8fd7 |
15-Dec-2008 |
Mon P Wang <wangmp@apple.com> |
Added support for splitting and scalarizing vector shifts.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61050 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeTypes.h
egalizeVectorTypes.cpp
|
| 6978d7caeb633bacf55a9b5eb4feb1da466d17ab |
15-Dec-2008 |
Mon P Wang <wangmp@apple.com> |
Added support for splitting and scalarizing vector shifts.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61050 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeTypes.h
egalizeVectorTypes.cpp
|
| 464fc5a04462ad09f98f456e8904683e7c34f60e |
15-Dec-2008 |
Dan Gohman <gohman@apple.com> |
Fix printing of PseudoSourceValues in SDNode graphs.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61036 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGPrinter.cpp
|
| 3a2f507046964a22a7ca8d744a2e3bb2bebf9bf9 |
15-Dec-2008 |
Dan Gohman <gohman@apple.com> |
Fix printing of PseudoSourceValues in SDNode graphs.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61036 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGPrinter.cpp
|
| d17c0302763cfd0b3f6657d2493147552762ac07 |
15-Dec-2008 |
Mon P Wang <wangmp@apple.com> |
Added support to LegalizeType for expanding the operands of scalar to vector
and insert vector element. Modified extract vector element to extend the
result to match the expected promoted type.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61029 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeIntegerTypes.cpp
egalizeTypes.h
egalizeTypesGeneric.cpp
|
| 412f92f5180f1e49de0e7262ec1b7e97b2447c60 |
15-Dec-2008 |
Mon P Wang <wangmp@apple.com> |
Added support to LegalizeType for expanding the operands of scalar to vector
and insert vector element. Modified extract vector element to extend the
result to match the expected promoted type.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61029 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeIntegerTypes.cpp
egalizeTypes.h
egalizeTypesGeneric.cpp
|
| b6862bbe34be4a832f709596f8dc971ab9895b06 |
14-Dec-2008 |
Duncan Sands <baldrick@free.fr> |
Reapply r60997, this time without forgetting that
target constants are allowed to have an illegal
type.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61006 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
electionDAGISel.cpp
|
| e016a2e889c082f9ebf3b0ca578e09ff36f9d629 |
14-Dec-2008 |
Duncan Sands <baldrick@free.fr> |
Reapply r60997, this time without forgetting that
target constants are allowed to have an illegal
type.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61006 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
electionDAGISel.cpp
|
| 2d8cc315215febb15a8c18c41ef0b165da71c3b8 |
14-Dec-2008 |
Bill Wendling <isanbard@gmail.com> |
Temporarily revert r60997. It was causing this failure:
Running /Users/void/llvm/llvm.src/test/CodeGen/Generic/dg.exp ...
FAIL: /Users/void/llvm/llvm.src/test/CodeGen/Generic/asm-large-immediate.ll
Failed with exit(1) at line 1
while running: llvm-as < /Users/void/llvm/llvm.src/test/CodeGen/Generic/asm-large-immediate.ll | llc | /usr/bin/grep 68719476738
Assertion failed: ((TypesNeedLegalizing || getTypeAction(VT) == Legal) && "Illegal type introduced after type legalization?"), function HandleOp, file /Users/void/llvm/llvm.src/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp, line 493.
0 llc 0x0085392e char const* std::find<char const*, char>(char const*, char const*, char const&) + 98
1 llc 0x00853e63 llvm::sys::PrintStackTraceOnErrorSignal() + 593
2 libSystem.B.dylib 0x96cac09b _sigtramp + 43
3 libSystem.B.dylib 0xffffffff _sigtramp + 1765097359
4 libSystem.B.dylib 0x96d24ec2 raise + 26
5 libSystem.B.dylib 0x96d3447f abort + 73
6 libSystem.B.dylib 0x96d26063 __assert_rtn + 101
7 llc 0x004f9018 llvm::cast_retty<llvm::SubprogramDesc, llvm::DebugInfoDesc*>::ret_type llvm::cast<llvm::Sub
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61001 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
electionDAGISel.cpp
|
| 318de86c315e8820a6e6c729e4e471976c86f4c9 |
14-Dec-2008 |
Bill Wendling <isanbard@gmail.com> |
Temporarily revert r60997. It was causing this failure:
Running /Users/void/llvm/llvm.src/test/CodeGen/Generic/dg.exp ...
FAIL: /Users/void/llvm/llvm.src/test/CodeGen/Generic/asm-large-immediate.ll
Failed with exit(1) at line 1
while running: llvm-as < /Users/void/llvm/llvm.src/test/CodeGen/Generic/asm-large-immediate.ll | llc | /usr/bin/grep 68719476738
Assertion failed: ((TypesNeedLegalizing || getTypeAction(VT) == Legal) && "Illegal type introduced after type legalization?"), function HandleOp, file /Users/void/llvm/llvm.src/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp, line 493.
0 llc 0x0085392e char const* std::find<char const*, char>(char const*, char const*, char const&) + 98
1 llc 0x00853e63 llvm::sys::PrintStackTraceOnErrorSignal() + 593
2 libSystem.B.dylib 0x96cac09b _sigtramp + 43
3 libSystem.B.dylib 0xffffffff _sigtramp + 1765097359
4 libSystem.B.dylib 0x96d24ec2 raise + 26
5 libSystem.B.dylib 0x96d3447f abort + 73
6 libSystem.B.dylib 0x96d26063 __assert_rtn + 101
7 llc 0x004f9018 llvm::cast_retty<llvm::SubprogramDesc, llvm::DebugInfoDesc*>::ret_type llvm::cast<llvm::Sub
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61001 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
electionDAGISel.cpp
|
| 0f546d4565b988f69850f42282e57a850153146d |
13-Dec-2008 |
Duncan Sands <baldrick@free.fr> |
LegalizeDAG is not supposed to introduce illegal
types into the DAG if they were not already there.
Check this with an assertion.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60997 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
electionDAGISel.cpp
|
| edb1e670375bd251199ce2fe2286aa446723ccb6 |
13-Dec-2008 |
Duncan Sands <baldrick@free.fr> |
LegalizeDAG is not supposed to introduce illegal
types into the DAG if they were not already there.
Check this with an assertion.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60997 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
electionDAGISel.cpp
|
| c5d64607c96d9237f55988736e6ba7cc6a3d0a67 |
13-Dec-2008 |
Mon P Wang <wangmp@apple.com> |
Remove assertion to allow promotion of a truncating store operand
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60975 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeIntegerTypes.cpp
|
| 3ee6e522dcc5cf66d8616c444811032a4b8c9538 |
13-Dec-2008 |
Mon P Wang <wangmp@apple.com> |
Remove assertion to allow promotion of a truncating store operand
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60975 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeIntegerTypes.cpp
|
| e1a0b2e0bbf2bd905afc628c96d8892edb304a3e |
13-Dec-2008 |
Mon P Wang <wangmp@apple.com> |
Added basic support for expanding VSETCC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60974 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| ec428ad696e767dbf2d594ce246d0fce7b6ab92e |
13-Dec-2008 |
Mon P Wang <wangmp@apple.com> |
Added basic support for expanding VSETCC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60974 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| fd6673cf7fd5c0c1e6817e5fcf460a289712ee57 |
13-Dec-2008 |
Duncan Sands <baldrick@free.fr> |
On big-endian machines it is wrong to do a full
width register load followed by a truncating
store for the copy, since the load will not place
the value in the lower bits. Probably partial
loads/stores can never happen here, but fix it
anyway.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60972 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 734f49bf4cf7f061f0746390bd5389f023ca66f6 |
13-Dec-2008 |
Duncan Sands <baldrick@free.fr> |
On big-endian machines it is wrong to do a full
width register load followed by a truncating
store for the copy, since the load will not place
the value in the lower bits. Probably partial
loads/stores can never happen here, but fix it
anyway.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60972 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 05e11fab87102a230551327bfc8434ffad7a88d4 |
12-Dec-2008 |
Duncan Sands <baldrick@free.fr> |
When expanding unaligned loads and stores do not make
use of illegal integer types: instead, use a stack slot
and copying via integer registers. The existing code
is still used if the bitconvert is to a legal integer
type.
This fires on the PPC testcases 2007-09-08-unaligned.ll
and vec_misaligned.ll. It looks like equivalent code
is generated with these changes, just permuted, but
it's hard to tell.
With these changes, nothing in LegalizeDAG produces
illegal integer types anymore. This is a prerequisite
for removing the LegalizeDAG type legalization code.
While there I noticed that the existing code doesn't
handle trunc store of f64 to f32: it turns this into
an i64 store, which represents a 4 byte stack smash.
I added a FIXME about this. Hopefully someone more
motivated than I am will take care of it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60964 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| b7ae45942427f524ad950c5fabaafeb920a18b3c |
12-Dec-2008 |
Duncan Sands <baldrick@free.fr> |
When expanding unaligned loads and stores do not make
use of illegal integer types: instead, use a stack slot
and copying via integer registers. The existing code
is still used if the bitconvert is to a legal integer
type.
This fires on the PPC testcases 2007-09-08-unaligned.ll
and vec_misaligned.ll. It looks like equivalent code
is generated with these changes, just permuted, but
it's hard to tell.
With these changes, nothing in LegalizeDAG produces
illegal integer types anymore. This is a prerequisite
for removing the LegalizeDAG type legalization code.
While there I noticed that the existing code doesn't
handle trunc store of f64 to f32: it turns this into
an i64 store, which represents a 4 byte stack smash.
I added a FIXME about this. Hopefully someone more
motivated than I am will take care of it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60964 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 637ed03173fdd154b1736e09358ba608036952b7 |
12-Dec-2008 |
Evan Cheng <evan.cheng@apple.com> |
Fix add/sub expansion: don't create ADD / SUB with two results (seems like everyone is doing this these days :-). Patch by Daniel M Gessel!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60958 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 2bdd3d948d66308516f7dc19dc4f516d8d237b6e |
12-Dec-2008 |
Evan Cheng <evan.cheng@apple.com> |
Fix add/sub expansion: don't create ADD / SUB with two results (seems like everyone is doing this these days :-). Patch by Daniel M Gessel!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60958 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 712f7b3f549644190e90210a07988753f53daa0a |
12-Dec-2008 |
Duncan Sands <baldrick@free.fr> |
When using a 4 byte jump table on a 64 bit machine,
do an extending load of the 4 bytes rather than a
potentially illegal (type) i32 load followed by a
sign extend.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60945 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 12ddc807ca69485025dc1fcfec141dd9367a63ce |
12-Dec-2008 |
Duncan Sands <baldrick@free.fr> |
When using a 4 byte jump table on a 64 bit machine,
do an extending load of the 4 bytes rather than a
potentially illegal (type) i32 load followed by a
sign extend.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60945 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 9e5ecb8f8f3b639874b943702a3dd1d0739bb9b9 |
12-Dec-2008 |
Mon P Wang <wangmp@apple.com> |
Added support for SELECT v8i8 v4i16 for X86 (MMX)
Added support for TRUNC v8i16 to v8i8 for X86 (MMX)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60916 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 83edba507f0682691a5b82dd07f877ea0dbeddc0 |
12-Dec-2008 |
Mon P Wang <wangmp@apple.com> |
Added support for SELECT v8i8 v4i16 for X86 (MMX)
Added support for TRUNC v8i16 to v8i8 for X86 (MMX)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60916 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| ab55ebda1c2254f98b06e770bc2dae7d05a4a366 |
12-Dec-2008 |
Bill Wendling <isanbard@gmail.com> |
Redo the arithmetic with overflow architecture. I was changing the semantics of
ISD::ADD to emit an implicit EFLAGS. This was horribly broken. Instead, replace
the intrinsic with an ISD::SADDO node. Then custom lower that into an
X86ISD::ADD node with a associated SETCC that checks the correct condition code
(overflow or carry). Then that gets lowered into the correct X86::ADDOvf
instruction.
Similar for SUB and MUL instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60915 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| ae034ed6a84ffef03fc47e31c29e6c3c7ce42d40 |
12-Dec-2008 |
Bill Wendling <isanbard@gmail.com> |
Redo the arithmetic with overflow architecture. I was changing the semantics of
ISD::ADD to emit an implicit EFLAGS. This was horribly broken. Instead, replace
the intrinsic with an ISD::SADDO node. Then custom lower that into an
X86ISD::ADD node with a associated SETCC that checks the correct condition code
(overflow or carry). Then that gets lowered into the correct X86::ADDOvf
instruction.
Similar for SUB and MUL instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60915 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 6db08c4d2f2e1f1f83e845031bfee9017b126c5a |
11-Dec-2008 |
Mon P Wang <wangmp@apple.com> |
Avoid generating a convert_rndsat node when the src and dest type are the same.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60869 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| fa252e56029c5a375f9c1f5d281f14eebb6e39be |
11-Dec-2008 |
Mon P Wang <wangmp@apple.com> |
Avoid generating a convert_rndsat node when the src and dest type are the same.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60869 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 775bb805c5a5a7ba6e4ccac85f650372a51e0273 |
11-Dec-2008 |
Bill Wendling <isanbard@gmail.com> |
Clarify FIXME.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60867 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 7fe2bf65f5225014dd11c5806740ee5cae11f491 |
11-Dec-2008 |
Bill Wendling <isanbard@gmail.com> |
Clarify FIXME.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60867 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| f67303d2565590bdf77a0d7d95d75f284f14cdd3 |
11-Dec-2008 |
Mon P Wang <wangmp@apple.com> |
Whitespace clean up (tabs with spaces)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60866 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 72fe546583d615b87f90f0ae100fcdb66abd4f81 |
11-Dec-2008 |
Mon P Wang <wangmp@apple.com> |
Whitespace clean up (tabs with spaces)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60866 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| a60b5236c1acd31e2aca5705c8bbbd2946ea0873 |
11-Dec-2008 |
Mon P Wang <wangmp@apple.com> |
Make fix for r60829 less conservative to allow the proper optimization for
vec_extract-sse4.ll.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60865 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 3c67310adc35c88e4d90ec4f8d39e58b8220d55b |
11-Dec-2008 |
Mon P Wang <wangmp@apple.com> |
Make fix for r60829 less conservative to allow the proper optimization for
vec_extract-sse4.ll.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60865 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 2476e5d3458ea3543f233159fcf4f2fea47426e9 |
10-Dec-2008 |
Bill Wendling <isanbard@gmail.com> |
If ADD, SUB, or MUL have an overflow bit that's used, don't do transformation on
them. The DAG combiner expects that nodes that are transformed have one value
result.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60857 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| c43c7eea3d8896246a46cc9546e9c70143c12d07 |
10-Dec-2008 |
Bill Wendling <isanbard@gmail.com> |
If ADD, SUB, or MUL have an overflow bit that's used, don't do transformation on
them. The DAG combiner expects that nodes that are transformed have one value
result.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60857 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| ab0c578bfd1380326830180a9209df6c5be58887 |
10-Dec-2008 |
Duncan Sands <baldrick@free.fr> |
For amusement, implement SADDO, SSUBO, UADDO, USUBO
for promoted integer types, eg: i16 on ppc-32, or
i24 on any platform. Complete support for arbitrary
precision integers would require handling expanded
integer types, eg: i128, but I couldn't be bothered.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60834 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeIntegerTypes.cpp
egalizeTypes.h
|
| 77476735d07b324a55bebe1431d2794b3d8b75b7 |
10-Dec-2008 |
Duncan Sands <baldrick@free.fr> |
For amusement, implement SADDO, SSUBO, UADDO, USUBO
for promoted integer types, eg: i16 on ppc-32, or
i24 on any platform. Complete support for arbitrary
precision integers would require handling expanded
integer types, eg: i128, but I couldn't be bothered.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60834 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeIntegerTypes.cpp
egalizeTypes.h
|
| bae527d949949da0cf45d279990eee21e7c66108 |
10-Dec-2008 |
Mon P Wang <wangmp@apple.com> |
Fixed a bug when trying to optimize a extract vector element of a
bit convert that changes the number of elements of a shuffle.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60829 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| bc66e46f48e22e4b348de0bcb33928293285dca6 |
10-Dec-2008 |
Mon P Wang <wangmp@apple.com> |
Fixed a bug when trying to optimize a extract vector element of a
bit convert that changes the number of elements of a shuffle.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60829 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| bc5e15eafb3c39a214631087b6827a5691e9b25c |
10-Dec-2008 |
Bill Wendling <isanbard@gmail.com> |
Whitespace changes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60826 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 35f1a9d21de3950385c014522d474a2ad7c6504c |
10-Dec-2008 |
Bill Wendling <isanbard@gmail.com> |
Whitespace changes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60826 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 2ce4e5caddeacac0bde7933ce586a794bac2019b |
10-Dec-2008 |
Bill Wendling <isanbard@gmail.com> |
Whitespace fixes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60818 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuild.cpp
|
| ea340c7537e3ffb37dd89258d504823c6910f4da |
10-Dec-2008 |
Bill Wendling <isanbard@gmail.com> |
Whitespace fixes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60818 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuild.cpp
|
| 54e4c36a7349e94a84773afb56eccd4ca65b49e9 |
09-Dec-2008 |
Dan Gohman <gohman@apple.com> |
Rewrite the SDep class, and simplify some of the related code.
The Cost field is removed. It was only being used in a very limited way,
to indicate when the scheduler should attempt to protect a live register,
and it isn't really needed to do that. If we ever want the scheduler to
start inserting copies in non-prohibitive situations, we'll have to
rethink some things anyway.
A Latency field is added. Instead of giving each node a single
fixed latency, each edge can have its own latency. This will eventually
be used to model various micro-architecture properties more accurately.
The PointerIntPair class and an internal union are now used, which
reduce the overall size.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60806 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGFast.cpp
cheduleDAGList.cpp
cheduleDAGRRList.cpp
cheduleDAGSDNodes.cpp
|
| 604394b2eb5ccda3858f8285a8c9b0c72cb2a997 |
09-Dec-2008 |
Dan Gohman <gohman@apple.com> |
Rewrite the SDep class, and simplify some of the related code.
The Cost field is removed. It was only being used in a very limited way,
to indicate when the scheduler should attempt to protect a live register,
and it isn't really needed to do that. If we ever want the scheduler to
start inserting copies in non-prohibitive situations, we'll have to
rethink some things anyway.
A Latency field is added. Instead of giving each node a single
fixed latency, each edge can have its own latency. This will eventually
be used to model various micro-architecture properties more accurately.
The PointerIntPair class and an internal union are now used, which
reduce the overall size.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60806 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGFast.cpp
cheduleDAGList.cpp
cheduleDAGRRList.cpp
cheduleDAGSDNodes.cpp
|
| 74c376529101acbe141a256d0bf23a44eb454c84 |
09-Dec-2008 |
Bill Wendling <isanbard@gmail.com> |
Add sub/mul overflow intrinsics. This currently doesn't have a
target-independent way of determining overflow on multiplication. It's very
tricky. Patch by Zoltan Varga!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60800 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
egalizeIntegerTypes.cpp
egalizeTypes.h
electionDAG.cpp
electionDAGBuild.cpp
electionDAGBuild.h
|
| 7e04be6e4a44faffa7b5fb0d630b580214262a6d |
09-Dec-2008 |
Bill Wendling <isanbard@gmail.com> |
Add sub/mul overflow intrinsics. This currently doesn't have a
target-independent way of determining overflow on multiplication. It's very
tricky. Patch by Zoltan Varga!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60800 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
egalizeIntegerTypes.cpp
egalizeTypes.h
electionDAG.cpp
electionDAGBuild.cpp
electionDAGBuild.h
|
| 47d9dcc584cdb7fd645ca1d5c2a0ce363570aeb7 |
09-Dec-2008 |
Duncan Sands <baldrick@free.fr> |
Fix PR3117: not all nodes being legalized. The
essential problem was that the DAG can contain
random unused nodes which were never analyzed.
When remapping a value of a node being processed,
such a node may become used and need to be analyzed;
however due to operands being transformed during
analysis the node may morph into a different one.
Users of the morphing node need to be updated, and
this wasn't happening. While there I added a bunch
of documentation and sanity checks, so I (or some
other poor soul) won't have to scratch their head
over this stuff so long trying to remember how it
was all supposed to work next time some obscure
problem pops up! The extra sanity checking exposed
a few places where invariants weren't being preserved,
so those are fixed too. Since some of the sanity
checking is expensive, I added a flag to turn it
on. It is also turned on when building with
ENABLE_EXPENSIVE_CHECKS=1.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60797 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeFloatTypes.cpp
egalizeIntegerTypes.cpp
egalizeTypes.cpp
egalizeTypes.h
egalizeTypesGeneric.cpp
egalizeVectorTypes.cpp
electionDAG.cpp
|
| 871e55f9c2bfb591aa085405b67be46bc646dee5 |
09-Dec-2008 |
Duncan Sands <baldrick@free.fr> |
Fix PR3117: not all nodes being legalized. The
essential problem was that the DAG can contain
random unused nodes which were never analyzed.
When remapping a value of a node being processed,
such a node may become used and need to be analyzed;
however due to operands being transformed during
analysis the node may morph into a different one.
Users of the morphing node need to be updated, and
this wasn't happening. While there I added a bunch
of documentation and sanity checks, so I (or some
other poor soul) won't have to scratch their head
over this stuff so long trying to remember how it
was all supposed to work next time some obscure
problem pops up! The extra sanity checking exposed
a few places where invariants weren't being preserved,
so those are fixed too. Since some of the sanity
checking is expensive, I added a flag to turn it
on. It is also turned on when building with
ENABLE_EXPENSIVE_CHECKS=1.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60797 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeFloatTypes.cpp
egalizeIntegerTypes.cpp
egalizeTypes.cpp
egalizeTypes.h
egalizeTypesGeneric.cpp
egalizeVectorTypes.cpp
electionDAG.cpp
|
| 1cd46bbb1c6b1c3cb33bbbd3beb97f0c0373df80 |
09-Dec-2008 |
Mon P Wang <wangmp@apple.com> |
In LegalizeOp, don't change the result type of CONVERT_RNDSAT when promoting
one of its operand.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60749 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 2fc3f9e0811f456843b6611002d7f923ef2e0a0f |
09-Dec-2008 |
Mon P Wang <wangmp@apple.com> |
In LegalizeOp, don't change the result type of CONVERT_RNDSAT when promoting
one of its operand.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60749 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| e9f1015d1f184a51aaadfd03be0846bd5e7d08a2 |
09-Dec-2008 |
Mon P Wang <wangmp@apple.com> |
Fix getNode to allow a vector for the shift amount for shifts of vectors.
Fix the shift amount when unrolling a vector shift into scalar shifts.
Fix problem in getShuffleScalarElt where it assumes that the input of
a bit convert must be a vector.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60740 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
electionDAG.cpp
|
| 9901e73caec653599f27d04075961afe4a7c29a1 |
09-Dec-2008 |
Mon P Wang <wangmp@apple.com> |
Fix getNode to allow a vector for the shift amount for shifts of vectors.
Fix the shift amount when unrolling a vector shift into scalar shifts.
Fix problem in getShuffleScalarElt where it assumes that the input of
a bit convert must be a vector.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60740 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
electionDAG.cpp
|
| c8a1a3c426209e9c7b35e279e1578a89edc40af6 |
08-Dec-2008 |
Dan Gohman <gohman@apple.com> |
Factor out the code for sign-extending/truncating gep indices
and use it in x86 address mode folding. Also, make
getRegForValue return 0 for illegal types even if it has a
ValueMap for them, because Argument values are put in the
ValueMap. This fixes PR3181.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60696 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
|
| 009a81ff8815b78422d27f3b8ad2d90a56dffb02 |
08-Dec-2008 |
Dan Gohman <gohman@apple.com> |
Factor out the code for sign-extending/truncating gep indices
and use it in x86 address mode folding. Also, make
getRegForValue return 0 for illegal types even if it has a
ValueMap for them, because Argument values are put in the
ValueMap. This fixes PR3181.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60696 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
|
| 9304f2c294752a3cfbc2c91ebed903cc53317dc1 |
04-Dec-2008 |
Duncan Sands <baldrick@free.fr> |
When allocating a stack temporary, use the correct
number of bytes for types such as i1 which are not
a multiple of 8 bits in length.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60543 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 760997765ebcc690c5db3e0f0258f7ff19855b1d |
04-Dec-2008 |
Duncan Sands <baldrick@free.fr> |
When allocating a stack temporary, use the correct
number of bytes for types such as i1 which are not
a multiple of 8 bits in length.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60543 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| b29ffc88701fc373c832ea2e7142ad6f72eef050 |
04-Dec-2008 |
Dan Gohman <gohman@apple.com> |
Make debug output more informative.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60524 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGRRList.cpp
|
| f2c0d4fa033fdf51ffd8a90432a1947bdb5ee793 |
04-Dec-2008 |
Dan Gohman <gohman@apple.com> |
Make debug output more informative.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60524 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGRRList.cpp
|
| 8b8e5a7f9648bc7e39dc28607c5ade43aaafb3af |
03-Dec-2008 |
Duncan Sands <baldrick@free.fr> |
Only check that the result of the mapping was not
a new node if the node was actually remapped.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60482 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeTypes.cpp
|
| 4c2c6e1baa0275fe03c9abbff316e9d31c542d6e |
03-Dec-2008 |
Duncan Sands <baldrick@free.fr> |
Only check that the result of the mapping was not
a new node if the node was actually remapped.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60482 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeTypes.cpp
|
| 96da0419490148e42dbab6984c07e28ec66a591d |
02-Dec-2008 |
Evan Cheng <evan.cheng@apple.com> |
Remove a (what appears to be) overly strict assertion. Here is what happened:
1. ppcf128 select is expanded to f64 select's.
2. f64 select operand 0 is an i1 truncate, it's promoted to i32 zero_extend.
3. f64 select is updated. It's changed back to a "NewNode" and being re-analyzed.
4. f64 select operands are being processed. Operand 0 is a "NewNode". It's being expunged out of ReplacedValues map.
5. ExpungeNode tries to remap f64 select and notice it's a "NewNode" and assert.
Duncan, please take a look. Thanks.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60443 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeTypes.cpp
|
| 79f027da75139f2f7273f3f2fa83d1b567a1daf8 |
02-Dec-2008 |
Evan Cheng <evan.cheng@apple.com> |
Remove a (what appears to be) overly strict assertion. Here is what happened:
1. ppcf128 select is expanded to f64 select's.
2. f64 select operand 0 is an i1 truncate, it's promoted to i32 zero_extend.
3. f64 select is updated. It's changed back to a "NewNode" and being re-analyzed.
4. f64 select operands are being processed. Operand 0 is a "NewNode". It's being expunged out of ReplacedValues map.
5. ExpungeNode tries to remap f64 select and notice it's a "NewNode" and assert.
Duncan, please take a look. Thanks.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60443 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeTypes.cpp
|
| 546d7b5c4a3cebf0d5017d42302b4a8d1c8ef584 |
02-Dec-2008 |
Scott Michel <scottm@aero.org> |
Non-functional change: make custom lowering for truncate stylistically
consistent with the way it's generally done in other places.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60439 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| e9b8a40ef17f2a3260fcdc4d2b03852d73170145 |
02-Dec-2008 |
Scott Michel <scottm@aero.org> |
Non-functional change: make custom lowering for truncate stylistically
consistent with the way it's generally done in other places.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60439 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 34d7985927bbd31e16c7de3346eaf3426348ecb1 |
02-Dec-2008 |
Dale Johannesen <dalej@apple.com> |
One more transformation.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60432 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| d29920f900f45791a24f51892b2eb12efe79639f |
02-Dec-2008 |
Dale Johannesen <dalej@apple.com> |
One more transformation.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60432 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| b0a5cdd4511d02afacd0cd39223cf6c52a6ef361 |
02-Dec-2008 |
Tilmann Scheller <tilmann.scheller@googlemail.com> |
make it possible to custom lower TRUNCATE (needed for the CellSPU target)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60409 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| bfc55eea7e43acf7d966c433e85d633095a11440 |
02-Dec-2008 |
Tilmann Scheller <tilmann.scheller@googlemail.com> |
make it possible to custom lower TRUNCATE (needed for the CellSPU target)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60409 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| fb13f008cb2a6a51d2d590f994051586774734a1 |
02-Dec-2008 |
Mon P Wang <wangmp@apple.com> |
Removed some unnecessary code in widening.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60406 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| d5638266a25d55711e17823963d5d99b886b7a91 |
02-Dec-2008 |
Mon P Wang <wangmp@apple.com> |
Removed some unnecessary code in widening.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60406 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 221cd2f0813be675784b9825aee9f74f22026247 |
02-Dec-2008 |
Dale Johannesen <dalej@apple.com> |
Add a few more transformations.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60391 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| d1feb58735159bd11f17c9732883dc9b323f61e8 |
02-Dec-2008 |
Dale Johannesen <dalej@apple.com> |
Add a few more transformations.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60391 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 13d6d446f62f908e8cf74acb3a4df65ea5f497ce |
02-Dec-2008 |
Bill Wendling <isanbard@gmail.com> |
Expand getVTList, getNodeValueTypes, and SelectNodeTo to handle more value types.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60381 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 7a4076f1adb870680b20df6ec98507e419fb0bd6 |
02-Dec-2008 |
Bill Wendling <isanbard@gmail.com> |
Expand getVTList, getNodeValueTypes, and SelectNodeTo to handle more value types.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60381 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| aaffa05d0a652dd3eae76a941d02d6b0469fa821 |
01-Dec-2008 |
Duncan Sands <baldrick@free.fr> |
There are no longer any places that require a
MERGE_VALUES node with only one operand, so get
rid of special code that only existed to handle
that possibility.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60349 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
electionDAG.cpp
electionDAGBuild.cpp
|
| 42d7bb80eff3a86ca5790d950c399d294b6f9b0e |
01-Dec-2008 |
Duncan Sands <baldrick@free.fr> |
There are no longer any places that require a
MERGE_VALUES node with only one operand, so get
rid of special code that only existed to handle
that possibility.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60349 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
electionDAG.cpp
electionDAGBuild.cpp
|
| 1607f05cb7d77d01ce521a30232faa389dbed4e2 |
01-Dec-2008 |
Duncan Sands <baldrick@free.fr> |
Change the interface to the type legalization method
ReplaceNodeResults: rather than returning a node which
must have the same number of results as the original
node (which means mucking around with MERGE_VALUES,
and which is also easy to get wrong since SelectionDAG
folding may mean you don't get the node you expect),
return the results in a vector.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60348 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
egalizeFloatTypes.cpp
egalizeIntegerTypes.cpp
egalizeTypes.cpp
egalizeTypes.h
|
| 7d9834be329543d61f747af9b48be539492d8974 |
01-Dec-2008 |
Duncan Sands <baldrick@free.fr> |
Change the interface to the type legalization method
ReplaceNodeResults: rather than returning a node which
must have the same number of results as the original
node (which means mucking around with MERGE_VALUES,
and which is also easy to get wrong since SelectionDAG
folding may mean you don't get the node you expect),
return the results in a vector.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60348 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
egalizeFloatTypes.cpp
egalizeIntegerTypes.cpp
egalizeTypes.cpp
egalizeTypes.h
|
| fc69cb475f3df50fb47c0cf8df90c2a77b7ff36a |
30-Nov-2008 |
Eli Friedman <eli.friedman@gmail.com> |
Followup to r60283: optimize arbitrary width signed divisions as well
as unsigned divisions. Same caveats as before.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60284 91177308-0d34-0410-b5e6-96231b3b80d8
argetLowering.cpp
|
| 2589b503cca3c6850f49d65d2396c72ad7e4132a |
30-Nov-2008 |
Eli Friedman <eli.friedman@gmail.com> |
Followup to r60283: optimize arbitrary width signed divisions as well
as unsigned divisions. Same caveats as before.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60284 91177308-0d34-0410-b5e6-96231b3b80d8
argetLowering.cpp
|
| 201c9776bd4197569b71fef0519f98a28d1db989 |
30-Nov-2008 |
Eli Friedman <eli.friedman@gmail.com> |
Fix for PR2164: allow transforming arbitrary-width unsigned divides into
multiplies.
Some more cleverness would be nice, though. It would be nice if we
could do this transformation on illegal types. Also, we would
prefer a narrower constant when possible so that we can use a narrower
multiply, which can be cheaper.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60283 91177308-0d34-0410-b5e6-96231b3b80d8
argetLowering.cpp
|
| ca009721b9835254fdb88342912864de7c2feae5 |
30-Nov-2008 |
Eli Friedman <eli.friedman@gmail.com> |
Fix for PR2164: allow transforming arbitrary-width unsigned divides into
multiplies.
Some more cleverness would be nice, though. It would be nice if we
could do this transformation on illegal types. Also, we would
prefer a narrower constant when possible so that we can use a narrower
multiply, which can be cheaper.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60283 91177308-0d34-0410-b5e6-96231b3b80d8
argetLowering.cpp
|
| 86f874d9bb3722e81381e832eb4c867f562e308c |
30-Nov-2008 |
Eli Friedman <eli.friedman@gmail.com> |
APIntify a test which is potentially unsafe otherwise, and fix the
nearby FIXME.
I'm not sure what the right way to fix the Cell test was; if the
approach I used isn't okay, please let me know.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60277 91177308-0d34-0410-b5e6-96231b3b80d8
argetLowering.cpp
|
| 156a66847d6988b5947b5d62e7e65648e7aa5c6f |
30-Nov-2008 |
Eli Friedman <eli.friedman@gmail.com> |
APIntify a test which is potentially unsafe otherwise, and fix the
nearby FIXME.
I'm not sure what the right way to fix the Cell test was; if the
approach I used isn't okay, please let me know.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60277 91177308-0d34-0410-b5e6-96231b3b80d8
argetLowering.cpp
|
| 9b0f0b5e1505dcd4ec0da87ea9e29c59d98a8d27 |
27-Nov-2008 |
Sanjiv Gupta <sanjiv.gupta@microchip.com> |
Removing redundant semicolons. No functionality change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60149 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| d57f2e16f8bc6dfdf13e7866b5eb0adef32445e4 |
27-Nov-2008 |
Sanjiv Gupta <sanjiv.gupta@microchip.com> |
Removing redundant semicolons. No functionality change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60149 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 56eca9103ecbf2293842bfd6067ac26629221eaf |
27-Nov-2008 |
Dale Johannesen <dalej@apple.com> |
Add a missing case in visitADD.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60137 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| e7e5da3e66cf237a697dfb94bcbd0c99668a13e2 |
27-Nov-2008 |
Dale Johannesen <dalej@apple.com> |
Add a missing case in visitADD.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60137 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| d3f01aa5a1c0242ea0a6294f13e1d078ce2b0938 |
26-Nov-2008 |
Sanjiv Gupta <sanjiv.gupta@microchip.com> |
Allow custom lowering of ADDE/ADDC/SUBE/SUBC operations.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60102 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 7a61e7fd8f293bda18c9e46eeda4e4400b0b8ab6 |
26-Nov-2008 |
Sanjiv Gupta <sanjiv.gupta@microchip.com> |
Allow custom lowering of ADDE/ADDC/SUBE/SUBC operations.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60102 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 740464e6164e503f3c01d2b13a52c0261042abe0 |
25-Nov-2008 |
Bill Wendling <isanbard@gmail.com> |
A simplification for checking whether the signs of the operands and sum differ. Thanks, Duncan.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60043 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| cf4de126b17196ba81d1876ccd304130eb3ca662 |
25-Nov-2008 |
Bill Wendling <isanbard@gmail.com> |
A simplification for checking whether the signs of the operands and sum differ. Thanks, Duncan.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60043 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| a6af91ae124d0713cfabcea8c5f508091dd7a556 |
25-Nov-2008 |
Bill Wendling <isanbard@gmail.com> |
Now with the correct type for the 0.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60016 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| c65e6e4ce26caba2a6c07467ab45f74f708ffbe7 |
25-Nov-2008 |
Bill Wendling <isanbard@gmail.com> |
Now with the correct type for the 0.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60016 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 7ebfea41755c1f7b45fe5cad005ad2ea701c508e |
25-Nov-2008 |
Bill Wendling <isanbard@gmail.com> |
Get rid of unused variable.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60015 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 910488477f3f5dac9f709522e708dd36a1e88779 |
25-Nov-2008 |
Bill Wendling <isanbard@gmail.com> |
Get rid of unused variable.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60015 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| c0062fb7557c9f4eb66b7d8fa7b6b0c765e579b8 |
25-Nov-2008 |
Bill Wendling <isanbard@gmail.com> |
Hacker's Delight says, "Signed integer overflow of addition occurs if and only
if the operands have the same sign and the sum has sign opposite to that of the
operands."
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60014 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 6c4e3e07b6722e380f5d7917df47058101fd71bb |
25-Nov-2008 |
Bill Wendling <isanbard@gmail.com> |
Hacker's Delight says, "Signed integer overflow of addition occurs if and only
if the operands have the same sign and the sum has sign opposite to that of the
operands."
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60014 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 21d9003087c9a707e6cd95460136b499df358fb8 |
25-Nov-2008 |
Dan Gohman <gohman@apple.com> |
Initial support for anti-dependence breaking. Currently this code does not
introduce any new spilling; it just uses unused registers.
Refactor the SUnit topological sort code out of the RRList scheduler and
make use of it to help with the post-pass scheduler.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59999 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGRRList.cpp
|
| c2c90e22cede15fab5b9a52a39afaf8d04944135 |
25-Nov-2008 |
Dan Gohman <gohman@apple.com> |
Initial support for anti-dependence breaking. Currently this code does not
introduce any new spilling; it just uses unused registers.
Refactor the SUnit topological sort code out of the RRList scheduler and
make use of it to help with the post-pass scheduler.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59999 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGRRList.cpp
|
| 41ea7e7eb3a6a269f2bfed0bdc191ea046d18e5e |
24-Nov-2008 |
Bill Wendling <isanbard@gmail.com> |
- Make lowering of "add with overflow" customizable by back-ends.
- Mark "add with overflow" as having a custom lowering for X86. Give it a null
lowering representation for now.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59971 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
electionDAGBuild.cpp
|
| 4c134dfa957802f1851046aa972da1fc5cdba0b5 |
24-Nov-2008 |
Bill Wendling <isanbard@gmail.com> |
- Make lowering of "add with overflow" customizable by back-ends.
- Mark "add with overflow" as having a custom lowering for X86. Give it a null
lowering representation for now.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59971 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
electionDAGBuild.cpp
|
| 942b8c853375ae6a3e84f4b0a70f6d4e194ea594 |
24-Nov-2008 |
Dan Gohman <gohman@apple.com> |
Check in the rest of this change. The isAntiDep flag needs to be passed
to removePred because an SUnit can both data-depend and anti-depend
on the same SUnit.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59969 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGFast.cpp
cheduleDAGRRList.cpp
|
| 49366c29d2e7ea80a585757ef22dab7272a86a8c |
24-Nov-2008 |
Dan Gohman <gohman@apple.com> |
Check in the rest of this change. The isAntiDep flag needs to be passed
to removePred because an SUnit can both data-depend and anti-depend
on the same SUnit.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59969 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGFast.cpp
cheduleDAGRRList.cpp
|
| 25cf2275ff7de3de3bc0e508abaf457413d74725 |
24-Nov-2008 |
Duncan Sands <baldrick@free.fr> |
If the type legalizer actually legalized anything
(this doesn't happen that often, since most code
does not use illegal types) then follow it by a
DAG combiner run that is allowed to generate
illegal operations but not illegal types. I didn't
modify the target combiner code to distinguish like
this between illegal operations and illegal types,
so it will not produce illegal operations as well
as not producing illegal types.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59960 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
egalizeTypes.cpp
egalizeTypes.h
electionDAGISel.cpp
|
| a3e2cd08d62cb0602413589986bcd6e94ea56ba3 |
24-Nov-2008 |
Duncan Sands <baldrick@free.fr> |
If the type legalizer actually legalized anything
(this doesn't happen that often, since most code
does not use illegal types) then follow it by a
DAG combiner run that is allowed to generate
illegal operations but not illegal types. I didn't
modify the target combiner code to distinguish like
this between illegal operations and illegal types,
so it will not produce illegal operations as well
as not producing illegal types.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59960 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
egalizeTypes.cpp
egalizeTypes.h
electionDAGISel.cpp
|
| 24ac408ce891321d1a5d62beaf3487efce6f2b22 |
24-Nov-2008 |
Evan Cheng <evan.cheng@apple.com> |
Eliminate some unused variable compile time warnings.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59952 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
egalizeDAG.cpp
electionDAG.cpp
|
| cf576fd7d2bf5153fce9e451b1fcb1456a49c6bc |
24-Nov-2008 |
Evan Cheng <evan.cheng@apple.com> |
Eliminate some unused variable compile time warnings.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59952 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
egalizeDAG.cpp
electionDAG.cpp
|
| def27392c1b4792f695b4eb681cd024ade4025bf |
24-Nov-2008 |
Bill Wendling <isanbard@gmail.com> |
Add support for llvm.uadd.with.overflow.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59926 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 8062b078b526948d2f2879da7c2bd0921389120f |
24-Nov-2008 |
Bill Wendling <isanbard@gmail.com> |
Add support for llvm.uadd.with.overflow.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59926 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 03228089d5235f8c90477f88809139464e9c6ea5 |
23-Nov-2008 |
Duncan Sands <baldrick@free.fr> |
Rename SetCCResultContents to BooleanContents. In
practice these booleans are mostly produced by SetCC,
however the concept is more general.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59911 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
egalizeIntegerTypes.cpp
egalizeVectorTypes.cpp
electionDAG.cpp
argetLowering.cpp
|
| 8cf4a828c81246eacf7ee4d0113356a32466505a |
23-Nov-2008 |
Duncan Sands <baldrick@free.fr> |
Rename SetCCResultContents to BooleanContents. In
practice these booleans are mostly produced by SetCC,
however the concept is more general.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59911 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
egalizeIntegerTypes.cpp
egalizeVectorTypes.cpp
electionDAG.cpp
argetLowering.cpp
|
| 6cce3dae900152203a51299e928d8ec738537d6a |
23-Nov-2008 |
Mon P Wang <wangmp@apple.com> |
Added check to avoid generating extract subvector beyond the end of the vector when normalizing vector shuffles.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59900 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuild.cpp
|
| 87d4dd5398ff67c742484837734fd87761d6f369 |
23-Nov-2008 |
Mon P Wang <wangmp@apple.com> |
Added check to avoid generating extract subvector beyond the end of the vector when normalizing vector shuffles.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59900 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuild.cpp
|
| 253174bf50c932abaa680f465e2888c0e5272267 |
22-Nov-2008 |
Bill Wendling <isanbard@gmail.com> |
Cleanup of the [SU]ADDO type legalization code. Patch by Duncan!
"It simplifies the type legalization part a bit, and produces better code by
teaching SelectionDAG about the extra bits in an i8 SADDO/UADDO node. In
essence, I spontaneously decided that on x86 this i8 boolean result would be
either 0 or 1, and on other platforms 0/1 or 0/-1, depending on whether the
platform likes it's boolean zero extended or sign extended."
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59864 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeIntegerTypes.cpp
egalizeTypes.h
electionDAG.cpp
|
| f8bb44039c56063c3e0bf6224f1abf20c844ad91 |
22-Nov-2008 |
Bill Wendling <isanbard@gmail.com> |
Cleanup of the [SU]ADDO type legalization code. Patch by Duncan!
"It simplifies the type legalization part a bit, and produces better code by
teaching SelectionDAG about the extra bits in an i8 SADDO/UADDO node. In
essence, I spontaneously decided that on x86 this i8 boolean result would be
either 0 or 1, and on other platforms 0/1 or 0/-1, depending on whether the
platform likes it's boolean zero extended or sign extended."
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59864 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeIntegerTypes.cpp
egalizeTypes.h
electionDAG.cpp
|
| 8ac0d4b4fb10406278cd600214cd3ee6d76620cd |
22-Nov-2008 |
Bill Wendling <isanbard@gmail.com> |
- Move conversion of [SU]ADDO from DAG combiner into legalizer.
- Add "promote integer type" stuff to the legalizer for these nodes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59847 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
egalizeDAG.cpp
egalizeIntegerTypes.cpp
egalizeTypes.h
|
| 913dcf35c3b19eebc8f8fcd7733faf2e5cd4bc84 |
22-Nov-2008 |
Bill Wendling <isanbard@gmail.com> |
- Move conversion of [SU]ADDO from DAG combiner into legalizer.
- Add "promote integer type" stuff to the legalizer for these nodes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59847 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
egalizeDAG.cpp
egalizeIntegerTypes.cpp
egalizeTypes.h
|
| 3ebd0eeaeb94b7f607409408e3c25024db671b66 |
21-Nov-2008 |
Dan Gohman <gohman@apple.com> |
Update comments.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59834 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 6e78031d9bec7d2b457dd4dd204126d35b3f9325 |
21-Nov-2008 |
Dan Gohman <gohman@apple.com> |
Update comments.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59834 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 824b958e6fb1236e92e4d07f3acf18fca107cdc0 |
21-Nov-2008 |
Chris Lattner <sabre@nondot.org> |
reapply Sanjiv's patch to genericize memcpy/memset/memmove to take an
arbitrary integer width for the count.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59823 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuild.cpp
|
| 82c2e4332a1578fce36412e997c4a563b3f66274 |
21-Nov-2008 |
Chris Lattner <sabre@nondot.org> |
reapply Sanjiv's patch to genericize memcpy/memset/memmove to take an
arbitrary integer width for the count.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59823 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuild.cpp
|
| dc770929cb2f97397970e2942b746839fc387992 |
21-Nov-2008 |
Bill Wendling <isanbard@gmail.com> |
Revert r59802. It was breaking the build of llvm-gcc:
g++ -m32 -c -g -DIN_GCC -W -Wall -Wwrite-strings -Wmissing-format-attribute -fno-common -mdynamic-no-pic -DHAVE_CONFIG_H -Wno-unused -DTARGET_NAME=\"i386-apple-darwin9.5.0\" -I. -I. -I../../llvm-gcc.src/gcc -I../../llvm-gcc.src/gcc/. -I../../llvm-gcc.src/gcc/../include -I./../intl -I../../llvm-gcc.src/gcc/../libcpp/include -I../../llvm-gcc.src/gcc/../libdecnumber -I../libdecnumber -I/Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm.obj/include -I/Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm.src/include -DENABLE_LLVM -I/Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm.obj/../llvm.src/include -D_DEBUG -D_GNU_SOURCE -D__STDC_LIMIT_MACROS -D__STDC_CONSTANT_MACROS -I. -I. -I../../llvm-gcc.src/gcc -I../../llvm-gcc.src/gcc/. -I../../llvm-gcc.src/gcc/../include -I./../intl -I../../llvm-gcc.src/gcc/../libcpp/include -I../../llvm-gcc.src/gcc/../libdecnumber -I../libdecnumber -I/Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm.obj/include -I/Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm.src/include ../../llvm-gcc.src/gcc/llvm-types.cpp -o llvm-types.o
../../llvm-gcc.src/gcc/llvm-convert.cpp: In member function 'void TreeToLLVM::EmitMemCpy(llvm::Value*, llvm::Value*, llvm::Value*, unsigned int)':
../../llvm-gcc.src/gcc/llvm-convert.cpp:1496: error: 'memcpy_i32' is not a member of 'llvm::Intrinsic'
../../llvm-gcc.src/gcc/llvm-convert.cpp:1496: error: 'memcpy_i64' is not a member of 'llvm::Intrinsic'
../../llvm-gcc.src/gcc/llvm-convert.cpp: In member function 'void TreeToLLVM::EmitMemMove(llvm::Value*, llvm::Value*, llvm::Value*, unsigned int)':
../../llvm-gcc.src/gcc/llvm-convert.cpp:1512: error: 'memmove_i32' is not a member of 'llvm::Intrinsic'
../../llvm-gcc.src/gcc/llvm-convert.cpp:1512: error: 'memmove_i64' is not a member of 'llvm::Intrinsic'
../../llvm-gcc.src/gcc/llvm-convert.cpp: In member function 'void TreeToLLVM::EmitMemSet(llvm::Value*, llvm::Value*, llvm::Value*, unsigned int)':
../../llvm-gcc.src/gcc/llvm-convert.cpp:1528: error: 'memset_i32' is not a member of 'llvm::Intrinsic'
../../llvm-gcc.src/gcc/llvm-convert.cpp:1528: error: 'memset_i64' is not a member of 'llvm::Intrinsic'
make[3]: *** [llvm-convert.o] Error 1
make[3]: *** Waiting for unfinished jobs....
rm fsf-funding.pod gcov.pod gfdl.pod cpp.pod gpl.pod gcc.pod
make[2]: *** [all-stage1-gcc] Error 2
make[1]: *** [stage1-bubble] Error 2
make: *** [all] Error 2
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59809 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuild.cpp
|
| 39d5f588224111a18ad441069eb9ebef0ba2f8f9 |
21-Nov-2008 |
Bill Wendling <isanbard@gmail.com> |
Revert r59802. It was breaking the build of llvm-gcc:
g++ -m32 -c -g -DIN_GCC -W -Wall -Wwrite-strings -Wmissing-format-attribute -fno-common -mdynamic-no-pic -DHAVE_CONFIG_H -Wno-unused -DTARGET_NAME=\"i386-apple-darwin9.5.0\" -I. -I. -I../../llvm-gcc.src/gcc -I../../llvm-gcc.src/gcc/. -I../../llvm-gcc.src/gcc/../include -I./../intl -I../../llvm-gcc.src/gcc/../libcpp/include -I../../llvm-gcc.src/gcc/../libdecnumber -I../libdecnumber -I/Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm.obj/include -I/Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm.src/include -DENABLE_LLVM -I/Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm.obj/../llvm.src/include -D_DEBUG -D_GNU_SOURCE -D__STDC_LIMIT_MACROS -D__STDC_CONSTANT_MACROS -I. -I. -I../../llvm-gcc.src/gcc -I../../llvm-gcc.src/gcc/. -I../../llvm-gcc.src/gcc/../include -I./../intl -I../../llvm-gcc.src/gcc/../libcpp/include -I../../llvm-gcc.src/gcc/../libdecnumber -I../libdecnumber -I/Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm.obj/include -I/Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm.src/include ../../llvm-gcc.src/gcc/llvm-types.cpp -o llvm-types.o
../../llvm-gcc.src/gcc/llvm-convert.cpp: In member function 'void TreeToLLVM::EmitMemCpy(llvm::Value*, llvm::Value*, llvm::Value*, unsigned int)':
../../llvm-gcc.src/gcc/llvm-convert.cpp:1496: error: 'memcpy_i32' is not a member of 'llvm::Intrinsic'
../../llvm-gcc.src/gcc/llvm-convert.cpp:1496: error: 'memcpy_i64' is not a member of 'llvm::Intrinsic'
../../llvm-gcc.src/gcc/llvm-convert.cpp: In member function 'void TreeToLLVM::EmitMemMove(llvm::Value*, llvm::Value*, llvm::Value*, unsigned int)':
../../llvm-gcc.src/gcc/llvm-convert.cpp:1512: error: 'memmove_i32' is not a member of 'llvm::Intrinsic'
../../llvm-gcc.src/gcc/llvm-convert.cpp:1512: error: 'memmove_i64' is not a member of 'llvm::Intrinsic'
../../llvm-gcc.src/gcc/llvm-convert.cpp: In member function 'void TreeToLLVM::EmitMemSet(llvm::Value*, llvm::Value*, llvm::Value*, unsigned int)':
../../llvm-gcc.src/gcc/llvm-convert.cpp:1528: error: 'memset_i32' is not a member of 'llvm::Intrinsic'
../../llvm-gcc.src/gcc/llvm-convert.cpp:1528: error: 'memset_i64' is not a member of 'llvm::Intrinsic'
make[3]: *** [llvm-convert.o] Error 1
make[3]: *** Waiting for unfinished jobs....
rm fsf-funding.pod gcov.pod gfdl.pod cpp.pod gpl.pod gcc.pod
make[2]: *** [all-stage1-gcc] Error 2
make[1]: *** [stage1-bubble] Error 2
make: *** [all] Error 2
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59809 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuild.cpp
|
| 219ab405e6bea993da14cf3ce7b50983c3bb7a6f |
21-Nov-2008 |
Sanjiv Gupta <sanjiv.gupta@microchip.com> |
Make mem[cpy,move,set] intrinsics overloaded.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59802 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuild.cpp
|
| 4198fefc601a27c2abf1da16cb6a0035e420548b |
21-Nov-2008 |
Sanjiv Gupta <sanjiv.gupta@microchip.com> |
Make mem[cpy,move,set] intrinsics overloaded.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59802 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuild.cpp
|
| 137dccd5d86e0d0741f9560970f9b2952221d37c |
21-Nov-2008 |
Bill Wendling <isanbard@gmail.com> |
Default to converting UADDO to the generic form that SADDO is converted to.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59801 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| f3ddc42182d77db19b085a1ad9590c65f654a0c2 |
21-Nov-2008 |
Bill Wendling <isanbard@gmail.com> |
Default to converting UADDO to the generic form that SADDO is converted to.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59801 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 230e4faa198e4e44da2694777e412c02dd35003a |
21-Nov-2008 |
Mon P Wang <wangmp@apple.com> |
Clean up normalization of shuffles
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59792 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuild.cpp
|
| 67227c25d7dd2a18397e136e15ead7e49d3fe27d |
21-Nov-2008 |
Mon P Wang <wangmp@apple.com> |
Clean up normalization of shuffles
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59792 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuild.cpp
|
| ef37546f688696b1d616dc2adb63d1b372fa483d |
21-Nov-2008 |
Bill Wendling <isanbard@gmail.com> |
Combine the two add with overflow intrinsics lowerings. They differ only in DAG node type.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59788 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuild.cpp
|
| 9560f98ded31ac238ed1b77d50a58da51bec1543 |
21-Nov-2008 |
Bill Wendling <isanbard@gmail.com> |
Combine the two add with overflow intrinsics lowerings. They differ only in DAG node type.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59788 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuild.cpp
|
| da4948ac8cbc307739e353e64c19a935de1e0230 |
21-Nov-2008 |
Bill Wendling <isanbard@gmail.com> |
Generate code for llvm.uadd.with.overflow intrinsic. No conversion support yet.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59786 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuild.cpp
|
| 9ed957e4fea842dc9502aafe8b0f6ed0e9763c84 |
21-Nov-2008 |
Bill Wendling <isanbard@gmail.com> |
Generate code for llvm.uadd.with.overflow intrinsic. No conversion support yet.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59786 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuild.cpp
|
| cddd428459a66830b0d072823f94224ace58e625 |
21-Nov-2008 |
Dan Gohman <gohman@apple.com> |
Add a flag to SDep for tracking which edges are anti-dependence edges.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59785 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGFast.cpp
cheduleDAGRRList.cpp
|
| 5ecb81db050cd96bec80f92832557d33bf7c7a9d |
21-Nov-2008 |
Dan Gohman <gohman@apple.com> |
Add a flag to SDep for tracking which edges are anti-dependence edges.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59785 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGFast.cpp
cheduleDAGRRList.cpp
|
| 6c63f62729fbd7cdf66f96ad52ea1bba62851311 |
21-Nov-2008 |
Bill Wendling <isanbard@gmail.com> |
Remove chains. Unnecessary.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59783 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
electionDAGBuild.cpp
|
| 517abf0ad2611e9d459b77ce8fd3a746dc382866 |
21-Nov-2008 |
Bill Wendling <isanbard@gmail.com> |
Remove chains. Unnecessary.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59783 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
electionDAGBuild.cpp
|
| 98adea11496400c8385b774b4d9f9acd4c99d254 |
21-Nov-2008 |
Dan Gohman <gohman@apple.com> |
Rename SDep's isSpecial to isArtificial, to make this field a little
less mysterious.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59782 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGFast.cpp
cheduleDAGRRList.cpp
|
| ff8009f3058136e9ec00ba8f4210a220a41b8f7e |
21-Nov-2008 |
Dan Gohman <gohman@apple.com> |
Rename SDep's isSpecial to isArtificial, to make this field a little
less mysterious.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59782 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGFast.cpp
cheduleDAGRRList.cpp
|
| 1c55a9c0cc355ad72c55ae7665143b9a992d223b |
21-Nov-2008 |
Bill Wendling <isanbard@gmail.com> |
Rename "ADDO" to "SADDO" and "UADDO". The "UADDO" isn't equivalent to "ADDC"
because the boolean it returns to indicate an overflow may not be treated like
as a flag. It could be stored to memory, for instance.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59780 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
electionDAG.cpp
electionDAGBuild.cpp
|
| ea8b7c926c5bb387c57459546e0128688df6492b |
21-Nov-2008 |
Bill Wendling <isanbard@gmail.com> |
Rename "ADDO" to "SADDO" and "UADDO". The "UADDO" isn't equivalent to "ADDC"
because the boolean it returns to indicate an overflow may not be treated like
as a flag. It could be stored to memory, for instance.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59780 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
electionDAG.cpp
electionDAGBuild.cpp
|
| 7cdc3c8ad208d9655be542fc8b082c4457af4b6e |
21-Nov-2008 |
Bill Wendling <isanbard@gmail.com> |
Implement the sadd_with_overflow intrinsic. This is converted into
"ISD::ADDO". ISD::ADDO is lowered into a target-independent form that does the
addition and then checks if the result is less than one of the operands. (If it
is, then there was an overflow.)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59779 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
electionDAG.cpp
electionDAGBuild.cpp
|
| 5fc7e5c28a72511a17e5f84ef2b6327b8b8862e0 |
21-Nov-2008 |
Bill Wendling <isanbard@gmail.com> |
Implement the sadd_with_overflow intrinsic. This is converted into
"ISD::ADDO". ISD::ADDO is lowered into a target-independent form that does the
addition and then checks if the result is less than one of the operands. (If it
is, then there was an overflow.)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59779 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
electionDAG.cpp
electionDAGBuild.cpp
|
| 787782f4ca0cca2523825131c24a6f78535a3eb8 |
21-Nov-2008 |
Dan Gohman <gohman@apple.com> |
Use ComputeLatency in the MachineInstr scheduler.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59777 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGSDNodes.cpp
|
| 13f4a6423bb0ec3af4f7a629d7e6f743c2fb9c84 |
21-Nov-2008 |
Dan Gohman <gohman@apple.com> |
Use ComputeLatency in the MachineInstr scheduler.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59777 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGSDNodes.cpp
|
| f209c2cc301ed762e4314536137832ee26e65be0 |
21-Nov-2008 |
Dan Gohman <gohman@apple.com> |
Remove the CycleBound computation code from the ScheduleDAGRRList
schedulers. This doesn't have much immediate impact because
targets that use these schedulers by default don't yet provide
pipeline information.
This code also didn't have the benefit of register pressure
information. Also, removing it will avoid problems with list-burr
suddenly starting to do latency-oriented scheduling on x86 when we
start providing pipeline data, which would increase spilling.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59775 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGRRList.cpp
|
| 2add045e2b2677b16aed4a78826a3fb2bdabc034 |
21-Nov-2008 |
Dan Gohman <gohman@apple.com> |
Remove the CycleBound computation code from the ScheduleDAGRRList
schedulers. This doesn't have much immediate impact because
targets that use these schedulers by default don't yet provide
pipeline information.
This code also didn't have the benefit of register pressure
information. Also, removing it will avoid problems with list-burr
suddenly starting to do latency-oriented scheduling on x86 when we
start providing pipeline data, which would increase spilling.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59775 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGRRList.cpp
|
| c8c2827993204207ca70a93f62f233fbe81b97ef |
21-Nov-2008 |
Dan Gohman <gohman@apple.com> |
Implement ComputeLatency for MachineInstr ScheduleDAGs. Factor
some of the latency computation logic out of the SDNode
ScheduleDAG code into a TargetInstrItineraries helper method
to help with this.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59761 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGSDNodes.cpp
|
| 8efc97bd7218f3e440491f52adfcc78f206eee78 |
21-Nov-2008 |
Dan Gohman <gohman@apple.com> |
Implement ComputeLatency for MachineInstr ScheduleDAGs. Factor
some of the latency computation logic out of the SDNode
ScheduleDAG code into a TargetInstrItineraries helper method
to help with this.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59761 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGSDNodes.cpp
|
| ea7b527aa56ad0fe547d3d99b21e845a49a031cb |
21-Nov-2008 |
Bill Wendling <isanbard@gmail.com> |
Add UADDO and SADDO nodes. These will be used for determining an overflow
condition in an addition operation.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59760 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 691d9faf0ffe98a1d884af2bc78595ecbf70b987 |
21-Nov-2008 |
Bill Wendling <isanbard@gmail.com> |
Add UADDO and SADDO nodes. These will be used for determining an overflow
condition in an addition operation.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59760 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 47d1a214a7013d12140a0c4972d7ba761150dfd4 |
21-Nov-2008 |
Dan Gohman <gohman@apple.com> |
Change these schedulers to not emit no-ops. It turns out that
the RR scheduler actually does look at latency values, but it
doesn't use a hazard recognizer so it has no way to know when
a no-op is needed, as opposed to just stalling and incrementing
the cycle count.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59759 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGFast.cpp
cheduleDAGRRList.cpp
|
| 55aef3bcfc7dd2c0c192554ab4f162bae750e689 |
21-Nov-2008 |
Dan Gohman <gohman@apple.com> |
Change these schedulers to not emit no-ops. It turns out that
the RR scheduler actually does look at latency values, but it
doesn't use a hazard recognizer so it has no way to know when
a no-op is needed, as opposed to just stalling and incrementing
the cycle count.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59759 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGFast.cpp
cheduleDAGRRList.cpp
|
| 810260bf6b4af4c676705d77f0a96c22986610fb |
20-Nov-2008 |
Duncan Sands <baldrick@free.fr> |
Add some documentation.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59727 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeTypes.h
|
| 7c9b011b53653f6bd85f7bbc2b61d5f48de3edb8 |
20-Nov-2008 |
Duncan Sands <baldrick@free.fr> |
Add some documentation.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59727 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeTypes.h
|
| f0a2d0cb8f08f951731840d604c121ca662a0326 |
20-Nov-2008 |
Bill Wendling <isanbard@gmail.com> |
80-column violation.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59718 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuild.cpp
|
| 90e1e4f3d589712176a62f2abcea1038d0aa7d3b |
20-Nov-2008 |
Bill Wendling <isanbard@gmail.com> |
80-column violation.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59718 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuild.cpp
|
| 57bebbbd1229040ad659ef4671a34e8d1d78a6f6 |
20-Nov-2008 |
Dan Gohman <gohman@apple.com> |
Remove a remnant of list-burr's fast mode.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59702 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGRRList.cpp
|
| 7c8372f400dfdd296e3079b19c06de6a4ad106c0 |
20-Nov-2008 |
Dan Gohman <gohman@apple.com> |
Remove a remnant of list-burr's fast mode.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59702 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGRRList.cpp
|
| 117f3e9ee426ab7eb120b5ca1b65763baae2a824 |
20-Nov-2008 |
Dan Gohman <gohman@apple.com> |
Factor out the SethiUllman numbering logic from the list-burr and
list-tdrr schedulers into a common base class.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59701 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGRRList.cpp
|
| 17f00d561262d69eb834064eb42d19ae4c3c9606 |
20-Nov-2008 |
Dan Gohman <gohman@apple.com> |
Factor out the SethiUllman numbering logic from the list-burr and
list-tdrr schedulers into a common base class.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59701 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGRRList.cpp
|
| 9e76fea3abd4229749e6ead46a0016cabff4a056 |
20-Nov-2008 |
Dan Gohman <gohman@apple.com> |
Remove the "fast" form of the list-burr scheduler, and use the
dedicated "fast" scheduler in -fast mode instead, which is
faster. This speeds up llc -fast by a few percent on some
testcases -- the speedup only happens for code not handled by
fast-isel.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59700 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGRRList.cpp
electionDAGISel.cpp
|
| 09ab1d709c03bd7f363e5493e2e060e50a51e095 |
20-Nov-2008 |
Dan Gohman <gohman@apple.com> |
Remove the "fast" form of the list-burr scheduler, and use the
dedicated "fast" scheduler in -fast mode instead, which is
faster. This speeds up llc -fast by a few percent on some
testcases -- the speedup only happens for code not handled by
fast-isel.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59700 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGRRList.cpp
electionDAGISel.cpp
|
| 6be2ee431f44e3eb4d87bb3779a7e97a766c7a3e |
20-Nov-2008 |
Dan Gohman <gohman@apple.com> |
Facter AddPseudoTwoAddrDeps and associated infrasructure out of
the list-burr scheduler so that it can be used by the list-tdrr
scheduler too.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59698 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGRRList.cpp
|
| e456fda49f1f3fb31adca38444d2e046e9905e4c |
20-Nov-2008 |
Dan Gohman <gohman@apple.com> |
Facter AddPseudoTwoAddrDeps and associated infrasructure out of
the list-burr scheduler so that it can be used by the list-tdrr
scheduler too.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59698 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGRRList.cpp
|
| a1e6d363e5efa9eb1a2e7ac21a0394c870bef5ad |
20-Nov-2008 |
Dan Gohman <gohman@apple.com> |
Factor out the code for verifying the work of the scheduler,
extend it a bit, and make use of it in all schedulers, to
ensure consistent checking.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59689 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGList.cpp
cheduleDAGRRList.cpp
|
| f6e4a00d09a642688ef0c02280a8e640cfff6788 |
20-Nov-2008 |
Dan Gohman <gohman@apple.com> |
Factor out the code for verifying the work of the scheduler,
extend it a bit, and make use of it in all schedulers, to
ensure consistent checking.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59689 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGList.cpp
cheduleDAGRRList.cpp
|
| cdb260de83e209cd97632343e03343da3629d59f |
20-Nov-2008 |
Dan Gohman <gohman@apple.com> |
Simplify this code a little. In the fast scheduler, CreateNewSUnit
and CreateClone don't add any extra value.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59679 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGFast.cpp
|
| 78b29ae20cd026390c4e96177cbf52a335de42c8 |
20-Nov-2008 |
Dan Gohman <gohman@apple.com> |
Simplify this code a little. In the fast scheduler, CreateNewSUnit
and CreateClone don't add any extra value.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59679 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGFast.cpp
|
| 343f0c046702831a4a6aec951b6a297a23241a55 |
20-Nov-2008 |
Dan Gohman <gohman@apple.com> |
Experimental post-pass scheduling support. Post-pass scheduling
is currently off by default, and can be enabled with
-disable-post-RA-scheduler=false.
This doesn't have a significant impact on most code yet because it doesn't
yet do anything to address anti-dependencies and it doesn't attempt to
disambiguate memory references. Also, several popular targets
don't have pipeline descriptions yet.
The majority of the changes here are splitting the SelectionDAG-specific
code out of ScheduleDAG, so that ScheduleDAG can be moved to
libLLVMCodeGen.a. The interface between ScheduleDAG-using code and
the rest of the scheduling code is somewhat rough and will evolve.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59676 91177308-0d34-0410-b5e6-96231b3b80d8
MakeLists.txt
atencyPriorityQueue.cpp
atencyPriorityQueue.h
cheduleDAG.cpp
cheduleDAGEmit.cpp
cheduleDAGFast.cpp
cheduleDAGList.cpp
cheduleDAGRRList.cpp
cheduleDAGSDNodes.cpp
cheduleDAGSDNodesEmit.cpp
electionDAGISel.cpp
electionDAGPrinter.cpp
|
| d27a0e058661cece449251fef2f9d495f336e85f |
20-Nov-2008 |
Dan Gohman <gohman@apple.com> |
Experimental post-pass scheduling support. Post-pass scheduling
is currently off by default, and can be enabled with
-disable-post-RA-scheduler=false.
This doesn't have a significant impact on most code yet because it doesn't
yet do anything to address anti-dependencies and it doesn't attempt to
disambiguate memory references. Also, several popular targets
don't have pipeline descriptions yet.
The majority of the changes here are splitting the SelectionDAG-specific
code out of ScheduleDAG, so that ScheduleDAG can be moved to
libLLVMCodeGen.a. The interface between ScheduleDAG-using code and
the rest of the scheduling code is somewhat rough and will evolve.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59676 91177308-0d34-0410-b5e6-96231b3b80d8
MakeLists.txt
atencyPriorityQueue.cpp
atencyPriorityQueue.h
cheduleDAG.cpp
cheduleDAGEmit.cpp
cheduleDAGFast.cpp
cheduleDAGList.cpp
cheduleDAGRRList.cpp
cheduleDAGSDNodes.cpp
cheduleDAGSDNodesEmit.cpp
electionDAGISel.cpp
electionDAGPrinter.cpp
|
| 7d1cd3f21d68179f4ebf4ee18fb7a0ddca9c5a37 |
19-Nov-2008 |
Dan Gohman <gohman@apple.com> |
Move the code for printing a graph node label for an SUnit into
a virtual method of SelectionDAG.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59667 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAG.cpp
electionDAGPrinter.cpp
|
| d717710fc40e446d71ae2b4ca08ff7c9919f8398 |
19-Nov-2008 |
Dan Gohman <gohman@apple.com> |
Move the code for printing a graph node label for an SUnit into
a virtual method of SelectionDAG.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59667 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAG.cpp
electionDAGPrinter.cpp
|
| 252ae9e8ae4efaf1f67a608ad2563323308bd803 |
19-Nov-2008 |
Dan Gohman <gohman@apple.com> |
Convert SUnit's dump method into a print method and implement
dump in terms of it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59665 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAG.cpp
|
| 60e43791bf4e8721be3ef00f19cb8499b0df2bc0 |
19-Nov-2008 |
Dan Gohman <gohman@apple.com> |
Convert SUnit's dump method into a print method and implement
dump in terms of it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59665 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAG.cpp
|
| c2f9062ea4915ae034417eaeead3c5942921f24d |
19-Nov-2008 |
Dan Gohman <gohman@apple.com> |
Rearrange code to reduce the nesting level. No functionality change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59580 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGRRList.cpp
|
| 4720765e5f77e7a710d79f2aad160f01517ce5f6 |
19-Nov-2008 |
Dan Gohman <gohman@apple.com> |
Rearrange code to reduce the nesting level. No functionality change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59580 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGRRList.cpp
|
| 06da2bc19f4bace18e7b6ea5a8a5cdf124938928 |
19-Nov-2008 |
Dan Gohman <gohman@apple.com> |
Fix debug printing of flagged SDNodes in SUnits so that they
print in the correct order.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59567 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAG.cpp
|
| a52aeb9b57a80a2dc75c596dc03fd4e482dffcf3 |
19-Nov-2008 |
Dan Gohman <gohman@apple.com> |
Fix debug printing of flagged SDNodes in SUnits so that they
print in the correct order.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59567 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAG.cpp
|
| 1256f5fe769ab2cced36abf2cbf9e1f63f22282d |
18-Nov-2008 |
Dan Gohman <gohman@apple.com> |
Tidy up ScheduleNodeBottomUp methods, and make them more
consistent with ScheduleNodeTopDown methods.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59550 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGFast.cpp
cheduleDAGRRList.cpp
|
| 9feca8e2b5db5352038aa79e532ae5888ddfa613 |
18-Nov-2008 |
Dan Gohman <gohman@apple.com> |
Tidy up ScheduleNodeBottomUp methods, and make them more
consistent with ScheduleNodeTopDown methods.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59550 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGFast.cpp
cheduleDAGRRList.cpp
|
| 0454e8685fa4ca75c710dad7203dc137e551a2c1 |
18-Nov-2008 |
Dan Gohman <gohman@apple.com> |
Update a comment to reflect the current code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59549 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGList.cpp
|
| bcb0ccb5ccde98258fb4fb7918b24a73b94bb3c2 |
18-Nov-2008 |
Dan Gohman <gohman@apple.com> |
Update a comment to reflect the current code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59549 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGList.cpp
|
| 9a6b92de4c2207b427f3b9cd67cd122dafc5b6c6 |
18-Nov-2008 |
Duncan Sands <baldrick@free.fr> |
Remove integer promotion support for FP_EXTEND
and FP_ROUND. Not sure what these were doing
here - probably they were sometimes (wrongly)
created with integer operands somewhere that
has since been fixed.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59548 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeIntegerTypes.cpp
egalizeTypes.h
|
| 3cdbc5860009bcd708a63d80bbf8168ec23660de |
18-Nov-2008 |
Duncan Sands <baldrick@free.fr> |
Remove integer promotion support for FP_EXTEND
and FP_ROUND. Not sure what these were doing
here - probably they were sometimes (wrongly)
created with integer operands somewhere that
has since been fixed.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59548 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeIntegerTypes.cpp
egalizeTypes.h
|
| c08468774b65dc288c44076d428f4beddabe58e2 |
18-Nov-2008 |
Duncan Sands <baldrick@free.fr> |
Simplify code using helper routines. There is not
supposed to be any functionality change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59545 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeIntegerTypes.cpp
egalizeTypes.h
|
| d41e4e09f1b48f56f9e0727c36dd1307e512a20d |
18-Nov-2008 |
Duncan Sands <baldrick@free.fr> |
Simplify code using helper routines. There is not
supposed to be any functionality change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59545 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeIntegerTypes.cpp
egalizeTypes.h
|
| 3dbc4e350216e197e3014452400f43899f7ad620 |
18-Nov-2008 |
Dan Gohman <gohman@apple.com> |
Whitespace cleanups.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59532 91177308-0d34-0410-b5e6-96231b3b80d8
atencyPriorityQueue.h
|
| c0612a24ef151b42f850b18cebf4e5621470a255 |
18-Nov-2008 |
Dan Gohman <gohman@apple.com> |
Whitespace cleanups.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59532 91177308-0d34-0410-b5e6-96231b3b80d8
atencyPriorityQueue.h
|
| 331a746101aff2199c19e5a7407a5ca6a4bbdafa |
18-Nov-2008 |
Duncan Sands <baldrick@free.fr> |
LegalizeTypes support for splitting and scalarizing
SCALAR_TO_VECTOR. I didn't add the testcase, because
once llc gets past scalar-to-vector it hits a SPU target
lowering bug and explodes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59530 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeTypes.h
egalizeVectorTypes.cpp
|
| 7aa3387207ff7874d7ff5fc26779d496272aea49 |
18-Nov-2008 |
Duncan Sands <baldrick@free.fr> |
LegalizeTypes support for splitting and scalarizing
SCALAR_TO_VECTOR. I didn't add the testcase, because
once llc gets past scalar-to-vector it hits a SPU target
lowering bug and explodes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59530 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeTypes.h
egalizeVectorTypes.cpp
|
| 5734450d40fe5546eb98c0d856d73c3321eaf5d2 |
18-Nov-2008 |
Bill Wendling <isanbard@gmail.com> |
Rename stackprotector_create intrinsic to stackprotector.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59519 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuild.cpp
|
| 0ac3670760f18a9fd67625034635737f23aa5d6d |
18-Nov-2008 |
Bill Wendling <isanbard@gmail.com> |
Rename stackprotector_create intrinsic to stackprotector.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59519 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuild.cpp
|
| 51d83fdd89e6e942a4e6932cd5d02b427d2aa5aa |
18-Nov-2008 |
Duncan Sands <baldrick@free.fr> |
Reapply r59464, this time using the correct type
when softening FNEG.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59513 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeFloatTypes.cpp
egalizeTypes.h
|
| 6b9dc0ae60d25bf60e39a88cea20b1006d2008b6 |
18-Nov-2008 |
Duncan Sands <baldrick@free.fr> |
Reapply r59464, this time using the correct type
when softening FNEG.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59513 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeFloatTypes.cpp
egalizeTypes.h
|
| 733bbc5320ac9d729caa8c0fe741dd516e7eda0b |
18-Nov-2008 |
Bill Wendling <isanbard@gmail.com> |
Remove the stackprotector_check intrinsic. Use a volatile load instead.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59504 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuild.cpp
|
| 34dfafce746dc8fb8ba8d1f5ed375f46139e731f |
18-Nov-2008 |
Bill Wendling <isanbard@gmail.com> |
Remove the stackprotector_check intrinsic. Use a volatile load instead.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59504 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuild.cpp
|
| 6c2fe2237bf21aa4bfe05ba3135d82e66235e97d |
18-Nov-2008 |
Dan Gohman <gohman@apple.com> |
Fix a typo in a comment.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59489 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGList.cpp
|
| e94e982a8a25092c12c3586137773da42401fc3d |
18-Nov-2008 |
Dan Gohman <gohman@apple.com> |
Fix a typo in a comment.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59489 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGList.cpp
|
| 3cc6243ddfdba3ad64035b919c88b09773a60880 |
18-Nov-2008 |
Dan Gohman <gohman@apple.com> |
Change SUnit's dump method to take a ScheduleDAG* instead of
a SelectionDAG*.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59488 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAG.cpp
cheduleDAGFast.cpp
cheduleDAGList.cpp
cheduleDAGRRList.cpp
|
| 2fd868d4af7961de2286df299442278c8e82408f |
18-Nov-2008 |
Dan Gohman <gohman@apple.com> |
Change SUnit's dump method to take a ScheduleDAG* instead of
a SelectionDAG*.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59488 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAG.cpp
cheduleDAGFast.cpp
cheduleDAGList.cpp
cheduleDAGRRList.cpp
|
| 8f55b3d67d685214aef7ff6c9d514d0461703caf |
18-Nov-2008 |
Bill Wendling <isanbard@gmail.com> |
Revert r59464. It was causing this failure:
Running /Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm.src/test/CodeGen/XCore/dg.exp ...
FAIL: /Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm.src/test/CodeGen/XCore/fneg.ll
Failed with signal(SIGABRT) at line 1
while running: llvm-as < /Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm.src/test/CodeGen/XCore/fneg.ll | llc -march=xcore > fneg.ll.tmp1.s
Assertion failed: (VT.isFloatingPoint() && "Cannot create integer FP constant!"), function getConstantFP, file /Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm.src/lib/CodeGen/SelectionDAG/SelectionDAG.cpp, line 913.
0 llc 0x0092115c _ZN4llvm3sys18RemoveFileOnSignalERKNS0_4PathEPSs + 844
1 libSystem.B.dylib 0x9217809b _sigtramp + 43
2 ??? 0xffffffff 0x0 + 4294967295
3 libSystem.B.dylib 0x921f0ec2 raise + 26
4 libSystem.B.dylib 0x9220047f abort + 73
5 libSystem.B.dylib 0x921f2063 __assert_rtn + 101
6 llc 0x005a5b0a _ZN4llvm12SelectionDAG13getConmake[1]: *** [check-local] Error 1
make: *** [check] Error 2
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59487 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeFloatTypes.cpp
egalizeTypes.h
|
| 356678083b2402dc12420b71dc7f523a62e4bc20 |
18-Nov-2008 |
Bill Wendling <isanbard@gmail.com> |
Revert r59464. It was causing this failure:
Running /Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm.src/test/CodeGen/XCore/dg.exp ...
FAIL: /Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm.src/test/CodeGen/XCore/fneg.ll
Failed with signal(SIGABRT) at line 1
while running: llvm-as < /Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm.src/test/CodeGen/XCore/fneg.ll | llc -march=xcore > fneg.ll.tmp1.s
Assertion failed: (VT.isFloatingPoint() && "Cannot create integer FP constant!"), function getConstantFP, file /Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm.src/lib/CodeGen/SelectionDAG/SelectionDAG.cpp, line 913.
0 llc 0x0092115c _ZN4llvm3sys18RemoveFileOnSignalERKNS0_4PathEPSs + 844
1 libSystem.B.dylib 0x9217809b _sigtramp + 43
2 ??? 0xffffffff 0x0 + 4294967295
3 libSystem.B.dylib 0x921f0ec2 raise + 26
4 libSystem.B.dylib 0x9220047f abort + 73
5 libSystem.B.dylib 0x921f2063 __assert_rtn + 101
6 llc 0x005a5b0a _ZN4llvm12SelectionDAG13getConmake[1]: *** [check-local] Error 1
make: *** [check] Error 2
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59487 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeFloatTypes.cpp
egalizeTypes.h
|
| 2d093f356007979e2e071725a98894a36c3625e0 |
18-Nov-2008 |
Dan Gohman <gohman@apple.com> |
Avoid using a loop in ReleasePred and ReleaseSucc methods to compute the
new CycleBound value. Instead, just update CycleBound on each call.
Also, make ReleasePred and ReleaseSucc methods more consistent accross
the various schedulers.
This also happens to make ScheduleDAGRRList's CycleBound computation
somewhat more interesting, though it still doesn't have any noticeable
effect, because no current targets that use the register-pressure
reduction scheduler provide pipeline models.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59475 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGFast.cpp
cheduleDAGList.cpp
cheduleDAGRRList.cpp
|
| d963c38f1cf5c43c5450d9f1786f7894c3dbd9af |
18-Nov-2008 |
Dan Gohman <gohman@apple.com> |
Avoid using a loop in ReleasePred and ReleaseSucc methods to compute the
new CycleBound value. Instead, just update CycleBound on each call.
Also, make ReleasePred and ReleaseSucc methods more consistent accross
the various schedulers.
This also happens to make ScheduleDAGRRList's CycleBound computation
somewhat more interesting, though it still doesn't have any noticeable
effect, because no current targets that use the register-pressure
reduction scheduler provide pipeline models.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59475 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGFast.cpp
cheduleDAGList.cpp
cheduleDAGRRList.cpp
|
| 8123419f2be881ca77a897918f28514aa4e91765 |
17-Nov-2008 |
Dan Gohman <gohman@apple.com> |
Eliminate some trivial differences between the ScheduleNodeTopDown
functions in these two schedulers.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59465 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGList.cpp
cheduleDAGRRList.cpp
|
| ba3f99bfaef459685198bca01b645e61ca84a836 |
17-Nov-2008 |
Dan Gohman <gohman@apple.com> |
Eliminate some trivial differences between the ScheduleNodeTopDown
functions in these two schedulers.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59465 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGList.cpp
cheduleDAGRRList.cpp
|
| 7fed65a68d961eef21d4572beab64d047ece5a3e |
17-Nov-2008 |
Duncan Sands <baldrick@free.fr> |
Add soft float support for a bunch more operations. Original
patch by Richard Osborne, tweaked and extended by your humble
servant.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59464 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeFloatTypes.cpp
egalizeTypes.h
|
| ddc609406ad28403ba7b4ac8535ef87859145501 |
17-Nov-2008 |
Duncan Sands <baldrick@free.fr> |
Add soft float support for a bunch more operations. Original
patch by Richard Osborne, tweaked and extended by your humble
servant.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59464 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeFloatTypes.cpp
egalizeTypes.h
|
| e93483d855af7acf831d1d8c3c77ed117f0df4d3 |
17-Nov-2008 |
Dan Gohman <gohman@apple.com> |
Don't bother doing latency calculations in the "fast" scheduler.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59461 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGFast.cpp
|
| f300f31bea5de295cbae6c6afe8063b1f8da7c9d |
17-Nov-2008 |
Dan Gohman <gohman@apple.com> |
Don't bother doing latency calculations in the "fast" scheduler.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59461 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGFast.cpp
|
| 2dcca9d53ec9359c554e05a38a7a5eed695b2a86 |
17-Nov-2008 |
Dan Gohman <gohman@apple.com> |
Use SUnit's CycleBound field instead of duplicating it in
a side-car datastructure
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59458 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGList.cpp
|
| 9a4f237b8edf129deefa26478f6b29f3da2ca40b |
17-Nov-2008 |
Dan Gohman <gohman@apple.com> |
Use SUnit's CycleBound field instead of duplicating it in
a side-car datastructure
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59458 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGList.cpp
|
| 104de6cf7b80ec5e9beb502a069f376810a0a1e3 |
17-Nov-2008 |
Richard Osborne <richard@xmos.com> |
Don't produce ADDC/ADDE when expanding SHL unless they are legal
for the target. This fixes PR3080.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59450 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeIntegerTypes.cpp
|
| 33a8d20d065c549ab1d216c0cdfeece754a4cc57 |
17-Nov-2008 |
Richard Osborne <richard@xmos.com> |
Don't produce ADDC/ADDE when expanding SHL unless they are legal
for the target. This fixes PR3080.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59450 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeIntegerTypes.cpp
|
| 6560c000a1327b6a023badafed974f35fa1bdc3b |
17-Nov-2008 |
Dan Gohman <gohman@apple.com> |
Don't use the isPending flag to mean what the isAvailable flag means.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59445 91177308-0d34-0410-b5e6-96231b3b80d8
atencyPriorityQueue.cpp
cheduleDAGList.cpp
|
| 54a7f8d5164423c97e4bfda0dd51afbd7120c3d3 |
17-Nov-2008 |
Dan Gohman <gohman@apple.com> |
Don't use the isPending flag to mean what the isAvailable flag means.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59445 91177308-0d34-0410-b5e6-96231b3b80d8
atencyPriorityQueue.cpp
cheduleDAGList.cpp
|
| 28088d3c049017a131aa7b07201c6e19c0227cef |
17-Nov-2008 |
Mon P Wang <wangmp@apple.com> |
Fixed legalization of CONVERT_RNDSAT for integers.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59432 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeIntegerTypes.cpp
egalizeTypes.h
|
| 59fc626007185115f2ea3bc3e604b63910312e4f |
17-Nov-2008 |
Mon P Wang <wangmp@apple.com> |
Fixed legalization of CONVERT_RNDSAT for integers.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59432 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeIntegerTypes.cpp
egalizeTypes.h
|
| c7849c22f4804075c0c972e20f9cd701bdb6ab6f |
16-Nov-2008 |
Mon P Wang <wangmp@apple.com> |
Improved shuffle normalization to avoid using extract/build when we
can extract using different indexes for two vectors. Added a few tests
for vector shuffles.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59399 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuild.cpp
|
| 7bfa46437ed3f1fa19c4ec89a011ba5c8a3e048d |
16-Nov-2008 |
Mon P Wang <wangmp@apple.com> |
Improved shuffle normalization to avoid using extract/build when we
can extract using different indexes for two vectors. Added a few tests
for vector shuffles.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59399 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuild.cpp
|
| c529168f29a9821806af8c7096fdcfbec06343d3 |
15-Nov-2008 |
Duncan Sands <baldrick@free.fr> |
When splitting a SHUFFLE_VECTOR, try to have the result
use SHUFFLE_VECTOR instead. If not practical, fall back
to the old scheme of building the split result by hand
using a BUILD_VECTOR.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59361 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeVectorTypes.cpp
|
| 76af8a318c4e011707034c9647690dc018bc7fd2 |
15-Nov-2008 |
Duncan Sands <baldrick@free.fr> |
When splitting a SHUFFLE_VECTOR, try to have the result
use SHUFFLE_VECTOR instead. If not practical, fall back
to the old scheme of building the split result by hand
using a BUILD_VECTOR.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59361 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeVectorTypes.cpp
|
| 49292f16517227196e0240190b61baaa8fc4aa62 |
15-Nov-2008 |
Mon P Wang <wangmp@apple.com> |
Add missing widen operations, fixed widening for extracting a subvector,
and when loading/storing a widen vector, make sure that they are loaded
and stored in consecutive order.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59357 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 257e1c72f0cae882edcf0da18308e6ed3c03cbd4 |
15-Nov-2008 |
Mon P Wang <wangmp@apple.com> |
Add missing widen operations, fixed widening for extracting a subvector,
and when loading/storing a widen vector, make sure that they are loaded
and stored in consecutive order.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59357 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 14ad6fce43e09f37020483f7e33b7dfdc770cb6b |
15-Nov-2008 |
Dan Gohman <gohman@apple.com> |
Correct a comment.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59341 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGList.cpp
|
| b7b82269d64466b7c52cd4c88071884ba870e28b |
15-Nov-2008 |
Dan Gohman <gohman@apple.com> |
Correct a comment.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59341 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGList.cpp
|
| ade9f1893412184c164aa3eb55a3e007ec647303 |
15-Nov-2008 |
Dan Gohman <gohman@apple.com> |
Move ScheduleDAGList's LatencyPriorityQueue class out to a separate file.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59340 91177308-0d34-0410-b5e6-96231b3b80d8
MakeLists.txt
atencyPriorityQueue.cpp
atencyPriorityQueue.h
cheduleDAGList.cpp
|
| e008195076cbf3a50ecd36117affe2e5f39945bd |
15-Nov-2008 |
Dan Gohman <gohman@apple.com> |
Move ScheduleDAGList's LatencyPriorityQueue class out to a separate file.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59340 91177308-0d34-0410-b5e6-96231b3b80d8
MakeLists.txt
atencyPriorityQueue.cpp
atencyPriorityQueue.h
cheduleDAGList.cpp
|
| 7e6a1bc0fa35202ddfd2229821370d6061e3e1f9 |
14-Nov-2008 |
Dan Gohman <gohman@apple.com> |
Add support for building a ScheduleDAG from MachineInstrs. This is currently
fairly conservative; it doesn't do alias-analysis queries and it doesn't
attempt to break anti-dependencies.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59324 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAG.cpp
|
| cd41458799dea8687a71c97f84cfd1a7223c5f70 |
14-Nov-2008 |
Dan Gohman <gohman@apple.com> |
Add support for building a ScheduleDAG from MachineInstrs. This is currently
fairly conservative; it doesn't do alias-analysis queries and it doesn't
attempt to break anti-dependencies.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59324 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAG.cpp
|
| 8f6c6d4c5f7bb9ab71147c8215c3779a6bec7689 |
14-Nov-2008 |
Dan Gohman <gohman@apple.com> |
For post-regalloc scheduling, remove the instructions from the block
before re-inserting them.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59281 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGEmit.cpp
|
| f593de7686db23199053c9a4da1c2f0d33355ece |
14-Nov-2008 |
Dan Gohman <gohman@apple.com> |
For post-regalloc scheduling, remove the instructions from the block
before re-inserting them.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59281 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGEmit.cpp
|
| 90c5201dd1933d643f1e04503c21ad90c25738b4 |
14-Nov-2008 |
Dan Gohman <gohman@apple.com> |
Check in the correct version of the patch in r59279.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59280 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGPrinter.cpp
|
| 2bb4062209644d6beb7d66ed265bd4415de28bd8 |
14-Nov-2008 |
Dan Gohman <gohman@apple.com> |
Check in the correct version of the patch in r59279.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59280 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGPrinter.cpp
|
| 505a551dab05029d2c7b5dc65a879d35e03e17c1 |
14-Nov-2008 |
Dan Gohman <gohman@apple.com> |
Debug printing for SUnits that carry MachineInstrs.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59279 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGPrinter.cpp
|
| 83f1371c48c0e2dc829f70e85ce925bb615570d8 |
14-Nov-2008 |
Dan Gohman <gohman@apple.com> |
Debug printing for SUnits that carry MachineInstrs.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59279 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGPrinter.cpp
|
| f449bf36ef5cb8e23fa2b5bc43f8d54d2b48fa4e |
14-Nov-2008 |
Dan Gohman <gohman@apple.com> |
Initial support for carrying MachineInstrs in SUnits.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59278 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGEmit.cpp
electionDAGPrinter.cpp
|
| b807201d8b6f39491c447557e5da1e88af75c075 |
14-Nov-2008 |
Dan Gohman <gohman@apple.com> |
Initial support for carrying MachineInstrs in SUnits.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59278 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGEmit.cpp
electionDAGPrinter.cpp
|
| c3c129fd8b74909cad75d88223e9b5b4dc16df20 |
14-Nov-2008 |
Dan Gohman <gohman@apple.com> |
Change DOTGraphTraits<ScheduleDAG*>::getGraphName how to find the name of
the current function on its own, rather than relying on the SelectionDAG.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59277 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGPrinter.cpp
|
| 0c0d6b1d9541417e7144a85cd71f3da1eb8cd796 |
14-Nov-2008 |
Dan Gohman <gohman@apple.com> |
Change DOTGraphTraits<ScheduleDAG*>::getGraphName how to find the name of
the current function on its own, rather than relying on the SelectionDAG.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59277 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGPrinter.cpp
|
| d23e0f81bc76902052e9198cad3a0d87a412a632 |
14-Nov-2008 |
Dan Gohman <gohman@apple.com> |
Remove the FlaggedNodes member from SUnit. Instead of requiring each SUnit
to carry a SmallVector of flagged nodes, just calculate the flagged nodes
dynamically when they are needed.
The local-liveness change is due to a trivial scheduling change where
the scheduler arbitrary decision differently.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59273 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAG.cpp
cheduleDAGEmit.cpp
cheduleDAGFast.cpp
cheduleDAGList.cpp
cheduleDAGRRList.cpp
electionDAGPrinter.cpp
|
| 40ae0f03c8becc9749d4339bfc7ff0b08a0202a1 |
14-Nov-2008 |
Dan Gohman <gohman@apple.com> |
Remove the FlaggedNodes member from SUnit. Instead of requiring each SUnit
to carry a SmallVector of flagged nodes, just calculate the flagged nodes
dynamically when they are needed.
The local-liveness change is due to a trivial scheduling change where
the scheduler arbitrary decision differently.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59273 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAG.cpp
cheduleDAGEmit.cpp
cheduleDAGFast.cpp
cheduleDAGList.cpp
cheduleDAGRRList.cpp
electionDAGPrinter.cpp
|
| 550f5afb68ce8f034991863cac65bef22a6554da |
13-Nov-2008 |
Dan Gohman <gohman@apple.com> |
Make the Node member of SUnit private, and add accessors.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59264 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAG.cpp
cheduleDAGEmit.cpp
cheduleDAGFast.cpp
cheduleDAGList.cpp
cheduleDAGRRList.cpp
electionDAGPrinter.cpp
|
| f26ca4b36cb9d3b9075048ab49c0eddd74724cd2 |
13-Nov-2008 |
Dan Gohman <gohman@apple.com> |
Make the Node member of SUnit private, and add accessors.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59264 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAG.cpp
cheduleDAGEmit.cpp
cheduleDAGFast.cpp
cheduleDAGList.cpp
cheduleDAGRRList.cpp
electionDAGPrinter.cpp
|
| a23b3b803e3c65e84d6cadaa221de8b256cbe28d |
13-Nov-2008 |
Dan Gohman <gohman@apple.com> |
Change ScheduleDAG's DAG member from a reference to a pointer, to prepare
for the possibility of scheduling without a SelectionDAG being present.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59263 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAG.cpp
cheduleDAGEmit.cpp
cheduleDAGFast.cpp
cheduleDAGList.cpp
cheduleDAGRRList.cpp
electionDAGPrinter.cpp
|
| 96c2ad2dc93bdf2cab99e51e8e274d9abaa95bd2 |
13-Nov-2008 |
Dan Gohman <gohman@apple.com> |
Change ScheduleDAG's DAG member from a reference to a pointer, to prepare
for the possibility of scheduling without a SelectionDAG being present.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59263 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAG.cpp
cheduleDAGEmit.cpp
cheduleDAGFast.cpp
cheduleDAGList.cpp
cheduleDAGRRList.cpp
electionDAGPrinter.cpp
|
| bc5cbb8be9d935240be5a57a8f37c5258a9d0563 |
12-Nov-2008 |
Dan Gohman <gohman@apple.com> |
Move the code that inserts X87 FP_REG_KILL instructions from a
special-purpose hook to a new pass. Also, add check to see if any
x87 virtual registers are used, to avoid doing any work in the
common case that no x87 code is needed.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59190 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| fd6722c180d3a39e2fc4741b4c6cd074158cc321 |
12-Nov-2008 |
Dan Gohman <gohman@apple.com> |
Move the code that inserts X87 FP_REG_KILL instructions from a
special-purpose hook to a new pass. Also, add check to see if any
x87 virtual registers are used, to avoid doing any work in the
common case that no x87 code is needed.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59190 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 7e298ed379d71c32d62cbfc6e8df8039b04ef895 |
12-Nov-2008 |
Dale Johannesen <dalej@apple.com> |
Fix unsigned char->ppcf128 conversion.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59150 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeFloatTypes.cpp
|
| ba99fa891b25571a2bfa8b820dd85589cf8f5c50 |
12-Nov-2008 |
Dale Johannesen <dalej@apple.com> |
Fix unsigned char->ppcf128 conversion.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59150 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeFloatTypes.cpp
|
| 1e465a35c8cd3d2ddd5e1d15fca7ffd3a8dbb565 |
12-Nov-2008 |
Duncan Sands <baldrick@free.fr> |
Simplify SplitVecRes_EXTRACT_SUBVECTOR. This means
that it no longer handles non-power-of-two vectors.
However it previously only handled them sometimes,
depending on obscure numerical relationships between
the index and vector type. For example, for a vector
of length 6, it would succeed if and only if the
index was an even multiple of 6. I consider this
more confusing than useful.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59122 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeVectorTypes.cpp
|
| 1b2cd3c0eb7f9c518c29fbd0e571ecb87571a0d1 |
12-Nov-2008 |
Duncan Sands <baldrick@free.fr> |
Simplify SplitVecRes_EXTRACT_SUBVECTOR. This means
that it no longer handles non-power-of-two vectors.
However it previously only handled them sometimes,
depending on obscure numerical relationships between
the index and vector type. For example, for a vector
of length 6, it would succeed if and only if the
index was an even multiple of 6. I consider this
more confusing than useful.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59122 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeVectorTypes.cpp
|
| 245146b58a2188eb69bcb34fc2bdf57ebbcfb278 |
12-Nov-2008 |
Duncan Sands <baldrick@free.fr> |
Correct some thinkos in the expansion of ADD/SUB
when the target does not support ADDC/SUBC. This
fixes PR3044.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59120 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeIntegerTypes.cpp
|
| 26e41c00cf66e45c145e866370430d259cc52e96 |
12-Nov-2008 |
Duncan Sands <baldrick@free.fr> |
Correct some thinkos in the expansion of ADD/SUB
when the target does not support ADDC/SUBC. This
fixes PR3044.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59120 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeIntegerTypes.cpp
|
| cbf7cf50ecc4730563fdbbd8d03269839b445f56 |
12-Nov-2008 |
Dale Johannesen <dalej@apple.com> |
Fix the testb optimization so x86 also bootstraps.
Reenable test.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59101 91177308-0d34-0410-b5e6-96231b3b80d8
argetLowering.cpp
|
| 01954eb1dc5d1b4e2c100691f9513d838a87659b |
12-Nov-2008 |
Dale Johannesen <dalej@apple.com> |
Fix the testb optimization so x86 also bootstraps.
Reenable test.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59101 91177308-0d34-0410-b5e6-96231b3b80d8
argetLowering.cpp
|
| b13af2f2ec2fd8dc215136cf8783d70225b59f66 |
11-Nov-2008 |
Dan Gohman <gohman@apple.com> |
In ScheduleDAGRRList::CopyAndMoveSuccessors, create the SUnit for the load
before creating the SUnit for the operation that it was unfolded from. This
allows each SUnit to have all of its predecessor SUnits available at the time
it is created. I don't know yet if this will be absolutely required, but it
is a little tidier to do it this way.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59083 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGRRList.cpp
|
| a88910932c08ed26ce1c054c8904c3111d7f8105 |
11-Nov-2008 |
Dan Gohman <gohman@apple.com> |
In ScheduleDAGRRList::CopyAndMoveSuccessors, create the SUnit for the load
before creating the SUnit for the operation that it was unfolded from. This
allows each SUnit to have all of its predecessor SUnits available at the time
it is created. I don't know yet if this will be absolutely required, but it
is a little tidier to do it this way.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59083 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGRRList.cpp
|
| eb9dbf117f1cc4da9b333dd6e410638ddd974f55 |
11-Nov-2008 |
Dan Gohman <gohman@apple.com> |
Avoid relying on the SelectionDAG for initializing the MachineFunction and
TargetLoweringInfo variables for the scheduler.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59082 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAG.cpp
|
| fa6039013b0a8e2b7be3f3ab4ef82d2b9f8cb136 |
11-Nov-2008 |
Dan Gohman <gohman@apple.com> |
Avoid relying on the SelectionDAG for initializing the MachineFunction and
TargetLoweringInfo variables for the scheduler.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59082 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAG.cpp
|
| 9b75b373756288cd39489da7994207f50b31ee40 |
11-Nov-2008 |
Dan Gohman <gohman@apple.com> |
Change the scheduler accessor methods to accept an explicit TargetMachine
argument instead of taking the SelectionDAG's TargetMachine. This is
needed for some upcoming scheduler changes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59055 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGFast.cpp
cheduleDAGList.cpp
cheduleDAGRRList.cpp
electionDAGISel.cpp
|
| 3ea46f79f1b84ea4962432e0e9d11c6b6f8b0281 |
11-Nov-2008 |
Dan Gohman <gohman@apple.com> |
Change the scheduler accessor methods to accept an explicit TargetMachine
argument instead of taking the SelectionDAG's TargetMachine. This is
needed for some upcoming scheduler changes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59055 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGFast.cpp
cheduleDAGList.cpp
cheduleDAGRRList.cpp
electionDAGISel.cpp
|
| ae89bb14431c6df4f784ae1af7019e72ec79b3ca |
11-Nov-2008 |
Bill Wendling <isanbard@gmail.com> |
Fix for PR3040:
The CC was changed, but wasn't checked to see if it was legal if the DAG
combiner was being run after legalization. Threw in a couple of checks just to
make sure that it's okay. As far as the PR is concerned, no back-end target
actually exhibited this problem, so there isn't an associated testcase.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59035 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 0d810b851101882da0f7fe85a1e6604875ba51a7 |
11-Nov-2008 |
Bill Wendling <isanbard@gmail.com> |
Fix for PR3040:
The CC was changed, but wasn't checked to see if it was legal if the DAG
combiner was being run after legalization. Threw in a couple of checks just to
make sure that it's okay. As far as the PR is concerned, no back-end target
actually exhibited this problem, so there isn't an associated testcase.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59035 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 00ec49b6bafc33ee17d97ec1c723e1edb41d4c97 |
11-Nov-2008 |
Mon P Wang <wangmp@apple.com> |
Cleaned up and fix bugs in convert_rndsat node
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59025 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeIntegerTypes.cpp
egalizeTypes.h
|
| 2db81e0008fac6b3e715de44ed2cdd7e05cf97ed |
11-Nov-2008 |
Mon P Wang <wangmp@apple.com> |
Cleaned up and fix bugs in convert_rndsat node
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59025 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeIntegerTypes.cpp
egalizeTypes.h
|
| d0ab34bf8feb7633b70158b571425577670b6326 |
10-Nov-2008 |
Bill Wendling <isanbard@gmail.com> |
Temporarily revert r58979 and related patch. It's causing a failure in X86 bootstrap:
Comparing stages 2 and 3
warning: ./cc1-checksum.o differs
warning: ./cc1obj-checksum.o differs
warning: ./cc1objplus-checksum.o differs
warning: ./cc1plus-checksum.o differs
Bootstrap comparison failure!
./alias.o differs
./alloc-pool.o differs
./attribs.o differs
./bb-reorder.o differs
./bitmap.o differs
./build/errors.o differs
./build/genattrtab.o differs
./build/genautomata.o differs
./build/genemit.o differs
./build/genextract.o differs
...
-bw
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59003 91177308-0d34-0410-b5e6-96231b3b80d8
argetLowering.cpp
|
| e3facb7e72c6de38ed4695ce9265e8429dd5b471 |
10-Nov-2008 |
Bill Wendling <isanbard@gmail.com> |
Temporarily revert r58979 and related patch. It's causing a failure in X86 bootstrap:
Comparing stages 2 and 3
warning: ./cc1-checksum.o differs
warning: ./cc1obj-checksum.o differs
warning: ./cc1objplus-checksum.o differs
warning: ./cc1plus-checksum.o differs
Bootstrap comparison failure!
./alias.o differs
./alloc-pool.o differs
./attribs.o differs
./bb-reorder.o differs
./bitmap.o differs
./build/errors.o differs
./build/genattrtab.o differs
./build/genautomata.o differs
./build/genemit.o differs
./build/genextract.o differs
...
-bw
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59003 91177308-0d34-0410-b5e6-96231b3b80d8
argetLowering.cpp
|
| 77cdf30742284a173fe818417eb482224cdee8d4 |
10-Nov-2008 |
Mon P Wang <wangmp@apple.com> |
Added CONVERT_RNDSAT (conversion with rounding and saturation) SDNode to
support targets that support these conversions. Users should avoid using
this node as the current targets don't generating code for it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59001 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
egalizeIntegerTypes.cpp
egalizeTypes.h
egalizeVectorTypes.cpp
electionDAG.cpp
electionDAGBuild.cpp
|
| 73d315484a82788131218d90af6d32b156a39bff |
10-Nov-2008 |
Mon P Wang <wangmp@apple.com> |
Added CONVERT_RNDSAT (conversion with rounding and saturation) SDNode to
support targets that support these conversions. Users should avoid using
this node as the current targets don't generating code for it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59001 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
egalizeIntegerTypes.cpp
egalizeTypes.h
egalizeVectorTypes.cpp
electionDAG.cpp
electionDAGBuild.cpp
|
| f5092245102297e91656e0e471778f0875a8bc66 |
10-Nov-2008 |
Duncan Sands <baldrick@free.fr> |
Fix PR2667: add soft float support for sint_to_fp/uint_to_fp
where the argument is an apint, or smaller than the minimum
size for which there is a libcall (i32).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@58994 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeFloatTypes.cpp
egalizeTypes.h
|
| 781c1022125e777ed05420efad4fd997ecedcd9a |
10-Nov-2008 |
Duncan Sands <baldrick@free.fr> |
Fix PR2667: add soft float support for sint_to_fp/uint_to_fp
where the argument is an apint, or smaller than the minimum
size for which there is a libcall (i32).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@58994 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeFloatTypes.cpp
egalizeTypes.h
|
| cff50d9e20d7bbc3acf4845fe826bfb3095126c4 |
10-Nov-2008 |
Duncan Sands <baldrick@free.fr> |
Tweak some comments.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@58993 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeIntegerTypes.cpp
egalizeTypesGeneric.cpp
|
| 81311d9869e1a94fb9f044b0b921d0d2b736823e |
10-Nov-2008 |
Duncan Sands <baldrick@free.fr> |
Tweak some comments.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@58993 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeIntegerTypes.cpp
egalizeTypesGeneric.cpp
|
| 6959b2bb6521baca57e5507ca039e51002d4a971 |
10-Nov-2008 |
Duncan Sands <baldrick@free.fr> |
Small cleanups. No functionality change intended!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@58992 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeIntegerTypes.cpp
egalizeVectorTypes.cpp
|
| dfb8bce12880d202cc65904a78e4e50d14a3c403 |
10-Nov-2008 |
Duncan Sands <baldrick@free.fr> |
Small cleanups. No functionality change intended!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@58992 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeIntegerTypes.cpp
egalizeVectorTypes.cpp
|
| a29c13086a3add78a3a79f744573fe09eaa9dc88 |
10-Nov-2008 |
Duncan Sands <baldrick@free.fr> |
When promoting the result of fp_to_uint/fp_to_sint,
inform the optimizers that the result must be zero/
sign extended from the smaller type. For example,
if a fp to unsigned i16 is promoted to fp to i32,
then we are allowed to assume that the extra 16 bits
are zero (because the result of fp to i16 is undefined
if the result does not fit in an i16). This is
quite aggressive, but should help the optimizers
produce better code. This requires correcting a
test which thought that fp_to_uint is some kind
of truncation, which it is not: in the testcase
(which does fp to i1), either the fp value converts
to 0 or 1 or the result is undefined, which is
quite different to truncation.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@58991 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeIntegerTypes.cpp
|
| 0fc01e49e560d197ec97b64070b868a9a2fda727 |
10-Nov-2008 |
Duncan Sands <baldrick@free.fr> |
When promoting the result of fp_to_uint/fp_to_sint,
inform the optimizers that the result must be zero/
sign extended from the smaller type. For example,
if a fp to unsigned i16 is promoted to fp to i32,
then we are allowed to assume that the extra 16 bits
are zero (because the result of fp to i16 is undefined
if the result does not fit in an i16). This is
quite aggressive, but should help the optimizers
produce better code. This requires correcting a
test which thought that fp_to_uint is some kind
of truncation, which it is not: in the testcase
(which does fp to i1), either the fp value converts
to 0 or 1 or the result is undefined, which is
quite different to truncation.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@58991 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeIntegerTypes.cpp
|
| baf26b2d3eb848dec25fcdd710dc2dd4ab6e2426 |
10-Nov-2008 |
Dale Johannesen <dalej@apple.com> |
Really fix testb optimization on big-endian.
Fixes ppc32 bootstrap.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@58979 91177308-0d34-0410-b5e6-96231b3b80d8
argetLowering.cpp
|
| 6d844dfe4b5fe8f2e006644fd29b3853874ab097 |
10-Nov-2008 |
Dale Johannesen <dalej@apple.com> |
Really fix testb optimization on big-endian.
Fixes ppc32 bootstrap.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@58979 91177308-0d34-0410-b5e6-96231b3b80d8
argetLowering.cpp
|
| aeb06d246254e4829a49164a11eacced9a43d9d4 |
10-Nov-2008 |
Mon P Wang <wangmp@apple.com> |
Added support for the following definition of shufflevector
<result> = shufflevector <n x <ty>> <v1>, <n x <ty>> <v2>, <m x i32> <mask>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@58964 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
egalizeDAG.cpp
egalizeTypes.h
egalizeVectorTypes.cpp
electionDAG.cpp
electionDAGBuild.cpp
|
| bff5d9cff3bbbb98a757451a8890ae71f189e82b |
10-Nov-2008 |
Mon P Wang <wangmp@apple.com> |
Added support for the following definition of shufflevector
<result> = shufflevector <n x <ty>> <v1>, <n x <ty>> <v2>, <m x i32> <mask>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@58964 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
egalizeDAG.cpp
egalizeTypes.h
egalizeVectorTypes.cpp
electionDAG.cpp
electionDAGBuild.cpp
|
| ced4900578cb72b58b7de9e798c2644713da8a52 |
09-Nov-2008 |
Dale Johannesen <dalej@apple.com> |
Temporarily revert 58825, which breaks PPC bootstrap.
xs
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@58930 91177308-0d34-0410-b5e6-96231b3b80d8
argetLowering.cpp
|
| 6a98f7dab19aa9768d60632b925eb25cb19f51bf |
09-Nov-2008 |
Dale Johannesen <dalej@apple.com> |
Temporarily revert 58825, which breaks PPC bootstrap.
xs
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@58930 91177308-0d34-0410-b5e6-96231b3b80d8
argetLowering.cpp
|
| 059b2dbd902233e1bbd040ec8c18c66b4186bb0e |
08-Nov-2008 |
Duncan Sands <baldrick@free.fr> |
Try to produce better code when scalarizing VSETCC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@58920 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeVectorTypes.cpp
|
| 6146330f84863002ca1be04c137736efe6ccd81c |
08-Nov-2008 |
baldrick <baldrick@91177308-0d34-0410-b5e6-96231b3b80d8> |
Try to produce better code when scalarizing VSETCC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@58920 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeVectorTypes.cpp
|
| b514ac9e3cddb3663c74afcf7bfa359a867e2780 |
08-Nov-2008 |
Dale Johannesen <dalej@apple.com> |
Make testb optimization work on big-endian targets.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@58874 91177308-0d34-0410-b5e6-96231b3b80d8
argetLowering.cpp
|
| 3903271ec1ff3226e558541f6bb61247b7316f1c |
08-Nov-2008 |
Dale Johannesen <dalej@apple.com> |
Make testb optimization work on big-endian targets.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@58874 91177308-0d34-0410-b5e6-96231b3b80d8
argetLowering.cpp
|
| 53e4e4478c69c2c2115db833b54385117c764d14 |
07-Nov-2008 |
Dale Johannesen <dalej@apple.com> |
Make FP tests requiring two compares work on PPC (PR 642).
This is Chris' patch from the PR, modified to realize that
SETUGT/SETULT occur legitimately with integers, plus
two fixes in LegalizeDAG to pass a valid result type into
LegalizeSetCC. The argument of TLI.getSetCCResultType is
ignored on PPC, but I think I'm following usage elsewhere.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@58871 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 32100b20ab5bcaf518d4758fd249f3296ca04f9d |
07-Nov-2008 |
Dale Johannesen <dalej@apple.com> |
Make FP tests requiring two compares work on PPC (PR 642).
This is Chris' patch from the PR, modified to realize that
SETUGT/SETULT occur legitimately with integers, plus
two fixes in LegalizeDAG to pass a valid result type into
LegalizeSetCC. The argument of TLI.getSetCCResultType is
ignored on PPC, but I think I'm following usage elsewhere.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@58871 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 47b3417cf0d90724f9dab71aae4c7204e46847b6 |
07-Nov-2008 |
Duncan Sands <baldrick@free.fr> |
Sign-extend rather than zero-extend when promoting
the condition for a BRCOND, according to what is
returned by getSetCCResultContents. Since all
targets return the same thing (ZeroOrOneSetCCResult),
this should be harmless! The point is that all over
the place the result of SETCC is fed directly into
BRCOND. On machines for which getSetCCResultContents
returns ZeroOrNegativeOneSetCCResult, this is a
sign-extended boolean. So it seems dangerous to
also feed BRCOND zero-extended booleans in some
circumstances - for example, when promoting the
condition.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@58861 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeIntegerTypes.cpp
|
| 8a772a7a83233e255fd4714f684e076a4d917c6d |
07-Nov-2008 |
Duncan Sands <baldrick@free.fr> |
Sign-extend rather than zero-extend when promoting
the condition for a BRCOND, according to what is
returned by getSetCCResultContents. Since all
targets return the same thing (ZeroOrOneSetCCResult),
this should be harmless! The point is that all over
the place the result of SETCC is fed directly into
BRCOND. On machines for which getSetCCResultContents
returns ZeroOrNegativeOneSetCCResult, this is a
sign-extended boolean. So it seems dangerous to
also feed BRCOND zero-extended booleans in some
circumstances - for example, when promoting the
condition.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@58861 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeIntegerTypes.cpp
|
| bc3c4296c03c6b9aee3cce68ae33279f5ad5ca2b |
07-Nov-2008 |
Dale Johannesen <dalej@apple.com> |
Fix unsigned->ppcf128 conversion.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@58856 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeFloatTypes.cpp
|
| e07c44ae031c85ba413eafecce1db7f67bb07228 |
07-Nov-2008 |
Dale Johannesen <dalej@apple.com> |
Fix unsigned->ppcf128 conversion.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@58856 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeFloatTypes.cpp
|
| 89217a6f1852e764e58c489872b2d155dc2b7b8b |
07-Nov-2008 |
Dale Johannesen <dalej@apple.com> |
When we're doing a compare of load-AND-constant to 0
(e.g. a bitfield test) narrow the load as much as possible.
The has the potential to avoid unnecessary partial-word
load-after-store conflicts, which cause stalls on several targets.
Also a size win on x86 (testb vs testl).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@58825 91177308-0d34-0410-b5e6-96231b3b80d8
argetLowering.cpp
|
| d0a7c0eb006563aa47d9e4338986c7766b191a2c |
07-Nov-2008 |
Dale Johannesen <dalej@apple.com> |
When we're doing a compare of load-AND-constant to 0
(e.g. a bitfield test) narrow the load as much as possible.
The has the potential to avoid unnecessary partial-word
load-after-store conflicts, which cause stalls on several targets.
Also a size win on x86 (testb vs testl).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@58825 91177308-0d34-0410-b5e6-96231b3b80d8
argetLowering.cpp
|
| b7c6ebcb4732302310cfaca81e1d26c3802c1646 |
07-Nov-2008 |
Bill Wendling <isanbard@gmail.com> |
- Modify the stack protector algorithm so that the stack slot is allocated in
LLVM IR code and not in the selection DAG ISel. This is a cleaner solution.
- Fix the heuristic for determining if protectors are necessary. The previous
one wasn't checking the proper type size.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@58824 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuild.cpp
|
| 8126a3f4f8d04e45f8fa21d4c76c128477ac4398 |
07-Nov-2008 |
Bill Wendling <isanbard@gmail.com> |
- Modify the stack protector algorithm so that the stack slot is allocated in
LLVM IR code and not in the selection DAG ISel. This is a cleaner solution.
- Fix the heuristic for determining if protectors are necessary. The previous
one wasn't checking the proper type size.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@58824 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuild.cpp
|
| e0b436ac41a00bc210163964d3cf393c8b487c9e |
06-Nov-2008 |
Mon P Wang <wangmp@apple.com> |
Fixed scalarizing an extract subvector and prevent an infinite loop
when simplify a vector.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@58820 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 927daf5880231a034bd58f899d30a03a553b4135 |
06-Nov-2008 |
Mon P Wang <wangmp@apple.com> |
Fixed scalarizing an extract subvector and prevent an infinite loop
when simplify a vector.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@58820 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| e75808cf3d92d14c5659a15d0d17bd21a54fd8cc |
06-Nov-2008 |
Devang Patel <dpatel@apple.com> |
Emit label for llvm.dbg.func.start of the inlined function.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@58814 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
|
| ed00d01712c891c40d5bac5ece79e787c67b6a63 |
06-Nov-2008 |
Devang Patel <dpatel@apple.com> |
Emit label for llvm.dbg.func.start of the inlined function.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@58814 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
|
| b951aec3adf4ac34aa311c912ed8a7f6b437eaa5 |
06-Nov-2008 |
Duncan Sands <baldrick@free.fr> |
Formating/comment changes - no functionality change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@58801 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeTypes.h
|
| 951507e9c2202c58069cb8dc370736aef826f960 |
06-Nov-2008 |
Duncan Sands <baldrick@free.fr> |
Formating/comment changes - no functionality change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@58801 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeTypes.h
|
| 4c3a1d8d2be313f1b322f680801fec262a2480c6 |
06-Nov-2008 |
Bill Wendling <isanbard@gmail.com> |
- Rename stackprotector_{prologue,epilogue} to stackprotector_{create,check}.
- Get rid of "HasStackProtector" in MachineFrameInfo.
- Modify intrinsics to tell which are doing what with memory.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@58799 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuild.cpp
|
| 06e5d3351b0d7210d7d2580d09523f36a11eb442 |
06-Nov-2008 |
Bill Wendling <isanbard@gmail.com> |
- Rename stackprotector_{prologue,epilogue} to stackprotector_{create,check}.
- Get rid of "HasStackProtector" in MachineFrameInfo.
- Modify intrinsics to tell which are doing what with memory.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@58799 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuild.cpp
|
| f007a8b931e229eb325319c97363be8507311e2e |
06-Nov-2008 |
Mon P Wang <wangmp@apple.com> |
Widening cleanup
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@58796 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
egalizeTypes.h
argetLowering.cpp
|
| a5a239f87ef90c0dd8b0c26553c8d81f5c1d7933 |
06-Nov-2008 |
Mon P Wang <wangmp@apple.com> |
Widening cleanup
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@58796 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
egalizeTypes.h
argetLowering.cpp
|
| b2a4298ce41e7ef80cd75a3c1dfa6433f0759a1a |
06-Nov-2008 |
Bill Wendling <isanbard@gmail.com> |
Implement the stack protector stack accesses via intrinsics:
- stackprotector_prologue creates a stack object and stores the guard there.
- stackprotector_epilogue reads the stack guard from the stack position created
by stackprotector_prologue.
- The PrologEpilogInserter was changed to make sure that the stack guard is
first on the stack frame.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@58791 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuild.cpp
|
| 6d54ef9e36818ddb12805e5ae0fe4c97ef9088ef |
06-Nov-2008 |
Bill Wendling <isanbard@gmail.com> |
Implement the stack protector stack accesses via intrinsics:
- stackprotector_prologue creates a stack object and stores the guard there.
- stackprotector_epilogue reads the stack guard from the stack position created
by stackprotector_prologue.
- The PrologEpilogInserter was changed to make sure that the stack guard is
first on the stack frame.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@58791 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuild.cpp
|
| 20dd0460a1b8fe9119949434a9dbe8bdd443c13d |
06-Nov-2008 |
Devang Patel <dpatel@apple.com> |
Emit label for llvm.dbg.func.start of the inlined function.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@58786 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuild.cpp
|
| 1fdfdd61f34c1db1a20205cfa3e2dfb36404cff4 |
06-Nov-2008 |
Devang Patel <dpatel@apple.com> |
Emit label for llvm.dbg.func.start of the inlined function.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@58786 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuild.cpp
|
| c45cb9f739bd5d541576212f1e0cc2689a731ab8 |
05-Nov-2008 |
Duncan Sands <baldrick@free.fr> |
Fix thinko in ppcf128 expansion of truncating store.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@58753 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeFloatTypes.cpp
|
| 54a71130f1da5f0a73d1f2f118e566efcd97ff2e |
05-Nov-2008 |
Duncan Sands <baldrick@free.fr> |
Fix thinko in ppcf128 expansion of truncating store.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@58753 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeFloatTypes.cpp
|
| 3eb57d54395a979f8d16ca39cd41214a5daa55ea |
05-Nov-2008 |
Evan Cheng <evan.cheng@apple.com> |
Type of shuffle mask has changed.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@58751 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 4fdfdac468ce40d1270773ba5929b8c54646d892 |
05-Nov-2008 |
Evan Cheng <evan.cheng@apple.com> |
Type of shuffle mask has changed.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@58751 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 53997b07451a28582a8bb55716e13fc1bcd5c838 |
04-Nov-2008 |
Dale Johannesen <dalej@apple.com> |
80 columns
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@58717 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 96db7964fa0ee232a849ded20412a4623950e388 |
04-Nov-2008 |
Dale Johannesen <dalej@apple.com> |
80 columns
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@58717 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| e59416efb8472ee95c4500a94d2048c585faff6d |
04-Nov-2008 |
Duncan Sands <baldrick@free.fr> |
Fix PR3011: LegalizeTypes support for scalarizing
SELECT_CC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@58706 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeTypes.h
egalizeVectorTypes.cpp
|
| e9027151b73c74aec6ad0cf17f58c8618c623167 |
04-Nov-2008 |
Duncan Sands <baldrick@free.fr> |
Fix PR3011: LegalizeTypes support for scalarizing
SELECT_CC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@58706 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeTypes.h
egalizeVectorTypes.cpp
|
| 283c6965d09affb93a9374a6a179cb0f6d188513 |
03-Nov-2008 |
Dale Johannesen <dalej@apple.com> |
Fix some ppcf128 regressions: make ExpandFloatRes_LOAD
work correctly, and bring over a late change to ppcf128
SetCC handling.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@58642 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeFloatTypes.cpp
|
| c96f6595bb4ac76190ba026cd5676931ca654652 |
03-Nov-2008 |
Dale Johannesen <dalej@apple.com> |
Fix some ppcf128 regressions: make ExpandFloatRes_LOAD
work correctly, and bring over a late change to ppcf128
SetCC handling.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@58642 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeFloatTypes.cpp
|
| d821726a91000c1b2de7ca8aafdc27b1a311741b |
03-Nov-2008 |
Duncan Sands <baldrick@free.fr> |
Make VAARG promotion work correctly with large funky
sized integers like i129, and also reduce the number
of assumptions made about how vaarg is implemented.
This still doesn't work correctly for small integers
like (eg) i1 on x86, since x86 passes each of them
(essentially an i8) in a 4 byte stack slot, so the
pointer needs to be advanced by 4 bytes not by 1 byte
as now. But this is no longer a LegalizeTypes problem
(it was also wrong in LT before): it is a bug in the
operation expansion in LegalizeDAG: now LegalizeTypes
turns an i1 vaarg into an i8 vaarg which would work
fine if only the i8 vaarg was turned into correct code
later.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@58635 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeIntegerTypes.cpp
|
| 5fb4d16b308b1b3c1b0fa1f2144ee2021085da73 |
03-Nov-2008 |
Duncan Sands <baldrick@free.fr> |
Make VAARG promotion work correctly with large funky
sized integers like i129, and also reduce the number
of assumptions made about how vaarg is implemented.
This still doesn't work correctly for small integers
like (eg) i1 on x86, since x86 passes each of them
(essentially an i8) in a 4 byte stack slot, so the
pointer needs to be advanced by 4 bytes not by 1 byte
as now. But this is no longer a LegalizeTypes problem
(it was also wrong in LT before): it is a bug in the
operation expansion in LegalizeDAG: now LegalizeTypes
turns an i1 vaarg into an i8 vaarg which would work
fine if only the i8 vaarg was turned into correct code
later.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@58635 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeIntegerTypes.cpp
|
| 5c58a3168f006aaacf2e9c6a69dde86b630d783e |
03-Nov-2008 |
Duncan Sands <baldrick@free.fr> |
Make VAARG work with x86 long double (which is
10 bytes long, but is passed in 12/16 bytes).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@58608 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 55a4c235ee0ddb4df64c73533b3456137a571b4b |
03-Nov-2008 |
Duncan Sands <baldrick@free.fr> |
Make VAARG work with x86 long double (which is
10 bytes long, but is passed in 12/16 bytes).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@58608 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 3efcd4a65cdf41ec72205757421dca6026e92a19 |
01-Nov-2008 |
Mon P Wang <wangmp@apple.com> |
Added interface to allow clients to create a MemIntrinsicNode for
target intrinsics that touches memory
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@58548 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuild.cpp
|
| 9de70a1e5ffa0273beeaa08e73cc2981bf00864f |
01-Nov-2008 |
Mon P Wang <wangmp@apple.com> |
Added interface to allow clients to create a MemIntrinsicNode for
target intrinsics that touches memory
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@58548 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuild.cpp
|
| 87e82f00adb6628ed6368db1eac7d944489287ff |
31-Oct-2008 |
Dan Gohman <gohman@apple.com> |
Remove some unused virtual function bodies.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@58524 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGRRList.cpp
|
| 0e4acb0606028d79952ec34c77e42480cb413ca8 |
31-Oct-2008 |
Dan Gohman <gohman@apple.com> |
Remove some unused virtual function bodies.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@58524 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGRRList.cpp
|
| 06f0aff69eb0289bdba19a364132bc522f44feba |
31-Oct-2008 |
Duncan Sands <baldrick@free.fr> |
Add a bunch of libcalls for ppcf128 that were somehow
completely forgotten about when writing LegalizeTypes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@58508 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeFloatTypes.cpp
egalizeTypes.cpp
egalizeTypes.h
|
| 9f9eef8c9803bb584f480b5057383f72cdc8a814 |
31-Oct-2008 |
Duncan Sands <baldrick@free.fr> |
Add a bunch of libcalls for ppcf128 that were somehow
completely forgotten about when writing LegalizeTypes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@58508 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeFloatTypes.cpp
egalizeTypes.cpp
egalizeTypes.h
|
| 3d0f5afefb2c8be6233c2bcebdcf57a5c0b2b9a2 |
30-Oct-2008 |
Duncan Sands <baldrick@free.fr> |
Fix PR2986: do not use a potentially illegal
type for the shift amount type. Add a check
that shifts and rotates use the type returned
by getShiftAmountTy for the amount. This
exposed some problems in CellSPU and PPC,
which have already been fixed.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@58455 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 5bb3f8d5b27776c7e048767617a37c4f13bfdd72 |
30-Oct-2008 |
Duncan Sands <baldrick@free.fr> |
Fix PR2986: do not use a potentially illegal
type for the shift amount type. Add a check
that shifts and rotates use the type returned
by getShiftAmountTy for the amount. This
exposed some problems in CellSPU and PPC,
which have already been fixed.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@58455 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 2eb13c347f0e76d1e9306225b972a7d050d8a461 |
30-Oct-2008 |
Mon P Wang <wangmp@apple.com> |
Add missing vsetcc expansion for widening
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@58443 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 42ac14ede1e1d08976ce1ad7d3270e8ab8222f55 |
30-Oct-2008 |
Mon P Wang <wangmp@apple.com> |
Add missing vsetcc expansion for widening
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@58443 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 0c39719bfc7d0b3e61fbd55e1115184a1d5f6ae7 |
30-Oct-2008 |
Mon P Wang <wangmp@apple.com> |
Add initial support for vector widening. Logic is set to widen for X86.
One will only see an effect if legalizetype is not active. Will move
support to LegalizeType soon.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@58426 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
egalizeTypes.h
argetLowering.cpp
|
| 1448aadd407aedbca9a93234d3bc814f8d9a90e2 |
30-Oct-2008 |
Mon P Wang <wangmp@apple.com> |
Add initial support for vector widening. Logic is set to widen for X86.
One will only see an effect if legalizetype is not active. Will move
support to LegalizeType soon.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@58426 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
egalizeTypes.h
argetLowering.cpp
|
| b99e740d71b68153284669c42ae9421d0f7e1cc2 |
29-Oct-2008 |
Duncan Sands <baldrick@free.fr> |
Uniformize capitalization of NodeId.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@58386 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeTypes.cpp
egalizeTypes.h
|
| 560946481ef1aaa704e2916bcaf7f1b904ffb666 |
29-Oct-2008 |
Duncan Sands <baldrick@free.fr> |
Uniformize capitalization of NodeId.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@58386 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeTypes.cpp
egalizeTypes.h
|
| 21c2972f7d24680f6475877a3398b7f8cf515b33 |
29-Oct-2008 |
Duncan Sands <baldrick@free.fr> |
Fix PR2977: LegalizeTypes support for expanding
VAARG.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@58379 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeFloatTypes.cpp
egalizeIntegerTypes.cpp
egalizeTypes.h
egalizeTypesGeneric.cpp
|
| cbd6d28608cebf2ecaf3d2ebf19a02815f0bcec4 |
29-Oct-2008 |
Duncan Sands <baldrick@free.fr> |
Fix PR2977: LegalizeTypes support for expanding
VAARG.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@58379 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeFloatTypes.cpp
egalizeIntegerTypes.cpp
egalizeTypes.h
egalizeTypesGeneric.cpp
|
| d22ec5f62813f8cf2ed8091f44a14377209b1a59 |
29-Oct-2008 |
Duncan Sands <baldrick@free.fr> |
Add sanity checking for BUILD_PAIR (I noticed the
other day that PPC custom lowering could create
a BUILD_PAIR of two f64 with a result type of...
f64! - already fixed). Fix a place that triggers
the sanity check.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@58378 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
electionDAGBuild.cpp
|
| 70269a7a6f7b6ac70a87210f281e806f95abcaeb |
29-Oct-2008 |
Duncan Sands <baldrick@free.fr> |
Add sanity checking for BUILD_PAIR (I noticed the
other day that PPC custom lowering could create
a BUILD_PAIR of two f64 with a result type of...
f64! - already fixed). Fix a place that triggers
the sanity check.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@58378 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
electionDAGBuild.cpp
|
| 23b10f5b64e594aa7c6b415805b563fed2a75874 |
29-Oct-2008 |
Duncan Sands <baldrick@free.fr> |
Fix a FIXME: in ReplaceNodeWith, if the new node
is morphed by AnalyzeNewNode into a previously
processed node, and different result values of
that node are remapped to values with different
nodes, then we could end up using wrong values
here [we were assuming that all results remap
to values with the same underlying node]. This
seems theoretically possible, but I don't have
a testcase. The meat of the patch is in the
changes to AnalyzeNewNode/AnalyzeNewValue and
ReplaceNodeWith. While there, I changed names
like RemapNode to RemapValue, since it really
remaps values. To tell the truth, I would be
much happier if we were only remapping nodes
(it would simplify a bunch of logic, and allow
for some cute speedups) but I haven't yet worked
out how to do that.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@58372 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeTypes.cpp
egalizeTypes.h
|
| f8b23a3dfdf76a2c1d6d4db8a4408e882d610f56 |
29-Oct-2008 |
Duncan Sands <baldrick@free.fr> |
Fix a FIXME: in ReplaceNodeWith, if the new node
is morphed by AnalyzeNewNode into a previously
processed node, and different result values of
that node are remapped to values with different
nodes, then we could end up using wrong values
here [we were assuming that all results remap
to values with the same underlying node]. This
seems theoretically possible, but I don't have
a testcase. The meat of the patch is in the
changes to AnalyzeNewNode/AnalyzeNewValue and
ReplaceNodeWith. While there, I changed names
like RemapNode to RemapValue, since it really
remaps values. To tell the truth, I would be
much happier if we were only remapping nodes
(it would simplify a bunch of logic, and allow
for some cute speedups) but I haven't yet worked
out how to do that.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@58372 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeTypes.cpp
egalizeTypes.h
|
| b3bc6352defdf1a5c6b1b0770d0c4d603f6524a8 |
29-Oct-2008 |
Duncan Sands <baldrick@free.fr> |
Fix 80 column violations.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@58371 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeIntegerTypes.cpp
|
| b3e36986c7a65419988d35aba50716a1b80a25a8 |
29-Oct-2008 |
Duncan Sands <baldrick@free.fr> |
Fix 80 column violations.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@58371 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeIntegerTypes.cpp
|
| 86813ce5faa68e96e2454b5ce267fefdbe5d2482 |
29-Oct-2008 |
Duncan Sands <baldrick@free.fr> |
Fix 80 column violations.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@58370 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeFloatTypes.cpp
|
| 38f05add3b9540f15fea1008b1b3df7797499f24 |
29-Oct-2008 |
Duncan Sands <baldrick@free.fr> |
Fix 80 column violations.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@58370 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeFloatTypes.cpp
|
| 2275105edbee89df8f5a68655ee75c9a5f169dbb |
28-Oct-2008 |
Dan Gohman <gohman@apple.com> |
Take Chris' suggestion and define EnableFastISelVerbose and
EnableFastISelAbort variables for Release mode instead of
using ifdefs in the code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@58350 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 8c71fc169443e27dfda09d243156bea44320f67d |
28-Oct-2008 |
Dan Gohman <gohman@apple.com> |
Take Chris' suggestion and define EnableFastISelVerbose and
EnableFastISelAbort variables for Release mode instead of
using ifdefs in the code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@58350 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 727809ad8a826f26b757747ae2a329b49e5449b3 |
28-Oct-2008 |
Dan Gohman <gohman@apple.com> |
Protect the code for fast-isel debugging with #ifndef NDEBUG.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@58340 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 71d2e68fd8fb435d7d2c7d01e4d447ee24afeb3f |
28-Oct-2008 |
Dan Gohman <gohman@apple.com> |
Protect the code for fast-isel debugging with #ifndef NDEBUG.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@58340 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 57760d96e2dfb485dc53fe2799df24bd18157abb |
28-Oct-2008 |
Duncan Sands <baldrick@free.fr> |
Fix darwin ppc llvm-gcc build breakage: intercept
ppcf128 to i32 conversion and expand it into a code
sequence like in LegalizeDAG. This needs custom
ppc lowering of FP_ROUND_INREG, so turn that on and
make it work with LegalizeTypes. Probably PPC should
simply custom lower the original conversion.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@58329 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeFloatTypes.cpp
|
| ff258b1c72545025b47c7004c13200b12d6e9c1a |
28-Oct-2008 |
Duncan Sands <baldrick@free.fr> |
Fix darwin ppc llvm-gcc build breakage: intercept
ppcf128 to i32 conversion and expand it into a code
sequence like in LegalizeDAG. This needs custom
ppc lowering of FP_ROUND_INREG, so turn that on and
make it work with LegalizeTypes. Probably PPC should
simply custom lower the original conversion.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@58329 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeFloatTypes.cpp
|
| 1acb29c8ead8b7a6ac5dd63720711d397ac25ad9 |
28-Oct-2008 |
Duncan Sands <baldrick@free.fr> |
Fix a testcase provided by Bill in which the node
id could end up being wrong mostly because of
forgetting to remap new nodes that morphed into
processed nodes through CSE.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@58323 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeTypes.cpp
egalizeTypes.h
|
| a216df9021c13c7d7a266cb3748ebfbf613cf057 |
28-Oct-2008 |
Duncan Sands <baldrick@free.fr> |
Fix a testcase provided by Bill in which the node
id could end up being wrong mostly because of
forgetting to remap new nodes that morphed into
processed nodes through CSE.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@58323 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeTypes.cpp
egalizeTypes.h
|
| 6e1c6231ba93ed7590c62ef0f94d0d9443b598ed |
28-Oct-2008 |
Chris Lattner <sabre@nondot.org> |
Don't produce invalid comparisons after legalize.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@58320 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 3ab74bd7f241dbf14ebaa42544e09b466d322f6e |
28-Oct-2008 |
Chris Lattner <sabre@nondot.org> |
Don't produce invalid comparisons after legalize.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@58320 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 7fe5e1812f5d018784d5186ccb31525665e61863 |
28-Oct-2008 |
Chris Lattner <sabre@nondot.org> |
fix some whitespace stuff
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@58319 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 23d3bdf695a0f8445e7701053e9e0b58d79ee7af |
28-Oct-2008 |
Chris Lattner <sabre@nondot.org> |
fix some whitespace stuff
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@58319 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 8e7fa916fe87733b3660466b3a1c91d650c473d3 |
27-Oct-2008 |
Ted Kremenek <kremenek@apple.com> |
Fix bogus comparison of "const char *" with c-string literal. Use strcmp instead.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@58290 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGPrinter.cpp
|
| b2b229296a53bc439b39e83e77038e6e1d3e7309 |
27-Oct-2008 |
Ted Kremenek <kremenek@apple.com> |
Fix bogus comparison of "const char *" with c-string literal. Use strcmp instead.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@58290 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGPrinter.cpp
|
| c5e7e8d87d4a3b10edd5ac93ba1f3cdb4d1b449a |
27-Oct-2008 |
David Greene <greened@obbligato.org> |
Add setSubgraphColor to color an entire portion of a SelectionDAG. This
will be used to support debug features in TableGen.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@58257 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGPrinter.cpp
|
| f361483f2908b47e25d34d92ea8f4f1bdf6033cc |
27-Oct-2008 |
David Greene <greened@obbligato.org> |
Add setSubgraphColor to color an entire portion of a SelectionDAG. This
will be used to support debug features in TableGen.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@58257 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGPrinter.cpp
|
| 0dc4045bd27c177416745d2e72277b0a92c3ab83 |
27-Oct-2008 |
Duncan Sands <baldrick@free.fr> |
Fix UpdateNodeOperands so that it does CSE of calls
(and a bunch of other node types). While there, I
added a doNotCSE predicate and used it to reduce code
duplication (some of the duplicated code was wrong...).
This fixes ARM/cse-libcalls.ll when using LegalizeTypes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@58249 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 1e450d4efe652b56a781e7f72dc6ac644e75eee6 |
27-Oct-2008 |
Duncan Sands <baldrick@free.fr> |
Fix UpdateNodeOperands so that it does CSE of calls
(and a bunch of other node types). While there, I
added a doNotCSE predicate and used it to reduce code
duplication (some of the duplicated code was wrong...).
This fixes ARM/cse-libcalls.ll when using LegalizeTypes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@58249 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 20f04e9fdd437712b323661e5041fd88431185b3 |
27-Oct-2008 |
Duncan Sands <baldrick@free.fr> |
Fix a bug in which a node could be added to the
worklist twice: UpdateNodeOperands could morph
a new node into a node already on the worklist.
We would then recalculate the NodeId for this
existing node and add it to the worklist. The
testcase is ARM/cse-libcalls.ll, the problem
showing up once UpdateNodeOperands is taught to
do CSE for calls.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@58246 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeTypes.cpp
|
| f7502644a25e6a0f6dbb473cabbc794ece7029bc |
27-Oct-2008 |
Duncan Sands <baldrick@free.fr> |
Fix a bug in which a node could be added to the
worklist twice: UpdateNodeOperands could morph
a new node into a node already on the worklist.
We would then recalculate the NodeId for this
existing node and add it to the worklist. The
testcase is ARM/cse-libcalls.ll, the problem
showing up once UpdateNodeOperands is taught to
do CSE for calls.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@58246 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeTypes.cpp
|
| 7cb07874dcadaa9a5082a80959cd15d44ba3a133 |
27-Oct-2008 |
Duncan Sands <baldrick@free.fr> |
Turn on LegalizeTypes, the new type legalization
codegen infrastructure, by default. Please report
any breakage to the mailing lists.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@58232 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| b3ac388fda3d4b5c6446603377af0a0f70b64b4b |
27-Oct-2008 |
Duncan Sands <baldrick@free.fr> |
Turn on LegalizeTypes, the new type legalization
codegen infrastructure, by default. Please report
any breakage to the mailing lists.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@58232 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 048ca55dc1b667b99060ce16a4891b36e950cf73 |
25-Oct-2008 |
Dan Gohman <gohman@apple.com> |
SDNodes may have at most one Flag result. Update this comment
to reflect that.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@58145 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAG.cpp
|
| f175adeedcb8608432b89a60836915599ce7a29a |
25-Oct-2008 |
Dan Gohman <gohman@apple.com> |
SDNodes may have at most one Flag result. Update this comment
to reflect that.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@58145 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAG.cpp
|
| fea90880302fc7b6d588292ae0e55d33ebe80f12 |
24-Oct-2008 |
Dale Johannesen <dalej@apple.com> |
Initialize uninitialized variable.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@58057 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 92434a5a9a62d7ac97f7d04673fb5f2153497931 |
24-Oct-2008 |
Dale Johannesen <dalej@apple.com> |
Initialize uninitialized variable.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@58057 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| ee4c619b3b28a42078fc8033e5dccd42fc6edd42 |
23-Oct-2008 |
Duncan Sands <baldrick@free.fr> |
Fix thinko - the operand number has nothing to do
with the result number.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@58041 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeFloatTypes.cpp
egalizeIntegerTypes.cpp
|
| 8a833bbc77fc1cabef96050117a9b39a1ea75926 |
23-Oct-2008 |
Duncan Sands <baldrick@free.fr> |
Fix thinko - the operand number has nothing to do
with the result number.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@58041 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeFloatTypes.cpp
egalizeIntegerTypes.cpp
|
| 2cbe7fe3963e603c1485b1378b7e29ef63f31442 |
22-Oct-2008 |
Duncan Sands <baldrick@free.fr> |
LegalizeTypes soft-float support for fpow.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57973 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeFloatTypes.cpp
egalizeTypes.h
|
| e2fbf68c95cf19db979a7a5a55b3e433d0231334 |
22-Oct-2008 |
Duncan Sands <baldrick@free.fr> |
LegalizeTypes soft-float support for fpow.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57973 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeFloatTypes.cpp
egalizeTypes.h
|
| f9410141f703f4e8a6aba717617ef958249f6d13 |
22-Oct-2008 |
Duncan Sands <baldrick@free.fr> |
Be nice to CellSPU: for this target getSetCCResultType
may return i8, which can result in SELECT nodes for
which the type of the condition is i8, but there are
no patterns for select with i8 condition. Tweak the
LegalizeTypes logic to avoid this as much as possible.
This isn't a real fix because it is still perfectly
possible to end up with such select nodes - CellSPU
needs to be fixed IMHO.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57968 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeIntegerTypes.cpp
|
| 4bbfd9eff6dc0bfa1e6903daed81d90035bf36f5 |
22-Oct-2008 |
Duncan Sands <baldrick@free.fr> |
Be nice to CellSPU: for this target getSetCCResultType
may return i8, which can result in SELECT nodes for
which the type of the condition is i8, but there are
no patterns for select with i8 condition. Tweak the
LegalizeTypes logic to avoid this as much as possible.
This isn't a real fix because it is still perfectly
possible to end up with such select nodes - CellSPU
needs to be fixed IMHO.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57968 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeIntegerTypes.cpp
|
| 29a2822f287275a0d4df49f98104409d8f97c5df |
22-Oct-2008 |
Duncan Sands <baldrick@free.fr> |
Port from LegalizeDAG the logic to only generate
ADDC/ADDE/SUBC/SUBE if the target supports it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57967 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeIntegerTypes.cpp
|
| a89355ea88b78b4f91e1002d7139498a3b2b01cb |
22-Oct-2008 |
Duncan Sands <baldrick@free.fr> |
Port from LegalizeDAG the logic to only generate
ADDC/ADDE/SUBC/SUBE if the target supports it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57967 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeIntegerTypes.cpp
|
| 3b521d5acccf4fecdb1aea878180df6dc29553dc |
22-Oct-2008 |
Duncan Sands <baldrick@free.fr> |
Add some comments explaining the meaning of a boolean
that is not of type MVT::i1 in SELECT and SETCC nodes.
Relax the LegalizeTypes SELECT condition promotion
sanity checks to allow other condition types than i1.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57966 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeIntegerTypes.cpp
|
| 98d6d7f04679c7f27374b62bddd229472cbea032 |
22-Oct-2008 |
Duncan Sands <baldrick@free.fr> |
Add some comments explaining the meaning of a boolean
that is not of type MVT::i1 in SELECT and SETCC nodes.
Relax the LegalizeTypes SELECT condition promotion
sanity checks to allow other condition types than i1.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57966 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeIntegerTypes.cpp
|
| 0954aefd81c7aa80c0e29408610add1e793c1c44 |
22-Oct-2008 |
Duncan Sands <baldrick@free.fr> |
Temporarily allow the operands of a BUILD_VECTOR
to have a different type to the vector element
type. This should be fairly harmless because in
the past guys like this were being built all over
the place (and were cleaned up when I added this
check). The reason for relaxing this check is
that it helps LegalizeTypes legalize vector
shuffles: the mask is a BUILD_VECTOR that it is
*not always possible* to legalize while keeping it
a BUILD_VECTOR (vector_shuffle requires the mask
to be a BUILD_VECTOR, as opposed to a vector with
the right vector type). With this check it is even
harder to legalize the mask - turning the check off
means that LegalizeTypes manages to legalize almost
all vector shuffles encountered in practice. The
correct solution is to change vector_shuffle to be a
variadic node with the mask built into it as operands.
While waiting for that change, this hack stops the
problem with vector_shuffle from blocking the turning
on of LegalizeTypes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57965 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 944d0d515fd58645a0b8487e6cbe6bb36a4e73fe |
22-Oct-2008 |
Duncan Sands <baldrick@free.fr> |
Temporarily allow the operands of a BUILD_VECTOR
to have a different type to the vector element
type. This should be fairly harmless because in
the past guys like this were being built all over
the place (and were cleaned up when I added this
check). The reason for relaxing this check is
that it helps LegalizeTypes legalize vector
shuffles: the mask is a BUILD_VECTOR that it is
*not always possible* to legalize while keeping it
a BUILD_VECTOR (vector_shuffle requires the mask
to be a BUILD_VECTOR, as opposed to a vector with
the right vector type). With this check it is even
harder to legalize the mask - turning the check off
means that LegalizeTypes manages to legalize almost
all vector shuffles encountered in practice. The
correct solution is to change vector_shuffle to be a
variadic node with the mask built into it as operands.
While waiting for that change, this hack stops the
problem with vector_shuffle from blocking the turning
on of LegalizeTypes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57965 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 1c15bf58a3700d40a6a88ac0ce14a2c99f111483 |
21-Oct-2008 |
Dale Johannesen <dalej@apple.com> |
Add an SSE2 algorithm for uint64->f64 conversion.
The same one Apple gcc uses, faster. Also gets the
extreme case in gcc.c-torture/execute/ieee/rbug.c
correct which we weren't before; this is not
sufficient to get the test to pass though, there
is another bug.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57926 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| a359b8be7ad658bdea432fac228660abd853f7fc |
21-Oct-2008 |
Dale Johannesen <dalej@apple.com> |
Add an SSE2 algorithm for uint64->f64 conversion.
The same one Apple gcc uses, faster. Also gets the
extreme case in gcc.c-torture/execute/ieee/rbug.c
correct which we weren't before; this is not
sufficient to get the test to pass though, there
is another bug.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57926 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 7ea1ca6229ca228a1a3a0ff453c3530bf4f7a26e |
21-Oct-2008 |
Dan Gohman <gohman@apple.com> |
Fix SelectionDAGBuild lowering of Select instructions to
handle first-class aggregate values. Also, fix a bug in
the Ret handling for empty aggregates.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57925 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuild.cpp
|
| 7916059195b219af68a826c8244efbe35cd79301 |
21-Oct-2008 |
Dan Gohman <gohman@apple.com> |
Fix SelectionDAGBuild lowering of Select instructions to
handle first-class aggregate values. Also, fix a bug in
the Ret handling for empty aggregates.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57925 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuild.cpp
|
| 4401361a2fb92c82317dbfbb1616f54ced2b51f3 |
21-Oct-2008 |
Dan Gohman <gohman@apple.com> |
Don't create TargetGlobalAddress nodes with offsets that don't fit
in the 32-bit signed offset field of addresses. Even though this
may be intended, some linkers refuse to relocate code where the
relocated address computation overflows.
Also, fix the sign-extension of constant offsets to use the
actual pointer size, rather than the size of the GlobalAddress
node, which may be different, for example on x86-64 where MVT::i32
is used when the address is being fit into the 32-bit displacement
field.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57885 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 3d5257c35a463f6bc443139bdb84f94cd53299db |
21-Oct-2008 |
Dan Gohman <gohman@apple.com> |
Don't create TargetGlobalAddress nodes with offsets that don't fit
in the 32-bit signed offset field of addresses. Even though this
may be intended, some linkers refuse to relocate code where the
relocated address computation overflows.
Also, fix the sign-extension of constant offsets to use the
actual pointer size, rather than the size of the GlobalAddress
node, which may be different, for example on x86-64 where MVT::i32
is used when the address is being fit into the 32-bit displacement
field.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57885 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| e7d238ea239e6ab8a2c60ecd27468f3cfc1bb08b |
21-Oct-2008 |
Dan Gohman <gohman@apple.com> |
Make the NaN test come second, heuristically assuming
that NaNs are less common.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57871 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 2b5b9ca56863e3614be22708e7a3fd9faffcdc71 |
21-Oct-2008 |
Dan Gohman <gohman@apple.com> |
Make the NaN test come second, heuristically assuming
that NaNs are less common.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57871 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 01426e1a2755b05330b55b93f91887f5ff816adb |
21-Oct-2008 |
Chris Lattner <sabre@nondot.org> |
Fix gcc.c-torture/compile/920520-1.c by inserting bitconverts
for strange asm conditions earlier. In this case, we have a
double being passed in an integer reg class. Convert to like
sized integer register so that we allocate the right number
for the class (two i32's for the f64 in this case).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57862 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuild.cpp
|
| ea90c03309ef37e00fec1e716a4858fd4988213b |
21-Oct-2008 |
Chris Lattner <sabre@nondot.org> |
Fix gcc.c-torture/compile/920520-1.c by inserting bitconverts
for strange asm conditions earlier. In this case, we have a
double being passed in an integer reg class. Convert to like
sized integer register so that we allocate the right number
for the class (two i32's for the f64 in this case).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57862 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuild.cpp
|
| d659d50482e2f9edf8f436e4a1aa30c68c6d020b |
20-Oct-2008 |
Dan Gohman <gohman@apple.com> |
Fast-isel no longer an experiment.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57845 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| eec72ed75d960ab7aabb7237423de6b76d1f332b |
20-Oct-2008 |
Dan Gohman <gohman@apple.com> |
Fast-isel no longer an experiment.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57845 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| d398672dddc50704ba7c4adbcf7dc99bd14c0108 |
20-Oct-2008 |
Duncan Sands <baldrick@free.fr> |
Support operations like fp_to_uint with a vector
result type when the result type is legal but
not the operand type. Add additional support
for EXTRACT_SUBVECTOR and CONCAT_VECTORS,
needed to handle such cases.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57840 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeTypes.h
egalizeVectorTypes.cpp
|
| 07ac448d483e6f7837ffa972e087411371e1c324 |
20-Oct-2008 |
Duncan Sands <baldrick@free.fr> |
Support operations like fp_to_uint with a vector
result type when the result type is legal but
not the operand type. Add additional support
for EXTRACT_SUBVECTOR and CONCAT_VECTORS,
needed to handle such cases.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57840 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeTypes.h
egalizeVectorTypes.cpp
|
| b5f68e241f9eb19e5694131df830acbfce20a6eb |
20-Oct-2008 |
Duncan Sands <baldrick@free.fr> |
LegalizeTypes support for atomic operation promotion.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57838 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeIntegerTypes.cpp
egalizeTypes.h
|
| 8d9c9b001d90b6c011bca4b595555ef9bdf4fb01 |
20-Oct-2008 |
Duncan Sands <baldrick@free.fr> |
LegalizeTypes support for atomic operation promotion.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57838 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeIntegerTypes.cpp
egalizeTypes.h
|
| 49c18cce976c158e86f54c681dff21bb81640fb8 |
20-Oct-2008 |
Duncan Sands <baldrick@free.fr> |
Use DAG.getIntPtrConstant rather than DAG.getConstant
with TLI.getPointerTy for a small simplification.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57837 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeFloatTypes.cpp
egalizeIntegerTypes.cpp
|
| 5fa796a3be8ed1e2a521831f49b920d2fb07916f |
20-Oct-2008 |
Duncan Sands <baldrick@free.fr> |
Use DAG.getIntPtrConstant rather than DAG.getConstant
with TLI.getPointerTy for a small simplification.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57837 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeFloatTypes.cpp
egalizeIntegerTypes.cpp
|
| 7e4982287591945c4e42ba8470a978e629789c76 |
20-Oct-2008 |
Duncan Sands <baldrick@free.fr> |
Always use either MVT::i1 or getSetCCResultType for
the condition of a SELECT node. Make sure that the
correct extension type (any-, sign- or zero-extend)
is used.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57836 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeIntegerTypes.cpp
|
| 678a5fdedab06c815e8ff202b9019e1901dd1db9 |
20-Oct-2008 |
Duncan Sands <baldrick@free.fr> |
Always use either MVT::i1 or getSetCCResultType for
the condition of a SELECT node. Make sure that the
correct extension type (any-, sign- or zero-extend)
is used.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57836 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeIntegerTypes.cpp
|
| ef5b199905cee0b78eb30cd44836e5b6ca5cbd09 |
20-Oct-2008 |
Duncan Sands <baldrick@free.fr> |
Formatting - no functional change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57834 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeIntegerTypes.cpp
egalizeTypes.h
|
| 7a9bef005a465114a8534e2994259e43ad588549 |
20-Oct-2008 |
Duncan Sands <baldrick@free.fr> |
Formatting - no functional change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57834 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeIntegerTypes.cpp
egalizeTypes.h
|
| f6e29499ac036821e7f84e264663c24888d68c78 |
20-Oct-2008 |
Duncan Sands <baldrick@free.fr> |
Don't use a random type for the select condition,
use an MVT::i1 and simplify the code while there.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57833 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeIntegerTypes.cpp
|
| 0550cf01c9935b08bd0ee8b24bdd8541f8ecc9af |
20-Oct-2008 |
Duncan Sands <baldrick@free.fr> |
Don't use a random type for the select condition,
use an MVT::i1 and simplify the code while there.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57833 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeIntegerTypes.cpp
|
| a1dc6025422cd0e6f951c69a8427f7f885cf52c3 |
19-Oct-2008 |
Bill Wendling <isanbard@gmail.com> |
Set N->OperandList to 0 after deletion. Otherwise, it's possible that it will
be either deleted or referenced afterwards.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57786 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| b75ddd25cb1230b44712407776a34f7872c92edd |
19-Oct-2008 |
Bill Wendling <isanbard@gmail.com> |
Set N->OperandList to 0 after deletion. Otherwise, it's possible that it will
be either deleted or referenced afterwards.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57786 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 181b627f62613190322b69b9e73c20a4ec322dba |
19-Oct-2008 |
Bill Wendling <isanbard@gmail.com> |
Fix comment. Other formatting changes. No functionality changes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57785 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuild.cpp
|
| 229224601309248f899e8e697c00448f92ccad2d |
19-Oct-2008 |
Bill Wendling <isanbard@gmail.com> |
Fix comment. Other formatting changes. No functionality changes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57785 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuild.cpp
|
| 0e3da1def46ae4925d811406f9e67f0c45d5b597 |
19-Oct-2008 |
Duncan Sands <baldrick@free.fr> |
Vector shuffle mask elements may be "undef". Handle
this everywhere in LegalizeTypes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57783 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeVectorTypes.cpp
|
| 704e72b7b766bd03aec122657a18cdfa063c8cba |
19-Oct-2008 |
Duncan Sands <baldrick@free.fr> |
Vector shuffle mask elements may be "undef". Handle
this everywhere in LegalizeTypes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57783 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeVectorTypes.cpp
|
| 94989acaabec94d3b09367e218536629cbba666d |
19-Oct-2008 |
Duncan Sands <baldrick@free.fr> |
Use a legal integer type for vector shuffle mask
elements. Otherwise LegalizeTypes will, reasonably
enough, legalize the mask, which may result in it
no longer being a BUILD_VECTOR node (LegalizeDAG
simply ignores the legality or not of vector masks).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57782 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 193c2bd82f1087b21c77f875777aa28aeaab5248 |
19-Oct-2008 |
Duncan Sands <baldrick@free.fr> |
Use a legal integer type for vector shuffle mask
elements. Otherwise LegalizeTypes will, reasonably
enough, legalize the mask, which may result in it
no longer being a BUILD_VECTOR node (LegalizeDAG
simply ignores the legality or not of vector masks).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57782 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 2a0b96c2c74ca23460d51ac6531c5d3f0b75d076 |
18-Oct-2008 |
Chris Lattner <sabre@nondot.org> |
Reapply r57699 with a fix to not crash on asms with multiple results. Unlike
the previous patch this one actually passes make check.
"Fix PR2356 on PowerPC: if we have an input and output that are tied together
that have different sizes (e.g. i32 and i64) make sure to reserve registers for
the bigger operand."
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57771 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuild.cpp
|
| 75dc779d8bcf4d202b0445a47f4b9352edc81945 |
18-Oct-2008 |
Chris Lattner <sabre@nondot.org> |
Reapply r57699 with a fix to not crash on asms with multiple results. Unlike
the previous patch this one actually passes make check.
"Fix PR2356 on PowerPC: if we have an input and output that are tied together
that have different sizes (e.g. i32 and i64) make sure to reserve registers for
the bigger operand."
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57771 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuild.cpp
|
| 668aff66232d17731153c5af1cc45aa4d351f00b |
18-Oct-2008 |
Dan Gohman <gohman@apple.com> |
Don't truncate GlobalAddress offsets to int in debug output.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57770 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
electionDAGPrinter.cpp
|
| cfe43231d222ccf266c31b0d1027645d77075c24 |
18-Oct-2008 |
Dan Gohman <gohman@apple.com> |
Don't truncate GlobalAddress offsets to int in debug output.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57770 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
electionDAGPrinter.cpp
|
| 6520e20e4fb31f2e65e25c38b372b19d33a83df4 |
18-Oct-2008 |
Dan Gohman <gohman@apple.com> |
Teach DAGCombine to fold constant offsets into GlobalAddress nodes,
and add a TargetLowering hook for it to use to determine when this
is legal (i.e. not in PIC mode, etc.)
This allows instruction selection to emit folded constant offsets
in more cases, such as the included testcase, eliminating the need
for explicit arithmetic instructions.
This eliminates the need for the C++ code in X86ISelDAGToDAG.cpp
that attempted to achieve the same effect, but wasn't as effective.
Also, fix handling of offsets in GlobalAddressSDNodes in several
places, including changing GlobalAddressSDNode's offset from
int to int64_t.
The Mips, Alpha, Sparc, and CellSPU targets appear to be
unaware of GlobalAddress offsets currently, so set the hook to
false on those targets.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57748 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
electionDAG.cpp
argetLowering.cpp
|
| 36322c7717f7af5790ea0e64ce3d332e2df15060 |
18-Oct-2008 |
Dan Gohman <gohman@apple.com> |
Teach DAGCombine to fold constant offsets into GlobalAddress nodes,
and add a TargetLowering hook for it to use to determine when this
is legal (i.e. not in PIC mode, etc.)
This allows instruction selection to emit folded constant offsets
in more cases, such as the included testcase, eliminating the need
for explicit arithmetic instructions.
This eliminates the need for the C++ code in X86ISelDAGToDAG.cpp
that attempted to achieve the same effect, but wasn't as effective.
Also, fix handling of offsets in GlobalAddressSDNodes in several
places, including changing GlobalAddressSDNode's offset from
int to int64_t.
The Mips, Alpha, Sparc, and CellSPU targets appear to be
unaware of GlobalAddress offsets currently, so set the hook to
false on those targets.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57748 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
electionDAG.cpp
argetLowering.cpp
|
| 95915730de69342d3733f5c391779ae007eb3efa |
18-Oct-2008 |
Dan Gohman <gohman@apple.com> |
Revert r57699. It's causing regressions in
test/CodeGen/X86/2008-09-17-inline-asm-1.ll
and a few others, and it breaks the llvm-gcc build.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57747 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuild.cpp
|
| 0d946af84c2a30b411cf0411a8b74d933a952e6c |
18-Oct-2008 |
Dan Gohman <gohman@apple.com> |
Revert r57699. It's causing regressions in
test/CodeGen/X86/2008-09-17-inline-asm-1.ll
and a few others, and it breaks the llvm-gcc build.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57747 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuild.cpp
|
| c227734855b615f5b09060e7ea67f697de08fc7e |
17-Oct-2008 |
Dan Gohman <gohman@apple.com> |
Factor out the code for mapping LLVM IR condition opcodes to
ISD condition opcodes into helper functions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57726 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuild.cpp
electionDAGBuild.h
|
| 001eaee0a205b03ea236ada116c0359a2144d22f |
17-Oct-2008 |
Dan Gohman <gohman@apple.com> |
Factor out the code for mapping LLVM IR condition opcodes to
ISD condition opcodes into helper functions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57726 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuild.cpp
electionDAGBuild.h
|
| cfc14c153a3e233c329394f148d83cd6862a51a6 |
17-Oct-2008 |
Chris Lattner <sabre@nondot.org> |
add support for 128 bit aggregates.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57715 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuild.cpp
|
| f1aaff6a3ba4c3ca31010ce8865b3b586dc238ef |
17-Oct-2008 |
Chris Lattner <sabre@nondot.org> |
add support for 128 bit aggregates.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57715 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuild.cpp
|
| c4d1021ead43cfa7da08a8f7ddc9a059a8ba14c5 |
17-Oct-2008 |
Mon P Wang <wangmp@apple.com> |
Added MemIntrinsicNode which is useful to represent target intrinsics that
touches memory and need an associated MemOperand
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57712 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 89423383c11a0373a34fe3e4029313dd356dd71b |
17-Oct-2008 |
Mon P Wang <wangmp@apple.com> |
Added MemIntrinsicNode which is useful to represent target intrinsics that
touches memory and need an associated MemOperand
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57712 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 8c1a6ca22ab247dc5c493fe815f75b1e77f2c686 |
17-Oct-2008 |
Dan Gohman <gohman@apple.com> |
Factor out the code for mapping LLVM IR condition opcodes to
ISD condition opcodes into helper functions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57710 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuild.cpp
|
| 9a1b1c45278755db308de410e62792d9d9a4552f |
17-Oct-2008 |
Dan Gohman <gohman@apple.com> |
Factor out the code for mapping LLVM IR condition opcodes to
ISD condition opcodes into helper functions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57710 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuild.cpp
|
| 0c52644cd8e46ca4c9caa6c51d43f97a2de8c5f5 |
17-Oct-2008 |
Chris Lattner <sabre@nondot.org> |
Fix PR2356 on PowerPC: if we have an input and output that are tied together
that have different sizes (e.g. i32 and i64) make sure to reserve registers for
the bigger operand.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57699 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuild.cpp
|
| a92185de521df0e6fa4ad9e01a20105570c35295 |
17-Oct-2008 |
Chris Lattner <sabre@nondot.org> |
Fix PR2356 on PowerPC: if we have an input and output that are tied together
that have different sizes (e.g. i32 and i64) make sure to reserve registers for
the bigger operand.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57699 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuild.cpp
|
| 81249c95ceff7bc7b9160d1535b916de01bc472e |
17-Oct-2008 |
Chris Lattner <sabre@nondot.org> |
refactor some code into a helper method, no functionality change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57690 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuild.cpp
|
| 2532688e2e50f9ea1bdea285900b3d41fef59cdd |
17-Oct-2008 |
Chris Lattner <sabre@nondot.org> |
refactor some code into a helper method, no functionality change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57690 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuild.cpp
|
| 6bdcda3d3e30003fb6cef1d4e2fd3a5d5b40d3fc |
17-Oct-2008 |
Chris Lattner <sabre@nondot.org> |
Keep track of *which* input constraint matches an output
constraint. Reject asms where an output has multiple
input constraints tied to it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57687 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuild.cpp
argetLowering.cpp
|
| efec324270c75c7a48a7444a0692701fefabc99c |
17-Oct-2008 |
Chris Lattner <sabre@nondot.org> |
Keep track of *which* input constraint matches an output
constraint. Reject asms where an output has multiple
input constraints tied to it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57687 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuild.cpp
argetLowering.cpp
|
| 58f15c482a7129c78ca809792b46befa20ea337d |
17-Oct-2008 |
Chris Lattner <sabre@nondot.org> |
add an assert so that PR2356 explodes instead of running off an
array. Improve some minor comments, refactor some helpers in
AsmOperandInfo. No functionality change for valid code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57686 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuild.cpp
argetLowering.cpp
|
| 01f5354c1dfcc0d172b341aa8d9aeeb0dccd9065 |
17-Oct-2008 |
Chris Lattner <sabre@nondot.org> |
add an assert so that PR2356 explodes instead of running off an
array. Improve some minor comments, refactor some helpers in
AsmOperandInfo. No functionality change for valid code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57686 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuild.cpp
argetLowering.cpp
|
| 74feef261a43392bc85280f66c75fbd4e2ccf73d |
17-Oct-2008 |
Dan Gohman <gohman@apple.com> |
Define patterns for shld and shrd that match immediate
shift counts, and patterns that match dynamic shift counts
when the subtract is obscured by a truncate node.
Add DAGCombiner support for recognizing rotate patterns
when the shift counts are defined by truncate nodes.
Fix and simplify the code for commuting shld and shrd
instructions to work even when the given instruction doesn't
have a parent, and when the caller needs a new instruction.
These changes allow LLVM to use the shld, shrd, rol, and ror
instructions on x86 to replace equivalent code using two
shifts and an or in many more cases.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57662 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 921581d2d000e0aa882f9dee8a104ef8a4b07e72 |
17-Oct-2008 |
Dan Gohman <gohman@apple.com> |
Define patterns for shld and shrd that match immediate
shift counts, and patterns that match dynamic shift counts
when the subtract is obscured by a truncate node.
Add DAGCombiner support for recognizing rotate patterns
when the shift counts are defined by truncate nodes.
Fix and simplify the code for commuting shld and shrd
instructions to work even when the given instruction doesn't
have a parent, and when the caller needs a new instruction.
These changes allow LLVM to use the shld, shrd, rol, and ror
instructions on x86 to replace equivalent code using two
shifts and an or in many more cases.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57662 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 7f042681764c6f8eae22781d8b4cb4c218a86b76 |
15-Oct-2008 |
Evan Cheng <evan.cheng@apple.com> |
- Add target lowering hooks that specify which setcc conditions are illegal,
i.e. conditions that cannot be checked with a single instruction. For example,
SETONE and SETUEQ on x86.
- Teach legalizer to implement *illegal* setcc as a and / or of a number of
legal setcc nodes. For now, only implement FP conditions. e.g. SETONE is
implemented as SETO & SETNE, SETUEQ is SETUO | SETEQ.
- Move x86 target over.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57542 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
argetLowering.cpp
|
| 7134382d9a2c5cf0c0b722d8f6074e3864050353 |
15-Oct-2008 |
Evan Cheng <evan.cheng@apple.com> |
- Add target lowering hooks that specify which setcc conditions are illegal,
i.e. conditions that cannot be checked with a single instruction. For example,
SETONE and SETUEQ on x86.
- Teach legalizer to implement *illegal* setcc as a and / or of a number of
legal setcc nodes. For now, only implement FP conditions. e.g. SETONE is
implemented as SETO & SETNE, SETUEQ is SETUO | SETEQ.
- Move x86 target over.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57542 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
argetLowering.cpp
|
| dd5b58ad7be78be90390074f0df138778af5c895 |
15-Oct-2008 |
Dan Gohman <gohman@apple.com> |
FastISel support for exception-handling constructs.
- Move the EH landing-pad code and adjust it so that it works
with FastISel as well as with SDISel.
- Add FastISel support for @llvm.eh.exception and
@llvm.eh.selector.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57539 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
electionDAGISel.cpp
|
| 9dd43585e4e77ab8e7d3bb7e5d399b210cf1282c |
15-Oct-2008 |
Dan Gohman <gohman@apple.com> |
FastISel support for exception-handling constructs.
- Move the EH landing-pad code and adjust it so that it works
with FastISel as well as with SDISel.
- Add FastISel support for @llvm.eh.exception and
@llvm.eh.selector.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57539 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
electionDAGISel.cpp
|
| 0329466b6b4927f4e6f5d144891fef06a027fec5 |
14-Oct-2008 |
Evan Cheng <evan.cheng@apple.com> |
Rename LoadX to LoadExt.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57526 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
egalizeDAG.cpp
argetLowering.cpp
|
| 08c171a5541b033a603674fa0179259714d985a3 |
14-Oct-2008 |
Evan Cheng <evan.cheng@apple.com> |
Rename LoadX to LoadExt.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57526 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
egalizeDAG.cpp
argetLowering.cpp
|
| b8cab9227a0f6ffbdaae33e3c64268e265008a6a |
14-Oct-2008 |
Dan Gohman <gohman@apple.com> |
Fix command-line option printing to print two spaces where needed,
instead of requiring all "short description" strings to begin with
two spaces. This makes these strings less mysterious, and it fixes
some cases where short description strings mistakenly did not
begin with two spaces.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57521 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGFast.cpp
cheduleDAGList.cpp
cheduleDAGRRList.cpp
electionDAGISel.cpp
|
| 669b9bf656d0bdb22bee268c4dec5eb3b3add6d0 |
14-Oct-2008 |
Dan Gohman <gohman@apple.com> |
Fix command-line option printing to print two spaces where needed,
instead of requiring all "short description" strings to begin with
two spaces. This makes these strings less mysterious, and it fixes
some cases where short description strings mistakenly did not
begin with two spaces.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57521 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGFast.cpp
cheduleDAGList.cpp
cheduleDAGRRList.cpp
electionDAGISel.cpp
|
| efa533957dfdc29be6de3845158ebd5fa7391485 |
13-Oct-2008 |
Evan Cheng <evan.cheng@apple.com> |
FIX PR2794. Make sure SIGN_EXTEND_INREG nodes introduced by LegalizeSetCCOperands are leglized. Patch by Richard Pennington.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57460 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| d901b6640e0f1d1757a2db9fb57a140ad828ea75 |
13-Oct-2008 |
Evan Cheng <evan.cheng@apple.com> |
FIX PR2794. Make sure SIGN_EXTEND_INREG nodes introduced by LegalizeSetCCOperands are leglized. Patch by Richard Pennington.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57460 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| d9d07780ff0d393a34cbd57cd2b85bdd8c947a04 |
13-Oct-2008 |
Matthijs Kooijman <matthijs@stdin.nl> |
* Make TargetLowering not crash when TargetMachine::getTargetAsmInfo() returns
null. This assumes that any target that does not have AsmInfo, does not
support "LocAndDot".
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57438 91177308-0d34-0410-b5e6-96231b3b80d8
argetLowering.cpp
|
| b9333ccdd5658c826f2c7bdd6a542343eed56871 |
13-Oct-2008 |
Matthijs Kooijman <matthijs@stdin.nl> |
* Make TargetLowering not crash when TargetMachine::getTargetAsmInfo() returns
null. This assumes that any target that does not have AsmInfo, does not
support "LocAndDot".
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57438 91177308-0d34-0410-b5e6-96231b3b80d8
argetLowering.cpp
|
| 44d2a983b76a2a923e34f3162c960443425cb296 |
13-Oct-2008 |
Chris Lattner <sabre@nondot.org> |
calls can be supported.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57428 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
|
| 61d84a0c78345d74dee403b7658f77abaec63b75 |
13-Oct-2008 |
Chris Lattner <sabre@nondot.org> |
calls can be supported.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57428 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
|
| e563bbc312f8b11ecfe12b8187176f667df1dff3 |
12-Oct-2008 |
Chris Lattner <sabre@nondot.org> |
Change CALLSEQ_BEGIN and CALLSEQ_END to take TargetConstant's as
parameters instead of raw Constants. This prevents the constants from
being selected by the isel pass, fixing PR2735.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57385 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| fe5d4021d0884e4cb94a7bb688fa0b02950ee29c |
12-Oct-2008 |
Chris Lattner <sabre@nondot.org> |
Change CALLSEQ_BEGIN and CALLSEQ_END to take TargetConstant's as
parameters instead of raw Constants. This prevents the constants from
being selected by the isel pass, fixing PR2735.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57385 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 3c261016692314d907dbcdc70da1bf4a968436a9 |
11-Oct-2008 |
Chris Lattner <sabre@nondot.org> |
simplify comparison
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57371 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuild.cpp
|
| de1dd9c6d28db027e12c564827dd0f6aaf4feab7 |
11-Oct-2008 |
Chris Lattner <sabre@nondot.org> |
simplify comparison
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57371 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuild.cpp
|
| 23a98551ab65eeb8fe5019df8b7db4891582a4bd |
10-Oct-2008 |
Dale Johannesen <dalej@apple.com> |
Add a "loses information" return value to APFloat::convert
and APFloat::convertToInteger. Restore return value to
IEEE754. Adjust all users accordingly.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57329 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
electionDAG.cpp
|
| 6e547b4aeea29737f4aecad5b2cdaccb86989c20 |
10-Oct-2008 |
Dale Johannesen <dalej@apple.com> |
Add a "loses information" return value to APFloat::convert
and APFloat::convertToInteger. Restore return value to
IEEE754. Adjust all users accordingly.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57329 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
electionDAG.cpp
|
| 7111b02c734c992b8c97d9918118768026dad79e |
09-Oct-2008 |
Dale Johannesen <dalej@apple.com> |
Rename APFloat::convertToAPInt to bitcastToAPInt to
make it clearer what the function does. No functional
change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57325 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
egalizeDAG.cpp
egalizeFloatTypes.cpp
|
| 49cc7cec5d3bb722e7bad032233e6d763fba494f |
09-Oct-2008 |
Dale Johannesen <dalej@apple.com> |
Rename APFloat::convertToAPInt to bitcastToAPInt to
make it clearer what the function does. No functional
change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57325 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
egalizeDAG.cpp
egalizeFloatTypes.cpp
|
| 1e9e8c3bd5ac018296bddb21a2acb8c643303b39 |
08-Oct-2008 |
Dan Gohman <gohman@apple.com> |
Avoid emitting redundant materializations of integer constants
for things like null pointers, which at this level aren't
different from regular integer constants.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57265 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
|
| 3a49d0e16972381b9e27b3f8adb05be9296be614 |
08-Oct-2008 |
Dan Gohman <gohman@apple.com> |
Avoid emitting redundant materializations of integer constants
for things like null pointers, which at this level aren't
different from regular integer constants.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57265 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
|
| 2163ca11d576059883d1c289e5c4d8163d123270 |
07-Oct-2008 |
Andrew Lenharth <andrewl@lenharth.org> |
Use Dan's supperior check
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57255 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 97c315a1f5868daafe62f6a32a2722698e0f476c |
07-Oct-2008 |
Andrew Lenharth <alenhar2@cs.uiuc.edu> |
Use Dan's supperior check
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57255 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| ff75d9edbb54380deae77c8767fd7581ca401c1d |
07-Oct-2008 |
Andrew Lenharth <andrewl@lenharth.org> |
No need for |=
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57249 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 83d3e655d2e8920143f9c85ba262095ee176914d |
07-Oct-2008 |
Andrew Lenharth <alenhar2@cs.uiuc.edu> |
No need for |=
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57249 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 1ad0c8201b119d4d90a837dd622b61eedf1648ea |
07-Oct-2008 |
Andrew Lenharth <andrewl@lenharth.org> |
Use ADDC if it is valid at any smaller size. Do it right this time
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57248 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 310906df76067769776024466085bf40b6d205c7 |
07-Oct-2008 |
Andrew Lenharth <alenhar2@cs.uiuc.edu> |
Use ADDC if it is valid at any smaller size. Do it right this time
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57248 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 5c9cc1392cfdea2281431de987f32545a3491fb6 |
07-Oct-2008 |
Andrew Lenharth <andrewl@lenharth.org> |
Use ADDC if it is valid at any smaller size. fixes test/Codegen/Generic/i128-addsub.ll on x86
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57247 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| a23d699e41b2d135d166ce1c03cd0462bd8c4fad |
07-Oct-2008 |
Andrew Lenharth <alenhar2@cs.uiuc.edu> |
Use ADDC if it is valid at any smaller size. fixes test/Codegen/Generic/i128-addsub.ll on x86
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57247 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 40d513960a50664c3c4130a40612a5e3673615ce |
07-Oct-2008 |
Andrew Lenharth <andrewl@lenharth.org> |
Expand arith on machines without carry flags
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57243 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 5e8144612637f4e17ecf4048272b10e75bd1a604 |
07-Oct-2008 |
Andrew Lenharth <alenhar2@cs.uiuc.edu> |
Expand arith on machines without carry flags
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57243 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| b5cc34d098149a9606dacb6d421471d787253907 |
07-Oct-2008 |
Dan Gohman <gohman@apple.com> |
Correctly handle calls with no return values. This fixes
2006-01-23-UnionInit on x86-64 when inlining is not enabled.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57223 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuild.cpp
|
| 8542a55c0a83b76494a57cdfeb3f60168fdefd55 |
07-Oct-2008 |
Dan Gohman <gohman@apple.com> |
Correctly handle calls with no return values. This fixes
2006-01-23-UnionInit on x86-64 when inlining is not enabled.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57223 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuild.cpp
|
| 31d7161206d7502e97a01a51a76445a8d9ac6ea5 |
04-Oct-2008 |
Chris Lattner <sabre@nondot.org> |
wrap some long lines and expand i32 mul's to libcalls, inspired by a
patch by Mikael Lepisto!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57077 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 481886517c4d366d1f59265b4f4ef84837f3d734 |
04-Oct-2008 |
Chris Lattner <sabre@nondot.org> |
wrap some long lines and expand i32 mul's to libcalls, inspired by a
patch by Mikael Lepisto!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57077 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 241f464d24a6c22721607841069bbeb17b3f71e6 |
04-Oct-2008 |
Dan Gohman <gohman@apple.com> |
Fix fast-isel's handling of atomic instructions. They may
expand to multiple basic blocks, in which case fast-isel
needs to informed of which block to use as it resumes
inserting instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57040 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 2764e174ba023f24b2729dea7747da4fd2e3ec71 |
04-Oct-2008 |
Dan Gohman <gohman@apple.com> |
Fix fast-isel's handling of atomic instructions. They may
expand to multiple basic blocks, in which case fast-isel
needs to informed of which block to use as it resumes
inserting instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57040 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 1b54c7fe9b034a6450af8596231ad5368b617725 |
03-Oct-2008 |
Dale Johannesen <dalej@apple.com> |
Pass MemOperand through for 64-bit atomics on 32-bit,
incidentally making the case where the memop is a
pointer deref work. Fix cmp-and-swap regression.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57027 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 44eb5379912c6c5b129ae34c88ffb5f260ceb70b |
03-Oct-2008 |
Dale Johannesen <dalej@apple.com> |
Pass MemOperand through for 64-bit atomics on 32-bit,
incidentally making the case where the memop is a
pointer deref work. Fix cmp-and-swap regression.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57027 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| ca0a5d93569d728659352ca5fbfe17daeed5f6ac |
03-Oct-2008 |
Dan Gohman <gohman@apple.com> |
Use -1ULL instead of uint64_t(-1), at Anton's suggestion.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57021 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 88566ae08a299f35b1131daf07811ee426d1ee44 |
03-Oct-2008 |
Dan Gohman <gohman@apple.com> |
Use -1ULL instead of uint64_t(-1), at Anton's suggestion.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57021 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| e47561ccff9c7a76f9392b26ae6202e30f1247ed |
03-Oct-2008 |
Duncan Sands <baldrick@free.fr> |
The result of getSetCCResultType (eg: i32) may be larger
than the type an i1 is promoted to (eg: i8). Account
for this. Noticed by Tilmann Scheller on CellSPU; he
will hopefully take care of fixing this in LegalizeDAG
and adding a testcase!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56997 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeIntegerTypes.cpp
|
| 1a37bd7c7e7abbd99f4d33a0788e4b20aa67ac0f |
03-Oct-2008 |
Duncan Sands <baldrick@free.fr> |
The result of getSetCCResultType (eg: i32) may be larger
than the type an i1 is promoted to (eg: i8). Account
for this. Noticed by Tilmann Scheller on CellSPU; he
will hopefully take care of fixing this in LegalizeDAG
and adding a testcase!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56997 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeIntegerTypes.cpp
|
| 91b6f97ce4273fee5516692e3f27cd76d67986fc |
03-Oct-2008 |
Dan Gohman <gohman@apple.com> |
Implement fast-isel support for zero-extending from i1.
It turns out that this is a fairly common operation,
and it's easy enough to handle.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56990 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
|
| d762908e06b093e67af95c89d8647a527e17e2c8 |
03-Oct-2008 |
Dan Gohman <gohman@apple.com> |
Implement fast-isel support for zero-extending from i1.
It turns out that this is a fairly common operation,
and it's easy enough to handle.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56990 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
|
| d98d6203e429b2d7208b6687931e9079e85e95ec |
03-Oct-2008 |
Dan Gohman <gohman@apple.com> |
Optimize conditional branches in X86FastISel. This replaces
sequences like this:
sete %al
testb %al, %al
jne LBB11_1
with this:
je LBB11_1
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56969 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
|
| 8766d8eec326f01ec1cf458c1078798782e4177b |
03-Oct-2008 |
Dan Gohman <gohman@apple.com> |
Optimize conditional branches in X86FastISel. This replaces
sequences like this:
sete %al
testb %al, %al
jne LBB11_1
with this:
je LBB11_1
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56969 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
|
| 48c1bc2ace6481d3272ab5c18e1f19352c563be8 |
02-Oct-2008 |
Dale Johannesen <dalej@apple.com> |
Handle some 64-bit atomics on x86-32, some of the time.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56963 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| f160d80930ec8dc8f94df6010b562bd03e28f325 |
02-Oct-2008 |
Dale Johannesen <dalej@apple.com> |
Handle some 64-bit atomics on x86-32, some of the time.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56963 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| aeaf245db33fa8bccdd14bb8899ee0585a75a7b1 |
01-Oct-2008 |
Dan Gohman <gohman@apple.com> |
Make some implicit conversions explicit, to avoid compiler warnings.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56927 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| dc57097760a4335ca94b45e69cbbaa622de92fca |
01-Oct-2008 |
Dan Gohman <gohman@apple.com> |
Make some implicit conversions explicit, to avoid compiler warnings.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56927 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 38ac062c2f4de93cd4351693f084f0c4474be02c |
01-Oct-2008 |
Dan Gohman <gohman@apple.com> |
Fold trivial two-operand tokenfactors where the operands are equal
immediately.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56921 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| c0e18d6638548720f2b3c0c77b8b3d3c7ff8d9a8 |
01-Oct-2008 |
Dan Gohman <gohman@apple.com> |
Fold trivial two-operand tokenfactors where the operands are equal
immediately.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56921 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 929d3eb171cd95a7fb353ef71a460d2061be4e6c |
01-Oct-2008 |
Dan Gohman <gohman@apple.com> |
Fix typos in comments.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56919 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 4fc0374c0e76f8142d34e3ffe30cb2fc2bf70bc3 |
01-Oct-2008 |
Dan Gohman <gohman@apple.com> |
Fix typos in comments.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56919 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 6158d8492cc021bb47caee6d4755135ef1d855a4 |
01-Oct-2008 |
Bill Wendling <isanbard@gmail.com> |
Implement the -fno-builtin option in the front-end, not in the back-end.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56900 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 4b2e37853b659c5d8dd85c8113ac41522d8f4726 |
01-Oct-2008 |
Bill Wendling <isanbard@gmail.com> |
Implement the -fno-builtin option in the front-end, not in the back-end.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56900 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| fd8ca5a0ef30604b860100d13544c5d5625c0b70 |
30-Sep-2008 |
Bill Wendling <isanbard@gmail.com> |
- Initialize "--no-builtin" to "false".
- Testcase for r56885.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56886 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 004d63527fe3602a2bf9b4524cdc6401c8e11964 |
30-Sep-2008 |
Bill Wendling <isanbard@gmail.com> |
- Initialize "--no-builtin" to "false".
- Testcase for r56885.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56886 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 6f287b22d2e57600b4cd5dc209d0d869e7736c0b |
30-Sep-2008 |
Bill Wendling <isanbard@gmail.com> |
Add the new `-no-builtin' flag. This flag is meant to mimic the GCC
`-fno-builtin' flag. Currently, it's used to replace "memset" with "_bzero"
instead of "__bzero" on Darwin10+. This arguably violates the meaning of this
flag, but is currently sufficient. The meaning of this flag should become more
specific over time.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56885 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 5db7ffb9e537d06963e61e13ce267ecc7295045a |
30-Sep-2008 |
Bill Wendling <isanbard@gmail.com> |
Add the new `-no-builtin' flag. This flag is meant to mimic the GCC
`-fno-builtin' flag. Currently, it's used to replace "memset" with "_bzero"
instead of "__bzero" on Darwin10+. This arguably violates the meaning of this
flag, but is currently sufficient. The meaning of this flag should become more
specific over time.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56885 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 5ec9efd61bc4214c787287409498e8b78f28c922 |
30-Sep-2008 |
Dan Gohman <gohman@apple.com> |
Move the primary fast-isel top-level comments to FastISel.cpp, where
they'll be a little more visible. Also, update and reword them a bit.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56877 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
|
| ff1ab062a51053954ae59f3ed7154d1b2e983c2b |
30-Sep-2008 |
Dan Gohman <gohman@apple.com> |
Move the primary fast-isel top-level comments to FastISel.cpp, where
they'll be a little more visible. Also, update and reword them a bit.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56877 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
|
| f06c835f769aa1cf67801ed1f6bd366a447c18b1 |
30-Sep-2008 |
Dan Gohman <gohman@apple.com> |
Optimize SelectionDAG's AssignTopologicalOrder even further.
Completely eliminate the TopOrder std::vector. Instead, sort
the AllNodes list in place. This also eliminates the need to
call AllNodes.size(), a linear-time operation, before
performing the sort.
Also, eliminate the Sources temporary std::vector, since it
essentially duplicates the sorted result as it is being
built.
This also changes the direction of the topological sort
from bottom-up to top-down. The AllNodes list starts out in
roughly top-down order, so this reduces the amount of
reordering needed. Top-down is also more convenient for
Legalize, and ISel needed only minor adjustments.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56867 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
electionDAG.cpp
|
| 2d2a7a3fb5bac325d6df8f55e96f9e0f9df739eb |
30-Sep-2008 |
Dan Gohman <gohman@apple.com> |
Optimize SelectionDAG's AssignTopologicalOrder even further.
Completely eliminate the TopOrder std::vector. Instead, sort
the AllNodes list in place. This also eliminates the need to
call AllNodes.size(), a linear-time operation, before
performing the sort.
Also, eliminate the Sources temporary std::vector, since it
essentially duplicates the sorted result as it is being
built.
This also changes the direction of the topological sort
from bottom-up to top-down. The AllNodes list starts out in
roughly top-down order, so this reduces the amount of
reordering needed. Top-down is also more convenient for
Legalize, and ISel needed only minor adjustments.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56867 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
electionDAG.cpp
|
| 71d1bf55a27017fceef25554e02021a3bc47cdb4 |
30-Sep-2008 |
Dale Johannesen <dalej@apple.com> |
Remove misuse of ReplaceNodeResults for atomics with
valid types. No functional change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56808 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 9011d870b2985325ac1d5b6e4c498dab81253097 |
30-Sep-2008 |
Dale Johannesen <dalej@apple.com> |
Remove misuse of ReplaceNodeResults for atomics with
valid types. No functional change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56808 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| a43abd102f123f6d3bd9ad92045f8119e3fb6153 |
29-Sep-2008 |
Dan Gohman <gohman@apple.com> |
Fix FastISel to not initialize the PIC-base register multiple times
in functions with PIC references from more than one basic block.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56807 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 9d7bc4220bfd640f05cef5981bf241b1a9ab4328 |
29-Sep-2008 |
Dan Gohman <gohman@apple.com> |
Fix FastISel to not initialize the PIC-base register multiple times
in functions with PIC references from more than one basic block.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56807 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| d5d8191b202c0f96f33c826c93d9796451ff7fca |
27-Sep-2008 |
Bill Wendling <isanbard@gmail.com> |
Temporarily reverting r56683. This is causing a failure during the build of llvm-gcc:
/Volumes/Gir/devel/llvm/clean/llvm-gcc.obj/./gcc/xgcc -B/Volumes/Gir/devel/llvm/clean/llvm-gcc.obj/./gcc/ -B/Volumes/Gir/devel/llvm/clean/llvm-gcc.install/i386-apple-darwin9.5.0/bin/ -B/Volumes/Gir/devel/llvm/clean/llvm-gcc.install/i386-apple-darwin9.5.0/lib/ -isystem /Volumes/Gir/devel/llvm/clean/llvm-gcc.install/i386-apple-darwin9.5.0/include -isystem /Volumes/Gir/devel/llvm/clean/llvm-gcc.install/i386-apple-darwin9.5.0/sys-include -mmacosx-version-min=10.4 -O2 -O2 -g -O2 -DIN_GCC -W -Wall -Wwrite-strings -Wstrict-prototypes -Wmissing-prototypes -Wold-style-definition -isystem ./include -fPIC -pipe -g -DHAVE_GTHR_DEFAULT -DIN_LIBGCC2 -D__GCC_FLOAT_NOT_NEEDED -I. -I. -I../../llvm-gcc.src/gcc -I../../llvm-gcc.src/gcc/. -I../../llvm-gcc.src/gcc/../include -I./../intl -I../../llvm-gcc.src/gcc/../libcpp/include -I../../llvm-gcc.src/gcc/../libdecnumber -I../libdecnumber -I/Volumes/Gir/devel/llvm/clean/llvm.obj/include -I/Volumes/Gir/devel/llvm/clean/llvm.src/include -fexceptions -fvisibility=hidden -DHIDE_EXPORTS -c ../../llvm-gcc.src/gcc/unwind-dw2-fde-darwin.c -o libgcc/./unwind-dw2-fde-darwin.o
Assertion failed: (TargetRegisterInfo::isVirtualRegister(regA) && TargetRegisterInfo::isVirtualRegister(regB) && "cannot update physical register live information"), function runOnMachineFunction, file /Volumes/Gir/devel/llvm/clean/llvm.src/lib/CodeGen/TwoAddressInstructionPass.cpp, line 311.
../../llvm-gcc.src/gcc/unwind-dw2.c:1527: internal compiler error: Abort trap
Please submit a full bug report,
with preprocessed source if appropriate.
See <URL:http://developer.apple.com/bugreporter> for instructions.
{standard input}:3521:non-relocatable subtraction expression, "_dwarf_reg_size_table" minus "L20$pb"
{standard input}:3521:symbol: "_dwarf_reg_size_table" can't be undefined in a subtraction expression
{standard input}:3520:non-relocatable subtraction expression, "_dwarf_reg_size_table" minus "L20$pb"
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56703 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuild.cpp
|
| f29e2a5ab195a822593a92820338bdf63a85be1c |
27-Sep-2008 |
Bill Wendling <isanbard@gmail.com> |
Temporarily reverting r56683. This is causing a failure during the build of llvm-gcc:
/Volumes/Gir/devel/llvm/clean/llvm-gcc.obj/./gcc/xgcc -B/Volumes/Gir/devel/llvm/clean/llvm-gcc.obj/./gcc/ -B/Volumes/Gir/devel/llvm/clean/llvm-gcc.install/i386-apple-darwin9.5.0/bin/ -B/Volumes/Gir/devel/llvm/clean/llvm-gcc.install/i386-apple-darwin9.5.0/lib/ -isystem /Volumes/Gir/devel/llvm/clean/llvm-gcc.install/i386-apple-darwin9.5.0/include -isystem /Volumes/Gir/devel/llvm/clean/llvm-gcc.install/i386-apple-darwin9.5.0/sys-include -mmacosx-version-min=10.4 -O2 -O2 -g -O2 -DIN_GCC -W -Wall -Wwrite-strings -Wstrict-prototypes -Wmissing-prototypes -Wold-style-definition -isystem ./include -fPIC -pipe -g -DHAVE_GTHR_DEFAULT -DIN_LIBGCC2 -D__GCC_FLOAT_NOT_NEEDED -I. -I. -I../../llvm-gcc.src/gcc -I../../llvm-gcc.src/gcc/. -I../../llvm-gcc.src/gcc/../include -I./../intl -I../../llvm-gcc.src/gcc/../libcpp/include -I../../llvm-gcc.src/gcc/../libdecnumber -I../libdecnumber -I/Volumes/Gir/devel/llvm/clean/llvm.obj/include -I/Volumes/Gir/devel/llvm/clean/llvm.src/include -fexceptions -fvisibility=hidden -DHIDE_EXPORTS -c ../../llvm-gcc.src/gcc/unwind-dw2-fde-darwin.c -o libgcc/./unwind-dw2-fde-darwin.o
Assertion failed: (TargetRegisterInfo::isVirtualRegister(regA) && TargetRegisterInfo::isVirtualRegister(regB) && "cannot update physical register live information"), function runOnMachineFunction, file /Volumes/Gir/devel/llvm/clean/llvm.src/lib/CodeGen/TwoAddressInstructionPass.cpp, line 311.
../../llvm-gcc.src/gcc/unwind-dw2.c:1527: internal compiler error: Abort trap
Please submit a full bug report,
with preprocessed source if appropriate.
See <URL:http://developer.apple.com/bugreporter> for instructions.
{standard input}:3521:non-relocatable subtraction expression, "_dwarf_reg_size_table" minus "L20$pb"
{standard input}:3521:symbol: "_dwarf_reg_size_table" can't be undefined in a subtraction expression
{standard input}:3520:non-relocatable subtraction expression, "_dwarf_reg_size_table" minus "L20$pb"
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56703 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuild.cpp
|
| 7810bfed5570c192e0714a8fd0e5130a0c38dd2e |
26-Sep-2008 |
Dan Gohman <gohman@apple.com> |
Rename ConstantSDNode's getSignExtended to getSExtValue, for
consistancy with ConstantInt, and re-implement it in terms
of ConstantInt's getSExtValue.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56700 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
argetLowering.cpp
|
| 4068673bbea0b6b3716494f7c291d0ebc43aa8e5 |
26-Sep-2008 |
Dan Gohman <gohman@apple.com> |
Rename ConstantSDNode's getSignExtended to getSExtValue, for
consistancy with ConstantInt, and re-implement it in terms
of ConstantInt's getSExtValue.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56700 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
argetLowering.cpp
|
| 36a55023c1daae86afedf6e6672c0adad7bbe5ea |
26-Sep-2008 |
Evan Cheng <evan.cheng@apple.com> |
Fix @llvm.frameaddress codegen. FP elimination optimization should be disabled when frame address is desired. Also add support for depth > 0.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56683 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuild.cpp
|
| e96a7f565ddcd8855d6cbcecf3f65ea08a65e558 |
26-Sep-2008 |
Evan Cheng <evan.cheng@apple.com> |
Fix @llvm.frameaddress codegen. FP elimination optimization should be disabled when frame address is desired. Also add support for depth > 0.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56683 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuild.cpp
|
| 86098bd6a63d2cdf0c9be9ef3151bd2728281fd7 |
26-Sep-2008 |
Dale Johannesen <dalej@apple.com> |
Add "inreg" field to CallSDNode (doesn't increase
its size). Adjust various lowering functions to
pass this info through from CallInst. Use it to
implement sseregparm returns on X86. Remove
X86_ssecall calling convention.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56677 91177308-0d34-0410-b5e6-96231b3b80d8
allingConvLower.cpp
egalizeDAG.cpp
egalizeTypes.cpp
electionDAG.cpp
electionDAGBuild.cpp
|
| 67cc9b67faa7d6a72d916b52c22e7a33a44097db |
26-Sep-2008 |
Dale Johannesen <dalej@apple.com> |
Add "inreg" field to CallSDNode (doesn't increase
its size). Adjust various lowering functions to
pass this info through from CallInst. Use it to
implement sseregparm returns on X86. Remove
X86_ssecall calling convention.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56677 91177308-0d34-0410-b5e6-96231b3b80d8
allingConvLower.cpp
egalizeDAG.cpp
egalizeTypes.cpp
electionDAG.cpp
electionDAGBuild.cpp
|
| 0598866c052147c31b808391f58434ce3dbfb838 |
25-Sep-2008 |
Devang Patel <dpatel@apple.com> |
Large mechanical patch.
s/ParamAttr/Attribute/g
s/PAList/AttrList/g
s/FnAttributeWithIndex/AttributeWithIndex/g
s/FnAttr/Attribute/g
This sets the stage
- to implement function notes as function attributes and
- to distinguish between function attributes and return value attributes.
This requires corresponding changes in llvm-gcc and clang.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56622 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuild.cpp
electionDAGISel.cpp
|
| d222f86d9d51a2d6299d43fb876099869430bf0f |
25-Sep-2008 |
Devang Patel <dpatel@apple.com> |
Large mechanical patch.
s/ParamAttr/Attribute/g
s/PAList/AttrList/g
s/FnAttributeWithIndex/AttributeWithIndex/g
s/FnAttr/Attribute/g
This sets the stage
- to implement function notes as function attributes and
- to distinguish between function attributes and return value attributes.
This requires corresponding changes in llvm-gcc and clang.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56622 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuild.cpp
electionDAGISel.cpp
|
| c9c6da61ac027d9818652d417907f84398288b99 |
25-Sep-2008 |
Dale Johannesen <dalej@apple.com> |
Accept 'inreg' attribute on x86 functions as
meaning sse_regparm (i.e. float/double values go
in XMM0 instead of ST0). Update documentation
to reflect reality.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56619 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuild.cpp
|
| c08a0e2f7ceaaaef071ba0aa2482a8fd7a6e27a3 |
25-Sep-2008 |
Dale Johannesen <dalej@apple.com> |
Accept 'inreg' attribute on x86 functions as
meaning sse_regparm (i.e. float/double values go
in XMM0 instead of ST0). Update documentation
to reflect reality.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56619 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuild.cpp
|
| 5dd9c2e9aea7294c184609aff7f2fe82eaea4eb0 |
25-Sep-2008 |
Dan Gohman <gohman@apple.com> |
Support for i1 XOR in FastISel. It is actually safe because
i1 operands are assumed to already by zero-extended.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56615 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
|
| 55c60ad36655000ef0f503793eaaaecb437465e5 |
25-Sep-2008 |
Dan Gohman <gohman@apple.com> |
Support for i1 XOR in FastISel. It is actually safe because
i1 operands are assumed to already by zero-extended.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56615 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
|
| 77ca41e5c3f99ee8962b21a7d90bb251a594a65e |
25-Sep-2008 |
Dan Gohman <gohman@apple.com> |
Don't print fast-isel debug messages by default. Thanks Chris!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56614 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 92902e8f34fa8e0d043644747f6637e9080c0ba5 |
25-Sep-2008 |
Dan Gohman <gohman@apple.com> |
Don't print fast-isel debug messages by default. Thanks Chris!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56614 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 2c442eda747c5c4ec0533642754202e47a1be81c |
25-Sep-2008 |
Dan Gohman <gohman@apple.com> |
Don't forget the newline in debug output.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56613 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 468ba15fd77ae7106aa2aafcd5d986d9e9c310c4 |
25-Sep-2008 |
Dan Gohman <gohman@apple.com> |
Don't forget the newline in debug output.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56613 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 33134c4a75558288d663267c8991f6bd37a530af |
25-Sep-2008 |
Dan Gohman <gohman@apple.com> |
FastISel support for debug info.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56610 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
electionDAGBuild.cpp
electionDAGISel.cpp
|
| 78ae76d54c1a523366be7e1c3cde16287e94de5f |
25-Sep-2008 |
Dan Gohman <gohman@apple.com> |
FastISel support for debug info.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56610 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
electionDAGBuild.cpp
electionDAGISel.cpp
|
| 4b052dc63d31e764b85d62c056bffe576d501ed4 |
25-Sep-2008 |
Richard Pennington <rich@pennware.com> |
bug 2812: Segmentation fault on a big emdiam processor.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56609 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 73ae9e46e3fe3343f26ab84a0868a828ddba0285 |
25-Sep-2008 |
Richard Pennington <rich@pennware.com> |
bug 2812: Segmentation fault on a big emdiam processor.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56609 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| dceffe66b9e73ce372ea11c0fc6975504eb8c31d |
25-Sep-2008 |
Dan Gohman <gohman@apple.com> |
Fix a recent fast-isel coverage regression - don't bail out before
giving the target a chance to materialize constants.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56605 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
|
| 1c395700bf2f54e4585d6d986096bd67138dccae |
25-Sep-2008 |
Dan Gohman <gohman@apple.com> |
Fix a recent fast-isel coverage regression - don't bail out before
giving the target a chance to materialize constants.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56605 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
|
| 2c4bf119be8aa05cdc3dc88c57006353f07f0d2c |
25-Sep-2008 |
Dan Gohman <gohman@apple.com> |
Enable DeadMachineInstructionElim when Fast-ISel is enabled.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56604 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 6a9b05fbd4af5abb5e2f369025409e4450df27c4 |
25-Sep-2008 |
Dan Gohman <gohman@apple.com> |
Enable DeadMachineInstructionElim when Fast-ISel is enabled.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56604 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| aa765b8c35aa3a5cca9681d6e3c44091d94f23d9 |
25-Sep-2008 |
Evan Cheng <evan.cheng@apple.com> |
<rdar://problem/6234798> Assertion failed: (!OpInfo.AssignedRegs.Regs.empty() && "Couldn't allocate input reg!")
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56597 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuild.cpp
|
| 0adee05c7c1c98d6ab9084173ad3742a558d64f4 |
25-Sep-2008 |
Evan Cheng <evan.cheng@apple.com> |
<rdar://problem/6234798> Assertion failed: (!OpInfo.AssignedRegs.Regs.empty() && "Couldn't allocate input reg!")
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56597 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuild.cpp
|
| 8e3455ba1734a64dc5a6884d4a5218d436da54e2 |
25-Sep-2008 |
Dale Johannesen <dalej@apple.com> |
Remove SelectionDag early allocation of registers
for earlyclobbers. Teach Local RA about earlyclobber,
and add some tests for it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56592 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuild.cpp
electionDAGBuild.h
|
| 47e30e4ea5156557c5d6f869f80168092ef66890 |
25-Sep-2008 |
Dale Johannesen <dalej@apple.com> |
Remove SelectionDag early allocation of registers
for earlyclobbers. Teach Local RA about earlyclobber,
and add some tests for it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56592 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuild.cpp
electionDAGBuild.h
|
| f3cbca279db891403659208a99f8e1cceb8c9ea6 |
24-Sep-2008 |
Bill Wendling <isanbard@gmail.com> |
Reapplying r56550
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56553 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 0445c4c532ae56f12727165e35ddd0cb31ba0234 |
24-Sep-2008 |
Bill Wendling <isanbard@gmail.com> |
Reapplying r56550
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56553 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 688d1c4ccf358a35fcdb54a28afc6e47d661b1cf |
24-Sep-2008 |
Bill Wendling <isanbard@gmail.com> |
Forgot this part with my last patch. Sorry about the breakage.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56552 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 16bc18cdd116afa48ba7c6c35f6213c0972c184a |
24-Sep-2008 |
Bill Wendling <isanbard@gmail.com> |
Forgot this part with my last patch. Sorry about the breakage.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56552 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 83e05c48de05d66a6f664a3e6631692b5baae6e2 |
24-Sep-2008 |
Eric Christopher <echristo@apple.com> |
Temporarily revert r56550 until missing commit can be added.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56551 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| c1287f6f5fb874631bcb93162041b216f4cecacc |
24-Sep-2008 |
Eric Christopher <echristo@apple.com> |
Temporarily revert r56550 until missing commit can be added.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56551 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| df0c7bc52d206782872b54a38a3374f0317ce6ff |
24-Sep-2008 |
Bill Wendling <isanbard@gmail.com> |
Refactor the constant folding code into it's own function. And call it from both
the SelectionDAG and DAGCombiner code. The only functionality change is that now
the DAG combiner is performing the constant folding for these operations instead
of being a no-op.
This is *not* in response to a bug, so there isn't a testcase.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56550 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 80759d020563820841f51b941a78655fb96d0fca |
24-Sep-2008 |
Bill Wendling <isanbard@gmail.com> |
Refactor the constant folding code into it's own function. And call it from both
the SelectionDAG and DAGCombiner code. The only functionality change is that now
the DAG combiner is performing the constant folding for these operations instead
of being a no-op.
This is *not* in response to a bug, so there isn't a testcase.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56550 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 86b49f8e2de796cb46c7c8b6a4c4900533fd53f4 |
24-Sep-2008 |
Dale Johannesen <dalej@apple.com> |
Next round of earlyclobber handling. Approach the
RA problem by expanding the live interval of an
earlyclobber def back one slot. Remove
overlap-earlyclobber throughout. Remove
earlyclobber bits and their handling from
live internals.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56539 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGEmit.cpp
electionDAGBuild.cpp
electionDAGISel.cpp
|
| 9446407963005f3edfa8ac70e265c81839a416c9 |
24-Sep-2008 |
Dale Johannesen <dalej@apple.com> |
Next round of earlyclobber handling. Approach the
RA problem by expanding the live interval of an
earlyclobber def back one slot. Remove
overlap-earlyclobber throughout. Remove
earlyclobber bits and their handling from
live internals.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56539 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGEmit.cpp
electionDAGBuild.cpp
electionDAGISel.cpp
|
| da43bcf624acb56a3d77bb5ae9a02728af032613 |
24-Sep-2008 |
Evan Cheng <evan.cheng@apple.com> |
Properly handle 'm' inline asm constraints. If a GV is being selected for the addressing mode, it requires the same logic for PIC relative addressing, etc.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56526 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuild.cpp
argetLowering.cpp
|
| 7f250d639b8fba12b89199b92dcef45d7354b202 |
24-Sep-2008 |
Evan Cheng <evan.cheng@apple.com> |
Properly handle 'm' inline asm constraints. If a GV is being selected for the addressing mode, it requires the same logic for PIC relative addressing, etc.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56526 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuild.cpp
argetLowering.cpp
|
| eaf42abab6d465c38891345d999255871cf03943 |
24-Sep-2008 |
Devang Patel <dpatel@apple.com> |
s/ParameterAttributes/Attributes/g
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56513 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuild.cpp
electionDAGISel.cpp
|
| e480dfa79c90cf5a85680bc1ff503f21e6439a72 |
24-Sep-2008 |
Devang Patel <dpatel@apple.com> |
s/ParameterAttributes/Attributes/g
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56513 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuild.cpp
electionDAGISel.cpp
|
| d57dd5f4e6740520820bc0fca42a540e31c27a73 |
23-Sep-2008 |
Dan Gohman <gohman@apple.com> |
Arrange for FastISel code to have access to the MachineModuleInfo
object. This will be needed to support debug info.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56508 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
electionDAGISel.cpp
|
| 76dd96eda05c0dc7dfc62b5b5fbdd20aae86808b |
23-Sep-2008 |
Dan Gohman <gohman@apple.com> |
Arrange for FastISel code to have access to the MachineModuleInfo
object. This will be needed to support debug info.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56508 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
electionDAGISel.cpp
|
| 086ec9976ff6cee083de618429c78473491d5713 |
23-Sep-2008 |
Dan Gohman <gohman@apple.com> |
Replace the LiveRegs SmallSet with a simple counter that keeps
track of the number of live registers, which is all the set was
being used for.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56498 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGFast.cpp
cheduleDAGRRList.cpp
|
| 9b79a803c53157db657250db167a22afd18514f8 |
23-Sep-2008 |
Dan Gohman <gohman@apple.com> |
Replace the LiveRegs SmallSet with a simple counter that keeps
track of the number of live registers, which is all the set was
being used for.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56498 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGFast.cpp
cheduleDAGRRList.cpp
|
| 87a0f10dc7eff8cf5e83a754f75adf9cb3991435 |
23-Sep-2008 |
Dan Gohman <gohman@apple.com> |
Fix the alignment of loads from constant pool entries when the
load address has an offset from the base of the constant pool
entry.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56479 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
egalizeIntegerTypes.cpp
|
| dc5901ac9279b8635acf1ed8d8877e5bd82eb45d |
23-Sep-2008 |
Dan Gohman <gohman@apple.com> |
Fix the alignment of loads from constant pool entries when the
load address has an offset from the base of the constant pool
entry.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56479 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
egalizeIntegerTypes.cpp
|
| 0bb41608e94adfe9884bc188457c4f6ae47ea43c |
22-Sep-2008 |
Dale Johannesen <dalej@apple.com> |
Make log, log2, log10, exp, exp2 use Expand by
default.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56471 91177308-0d34-0410-b5e6-96231b3b80d8
argetLowering.cpp
|
| b02a1c07cb1e1b9cdae3bf1ddb0578c779b9c8ff |
22-Sep-2008 |
Dale Johannesen <dalej@apple.com> |
Make log, log2, log10, exp, exp2 use Expand by
default.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56471 91177308-0d34-0410-b5e6-96231b3b80d8
argetLowering.cpp
|
| 242ebd145dea945364b4fa6ca6a187efe322036d |
22-Sep-2008 |
Evan Cheng <evan.cheng@apple.com> |
Per review feedback: Only perform
(srl x, (trunc (and y, c))) -> (srl x, (and (trunc y), c))
etc. when both "trunc" and "and" have single uses.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56452 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 11c34297585ebbbefc91421394c70dab368a497e |
22-Sep-2008 |
Evan Cheng <evan.cheng@apple.com> |
Per review feedback: Only perform
(srl x, (trunc (and y, c))) -> (srl x, (and (trunc y), c))
etc. when both "trunc" and "and" have single uses.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56452 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 3d01fc7de86c75926e4e5ac7cc49f0116018893d |
22-Sep-2008 |
Oscar Fuentes <ofv@wanadoo.es> |
Initial support for the CMake build system.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56419 91177308-0d34-0410-b5e6-96231b3b80d8
MakeLists.txt
|
| 00905d5339fd277781c7393112f80febe86b2945 |
22-Sep-2008 |
Oscar Fuentes <ofv@wanadoo.es> |
Initial support for the CMake build system.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56419 91177308-0d34-0410-b5e6-96231b3b80d8
MakeLists.txt
|
| cd4c73aa708d9ecf5d7e0a711dbf359d22b6dd3a |
22-Sep-2008 |
Bill Wendling <isanbard@gmail.com> |
Add helper function to get a 32-bit floating point constant. No functionality change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56418 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuild.cpp
|
| 8b2e2d87623407365983d465744b0669b8beb436 |
22-Sep-2008 |
Bill Wendling <isanbard@gmail.com> |
Add helper function to get a 32-bit floating point constant. No functionality change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56418 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuild.cpp
|
| ca19a3fd116a0a7dab15e49509a3fea565b5e738 |
21-Sep-2008 |
Chris Lattner <sabre@nondot.org> |
don't print GlobalAddressSDNode's with an offset of zero as "foo0".
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56399 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGPrinter.cpp
|
| 1659476b8ad97985ff3c4fff02f39018582f2e5f |
21-Sep-2008 |
Chris Lattner <sabre@nondot.org> |
don't print GlobalAddressSDNode's with an offset of zero as "foo0".
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56399 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGPrinter.cpp
|
| 2ff7fd146159d97abe94391a33b4385abb06bbb0 |
20-Sep-2008 |
Dan Gohman <gohman@apple.com> |
Refactor X86SelectConstAddr, folding it into X86SelectAddress. This
results in better code for globals. Also, unbreak the local CSE for
GlobalValue stub loads.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56371 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
|
| 0dd5fd980f4c89143bd4e19403cf550ab4dd38aa |
20-Sep-2008 |
Dan Gohman <gohman@apple.com> |
Refactor X86SelectConstAddr, folding it into X86SelectAddress. This
results in better code for globals. Also, unbreak the local CSE for
GlobalValue stub loads.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56371 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
|
| ee2e4035450a2d0d6159831e9b9cfa3ffd8da8bc |
18-Sep-2008 |
Dan Gohman <gohman@apple.com> |
Add a new "fast" scheduler. This is currently basically just a
copy of the BURRList scheduler, but with several parts ripped
out, such as backtracking, online topological sort maintenance
(needed by backtracking), the priority queue, and Sethi-Ullman
number computation and maintenance (needed by the priority
queue). As a result of all this, it generates somewhat lower
quality code, but that's its tradeoff for running about 30%
faster than list-burr in -fast mode in many cases.
This is somewhat experimental. Moving forward, major pieces of
this can be refactored with pieces in common with
ScheduleDAGRRList.cpp.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56307 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGFast.cpp
|
| 917d3e7ed6d10587b4ce468da17fde14e00a2fd3 |
18-Sep-2008 |
Dan Gohman <gohman@apple.com> |
Add a new "fast" scheduler. This is currently basically just a
copy of the BURRList scheduler, but with several parts ripped
out, such as backtracking, online topological sort maintenance
(needed by backtracking), the priority queue, and Sethi-Ullman
number computation and maintenance (needed by the priority
queue). As a result of all this, it generates somewhat lower
quality code, but that's its tradeoff for running about 30%
faster than list-burr in -fast mode in many cases.
This is somewhat experimental. Moving forward, major pieces of
this can be refactored with pieces in common with
ScheduleDAGRRList.cpp.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56307 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGFast.cpp
|
| 91aac1015e6714d959801dd8d60f55a72827dc4d |
17-Sep-2008 |
Dale Johannesen <dalej@apple.com> |
Add a bit to mark operands of asm's that conflict
with an earlyclobber operand elsewhere. Propagate
this bit and the earlyclobber bit through SDISel.
Change linear-scan RA not to allocate regs in a way
that conflicts with an earlyclobber. See also comments.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56290 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGEmit.cpp
electionDAGBuild.cpp
electionDAGISel.cpp
|
| bac3c81377340735d0674a0529dba69ef20e679b |
17-Sep-2008 |
Dale Johannesen <dalej@apple.com> |
Add a bit to mark operands of asm's that conflict
with an earlyclobber operand elsewhere. Propagate
this bit and the earlyclobber bit through SDISel.
Change linear-scan RA not to allocate regs in a way
that conflicts with an earlyclobber. See also comments.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56290 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGEmit.cpp
electionDAGBuild.cpp
electionDAGISel.cpp
|
| 59932584a812685b16ad6a53a023b2bb3fc21819 |
17-Sep-2008 |
Dan Gohman <gohman@apple.com> |
Don't worry about clobbering physical register defs that aren't used.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56281 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGRRList.cpp
|
| f2d8a25c86ba97b406b2e190bbb504fe1e4680f6 |
17-Sep-2008 |
Dan Gohman <gohman@apple.com> |
Don't worry about clobbering physical register defs that aren't used.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56281 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGRRList.cpp
|
| 1cd332725f7e5fc93f08a8d3ed9806827e9b5509 |
17-Sep-2008 |
Evan Cheng <evan.cheng@apple.com> |
When converting a CopyFromReg to a copy instruction, use the register class of its uses to determine the right destination register class of the copy. This is important for targets where a physical register may belong to multiple register classes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56258 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGEmit.cpp
|
| f7d58137a00ffaf1c210dcb859b784b5584403d7 |
17-Sep-2008 |
Evan Cheng <evan.cheng@apple.com> |
When converting a CopyFromReg to a copy instruction, use the register class of its uses to determine the right destination register class of the copy. This is important for targets where a physical register may belong to multiple register classes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56258 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGEmit.cpp
|
| 50284d81f863a6576582e1a171a22eb0f012ddf3 |
17-Sep-2008 |
Dan Gohman <gohman@apple.com> |
Change SelectionDAG::getConstantPool to always set the alignment of the
ConstantPoolSDNode, using the target's preferred alignment for the
constant type.
In LegalizeDAG, when performing loads from the constant pool, the
ConstantPoolSDNode's alignment is used in the calls to getLoad and
getExtLoad.
This change prevents SelectionDAG::getLoad/getExtLoad from incorrectly
choosing the ABI alignment for constant pool loads when Alignment == 0.
The incorrect alignment is only a performance issue when ABI alignment
does not equal preferred alignment (i.e., on x86 it was generating
MOVUPS instead of MOVAPS for v4f32 constant loads when the default ABI
alignment for 128bit vectors is forced to 1 byte.)
Patch by Paul Redmond!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56253 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
electionDAG.cpp
|
| 04637d141bc5df1df4000c04b63f35528645802c |
17-Sep-2008 |
Dan Gohman <gohman@apple.com> |
Change SelectionDAG::getConstantPool to always set the alignment of the
ConstantPoolSDNode, using the target's preferred alignment for the
constant type.
In LegalizeDAG, when performing loads from the constant pool, the
ConstantPoolSDNode's alignment is used in the calls to getLoad and
getExtLoad.
This change prevents SelectionDAG::getLoad/getExtLoad from incorrectly
choosing the ABI alignment for constant pool loads when Alignment == 0.
The incorrect alignment is only a performance issue when ABI alignment
does not equal preferred alignment (i.e., on x86 it was generating
MOVUPS instead of MOVAPS for v4f32 constant loads when the default ABI
alignment for 128bit vectors is forced to 1 byte.)
Patch by Paul Redmond!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56253 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
electionDAG.cpp
|
| 056292fd738924f3f7703725d8f630983794b5a5 |
16-Sep-2008 |
Bill Wendling <isanbard@gmail.com> |
Reverting r56249. On further investigation, this functionality isn't needed.
Apologies for the thrashing.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56251 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
egalizeTypes.cpp
cheduleDAGEmit.cpp
electionDAG.cpp
electionDAGBuild.cpp
electionDAGPrinter.cpp
|
| fef06056071dcd275f5ec539713a0dfcc33db436 |
16-Sep-2008 |
Bill Wendling <isanbard@gmail.com> |
Reverting r56249. On further investigation, this functionality isn't needed.
Apologies for the thrashing.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56251 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
egalizeTypes.cpp
cheduleDAGEmit.cpp
electionDAG.cpp
electionDAGBuild.cpp
electionDAGPrinter.cpp
|
| aed48bfee87046f40330fc35d17265dd3aaf5dd5 |
16-Sep-2008 |
Dan Gohman <gohman@apple.com> |
Include the alignment value when displaying ConstantPoolSDNodes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56250 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGPrinter.cpp
|
| 27d5317c5bf5a71f4cd720f84ae78c5b7b3f2cd1 |
16-Sep-2008 |
Dan Gohman <gohman@apple.com> |
Include the alignment value when displaying ConstantPoolSDNodes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56250 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGPrinter.cpp
|
| 9468a9b6beed640eca64274c8dcc5aed3b94450b |
16-Sep-2008 |
Bill Wendling <isanbard@gmail.com> |
- Change "ExternalSymbolSDNode" to "SymbolSDNode".
- Add linkage to SymbolSDNode (default to external).
- Change ISD::ExternalSymbol to ISD::Symbol.
- Change ISD::TargetExternalSymbol to ISD::TargetSymbol
These changes pave the way to allowing SymbolSDNodes with non-external linkage.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56249 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
egalizeTypes.cpp
cheduleDAGEmit.cpp
electionDAG.cpp
electionDAGBuild.cpp
electionDAGPrinter.cpp
|
| bdad5cfcd10bce155a51f3658a57ed3866903c5b |
16-Sep-2008 |
Bill Wendling <isanbard@gmail.com> |
- Change "ExternalSymbolSDNode" to "SymbolSDNode".
- Add linkage to SymbolSDNode (default to external).
- Change ISD::ExternalSymbol to ISD::Symbol.
- Change ISD::TargetExternalSymbol to ISD::TargetSymbol
These changes pave the way to allowing SymbolSDNodes with non-external linkage.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56249 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
egalizeTypes.cpp
cheduleDAGEmit.cpp
electionDAG.cpp
electionDAGBuild.cpp
electionDAGPrinter.cpp
|
| 1937e2f6ca0e6a04c4ad5fdb5b606b5ed9533e74 |
16-Sep-2008 |
Dan Gohman <gohman@apple.com> |
Don't take the time to CheckDAGForTailCallsAndFixThem when tail calls
are not enabled. Instead just omit the tail call flag when calls are
created.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56235 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuild.cpp
electionDAGISel.cpp
|
| 5ea89a04a96691210f0ad8e56ad6a91bae8e5f82 |
16-Sep-2008 |
Dan Gohman <gohman@apple.com> |
Don't take the time to CheckDAGForTailCallsAndFixThem when tail calls
are not enabled. Instead just omit the tail call flag when calls are
created.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56235 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuild.cpp
electionDAGISel.cpp
|
| 5eb0cecbc5dd370e33d4e0ab1abee7ce8597ca9c |
15-Sep-2008 |
Dan Gohman <gohman@apple.com> |
Re-enable SelectionDAG CSE for calls. It matters in the case of
libcalls, as in this testcase on ARM.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56226 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 791e12a20b8097a9986c06a9d400f419563d7542 |
15-Sep-2008 |
Dan Gohman <gohman@apple.com> |
Re-enable SelectionDAG CSE for calls. It matters in the case of
libcalls, as in this testcase on ARM.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56226 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 095cc29f321382e1f7d295e262a28197f92c5491 |
13-Sep-2008 |
Dan Gohman <gohman@apple.com> |
Define CallSDNode, an SDNode subclass for use with ISD::CALL.
Currently it just holds the calling convention and flags
for isVarArgs and isTailCall.
And it has several utility methods, which eliminate magic
5+2*i and similar index computations in several places.
CallSDNodes are not CSE'd. Teach UpdateNodeOperands to handle
nodes that are not CSE'd gracefully.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56183 91177308-0d34-0410-b5e6-96231b3b80d8
allingConvLower.cpp
electionDAG.cpp
electionDAGBuild.cpp
electionDAGISel.cpp
electionDAGPrinter.cpp
|
| 705e3f774254a03ef28a27c1d15903547a0e9d4c |
13-Sep-2008 |
Dan Gohman <gohman@apple.com> |
Define CallSDNode, an SDNode subclass for use with ISD::CALL.
Currently it just holds the calling convention and flags
for isVarArgs and isTailCall.
And it has several utility methods, which eliminate magic
5+2*i and similar index computations in several places.
CallSDNodes are not CSE'd. Teach UpdateNodeOperands to handle
nodes that are not CSE'd gracefully.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56183 91177308-0d34-0410-b5e6-96231b3b80d8
allingConvLower.cpp
electionDAG.cpp
electionDAGBuild.cpp
electionDAGISel.cpp
electionDAGPrinter.cpp
|
| 4fbd796a1251a27e6590765a0a34876f436a0af9 |
12-Sep-2008 |
Dan Gohman <gohman@apple.com> |
Change ConstantSDNode and ConstantFPSDNode to use ConstantInt* and
ConstantFP* instead of APInt and APFloat directly.
This reduces the amount of time to create ConstantSDNode
and ConstantFPSDNode nodes when ConstantInt* and ConstantFP*
respectively are already available, as is the case in
SelectionDAGBuild.cpp. Also, it reduces the amount of time
to legalize constants into constant pools, and the amount of
time to add ConstantFP operands to MachineInstrs, due to
eliminating ConstantInt::get and ConstantFP::get calls.
It increases the amount of work needed to create new constants
in cases where the client doesn't already have a ConstantInt*
or ConstantFP*, such as legalize expanding 64-bit integer constants
to 32-bit constants. And it adds a layer of indirection for the
accessor methods. But these appear to be outweight by the benefits
in most cases.
It will also make it easier to make ConstantSDNode and
ConstantFPNode more consistent with ConstantInt and ConstantFP.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56162 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
egalizeDAG.cpp
cheduleDAGEmit.cpp
electionDAG.cpp
electionDAGBuild.cpp
|
| c1f3a074a653f0faeec34a9d78f76379c1fe10c0 |
12-Sep-2008 |
Dan Gohman <gohman@apple.com> |
Change ConstantSDNode and ConstantFPSDNode to use ConstantInt* and
ConstantFP* instead of APInt and APFloat directly.
This reduces the amount of time to create ConstantSDNode
and ConstantFPSDNode nodes when ConstantInt* and ConstantFP*
respectively are already available, as is the case in
SelectionDAGBuild.cpp. Also, it reduces the amount of time
to legalize constants into constant pools, and the amount of
time to add ConstantFP operands to MachineInstrs, due to
eliminating ConstantInt::get and ConstantFP::get calls.
It increases the amount of work needed to create new constants
in cases where the client doesn't already have a ConstantInt*
or ConstantFP*, such as legalize expanding 64-bit integer constants
to 32-bit constants. And it adds a layer of indirection for the
accessor methods. But these appear to be outweight by the benefits
in most cases.
It will also make it easier to make ConstantSDNode and
ConstantFPNode more consistent with ConstantInt and ConstantFP.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56162 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
egalizeDAG.cpp
cheduleDAGEmit.cpp
electionDAG.cpp
electionDAGBuild.cpp
|
| 913d3dfac43f29921467f33aa743f28ee1bfc5d1 |
12-Sep-2008 |
Dale Johannesen <dalej@apple.com> |
Pass "earlyclobber" bit through to machine
representation; coalescer and RA need to know
about it. No functional change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56161 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGEmit.cpp
electionDAGBuild.cpp
|
| 38438f720b9b9f6dec65f16956d2b6b24349102b |
12-Sep-2008 |
Dale Johannesen <dalej@apple.com> |
Pass "earlyclobber" bit through to machine
representation; coalescer and RA need to know
about it. No functional change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56161 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGEmit.cpp
electionDAGBuild.cpp
|
| f5aeb1a8e4cf272c7348376d185ef8d8267653e0 |
12-Sep-2008 |
Dan Gohman <gohman@apple.com> |
Rename ConstantSDNode::getValue to getZExtValue, for consistency
with ConstantInt. This led to fixing a bug in TargetLowering.cpp
using getValue instead of getAPIntValue.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56159 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
egalizeDAG.cpp
egalizeIntegerTypes.cpp
egalizeTypesGeneric.cpp
egalizeVectorTypes.cpp
cheduleDAGEmit.cpp
electionDAG.cpp
electionDAGBuild.cpp
electionDAGISel.cpp
electionDAGPrinter.cpp
argetLowering.cpp
|
| faeb4a35197737b3674fcfc34fd6e84220aa437b |
12-Sep-2008 |
Dan Gohman <gohman@apple.com> |
Rename ConstantSDNode::getValue to getZExtValue, for consistency
with ConstantInt. This led to fixing a bug in TargetLowering.cpp
using getValue instead of getAPIntValue.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56159 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
egalizeDAG.cpp
egalizeIntegerTypes.cpp
egalizeTypesGeneric.cpp
egalizeVectorTypes.cpp
cheduleDAGEmit.cpp
electionDAG.cpp
electionDAGBuild.cpp
electionDAGISel.cpp
electionDAGPrinter.cpp
argetLowering.cpp
|
| e2f2083f9ca6f9a9a9d7dbb75d59a779a0452f4a |
12-Sep-2008 |
Dale Johannesen <dalej@apple.com> |
The sequence for ppcf128 compares was not IEEE
safe in the presence of NaNs.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56136 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 26317b6e91cd82031e4049c0e290ee34b9ecd887 |
12-Sep-2008 |
Dale Johannesen <dalej@apple.com> |
The sequence for ppcf128 compares was not IEEE
safe in the presence of NaNs.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56136 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 74321abb4f7e32e29c0e391b3ebb196c7da86525 |
10-Sep-2008 |
Dan Gohman <gohman@apple.com> |
FastISel support for i1 PHI nodes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56069 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuild.cpp
|
| 109994919cad0392c790f65b0f6af9030e3a4244 |
10-Sep-2008 |
Dan Gohman <gohman@apple.com> |
FastISel support for i1 PHI nodes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56069 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuild.cpp
|
| 821164875706dd28e48c6cc3cea5c8ffa6e658d1 |
10-Sep-2008 |
Dan Gohman <gohman@apple.com> |
FastISel support for i1 constants.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56068 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
|
| 805005db3515111884a4b5d5b804abdffb3aec99 |
10-Sep-2008 |
Dan Gohman <gohman@apple.com> |
FastISel support for i1 constants.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56068 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
|
| 0586d91bb3e516d5826826522d9a90ed6ef74d86 |
10-Sep-2008 |
Dan Gohman <gohman@apple.com> |
Add X86FastISel support for static allocas, and refences
to static allocas. As part of this change, refactor the
address mode code for laods and stores.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56066 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
electionDAGISel.cpp
|
| d6211a741f5af81e08ad7682deee98eec5b9523e |
10-Sep-2008 |
Dan Gohman <gohman@apple.com> |
Add X86FastISel support for static allocas, and refences
to static allocas. As part of this change, refactor the
address mode code for laods and stores.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56066 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
electionDAGISel.cpp
|
| 3ee25dca5b2f321103e879fb125b7870683e7085 |
10-Sep-2008 |
Dan Gohman <gohman@apple.com> |
Add a break statement that I accidentally deleted when
I shuffled the fast-isel command-line options around. This fixes
a bunch of fast-isel failures.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56057 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 6b2d852835e271222e0f1d0d732d8e9846b2c60b |
10-Sep-2008 |
Dan Gohman <gohman@apple.com> |
Add a break statement that I accidentally deleted when
I shuffled the fast-isel command-line options around. This fixes
a bunch of fast-isel failures.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56057 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| fc2508eb78eb4e754c85e01e082fcd79e7e66645 |
10-Sep-2008 |
Bill Wendling <isanbard@gmail.com> |
Remove unnecessary bit-wise AND from the limited precision work.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56049 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuild.cpp
|
| e0ab0f3b6046a66683dc79e048f231c91f20537b |
10-Sep-2008 |
Bill Wendling <isanbard@gmail.com> |
Remove unnecessary bit-wise AND from the limited precision work.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56049 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuild.cpp
|
| c0c3b9a3d07a86490c4dae66e4f4c8eb40dec339 |
10-Sep-2008 |
Daniel Dunbar <daniel@zuster.org> |
Fix 80 col violation.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56048 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuild.cpp
|
| 9dc7b4ed59136b563a6c6cc48406b20c6d8ddfd0 |
10-Sep-2008 |
Daniel Dunbar <daniel@zuster.org> |
Fix 80 col violation.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56048 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuild.cpp
|
| 277fc24a7c19aba06fa9d268c5a09a366acf7875 |
10-Sep-2008 |
Bill Wendling <isanbard@gmail.com> |
Check that both operands are f32 before attempting to lower.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56036 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuild.cpp
|
| 1249d2f26eec15fc129ed7dd60860907c3d60846 |
10-Sep-2008 |
Bill Wendling <isanbard@gmail.com> |
Check that both operands are f32 before attempting to lower.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56036 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuild.cpp
|
| aeb5c7b3532bd9bcb5e7e3c9ef2991160511c5d2 |
10-Sep-2008 |
Bill Wendling <isanbard@gmail.com> |
Implement "visitPow". This is mainly used to see if we have a pow() call of this
form:
powf(10.0f, x);
If this is the case, and also we want limited precision floating-point
calculations, then lower to do the limited-precision stuff.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56035 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuild.cpp
electionDAGBuild.h
|
| 96f6fa1c3397e424565625702a3aec10bd303998 |
10-Sep-2008 |
Bill Wendling <isanbard@gmail.com> |
Implement "visitPow". This is mainly used to see if we have a pow() call of this
form:
powf(10.0f, x);
If this is the case, and also we want limited precision floating-point
calculations, then lower to do the limited-precision stuff.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56035 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuild.cpp
electionDAGBuild.h
|
| 9d24ac56e1f9f1025a473d6b013557431fd05b7c |
10-Sep-2008 |
Evan Cheng <evan.cheng@apple.com> |
A few more places where FPOW is being ignored.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56032 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 1fac69555885ed315dd2247fdb5726098651df3c |
10-Sep-2008 |
Evan Cheng <evan.cheng@apple.com> |
A few more places where FPOW is being ignored.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56032 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 4344a5d0d7b280f0b891e0e6a4413b059d9080b3 |
10-Sep-2008 |
Dan Gohman <gohman@apple.com> |
Change -fast-isel-no-abort to -fast-isel-abort, which now defaults
to being off by default. Also, add assertion checks to check that
the various fast-isel-related command-line options are only used
when -fast-isel itself is enabled.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56029 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| ee70e1df841384eb96625495506e840c9091fc18 |
10-Sep-2008 |
Dan Gohman <gohman@apple.com> |
Change -fast-isel-no-abort to -fast-isel-abort, which now defaults
to being off by default. Also, add assertion checks to check that
the various fast-isel-related command-line options are only used
when -fast-isel itself is enabled.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56029 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 4b88702ac3fac540b970e2d92f3dcc5071f16a84 |
10-Sep-2008 |
Evan Cheng <evan.cheng@apple.com> |
Legalizer was missing code that expand fpow to a libcall.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56028 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 5316b39b4a29f4b68c5c7c437fa827f939bcf68f |
10-Sep-2008 |
Evan Cheng <evan.cheng@apple.com> |
Legalizer was missing code that expand fpow to a libcall.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56028 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| e10c814c52a4cf39a541b4631a64067b1969b124 |
10-Sep-2008 |
Bill Wendling <isanbard@gmail.com> |
Adding 6-, 12-, and 18-bit limited-precision floating-point support for exp2
function.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56025 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuild.cpp
|
| d1641c96b86af37b623f764e01adbfe0a5fc13d0 |
10-Sep-2008 |
Bill Wendling <isanbard@gmail.com> |
Adding 6-, 12-, and 18-bit limited-precision floating-point support for exp2
function.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56025 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuild.cpp
|
| b4ec2830499b8c3c5e0de56a2620fb2b21c88b9e |
10-Sep-2008 |
Bill Wendling <isanbard@gmail.com> |
Add support for 6-, 12-, and 18-bit limited precision calculations of exp for
floating-point numbers.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56023 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuild.cpp
|
| 25893a3884b7d16d5e8a4eb1e50a7a28a805e019 |
10-Sep-2008 |
Bill Wendling <isanbard@gmail.com> |
Add support for 6-, 12-, and 18-bit limited precision calculations of exp for
floating-point numbers.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56023 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuild.cpp
|
| 293d5f8bc02a9148238b2c79484637f56de65b9c |
10-Sep-2008 |
Dan Gohman <gohman@apple.com> |
Add a new option, -fast-isel-verbose, that can be used with
-fast-isel-no-abort to get a dump of all unhandled instructions,
without an abort.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56021 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 69740ec6261a4a8e22e8a106710f88edf3f288cd |
10-Sep-2008 |
Dan Gohman <gohman@apple.com> |
Add a new option, -fast-isel-verbose, that can be used with
-fast-isel-no-abort to get a dump of all unhandled instructions,
without an abort.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56021 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 0d95267e499082b658eaeaca85b7c5a226753f69 |
09-Sep-2008 |
Owen Anderson <resistor@mac.com> |
Clean this up, based on Evan's suggestions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56009 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
|
| 585dabb2082dbc6f7bc1b25bbf35032f4d35f5d0 |
09-Sep-2008 |
Owen Anderson <resistor@mac.com> |
Clean this up, based on Evan's suggestions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56009 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
|
| 3915025a4fb6add2e787013b54c1552ede388c17 |
09-Sep-2008 |
Bill Wendling <isanbard@gmail.com> |
- Add support for 6-, 12-, and 18-bit limited precision floating-point "log"
values.
- Refactored some of the code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56008 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuild.cpp
|
| f590a04731db8fd97742fb0f202697e36ab73405 |
09-Sep-2008 |
Bill Wendling <isanbard@gmail.com> |
- Add support for 6-, 12-, and 18-bit limited precision floating-point "log"
values.
- Refactored some of the code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56008 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuild.cpp
|
| 19e861a4ffb896f16a691d5ac869e894df3cd464 |
09-Sep-2008 |
Anton Korobeynikov <asl@math.spbu.ru> |
Make safer variant of alias resolution routine to be default
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56005 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| c7b9091a9b49563aaf8a6ca14b6f31f34ffbe044 |
09-Sep-2008 |
Anton Korobeynikov <asl@math.spbu.ru> |
Make safer variant of alias resolution routine to be default
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56005 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| bd297bcd4a69dd14e97afae555b593a25071fb6f |
09-Sep-2008 |
Bill Wendling <isanbard@gmail.com> |
Add limited precision floating-point conversions of log10 for 6- and 18-bit
precisions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56000 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuild.cpp
|
| f083e007f8ad7e80518317b8a6f2ce1dbd25ea0d |
09-Sep-2008 |
Bill Wendling <isanbard@gmail.com> |
Add limited precision floating-point conversions of log10 for 6- and 18-bit
precisions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56000 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuild.cpp
|
| baf37cd5568a7449b6b3822d2dc19582f0270877 |
09-Sep-2008 |
Owen Anderson <resistor@mac.com> |
Check for type legality before materializing integer constants in fast isel. With this change,
all of MultiSource/Applications passes on Darwin/X86 under FastISel.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55982 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
|
| d09a49a5a03e9e8d4ed5b7b143cd0dd85a117d10 |
09-Sep-2008 |
Owen Anderson <resistor@mac.com> |
Check for type legality before materializing integer constants in fast isel. With this change,
all of MultiSource/Applications passes on Darwin/X86 under FastISel.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55982 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
|
| cf01f7a78c18224866595b4b493d03a3de305e1f |
09-Sep-2008 |
Dan Gohman <gohman@apple.com> |
Remove the code that protected FastISel from aborting in
the case of loads, stores, and conditional branches. It can
handle those now, so any that aren't handled should trigger
the abort.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55977 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 63cb3eb817e8d8f74a4d3b744b5beedf1ca48d8d |
09-Sep-2008 |
Dan Gohman <gohman@apple.com> |
Remove the code that protected FastISel from aborting in
the case of loads, stores, and conditional branches. It can
handle those now, so any that aren't handled should trigger
the abort.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55977 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 59fbc80f6b3b5c71dfb84149f589625f7ed510e3 |
09-Sep-2008 |
Evan Cheng <evan.cheng@apple.com> |
Fix a constant lowering bug. Now we can do load and store instructions with funky getelementptr embedded in the address operand.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55975 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
|
| 483f0db2d164142681731eb5dff96442af72c255 |
09-Sep-2008 |
Evan Cheng <evan.cheng@apple.com> |
Fix a constant lowering bug. Now we can do load and store instructions with funky getelementptr embedded in the address operand.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55975 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
|
| 3eb594013f666d6af9f943df5fb6ac4d902debee |
09-Sep-2008 |
Bill Wendling <isanbard@gmail.com> |
Add support for floating-point calculations of log2 with limited precisions of 6
and 18.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55968 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuild.cpp
|
| 0b40cbd218a942004770b0bc939e345bb383595a |
09-Sep-2008 |
Bill Wendling <isanbard@gmail.com> |
Add support for floating-point calculations of log2 with limited precisions of 6
and 18.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55968 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuild.cpp
|
| a0e8a1e5d305ad58db3200a56c3ed8b2571cf6d6 |
08-Sep-2008 |
Anton Korobeynikov <asl@math.spbu.ru> |
Reapply 55904: Unbreak and fix indentation
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55958 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuild.cpp
|
| 382fb24804392888b06194484e38a44e3f4c6fcd |
08-Sep-2008 |
Anton Korobeynikov <asl@math.spbu.ru> |
Reapply 55904: Unbreak and fix indentation
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55958 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuild.cpp
|
| a8657e3587eb71eb920c4f0d7d4baa58f33a277d |
08-Sep-2008 |
Dan Gohman <gohman@apple.com> |
Fix a few I's that were meant to be renamed to BI's.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55942 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| dc7d3aab55b75cd27af47224278e30451729711b |
08-Sep-2008 |
Dan Gohman <gohman@apple.com> |
Fix a few I's that were meant to be renamed to BI's.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55942 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 07cabb9432dd927a6d7b1f72039d9475c1742971 |
08-Sep-2008 |
Dale Johannesen <dalej@apple.com> |
Redo the 3 existing low-precision expansions to
use float constants. An oversight by the numerics
people who supplied this.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55930 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuild.cpp
|
| 9b70c70a4815508b3306961be66f4f0eddd29988 |
08-Sep-2008 |
Dale Johannesen <dalej@apple.com> |
Redo the 3 existing low-precision expansions to
use float constants. An oversight by the numerics
people who supplied this.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55930 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuild.cpp
|
| a425e0073df51ab99665062a8c00d704e89d2ef8 |
08-Sep-2008 |
Bill Wendling <isanbard@gmail.com> |
Reverting r55898 to r55909. One of these patches was causing an ICE during the full bootstrap on Darwin:
/Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm-gcc.obj/./gcc/xgcc
-B/Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm-gcc.obj/./gcc/
-B/Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm-gcc.install/i386-apple-darwin9.4.0/bin/
-B/Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm-gcc.install/i386-apple-darwin9.4.0/lib/
-isystem /Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm-gcc.install/i386-apple-darwin9.4.0/include
-isystem /Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm-gcc.install/i386-apple-darwin9.4.0/sys-include
-O2 -O2 -g -O2 -DIN_GCC -W -Wall -Wwrite-strings
-Wstrict-prototypes -Wmissing-prototypes -Wold-style-definition
-isystem ./include -fPIC -pipe -g -DHAVE_GTHR_DEFAULT -DIN_LIBGCC2
-D__GCC_FLOAT_NOT_NEEDED -I. -I. -I../../llvm-gcc.src/gcc
-I../../llvm-gcc.src/gcc/. -I../../llvm-gcc.src/gcc/../include
-I./../intl -I../../llvm-gcc.src/gcc/../libcpp/include
-I../../llvm-gcc.src/gcc/../libdecnumber -I../libdecnumber
-I/Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm.obj/include
-I/Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm.src/include
-DSHARED -m64 -DL_negdi2 -c ../../llvm-gcc.src/gcc/libgcc2.c -o
libgcc/x86_64/_negdi2_s.o
Assertion failed: (TargetRegisterInfo::isVirtualRegister(regA) &&
TargetRegisterInfo::isVirtualRegister(regB) && "cannot update physical
register live information"), function runOnMachineFunction, file
/Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm.src/lib/CodeGen/TwoAddressInstructionPass.cpp,
line 311.
/Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm-gcc.obj/./gcc/xgcc
-B/Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm-gcc.obj/./gcc/
-B/Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm-gcc.install/i386-apple-darwin9.4.0/bin/
-B/Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm-gcc.install/i386-apple-darwin9.4.0/lib/
-isystem /Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm-gcc.install/i386-apple-darwin9.4.0/include
-isystem /Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm-gcc.install/i386-apple-darwin9.4.0/sys-include
-O2 -O2 -g -O2 -DIN_GCC -W -Wall -Wwrite-strings
-Wstrict-prototypes -Wmissing-prototypes -Wold-style-definition
-isystem ./include -fPIC -pipe -g -DHAVE_GTHR_DEFAULT -DIN_LIBGCC2
-D__GCC_FLOAT_NOT_NEEDED -I. -I. -I../../llvm-gcc.src/gcc
-I../../llvm-gcc.src/gcc/. -I../../llvm-gcc.src/gcc/../include
-I./../intl -I../../llvm-gcc.src/gcc/../libcpp/include
-I../../llvm-gcc.src/gcc/../libdecnumber -I../libdecnumber
-I/Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm.obj/include
-I/Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm.src/include
-DSHARED -m64 -DL_lshrdi3 -c ../../llvm-gcc.src/gcc/libgcc2.c -o
libgcc/x86_64/_lshrdi3_s.o
../../llvm-gcc.src/gcc/unwind-dw2.c:1527: internal compiler error: Abort trap
Please submit a full bug report,
with preprocessed source if appropriate.
See <URL:http://developer.apple.com/bugreporter> for instructions.
{standard input}:unknown:Undefined local symbol LBB21_11
{standard input}:unknown:Undefined local symbol LBB21_12
{standard input}:unknown:Undefined local symbol LBB21_13
{standard input}:unknown:Undefined local symbol LBB21_8
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55928 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuild.cpp
|
| cef079df78ff49684e5fe1444edf513c6f62e2af |
08-Sep-2008 |
Bill Wendling <isanbard@gmail.com> |
Reverting r55898 to r55909. One of these patches was causing an ICE during the full bootstrap on Darwin:
/Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm-gcc.obj/./gcc/xgcc
-B/Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm-gcc.obj/./gcc/
-B/Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm-gcc.install/i386-apple-darwin9.4.0/bin/
-B/Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm-gcc.install/i386-apple-darwin9.4.0/lib/
-isystem /Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm-gcc.install/i386-apple-darwin9.4.0/include
-isystem /Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm-gcc.install/i386-apple-darwin9.4.0/sys-include
-O2 -O2 -g -O2 -DIN_GCC -W -Wall -Wwrite-strings
-Wstrict-prototypes -Wmissing-prototypes -Wold-style-definition
-isystem ./include -fPIC -pipe -g -DHAVE_GTHR_DEFAULT -DIN_LIBGCC2
-D__GCC_FLOAT_NOT_NEEDED -I. -I. -I../../llvm-gcc.src/gcc
-I../../llvm-gcc.src/gcc/. -I../../llvm-gcc.src/gcc/../include
-I./../intl -I../../llvm-gcc.src/gcc/../libcpp/include
-I../../llvm-gcc.src/gcc/../libdecnumber -I../libdecnumber
-I/Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm.obj/include
-I/Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm.src/include
-DSHARED -m64 -DL_negdi2 -c ../../llvm-gcc.src/gcc/libgcc2.c -o
libgcc/x86_64/_negdi2_s.o
Assertion failed: (TargetRegisterInfo::isVirtualRegister(regA) &&
TargetRegisterInfo::isVirtualRegister(regB) && "cannot update physical
register live information"), function runOnMachineFunction, file
/Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm.src/lib/CodeGen/TwoAddressInstructionPass.cpp,
line 311.
/Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm-gcc.obj/./gcc/xgcc
-B/Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm-gcc.obj/./gcc/
-B/Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm-gcc.install/i386-apple-darwin9.4.0/bin/
-B/Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm-gcc.install/i386-apple-darwin9.4.0/lib/
-isystem /Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm-gcc.install/i386-apple-darwin9.4.0/include
-isystem /Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm-gcc.install/i386-apple-darwin9.4.0/sys-include
-O2 -O2 -g -O2 -DIN_GCC -W -Wall -Wwrite-strings
-Wstrict-prototypes -Wmissing-prototypes -Wold-style-definition
-isystem ./include -fPIC -pipe -g -DHAVE_GTHR_DEFAULT -DIN_LIBGCC2
-D__GCC_FLOAT_NOT_NEEDED -I. -I. -I../../llvm-gcc.src/gcc
-I../../llvm-gcc.src/gcc/. -I../../llvm-gcc.src/gcc/../include
-I./../intl -I../../llvm-gcc.src/gcc/../libcpp/include
-I../../llvm-gcc.src/gcc/../libdecnumber -I../libdecnumber
-I/Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm.obj/include
-I/Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm.src/include
-DSHARED -m64 -DL_lshrdi3 -c ../../llvm-gcc.src/gcc/libgcc2.c -o
libgcc/x86_64/_lshrdi3_s.o
../../llvm-gcc.src/gcc/unwind-dw2.c:1527: internal compiler error: Abort trap
Please submit a full bug report,
with preprocessed source if appropriate.
See <URL:http://developer.apple.com/bugreporter> for instructions.
{standard input}:unknown:Undefined local symbol LBB21_11
{standard input}:unknown:Undefined local symbol LBB21_12
{standard input}:unknown:Undefined local symbol LBB21_13
{standard input}:unknown:Undefined local symbol LBB21_8
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55928 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuild.cpp
|
| 942ca7f808b88b8789c665a3733e58c75320834f |
08-Sep-2008 |
Dan Gohman <gohman@apple.com> |
In visitUREM, arrange for the temporary UDIV node to be
revisited, consistent with the code in visitSREM.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55923 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 2e1517f88a329930dc52013b99027df840b8254d |
08-Sep-2008 |
Dan Gohman <gohman@apple.com> |
In visitUREM, arrange for the temporary UDIV node to be
revisited, consistent with the code in visitSREM.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55923 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 1e0e04caace14a1bdedcf5aef2271e1c031b27b4 |
08-Sep-2008 |
Daniel Dunbar <daniel@zuster.org> |
Add VISIBILITY_HIDDEN on SDISelAsmOperandInfo
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55922 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuild.cpp
|
| 01b954547ff6c7474af7098adaa2d6d8ca7801d8 |
08-Sep-2008 |
Daniel Dunbar <daniel@zuster.org> |
Add VISIBILITY_HIDDEN on SDISelAsmOperandInfo
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55922 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuild.cpp
|
| a47916d3792b47ec60d5152471db48d50dd9bb35 |
08-Sep-2008 |
Dan Gohman <gohman@apple.com> |
Fix the string for ISD::UDIVREM.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55917 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 2e66b05a2b2a88a8b73692e8187c0be784e0ad57 |
08-Sep-2008 |
Dan Gohman <gohman@apple.com> |
Fix the string for ISD::UDIVREM.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55917 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 9f1185076d60153fd35feb3cadb1b4cd8debc0b6 |
08-Sep-2008 |
Evan Cheng <evan.cheng@apple.com> |
Avoid redefinition and nnbreak windows build.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55911 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| e9d9a1655da3de0329a15faf93c37e8af32a60ca |
08-Sep-2008 |
Evan Cheng <evan.cheng@apple.com> |
Avoid redefinition and nnbreak windows build.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55911 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| d4fde0b11c44f2261eea615389dc5da48d7f439c |
08-Sep-2008 |
Anton Korobeynikov <asl@math.spbu.ru> |
Unbreak and fix indentation
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55904 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuild.cpp
|
| 791a0d1afadd356f742513908dfb54f4a7e4c23b |
08-Sep-2008 |
Anton Korobeynikov <asl@math.spbu.ru> |
Unbreak and fix indentation
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55904 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuild.cpp
|
| 5960e4eb68be6b3bca6369f6a95d7de5ed8a9ead |
08-Sep-2008 |
Evan Cheng <evan.cheng@apple.com> |
Add fast isel physical register definition support.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55892 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
|
| 82bfc84a90a617cc6eb014a287ff413adaa21f02 |
08-Sep-2008 |
Evan Cheng <evan.cheng@apple.com> |
Add fast isel physical register definition support.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55892 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
|
| 9a0d1ba0510ef68f35c21a43861dad957759d86f |
08-Sep-2008 |
Bill Wendling <isanbard@gmail.com> |
Revert my previous change -- the subtraction of two constants was a no-op
before. This is taken care of in the selection DAG pass. In my opinion, this
should be in one place or the other. I.e., it should probably be removed from
the DAG combiner (along with the other arithmetic transformations on constants
that are essentially no-ops).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55889 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| d1e8abcb189a7cd074f91ce813336341c71ce84e |
08-Sep-2008 |
Bill Wendling <isanbard@gmail.com> |
Revert my previous change -- the subtraction of two constants was a no-op
before. This is taken care of in the selection DAG pass. In my opinion, this
should be in one place or the other. I.e., it should probably be removed from
the DAG combiner (along with the other arithmetic transformations on constants
that are essentially no-ops).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55889 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| ca460d5a39e09836e279405b85e2390fa7e7d859 |
07-Sep-2008 |
Bill Wendling <isanbard@gmail.com> |
Convert
// fold (sub c1, c2) -> c1-c2
from a no-op into an actual transformation.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55886 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 0cdbd3696b83b2d784f656afcd9aa4d2a10fa493 |
07-Sep-2008 |
Bill Wendling <isanbard@gmail.com> |
Convert
// fold (sub c1, c2) -> c1-c2
from a no-op into an actual transformation.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55886 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| f09917847bb082829feba34d1818eb97764839d9 |
07-Sep-2008 |
Evan Cheng <evan.cheng@apple.com> |
Indentation.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55880 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
|
| 5bbf59abc615c3521d85dc04abfabf4cbbf66a4d |
07-Sep-2008 |
Evan Cheng <evan.cheng@apple.com> |
Indentation.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55880 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
|
| c7fcfa07d9c358e5fe20cf1da82f6b60a862920d |
07-Sep-2008 |
Evan Cheng <evan.cheng@apple.com> |
- Doh. Pass vector by value is bad.
- Add a AnalyzeCallResult specialized for calls which produce a single value. This is used by fastisel.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55879 91177308-0d34-0410-b5e6-96231b3b80d8
allingConvLower.cpp
|
| a2608b581eac67e7e040162a32c507db18ee3b5b |
07-Sep-2008 |
Evan Cheng <evan.cheng@apple.com> |
- Doh. Pass vector by value is bad.
- Add a AnalyzeCallResult specialized for calls which produce a single value. This is used by fastisel.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55879 91177308-0d34-0410-b5e6-96231b3b80d8
allingConvLower.cpp
|
| 853244f8a6d314a9d90824c3d13e8cd368fb88ed |
06-Sep-2008 |
Dale Johannesen <dalej@apple.com> |
Next limited float precision expansion (log2 12 bits)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55866 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuild.cpp
|
| d2cd53d2e46308a9da977fb55df98d1559e62d01 |
06-Sep-2008 |
Dale Johannesen <dalej@apple.com> |
Next limited float precision expansion (log2 12 bits)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55866 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuild.cpp
|
| 6e6074508c2f781c3e52dfe0e301cb1c7f395a91 |
06-Sep-2008 |
Owen Anderson <resistor@mac.com> |
Revert r55859. This is breaking the build in the abscence of its companion commit.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55865 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
|
| 134f6e5b6d7246384eaaeacbf5052a3a218cc887 |
06-Sep-2008 |
Owen Anderson <resistor@mac.com> |
Revert r55859. This is breaking the build in the abscence of its companion commit.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55865 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
|
| 8a11053f3ca7efb29312c4293c4fdb5d2ca3e20f |
06-Sep-2008 |
Dan Gohman <gohman@apple.com> |
Move the code that inserts copies for function livein registers
out of ScheduleDAGEmit.cpp and into SelectionDAGISel.cpp. This
allows it to be run exactly once per function, even if multiple
SelectionDAG iterations happen in the entry block, as may happen
with FastISel.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55863 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGEmit.cpp
electionDAGISel.cpp
|
| 283e4995a27b39e2d5b206ba64cffb06a9c35dd4 |
06-Sep-2008 |
Dan Gohman <gohman@apple.com> |
Move the code that inserts copies for function livein registers
out of ScheduleDAGEmit.cpp and into SelectionDAGISel.cpp. This
allows it to be run exactly once per function, even if multiple
SelectionDAG iterations happen in the entry block, as may happen
with FastISel.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55863 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGEmit.cpp
electionDAGISel.cpp
|
| 852680a8fa4d70055177c7e1d9b0b43f218064d5 |
05-Sep-2008 |
Dale Johannesen <dalej@apple.com> |
Add the next limited-precision expansion.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55856 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuild.cpp
|
| 91e305b18628619eb5abd3d7a162c7d99f292824 |
05-Sep-2008 |
Dale Johannesen <dalej@apple.com> |
Add the next limited-precision expansion.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55856 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuild.cpp
|
| 638c6830c6d0d6871065d2b00178ee4aa7d4d044 |
05-Sep-2008 |
Dan Gohman <gohman@apple.com> |
FastISel support for AND and OR with type i1.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55846 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
|
| 8a8980ec4bd58e7e75d364a1144b94343828e32a |
05-Sep-2008 |
Dan Gohman <gohman@apple.com> |
FastISel support for AND and OR with type i1.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55846 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
|
| 59e577f73c9908a37cd23b81ff5e81c911d0b25e |
05-Sep-2008 |
Dale Johannesen <dalej@apple.com> |
Add hooks for other intrinsics to get low-precision expansions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55845 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuild.cpp
electionDAGBuild.h
|
| 062bb5dd33d7eb88e6944708b724c3d06cb1fe00 |
05-Sep-2008 |
Dale Johannesen <dalej@apple.com> |
Add hooks for other intrinsics to get low-precision expansions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55845 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuild.cpp
electionDAGBuild.h
|
| 40b189e4e257924d90aaf63bf2e12bc7bbca961a |
05-Sep-2008 |
Dan Gohman <gohman@apple.com> |
FastISel support for ConstantExprs.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55843 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
|
| 336a193d3d6a38ebde42cbfc3a688a4c36ad80e6 |
05-Sep-2008 |
Dan Gohman <gohman@apple.com> |
FastISel support for ConstantExprs.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55843 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
|
| be0034e3c2f671f255249d51ec95d746709fe1f1 |
05-Sep-2008 |
Dan Gohman <gohman@apple.com> |
Revert r55817. It broke PIC. FastISel will need to find a different
approach here.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55842 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGEmit.cpp
|
| 0542d559a1e2f5cc319dfc125064ef74283a11c3 |
05-Sep-2008 |
Dan Gohman <gohman@apple.com> |
Revert r55817. It broke PIC. FastISel will need to find a different
approach here.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55842 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGEmit.cpp
|
| c89d2feb35560883688e43b553b8e94e7cd371de |
05-Sep-2008 |
Evan Cheng <evan.cheng@apple.com> |
Add a variant of AnalyzeCallOperands that can be used by fast isel.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55838 91177308-0d34-0410-b5e6-96231b3b80d8
allingConvLower.cpp
|
| 0a9e7c548fecba00b96212e1bbafc9fc8e59c6ff |
05-Sep-2008 |
Evan Cheng <evan.cheng@apple.com> |
Add a variant of AnalyzeCallOperands that can be used by fast isel.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55838 91177308-0d34-0410-b5e6-96231b3b80d8
allingConvLower.cpp
|
| 1c11debc94baa65b7af702bbc20c813c266afb19 |
05-Sep-2008 |
Duncan Sands <baldrick@free.fr> |
"Fix" PR2762. The testcase now crashes codegen
elsewhere due to a missing pattern for
v2f64 = sint_to_fp v2i32. That is PR2687.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55828 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeVectorTypes.cpp
|
| e0a0f55447c818391fd4820b25ef5de47ed7252e |
05-Sep-2008 |
Duncan Sands <baldrick@free.fr> |
"Fix" PR2762. The testcase now crashes codegen
elsewhere due to a missing pattern for
v2f64 = sint_to_fp v2i32. That is PR2687.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55828 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeVectorTypes.cpp
|
| 3dd168d4452d0aff4960f01c5a7471a79eec45f3 |
05-Sep-2008 |
Dan Gohman <gohman@apple.com> |
Fix a search+replace-o.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55824 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 83c6e8ac87761b247f664a6875a33bb403d917e9 |
05-Sep-2008 |
Dan Gohman <gohman@apple.com> |
Fix a search+replace-o.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55824 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 601d3c014588ad87f6625cd8848c8d76ffe72c37 |
05-Sep-2008 |
Dale Johannesen <dalej@apple.com> |
Add -flimit-float-precision to enable some faster,
but less accurate (non-IEEE) code sequences for
certain math library functions. Add the first of
several such expansions. Don't worry, if you don't
turn it on it won't affect you.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55823 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuild.cpp
electionDAGBuild.h
|
| d93d7996fa5ae499eeadb734e5a14480143ea9b5 |
05-Sep-2008 |
Dale Johannesen <dalej@apple.com> |
Add -flimit-float-precision to enable some faster,
but less accurate (non-IEEE) code sequences for
certain math library functions. Add the first of
several such expansions. Don't worry, if you don't
turn it on it won't affect you.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55823 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuild.cpp
electionDAGBuild.h
|
| 087c8507e592bbbede1746f07bd44b28559e3684 |
05-Sep-2008 |
Dan Gohman <gohman@apple.com> |
FastISel support for unreachable.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55818 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
|
| 36c296ea13462818567a96faed62ef8a0746a4b9 |
05-Sep-2008 |
Dan Gohman <gohman@apple.com> |
FastISel support for unreachable.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55818 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
|
| c7f4a8a80cb7e8cf09495f4b60ae45734e7d5d98 |
05-Sep-2008 |
Dan Gohman <gohman@apple.com> |
In FastISel mode, the scheduler may be invoked multiple times
in the same block. Fix the entry-block handling to only run at
at the beginning of the entry block, and not any other times.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55817 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGEmit.cpp
|
| fe9f74a6a0878266f0198c1b0186dbd7c95e23c6 |
05-Sep-2008 |
Dan Gohman <gohman@apple.com> |
In FastISel mode, the scheduler may be invoked multiple times
in the same block. Fix the entry-block handling to only run at
at the beginning of the entry block, and not any other times.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55817 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGEmit.cpp
|
| 95267a1e671efc3c14e916b6978bbb15973b4cdc |
05-Sep-2008 |
Owen Anderson <resistor@mac.com> |
Add initial support for selecting constant materializations that require constant
pool loads on X86 in fast isel. This isn't actually used yet.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55814 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
|
| 51f958e134f0daa4e29c06d08d2477c1c4712f51 |
05-Sep-2008 |
Owen Anderson <resistor@mac.com> |
Add initial support for selecting constant materializations that require constant
pool loads on X86 in fast isel. This isn't actually used yet.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55814 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
|
| 5b2298005d71d74650197462cab402ed92c2f583 |
04-Sep-2008 |
Dan Gohman <gohman@apple.com> |
Add an include of SmallSet.h.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55793 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuild.cpp
|
| a76b35962b7aafeed91c607d1fd7568586280dd2 |
04-Sep-2008 |
Dan Gohman <gohman@apple.com> |
Add an include of SmallSet.h.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55793 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuild.cpp
|
| ae73dc1448d25b02cabc7c64c86c64371453dda8 |
04-Sep-2008 |
Dan Gohman <gohman@apple.com> |
Tidy up several unbeseeming casts from pointer to intptr_t.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55779 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 26f8c27c34b44f7d87de74d1de2128c1a02855bf |
04-Sep-2008 |
Dan Gohman <gohman@apple.com> |
Tidy up several unbeseeming casts from pointer to intptr_t.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55779 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 6448d91ad1e5497fe2f7015d61b57cb5f3040879 |
04-Sep-2008 |
Dan Gohman <gohman@apple.com> |
Clean up uses of TargetLowering::getTargetMachine.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55769 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
electionDAG.cpp
electionDAGBuild.cpp
|
| 404e854a4bc184d46c235708a901770dba1a903d |
04-Sep-2008 |
Dan Gohman <gohman@apple.com> |
Clean up uses of TargetLowering::getTargetMachine.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55769 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
electionDAG.cpp
electionDAGBuild.cpp
|
| 7794f2a3a7778bdbc9bdd861db1fe914450e0470 |
04-Sep-2008 |
Dale Johannesen <dalej@apple.com> |
Add intrinsics for log, log2, log10, exp, exp2.
No functional change (and no FE change to generate them).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55753 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
electionDAGBuild.cpp
argetLowering.cpp
|
| 92b33088469bee2ea489b79574d26cd3847220ac |
04-Sep-2008 |
Dale Johannesen <dalej@apple.com> |
Add intrinsics for log, log2, log10, exp, exp2.
No functional change (and no FE change to generate them).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55753 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
electionDAGBuild.cpp
argetLowering.cpp
|
| 104e4ce1629ea84736691bd1ee7867bdf90e8a2e |
04-Sep-2008 |
Dan Gohman <gohman@apple.com> |
Do trivial local CSE for constants and other non-Instruction values
in FastISel.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55748 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
|
| 5ac35427d2e43a9f5eea212591e26cf2fa895eae |
04-Sep-2008 |
Dan Gohman <gohman@apple.com> |
Do trivial local CSE for constants and other non-Instruction values
in FastISel.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55748 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
|
| 2a7c671e2eb93e316f1214b1f5ea0f2dfa072943 |
04-Sep-2008 |
Dan Gohman <gohman@apple.com> |
Put RegsForValue in the llvm namespace to avoid warnings about
classes in the llvm namespace having members with types from
anonymous namespaces.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55747 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuild.cpp
|
| 92f8b6cb0c99820939cc800a0bef47b8a535a7cc |
04-Sep-2008 |
Dan Gohman <gohman@apple.com> |
Put RegsForValue in the llvm namespace to avoid warnings about
classes in the llvm namespace having members with types from
anonymous namespaces.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55747 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuild.cpp
|
| 3df24e667f04a7003342b534310919abc9c87418 |
04-Sep-2008 |
Dan Gohman <gohman@apple.com> |
Create HandlePHINodesInSuccessorBlocksFast, a version of
HandlePHINodesInSuccessorBlocks that works FastISel-style. This
allows PHI nodes to be updated correctly while using FastISel.
This also involves some code reorganization; ValueMap and
MBBMap are now members of the FastISel class, so they needn't
be passed around explicitly anymore. Also, SelectInstructions
is changed to SelectInstruction, and only does one instruction
at a time.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55746 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
electionDAGBuild.cpp
electionDAGISel.cpp
|
| ca4857aa26b7ad55a975d4053ce1cd400b6bf4a0 |
04-Sep-2008 |
Dan Gohman <gohman@apple.com> |
Create HandlePHINodesInSuccessorBlocksFast, a version of
HandlePHINodesInSuccessorBlocks that works FastISel-style. This
allows PHI nodes to be updated correctly while using FastISel.
This also involves some code reorganization; ValueMap and
MBBMap are now members of the FastISel class, so they needn't
be passed around explicitly anymore. Also, SelectInstructions
is changed to SelectInstruction, and only does one instruction
at a time.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55746 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
electionDAGBuild.cpp
electionDAGISel.cpp
|
| d5d81a457b5ff758b3fcc527af38827490bc68a5 |
03-Sep-2008 |
Owen Anderson <resistor@mac.com> |
Oops, I accidentally broke the fallback case with my last commit.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55704 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
|
| 9ecc0c73c371ddf95184b9b75a66d92c17160ad7 |
03-Sep-2008 |
Owen Anderson <resistor@mac.com> |
Oops, I accidentally broke the fallback case with my last commit.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55704 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
|
| 99aaf108cdf4ac5b972757abbf4e0a3d547804b1 |
03-Sep-2008 |
Owen Anderson <resistor@mac.com> |
Fix an issue where we were reusing materializations of constants in blocks not dominated by the materialization. This is
the simple fix, materializing the constant before every use. It might be better to either track domination of uses or
to materialize all constants and the beginning of the function and let remat sort when to do materialization at uses.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55703 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
|
| 95a87fdc33d8f0dff5ffb35839c4369619db0577 |
03-Sep-2008 |
Owen Anderson <resistor@mac.com> |
Fix an issue where we were reusing materializations of constants in blocks not dominated by the materialization. This is
the simple fix, materializing the constant before every use. It might be better to either track domination of uses or
to materialize all constants and the beginning of the function and let remat sort when to do materialization at uses.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55703 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
|
| f0cbcd48804961b05359ee41859bbd7774f41fe0 |
03-Sep-2008 |
Dan Gohman <gohman@apple.com> |
Split the SelectionDAG-building code, including the FunctionLoweringInfo
and SelectionDAGLowering classes, out of SelectionDAGISel.cpp and put
it in a separate file, SelectionDAGBuild.cpp.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55701 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuild.cpp
electionDAGBuild.h
electionDAGISel.cpp
|
| 13aeef9ec42c49c4d7f6786b86b3fa23e547860c |
03-Sep-2008 |
Dan Gohman <gohman@apple.com> |
Split the SelectionDAG-building code, including the FunctionLoweringInfo
and SelectionDAGLowering classes, out of SelectionDAGISel.cpp and put
it in a separate file, SelectionDAGBuild.cpp.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55701 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGBuild.cpp
electionDAGBuild.h
electionDAGISel.cpp
|
| 94b8d7ea63c5b533c299226677a0973a39f98e91 |
03-Sep-2008 |
Dan Gohman <gohman@apple.com> |
Separate MachineInstr-emitting routines from actual scheduling
routines and move them into a separate file, ScheduleDAGEmit.cpp.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55699 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAG.cpp
cheduleDAGEmit.cpp
|
| c38611548b659f379def8161173e73025d3e648a |
03-Sep-2008 |
Dan Gohman <gohman@apple.com> |
Separate MachineInstr-emitting routines from actual scheduling
routines and move them into a separate file, ScheduleDAGEmit.cpp.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55699 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAG.cpp
cheduleDAGEmit.cpp
|
| f45261fb9b2f429c4f1f5a0270e2f5e127e39467 |
03-Sep-2008 |
Evan Cheng <evan.cheng@apple.com> |
If TargetSelectInstruction returns true, move to next instruction.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55692 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 088cb64f204b806453c5aa7fd9697f523257a89f |
03-Sep-2008 |
Evan Cheng <evan.cheng@apple.com> |
If TargetSelectInstruction returns true, move to next instruction.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55692 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 36fd941fc029c6ea50ed08d26a2bfe4932b9789c |
02-Sep-2008 |
Evan Cheng <evan.cheng@apple.com> |
80 col violations.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55668 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
|
| d00ed04e9c5e13055f4375af165af2ee4e58735e |
02-Sep-2008 |
Evan Cheng <evan.cheng@apple.com> |
80 col violations.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55668 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
|
| d2ff647964ed242e67ac12f7d21a58c864309d95 |
02-Sep-2008 |
Dan Gohman <gohman@apple.com> |
Ensure that HandlePHINodesInSuccessorBlocks is run for all blocks,
even in FastISel mode in the case where FastISel successfully
selects all the instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55641 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 61a1f1ceb9f0fd2cb796eba50663c79cbdda63f5 |
02-Sep-2008 |
Dan Gohman <gohman@apple.com> |
Ensure that HandlePHINodesInSuccessorBlocks is run for all blocks,
even in FastISel mode in the case where FastISel successfully
selects all the instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55641 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| ed63214fcbebcaf989dbc6a5bf7c3b6df67732f5 |
01-Sep-2008 |
Gabor Greif <ggreif@gmail.com> |
Provide two overloads of AnalyzeNewNode.
The first can update the SDNode in an SDValue
while the second is called with SDNode* and
returns a possibly updated SDNode*.
This patch has no intended functional impact,
but helps eliminating ugly temporary SDValues.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55608 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeTypes.cpp
egalizeTypes.h
|
| 6b54ff33bcf5bdcc966f2f560c8f1daa44e263ba |
01-Sep-2008 |
Gabor Greif <ggreif@gmail.com> |
Provide two overloads of AnalyzeNewNode.
The first can update the SDNode in an SDValue
while the second is called with SDNode* and
returns a possibly updated SDNode*.
This patch has no intended functional impact,
but helps eliminating ugly temporary SDValues.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55608 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeTypes.cpp
egalizeTypes.h
|
| 1189f3ac3b84063f1569eddeacfcb3b79bc25c69 |
01-Sep-2008 |
Duncan Sands <baldrick@free.fr> |
Even though no caller actually uses the new value
(what matters is that it is added to the worklist),
it seems more logical to return it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55606 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeTypes.h
|
| f6789d1b11e3e53af5a32cfe4e72c758df26926d |
01-Sep-2008 |
Duncan Sands <baldrick@free.fr> |
Even though no caller actually uses the new value
(what matters is that it is added to the worklist),
it seems more logical to return it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55606 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeTypes.h
|
| 2692d5957482184e767503d9c0ae703163b338e3 |
31-Aug-2008 |
Bill Wendling <isanbard@gmail.com> |
Another situation where ROTR is cheaper than ROTL.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55577 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 89f05f5f1df2c1fbc3c6590d545227c11a589c0d |
31-Aug-2008 |
Bill Wendling <isanbard@gmail.com> |
Another situation where ROTR is cheaper than ROTL.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55577 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 353dea2f0aca7ddbdad242b9dabb065337744d98 |
31-Aug-2008 |
Bill Wendling <isanbard@gmail.com> |
For this pattern, ROTR is the cheaper option.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55576 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| a70293dc8277d8e96fe80efc059334025f4d7857 |
31-Aug-2008 |
Bill Wendling <isanbard@gmail.com> |
For this pattern, ROTR is the cheaper option.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55576 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| c5cbda12e933591ce76135aa776c44193255b2e9 |
31-Aug-2008 |
Bill Wendling <isanbard@gmail.com> |
- Fix comment so that it describes how the code really works:
// fold (or (shl x, (*ext y)), (srl x, (*ext (sub 32, y)))) ->
// (rotl x, y)
// fold (or (shl x, (*ext y)), (srl x, (*ext (sub 32, y)))) ->
// (rotr x, (sub 32, y))
Example: (x == 0xDEADBEEF and y == 4)
(x << 4) | (x >> 28)
=> 0xEADBEEF0 | 0x0000000D
=> 0xEADBEEFD
(rotl x, 4)
=> 0xEADBEEFD
(rotr x, 28)
=> 0xEADBEEFD
- Fix comment and code for second version. It wasn't using the rot* propertly.
// fold (or (shl x, (*ext (sub 32, y))), (srl x, (*ext r))) ->
// (rotr x, y)
// fold (or (shl x, (*ext (sub 32, y))), (srl x, (*ext r))) ->
// (rotl x, (sub 32, y))
(x << 28) | (x >> 4)
=> 0xD0000000 | 0x0DEADBEE
=> 0xDDEADBEE
(rotl x, 4)
=> 0xEADBEEFD
(rotr x, 28)
=> (0xEADBEEFD)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55575 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| f3dd73946866550a805bc8dd9b797073135ab3ca |
31-Aug-2008 |
Bill Wendling <isanbard@gmail.com> |
- Fix comment so that it describes how the code really works:
// fold (or (shl x, (*ext y)), (srl x, (*ext (sub 32, y)))) ->
// (rotl x, y)
// fold (or (shl x, (*ext y)), (srl x, (*ext (sub 32, y)))) ->
// (rotr x, (sub 32, y))
Example: (x == 0xDEADBEEF and y == 4)
(x << 4) | (x >> 28)
=> 0xEADBEEF0 | 0x0000000D
=> 0xEADBEEFD
(rotl x, 4)
=> 0xEADBEEFD
(rotr x, 28)
=> 0xEADBEEFD
- Fix comment and code for second version. It wasn't using the rot* propertly.
// fold (or (shl x, (*ext (sub 32, y))), (srl x, (*ext r))) ->
// (rotr x, y)
// fold (or (shl x, (*ext (sub 32, y))), (srl x, (*ext r))) ->
// (rotl x, (sub 32, y))
(x << 28) | (x >> 4)
=> 0xD0000000 | 0x0DEADBEE
=> 0xDDEADBEE
(rotl x, 4)
=> 0xEADBEEFD
(rotr x, 28)
=> (0xEADBEEFD)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55575 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| dc71563794a6a30f66278af5a9cdccde36b1797e |
31-Aug-2008 |
Gabor Greif <ggreif@gmail.com> |
typo
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55574 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 8b2235cf951f5004fd1f097ab228d226540a1237 |
31-Aug-2008 |
Gabor Greif <ggreif@gmail.com> |
typo
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55574 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 12632d2222d983a1db197929df0f66393a239316 |
30-Aug-2008 |
Gabor Greif <ggreif@gmail.com> |
fix some 80-col violations
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55571 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| b420b9d7c400aff8027b7cdfc818c9a72b00315d |
30-Aug-2008 |
Gabor Greif <ggreif@gmail.com> |
fix some 80-col violations
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55571 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| eb9f89287e8ff3daeb9191ecd0cc3241a4f4137d |
30-Aug-2008 |
Evan Cheng <evan.cheng@apple.com> |
Transform (x << (y&31)) -> (x << y). This takes advantage of the fact x86 shift instructions 2nd operand (shift count) is limited to 0 to 31 (or 63 in the x86-64 case).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55558 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 76a64c7811554a1f8ff4a8a9b8b9c741d6fc87cc |
30-Aug-2008 |
Evan Cheng <evan.cheng@apple.com> |
Transform (x << (y&31)) -> (x << y). This takes advantage of the fact x86 shift instructions 2nd operand (shift count) is limited to 0 to 31 (or 63 in the x86-64 case).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55558 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| cc54e76cc67bbc9badc024ab29053602769bd255 |
30-Aug-2008 |
Owen Anderson <resistor@mac.com> |
Fix an issue where a use might be selected before a def, and then we didn't respect the pre-chosen vreg
assignment when selecting the def. This is the naive solution to the problem: insert a copy to the pre-chosen
vreg. Other solutions might be preferable, such as:
1) Passing the dest reg into FastEmit_. However, this would require the higher level code to know about reg classes, which they don't currently.
2) Selecting blocks in reverse postorder. This has some compile time cost for computing the order, and we'd need to measure its impact.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55555 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
|
| 6420503b3ee467796fa9e120627a8af2eadc34d4 |
30-Aug-2008 |
Owen Anderson <resistor@mac.com> |
Fix an issue where a use might be selected before a def, and then we didn't respect the pre-chosen vreg
assignment when selecting the def. This is the naive solution to the problem: insert a copy to the pre-chosen
vreg. Other solutions might be preferable, such as:
1) Passing the dest reg into FastEmit_. However, this would require the higher level code to know about reg classes, which they don't currently.
2) Selecting blocks in reverse postorder. This has some compile time cost for computing the order, and we'd need to measure its impact.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55555 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
|
| 4529966d996bfb657a977c67b9bb777e5b244e0f |
30-Aug-2008 |
Evan Cheng <evan.cheng@apple.com> |
Fix 80 col. violations.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55551 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| c296a30ea7510c9ec388b1cf8b0498dbba92710d |
30-Aug-2008 |
Evan Cheng <evan.cheng@apple.com> |
Fix 80 col. violations.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55551 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 17a568b6682874f7a5dfe92728d372421de3e645 |
30-Aug-2008 |
Evan Cheng <evan.cheng@apple.com> |
Back out 55498. It broken Apple style bootstrapping.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55549 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 56550ae09a9d0151533e3ca9ab370a4eb0ed1b15 |
30-Aug-2008 |
Evan Cheng <evan.cheng@apple.com> |
Back out 55498. It broken Apple style bootstrapping.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55549 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 99b218218c0ca3ebfdd568ddfeafa07842e9d69d |
29-Aug-2008 |
Dan Gohman <gohman@apple.com> |
Add a target callback for FastISel.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55512 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| cb9b4d32a9754f2a33c595bc0ddf758093caca9a |
29-Aug-2008 |
Dan Gohman <gohman@apple.com> |
Add a target callback for FastISel.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55512 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| ba36cb5242eb02b12b277f82b9efe497f7da4d7f |
28-Aug-2008 |
Gabor Greif <ggreif@gmail.com> |
erect abstraction boundaries for accessing SDValue members, rename Val -> Node to reflect semantics
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55504 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
egalizeDAG.cpp
egalizeFloatTypes.cpp
egalizeIntegerTypes.cpp
egalizeTypes.cpp
egalizeTypes.h
egalizeTypesGeneric.cpp
egalizeVectorTypes.cpp
cheduleDAG.cpp
cheduleDAGRRList.cpp
electionDAG.cpp
electionDAGISel.cpp
electionDAGPrinter.cpp
argetLowering.cpp
|
| 1c80d116c6a34e02059593964233f2e641bdbc5b |
28-Aug-2008 |
Gabor Greif <ggreif@gmail.com> |
erect abstraction boundaries for accessing SDValue members, rename Val -> Node to reflect semantics
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55504 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
egalizeDAG.cpp
egalizeFloatTypes.cpp
egalizeIntegerTypes.cpp
egalizeTypes.cpp
egalizeTypes.h
egalizeTypesGeneric.cpp
egalizeVectorTypes.cpp
cheduleDAG.cpp
cheduleDAGRRList.cpp
electionDAG.cpp
electionDAGISel.cpp
electionDAGPrinter.cpp
argetLowering.cpp
|
| 205d92589bc8c59d4bba9ddf89e0eb3c4d548cda |
28-Aug-2008 |
Dan Gohman <gohman@apple.com> |
Implement null and undef values for FastISel.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55500 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
|
| 41e4a503114e3123167e76a456c90c310d90f8d1 |
28-Aug-2008 |
Dan Gohman <gohman@apple.com> |
Implement null and undef values for FastISel.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55500 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
|
| a3f8b7a4ce8ab5c46d52077162851105a390a6ac |
28-Aug-2008 |
Dan Gohman <gohman@apple.com> |
Optimize DAGCombiner's worklist processing. Previously it started
its work by putting all nodes in the worklist, requiring a big
dynamic allocation. Now, DAGCombiner just iterates over the AllNodes
list and maintains a worklist for nodes that are newly created or
need to be revisited. This allows the worklist to stay small in most
cases, so it can be a SmallVector.
This has the side effect of making DAGCombine not miss a folding
opportunity in alloca-align-rounding.ll.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55498 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| ef709393e46697d18fbbedc9fe5c5aa279b15ae2 |
28-Aug-2008 |
Dan Gohman <gohman@apple.com> |
Optimize DAGCombiner's worklist processing. Previously it started
its work by putting all nodes in the worklist, requiring a big
dynamic allocation. Now, DAGCombiner just iterates over the AllNodes
list and maintains a worklist for nodes that are newly created or
need to be revisited. This allows the worklist to stay small in most
cases, so it can be a SmallVector.
This has the side effect of making DAGCombine not miss a folding
opportunity in alloca-align-rounding.ll.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55498 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 9ffd8b5720d606eb7da702c97ed6491697867949 |
28-Aug-2008 |
Dan Gohman <gohman@apple.com> |
Move CaseBlock, JumpTable, and BitTestBlock to be members of
SelectionDAGLowering instead of being in an anonymous namespace.
This fixes warnings about SelectionDAGLowering having fields
using anonymous namespaces.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55497 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 2e0fa9da8574ffc5da044f2c027cc46da9855440 |
28-Aug-2008 |
Dan Gohman <gohman@apple.com> |
Move CaseBlock, JumpTable, and BitTestBlock to be members of
SelectionDAGLowering instead of being in an anonymous namespace.
This fixes warnings about SelectionDAGLowering having fields
using anonymous namespaces.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55497 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 5edd361497f4c78a20fcbb75c6e7e94ff8046ed1 |
28-Aug-2008 |
Dan Gohman <gohman@apple.com> |
Fix a FastISel bug where the instructions from lowering the arguments
were being emitted after the first instructions of the entry block.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55496 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 2c44e9a51341abb17ff11f516a46f026024e03b6 |
28-Aug-2008 |
Dan Gohman <gohman@apple.com> |
Fix a FastISel bug where the instructions from lowering the arguments
were being emitted after the first instructions of the entry block.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55496 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 91ee5454ae8f15de769a7316b4c36734b6103e45 |
28-Aug-2008 |
Rafael Espindola <rafael.espindola@gmail.com> |
Reduce the size of the Parts vector.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55483 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| ccd63ce576e408a08d9afb66a87109e2685daeb0 |
28-Aug-2008 |
Rafael Espindola <rafael.espindola@gmail.com> |
Reduce the size of the Parts vector.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55483 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| c0bb68b98267c75168e6596d20610a8a8b3c0635 |
28-Aug-2008 |
Owen Anderson <resistor@mac.com> |
Hook up support for fast-isel of trunc instructions, using the newly working support for EXTRACT_SUBREG.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55482 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
|
| 75645a085bef73d6bdc7ebaa4ebecf627961d2e1 |
28-Aug-2008 |
Owen Anderson <resistor@mac.com> |
Hook up support for fast-isel of trunc instructions, using the newly working support for EXTRACT_SUBREG.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55482 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
|
| 40a468f24909792f000e3ccc1dda7a27b9c34b69 |
28-Aug-2008 |
Owen Anderson <resistor@mac.com> |
FastEmitInst_extractsubreg doesn't need to be passed the register class. It can get it from MachineRegisterInfo instead.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55476 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
|
| 8b6bf04830a9593fa8ce80f38299bac6c96e2f25 |
28-Aug-2008 |
Owen Anderson <resistor@mac.com> |
FastEmitInst_extractsubreg doesn't need to be passed the register class. It can get it from MachineRegisterInfo instead.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55476 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
|
| c748ffa4e4408545b6adf102bfba52001f8a0a92 |
28-Aug-2008 |
Rafael Espindola <rafael.espindola@gmail.com> |
Correctly resize the Parts array.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55471 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 5c9e03a46f17cde2ccab566713ed212bf7343991 |
28-Aug-2008 |
Rafael Espindola <rafael.espindola@gmail.com> |
Correctly resize the Parts array.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55471 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| e00a8a2a2e11a37fd1ddf2504bd22d225d0994d0 |
28-Aug-2008 |
Dale Johannesen <dalej@apple.com> |
Split the ATOMIC NodeType's to include the size, e.g.
ATOMIC_LOAD_ADD_{8,16,32,64} instead of ATOMIC_LOAD_ADD.
Increased the Hardcoded Constant OpActionsCapacity to match.
Large but boring; no functional change.
This is to support partial-word atomics on ppc; i8 is
not a valid type there, so by the time we get to lowering, the
ATOMIC_LOAD nodes looks the same whether the type was i8 or i32.
The information can be added to the AtomicSDNode, but that is the
largest SDNode; I don't fully understand the SDNode allocation,
but it is sensitive to the largest node size, so increasing
that must be bad. This is the alternative.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55457 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
electionDAG.cpp
electionDAGISel.cpp
|
| bc18766ddb484864750c40e1b2763ad81120a6ac |
28-Aug-2008 |
Dale Johannesen <dalej@apple.com> |
Split the ATOMIC NodeType's to include the size, e.g.
ATOMIC_LOAD_ADD_{8,16,32,64} instead of ATOMIC_LOAD_ADD.
Increased the Hardcoded Constant OpActionsCapacity to match.
Large but boring; no functional change.
This is to support partial-word atomics on ppc; i8 is
not a valid type there, so by the time we get to lowering, the
ATOMIC_LOAD nodes looks the same whether the type was i8 or i32.
The information can be added to the AtomicSDNode, but that is the
largest SDNode; I don't fully understand the SDNode allocation,
but it is sensitive to the largest node size, so increasing
that must be bad. This is the alternative.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55457 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
electionDAG.cpp
electionDAGISel.cpp
|
| 7c3234c6be0dc0bdf4b5d6f848cd728a77f349d7 |
28-Aug-2008 |
Dan Gohman <gohman@apple.com> |
Reorganize the lifetimes of the major objects SelectionDAGISel
works with.
SelectionDAG, FunctionLoweringInfo, and SelectionDAGLowering
objects now get created once per SelectionDAGISel instance, and
can be reused across blocks and across functions. Previously,
they were created and destroyed each time they were needed.
This reorganization simplifies the handling of PHI nodes, and
also SwitchCases, JumpTables, and BitTestBlocks. This
simplification has the side effect of fixing a bug in FastISel
where successor PHI nodes weren't being updated correctly.
This is also a step towards making the transition from FastISel
into and out of SelectionDAG faster, and also making
plain SelectionDAG faster on code with lots of little blocks.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55450 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
electionDAGISel.cpp
|
| 0f2d71dbffc79d57fec930214b092cf3ce6b4adc |
28-Aug-2008 |
Dan Gohman <gohman@apple.com> |
Reorganize the lifetimes of the major objects SelectionDAGISel
works with.
SelectionDAG, FunctionLoweringInfo, and SelectionDAGLowering
objects now get created once per SelectionDAGISel instance, and
can be reused across blocks and across functions. Previously,
they were created and destroyed each time they were needed.
This reorganization simplifies the handling of PHI nodes, and
also SwitchCases, JumpTables, and BitTestBlocks. This
simplification has the side effect of fixing a bug in FastISel
where successor PHI nodes weren't being updated correctly.
This is also a step towards making the transition from FastISel
into and out of SelectionDAG faster, and also making
plain SelectionDAG faster on code with lots of little blocks.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55450 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
electionDAGISel.cpp
|
| 8970f00deff00ffce1f35cf00883357e1582daa1 |
28-Aug-2008 |
Owen Anderson <resistor@mac.com> |
Add a helper method that will be used to support EXTRACT_SUBREG for selecting trunc's in fast-isel.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55439 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
|
| 44e9a2f03a75f20f3218a8a8463e9342b9ea113c |
28-Aug-2008 |
Owen Anderson <resistor@mac.com> |
Add a helper method that will be used to support EXTRACT_SUBREG for selecting trunc's in fast-isel.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55439 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
|
| a318dabc0edbcc7a2b54d99b026a093361ec14fc |
27-Aug-2008 |
Dan Gohman <gohman@apple.com> |
Fix FastISel's bitcast code for the case where getRegForValue fails.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55431 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
|
| f2075e053142cf60be2df91c4ea675a913333fe5 |
27-Aug-2008 |
Dan Gohman <gohman@apple.com> |
Fix FastISel's bitcast code for the case where getRegForValue fails.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55431 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
|
| 6336b70541204d1a8377ec1f33748a7260e0a31d |
27-Aug-2008 |
Owen Anderson <resistor@mac.com> |
Use TargetLowering to get the types in fast isel, which handles pointer types correctly for our purposes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55428 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
|
| 1dd5b85daf38ed2ef91dd4b595e2346b6a9580df |
27-Aug-2008 |
Owen Anderson <resistor@mac.com> |
Use TargetLowering to get the types in fast isel, which handles pointer types correctly for our purposes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55428 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
|
| 151ed61a2f9c3482d35a54d502e7cd147f22a21b |
27-Aug-2008 |
Dan Gohman <gohman@apple.com> |
Don't check TLI.getOperationAction. The FastISel way is to
just try to do the action and let the tablegen-generated code
determine if there is target-support for an operation.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55427 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
|
| 5396e7b841b1173c1e011e3a94824058faa30f64 |
27-Aug-2008 |
Dan Gohman <gohman@apple.com> |
Don't check TLI.getOperationAction. The FastISel way is to
just try to do the action and let the tablegen-generated code
determine if there is target-support for an operation.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55427 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
|
| ad368ac2b5f303050e9aaa357e2b806fae38f81b |
27-Aug-2008 |
Dan Gohman <gohman@apple.com> |
Add a new FastISel method, getRegForValue, which takes care of
the details of materializing constants and other values into
registers, and make use of it in several places.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55426 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
|
| 1e0ff77b66490ccb73f7c9e6093bdc3adebe63e1 |
27-Aug-2008 |
Dan Gohman <gohman@apple.com> |
Add a new FastISel method, getRegForValue, which takes care of
the details of materializing constants and other values into
registers, and make use of it in several places.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55426 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
|
| 96a9999d79345fa7bc7e2f2a3f28edef4c69e6b5 |
27-Aug-2008 |
Dan Gohman <gohman@apple.com> |
Add a comment about the current floating-point constant code in FastISel.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55425 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
|
| 3087240477f138ba016975e1205b375e79393122 |
27-Aug-2008 |
Dan Gohman <gohman@apple.com> |
Add a comment about the current floating-point constant code in FastISel.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55425 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
|
| e5a8dc5cc4647cdfd97c71165d4c8f805b4c78a3 |
27-Aug-2008 |
Dan Gohman <gohman@apple.com> |
Optimize ScheduleDAGRRList's topological sort to use one pass instead
of two, and to not need a scratch std::vector. Also, compute the ordering
immediately in the result array, instead of in another scratch std::vector
that is copied to the result array.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55421 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGRRList.cpp
|
| a43387185bc30b5a81a1b6472a8524b80505065f |
27-Aug-2008 |
Dan Gohman <gohman@apple.com> |
Optimize ScheduleDAGRRList's topological sort to use one pass instead
of two, and to not need a scratch std::vector. Also, compute the ordering
immediately in the result array, instead of in another scratch std::vector
that is copied to the result array.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55421 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGRRList.cpp
|
| 3a09d891a47c3f887bb1d9fec0355dffdc205b38 |
27-Aug-2008 |
Dan Gohman <gohman@apple.com> |
Optimize ScheduleDAG's ComputeDepths and ComputeHeights to not need
a scratch std::vector.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55420 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAG.cpp
|
| 4c43d5ab346da71dedc99ccd6c3cd7f87e86498b |
27-Aug-2008 |
Dan Gohman <gohman@apple.com> |
Optimize ScheduleDAG's ComputeDepths and ComputeHeights to not need
a scratch std::vector.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55420 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAG.cpp
|
| 10df0fa73e396bbc93a8940e8b53827390c54d10 |
27-Aug-2008 |
Dan Gohman <gohman@apple.com> |
Basic FastISel support for floating-point constants.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55401 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
|
| 9f28bc56ecd6c87bf4875a6c3ded509ef08b9231 |
27-Aug-2008 |
Dan Gohman <gohman@apple.com> |
Basic FastISel support for floating-point constants.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55401 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
|
| 96c5ea878c96ce123c2c84bafcfb70032b56c9ab |
27-Aug-2008 |
Owen Anderson <resistor@mac.com> |
Fix handling of inttoptr and ptrtoint when unhandled operands are present.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55400 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
|
| 32e6eeefeacc64395e8a616e876d25a8a4dc1060 |
27-Aug-2008 |
Owen Anderson <resistor@mac.com> |
Fix handling of inttoptr and ptrtoint when unhandled operands are present.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55400 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
|
| 9d5b41624003daf259b33fc953aa471049700353 |
27-Aug-2008 |
Owen Anderson <resistor@mac.com> |
Add support for fast isel of inttoptr and ptrtoint in the cases where truncation is not needed.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55399 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
|
| d5d9a90ab4c97946e242ff3072cbff591e8ddb68 |
27-Aug-2008 |
Owen Anderson <resistor@mac.com> |
Add support for fast isel of inttoptr and ptrtoint in the cases where truncation is not needed.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55399 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
|
| d0533c9998d3baf41848ba559a9b2f2c65296d14 |
27-Aug-2008 |
Owen Anderson <resistor@mac.com> |
Factor out a large amoutn of the cast handling code in fast isel into helper methods.
This simultaneously makes the code simpler and adds support for sext as well.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55398 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
|
| c619ed247847c6b4b523f8148a9c5a65cfe5fde8 |
27-Aug-2008 |
Owen Anderson <resistor@mac.com> |
Factor out a large amoutn of the cast handling code in fast isel into helper methods.
This simultaneously makes the code simpler and adds support for sext as well.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55398 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
|
| 97e2568f46f66e67cfa6a61403bddaeba38a252f |
27-Aug-2008 |
Owen Anderson <resistor@mac.com> |
Add support for fast isel of zext.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55396 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
|
| 7c3dd1f2cead8b5e37024f352716b1e7df6d231e |
27-Aug-2008 |
Owen Anderson <resistor@mac.com> |
Add support for fast isel of zext.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55396 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
|
| 99a6cb92d173c142073416c81efe6d3daeb80b49 |
27-Aug-2008 |
Gabor Greif <ggreif@gmail.com> |
disallow direct access to SDValue::ResNo, provide a getter instead
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55394 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
egalizeDAG.cpp
cheduleDAG.cpp
cheduleDAGRRList.cpp
electionDAG.cpp
electionDAGISel.cpp
electionDAGPrinter.cpp
|
| 46bf54702f3d06e26fcc6520ad347540696f263d |
27-Aug-2008 |
Gabor Greif <ggreif@gmail.com> |
disallow direct access to SDValue::ResNo, provide a getter instead
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55394 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
egalizeDAG.cpp
cheduleDAG.cpp
cheduleDAGRRList.cpp
electionDAG.cpp
electionDAGISel.cpp
electionDAGPrinter.cpp
|
| 13269335a55395f2914c81ddb2401524abb4fa5e |
27-Aug-2008 |
Owen Anderson <resistor@mac.com> |
Add support for fptosi of constants in fast isel.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55393 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
|
| 30eba3f242c82aac1d939288be0b1d81b3629692 |
27-Aug-2008 |
Owen Anderson <resistor@mac.com> |
Add support for fptosi of constants in fast isel.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55393 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
|
| 3200d92947cd64f82ca748d65d1e58c3d45f440f |
26-Aug-2008 |
Dan Gohman <gohman@apple.com> |
Optimize SelectionDAG's topological sort to use one pass instead
of two, and to not need a scratch std::vector. Also, use the
SelectionDAG's topological sort in LegalizeDAG instead of having
a separate implementation.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55389 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
electionDAG.cpp
|
| 509fca48f04bb2681773ab3a02eff9226f12aba6 |
26-Aug-2008 |
Dan Gohman <gohman@apple.com> |
Optimize SelectionDAG's topological sort to use one pass instead
of two, and to not need a scratch std::vector. Also, use the
SelectionDAG's topological sort in LegalizeDAG instead of having
a separate implementation.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55389 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
electionDAG.cpp
|
| 763d89343be210eb62a13318ca0cc9321ce46bfb |
26-Aug-2008 |
Dan Gohman <gohman@apple.com> |
Refactor the bitcast code into its own function.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55387 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
|
| 3940b9989ce24b8305ae346ea332f95d3da10701 |
26-Aug-2008 |
Dan Gohman <gohman@apple.com> |
Refactor the bitcast code into its own function.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55387 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
|
| 80bc6e2243b7ae99da42bf2e61df4ebccf8d8821 |
26-Aug-2008 |
Dan Gohman <gohman@apple.com> |
Make FastISel use the correct argument type when casting GEP indices.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55384 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
|
| 8d6f1b29ffbe6d270707ea528e26cc4769b7d17e |
26-Aug-2008 |
Dan Gohman <gohman@apple.com> |
Make FastISel use the correct argument type when casting GEP indices.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55384 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
|
| b71fea248fd7cf9ab2c5737997a3dc5682948dc4 |
26-Aug-2008 |
Dan Gohman <gohman@apple.com> |
Don't select binary instructions with illegal types.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55383 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
|
| 0254ba1639d3ab02a8c5be6466f4eed9efe94cf6 |
26-Aug-2008 |
Dan Gohman <gohman@apple.com> |
Don't select binary instructions with illegal types.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55383 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
|
| a843b8d391de28ca0f532b22ab3e791e1e09c47b |
26-Aug-2008 |
Owen Anderson <resistor@mac.com> |
Add support for fast isel of sitofp, and remove some unnecessary and imprecise legality checks.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55381 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
|
| f579570994627d4a0aa2837019002e62c67b90a3 |
26-Aug-2008 |
Owen Anderson <resistor@mac.com> |
Add support for fast isel of sitofp, and remove some unnecessary and imprecise legality checks.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55381 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
|
| 77a218765ac85b2e0c6ce01bf8a7b07dfe80bead |
26-Aug-2008 |
Owen Anderson <resistor@mac.com> |
Use a combination of copyRegToReg and ISD::BIT_CONVERT when doing fast isel of bitcasts,
allowing it to support the full range of conversions people might ask for in a correct manner.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55378 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
|
| 540611c238df4f1d298bf21c9ed1c68ca153a43c |
26-Aug-2008 |
Owen Anderson <resistor@mac.com> |
Use a combination of copyRegToReg and ISD::BIT_CONVERT when doing fast isel of bitcasts,
allowing it to support the full range of conversions people might ask for in a correct manner.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55378 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
|
| 940f83e772ca2007d62faffc83094bd7e8da6401 |
26-Aug-2008 |
Owen Anderson <resistor@mac.com> |
Make TargetInstrInfo::copyRegToReg return a bool indicating whether the copy requested
was inserted or not. This allows bitcast in fast isel to properly handle the case
where an appropriate reg-to-reg copy is not available.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55375 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
|
| 9fa72d9078dbead41d24462d0588135804999171 |
26-Aug-2008 |
Owen Anderson <resistor@mac.com> |
Make TargetInstrInfo::copyRegToReg return a bool indicating whether the copy requested
was inserted or not. This allows bitcast in fast isel to properly handle the case
where an appropriate reg-to-reg copy is not available.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55375 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
|
| 46aa2f5aab3d39e9cba840ecd8068a6531f8f8a9 |
26-Aug-2008 |
Owen Anderson <resistor@mac.com> |
Add support for fast isel of non-constant fptosi instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55373 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
|
| 90e7b1e55332b1b54264d016126e5acd7c3f4518 |
26-Aug-2008 |
Owen Anderson <resistor@mac.com> |
Add support for fast isel of non-constant fptosi instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55373 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
|
| 09c5d8baa2c068fead50630ec2432a5dd1e7b904 |
26-Aug-2008 |
Chris Lattner <sabre@nondot.org> |
typo fix.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55355 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 5fedcd4d0cd4188dfcbd3c5513d0c3f5d8013798 |
26-Aug-2008 |
Chris Lattner <sabre@nondot.org> |
typo fix.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55355 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 1146728bfaeb471f675b805ceb27a08d28bbf468 |
26-Aug-2008 |
Dan Gohman <gohman@apple.com> |
Actually recycle SDNode allocations. SelectionDAG is using
RecyclingAllocator, but this change is needed for the nodes
to actually be recycled. This cuts SelectionDAG's memory
usage high-water-mark in half in some cases.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55351 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 0b08b15eca3e5893384df86a140260d68d2205f5 |
26-Aug-2008 |
Dan Gohman <gohman@apple.com> |
Actually recycle SDNode allocations. SelectionDAG is using
RecyclingAllocator, but this change is needed for the nodes
to actually be recycled. This cuts SelectionDAG's memory
usage high-water-mark in half in some cases.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55351 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 0f84e4e31009eecf2dfcbe6113b65d0919f30254 |
26-Aug-2008 |
Owen Anderson <resistor@mac.com> |
Add a RetVT parameter to emitted FastISel methods, so that we will be able to pass the desired return
type down. This is not currently used.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55345 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
|
| 3ac15da88f1a81f8a2adc9b20b7e1f154d995395 |
26-Aug-2008 |
Owen Anderson <resistor@mac.com> |
Add a RetVT parameter to emitted FastISel methods, so that we will be able to pass the desired return
type down. This is not currently used.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55345 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
|
| b41aec54767a825ac54c8822e787700bb08a3460 |
26-Aug-2008 |
Evan Cheng <evan.cheng@apple.com> |
Unbreak build.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55342 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
|
| 993d00682c245c5d33d03fecd71d2c774df2e9d3 |
26-Aug-2008 |
Evan Cheng <evan.cheng@apple.com> |
Unbreak build.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55342 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
|
| d894f1d274515db527962b6db2d9983827fdcbd6 |
25-Aug-2008 |
Owen Anderson <resistor@mac.com> |
Expand bitcast support in fast isel to support bitcasts of non-constant values by emitting reg-reg copies.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55340 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
|
| 0658ade677cfe44b6a154094a8a32ac390b329e1 |
25-Aug-2008 |
Owen Anderson <resistor@mac.com> |
Expand bitcast support in fast isel to support bitcasts of non-constant values by emitting reg-reg copies.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55340 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
|
| 6d0c25ec3a7ca822e68f73a4481eee43eb5c9485 |
25-Aug-2008 |
Owen Anderson <resistor@mac.com> |
Add support for fast isel of (integer) immediate materialization pattens, and use them to support
bitcast of constants in fast isel.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55325 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
|
| 4333727d1bd840bbd80eda307c94a2c4aa57d42b |
25-Aug-2008 |
Owen Anderson <resistor@mac.com> |
Add support for fast isel of (integer) immediate materialization pattens, and use them to support
bitcast of constants in fast isel.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55325 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
|
| c56711c212849fe68b8d00597efda6fcb28f891e |
24-Aug-2008 |
Chris Lattner <sabre@nondot.org> |
make sure to flush the stream after dumping, to make sure it goes out immediately.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55288 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| b787620a3a34e277e1343651ff4d1bb95e3f93e0 |
24-Aug-2008 |
Chris Lattner <sabre@nondot.org> |
make sure to flush the stream after dumping, to make sure it goes out immediately.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55288 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 62ca32540f950d500227f1863b95cd08ad28099e |
24-Aug-2008 |
Chris Lattner <sabre@nondot.org> |
get MachineConstantPool off std::ostream, onto raw_ostream. It would be
really nice if someone converted MachineFunction::print to raw_ostream.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55268 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGPrinter.cpp
|
| 491f783caa6d53724a49d4746428a0313facbb86 |
24-Aug-2008 |
Chris Lattner <sabre@nondot.org> |
get MachineConstantPool off std::ostream, onto raw_ostream. It would be
really nice if someone converted MachineFunction::print to raw_ostream.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55268 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGPrinter.cpp
|
| 944fac71e082cc2664cc71b4d3f6c72bab7143fb |
24-Aug-2008 |
Chris Lattner <sabre@nondot.org> |
Switch the asmprinter (.ll) and all the stuff it requires over to
use raw_ostream instead of std::ostream. Among other goodness,
this speeds up llvm-dis of kc++ with a release build from 0.85s
to 0.49s (88% faster).
Other interesting changes:
1) This makes Value::print be non-virtual.
2) AP[S]Int and ConstantRange can no longer print to ostream directly,
use raw_ostream instead.
3) This fixes a bug in raw_os_ostream where it didn't flush itself
when destroyed.
4) This adds a new SDNode::print method, instead of only allowing "dump".
A lot of APIs have both std::ostream and raw_ostream versions, it would
be useful to go through and systematically anihilate the std::ostream
versions.
This passes dejagnu, but there may be minor fallout, plz let me know if
so and I'll fix it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55263 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 1fefaacfde9c8c1e88d97758b0b3a6aa587698c8 |
24-Aug-2008 |
Chris Lattner <sabre@nondot.org> |
Switch the asmprinter (.ll) and all the stuff it requires over to
use raw_ostream instead of std::ostream. Among other goodness,
this speeds up llvm-dis of kc++ with a release build from 0.85s
to 0.49s (88% faster).
Other interesting changes:
1) This makes Value::print be non-virtual.
2) AP[S]Int and ConstantRange can no longer print to ostream directly,
use raw_ostream instead.
3) This fixes a bug in raw_os_ostream where it didn't flush itself
when destroyed.
4) This adds a new SDNode::print method, instead of only allowing "dump".
A lot of APIs have both std::ostream and raw_ostream versions, it would
be useful to go through and systematically anihilate the std::ostream
versions.
This passes dejagnu, but there may be minor fallout, plz let me know if
so and I'll fix it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55263 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 6ecf50908c78aae0feff1c378fbb75dcf013ed21 |
23-Aug-2008 |
Dan Gohman <gohman@apple.com> |
Make MBBMap a DenseMap instead of a std::map.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55220 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
electionDAGISel.cpp
|
| 42e10a8a7f9ad7590bd88473b41ebaab9a5f98df |
23-Aug-2008 |
Dan Gohman <gohman@apple.com> |
Make MBBMap a DenseMap instead of a std::map.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55220 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
electionDAGISel.cpp
|
| f350b277f32d7d47f86c0e54f4aec4d470500618 |
23-Aug-2008 |
Dan Gohman <gohman@apple.com> |
Move the point at which FastISel taps into the SelectionDAGISel
process up to a higher level. This allows FastISel to leverage
more of SelectionDAGISel's infastructure, such as updating Machine
PHI nodes.
Also, implement transitioning from SDISel back to FastISel in
the middle of a block, so it's now possible to go back and
forth. This allows FastISel to hand individual CallInsts and other
complicated things off to SDISel to handle, while handling the rest
of the block itself.
To help support this, reorganize the SelectionDAG class so that it
is allocated once and reused throughout a function, instead of
being completely reallocated for each block.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55219 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
electionDAGISel.cpp
|
| 14a6644251df9ccb261bb4e3ab386b738df36633 |
23-Aug-2008 |
Dan Gohman <gohman@apple.com> |
Move the point at which FastISel taps into the SelectionDAGISel
process up to a higher level. This allows FastISel to leverage
more of SelectionDAGISel's infastructure, such as updating Machine
PHI nodes.
Also, implement transitioning from SDISel back to FastISel in
the middle of a block, so it's now possible to go back and
forth. This allows FastISel to hand individual CallInsts and other
complicated things off to SDISel to handle, while handling the rest
of the block itself.
To help support this, reorganize the SelectionDAG class so that it
is allocated once and reused throughout a function, instead of
being completely reallocated for each block.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55219 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
electionDAGISel.cpp
|
| 6679906d9724868bf2198e04952ba42f31d7b7fe |
23-Aug-2008 |
Dan Gohman <gohman@apple.com> |
Avoid creating shift-by-zero SDNodes in the common case of
i8* getelementptr. DAGCombine eliminates these, but this is
a fairly common case.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55214 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| c8d0a961f0669d8d727e33fb75e97a88483de489 |
23-Aug-2008 |
Dan Gohman <gohman@apple.com> |
Avoid creating shift-by-zero SDNodes in the common case of
i8* getelementptr. DAGCombine eliminates these, but this is
a fairly common case.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55214 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 6f17966a804f53518aa06fd0b5f035d5b1a51589 |
23-Aug-2008 |
Dan Gohman <gohman@apple.com> |
Move SelectionDAG's constructor out of line.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55212 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 03405562a8d67da8a86c8864c8a2914482abb7ad |
23-Aug-2008 |
Dan Gohman <gohman@apple.com> |
Move SelectionDAG's constructor out of line.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55212 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 3c8f36fd03d046ee2a8700c60b5a52887d9f07b9 |
22-Aug-2008 |
Dan Gohman <gohman@apple.com> |
Reapply r55191 and r55192.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55205 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
electionDAGISel.cpp
|
| e60171e20f9578a2cfa810fd8e7bc6157153f118 |
22-Aug-2008 |
Dan Gohman <gohman@apple.com> |
Reapply r55191 and r55192.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55205 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
electionDAGISel.cpp
|
| 449416deb6d08bbc0939c51e5e82f55decdff601 |
22-Aug-2008 |
Bill Wendling <isanbard@gmail.com> |
Reverting r55190, r55191, and r55192. They broke the build with this error message:
{standard input}:17:bad register name `%sil'
make[4]: *** [libgcc/./_addvsi3.o] Error 1
make[4]: *** Waiting for unfinished jobs....
{standard input}:23:bad register name `%dil'
{standard input}:28:bad register name `%dil'
make[4]: *** [libgcc/./_addvdi3.o] Error 1
{standard input}:18:bad register name `%sil'
make[4]: *** [libgcc/./_subvsi3.o] Error 1
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55200 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
electionDAGISel.cpp
|
| ce1c5c11e59f565a2fcb5e53b407233c999884f1 |
22-Aug-2008 |
Bill Wendling <isanbard@gmail.com> |
Reverting r55190, r55191, and r55192. They broke the build with this error message:
{standard input}:17:bad register name `%sil'
make[4]: *** [libgcc/./_addvsi3.o] Error 1
make[4]: *** Waiting for unfinished jobs....
{standard input}:23:bad register name `%dil'
{standard input}:28:bad register name `%dil'
make[4]: *** [libgcc/./_addvdi3.o] Error 1
{standard input}:18:bad register name `%sil'
make[4]: *** [libgcc/./_subvsi3.o] Error 1
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55200 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
electionDAGISel.cpp
|
| 5ed3cbb753ac3cd1967d6e2d37b6985655607559 |
22-Aug-2008 |
Dan Gohman <gohman@apple.com> |
Fix the InsertBranch call.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55192 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
|
| fe91948efff85cf0d5fbc60c9434c652694e4f50 |
22-Aug-2008 |
Dan Gohman <gohman@apple.com> |
Fix the InsertBranch call.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55192 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
|
| e0182ec0e473ae2cd23f6451d2539b7ec449f04e |
22-Aug-2008 |
Dan Gohman <gohman@apple.com> |
Support non-fallthrough unconditional branches in FastISel.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55191 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
electionDAGISel.cpp
|
| 2ce6c3194a049b9f59fe79e917c51118e7db2d27 |
22-Aug-2008 |
Dan Gohman <gohman@apple.com> |
Support non-fallthrough unconditional branches in FastISel.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55191 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
electionDAGISel.cpp
|
| 3b7753be2e899cf3a79835a8ff810e869035c87b |
22-Aug-2008 |
Dan Gohman <gohman@apple.com> |
Add FastISel support for PHINodes. Machine PHI nodes
are not yet updated properly, but that's a separate
task.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55187 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
|
| 8727e81a492c121589909b7583152c28b0eac7e3 |
22-Aug-2008 |
Dan Gohman <gohman@apple.com> |
Add FastISel support for PHINodes. Machine PHI nodes
are not yet updated properly, but that's a separate
task.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55187 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
|
| 22bb31103de3337f0bb74c7bee16d1817d4dca14 |
22-Aug-2008 |
Dan Gohman <gohman@apple.com> |
Factor out the predicate check code from DAGISelEmitter.cpp
and use it in FastISelEmitter.cpp, and make FastISel
subtarget aware. Among other things, this lets it work
properly on x86 targets that don't have SSE, where it
successfully selects x87 instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55156 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
|
| e97f1a3c474394928caac5f85f8554eab0471a05 |
22-Aug-2008 |
Dan Gohman <gohman@apple.com> |
Factor out the predicate check code from DAGISelEmitter.cpp
and use it in FastISelEmitter.cpp, and make FastISel
subtarget aware. Among other things, this lets it work
properly on x86 targets that don't have SSE, where it
successfully selects x87 instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55156 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
|
| 2bb1e3eede14dd8a965506465e2876fb1ae765c2 |
21-Aug-2008 |
Dan Gohman <gohman@apple.com> |
Add libcalls for the new rounding opcodes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55133 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
argetLowering.cpp
|
| b215823aff08e6a519995bedf3b27b62ed862e9a |
21-Aug-2008 |
Dan Gohman <gohman@apple.com> |
Add libcalls for the new rounding opcodes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55133 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
argetLowering.cpp
|
| 509e84fa7146175c86dec5ef2167290f294dc89e |
21-Aug-2008 |
Dan Gohman <gohman@apple.com> |
Add libm-oriented ISD opcodes for rounding operations.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55130 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
egalizeVectorTypes.cpp
electionDAG.cpp
|
| c8b20e2ce912e391766ba70e959e8a50ad020db8 |
21-Aug-2008 |
Dan Gohman <gohman@apple.com> |
Add libm-oriented ISD opcodes for rounding operations.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55130 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
egalizeVectorTypes.cpp
electionDAG.cpp
|
| f93cf79505f07cb97597fbc5955462ad7670ca5c |
21-Aug-2008 |
Dan Gohman <gohman@apple.com> |
Have FastISel skip the multiply by 1 for getelementptr on i8*.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55129 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
|
| 747675ca64694761cfeb43aa6c38c5202267a630 |
21-Aug-2008 |
Dan Gohman <gohman@apple.com> |
Have FastISel skip the multiply by 1 for getelementptr on i8*.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55129 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
|
| 7a0e6593d03bd2dd21c3ac7dcf189f1da86b16da |
21-Aug-2008 |
Dan Gohman <gohman@apple.com> |
MVT::getMVT uses iPTR for pointer types, while we need the actual
intptr_t type in this case. FastISel can now select simple
getelementptr instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55125 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
|
| 32db96430d11a6891309b8bc2b03f01f1eabca08 |
21-Aug-2008 |
Dan Gohman <gohman@apple.com> |
MVT::getMVT uses iPTR for pointer types, while we need the actual
intptr_t type in this case. FastISel can now select simple
getelementptr instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55125 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
|
| ca84121596640c99887f909f3b9a3ae830391e64 |
21-Aug-2008 |
Dan Gohman <gohman@apple.com> |
Elements in DeadNodeSet are checked for use_empty() before they
are actually deleted, so it's not necessary to remove re-used
nodes from the set.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55123 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 9b93aed3ded5061f3c45401032f12d152a35c0e2 |
21-Aug-2008 |
Dan Gohman <gohman@apple.com> |
Elements in DeadNodeSet are checked for use_empty() before they
are actually deleted, so it's not necessary to remove re-used
nodes from the set.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55123 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| d5fe57d2f980c6bd1a61450f99c254a76d0f1683 |
21-Aug-2008 |
Dan Gohman <gohman@apple.com> |
Basic fast-isel support for instructions with constant int operands.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55099 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
|
| 895213e6bfa31d95d7dc01b388c859f8b61a2ec1 |
21-Aug-2008 |
Dan Gohman <gohman@apple.com> |
Basic fast-isel support for instructions with constant int operands.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55099 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
|
| 2076aa800e78a2e196eac47cc8413a074a761d8d |
21-Aug-2008 |
Evan Cheng <evan.cheng@apple.com> |
Type of first GEP operand is always the same as the target pointer type.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55097 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
|
| 6e0066a16aaa8b4ca87bd319215d6811c515493a |
21-Aug-2008 |
Evan Cheng <evan.cheng@apple.com> |
Type of first GEP operand is always the same as the target pointer type.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55097 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
|
| fd903944de8ddcbe88902fa1eca9366eb9641201 |
21-Aug-2008 |
Dan Gohman <gohman@apple.com> |
Fix unused variable warnings.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55089 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
|
| c758a96d041534cc31f7ed393cd7d8d7b83f2aa9 |
21-Aug-2008 |
Dan Gohman <gohman@apple.com> |
Fix unused variable warnings.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55089 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
|
| 83785c80968165b30fcdd111ceb2c28d38bcff86 |
21-Aug-2008 |
Evan Cheng <evan.cheng@apple.com> |
First cut, un-optimized (and untested) fast isel lowering of GetElementPtrInst.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55085 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
electionDAGISel.cpp
|
| d486a9d33864b8a5bc62d9bd148dda5a26a494b3 |
21-Aug-2008 |
Evan Cheng <evan.cheng@apple.com> |
First cut, un-optimized (and untested) fast isel lowering of GetElementPtrInst.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55085 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
electionDAGISel.cpp
|
| f990b571c5c4828206b4e14ae7f95d36739b4336 |
20-Aug-2008 |
Dan Gohman <gohman@apple.com> |
Simplify the BuildMI calls even more.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55077 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
|
| 0fb23e3f764d090d0ad1331d38aafd329d94c4d5 |
20-Aug-2008 |
Dan Gohman <gohman@apple.com> |
Simplify the BuildMI calls even more.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55077 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
|
| bb466331e7e50d03497ce40ee344870236fd9c32 |
20-Aug-2008 |
Dan Gohman <gohman@apple.com> |
Simplify FastISel's constructor argument list, make the FastISel
class hold a MachineRegisterInfo member, and make the
MachineBasicBlock be passed in to SelectInstructions rather
than the FastISel constructor.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55076 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
electionDAGISel.cpp
|
| 7bc5a3d9a8791f8c097df5482f8594a4f73a2e5f |
20-Aug-2008 |
Dan Gohman <gohman@apple.com> |
Simplify FastISel's constructor argument list, make the FastISel
class hold a MachineRegisterInfo member, and make the
MachineBasicBlock be passed in to SelectInstructions rather
than the FastISel constructor.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55076 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
electionDAGISel.cpp
|
| 2385852b5b9b82e15eb4502d71b5f916882418d7 |
20-Aug-2008 |
Dan Gohman <gohman@apple.com> |
Dump the instruction that foiled ISel even when -debug is not used.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55075 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 7dfbbd201354b9316d1ab5470fbee878935bac5c |
20-Aug-2008 |
Dan Gohman <gohman@apple.com> |
Dump the instruction that foiled ISel even when -debug is not used.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55075 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| cb34cd7b5e4de914c1177a683f9cbb146ad50634 |
20-Aug-2008 |
Dan Gohman <gohman@apple.com> |
Make more use of the BuildMI API.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55072 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
|
| 00d2fd7f460c14102d6cc148da34bcc102b08e8e |
20-Aug-2008 |
Dan Gohman <gohman@apple.com> |
Make more use of the BuildMI API.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55072 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
|
| 4cbe0662abb2cd6025eff51e19574a48f1a83b97 |
20-Aug-2008 |
Dan Gohman <gohman@apple.com> |
Minor code reorganization.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55071 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
|
| 47d5918f9e6bb7b799dc122bab1eb6a508d1c58d |
20-Aug-2008 |
Dan Gohman <gohman@apple.com> |
Minor code reorganization.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55071 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
|
| 77ad79689d755c49146f534107421cb3d9703fed |
20-Aug-2008 |
Dan Gohman <gohman@apple.com> |
Minor whitespace cleanup.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55070 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
|
| a4c482f2135949a043b0b7ba3cbaa8765c08ff51 |
20-Aug-2008 |
Dan Gohman <gohman@apple.com> |
Minor whitespace cleanup.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55070 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
|
| b7864a9e23be526f4f8cde529a57c8943c61c0c7 |
20-Aug-2008 |
Dan Gohman <gohman@apple.com> |
Fix 80 column violation.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55069 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
|
| 67645aa871e122d44398facfe2af150d9380868e |
20-Aug-2008 |
Dan Gohman <gohman@apple.com> |
Fix 80 column violation.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55069 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
|
| d4207893014f2d36f31fce607405336fc38cd4b7 |
20-Aug-2008 |
Evan Cheng <evan.cheng@apple.com> |
Kill off SimpleBBISel, it's replaced by FastISel.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55067 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
impleBBISel.cpp
impleBBISel.h
|
| ae3c2e4c6e3365c33f0206785a4cd93dc236d6e6 |
20-Aug-2008 |
Evan Cheng <evan.cheng@apple.com> |
Kill off SimpleBBISel, it's replaced by FastISel.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55067 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
impleBBISel.cpp
impleBBISel.h
|
| a267651b7ec4f96e01b31f541d446758bf8da8a9 |
20-Aug-2008 |
Dan Gohman <gohman@apple.com> |
Disable DAGCombine's alignment inference in "fast" codegen mode.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55059 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
electionDAGISel.cpp
|
| ea12c0c272e09ac5a313bc78dcf78438da1c3832 |
20-Aug-2008 |
Dan Gohman <gohman@apple.com> |
Disable DAGCombine's alignment inference in "fast" codegen mode.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55059 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
electionDAGISel.cpp
|
| b8d2f550b84523e8a73198f98e5d450ec3b4fee7 |
20-Aug-2008 |
Dan Gohman <gohman@apple.com> |
Change the FoldingSetNodeID usage for objects which carry
alignment and volatility information, such as loads and
stores, to reduce the number of integer values added to
the FoldingSetNodeID.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55058 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 98beebe566fa5b99ec93de1296613776cec31143 |
20-Aug-2008 |
Dan Gohman <gohman@apple.com> |
Change the FoldingSetNodeID usage for objects which carry
alignment and volatility information, such as loads and
stores, to reduce the number of integer values added to
the FoldingSetNodeID.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55058 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| c53ec498857aa3e6d4fc17bd67dd282dcfc821da |
20-Aug-2008 |
Dan Gohman <gohman@apple.com> |
Use BitVector instead of std::vector<unsigned char>.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55054 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 4c9d123db7057dbaeb83092b8e1f0974e734e116 |
20-Aug-2008 |
Dan Gohman <gohman@apple.com> |
Use BitVector instead of std::vector<unsigned char>.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55054 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 7a30bc4e7c034ecd0a3bcbfb385ac2a129e6583c |
20-Aug-2008 |
Dan Gohman <gohman@apple.com> |
Avoid an empty-if-body warning in release builds.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55050 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeTypes.cpp
|
| f5027d2a556421d1ccdd64736011b89197343e71 |
20-Aug-2008 |
Dan Gohman <gohman@apple.com> |
Avoid an empty-if-body warning in release builds.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55050 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeTypes.cpp
|
| e6798b757acb3a2077c2498e9913fff2f5e4325c |
20-Aug-2008 |
Dan Gohman <gohman@apple.com> |
Fix FastISel to recognize that the last block in the function does
not have a fall-through successor.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55033 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
|
| 65e1f6f7249de7e3d9b008382df095f4e4d9c5bd |
20-Aug-2008 |
Dan Gohman <gohman@apple.com> |
Fix FastISel to recognize that the last block in the function does
not have a fall-through successor.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55033 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
|
| cc8430f742b0f1e567292c8a776e94fc1c930b2a |
20-Aug-2008 |
Dan Gohman <gohman@apple.com> |
Fix a leak in the FastISel code that Chris pointed out.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55031 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| d0e0bb53cf9f0709feb854430a54b5c039016705 |
20-Aug-2008 |
Dan Gohman <gohman@apple.com> |
Fix a leak in the FastISel code that Chris pointed out.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55031 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 3e697cfa979538c77459a3e4237e9bc1ac638761 |
20-Aug-2008 |
Dan Gohman <gohman@apple.com> |
Add support for running SelectionDAG if FastISel fails. This is under
a command-line option, so that the default behavior is an abort, which
is useful for exposing code that isn't supported yet.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55028 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 869a5adbeb67720acdafb0e8c6c2edc52cbcedc4 |
20-Aug-2008 |
Dan Gohman <gohman@apple.com> |
Add support for running SelectionDAG if FastISel fails. This is under
a command-line option, so that the default behavior is an abort, which
is useful for exposing code that isn't supported yet.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55028 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| a7f2dff98e68ed8b2ac32f953768c04f26b52bea |
20-Aug-2008 |
Dan Gohman <gohman@apple.com> |
Fix FastISel to recognize unhandled operands, such as constants
that aren't available as virtual registers (for now).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55026 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
|
| 06b9c5110a9ea5ca98a858a83f7427c52bea1a5e |
20-Aug-2008 |
Dan Gohman <gohman@apple.com> |
Fix FastISel to recognize unhandled operands, such as constants
that aren't available as virtual registers (for now).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55026 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
|
| 8014e865800cc911697a4c0c42f077df9fcc9805 |
20-Aug-2008 |
Dan Gohman <gohman@apple.com> |
Add FastISel support for floating-point operations.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55021 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
|
| c712e8fc1d8b1d522d68ab95b4fe8e9c320dc579 |
20-Aug-2008 |
Dan Gohman <gohman@apple.com> |
Add FastISel support for floating-point operations.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55021 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
|
| bdedd4477331b3b0d28d74658baf05f675f2d195 |
20-Aug-2008 |
Dan Gohman <gohman@apple.com> |
Add FastISel support for several more binary operators.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55020 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
|
| e9ab71e437e58383dd42cc1759c2a224b08370f2 |
20-Aug-2008 |
Dan Gohman <gohman@apple.com> |
Add FastISel support for several more binary operators.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55020 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
|
| 78eca170e9ac5db7fd525f9bbf27090fefcbb646 |
20-Aug-2008 |
Dan Gohman <gohman@apple.com> |
Add code to call FastISel, and a command-line option to enable it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55015 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 91ad312e590695f0a3b407f589903992d555cee1 |
20-Aug-2008 |
Dan Gohman <gohman@apple.com> |
Add code to call FastISel, and a command-line option to enable it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55015 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 6f2766d59744bb3d48867f3151643eac7111e773 |
20-Aug-2008 |
Dan Gohman <gohman@apple.com> |
Support unconditional fall-through branches in FastISel.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55014 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
|
| 0193cd4779ab0f4f0bf5cec1dc8e61039d8263ad |
20-Aug-2008 |
Dan Gohman <gohman@apple.com> |
Support unconditional fall-through branches in FastISel.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55014 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
|
| 8133a52eb5e69078c184eb2339d60d4c82e2a363 |
19-Aug-2008 |
Dan Gohman <gohman@apple.com> |
Use the BuildMI overload that sets up a destination register
instead of the one that doesn't and then adding it manually.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55006 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
|
| 6065377fb50e758e7f189fd2431e47c8cee43cf9 |
19-Aug-2008 |
Dan Gohman <gohman@apple.com> |
Use the BuildMI overload that sets up a destination register
instead of the one that doesn't and then adding it manually.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55006 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
|
| 32155acb8af11fbe21553ef4056c555dcc4a0b99 |
19-Aug-2008 |
Dan Gohman <gohman@apple.com> |
Handle the case where target-specific fastisel code doesn't have
a desired opcode.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55005 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
|
| 54ad58161ba867d2e40e76a37d8852003e09e687 |
19-Aug-2008 |
Dan Gohman <gohman@apple.com> |
Handle the case where target-specific fastisel code doesn't have
a desired opcode.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55005 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
|
| 65a7bd8b8e111c51a51278ab46f1a1c91744441b |
19-Aug-2008 |
Chris Lattner <sabre@nondot.org> |
don't use the result of WriteTypeSymbolic or WriteAsOperand.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54978 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 2e5c7aee6f777d1350944efd4a83a73788889223 |
19-Aug-2008 |
Chris Lattner <sabre@nondot.org> |
don't use the result of WriteTypeSymbolic or WriteAsOperand.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54978 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 5eca075b74d62c621b160aa216b4cd50829a2cc7 |
17-Aug-2008 |
Gordon Henriksen <gordonhenriksen@mac.com> |
Rename some GC classes so that their roll will hopefully be clearer.
In particular, Collector was confusing to implementors. Several
thought that this compile-time class was the place to implement
their runtime GC heap. Of course, it doesn't even exist at runtime.
Specifically, the renames are:
Collector -> GCStrategy
CollectorMetadata -> GCFunctionInfo
CollectorModuleMetadata -> GCModuleInfo
CollectorRegistry -> GCRegistry
Function::getCollector -> getGC (setGC, hasGC, clearGC)
Several accessors and nested types have also been renamed to be
consistent. These changes should be obvious.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54899 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 1aed599aac357d2aaf0df6f4683d59f6455bae0d |
17-Aug-2008 |
Gordon Henriksen <gordonhenriksen@mac.com> |
Rename some GC classes so that their roll will hopefully be clearer.
In particular, Collector was confusing to implementors. Several
thought that this compile-time class was the place to implement
their runtime GC heap. Of course, it doesn't even exist at runtime.
Specifically, the renames are:
Collector -> GCStrategy
CollectorMetadata -> GCFunctionInfo
CollectorModuleMetadata -> GCModuleInfo
CollectorRegistry -> GCRegistry
Function::getCollector -> getGC (setGC, hasGC, clearGC)
Several accessors and nested types have also been renamed to be
consistent. These changes should be obvious.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54899 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 5a29c9eed157af51a8d338b5a225b146881819e8 |
17-Aug-2008 |
Gordon Henriksen <gordonhenriksen@mac.com> |
Factor GC metadata table assembly generation out of Collector in preparation for splitting AsmPrinter into its own library.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54881 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| f194af2c195199ed66d8a1a9df60acf69bb14410 |
17-Aug-2008 |
Gordon Henriksen <gordonhenriksen@mac.com> |
Factor GC metadata table assembly generation out of Collector in preparation for splitting AsmPrinter into its own library.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54881 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| fad86b003a839cef40ec8ce8408322f4913368ca |
17-Aug-2008 |
Chris Lattner <sabre@nondot.org> |
Rework the routines that convert AP[S]Int into a string. Now, instead of
returning an std::string by value, it fills in a SmallString/SmallVector
passed in. This significantly reduces string thrashing in some cases.
More specifically, this:
- Adds an operator<< and a print method for APInt that allows you to
directly send them to an ostream.
- Reimplements APInt::toString to be much simpler and more efficient
algorithmically in addition to not thrashing strings quite as much.
This speeds up llvm-dis on kc++ by 7%, and may also slightly speed up the
asmprinter. This also fixes a bug I introduced into the asmwriter in a
previous patch w.r.t. alias printing.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54873 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 89b36587e1795cf3f9b480e77508448181d2ab3c |
17-Aug-2008 |
Chris Lattner <sabre@nondot.org> |
Rework the routines that convert AP[S]Int into a string. Now, instead of
returning an std::string by value, it fills in a SmallString/SmallVector
passed in. This significantly reduces string thrashing in some cases.
More specifically, this:
- Adds an operator<< and a print method for APInt that allows you to
directly send them to an ostream.
- Reimplements APInt::toString to be much simpler and more efficient
algorithmically in addition to not thrashing strings quite as much.
This speeds up llvm-dis on kc++ by 7%, and may also slightly speed up the
asmprinter. This also fixes a bug I introduced into the asmwriter in a
previous patch w.r.t. alias printing.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54873 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| e285a74f7cf9dd3ccf4fe758576cf83301f8a43e |
14-Aug-2008 |
Dan Gohman <gohman@apple.com> |
Make FastISel's constructor protected, and give it a destructor.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54793 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
|
| eeb6e3049f0a62d2d61b87cc02ec5f7372731ab3 |
14-Aug-2008 |
Dan Gohman <gohman@apple.com> |
Make FastISel's constructor protected, and give it a destructor.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54793 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
|
| 7f8613e5b8398b688080e3c944ab8c11593e1ed0 |
14-Aug-2008 |
Dan Gohman <gohman@apple.com> |
Improve support for vector casts in LLVM IR and CodeGen.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54784 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
egalizeDAG.cpp
egalizeVectorTypes.cpp
electionDAG.cpp
|
| 29c3cef3955599d8b5433a74150531ffbd115837 |
14-Aug-2008 |
Dan Gohman <gohman@apple.com> |
Improve support for vector casts in LLVM IR and CodeGen.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54784 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
egalizeDAG.cpp
egalizeVectorTypes.cpp
electionDAG.cpp
|
| a60832b0187642d01fd726dc766cd62587f6add0 |
14-Aug-2008 |
Dan Gohman <gohman@apple.com> |
Fix a bogus srem rule - a negative value srem'd by a power-of-2
can have a non-negative result; for example, -16%16 is 0. Also,
clarify the related comments. This fixes PR2670.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54767 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 2275be08f6b263b0fd20e0e37109f371ad4974fd |
14-Aug-2008 |
Dan Gohman <gohman@apple.com> |
Fix a bogus srem rule - a negative value srem'd by a power-of-2
can have a non-negative result; for example, -16%16 is 0. Also,
clarify the related comments. This fixes PR2670.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54767 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 6ab6422f25f3deb1041130ff6bb285b22586ab32 |
13-Aug-2008 |
Dan Gohman <gohman@apple.com> |
Allow SelectionDAG to create EXTRACT_VECTOR_ELT nodes with
non-constant indices. Only a few of the peephole checks require
a constant index.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54764 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 101124c57c4e622a92f8a0275b914a7a3b5f26fa |
13-Aug-2008 |
Dan Gohman <gohman@apple.com> |
Allow SelectionDAG to create EXTRACT_VECTOR_ELT nodes with
non-constant indices. Only a few of the peephole checks require
a constant index.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54764 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| b0cf29c5cfff797284b3660dc233e135feb65d9a |
13-Aug-2008 |
Dan Gohman <gohman@apple.com> |
Initial checkin of the new "fast" instruction selection support. See
the comments in FastISelEmitter.cpp for details on what this is.
This is currently experimental and unusable.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54751 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
|
| b75dead2c1c85c970e5ed73096f76a0c00a7f1d5 |
13-Aug-2008 |
Dan Gohman <gohman@apple.com> |
Initial checkin of the new "fast" instruction selection support. See
the comments in FastISelEmitter.cpp for details on what this is.
This is currently experimental and unusable.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54751 91177308-0d34-0410-b5e6-96231b3b80d8
astISel.cpp
|
| 925a7e8ed6522f291b4ae559ccfa56db461016e3 |
13-Aug-2008 |
Dan Gohman <gohman@apple.com> |
Rename SelectionDAGISel's FastISel to Fast, to begin to make
room for the new FastISel instruction selection code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54749 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 04dcf8d17ba3de19b9b517dbcf26b31d5ed8f5a5 |
13-Aug-2008 |
Dan Gohman <gohman@apple.com> |
Rename SelectionDAGISel's FastISel to Fast, to begin to make
room for the new FastISel instruction selection code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54749 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 04f4f4f447806cd92a2fb6f4b66d11f6d5003a82 |
12-Aug-2008 |
Dan Gohman <gohman@apple.com> |
Correct the filename in the top-of-file comment.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54688 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGRRList.cpp
|
| 6be552e80d2b91fcad05e220a0abf35840298b83 |
12-Aug-2008 |
Dan Gohman <gohman@apple.com> |
Correct the filename in the top-of-file comment.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54688 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGRRList.cpp
|
| 8cea8ff34c7fb7a64b6fd247b9db0d097d1ffeea |
11-Aug-2008 |
Dan Gohman <gohman@apple.com> |
Take the FrameOffset into account when computing the alignment
of stack objects. This fixes PR2656.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54646 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| b0a2ff9a86e197df8886c974c988bb1608242aa4 |
11-Aug-2008 |
Dan Gohman <gohman@apple.com> |
Take the FrameOffset into account when computing the alignment
of stack objects. This fixes PR2656.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54646 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 381cb07544a2bc119e39969d7d508a6247773e1c |
08-Aug-2008 |
Evan Cheng <evan.cheng@apple.com> |
Add skeleton of simple basic block instruction selector.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54522 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
impleBBISel.cpp
impleBBISel.h
|
| b11ac88a997a2d07c5400c43a2217225fc896ce2 |
08-Aug-2008 |
Evan Cheng <evan.cheng@apple.com> |
Add skeleton of simple basic block instruction selector.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54522 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
impleBBISel.cpp
impleBBISel.h
|
| e36bfe678df09f46e1eac60b15105c1ccd2c5382 |
07-Aug-2008 |
Bruno Cardoso Lopes <bruno.cardoso@gmail.com> |
Add the remaining fp_round libcalls:
FPROUND_F80_F32, FPROUND_PPCF128_F32,
FPROUND_F80_F64, FPROUND_PPCF128_F64
Support for soften float fp_round operands is added, Mips
needs this to round f64->f32.
Also added support to soften float FABS result, Mips doesn't
support double fabs results while in 'single float only' mode.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54484 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeFloatTypes.cpp
egalizeTypes.h
argetLowering.cpp
|
| b1f11b5b89b0733baeefe1cdbda652674934fe8c |
07-Aug-2008 |
Bruno Cardoso Lopes <bruno.cardoso@gmail.com> |
Add the remaining fp_round libcalls:
FPROUND_F80_F32, FPROUND_PPCF128_F32,
FPROUND_F80_F64, FPROUND_PPCF128_F64
Support for soften float fp_round operands is added, Mips
needs this to round f64->f32.
Also added support to soften float FABS result, Mips doesn't
support double fabs results while in 'single float only' mode.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54484 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeFloatTypes.cpp
egalizeTypes.h
argetLowering.cpp
|
| 39fd6e81b1b0de8b820155dc6a0dae226c109de6 |
07-Aug-2008 |
Evan Cheng <evan.cheng@apple.com> |
Factor code that finalize PHI nodes, jump tables, etc. out of SelectBasicBlock. No functionality changes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54438 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 61828a851435cf03ce60b1f3c66f6b062f063637 |
07-Aug-2008 |
Evan Cheng <evan.cheng@apple.com> |
Factor code that finalize PHI nodes, jump tables, etc. out of SelectBasicBlock. No functionality changes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54438 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 3bc9c6f3e75dba02c1cc647b1f56ee1f39919046 |
05-Aug-2008 |
Owen Anderson <resistor@mac.com> |
Remove the -disable-correct-folding option, which was ugly and is no longer needed.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54361 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 2ddb96c9496a9180501ef2bc03c1203776d9a2a7 |
05-Aug-2008 |
Owen Anderson <resistor@mac.com> |
Remove the -disable-correct-folding option, which was ugly and is no longer needed.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54361 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 430b8a22e2717d3dfb6b4f096bc23c9538fd7959 |
05-Aug-2008 |
Dan Gohman <gohman@apple.com> |
Fix several const-correctness issues, resolving some -Wcast-qual warnings.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54349 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGRRList.cpp
|
| 333948fb559121b6d3a79f2d86c270fe4eb13b7d |
05-Aug-2008 |
Dan Gohman <gohman@apple.com> |
Fix several const-correctness issues, resolving some -Wcast-qual warnings.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54349 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGRRList.cpp
|
| 6ac8df7f611b5b129af7192ad931862fc8169aae |
05-Aug-2008 |
Owen Anderson <resistor@mac.com> |
This option doesn't need to be a target option. It can be in SDISel instead.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54336 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| c55989acf9cd3d4eef3448e082e935a5324b36f1 |
05-Aug-2008 |
Owen Anderson <resistor@mac.com> |
This option doesn't need to be a target option. It can be in SDISel instead.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54336 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| bd3ba461eb5578a81ba09ff7bd7eb271d1130196 |
05-Aug-2008 |
Owen Anderson <resistor@mac.com> |
- Fix SelectionDAG to generate correct CFGs.
- Add a basic machine-level dead block eliminator.
These two have to go together, since many other parts of the code generator are unable to handle the unreachable blocks otherwise created.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54333 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| fb6914f85e270628cdda612e7e6c250110c5977c |
05-Aug-2008 |
Owen Anderson <resistor@mac.com> |
- Fix SelectionDAG to generate correct CFGs.
- Add a basic machine-level dead block eliminator.
These two have to go together, since many other parts of the code generator are unable to handle the unreachable blocks otherwise created.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54333 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 6f498b0a8eeb69a9aa20319e2c803b1d58525547 |
05-Aug-2008 |
Dan Gohman <gohman@apple.com> |
Fix SDISel lowering of PHI nodes to use ComputeValueVTs.
This allows it to work correctly on aggregate values.
This fixes PR2623.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54331 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 802a48abd6ec7eadcb04f37c77c92c0e43d2ac26 |
05-Aug-2008 |
Dan Gohman <gohman@apple.com> |
Fix SDISel lowering of PHI nodes to use ComputeValueVTs.
This allows it to work correctly on aggregate values.
This fixes PR2623.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54331 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 1f565bcff6781d0a4395b4c386f7168df13ddbca |
05-Aug-2008 |
Dan Gohman <gohman@apple.com> |
Fix SDISel lowering of zeroinitializer and undef to use ComputeValueVTs.
This allows it to work correctly on nested aggregate values.
This fixes PR2625.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54330 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 89ce05fbcb1cd2804169883559f10b8d8113ec23 |
05-Aug-2008 |
Dan Gohman <gohman@apple.com> |
Fix SDISel lowering of zeroinitializer and undef to use ComputeValueVTs.
This allows it to work correctly on nested aggregate values.
This fixes PR2625.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54330 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 7232464bdaae5e6e48986a1e3b9a95fac7aa7bdf |
31-Jul-2008 |
Dale Johannesen <dalej@apple.com> |
Add a flag to disable jump table generation (all
switches use the binary search algorithm) for
environments that don't support it. PPC64 JIT
is such an environment; turn the flag on for that.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54248 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 493492f301ac4a2a4355c95164a49c3d3e51377c |
31-Jul-2008 |
Dale Johannesen <dalej@apple.com> |
Add a flag to disable jump table generation (all
switches use the binary search algorithm) for
environments that don't support it. PPC64 JIT
is such an environment; turn the flag on for that.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54248 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 75dcf08243d19a40d2e1cc12057bf9c00ca3df3b |
31-Jul-2008 |
Dan Gohman <gohman@apple.com> |
Improve dagcombining for sext-loads and sext-in-reg nodes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54239 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 759ed2963a64ee04da967847866cd67f62764aac |
31-Jul-2008 |
Dan Gohman <gohman@apple.com> |
Improve dagcombining for sext-loads and sext-in-reg nodes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54239 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 0b12aef49087b57d276ed760a83525d1e2602144 |
30-Jul-2008 |
Dan Gohman <gohman@apple.com> |
Move SelectionDAG::viewGraph() out of line; as an inline function
it isn't always visible to gdb.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54228 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGPrinter.cpp
|
| 8c8928602025b9cedf099605aaaf15ea6268992e |
30-Jul-2008 |
Dan Gohman <gohman@apple.com> |
Move SelectionDAG::viewGraph() out of line; as an inline function
it isn't always visible to gdb.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54228 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGPrinter.cpp
|
| 90d33ee746f354030a4144c4ffa028599663615b |
30-Jul-2008 |
Dan Gohman <gohman@apple.com> |
Don't look for leaf values to store when lowering stores of
empty structs. This fixes PR2612.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54226 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 4a136fc9156329b73728717877251e00c430dff2 |
30-Jul-2008 |
Dan Gohman <gohman@apple.com> |
Don't look for leaf values to store when lowering stores of
empty structs. This fixes PR2612.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54226 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 24dc346a16397bf740d8d961cd1ebec8d2f46957 |
29-Jul-2008 |
Nate Begeman <natebegeman@mac.com> |
Fix broken CellSPU lowering, re-instate braces in Legalize
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54168 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 7569e76ac7241ab4d3d59d30699a1c38fda61190 |
29-Jul-2008 |
Nate Begeman <natebegeman@mac.com> |
Fix broken CellSPU lowering, re-instate braces in Legalize
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54168 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| f09d131126cd60552f09d4fb1c078c085139dcf2 |
29-Jul-2008 |
Nate Begeman <natebegeman@mac.com> |
Disable a fix in the previous patch, since it breaks CellSPU.
The CellSPU codegen is broken, but needs to be fixed before we can
put this back in.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54164 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| e5493112eabf9297fa39a4c959303c90b2fbda22 |
29-Jul-2008 |
Nate Begeman <natebegeman@mac.com> |
Disable a fix in the previous patch, since it breaks CellSPU.
The CellSPU codegen is broken, but needs to be fixed before we can
put this back in.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54164 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 5bc1ea0736a5785ed596d58beeff2ab23909e33d |
29-Jul-2008 |
Nate Begeman <natebegeman@mac.com> |
Add vector shifts to the IR, patch by Eli Friedman.
CodeGen & Clang work coming next.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54161 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
electionDAGISel.cpp
|
| bb1ce94fe83d9d97f9dcd1e6f8943bc4a0b2e63c |
29-Jul-2008 |
Nate Begeman <natebegeman@mac.com> |
Add vector shifts to the IR, patch by Eli Friedman.
CodeGen & Clang work coming next.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54161 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
electionDAGISel.cpp
|
| fed90b6d097d50881afb45e4d79f430db66dd741 |
28-Jul-2008 |
Dan Gohman <gohman@apple.com> |
Fold the useful features of alist and alist_node into ilist, and
a new ilist_node class, and remove them. Unlike alist_node,
ilist_node doesn't attempt to manage storage itself, so it avoids
the associated problems, including being opaque in gdb.
Adjust the Recycler class so that it doesn't depend on alist_node.
Also, change it to use explicit Size and Align parameters, allowing
it to work when the largest-sized node doesn't have the greatest
alignment requirement.
Change MachineInstr's MachineMemOperand list from a pool-backed
alist to a std::list for now.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54146 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
electionDAGISel.cpp
|
| 2fcbc7e8303dfee61147d76bbf16ed0297133c77 |
28-Jul-2008 |
Dan Gohman <gohman@apple.com> |
Fold the useful features of alist and alist_node into ilist, and
a new ilist_node class, and remove them. Unlike alist_node,
ilist_node doesn't attempt to manage storage itself, so it avoids
the associated problems, including being opaque in gdb.
Adjust the Recycler class so that it doesn't depend on alist_node.
Also, change it to use explicit Size and Align parameters, allowing
it to work when the largest-sized node doesn't have the greatest
alignment requirement.
Change MachineInstr's MachineMemOperand list from a pool-backed
alist to a std::list for now.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54146 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
electionDAGISel.cpp
|
| 29cdb26bbae007c0c1fe620136f8dfc8a2d1e84d |
28-Jul-2008 |
Dan Gohman <gohman@apple.com> |
Make the ScheduleDAG's GraphRoot edge be blue and dashed too, like
the SelectionDAG's.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54129 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGPrinter.cpp
|
| a7cc4ffa7b2817bba430ffbc8c70436ee4b917af |
28-Jul-2008 |
Dan Gohman <gohman@apple.com> |
Make the ScheduleDAG's GraphRoot edge be blue and dashed too, like
the SelectionDAG's.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54129 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGPrinter.cpp
|
| 475871a144eb604ddaf37503397ba0941442e5fb |
27-Jul-2008 |
Dan Gohman <gohman@apple.com> |
Rename SDOperand to SDValue.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54128 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
egalizeDAG.cpp
egalizeFloatTypes.cpp
egalizeIntegerTypes.cpp
egalizeTypes.cpp
egalizeTypes.h
egalizeTypesGeneric.cpp
egalizeVectorTypes.cpp
cheduleDAG.cpp
cheduleDAGRRList.cpp
electionDAG.cpp
electionDAGISel.cpp
electionDAGPrinter.cpp
argetLowering.cpp
|
| 8181bd1f95ae9994edb390dd9acd0b7b12375219 |
27-Jul-2008 |
Dan Gohman <gohman@apple.com> |
Rename SDOperand to SDValue.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54128 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
egalizeDAG.cpp
egalizeFloatTypes.cpp
egalizeIntegerTypes.cpp
egalizeTypes.cpp
egalizeTypes.h
egalizeTypesGeneric.cpp
egalizeVectorTypes.cpp
cheduleDAG.cpp
cheduleDAGRRList.cpp
electionDAG.cpp
electionDAGISel.cpp
electionDAGPrinter.cpp
argetLowering.cpp
|
| 8968450305c28444edc3c272d8752a8db0c2f34a |
27-Jul-2008 |
Dan Gohman <gohman@apple.com> |
Tidy SDNode::use_iterator, and complete the transition to have it
parallel its analogue, Value::value_use_iterator. The operator* method
now returns the user, rather than the use.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54127 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
egalizeDAG.cpp
egalizeTypes.cpp
cheduleDAG.cpp
electionDAG.cpp
|
| 0c97f1da6784c4097fd6c9d1a15813ad9802cc5b |
27-Jul-2008 |
Dan Gohman <gohman@apple.com> |
Tidy SDNode::use_iterator, and complete the transition to have it
parallel its analogue, Value::value_use_iterator. The operator* method
now returns the user, rather than the use.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54127 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
egalizeDAG.cpp
egalizeTypes.cpp
cheduleDAG.cpp
electionDAG.cpp
|
| 2a6299543fa22f389158409e897fe7099fda3812 |
27-Jul-2008 |
Dan Gohman <gohman@apple.com> |
Rename isOnlyUseOf to isOnlyUserOf.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54124 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 07fadb01ea99e46adea484af8f884662a21e9a5c |
27-Jul-2008 |
Dan Gohman <gohman@apple.com> |
Rename isOnlyUseOf to isOnlyUserOf.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54124 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 4ddc41e58cae9236b7959cbed62a5a052f05e70e |
27-Jul-2008 |
Duncan Sands <baldrick@free.fr> |
Some binary operations were being treated as
unary operations! Add support for softening
some additional unary operations like fp_to_sint.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54122 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeTypes.h
egalizeVectorTypes.cpp
|
| ba23c3b860fce7b2dd11e3ed321540470b192955 |
27-Jul-2008 |
Duncan Sands <baldrick@free.fr> |
Some binary operations were being treated as
unary operations! Add support for softening
some additional unary operations like fp_to_sint.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54122 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeTypes.h
egalizeVectorTypes.cpp
|
| 92879f3a9e6625d4a17a3d93e6250a59b0497660 |
25-Jul-2008 |
Mon P Wang <wangmp@apple.com> |
When splitting a vector shuffle, fixed which type we used for the hi part
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54007 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 2e89b1112ee8434f877fa135000fad0eb2199245 |
25-Jul-2008 |
Mon P Wang <wangmp@apple.com> |
When splitting a vector shuffle, fixed which type we used for the hi part
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54007 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 8b4588fa64f0ebfbb7d2b9b4af8c682ddddf29c0 |
25-Jul-2008 |
Dan Gohman <gohman@apple.com> |
Use AliasAnalysis::pointsToConstantMemory in SDISel to avoid unnecessary
dependencies with constant load nodes. This allows them to be scheduled
freely.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54001 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| e45821b0546acd571b7c22ee4cd32ac5437913bd |
25-Jul-2008 |
Dan Gohman <gohman@apple.com> |
Use AliasAnalysis::pointsToConstantMemory in SDISel to avoid unnecessary
dependencies with constant load nodes. This allows them to be scheduled
freely.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54001 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| fc74abfba5128544a750fce22fdf13eb0403e3ce |
23-Jul-2008 |
Dan Gohman <gohman@apple.com> |
Enable first-class aggregates support.
Remove the GetResultInst instruction. It is still accepted in LLVM assembly
and bitcode, where it is now auto-upgraded to ExtractValueInst. Also, remove
support for return instructions with multiple values. These are auto-upgraded
to use InsertValueInst instructions.
The IRBuilder still accepts multiple-value returns, and auto-upgrades them
to InsertValueInst instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53941 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 29474e9327b30f3f79a5ce3d4264cc23e1e6dcdb |
23-Jul-2008 |
Dan Gohman <gohman@apple.com> |
Enable first-class aggregates support.
Remove the GetResultInst instruction. It is still accepted in LLVM assembly
and bitcode, where it is now auto-upgraded to ExtractValueInst. Also, remove
support for return instructions with multiple values. These are auto-upgraded
to use InsertValueInst instructions.
The IRBuilder still accepts multiple-value returns, and auto-upgrades them
to InsertValueInst instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53941 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 11e56cb4dc73bbb0bdc083042657ea3a5aad63f2 |
23-Jul-2008 |
Duncan Sands <baldrick@free.fr> |
LegalizeTypes support for VSETCC. Fixes PR2575.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53938 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeTypes.h
egalizeVectorTypes.cpp
|
| f871b535b84b7edca3587afa730019772474b6b0 |
23-Jul-2008 |
Duncan Sands <baldrick@free.fr> |
LegalizeTypes support for VSETCC. Fixes PR2575.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53938 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeTypes.h
egalizeVectorTypes.cpp
|
| 292578676524036842aecb2d932e3995dddd9c2a |
22-Jul-2008 |
Evan Cheng <evan.cheng@apple.com> |
Fix pr2566: incorrect assumption about bit_convert. It doesn't not have to output a vector value. Patch by Nicolas Capens!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53932 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 76b20d1829f7204eb3aa614241cd41e3c22da264 |
22-Jul-2008 |
Evan Cheng <evan.cheng@apple.com> |
Fix pr2566: incorrect assumption about bit_convert. It doesn't not have to output a vector value. Patch by Nicolas Capens!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53932 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 694caf56f15bec971d493069a1613a8f992f510a |
22-Jul-2008 |
Dan Gohman <gohman@apple.com> |
Make the GraphRoot edge look like a chain edge, which is more accurate,
and use the right result number, in the off chance that the graph root
has multiple result values.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53923 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGPrinter.cpp
|
| 7951f804442942b1befc8c583e442854d4040723 |
22-Jul-2008 |
Dan Gohman <gohman@apple.com> |
Make the GraphRoot edge look like a chain edge, which is more accurate,
and use the right result number, in the off chance that the graph root
has multiple result values.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53923 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGPrinter.cpp
|
| 79acd2b51ff81db67d8383ec117039cb99fdc04d |
22-Jul-2008 |
Dan Gohman <gohman@apple.com> |
Fix grammaros in comments.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53884 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 7d919eaea1320859914e1deab20e2d2781af5b68 |
22-Jul-2008 |
Dan Gohman <gohman@apple.com> |
Fix grammaros in comments.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53884 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 358033102ffaef4d1afb1c0b7e96440906f0b48f |
21-Jul-2008 |
Dan Gohman <gohman@apple.com> |
Enhance the GraphWriter support for edge destinations, and teach the
SelectionDAG graph writer to make use of them. Now, nodes with multiple
values are displayed as such, with incoming edges pointing to the
specific value they use.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53875 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGPrinter.cpp
|
| b38a0053b72ab70719e3b280ed90949c5e79598d |
21-Jul-2008 |
Dan Gohman <gohman@apple.com> |
Enhance the GraphWriter support for edge destinations, and teach the
SelectionDAG graph writer to make use of them. Now, nodes with multiple
values are displayed as such, with incoming edges pointing to the
specific value they use.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53875 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGPrinter.cpp
|
| 2dbc167294c1a7a4cd7a43f86bff104afd6110e5 |
21-Jul-2008 |
Dan Gohman <gohman@apple.com> |
After early-lowering the FORMAL_ARGUMENTS node, delete it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53874 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 890404fa0e973d1cb983c10631a0094b6be2fe7f |
21-Jul-2008 |
Dan Gohman <gohman@apple.com> |
After early-lowering the FORMAL_ARGUMENTS node, delete it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53874 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 462dc7f4960e5074ddf4769ec8b2ef1ba7a4d2c8 |
21-Jul-2008 |
Dan Gohman <gohman@apple.com> |
Add titles to the various SelectionDAG viewGraph calls
that include useful information like the name of the
block being viewed and the current phase of compilation.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53872 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
egalizeDAG.cpp
egalizeTypes.cpp
electionDAGISel.cpp
electionDAGPrinter.cpp
|
| b552df7665675a434d8f60a0535f7ba21b1f7851 |
21-Jul-2008 |
Dan Gohman <gohman@apple.com> |
Add titles to the various SelectionDAG viewGraph calls
that include useful information like the name of the
block being viewed and the current phase of compilation.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53872 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
egalizeDAG.cpp
egalizeTypes.cpp
electionDAGISel.cpp
electionDAGPrinter.cpp
|
| d038e04188047eca4749d025ef1f05f7ae660bca |
21-Jul-2008 |
Duncan Sands <baldrick@free.fr> |
Add VerifyNode, a place to put sanity checks on
generic SDNode's (nodes with their own constructors
should do sanity checking in the constructor). Add
sanity checks for BUILD_VECTOR and fix all the places
that were producing bogus BUILD_VECTORs, as found by
"make check". My favorite is the BUILD_VECTOR with
only two operands that was being used to build a
vector with four elements!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53850 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
egalizeDAG.cpp
electionDAG.cpp
|
| d3ace285922063c12ec57627134b564b5d7b9f7c |
21-Jul-2008 |
Duncan Sands <baldrick@free.fr> |
Add VerifyNode, a place to put sanity checks on
generic SDNode's (nodes with their own constructors
should do sanity checking in the constructor). Add
sanity checks for BUILD_VECTOR and fix all the places
that were producing bogus BUILD_VECTORs, as found by
"make check". My favorite is the BUILD_VECTOR with
only two operands that was being used to build a
vector with four elements!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53850 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
egalizeDAG.cpp
electionDAG.cpp
|
| c3e26727c18e15b64098fc7f397e09147cd78eeb |
18-Jul-2008 |
Duncan Sands <baldrick@free.fr> |
Softfloat support for FDIV. Patch by
Richard Pennington.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53773 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeFloatTypes.cpp
egalizeTypes.h
|
| 788a6e23ebd29db3137ee4d0ac03f83057578c04 |
18-Jul-2008 |
Duncan Sands <baldrick@free.fr> |
Softfloat support for FDIV. Patch by
Richard Pennington.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53773 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeFloatTypes.cpp
egalizeTypes.h
|
| f8ac645c59094b1165af6a06af3cc63af96a1dd9 |
18-Jul-2008 |
Duncan Sands <baldrick@free.fr> |
Eliminate unused variable.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53772 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGPrinter.cpp
|
| cc8209c892e8a2f535a033c92e1efea4dba3406e |
18-Jul-2008 |
Duncan Sands <baldrick@free.fr> |
Eliminate unused variable.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53772 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGPrinter.cpp
|
| 77926da196908244598627408babdc5254b4a991 |
18-Jul-2008 |
Duncan Sands <baldrick@free.fr> |
Revert 53729, after waking up in the middle of
the night realising that it was wrong :) I
think the reason the same type was being used
for the shufflevec of indices as for the actual
indices is so that if one of them needs splitting
then so does the other. After my patch it might
be that the indices need splitting but not the
rest, yet there is no good way of handling that.
I think the right solution is to not have the
shufflevec be an operand at all: just have it
be the list of numbers it actually is, stored
as extra info in the node.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53768 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 41903b53e0cd2acd6751827431a6c46a778e80ab |
18-Jul-2008 |
Duncan Sands <baldrick@free.fr> |
Revert 53729, after waking up in the middle of
the night realising that it was wrong :) I
think the reason the same type was being used
for the shufflevec of indices as for the actual
indices is so that if one of them needs splitting
then so does the other. After my patch it might
be that the indices need splitting but not the
rest, yet there is no good way of handling that.
I think the right solution is to not have the
shufflevec be an operand at all: just have it
be the list of numbers it actually is, stored
as extra info in the node.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53768 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| dc5f936bf898a945b7b5a823d00ef9b336f2dc6a |
17-Jul-2008 |
Dan Gohman <gohman@apple.com> |
When printing MemOperand nodes, only use print() for
PseudoSourceValue values, which never have names. Use getName()
for all other values, because we want to print just a short summary
of the value, not the entire instruction.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53738 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGPrinter.cpp
|
| e36d39c5431dffa42167c3fecc5520eb0f2588ce |
17-Jul-2008 |
Dan Gohman <gohman@apple.com> |
When printing MemOperand nodes, only use print() for
PseudoSourceValue values, which never have names. Use getName()
for all other values, because we want to print just a short summary
of the value, not the entire instruction.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53738 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGPrinter.cpp
|
| f1bb7f1d3e6b06185580ad4b4c343d402bf0a453 |
17-Jul-2008 |
Duncan Sands <baldrick@free.fr> |
Use a legal type for elements of the vector_shuffle
mask. These are just indices into the shuffled vector
so their type is unrelated to the type of the
shuffled elements (which is what was being used before).
This fixes vec_shuffle-11.ll when using LegalizeTypes.
What seems to have happened is that Dan's recent change
r53687, which corrected the result type of the shuffle,
somehow caused LegalizeTypes to notice that the mask
operand was a BUILD_VECTOR with a legal type but elements
of an illegal type (i64). LegalizeTypes legalized this
by introducing a new BUILD_VECTOR of i32 and bitcasting
it to the old type. But the mask operand is not supposed
to be a bitcast but a straight BUILD_VECTOR of constants,
causing a crash.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53729 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 22d073b0f0f5eb22ec7f27591feae615aa5bb5ed |
17-Jul-2008 |
Duncan Sands <baldrick@free.fr> |
Use a legal type for elements of the vector_shuffle
mask. These are just indices into the shuffled vector
so their type is unrelated to the type of the
shuffled elements (which is what was being used before).
This fixes vec_shuffle-11.ll when using LegalizeTypes.
What seems to have happened is that Dan's recent change
r53687, which corrected the result type of the shuffle,
somehow caused LegalizeTypes to notice that the mask
operand was a BUILD_VECTOR with a legal type but elements
of an illegal type (i64). LegalizeTypes legalized this
by introducing a new BUILD_VECTOR of i32 and bitcasting
it to the old type. But the mask operand is not supposed
to be a bitcast but a straight BUILD_VECTOR of constants,
causing a crash.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53729 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| e8be6c63915e0389f1eef6b53c64300d13b2ce99 |
17-Jul-2008 |
Dan Gohman <gohman@apple.com> |
Add a new function, ReplaceAllUsesOfValuesWith, which handles bulk
replacement of multiple values. This is slightly more efficient
than doing multiple ReplaceAllUsesOfValueWith calls, and theoretically
could be optimized even further. However, an important property of this
new function is that it handles the case where the source value set and
destination value set overlap. This makes it feasible for isel to use
SelectNodeTo in many very common cases, which is advantageous because
SelectNodeTo avoids a temporary node and it doesn't require CSEMap
updates for users of values that don't change position.
Revamp MorphNodeTo, which is what does all the work of SelectNodeTo, to
handle operand lists more efficiently, and to correctly handle a number
of corner cases to which its new wider use exposes it.
This commit also includes a change to the encoding of post-isel opcodes
in SDNodes; now instead of being sandwiched between the target-independent
pre-isel opcodes and the target-dependent pre-isel opcodes, post-isel
opcodes are now represented as negative values. This makes it possible
to test if an opcode is pre-isel or post-isel without having to know
the size of the current target's post-isel instruction set.
These changes speed up llc overall by 3% and reduce memory usage by 10%
on the InstructionCombining.cpp testcase with -fast and -regalloc=local.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53728 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAG.cpp
cheduleDAGList.cpp
cheduleDAGRRList.cpp
electionDAG.cpp
|
| bd68c79fb898ebb9b42140fb39bab3baf3cb8f4e |
17-Jul-2008 |
Dan Gohman <gohman@apple.com> |
Add a new function, ReplaceAllUsesOfValuesWith, which handles bulk
replacement of multiple values. This is slightly more efficient
than doing multiple ReplaceAllUsesOfValueWith calls, and theoretically
could be optimized even further. However, an important property of this
new function is that it handles the case where the source value set and
destination value set overlap. This makes it feasible for isel to use
SelectNodeTo in many very common cases, which is advantageous because
SelectNodeTo avoids a temporary node and it doesn't require CSEMap
updates for users of values that don't change position.
Revamp MorphNodeTo, which is what does all the work of SelectNodeTo, to
handle operand lists more efficiently, and to correctly handle a number
of corner cases to which its new wider use exposes it.
This commit also includes a change to the encoding of post-isel opcodes
in SDNodes; now instead of being sandwiched between the target-independent
pre-isel opcodes and the target-dependent pre-isel opcodes, post-isel
opcodes are now represented as negative values. This makes it possible
to test if an opcode is pre-isel or post-isel without having to know
the size of the current target's post-isel instruction set.
These changes speed up llc overall by 3% and reduce memory usage by 10%
on the InstructionCombining.cpp testcase with -fast and -regalloc=local.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53728 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAG.cpp
cheduleDAGList.cpp
cheduleDAGRRList.cpp
electionDAG.cpp
|
| 79ada108dd0d85af15d301be5479992a2d54e5ba |
17-Jul-2008 |
Duncan Sands <baldrick@free.fr> |
LegalizeTypes support for what seems to be the
only missing ppc long double operations: FNEG
and FP_EXTEND.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53723 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeFloatTypes.cpp
egalizeTypes.h
|
| 38a9de35d55d7a5a3224cea99528fae4067bdc2b |
17-Jul-2008 |
Duncan Sands <baldrick@free.fr> |
LegalizeTypes support for what seems to be the
only missing ppc long double operations: FNEG
and FP_EXTEND.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53723 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeFloatTypes.cpp
egalizeTypes.h
|
| f00e74f4d64385e6b2ee29887114e7c8abdf1f17 |
17-Jul-2008 |
Duncan Sands <baldrick@free.fr> |
Turn LegalizeTypes back off again for the moment:
it is breaking Darwin bootstrap due to missing
functionality.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53721 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 31ddf4c7cd7e66064d2bac0de8d4aa4f883ef1a8 |
17-Jul-2008 |
Duncan Sands <baldrick@free.fr> |
Turn LegalizeTypes back off again for the moment:
it is breaking Darwin bootstrap due to missing
functionality.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53721 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| b2ff885aaed8f9b033b16ca78d645650efc32433 |
17-Jul-2008 |
Duncan Sands <baldrick@free.fr> |
Factorize some code for determining which libcall to use.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53713 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
egalizeFloatTypes.cpp
egalizeIntegerTypes.cpp
argetLowering.cpp
|
| f68dffb360f3174503e553a9d3b1ca8a85a79081 |
17-Jul-2008 |
Duncan Sands <baldrick@free.fr> |
Factorize some code for determining which libcall to use.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53713 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
egalizeFloatTypes.cpp
egalizeIntegerTypes.cpp
argetLowering.cpp
|
| 7a9a5af6a06058e86e9eae5a5486f651aeeda2ec |
16-Jul-2008 |
Dan Gohman <gohman@apple.com> |
Fix the result type of a VECTOR_SHUFFLE+BIT_CONVERT dagcombine. This
was turned up by some new SelectionDAG assertion checks that I'm
working on.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53687 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 4c2199063ce303203e69cfbaeeac4485db4cc827 |
16-Jul-2008 |
Dan Gohman <gohman@apple.com> |
Fix the result type of a VECTOR_SHUFFLE+BIT_CONVERT dagcombine. This
was turned up by some new SelectionDAG assertion checks that I'm
working on.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53687 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 95db39a9de48f69f4d764335b492b83a698c7854 |
16-Jul-2008 |
Duncan Sands <baldrick@free.fr> |
Add support for promoting and expanding AssertZext
and AssertSext. Needed when passing huge integer
parameters with the zeroext or signext attributes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53684 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeIntegerTypes.cpp
egalizeTypes.h
|
| 5d55dd1f8c8452d6c57563a545864f046867db33 |
16-Jul-2008 |
Duncan Sands <baldrick@free.fr> |
Add support for promoting and expanding AssertZext
and AssertSext. Needed when passing huge integer
parameters with the zeroext or signext attributes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53684 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeIntegerTypes.cpp
egalizeTypes.h
|
| 05c397d52a145c8844790d6491c4c51d4bbfed7c |
16-Jul-2008 |
Duncan Sands <baldrick@free.fr> |
Reorder methods alphabetically. No functionality change.
While this is not a wonderful organizing principle, it
does make it easy to find routines, and clear where to
insert new ones.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53672 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeFloatTypes.cpp
egalizeIntegerTypes.cpp
egalizeVectorTypes.cpp
|
| f0b594c39bf02032fe570d1c6cb9a92325177def |
16-Jul-2008 |
Duncan Sands <baldrick@free.fr> |
Reorder methods alphabetically. No functionality change.
While this is not a wonderful organizing principle, it
does make it easy to find routines, and clear where to
insert new ones.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53672 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeFloatTypes.cpp
egalizeIntegerTypes.cpp
egalizeVectorTypes.cpp
|
| 7f1d8aeef6ce0075e5dd144c669614813738be24 |
16-Jul-2008 |
Duncan Sands <baldrick@free.fr> |
Turn on LegalizeTypes by default.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53671 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 991e158149cc55baf31b1c927da62be5eb88739d |
16-Jul-2008 |
Duncan Sands <baldrick@free.fr> |
Turn on LegalizeTypes by default.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53671 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 4093d8301021c9dde8d3577903366cfb8b5d82d0 |
15-Jul-2008 |
Dan Gohman <gohman@apple.com> |
SelectionDAG::AssignNodeIds is unused.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53636 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| ee9ed4b0ee802ea8414e7dee7dcb4664d0c739de |
15-Jul-2008 |
Dan Gohman <gohman@apple.com> |
SelectionDAG::AssignNodeIds is unused.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53636 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 90a7b8fba69503c950aa598fac2edc77123b6bf0 |
15-Jul-2008 |
Dan Gohman <gohman@apple.com> |
Don't sort SDNodes by their addresses in SelectionDAG::dump. Instead,
just use the AllNodes order, which is at least relatively stable
across runs.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53632 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 5fafd4262faf2ac59dd3480d34408ea04f750c10 |
15-Jul-2008 |
Dan Gohman <gohman@apple.com> |
Don't sort SDNodes by their addresses in SelectionDAG::dump. Instead,
just use the AllNodes order, which is at least relatively stable
across runs.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53632 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 295a7cddbdbafc4f91d96c6779034f0afef1829a |
15-Jul-2008 |
Duncan Sands <baldrick@free.fr> |
LegalizeTypes support for fabs on ppc long double.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53613 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeFloatTypes.cpp
egalizeTypes.h
|
| 0172480d059f95ca622d1177f7d34e0e601713ca |
15-Jul-2008 |
Duncan Sands <baldrick@free.fr> |
LegalizeTypes support for fabs on ppc long double.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53613 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeFloatTypes.cpp
egalizeTypes.h
|
| c07e6e53f757da1a7c79c66ed53f2844de85a77e |
15-Jul-2008 |
Duncan Sands <baldrick@free.fr> |
LegalizeTypes support for promotion of bswap.
In LegalizeDAG the value is zero-extended to
the new type before byte swapping. It doesn't
matter how the extension is done since the new
bits are shifted off anyway after the swap, so
extend by any old rubbish bits. This results
in the final assembler for the testcase being
one line shorter.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53604 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeIntegerTypes.cpp
egalizeTypes.h
|
| 0d4f8ac1aedb0b78bd089dcb0b7ceed83e054532 |
15-Jul-2008 |
Duncan Sands <baldrick@free.fr> |
LegalizeTypes support for promotion of bswap.
In LegalizeDAG the value is zero-extended to
the new type before byte swapping. It doesn't
matter how the extension is done since the new
bits are shifted off anyway after the swap, so
extend by any old rubbish bits. This results
in the final assembler for the testcase being
one line shorter.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53604 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeIntegerTypes.cpp
egalizeTypes.h
|
| 8d56a6f4d8b010d4c582225a08ece971613f6fe3 |
15-Jul-2008 |
Duncan Sands <baldrick@free.fr> |
LegalizeTypes support for promotion of SIGN_EXTEND_INREG.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53603 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeIntegerTypes.cpp
egalizeTypes.h
|
| c3444388f5a69418a0b2c427b23e33a6c46c759c |
15-Jul-2008 |
Duncan Sands <baldrick@free.fr> |
LegalizeTypes support for promotion of SIGN_EXTEND_INREG.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53603 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeIntegerTypes.cpp
egalizeTypes.h
|
| bf304c20651b80309af4c0fb3a14c0d73eaa984f |
15-Jul-2008 |
Duncan Sands <baldrick@free.fr> |
Reorder the integer promotion methods alphabetically.
No change in functionality.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53602 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeIntegerTypes.cpp
|
| 495efad527f8d4e03e12860b44aba7cdfba1b57b |
15-Jul-2008 |
Duncan Sands <baldrick@free.fr> |
Reorder the integer promotion methods alphabetically.
No change in functionality.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53602 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeIntegerTypes.cpp
|
| 2920d2b7b601d9dfcec783cb91316f35b6811be1 |
15-Jul-2008 |
Mon P Wang <wangmp@apple.com> |
Fixed potential bug if the source and target of a bit convert have different alignment
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53590 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 36b59ac6b0e4d5e56d61d92d6b53364db73c36a2 |
15-Jul-2008 |
Mon P Wang <wangmp@apple.com> |
Fixed potential bug if the source and target of a bit convert have different alignment
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53590 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 5e84368b26415b3bb7f3f8d9cff3e05938dd82d0 |
14-Jul-2008 |
Dan Gohman <gohman@apple.com> |
Reapply 53476 and 53480, with a fix so that it properly updates
the BB member to the current basic block after emitting
instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53567 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAG.cpp
cheduleDAGList.cpp
cheduleDAGRRList.cpp
electionDAGISel.cpp
|
| 368a08b238a4d0a938b7639930f149dbdeb71259 |
14-Jul-2008 |
Dan Gohman <gohman@apple.com> |
Reapply 53476 and 53480, with a fix so that it properly updates
the BB member to the current basic block after emitting
instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53567 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAG.cpp
cheduleDAGList.cpp
cheduleDAGRRList.cpp
electionDAGISel.cpp
|
| 91d49f5ba1374df9db98b6ee45402ddaa84d08b0 |
14-Jul-2008 |
Dan Gohman <gohman@apple.com> |
Improve debug output for MemOperandSDNode. PseudoSourceValue nodes
don't have value names, so use print instead of getName() to get a
useful string.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53563 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGPrinter.cpp
|
| 6295ea2cf304f9fa01dd8584b6fc1cd1dbdb354e |
14-Jul-2008 |
Dan Gohman <gohman@apple.com> |
Improve debug output for MemOperandSDNode. PseudoSourceValue nodes
don't have value names, so use print instead of getName() to get a
useful string.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53563 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGPrinter.cpp
|
| 189a2b32f8dfcf35de60e04800ecac4553578e0d |
14-Jul-2008 |
Duncan Sands <baldrick@free.fr> |
I don't think BUILD_PAIR can have a vector result.
Remove support for this.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53559 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeVectorTypes.cpp
|
| f2c3e77e07a3c464841820783eaad7ca9b97626f |
14-Jul-2008 |
Duncan Sands <baldrick@free.fr> |
I don't think BUILD_PAIR can have a vector result.
Remove support for this.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53559 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeVectorTypes.cpp
|
| a489be59ef460fc1f699a62c21ecb3f630c6dbf0 |
14-Jul-2008 |
Duncan Sands <baldrick@free.fr> |
Tighten up some checks. Fix FPOWI splitting for
non-power-of-two vectors.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53558 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeVectorTypes.cpp
|
| ae7b70f5789cc14f7db5e1ca691b12ca2d1cd73f |
14-Jul-2008 |
Duncan Sands <baldrick@free.fr> |
Tighten up some checks. Fix FPOWI splitting for
non-power-of-two vectors.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53558 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeVectorTypes.cpp
|
| 262e04b3078e38c8dc5cdc40bf51e7cd467fd57a |
14-Jul-2008 |
Duncan Sands <baldrick@free.fr> |
An INSERT_VECTOR_ELT can insert a larger value
than the vector element type. Don't forget to
handle this when the insertion index is not a
constant.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53556 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeVectorTypes.cpp
|
| 38b7a7cc96b46cee339eebbffb578e9e3945cf79 |
14-Jul-2008 |
Duncan Sands <baldrick@free.fr> |
An INSERT_VECTOR_ELT can insert a larger value
than the vector element type. Don't forget to
handle this when the insertion index is not a
constant.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53556 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeVectorTypes.cpp
|
| 8cc364c5cc210c56808011a5ebad28a719f106b7 |
14-Jul-2008 |
Duncan Sands <baldrick@free.fr> |
According to the docs, it is possible to have an
extending load of a vector. Handle this case when
splitting vector loads. I'm not completely sure
what is supposed to happen, but I think it means
hi should be set to undef. LegalizeDAG does not
consider this case.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53555 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeVectorTypes.cpp
|
| 953a83d09f658d621cd27ce874567f221b88e8db |
14-Jul-2008 |
Duncan Sands <baldrick@free.fr> |
According to the docs, it is possible to have an
extending load of a vector. Handle this case when
splitting vector loads. I'm not completely sure
what is supposed to happen, but I think it means
hi should be set to undef. LegalizeDAG does not
consider this case.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53555 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeVectorTypes.cpp
|
| 28c05ac995c8063ecf4e05ef7c0879467ca98221 |
14-Jul-2008 |
Duncan Sands <baldrick@free.fr> |
There should be no extending loads or truncating
stores of one-element vectors. Also, neaten the
handling of INSERT_VECTOR_ELT when the inserted
type is larger than the vector element type.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53554 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeVectorTypes.cpp
|
| 692bd6e01bd264f322a3516737b6bae5708a77ac |
14-Jul-2008 |
Duncan Sands <baldrick@free.fr> |
There should be no extending loads or truncating
stores of one-element vectors. Also, neaten the
handling of INSERT_VECTOR_ELT when the inserted
type is larger than the vector element type.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53554 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeVectorTypes.cpp
|
| d164ea2fb07ab3540121ffe1c59ad2cdc0a7a0a3 |
14-Jul-2008 |
Duncan Sands <baldrick@free.fr> |
Ignore TargetConstant with an illegal type. These
are used for passing huge immediates in inline ASM
from the front-end straight down to the ASM writer.
Of course this is a hack, but it is simple, limited
in scope, works in practice, and is what LegalizeDAG
does.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53553 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeTypes.cpp
egalizeTypes.h
|
| 42e89f49db9df19c3d2f4fa428f740031f150a07 |
14-Jul-2008 |
Duncan Sands <baldrick@free.fr> |
Ignore TargetConstant with an illegal type. These
are used for passing huge immediates in inline ASM
from the front-end straight down to the ASM writer.
Of course this is a hack, but it is simple, limited
in scope, works in practice, and is what LegalizeDAG
does.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53553 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeTypes.cpp
egalizeTypes.h
|
| b5eec33dcde63bee6048d54bee2a376737028e5c |
12-Jul-2008 |
Evan Cheng <evan.cheng@apple.com> |
Back out 53476 and 53480 for now. Somehow they cause llc to miscompile 179.art.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53502 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAG.cpp
cheduleDAGList.cpp
cheduleDAGRRList.cpp
electionDAGISel.cpp
|
| 58a6a6b201041761b7ae929694542c4580ee3fe3 |
12-Jul-2008 |
Evan Cheng <evan.cheng@apple.com> |
Back out 53476 and 53480 for now. Somehow they cause llc to miscompile 179.art.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53502 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAG.cpp
cheduleDAGList.cpp
cheduleDAGRRList.cpp
electionDAGISel.cpp
|
| a54cf176613f9ae8301519a61b8935652c0fb8ae |
12-Jul-2008 |
Dan Gohman <gohman@apple.com> |
Include a frame index in the "fixed stack" pseudo source value
instead of using the frame index for the SVOffset, which was
inconsistent.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53486 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
electionDAG.cpp
|
| 1fc34bc02d40d5f55a5d9f8ed5ce32bdeb533491 |
12-Jul-2008 |
Dan Gohman <gohman@apple.com> |
Include a frame index in the "fixed stack" pseudo source value
instead of using the frame index for the SVOffset, which was
inconsistent.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53486 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
electionDAG.cpp
|
| 5e76c3be731b516f51270d4334fb61c1af20f21d |
12-Jul-2008 |
Dan Gohman <gohman@apple.com> |
Fix an obsolete top-level comment.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53481 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAG.cpp
|
| e39d99044c056315bc96527d72fde5850e583502 |
12-Jul-2008 |
Dan Gohman <gohman@apple.com> |
Fix an obsolete top-level comment.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53481 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAG.cpp
|
| 0f4012f4759a6c6ca28f11ed1eb98feb8ab1481b |
12-Jul-2008 |
Dan Gohman <gohman@apple.com> |
Factor out debugging code into the common base class.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53480 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAG.cpp
cheduleDAGList.cpp
cheduleDAGRRList.cpp
|
| 4195c05b0dd629d5f31a1511f7627ea6e36f2fb1 |
12-Jul-2008 |
Dan Gohman <gohman@apple.com> |
Factor out debugging code into the common base class.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53480 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAG.cpp
cheduleDAGList.cpp
cheduleDAGRRList.cpp
|
| dbe2a5a26925cd3ed8a4c2cf02c8273fcf9919d7 |
11-Jul-2008 |
Dan Gohman <gohman@apple.com> |
Add support for putting NamedRegionTimers in TimerGroups, and
use a timer group for the timers in SelectionDAGISel. Also,
Split scheduling out from emitting, to give each their own
timer.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53476 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGList.cpp
cheduleDAGRRList.cpp
electionDAGISel.cpp
|
| 5e29bafdd4026d91dfcc021dab82e21975b98911 |
11-Jul-2008 |
Dan Gohman <gohman@apple.com> |
Add support for putting NamedRegionTimers in TimerGroups, and
use a timer group for the timers in SelectionDAGISel. Also,
Split scheduling out from emitting, to give each their own
timer.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53476 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGList.cpp
cheduleDAGRRList.cpp
electionDAGISel.cpp
|
| dc2fbddd9d204e904b8e61d1da1428579e7c55af |
11-Jul-2008 |
Dan Gohman <gohman@apple.com> |
Trim unnecessary #includes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53471 91177308-0d34-0410-b5e6-96231b3b80d8
allingConvLower.cpp
|
| 02983113c9d593fc6d0e7c769e88754a980da8bd |
11-Jul-2008 |
Dan Gohman <gohman@apple.com> |
Trim unnecessary #includes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53471 91177308-0d34-0410-b5e6-96231b3b80d8
allingConvLower.cpp
|
| 92e0834ac7d9ff2539706522ef521bd2319dc15f |
11-Jul-2008 |
Duncan Sands <baldrick@free.fr> |
Remove an apparently useless routine: there should
be no need to split the result of a vector RET node,
since they are always already legal.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53462 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeTypes.h
egalizeVectorTypes.cpp
|
| 758ef8357de3f04f8c7a2cbd9b9571a322c035da |
11-Jul-2008 |
Duncan Sands <baldrick@free.fr> |
Remove an apparently useless routine: there should
be no need to split the result of a vector RET node,
since they are always already legal.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53462 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeTypes.h
egalizeVectorTypes.cpp
|
| ac6cecec189ba9689c42543c3106c02b96d788da |
11-Jul-2008 |
Duncan Sands <baldrick@free.fr> |
It is pointless to turn a UINT_TO_FP into an
SINT_TO_FP libcall plus additional operations:
it might as well be a direct UINT_TO_FP libcall.
So only turn it into an SINT_TO_FP if the target
has special handling for SINT_TO_FP.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53461 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeIntegerTypes.cpp
egalizeTypes.h
argetLowering.cpp
|
| 25df46a15574ee05b1a18202d6eb6fbca2ac74f3 |
11-Jul-2008 |
Duncan Sands <baldrick@free.fr> |
It is pointless to turn a UINT_TO_FP into an
SINT_TO_FP libcall plus additional operations:
it might as well be a direct UINT_TO_FP libcall.
So only turn it into an SINT_TO_FP if the target
has special handling for SINT_TO_FP.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53461 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeIntegerTypes.cpp
egalizeTypes.h
argetLowering.cpp
|
| 9bed0f58eb7f5e9e22d062f3880a5fabfdd0dfdd |
11-Jul-2008 |
Duncan Sands <baldrick@free.fr> |
Add two missing SINT_TO_FP libcalls.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53460 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeIntegerTypes.cpp
argetLowering.cpp
|
| 3f71497401444fc6eace071a129048e1256119a4 |
11-Jul-2008 |
Duncan Sands <baldrick@free.fr> |
Add two missing SINT_TO_FP libcalls.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53460 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeIntegerTypes.cpp
argetLowering.cpp
|
| edfba7e707a4f2f2e800843a7ef980c27d7f4eff |
11-Jul-2008 |
Duncan Sands <baldrick@free.fr> |
Port a shift-by-1 optimization from LegalizeDAG: it
was presumably added after the rest of the code was
copied to LegalizeTypes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53459 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeIntegerTypes.cpp
|
| 9b9e7a456de7cb654bb0f34dfb59aebb15717eae |
11-Jul-2008 |
Duncan Sands <baldrick@free.fr> |
Port a shift-by-1 optimization from LegalizeDAG: it
was presumably added after the rest of the code was
copied to LegalizeTypes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53459 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeIntegerTypes.cpp
|
| dddc6291fb5274282a20d5923b50535d456d34a4 |
11-Jul-2008 |
Duncan Sands <baldrick@free.fr> |
Add support for 128 bit shifts and 32 bit shifts
on 16 bit machines.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53458 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeIntegerTypes.cpp
argetLowering.cpp
|
| 8783398a4cfee14740a03dfb3084694ce6d23e02 |
11-Jul-2008 |
Duncan Sands <baldrick@free.fr> |
Add support for 128 bit shifts and 32 bit shifts
on 16 bit machines.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53458 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeIntegerTypes.cpp
argetLowering.cpp
|
| c563e1d8fe2e0e9bb47e99ec55c277404969287e |
11-Jul-2008 |
Chris Lattner <sabre@nondot.org> |
Fix a bug in the soft-float handling of FCOPYSIGN that Duncan noticed
when working on legalizetypes. Both legalizetypes and legalizeops now
produce hte same code for CodeGen/ARM/fcopysign.ll.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53435 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| e6fa1454f1f990ebe5e3ab79c80eedd3930d9dc6 |
11-Jul-2008 |
Chris Lattner <sabre@nondot.org> |
Fix a bug in the soft-float handling of FCOPYSIGN that Duncan noticed
when working on legalizetypes. Both legalizetypes and legalizeops now
produce hte same code for CodeGen/ARM/fcopysign.ll.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53435 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 70587ea813986bb0dbef71610091d496e28c22a6 |
11-Jul-2008 |
Chris Lattner <sabre@nondot.org> |
make legalize types be a command line option: -enable-legalize-types.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53434 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| b29a6a47e8b6be7a868d0aa838186cd73c1c79ab |
11-Jul-2008 |
Chris Lattner <sabre@nondot.org> |
make legalize types be a command line option: -enable-legalize-types.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53434 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 5ac319ac7125b009adddcc49294d2e040c4a91e5 |
10-Jul-2008 |
Duncan Sands <baldrick@free.fr> |
Add support for 128 bit multiplicative operations.
Lack of these caused a bootstrap failure with Fortran
on x86-64 with LegalizeTypes turned on. While there,
be nice to 16 bit machines and support expansion of
i32 too.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53408 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeIntegerTypes.cpp
argetLowering.cpp
|
| 05de150b9ca151d912e57656b61bbecc11a595db |
10-Jul-2008 |
Duncan Sands <baldrick@free.fr> |
Add support for 128 bit multiplicative operations.
Lack of these caused a bootstrap failure with Fortran
on x86-64 with LegalizeTypes turned on. While there,
be nice to 16 bit machines and support expansion of
i32 too.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53408 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeIntegerTypes.cpp
argetLowering.cpp
|
| be1ad4de2900451626c8d4ace07b9ea16099ea1d |
10-Jul-2008 |
Duncan Sands <baldrick@free.fr> |
Add a mysteriously missing libcall, FPTOSINT_F80_I32.
Be nice to 16 bit machines by supporting FP_TO_XINT
expansion for these.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53407 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
egalizeFloatTypes.cpp
egalizeIntegerTypes.cpp
argetLowering.cpp
|
| d27dafec5358dbe5bdc764060a156c8b535d07db |
10-Jul-2008 |
Duncan Sands <baldrick@free.fr> |
Add a mysteriously missing libcall, FPTOSINT_F80_I32.
Be nice to 16 bit machines by supporting FP_TO_XINT
expansion for these.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53407 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
egalizeFloatTypes.cpp
egalizeIntegerTypes.cpp
argetLowering.cpp
|
| 03dc093a2e63d20984c8fd67809fa762f1e31f1a |
10-Jul-2008 |
Duncan Sands <baldrick@free.fr> |
Fix a FIXME: use an apint in CTTZ legalization.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53406 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeIntegerTypes.cpp
|
| 3e1c701db4f40baa420d7e829d92b2e7ed003e3f |
10-Jul-2008 |
Duncan Sands <baldrick@free.fr> |
Fix a FIXME: use an apint in CTTZ legalization.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53406 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeIntegerTypes.cpp
|
| ae099d54428f4113f8a71c53314975fb8a8e8bbc |
10-Jul-2008 |
Duncan Sands <baldrick@free.fr> |
Remove PromoteIntRes_FP_ROUND - not sure what it
was doing there: FP_ROUND returns a float, not an
integer.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53405 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeIntegerTypes.cpp
egalizeTypes.cpp
egalizeTypes.h
egalizeTypesGeneric.cpp
|
| 0767358e0d5a8460a03953846d4a13bace723f36 |
10-Jul-2008 |
Duncan Sands <baldrick@free.fr> |
Remove PromoteIntRes_FP_ROUND - not sure what it
was doing there: FP_ROUND returns a float, not an
integer.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53405 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeIntegerTypes.cpp
egalizeTypes.cpp
egalizeTypes.h
egalizeTypesGeneric.cpp
|
| c5ffb45934a5f6c19b6279a42622f1b4d9e7ec88 |
10-Jul-2008 |
Duncan Sands <baldrick@free.fr> |
Make sure the alignment of the temporary created
in CreateStackStoreLoad is good enough for both
the source and destination types.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53404 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeTypes.cpp
|
| 079db020f8f3d0c6bc54872f1a509f75a4831e65 |
10-Jul-2008 |
Duncan Sands <baldrick@free.fr> |
Make sure the alignment of the temporary created
in CreateStackStoreLoad is good enough for both
the source and destination types.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53404 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeTypes.cpp
|
| f4e4629ee8c218f892ad8ae3e182fe40bc160895 |
10-Jul-2008 |
Duncan Sands <baldrick@free.fr> |
Make the LegalizeType method naming scheme more regular.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53403 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeIntegerTypes.cpp
egalizeTypes.cpp
egalizeTypes.h
egalizeTypesGeneric.cpp
egalizeVectorTypes.cpp
|
| c5b0c2b113d6bf8546d9cedfe8ca3fddef536161 |
10-Jul-2008 |
Duncan Sands <baldrick@free.fr> |
Make the LegalizeType method naming scheme more regular.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53403 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeIntegerTypes.cpp
egalizeTypes.cpp
egalizeTypes.h
egalizeTypesGeneric.cpp
egalizeVectorTypes.cpp
|
| e1d97b1a748e96d5ca479c38cfd1775d6469bf80 |
10-Jul-2008 |
Duncan Sands <baldrick@free.fr> |
Don't barf when dumping a constant that contains
a ginormous value (eg: i128 -1).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53402 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 52a36a2571511f6c0ebd3df4bfed014c5d0e65a1 |
10-Jul-2008 |
Duncan Sands <baldrick@free.fr> |
Don't barf when dumping a constant that contains
a ginormous value (eg: i128 -1).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53402 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| b9c33c32292d0ae5da2d75623a84a0e7796a2b63 |
10-Jul-2008 |
Dan Gohman <gohman@apple.com> |
Simplify hasNUsesOfValue and hasAnyUsesOfValue even more. This
makes their special-case checks of use_size() less beneficial,
so remove them. This eliminates all but one use of use_size(),
which is in AssignTopologicalOrder, which uses it only once for
each node, and so can reasonably afford to recompute it, as
this allows the UsesSize field of SDNode to be removed
altogether.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53377 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| de5b8cc1b2d1cc030a388c8092e6eff11e63e04e |
10-Jul-2008 |
Dan Gohman <gohman@apple.com> |
Simplify hasNUsesOfValue and hasAnyUsesOfValue even more. This
makes their special-case checks of use_size() less beneficial,
so remove them. This eliminates all but one use of use_size(),
which is in AssignTopologicalOrder, which uses it only once for
each node, and so can reasonably afford to recompute it, as
this allows the UsesSize field of SDNode to be removed
altogether.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53377 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 1373c1c3951ddd785d4f7f83c0bc89df699d22a0 |
10-Jul-2008 |
Dan Gohman <gohman@apple.com> |
hasAnyUseOfValue can check SDUse nodes of its users directly instead
of examining every operand of every user.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53374 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| a965173e103a03b86ae4dcbd2b5c4c2e186ae2ca |
10-Jul-2008 |
Dan Gohman <gohman@apple.com> |
hasAnyUseOfValue can check SDUse nodes of its users directly instead
of examining every operand of every user.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53374 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 1ea58a52a4296afff10e9db1e54928f38e6d74c6 |
10-Jul-2008 |
Dan Gohman <gohman@apple.com> |
Move MemoryVT out of LSBaseNode into MemSDNode, allowing the
getMemOperand function to be moved into the base class as well
and made non-virtual.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53372 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 7ad1ccaddf096ca75d84d589765f930ab7a2894a |
10-Jul-2008 |
Dan Gohman <gohman@apple.com> |
Move MemoryVT out of LSBaseNode into MemSDNode, allowing the
getMemOperand function to be moved into the base class as well
and made non-virtual.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53372 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 492f276cbc7be564c6af7b302618ee5436e4619c |
09-Jul-2008 |
Dan Gohman <gohman@apple.com> |
Move the IsVolatile and SVOffset fields into the MemSDNode base
class, and store IsVolatile and Alignment in a more compact form.
This makes AtomicSDNode slightly larger, but it shrinks LoadSDNode
and StoreSDNode, which are much more common and are the largest of
the SDNode subclasses. Also, this lets the isVolatile() and
getAlignment() accessors be non-virtual.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53361 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 846947a7b701b3bd92d7ee80554280ff885d91ea |
09-Jul-2008 |
Dan Gohman <gohman@apple.com> |
Move the IsVolatile and SVOffset fields into the MemSDNode base
class, and store IsVolatile and Alignment in a more compact form.
This makes AtomicSDNode slightly larger, but it shrinks LoadSDNode
and StoreSDNode, which are much more common and are the largest of
the SDNode subclasses. Also, this lets the isVolatile() and
getAlignment() accessors be non-virtual.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53361 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| dd1c20d2580236280694a22264fa26b36cb8fbe6 |
09-Jul-2008 |
Duncan Sands <baldrick@free.fr> |
Remove some unneeded includes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53289 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeIntegerTypes.cpp
egalizeTypes.cpp
|
| cef41b324c8fe02da3e6232762aac79a4b893f8b |
09-Jul-2008 |
Duncan Sands <baldrick@free.fr> |
Remove some unneeded includes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53289 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeIntegerTypes.cpp
egalizeTypes.cpp
|
| b5508e423727b2c56a136cb1a20647f831d53982 |
09-Jul-2008 |
Duncan Sands <baldrick@free.fr> |
Redo LegalizeTypes soft float support for
SINT_TO_FP and UINT_TO_FP. This now produces
the same code as LegalizeDAG (the previous
code was based on a mistaken idea of what
LegalizeDAG did in this case).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53288 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeFloatTypes.cpp
egalizeTypes.h
|
| a89216d3b32fbdaf76eb4999d441ffaa5262b34c |
09-Jul-2008 |
Duncan Sands <baldrick@free.fr> |
Redo LegalizeTypes soft float support for
SINT_TO_FP and UINT_TO_FP. This now produces
the same code as LegalizeDAG (the previous
code was based on a mistaken idea of what
LegalizeDAG did in this case).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53288 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeFloatTypes.cpp
egalizeTypes.h
|
| 452911c468a8d3b7571a3eb9aeff37c3880adb94 |
09-Jul-2008 |
Duncan Sands <baldrick@free.fr> |
Forgot to update the chain result when softening
loads.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53287 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeFloatTypes.cpp
|
| 1e4e4c198fcec51f1113aaf1cdd9b37f3ac63d99 |
09-Jul-2008 |
Duncan Sands <baldrick@free.fr> |
Forgot to update the chain result when softening
loads.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53287 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeFloatTypes.cpp
|
| f8568b464f65f26efd0d7615dcf3f72a09bdf088 |
09-Jul-2008 |
Duncan Sands <baldrick@free.fr> |
LegalizeTypes soft float support for FP_TO_SINT and
FP_TO_UINT.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53286 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeFloatTypes.cpp
egalizeTypes.h
|
| ad8879c32142bf822e8e6380c20363391bcddd28 |
09-Jul-2008 |
Duncan Sands <baldrick@free.fr> |
LegalizeTypes soft float support for FP_TO_SINT and
FP_TO_UINT.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53286 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeFloatTypes.cpp
egalizeTypes.h
|
| 851b1ee83f7a0e7f88cd378bf3849809b19dfd01 |
09-Jul-2008 |
Duncan Sands <baldrick@free.fr> |
LegalizeTypes support for powi soft float.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53285 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeFloatTypes.cpp
egalizeTypes.h
|
| ac3e399e292a826f305e831a2030fdb4909945c7 |
09-Jul-2008 |
Duncan Sands <baldrick@free.fr> |
LegalizeTypes support for powi soft float.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53285 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeFloatTypes.cpp
egalizeTypes.h
|
| ddc7aa3417fbd9719dd021a9fff383addfc49eb3 |
09-Jul-2008 |
Duncan Sands <baldrick@free.fr> |
Make the role of MVT::i32 clearer here, and add a
note since it is not clear whether it is correct.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53284 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeFloatTypes.cpp
|
| 488328d081d9fb9ec48273bbac01a8a1c495d7fc |
09-Jul-2008 |
Duncan Sands <baldrick@free.fr> |
Make the role of MVT::i32 clearer here, and add a
note since it is not clear whether it is correct.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53284 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeFloatTypes.cpp
|
| 1afe5c3ff8f37a94e47379ff9535b5e03faca020 |
09-Jul-2008 |
Evan Cheng <evan.cheng@apple.com> |
Missed alignment argument on stores lowered from memcpy.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53281 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 757ec3147604ed7c1d03ad13df6c90fa929e72bd |
09-Jul-2008 |
Evan Cheng <evan.cheng@apple.com> |
Missed alignment argument on stores lowered from memcpy.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53281 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| f877b735ad4987f26cafcbaf22aa4c2199458b5d |
09-Jul-2008 |
Dan Gohman <gohman@apple.com> |
const-ify SelectionDAG::getNodeValueTypes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53264 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| a36422a0679c4cabf61d802a63d6beda43b24783 |
09-Jul-2008 |
Dan Gohman <gohman@apple.com> |
const-ify SelectionDAG::getNodeValueTypes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53264 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 9c6e70eca9a49c146b26621cbcbb9464ceeac024 |
09-Jul-2008 |
Dan Gohman <gohman@apple.com> |
Factor out the code for computing an alignment value, and make it
available to getAtomic in addition to just getLoad and getStore,
to prevent MachineMemOperands with 0 alignment.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53261 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 9e3a342ffca179370dfe8637d4d80e236a8f0d2d |
09-Jul-2008 |
Dan Gohman <gohman@apple.com> |
Factor out the code for computing an alignment value, and make it
available to getAtomic in addition to just getLoad and getStore,
to prevent MachineMemOperands with 0 alignment.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53261 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 71e8685633e7938ee752004cceedccbd0d850527 |
08-Jul-2008 |
Evan Cheng <evan.cheng@apple.com> |
Do not CSE DEBUG_LOC, DBG_LABEL, DBG_STOPPOINT, DECLARE, and EH_LABEL SDNode's. This improves compile time slightly at -O0 -g.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53246 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
electionDAG.cpp
|
| d6f5768dcc9e5956742ae6ea6af5f610080489ee |
08-Jul-2008 |
Evan Cheng <evan.cheng@apple.com> |
Do not CSE DEBUG_LOC, DBG_LABEL, DBG_STOPPOINT, DECLARE, and EH_LABEL SDNode's. This improves compile time slightly at -O0 -g.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53246 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
electionDAG.cpp
|
| 7ba11c552b8a25ad1272b44d96e886a784dae0b7 |
08-Jul-2008 |
Duncan Sands <baldrick@free.fr> |
Remove custom expansion from LegalizeTypes when doing
soft float: experiments show that targets aren't
expecting this for results or for operands. Add
support select/select_cc result soft float and
correct operand soft float for these.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53245 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeFloatTypes.cpp
egalizeIntegerTypes.cpp
egalizeTypes.h
egalizeVectorTypes.cpp
|
| 9ad22121801c7031f51715d5796388a0c60decaa |
08-Jul-2008 |
Duncan Sands <baldrick@free.fr> |
Remove custom expansion from LegalizeTypes when doing
soft float: experiments show that targets aren't
expecting this for results or for operands. Add
support select/select_cc result soft float and
correct operand soft float for these.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53245 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeFloatTypes.cpp
egalizeIntegerTypes.cpp
egalizeTypes.h
egalizeVectorTypes.cpp
|
| 3a2eb297afd2d5d57dfd041cdd5a1db2ceaa89b1 |
08-Jul-2008 |
Duncan Sands <baldrick@free.fr> |
Add missing select_cc libcall line, somehow omitted
in LegalizeTypes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53244 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeFloatTypes.cpp
|
| 2235f6373a486a15340af3cfa7fbf709665e2c23 |
08-Jul-2008 |
Duncan Sands <baldrick@free.fr> |
Add missing select_cc libcall line, somehow omitted
in LegalizeTypes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53244 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeFloatTypes.cpp
|
| 28124ac6066795e69046371936f73faa09f15aba |
08-Jul-2008 |
Duncan Sands <baldrick@free.fr> |
LegalizeTypes support for FP_ROUND and FP_EXTEND
soft float.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53231 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeFloatTypes.cpp
egalizeTypes.h
|
| 75ee49e55747b7027802d40d14c5cac923544457 |
08-Jul-2008 |
Duncan Sands <baldrick@free.fr> |
LegalizeTypes support for FP_ROUND and FP_EXTEND
soft float.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53231 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeFloatTypes.cpp
egalizeTypes.h
|
| 8e5f2c6f65841542e2a7092553fe42a00048e4c7 |
08-Jul-2008 |
Dan Gohman <gohman@apple.com> |
Pool-allocation for MachineInstrs, MachineBasicBlocks, and
MachineMemOperands. The pools are owned by MachineFunctions.
This drastically reduces the number of calls to malloc/free made
during the "Emit" phase of scheduling, as well as later phases
in CodeGen. Combined with other changes, this speeds up the
"instruction selection" phase of CodeGen by 10% in some cases.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53212 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAG.cpp
|
| 221a4371f95ebdb25ac7d4363accb35c88cb5ea4 |
08-Jul-2008 |
Dan Gohman <gohman@apple.com> |
Pool-allocation for MachineInstrs, MachineBasicBlocks, and
MachineMemOperands. The pools are owned by MachineFunctions.
This drastically reduces the number of calls to malloc/free made
during the "Emit" phase of scheduling, as well as later phases
in CodeGen. Combined with other changes, this speeds up the
"instruction selection" phase of CodeGen by 10% in some cases.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53212 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAG.cpp
|
| 0e5f1306b059b62d7725f324e087efbc8e7a782d |
08-Jul-2008 |
Dan Gohman <gohman@apple.com> |
Pool-allocation for SDNodes. The pool is allocated once for each function,
and reused across SelectionDAGs.
This drastically reduces the number of calls to malloc/free made during
instruction selection, and improves memory locality.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53211 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
electionDAGISel.cpp
|
| ed825d11548be9f8268490d26d0d0bab0347d6fd |
08-Jul-2008 |
Dan Gohman <gohman@apple.com> |
Pool-allocation for SDNodes. The pool is allocated once for each function,
and reused across SelectionDAGs.
This drastically reduces the number of calls to malloc/free made during
instruction selection, and improves memory locality.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53211 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
electionDAGISel.cpp
|
| 0fe9c6e7babb3c0731d9cb864ec498ec4184760f |
07-Jul-2008 |
Dan Gohman <gohman@apple.com> |
Fix SDNode::MorphNodeTo (a function used by by SelectNodeTo) to
properly track dead nodes that are on the original SDNode's operand
list but not the new one, and have no other uses.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53201 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| b997a4e4f92a1b9b4be917a32bc21cb52a63c399 |
07-Jul-2008 |
Dan Gohman <gohman@apple.com> |
Fix SDNode::MorphNodeTo (a function used by by SelectNodeTo) to
properly track dead nodes that are on the original SDNode's operand
list but not the new one, and have no other uses.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53201 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 6d9cdd56173fb915a9e3a8f0f6b5a8ed9bed1098 |
07-Jul-2008 |
Dan Gohman <gohman@apple.com> |
Remove most of the uses of SDOperandPtr, usually replacing it with a
simple const SDOperand*, which is what's usually needed.
For AddNodeIDOperands, which is small, just duplicate the function to
accept an SDUse*.
For SelectionDAG::getNode - Add an overload that accepts SDUse* that
copies the operands into a temporary SDOperand array, but also has
special-case checks for 0 through 3 operands to avoid the copy in
the common cases.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53183 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 703ce5d0c363816b7cac7310461fad4fc3796267 |
07-Jul-2008 |
Dan Gohman <gohman@apple.com> |
Remove most of the uses of SDOperandPtr, usually replacing it with a
simple const SDOperand*, which is what's usually needed.
For AddNodeIDOperands, which is small, just duplicate the function to
accept an SDUse*.
For SelectionDAG::getNode - Add an overload that accepts SDUse* that
copies the operands into a temporary SDOperand array, but also has
special-case checks for 0 through 3 operands to avoid the copy in
the common cases.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53183 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 1002c0203450620594a85454c6a095ca94b87cb2 |
07-Jul-2008 |
Dan Gohman <gohman@apple.com> |
Add explicit keywords.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53179 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
egalizeTypes.cpp
|
| e887fdff72486ad0e83f402c8c105fa91fff1036 |
07-Jul-2008 |
Dan Gohman <gohman@apple.com> |
Add explicit keywords.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53179 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
egalizeTypes.cpp
|
| 6b345ee9b2833cf1b2f79dc16d06d4060bec36ef |
07-Jul-2008 |
Dan Gohman <gohman@apple.com> |
Make DenseMap's insert return a pair, to more closely resemble std::map.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53177 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
cheduleDAG.cpp
|
| 55d1966e9afdeeb33e7611bc0ac9b4b4268d68d3 |
07-Jul-2008 |
Dan Gohman <gohman@apple.com> |
Make DenseMap's insert return a pair, to more closely resemble std::map.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53177 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
cheduleDAG.cpp
|
| 21cacc4de88098a6f2ccfcde18ccec0aa6654f3e |
07-Jul-2008 |
Evan Cheng <evan.cheng@apple.com> |
LegalizeSetCCOperands should legalize the result of ExpandLibCall. Patch by Richard Osborne.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53169 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 18a1ab1d6b0f8e6ae6d85b922e27b5467ef444e6 |
07-Jul-2008 |
Evan Cheng <evan.cheng@apple.com> |
LegalizeSetCCOperands should legalize the result of ExpandLibCall. Patch by Richard Osborne.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53169 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 990f032907ae171cc3d465a694e8e6d2a6545f57 |
07-Jul-2008 |
Duncan Sands <baldrick@free.fr> |
LegalizeTypes soft-float support for stores of a
float value.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53165 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeFloatTypes.cpp
egalizeTypes.h
|
| 6627c56987be5203d44db5e3206f4a4f2b1bbe71 |
07-Jul-2008 |
Duncan Sands <baldrick@free.fr> |
LegalizeTypes soft-float support for stores of a
float value.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53165 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeFloatTypes.cpp
egalizeTypes.h
|
| 364d73ddab43b699ab90240f11b7a2eb5cf69bd8 |
05-Jul-2008 |
Mon P Wang <wangmp@apple.com> |
Fixed generating incorrect aligned stores that I backout of r53031
that fixed problems in EmitStackConvert where the source and target type
have different alignment by creating a stack slot with the max
alignment of source and target type.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53150 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
electionDAG.cpp
|
| 55854cc1b3acd8103c1dc674dad5de4b7a41d33d |
05-Jul-2008 |
Mon P Wang <wangmp@apple.com> |
Fixed generating incorrect aligned stores that I backout of r53031
that fixed problems in EmitStackConvert where the source and target type
have different alignment by creating a stack slot with the max
alignment of source and target type.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53150 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
electionDAG.cpp
|
| 126d90770bdb17e6925b2fe26de99aa079b7b9b3 |
04-Jul-2008 |
Duncan Sands <baldrick@free.fr> |
Rather than having a different custom legalization
hook for each way in which a result type can be
legalized (promotion, expansion, softening etc),
just use one: ReplaceNodeResults, which returns
a node with exactly the same result types as the
node passed to it, but presumably with a bunch of
custom code behind the scenes. No change if the
new LegalizeTypes infrastructure is not turned on.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53137 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
egalizeFloatTypes.cpp
egalizeIntegerTypes.cpp
egalizeVectorTypes.cpp
electionDAGISel.cpp
|
| ac496a17678473310a3c468a8ac5a5a30426876c |
04-Jul-2008 |
Duncan Sands <baldrick@free.fr> |
Rather than having a different custom legalization
hook for each way in which a result type can be
legalized (promotion, expansion, softening etc),
just use one: ReplaceNodeResults, which returns
a node with exactly the same result types as the
node passed to it, but presumably with a bunch of
custom code behind the scenes. No change if the
new LegalizeTypes infrastructure is not turned on.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53137 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
egalizeFloatTypes.cpp
egalizeIntegerTypes.cpp
egalizeVectorTypes.cpp
electionDAGISel.cpp
|
| 10fff6078a7bc42f142c536bd55e9569253b280b |
04-Jul-2008 |
Bill Wendling <isanbard@gmail.com> |
Revert my previous check-in that split up MachineModuleInfo. It turns out to
slow the compiler down at -O0 some 30% or more. Ooops.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53120 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
electionDAGPrinter.cpp
|
| 4de8de500e6cfb18604557d24a18d684227e95e6 |
04-Jul-2008 |
Bill Wendling <isanbard@gmail.com> |
Revert my previous check-in that split up MachineModuleInfo. It turns out to
slow the compiler down at -O0 some 30% or more. Ooops.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53120 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
electionDAGPrinter.cpp
|
| a122f2f51e4cc9edc5f1c4020e51909b585a0f90 |
03-Jul-2008 |
Evan Cheng <evan.cheng@apple.com> |
Backed out 53031.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53110 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
electionDAG.cpp
|
| 639dee91a803062997a3714d45dc1ac5ac6dc258 |
03-Jul-2008 |
Evan Cheng <evan.cheng@apple.com> |
Backed out 53031.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53110 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
electionDAG.cpp
|
| 9b44c1f2a0ebe31e670994cfe131c7c3e0e80494 |
03-Jul-2008 |
Dan Gohman <gohman@apple.com> |
Avoid unnecessarily copying APInt objects.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53065 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 1b1a3c6492001e401d5b74d35a4a28abd59c41bc |
03-Jul-2008 |
Dan Gohman <gohman@apple.com> |
Avoid unnecessarily copying APInt objects.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53065 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| cd920d9ecfcefff13c3619a32b58399cac2e3630 |
03-Jul-2008 |
Dan Gohman <gohman@apple.com> |
Replace a few uses of SelectionDAG::getTargetNode with
SelectionDAG::SelectNodeTo in the instruction selector. This
updates existing nodes in place instead of creating new ones.
Go back to selecting ISD::DBG_LABEL nodes into
TargetInstrInfo::DBG_LABEL nodes instead of leaving them
unselected, now that SelectNodeTo allows us to update them
in place.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53057 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAG.cpp
electionDAG.cpp
|
| 7eced110b0549fe8f7b400bbad655586d42d8765 |
03-Jul-2008 |
Dan Gohman <gohman@apple.com> |
Replace a few uses of SelectionDAG::getTargetNode with
SelectionDAG::SelectNodeTo in the instruction selector. This
updates existing nodes in place instead of creating new ones.
Go back to selecting ISD::DBG_LABEL nodes into
TargetInstrInfo::DBG_LABEL nodes instead of leaving them
unselected, now that SelectNodeTo allows us to update them
in place.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53057 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAG.cpp
electionDAG.cpp
|
| 4bdcb61af33399d4e01fdf3c47ca1f1f5356e370 |
02-Jul-2008 |
Duncan Sands <baldrick@free.fr> |
Add a new getMergeValues method that does not need
to be passed the list of value types, and use this
where appropriate. Inappropriate places are where
the value type list is already known and may be
long, in which case the existing method is more
efficient.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53035 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
electionDAG.cpp
electionDAGISel.cpp
|
| 698842f7b62573cc6a3af154727e5d59daea4c1d |
02-Jul-2008 |
Duncan Sands <baldrick@free.fr> |
Add a new getMergeValues method that does not need
to be passed the list of value types, and use this
where appropriate. Inappropriate places are where
the value type list is already known and may be
long, in which case the existing method is more
efficient.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53035 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
electionDAG.cpp
electionDAGISel.cpp
|
| bee98c66c0c3d1f43244cdf237e572a9df031e40 |
02-Jul-2008 |
Mon P Wang <wangmp@apple.com> |
Fixed problem in EmitStackConvert where the source and target type
have different alignment by creating a stack slot with the max
alignment of source and target type.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53031 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
electionDAG.cpp
|
| cd0e9b32e09067519485bf89a55f8b69c3c42eee |
02-Jul-2008 |
Mon P Wang <wangmp@apple.com> |
Fixed problem in EmitStackConvert where the source and target type
have different alignment by creating a stack slot with the max
alignment of source and target type.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53031 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
electionDAG.cpp
|
| 349db1738d58d52cae2ab1e06cbd128dd9f0aab6 |
02-Jul-2008 |
Chris Lattner <sabre@nondot.org> |
instead of aborting on shifts of i1, just implicitly fold them.
The dag combiner can produce a shift of i1 when folding icmp i1's.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53030 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| a113d3e7f84958bf2289297d014e2512a84ce80e |
02-Jul-2008 |
Chris Lattner <sabre@nondot.org> |
instead of aborting on shifts of i1, just implicitly fold them.
The dag combiner can produce a shift of i1 when folding icmp i1's.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53030 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 8dd5af562b8ab9ddf4c6e3a74ca3c4f66dcd0e9e |
02-Jul-2008 |
Duncan Sands <baldrick@free.fr> |
Fix typo compounded by a cut-and-pasto.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53012 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeFloatTypes.cpp
|
| 8bed0bd41e91f45f3219103e8dfee33fbeb61a1d |
02-Jul-2008 |
Duncan Sands <baldrick@free.fr> |
Fix typo compounded by a cut-and-pasto.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53012 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeFloatTypes.cpp
|
| 3a38e5e3c465c10fe5f859114f9077cb00cc17b9 |
02-Jul-2008 |
Duncan Sands <baldrick@free.fr> |
Let AnalyzeNewNode take care of calling ExpungeNode.
This makes sure that all new nodes are expunged, not
just those the top node of a new subtree.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53011 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeTypes.cpp
egalizeTypes.h
|
| 136fbc0e3e8697881c95e73249b5c6985e16970f |
02-Jul-2008 |
Duncan Sands <baldrick@free.fr> |
Let AnalyzeNewNode take care of calling ExpungeNode.
This makes sure that all new nodes are expunged, not
just those the top node of a new subtree.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53011 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeTypes.cpp
egalizeTypes.h
|
| c6be777208f4539af400ac694d9d1dc8b992bc80 |
02-Jul-2008 |
Evan Cheng <evan.cheng@apple.com> |
- Use a faster priority comparison function if -fast.
- Code clean up.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53010 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAG.cpp
cheduleDAGRRList.cpp
|
| f2639ba040bb28433c7fc4c1ce89ed49e3e02f6d |
02-Jul-2008 |
Evan Cheng <evan.cheng@apple.com> |
- Use a faster priority comparison function if -fast.
- Code clean up.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53010 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAG.cpp
cheduleDAGRRList.cpp
|
| 4474c792c6ef21862dd166fd0de59d70c4c8d489 |
02-Jul-2008 |
Owen Anderson <resistor@mac.com> |
No need to use std::distance. We can just count the number of operands
much more cheaply.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52990 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| cd9bc792c442008a8bf75d9a4c9146ce9f45cd89 |
02-Jul-2008 |
Owen Anderson <resistor@mac.com> |
No need to use std::distance. We can just count the number of operands
much more cheaply.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52990 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 6518c6ed7ea609696304bbbe848342cacd001f12 |
01-Jul-2008 |
Evan Cheng <evan.cheng@apple.com> |
Eliminate a compile time warning.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52982 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 2410863be0ab9f2c169053724a1471d69284a5f3 |
01-Jul-2008 |
Evan Cheng <evan.cheng@apple.com> |
Eliminate a compile time warning.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52982 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| f1a792bc59a4d65d0e346109c681768e07e62be5 |
01-Jul-2008 |
Evan Cheng <evan.cheng@apple.com> |
Do run ComputeLiveOutVRegInfo with -fast.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52975 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 598f94dc9f2d5dd645b23473388f203d1547dd97 |
01-Jul-2008 |
Evan Cheng <evan.cheng@apple.com> |
Do run ComputeLiveOutVRegInfo with -fast.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52975 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 4576f6d7a9c0f2c6a3b6c5d4d8a3063bbf763ae5 |
01-Jul-2008 |
Evan Cheng <evan.cheng@apple.com> |
Do not use computationally expensive scheduling heuristics with -fast.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52971 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGList.cpp
cheduleDAGRRList.cpp
electionDAGISel.cpp
|
| 9b77cae1df76d8be0771563f55dc72b1cdab648c |
01-Jul-2008 |
Evan Cheng <evan.cheng@apple.com> |
Do not use computationally expensive scheduling heuristics with -fast.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52971 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGList.cpp
cheduleDAGRRList.cpp
electionDAGISel.cpp
|
| ebffb660a68384dd8b5e2ff36d68e94a3920611b |
01-Jul-2008 |
Evan Cheng <evan.cheng@apple.com> |
Apply Chris' suggestion.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52970 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 19733c4a5e3c954dc7f96af361d2f71ed61f9443 |
01-Jul-2008 |
Evan Cheng <evan.cheng@apple.com> |
Apply Chris' suggestion.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52970 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 4406604047423576e36657c7ede266ca42e79642 |
01-Jul-2008 |
Dan Gohman <gohman@apple.com> |
Split ISD::LABEL into ISD::DBG_LABEL and ISD::EH_LABEL, eliminating
the need for a flavor operand, and add a new SDNode subclass,
LabelSDNode, for use with them to eliminate the need for a label id
operand.
Change instruction selection to let these label nodes through
unmodified instead of creating copies of them. Teach the MachineInstr
emitter how to emit a MachineInstr directly from an ISD label node.
This avoids the need for allocating SDNodes for the label id and
flavor value, as well as SDNodes for each of the post-isel label,
label id, and label flavor.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52943 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
cheduleDAG.cpp
electionDAG.cpp
electionDAGISel.cpp
electionDAGPrinter.cpp
|
| fa607c9cc5d2bd142ad8352bdf5e446517562688 |
01-Jul-2008 |
Dan Gohman <gohman@apple.com> |
Split ISD::LABEL into ISD::DBG_LABEL and ISD::EH_LABEL, eliminating
the need for a flavor operand, and add a new SDNode subclass,
LabelSDNode, for use with them to eliminate the need for a label id
operand.
Change instruction selection to let these label nodes through
unmodified instead of creating copies of them. Teach the MachineInstr
emitter how to emit a MachineInstr directly from an ISD label node.
This avoids the need for allocating SDNodes for the label id and
flavor value, as well as SDNodes for each of the post-isel label,
label id, and label flavor.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52943 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
cheduleDAG.cpp
electionDAG.cpp
electionDAGISel.cpp
electionDAGPrinter.cpp
|
| ee4dc16d75e0d06ab434745c116137c4c6332ffc |
01-Jul-2008 |
Evan Cheng <evan.cheng@apple.com> |
Suppress compiler warning.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52934 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeFloatTypes.cpp
|
| e661893f00c2c4911b026810b49cb83938c1472b |
01-Jul-2008 |
Evan Cheng <evan.cheng@apple.com> |
Suppress compiler warning.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52934 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeFloatTypes.cpp
|
| 99fe47bc81d53762454ff112ab34378b00299b5a |
01-Jul-2008 |
Dan Gohman <gohman@apple.com> |
Use a simpler but equivalent form of RecordSource.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52931 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 0849b9ef0517d2f4459f19c7f83dda2057caa3ed |
01-Jul-2008 |
Dan Gohman <gohman@apple.com> |
Use a simpler but equivalent form of RecordSource.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52931 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| f667480d84a99a34adcac217e1a4c9fb7e2bfae6 |
01-Jul-2008 |
Evan Cheng <evan.cheng@apple.com> |
Add timing report for various sub-passes under SelectionDAGISel.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52930 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 419b0e56ff8245b7e1993d637af94ae4f364fc55 |
01-Jul-2008 |
Evan Cheng <evan.cheng@apple.com> |
Add timing report for various sub-passes under SelectionDAGISel.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52930 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| cf8462f3004d3fc72217d09e4b3f135d68a50e9d |
30-Jun-2008 |
Dan Gohman <gohman@apple.com> |
Use reserve.
SelectionDAG::allnodes_size is linear, but that doesn't appear to
outweigh the benefit of reducing heap traffic. If it does become a
problem, we should teach SelectionDAG to keep a count of how many
nodes are live, because there are several other places where that
information would be useful as well.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52926 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 93466f8e2c9e8f3e769f5d357799a577b01e16bc |
30-Jun-2008 |
Dan Gohman <gohman@apple.com> |
Use reserve.
SelectionDAG::allnodes_size is linear, but that doesn't appear to
outweigh the benefit of reducing heap traffic. If it does become a
problem, we should teach SelectionDAG to keep a count of how many
nodes are live, because there are several other places where that
information would be useful as well.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52926 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 7f460203b0c5350e9b2c592f438e40f7a7de6e45 |
30-Jun-2008 |
Dan Gohman <gohman@apple.com> |
Rename ISD::LOCATION to ISD::DBG_STOPPOINT to better reflect its
purpose, and give it a custom SDNode subclass so that it doesn't
need to have line number, column number, filename string, and
directory string, all existing as individual SDNodes to be the
operands.
This was the only user of ISD::STRING, StringSDNode, etc., so
remove those and some associated code.
This makes stop-points considerably easier to read in
-view-legalize-dags output, and reduces overhead (creating new
nodes and copying std::strings into them) on code containing
debugging information.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52924 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
electionDAG.cpp
electionDAGISel.cpp
electionDAGPrinter.cpp
|
| 472d12c47f1704853971a564e03c5490ce5066b7 |
30-Jun-2008 |
Dan Gohman <gohman@apple.com> |
Rename ISD::LOCATION to ISD::DBG_STOPPOINT to better reflect its
purpose, and give it a custom SDNode subclass so that it doesn't
need to have line number, column number, filename string, and
directory string, all existing as individual SDNodes to be the
operands.
This was the only user of ISD::STRING, StringSDNode, etc., so
remove those and some associated code.
This makes stop-points considerably easier to read in
-view-legalize-dags output, and reduces overhead (creating new
nodes and copying std::strings into them) on code containing
debugging information.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52924 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
electionDAG.cpp
electionDAGISel.cpp
electionDAGPrinter.cpp
|
| db8d56b825efeb576d67b9dbe39d736d93306222 |
30-Jun-2008 |
Evan Cheng <evan.cheng@apple.com> |
Split scheduling from instruction selection.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52923 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 34fd4f3c0eb0d6c2ea2d2208a68bf693ca123d18 |
30-Jun-2008 |
Evan Cheng <evan.cheng@apple.com> |
Split scheduling from instruction selection.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52923 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| a44b674a42b6ca57128c4eb5a358298ed3bb1406 |
30-Jun-2008 |
Dan Gohman <gohman@apple.com> |
Replace some std::vectors that showed up in heap profiling with
SmallVectors. Change the signature of TargetLowering::LowerArguments
to avoid returning a vector by value, and update the two targets
which still use this directly, Sparc and IA64, accordingly.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52917 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| e0208146435b75f91cab9943f7e1a0fe4259e706 |
30-Jun-2008 |
Dan Gohman <gohman@apple.com> |
Replace some std::vectors that showed up in heap profiling with
SmallVectors. Change the signature of TargetLowering::LowerArguments
to avoid returning a vector by value, and update the two targets
which still use this directly, Sparc and IA64, accordingly.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52917 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 117b64b3f8277e8882d711ea859bed380a3e6f14 |
30-Jun-2008 |
Dan Gohman <gohman@apple.com> |
Correct the allocation size for CCState's UsedRegs member, which
only needs one bit for each register. UsedRegs is a SmallVector
sized at 16, so this eliminates a heap allocation/free for every
call and return processed by Legalize on most targets.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52915 91177308-0d34-0410-b5e6-96231b3b80d8
allingConvLower.cpp
|
| a1ee9e855c4c0dcb317bd222f31fb0558ef04958 |
30-Jun-2008 |
Dan Gohman <gohman@apple.com> |
Correct the allocation size for CCState's UsedRegs member, which
only needs one bit for each register. UsedRegs is a SmallVector
sized at 16, so this eliminates a heap allocation/free for every
call and return processed by Legalize on most targets.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52915 91177308-0d34-0410-b5e6-96231b3b80d8
allingConvLower.cpp
|
| 6f7e1cddf63f91af84996d59cdb5809088ac3fe3 |
30-Jun-2008 |
Duncan Sands <baldrick@free.fr> |
ExpungeNode is only needed for new nodes! This
fixes CodeGen/PowerPC/2008-06-19-LegalizerCrash.ll
when using the new LegalizeTypes infrastructure.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52903 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeTypes.cpp
|
| 14d6be397cba6f3c6a18d58bf2be31830a68804a |
30-Jun-2008 |
Duncan Sands <baldrick@free.fr> |
ExpungeNode is only needed for new nodes! This
fixes CodeGen/PowerPC/2008-06-19-LegalizerCrash.ll
when using the new LegalizeTypes infrastructure.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52903 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeTypes.cpp
|
| d3ca9fc9984d036146886a40ad3f73aaf7a424eb |
30-Jun-2008 |
Duncan Sands <baldrick@free.fr> |
Support for VAARG. As noted in a comment, this is
wrong for types like x86 long double and i1, but
no worse than what is done in LegalizeDAG.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52898 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeIntegerTypes.cpp
egalizeTypes.h
|
| b8b42275d8f3f3a191b5aeb20277d12248534d4c |
30-Jun-2008 |
Duncan Sands <baldrick@free.fr> |
Support for VAARG. As noted in a comment, this is
wrong for types like x86 long double and i1, but
no worse than what is done in LegalizeDAG.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52898 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeIntegerTypes.cpp
egalizeTypes.h
|
| 7fc8ab81f5f46dcba0f76b1c546a1d11ccbebe26 |
30-Jun-2008 |
Duncan Sands <baldrick@free.fr> |
Support for promoting select_cc operands.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52895 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeIntegerTypes.cpp
egalizeTypes.h
|
| b6e31d36beabbacadb07d03ca172513c6a8d131f |
30-Jun-2008 |
Duncan Sands <baldrick@free.fr> |
Support for promoting select_cc operands.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52895 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeIntegerTypes.cpp
egalizeTypes.h
|
| f9516208e57364ab1e7d8748af1f59a2ea5fb572 |
30-Jun-2008 |
Duncan Sands <baldrick@free.fr> |
Revert the SelectionDAG optimization that makes
it impossible to create a MERGE_VALUES node with
only one result: sometimes it is useful to be able
to create a node with only one result out of one of
the results of a node with more than one result, for
example because the new node will eventually be used
to replace a one-result node using ReplaceAllUsesWith,
cf X86TargetLowering::ExpandFP_TO_SINT. On the other
hand, most users of MERGE_VALUES don't need this and
for them the optimization was valuable. So add a new
utility method getMergeValues for creating MERGE_VALUES
nodes which by default performs the optimization.
Change almost everywhere to use getMergeValues (and
tidy some stuff up at the same time).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52893 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
electionDAG.cpp
electionDAGISel.cpp
|
| f19591c91ec39496d58bf4835640d25abc026da9 |
30-Jun-2008 |
Duncan Sands <baldrick@free.fr> |
Revert the SelectionDAG optimization that makes
it impossible to create a MERGE_VALUES node with
only one result: sometimes it is useful to be able
to create a node with only one result out of one of
the results of a node with more than one result, for
example because the new node will eventually be used
to replace a one-result node using ReplaceAllUsesWith,
cf X86TargetLowering::ExpandFP_TO_SINT. On the other
hand, most users of MERGE_VALUES don't need this and
for them the optimization was valuable. So add a new
utility method getMergeValues for creating MERGE_VALUES
nodes which by default performs the optimization.
Change almost everywhere to use getMergeValues (and
tidy some stuff up at the same time).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52893 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
electionDAG.cpp
electionDAGISel.cpp
|
| 0ff39b3feb10477c224138156941234f5fa46f58 |
30-Jun-2008 |
Evan Cheng <evan.cheng@apple.com> |
- Re-apply 52748 and friends with fix. GetConstantStringInfo() returns an empty string for ConstantAggregateZero case which surprises selectiondag.
- Correctly handle memcpy from constant string which is zero-initialized.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52891 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 833501d6dd954a79e24dee9bc266f02274ea0c22 |
30-Jun-2008 |
Evan Cheng <evan.cheng@apple.com> |
- Re-apply 52748 and friends with fix. GetConstantStringInfo() returns an empty string for ConstantAggregateZero case which surprises selectiondag.
- Correctly handle memcpy from constant string which is zero-initialized.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52891 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 80c1a5622a26794873b0d44e27c04926cd6c6be1 |
30-Jun-2008 |
Chris Lattner <sabre@nondot.org> |
Implement split and scalarize for SELECT_CC, fixing PR2504
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52887 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| c74714523d746f78b2b2c519cea065060aa6f886 |
30-Jun-2008 |
Chris Lattner <sabre@nondot.org> |
Implement split and scalarize for SELECT_CC, fixing PR2504
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52887 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 6d116bc7ced56a820d33b0dd35ee36af8a810eab |
29-Jun-2008 |
Anton Korobeynikov <asl@math.spbu.ru> |
Revert (52748 and friends):
Move GetConstantStringInfo to lib/Analysis. Remove
string output routine from Constant. Update all
callers. Change debug intrinsic api slightly to
accomodate move of routine, these now return values
instead of strings.
This unbreaks llvm-gcc bootstrap.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52884 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 9480db79170be31a39f639e2880303824f1b727c |
29-Jun-2008 |
Anton Korobeynikov <asl@math.spbu.ru> |
Revert (52748 and friends):
Move GetConstantStringInfo to lib/Analysis. Remove
string output routine from Constant. Update all
callers. Change debug intrinsic api slightly to
accomodate move of routine, these now return values
instead of strings.
This unbreaks llvm-gcc bootstrap.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52884 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 03a5707955788fc333c6767c054341b12075eff9 |
28-Jun-2008 |
Chris Lattner <sabre@nondot.org> |
Really fix the bootstrap failure.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52854 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 12cc93b7b21304912b47600ab30bd33c6e7089c9 |
28-Jun-2008 |
Chris Lattner <sabre@nondot.org> |
Really fix the bootstrap failure.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52854 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| b746b82113df707df9555450991eab75b18ffa1b |
28-Jun-2008 |
Chris Lattner <sabre@nondot.org> |
Add back the capability to include nul characters in strings with
GetConstantStringInfo. This will hopefully restore llvm-gcc to
happy bootstrap land.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52851 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 9575737397ad43c8e3ba5960afc86a6a7d6cd92e |
28-Jun-2008 |
Chris Lattner <sabre@nondot.org> |
Add back the capability to include nul characters in strings with
GetConstantStringInfo. This will hopefully restore llvm-gcc to
happy bootstrap land.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52851 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 77455617fbc5e06591187be83aa349f6be8a95f8 |
28-Jun-2008 |
Dan Gohman <gohman@apple.com> |
When folding a bitcast into a load or store, preserve the alignment
information of the original load or store, which is checked to be
at least as good, and possibly better.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52849 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 55a11de4de3c9da6bb48695174b615db6b4fa720 |
28-Jun-2008 |
Dan Gohman <gohman@apple.com> |
When folding a bitcast into a load or store, preserve the alignment
information of the original load or store, which is checked to be
at least as good, and possibly better.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52849 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 07c68f9b6f2d1009f8c239c27e351fd8246879f5 |
27-Jun-2008 |
Chris Lattner <sabre@nondot.org> |
simplify this check, GetConstantStringInfo validates that a
global is constant already. No functionality change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52812 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 915da66f02e0208cad90a01ac9f7a9e01dc1fc8d |
27-Jun-2008 |
Chris Lattner <sabre@nondot.org> |
simplify this check, GetConstantStringInfo validates that a
global is constant already. No functionality change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52812 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 305635abeae1d20519b60856c89479e8b7b5d4dd |
27-Jun-2008 |
Bill Wendling <isanbard@gmail.com> |
Refactor the DebugInfoDesc stuff out of the MachineModuleInfo file. Clean up
some uses of std::vector, where it's return std::vector by value. Yuck!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52800 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| e15b119252ef67b84346bf18fd32365834d62602 |
27-Jun-2008 |
Bill Wendling <isanbard@gmail.com> |
Refactor the DebugInfoDesc stuff out of the MachineModuleInfo file. Clean up
some uses of std::vector, where it's return std::vector by value. Yuck!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52800 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| f77e46be6d7c15656009c1e96423c4cdc3e60aa2 |
26-Jun-2008 |
Chris Lattner <sabre@nondot.org> |
duncan points out that isOperationLegal includes a check for
type legality. Thanks Duncan!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52786 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 9532f02ba80b8149c8c74c74f89248f47a7d9c93 |
26-Jun-2008 |
Chris Lattner <sabre@nondot.org> |
duncan points out that isOperationLegal includes a check for
type legality. Thanks Duncan!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52786 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 0d2b0aba424bd3959bb5c807873def8f53e57a3c |
26-Jun-2008 |
Eric Christopher <echristo@apple.com> |
Move GetConstantStringInfo to lib/Analysis. Remove
string output routine from Constant. Update all
callers. Change debug intrinsic api slightly to
accomodate move of routine, these now return values
instead of strings.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52748 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 3e73cd98c44d52f50e91bbad8267c68c9cdf906e |
26-Jun-2008 |
Eric Christopher <echristo@apple.com> |
Move GetConstantStringInfo to lib/Analysis. Remove
string output routine from Constant. Update all
callers. Change debug intrinsic api slightly to
accomodate move of routine, these now return values
instead of strings.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52748 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| cda8875433ef74c39c4151d1a58df0588168b2e2 |
26-Jun-2008 |
Chris Lattner <sabre@nondot.org> |
when we know the signbit of an input to uint_to_fp is zero,
change it to sint_to_fp on targets where that is cheaper (and
visaversa of course). This allows us to compile uint_to_fp to:
_test:
movl 4(%esp), %eax
shrl $23, %eax
cvtsi2ss %eax, %xmm0
movl 8(%esp), %eax
movss %xmm0, (%eax)
ret
instead of:
.align 3
LCPI1_0: ## double
.long 0 ## double least significant word 4.5036e+15
.long 1127219200 ## double most significant word 4.5036e+15
.text
.align 4,0x90
.globl _test
_test:
subl $12, %esp
movl 16(%esp), %eax
shrl $23, %eax
movl %eax, (%esp)
movl $1127219200, 4(%esp)
movsd (%esp), %xmm0
subsd LCPI1_0, %xmm0
cvtsd2ss %xmm0, %xmm0
movl 20(%esp), %eax
movss %xmm0, (%eax)
addl $12, %esp
ret
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52747 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 8e0e2bdc2b04f49b23bfced688b02162ea842683 |
26-Jun-2008 |
Chris Lattner <sabre@nondot.org> |
when we know the signbit of an input to uint_to_fp is zero,
change it to sint_to_fp on targets where that is cheaper (and
visaversa of course). This allows us to compile uint_to_fp to:
_test:
movl 4(%esp), %eax
shrl $23, %eax
cvtsi2ss %eax, %xmm0
movl 8(%esp), %eax
movss %xmm0, (%eax)
ret
instead of:
.align 3
LCPI1_0: ## double
.long 0 ## double least significant word 4.5036e+15
.long 1127219200 ## double most significant word 4.5036e+15
.text
.align 4,0x90
.globl _test
_test:
subl $12, %esp
movl 16(%esp), %eax
shrl $23, %eax
movl %eax, (%esp)
movl $1127219200, 4(%esp)
movsd (%esp), %xmm0
subsd LCPI1_0, %xmm0
cvtsd2ss %xmm0, %xmm0
movl 20(%esp), %eax
movss %xmm0, (%eax)
addl $12, %esp
ret
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52747 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| ab26227c8c9adce91a606a3691d4da08a9c8551c |
25-Jun-2008 |
Evan Cheng <evan.cheng@apple.com> |
- Fix a x86 vector isel bug: illegal transformation of a vector_shuffle into a
shift.
- Add a readme entry for a missing vector_shuffle optimization that results in
awful codegen.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52740 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 57db53ba66a5d7dfc7361df50bdf635fa94f4743 |
25-Jun-2008 |
Evan Cheng <evan.cheng@apple.com> |
- Fix a x86 vector isel bug: illegal transformation of a vector_shuffle into a
shift.
- Add a readme entry for a missing vector_shuffle optimization that results in
awful codegen.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52740 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 041cde26eaf4ef6171ff1a44aeedd08d7a1cba6c |
25-Jun-2008 |
Duncan Sands <baldrick@free.fr> |
Add support for expanding PPC 128 bit floats.
For this it is convenient to permit floats to
be used with EXTRACT_ELEMENT, so I tweaked
things to allow that. I also added libcalls
for ppcf128 to i32 forms of FP_TO_XINT, since
they exist in libgcc and this case can certainly
occur (and does occur in the testsuite) - before
the i64 libcall was being used. Also, the
XINT_TO_FP result seemed to be wrong when
the argument is an i128: the wrong fudge
factor was added (the i32 and i64 cases were
handled directly, but the i128 code fell
through to some generic softening code which
seemed to think it was i64 to f32!). So I
fixed it by adding a fudge factor that I
found in my breakfast cereal.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52739 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeFloatTypes.cpp
egalizeTypes.h
electionDAG.cpp
argetLowering.cpp
|
| 1568af892e006cb64363b5e2d23e1098005e7da2 |
25-Jun-2008 |
Duncan Sands <baldrick@free.fr> |
Add support for expanding PPC 128 bit floats.
For this it is convenient to permit floats to
be used with EXTRACT_ELEMENT, so I tweaked
things to allow that. I also added libcalls
for ppcf128 to i32 forms of FP_TO_XINT, since
they exist in libgcc and this case can certainly
occur (and does occur in the testsuite) - before
the i64 libcall was being used. Also, the
XINT_TO_FP result seemed to be wrong when
the argument is an i128: the wrong fudge
factor was added (the i32 and i64 cases were
handled directly, but the i128 code fell
through to some generic softening code which
seemed to think it was i64 to f32!). So I
fixed it by adding a fudge factor that I
found in my breakfast cereal.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52739 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeFloatTypes.cpp
egalizeTypes.h
electionDAG.cpp
argetLowering.cpp
|
| 11ac797f5ed142f11aafde3dd76c28a73d84282e |
25-Jun-2008 |
Duncan Sands <baldrick@free.fr> |
Add/complete support for integer and float
select_cc and friends. This code could be
factorized a bit but I'm not sure that it's
worth it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52724 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeFloatTypes.cpp
egalizeIntegerTypes.cpp
egalizeTypes.h
|
| 2499e1da9c01b9ef87b30956aec5546da1852ec2 |
25-Jun-2008 |
Duncan Sands <baldrick@free.fr> |
Add/complete support for integer and float
select_cc and friends. This code could be
factorized a bit but I'm not sure that it's
worth it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52724 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeFloatTypes.cpp
egalizeIntegerTypes.cpp
egalizeTypes.h
|
| fd4418fc9b4725c44210c169c4d6500be468ca70 |
25-Jun-2008 |
Dan Gohman <gohman@apple.com> |
Remove the OrigVT member from AtomicSDNode, as it is redundant with
the base SDNode's VTList.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52722 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
electionDAG.cpp
electionDAGISel.cpp
|
| c70fa75851d6d762833c7d21a5c7790b585e6147 |
25-Jun-2008 |
Dan Gohman <gohman@apple.com> |
Remove the OrigVT member from AtomicSDNode, as it is redundant with
the base SDNode's VTList.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52722 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
electionDAG.cpp
electionDAGISel.cpp
|
| 28873106309db515d58889a4c4fa3e0a92d1b60e |
25-Jun-2008 |
Mon P Wang <wangmp@apple.com> |
Added MemOperands to Atomic operations since Atomics touches memory.
Added abstract class MemSDNode for any Node that have an associated MemOperand
Changed atomic.lcs => atomic.cmp.swap, atomic.las => atomic.load.add, and
atomic.lss => atomic.load.sub
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52706 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
electionDAG.cpp
electionDAGISel.cpp
|
| 6bde9ec4129ed4b265c5b172cfe9b34d1e0247d2 |
25-Jun-2008 |
Mon P Wang <wangmp@apple.com> |
Added MemOperands to Atomic operations since Atomics touches memory.
Added abstract class MemSDNode for any Node that have an associated MemOperand
Changed atomic.lcs => atomic.cmp.swap, atomic.las => atomic.load.add, and
atomic.lss => atomic.load.sub
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52706 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
electionDAG.cpp
electionDAGISel.cpp
|
| aabdded3b4e8b87e586c6fed7d0f1d6906eb3351 |
24-Jun-2008 |
Dan Gohman <gohman@apple.com> |
Use the new PriorityQueue in ScheduleDAGList too, which also
needs arbitrary-element removal.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52654 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGList.cpp
|
| f02ae79c808c7be63992f2c5042af3bd1c5c6bf2 |
24-Jun-2008 |
Dan Gohman <gohman@apple.com> |
Use the new PriorityQueue in ScheduleDAGList too, which also
needs arbitrary-element removal.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52654 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGList.cpp
|
| 8cb8245cf117fc4a4f0a6549d9a773a12895550c |
23-Jun-2008 |
Dan Gohman <gohman@apple.com> |
Move a DenseMap's declaration outside of a loop, and just call
clear() on each iteration. This avoids allocating and deallocating
all of DenseMap's memory on each iteration.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52642 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGRRList.cpp
|
| 3941fe11da8ffc3a5a0c444423ee056acfa3231c |
23-Jun-2008 |
Dan Gohman <gohman@apple.com> |
Move a DenseMap's declaration outside of a loop, and just call
clear() on each iteration. This avoids allocating and deallocating
all of DenseMap's memory on each iteration.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52642 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGRRList.cpp
|
| 0a4627d71f8f836558ef05c9739b560e82412687 |
23-Jun-2008 |
Dan Gohman <gohman@apple.com> |
Duncan pointed out this code could be tidied.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52624 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| edb43e7f3dc23f60f50d3524a1329eabf2b291dc |
23-Jun-2008 |
Dan Gohman <gohman@apple.com> |
Duncan pointed out this code could be tidied.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52624 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| e9c80f4d576bf1ff682958d447c1a60fa9348da3 |
23-Jun-2008 |
Duncan Sands <baldrick@free.fr> |
Port some integer multiplication fixes from LegalizeDAG.
Bail out with an error if there is no libcall available
for the given size of integer.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52622 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeIntegerTypes.cpp
|
| 9bdaa203bed2e17b18735b99bc1ceba28646a96c |
23-Jun-2008 |
Duncan Sands <baldrick@free.fr> |
Port some integer multiplication fixes from LegalizeDAG.
Bail out with an error if there is no libcall available
for the given size of integer.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52622 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeIntegerTypes.cpp
|
| 4a307ecce68f90e0eebf1ded52b947816cdc2304 |
23-Jun-2008 |
Duncan Sands <baldrick@free.fr> |
Support for expanding the result of EXTRACT_ELEMENT.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52621 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeFloatTypes.cpp
egalizeIntegerTypes.cpp
egalizeTypes.h
egalizeTypesGeneric.cpp
|
| 5275afbfb6ae643383456cf4293041d2c11c6158 |
23-Jun-2008 |
Duncan Sands <baldrick@free.fr> |
Support for expanding the result of EXTRACT_ELEMENT.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52621 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeFloatTypes.cpp
egalizeIntegerTypes.cpp
egalizeTypes.h
egalizeTypesGeneric.cpp
|
| ab09b7e8f34075c1759127a113f41bdf921f4034 |
23-Jun-2008 |
Duncan Sands <baldrick@free.fr> |
Cleanup up LegalizeTypes handling of loads and
stores.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52620 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeFloatTypes.cpp
egalizeIntegerTypes.cpp
egalizeTypes.h
egalizeTypesGeneric.cpp
egalizeVectorTypes.cpp
|
| f6a721c7a51d15f54d103e3f0d9ac2df4cf255c7 |
23-Jun-2008 |
Duncan Sands <baldrick@free.fr> |
Cleanup up LegalizeTypes handling of loads and
stores.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52620 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeFloatTypes.cpp
egalizeIntegerTypes.cpp
egalizeTypes.h
egalizeTypesGeneric.cpp
egalizeVectorTypes.cpp
|
| 69bfb15ecd71881ec8d01be94af99b6d90d2fe01 |
22-Jun-2008 |
Duncan Sands <baldrick@free.fr> |
Make custom lowering of ADD work correctly. This
fixes PR2476; patch by Richard Osborne. The same
problem exists for a bunch of other operators, but
I'm ignoring this because they will be automagically
fixed when the new LegalizeTypes infrastructure lands,
since it already solves this problem centrally.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52610 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 4c3885b732d7f8b882813ad8f7f5ce526bda3984 |
22-Jun-2008 |
Duncan Sands <baldrick@free.fr> |
Make custom lowering of ADD work correctly. This
fixes PR2476; patch by Richard Osborne. The same
problem exists for a bunch of other operators, but
I'm ignoring this because they will be automagically
fixed when the new LegalizeTypes infrastructure lands,
since it already solves this problem centrally.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52610 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 56867520990a4fea1353d55f71bb74a0126554e6 |
22-Jun-2008 |
Dan Gohman <gohman@apple.com> |
Simplify some getNode calls.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52604 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 6d4bb112c5fbd538b814bac2d241e1f718f711fa |
22-Jun-2008 |
Dan Gohman <gohman@apple.com> |
Simplify some getNode calls.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52604 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 2f1d3108e481758da66662f72673741da86312da |
22-Jun-2008 |
Dan Gohman <gohman@apple.com> |
canClobberPhysRegDefs shouldn't called without checking hasPhysRegDefs;
check this with an assert.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52603 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGRRList.cpp
|
| 3c7b7d2b5b0ce8b1f5605e4d06bef8a7b4663a6c |
22-Jun-2008 |
Dan Gohman <gohman@apple.com> |
canClobberPhysRegDefs shouldn't called without checking hasPhysRegDefs;
check this with an assert.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52603 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGRRList.cpp
|
| 317adcc9c6b29fb491d615996ba70b5c415a9eb2 |
22-Jun-2008 |
Dan Gohman <gohman@apple.com> |
Use clear() to zero an existing APInt.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52601 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 75e24fbd4929f09370b005d9926dcc323a61a41f |
22-Jun-2008 |
Dan Gohman <gohman@apple.com> |
Use clear() to zero an existing APInt.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52601 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 8d96144b0e9688a7d252be877d08c0699f879d70 |
21-Jun-2008 |
Dan Gohman <gohman@apple.com> |
Remove a redundant return.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52585 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAG.cpp
|
| 5c3794ea2a5e703834a43d8441faf8dbe8386f50 |
21-Jun-2008 |
Dan Gohman <gohman@apple.com> |
Remove a redundant return.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52585 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAG.cpp
|
| 94d7a5f8156e62532870fbaf197377b34e52ff2a |
21-Jun-2008 |
Dan Gohman <gohman@apple.com> |
Remove ScheduleDAG's SUnitMap altogether. Instead, use SDNode's NodeId
field, which is otherwise unused after instruction selection, as an index
into the SUnit array.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52583 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAG.cpp
cheduleDAGList.cpp
cheduleDAGRRList.cpp
electionDAGPrinter.cpp
|
| 018d7b7b844b0f3a439defbc4636b41ee1365247 |
21-Jun-2008 |
Dan Gohman <gohman@apple.com> |
Remove ScheduleDAG's SUnitMap altogether. Instead, use SDNode's NodeId
field, which is otherwise unused after instruction selection, as an index
into the SUnit array.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52583 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAG.cpp
cheduleDAGList.cpp
cheduleDAGRRList.cpp
electionDAGPrinter.cpp
|
| 3627e34486db088661bc7fb6c0dde6a18a543217 |
21-Jun-2008 |
Dan Gohman <gohman@apple.com> |
Add a priority queue class, which is a wrapper around std::priority_queue
and provides fairly efficient removal of arbitrary elements. Switch
ScheduleDAGRRList from std::set to this new priority queue.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52582 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAG.cpp
cheduleDAGRRList.cpp
|
| 65ffc0df1c43c46b203e6ff88e53c41f33e21aea |
21-Jun-2008 |
Dan Gohman <gohman@apple.com> |
Add a priority queue class, which is a wrapper around std::priority_queue
and provides fairly efficient removal of arbitrary elements. Switch
ScheduleDAGRRList from std::set to this new priority queue.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52582 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAG.cpp
cheduleDAGRRList.cpp
|
| a1ace76c70ae5332d6f33fce5c0c1e2fdb8cca11 |
21-Jun-2008 |
Duncan Sands <baldrick@free.fr> |
Support for load/store of expanded float types. I
don't know if a truncating store is possible here,
but added support for it anyway.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52577 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeFloatTypes.cpp
egalizeIntegerTypes.cpp
egalizeTypes.h
|
| 0d84c348ed83b6450c6d1a9dba3934eff5c5eaec |
21-Jun-2008 |
Duncan Sands <baldrick@free.fr> |
Support for load/store of expanded float types. I
don't know if a truncating store is possible here,
but added support for it anyway.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52577 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeFloatTypes.cpp
egalizeIntegerTypes.cpp
egalizeTypes.h
|
| 4c8c83022b501759d8559e224c84ae2a9921ba41 |
21-Jun-2008 |
Dan Gohman <gohman@apple.com> |
Change ScheduleDAG's SUnitMap from DenseMap<SDNode*, vector<SUnit*> >
to DenseMap<SDNode*, SUnit*>, and adjust the way cloned SUnit nodes are
handled so that only the original node needs to be in the map.
This speeds up llc on 447.dealII.llvm.bc by about 2%.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52576 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAG.cpp
cheduleDAGList.cpp
cheduleDAGRRList.cpp
electionDAGPrinter.cpp
|
| ab16291b9f0afc54993f31c5ba171c9dd7cb4049 |
21-Jun-2008 |
Dan Gohman <gohman@apple.com> |
Change ScheduleDAG's SUnitMap from DenseMap<SDNode*, vector<SUnit*> >
to DenseMap<SDNode*, SUnit*>, and adjust the way cloned SUnit nodes are
handled so that only the original node needs to be in the map.
This speeds up llc on 447.dealII.llvm.bc by about 2%.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52576 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAG.cpp
cheduleDAGList.cpp
cheduleDAGRRList.cpp
electionDAGPrinter.cpp
|
| 16c6859651d08946b769ad44f163216ad124175a |
21-Jun-2008 |
Dan Gohman <gohman@apple.com> |
Simplify some template parameterization.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52571 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGRRList.cpp
|
| 6fe96037ff0e10b513259c13ae0627f8f5aad592 |
21-Jun-2008 |
Dan Gohman <gohman@apple.com> |
Simplify some template parameterization.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52571 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGRRList.cpp
|
| 78cd649ad326f79a1f8424ca2b63cea3239a9a52 |
20-Jun-2008 |
Duncan Sands <baldrick@free.fr> |
Share some code that is common between integer and
float expansion (and sometimes vector splitting too).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52548 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeFloatTypes.cpp
egalizeIntegerTypes.cpp
egalizeTypes.cpp
egalizeTypes.h
egalizeTypesGeneric.cpp
egalizeVectorTypes.cpp
|
| 7c667d92c49bdb8938603bf0ff5ee3158945ea25 |
20-Jun-2008 |
Duncan Sands <baldrick@free.fr> |
Share some code that is common between integer and
float expansion (and sometimes vector splitting too).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52548 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeFloatTypes.cpp
egalizeIntegerTypes.cpp
egalizeTypes.cpp
egalizeTypes.h
egalizeTypesGeneric.cpp
egalizeVectorTypes.cpp
|
| 4fc4fd657d4266059dac3849133a3a351b03d99d |
20-Jun-2008 |
Duncan Sands <baldrick@free.fr> |
Rename the operation of turning a float type into an
integer of the same type. Before it was "promotion",
but this is confusing because it is quite different
to promotion of integers. Call it "softening" instead,
inspired by "soft float".
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52546 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeFloatTypes.cpp
egalizeIntegerTypes.cpp
egalizeTypes.cpp
egalizeTypes.h
egalizeVectorTypes.cpp
|
| 8f036b4ae53d52851497a9ddca9f5e3ab77d8fd1 |
20-Jun-2008 |
Duncan Sands <baldrick@free.fr> |
Rename the operation of turning a float type into an
integer of the same type. Before it was "promotion",
but this is confusing because it is quite different
to promotion of integers. Call it "softening" instead,
inspired by "soft float".
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52546 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeFloatTypes.cpp
egalizeIntegerTypes.cpp
egalizeTypes.cpp
egalizeTypes.h
egalizeVectorTypes.cpp
|
| 3461cc9e9842c7bce46b9d6e114ff8e44d8ba7b9 |
20-Jun-2008 |
Dan Gohman <gohman@apple.com> |
Clean up some uses of std::distance, now that we have allnodes_size.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52545 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
cheduleDAG.cpp
|
| 17495ded2595481ff1ba2aa9299b04f8397bc913 |
20-Jun-2008 |
Dan Gohman <gohman@apple.com> |
Clean up some uses of std::distance, now that we have allnodes_size.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52545 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
cheduleDAG.cpp
|
| ab8ec0a26caa754f0376dbdede3a33ad84f23e21 |
20-Jun-2008 |
Dan Gohman <gohman@apple.com> |
Teach ReturnInst lowering about aggregate return values.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52522 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 4f4a3493984b5c0c21b11f70ac4bc0bfad47bbf1 |
20-Jun-2008 |
Dan Gohman <gohman@apple.com> |
Teach ReturnInst lowering about aggregate return values.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52522 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| dded0fd398bf744454b2c9c95b68f4a27025f880 |
20-Jun-2008 |
Dan Gohman <gohman@apple.com> |
Fix the index calculations for the extractvalue lowering code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52517 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 4ec23c4afb2a38b4ca09c50bd58ac443e61d0919 |
20-Jun-2008 |
Dan Gohman <gohman@apple.com> |
Fix the index calculations for the extractvalue lowering code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52517 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 8f36f6d11761246bb4bd4ae1be88a58ba24d96b0 |
20-Jun-2008 |
Dan Gohman <gohman@apple.com> |
Simplify the ComputeLinearIndex logic and fix a few bugs.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52516 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| b23f4f1131c7009cbfe647e0c0be43da582d9a19 |
20-Jun-2008 |
Dan Gohman <gohman@apple.com> |
Simplify the ComputeLinearIndex logic and fix a few bugs.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52516 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| c8af52c8980fa4a06f24e6fc08678ff8378088a1 |
20-Jun-2008 |
Evan Cheng <evan.cheng@apple.com> |
ISD::UNDEF should be expanded recursively / iteratively.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52508 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| b7ba44b44eb7feec1baab61778e044244344e380 |
20-Jun-2008 |
Evan Cheng <evan.cheng@apple.com> |
ISD::UNDEF should be expanded recursively / iteratively.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52508 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 69b01e92a29ce6d7e435171aeea3fbc987b81586 |
17-Jun-2008 |
Duncan Sands <baldrick@free.fr> |
Split type expansion into ExpandInteger and ExpandFloat
rather than bundling them together. Rename FloatToInt
to PromoteFloat (better, if not perfect). Reorganize
files by types rather than by operations.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52408 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeFloatTypes.cpp
egalizeIntegerTypes.cpp
egalizeTypes.cpp
egalizeTypes.h
egalizeTypesExpand.cpp
egalizeTypesFloatToInt.cpp
egalizeTypesPromote.cpp
egalizeTypesScalarize.cpp
egalizeTypesSplit.cpp
egalizeVectorTypes.cpp
|
| 1947a38d00ef1c405ca32611f5443e91814ca5d4 |
17-Jun-2008 |
Duncan Sands <baldrick@free.fr> |
Split type expansion into ExpandInteger and ExpandFloat
rather than bundling them together. Rename FloatToInt
to PromoteFloat (better, if not perfect). Reorganize
files by types rather than by operations.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52408 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeFloatTypes.cpp
egalizeIntegerTypes.cpp
egalizeTypes.cpp
egalizeTypes.h
egalizeTypesExpand.cpp
egalizeTypesFloatToInt.cpp
egalizeTypesPromote.cpp
egalizeTypesScalarize.cpp
egalizeTypesSplit.cpp
egalizeVectorTypes.cpp
|
| ead0d88ad7659dabd66cc3149af97d98256fca84 |
17-Jun-2008 |
Chris Lattner <sabre@nondot.org> |
add a new -enable-value-prop flag for llcbeta, that enables propagation
of value info (sign/zero ext info) from one MBB to another. This doesn't
handle much right now because of two limitations:
1) only handles zext/sext, not random bit propagation (no assert exists
for this)
2) doesn't handle phis.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52383 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 68068cc986bf56a5a8dd748313877042a15bb4b8 |
17-Jun-2008 |
Chris Lattner <sabre@nondot.org> |
add a new -enable-value-prop flag for llcbeta, that enables propagation
of value info (sign/zero ext info) from one MBB to another. This doesn't
handle much right now because of two limitations:
1) only handles zext/sext, not random bit propagation (no assert exists
for this)
2) doesn't handle phis.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52383 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| a47c6c37034f4e57bc8187e959da4eadb6e24afa |
17-Jun-2008 |
Duncan Sands <baldrick@free.fr> |
Fix spelling.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52381 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 10fbb3512c60dd1cff8e6e330aab66dbbb5ea642 |
17-Jun-2008 |
Duncan Sands <baldrick@free.fr> |
Fix spelling.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52381 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| ad205a76871b5112a4bf70edca0df9d03b92de49 |
16-Jun-2008 |
Duncan Sands <baldrick@free.fr> |
Allow these transforms for types like i256 while
still excluding types like i1 (not byte sized)
and i120 (loading an i120 requires loading an i64,
an i32, an i16 and an i8, which is expensive).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52310 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 3ea93358820c13b1e28c13e1a04ee9c12cdaa990 |
16-Jun-2008 |
Duncan Sands <baldrick@free.fr> |
Allow these transforms for types like i256 while
still excluding types like i1 (not byte sized)
and i120 (loading an i120 requires loading an i64,
an i32, an i16 and an i8, which is expensive).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52310 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| ec87aa87fea8cc5b5961849a34abb79ef7df64bc |
15-Jun-2008 |
Duncan Sands <baldrick@free.fr> |
The transforms in visitEXTRACT_VECTOR_ELT are
not valid if the load is volatile. Hopefully
all wrong DAG combiner transforms of volatile
loads and stores have now been caught.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52293 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| c218a5aa8938bfc2a48c11b40ba2fad6fdb4484b |
15-Jun-2008 |
Duncan Sands <baldrick@free.fr> |
The transforms in visitEXTRACT_VECTOR_ELT are
not valid if the load is volatile. Hopefully
all wrong DAG combiner transforms of volatile
loads and stores have now been caught.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52293 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 7d0d8460646d1a06ff561775d40123a4cf65bf4d |
15-Jun-2008 |
Duncan Sands <baldrick@free.fr> |
LegalizeTypes support for INSERT_VECTOR_ELT with
a non-constant index.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52292 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeTypes.cpp
egalizeTypes.h
egalizeTypesSplit.cpp
|
| fc2db139e5e1ac954e2f60d1495a832a40d1b705 |
15-Jun-2008 |
Duncan Sands <baldrick@free.fr> |
LegalizeTypes support for INSERT_VECTOR_ELT with
a non-constant index.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52292 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeTypes.cpp
egalizeTypes.h
egalizeTypesSplit.cpp
|
| 184a876ee61dbbd602597f35e18240a5df8f5ee4 |
14-Jun-2008 |
Duncan Sands <baldrick@free.fr> |
Remove a redundant AfterLegalize check. Turn
on some code when !AfterLegalize - but since
this whole code section is turned off by an
"if (0)" it's not really turning anything on.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52276 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 6ae1a063bf798a5991a9d599613a4bc28e0b269e |
14-Jun-2008 |
Duncan Sands <baldrick@free.fr> |
Remove a redundant AfterLegalize check. Turn
on some code when !AfterLegalize - but since
this whole code section is turned off by an
"if (0)" it's not really turning anything on.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52276 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 507a58ac9b20ddcea2e56a014be26b8f8cc0ecb8 |
14-Jun-2008 |
Andrew Lenharth <andrewl@lenharth.org> |
add missing atomic intrinsic from gcc
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52270 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
electionDAG.cpp
electionDAGISel.cpp
|
| af02d599bddfe945ab551f5a934ec0d7ecab3c0b |
14-Jun-2008 |
Andrew Lenharth <alenhar2@cs.uiuc.edu> |
add missing atomic intrinsic from gcc
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52270 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
electionDAG.cpp
electionDAGISel.cpp
|
| d4b9c17fb705c2f58ceef4f37d789ddb56783584 |
13-Jun-2008 |
Duncan Sands <baldrick@free.fr> |
Disable some DAG combiner optimizations that may be
wrong for volatile loads and stores. In fact this
is almost all of them! There are three types of
problems: (1) it is wrong to change the width of
a volatile memory access. These may be used to
do memory mapped i/o, in which case a load can have
an effect even if the result is not used. Consider
loading an i32 but only using the lower 8 bits. It
is wrong to change this into a load of an i8, because
you are no longer tickling the other three bytes. It
is also unwise to make a load/store wider. For
example, changing an i16 load into an i32 load is
wrong no matter how aligned things are, since the
fact of loading an additional 2 bytes can have
i/o side-effects. (2) it is wrong to change the
number of volatile load/stores: they may be counted
by the hardware. (3) it is wrong to change a volatile
load/store that requires one memory access into one
that requires several. For example on x86-32, you
can store a double in one processor operation, but to
store an i64 requires two (two i32 stores). In a
multi-threaded program you may want to bitcast an i64
to a double and store as a double because that will
occur atomically, and be indivisible to other threads.
So it would be wrong to convert the store-of-double
into a store of an i64, because this will become two
i32 stores - no longer atomic. My policy here is
to say that the number of processor operations for
an illegal operation is undefined. So it is alright
to change a store of an i64 (requires at least two
stores; but could be validly lowered to memcpy for
example) into a store of double (one processor op).
In short, if the new store is legal and has the same
size then I say that the transform is ok. It would
also be possible to say that transforms are always
ok if before they were illegal, whether after they
are illegal or not, but that's more awkward to do
and I doubt it buys us anything much.
However this exposed an interesting thing - on x86-32
a store of i64 is considered legal! That is because
operations are marked legal by default, regardless of
whether the type is legal or not. In some ways this
is clever: before type legalization this means that
operations on illegal types are considered legal;
after type legalization there are no illegal types
so now operations are only legal if they really are.
But I consider this to be too cunning for mere mortals.
Better to do things explicitly by testing AfterLegalize.
So I have changed things so that operations with illegal
types are considered illegal - indeed they can never
map to a machine operation. However this means that
the DAG combiner is more conservative because before
it was "accidentally" performing transforms where the
type was illegal because the operation was nonetheless
marked legal. So in a few such places I added a check
on AfterLegalize, which I suppose was actually just
forgotten before. This causes the DAG combiner to do
slightly more than it used to, which resulted in the X86
backend blowing up because it got a slightly surprising
node it wasn't expecting, so I tweaked it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52254 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
egalizeDAG.cpp
|
| 2418becee47126d941d7c1d879df7de9ed20d550 |
13-Jun-2008 |
Duncan Sands <baldrick@free.fr> |
Disable some DAG combiner optimizations that may be
wrong for volatile loads and stores. In fact this
is almost all of them! There are three types of
problems: (1) it is wrong to change the width of
a volatile memory access. These may be used to
do memory mapped i/o, in which case a load can have
an effect even if the result is not used. Consider
loading an i32 but only using the lower 8 bits. It
is wrong to change this into a load of an i8, because
you are no longer tickling the other three bytes. It
is also unwise to make a load/store wider. For
example, changing an i16 load into an i32 load is
wrong no matter how aligned things are, since the
fact of loading an additional 2 bytes can have
i/o side-effects. (2) it is wrong to change the
number of volatile load/stores: they may be counted
by the hardware. (3) it is wrong to change a volatile
load/store that requires one memory access into one
that requires several. For example on x86-32, you
can store a double in one processor operation, but to
store an i64 requires two (two i32 stores). In a
multi-threaded program you may want to bitcast an i64
to a double and store as a double because that will
occur atomically, and be indivisible to other threads.
So it would be wrong to convert the store-of-double
into a store of an i64, because this will become two
i32 stores - no longer atomic. My policy here is
to say that the number of processor operations for
an illegal operation is undefined. So it is alright
to change a store of an i64 (requires at least two
stores; but could be validly lowered to memcpy for
example) into a store of double (one processor op).
In short, if the new store is legal and has the same
size then I say that the transform is ok. It would
also be possible to say that transforms are always
ok if before they were illegal, whether after they
are illegal or not, but that's more awkward to do
and I doubt it buys us anything much.
However this exposed an interesting thing - on x86-32
a store of i64 is considered legal! That is because
operations are marked legal by default, regardless of
whether the type is legal or not. In some ways this
is clever: before type legalization this means that
operations on illegal types are considered legal;
after type legalization there are no illegal types
so now operations are only legal if they really are.
But I consider this to be too cunning for mere mortals.
Better to do things explicitly by testing AfterLegalize.
So I have changed things so that operations with illegal
types are considered illegal - indeed they can never
map to a machine operation. However this means that
the DAG combiner is more conservative because before
it was "accidentally" performing transforms where the
type was illegal because the operation was nonetheless
marked legal. So in a few such places I added a check
on AfterLegalize, which I suppose was actually just
forgotten before. This causes the DAG combiner to do
slightly more than it used to, which resulted in the X86
backend blowing up because it got a slightly surprising
node it wasn't expecting, so I tweaked it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52254 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
egalizeDAG.cpp
|
| edfcf598faab9ce294712551ecf67093acd1c66e |
11-Jun-2008 |
Duncan Sands <baldrick@free.fr> |
Sometimes (rarely) nodes held in LegalizeTypes
maps can be deleted. This happens when RAUW
replaces a node N with another equivalent node
E, deleting the first node. Solve this by
adding (N, E) to ReplacedNodes, which is already
used to remap nodes to replacements. This means
that deleted nodes are being allowed in maps,
which can be delicate: the memory may be reused
for a new node which might get confused with the
old deleted node pointer hanging around in the
maps, so detect this and flush out maps if it
occurs (ExpungeNode). The expunging operation
is expensive, however it never occurs during
a llvm-gcc bootstrap or anywhere in the nightly
testsuite. It occurs three times in "make check":
Alpha/illegal-element-type.ll,
PowerPC/illegal-element-type.ll and
X86/mmx-shift.ll. If expunging proves to be too
expensive then there are other more complicated
ways of solving the problem.
In the normal case this patch adds the overhead
of a few more map lookups, which is hopefully
negligable.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52214 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
egalizeTypes.cpp
egalizeTypes.h
electionDAG.cpp
|
| 3866b1c7d4aee4a039018c21125059385152eee2 |
11-Jun-2008 |
Duncan Sands <baldrick@free.fr> |
Sometimes (rarely) nodes held in LegalizeTypes
maps can be deleted. This happens when RAUW
replaces a node N with another equivalent node
E, deleting the first node. Solve this by
adding (N, E) to ReplacedNodes, which is already
used to remap nodes to replacements. This means
that deleted nodes are being allowed in maps,
which can be delicate: the memory may be reused
for a new node which might get confused with the
old deleted node pointer hanging around in the
maps, so detect this and flush out maps if it
occurs (ExpungeNode). The expunging operation
is expensive, however it never occurs during
a llvm-gcc bootstrap or anywhere in the nightly
testsuite. It occurs three times in "make check":
Alpha/illegal-element-type.ll,
PowerPC/illegal-element-type.ll and
X86/mmx-shift.ll. If expunging proves to be too
expensive then there are other more complicated
ways of solving the problem.
In the normal case this patch adds the overhead
of a few more map lookups, which is hopefully
negligable.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52214 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
egalizeTypes.cpp
egalizeTypes.h
electionDAG.cpp
|
| 9ea3f56d07875ecb4ae2cd5bc14a9563b9742553 |
10-Jun-2008 |
Dan Gohman <gohman@apple.com> |
Teach isGAPlusOffset to respect a GlobalAddressSDNode's offset
value, which is something that apparently isn't used much.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52158 91177308-0d34-0410-b5e6-96231b3b80d8
argetLowering.cpp
|
| 004038485ae911c3e289e43006413802d085452e |
10-Jun-2008 |
Dan Gohman <gohman@apple.com> |
Teach isGAPlusOffset to respect a GlobalAddressSDNode's offset
value, which is something that apparently isn't used much.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52158 91177308-0d34-0410-b5e6-96231b3b80d8
argetLowering.cpp
|
| f5025cfa683b4cfb9f04b1e63dac7364a5dbf900 |
09-Jun-2008 |
Dan Gohman <gohman@apple.com> |
CodeGen support for aggregate-value function arguments.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52156 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 1bb942642c7a94942dace21a884ddcc39217070d |
09-Jun-2008 |
Dan Gohman <gohman@apple.com> |
CodeGen support for aggregate-value function arguments.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52156 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 893076354a9fdb915cda27678570914dfd5732fa |
09-Jun-2008 |
Duncan Sands <baldrick@free.fr> |
Various tweaks related to apint codegen. No functionality
change for non-funky-sized integers.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52151 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
egalizeTypesPromote.cpp
argetLowering.cpp
|
| eedb3bf6a63653ac4c76e5f64764294742b9c70a |
09-Jun-2008 |
Duncan Sands <baldrick@free.fr> |
Various tweaks related to apint codegen. No functionality
change for non-funky-sized integers.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52151 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
egalizeTypesPromote.cpp
argetLowering.cpp
|
| 8a6ccb5f73cf2e490faa181ad6662633b3ee38df |
09-Jun-2008 |
Dan Gohman <gohman@apple.com> |
Handle empty aggregate values.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52150 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 9115c7e89bca18364dba54ec8c7bba2da39b20d8 |
09-Jun-2008 |
Dan Gohman <gohman@apple.com> |
Handle empty aggregate values.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52150 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 8eab8a2798fe74c98703bdeac64661beea0b4dbc |
09-Jun-2008 |
Duncan Sands <baldrick@free.fr> |
Remove some DAG combiner assumptions about sizes
of integer types. Fix the isMask APInt method to
actually work (hopefully) rather than crashing
because it adds apints of different bitwidths.
It looks like isShiftedMask is also broken, but
I'm leaving that one to the APInt people (it is
not used anywhere).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52142 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 6a437fb3735376bcf28fb7d3b4f6d7e44c1d3a34 |
09-Jun-2008 |
Duncan Sands <baldrick@free.fr> |
Remove some DAG combiner assumptions about sizes
of integer types. Fix the isMask APInt method to
actually work (hopefully) rather than crashing
because it adds apints of different bitwidths.
It looks like isShiftedMask is also broken, but
I'm leaving that one to the APInt people (it is
not used anywhere).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52142 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 8e4eb09b1e3571965f49edcdfb56b1375b1b7551 |
08-Jun-2008 |
Duncan Sands <baldrick@free.fr> |
Remove comparison methods for MVT. The main cause
of apint codegen failure is the DAG combiner doing
the wrong thing because it was comparing MVT's using
< rather than comparing the number of bits. Removing
the < method makes this mistake impossible to commit.
Instead, add helper methods for comparing bits and use
them.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52098 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
egalizeDAG.cpp
egalizeTypesExpand.cpp
egalizeTypesFloatToInt.cpp
egalizeTypesScalarize.cpp
egalizeTypesSplit.cpp
electionDAG.cpp
electionDAGISel.cpp
argetLowering.cpp
|
| ec142ee0b2a63ede390353860e0f22201b850d8b |
08-Jun-2008 |
Duncan Sands <baldrick@free.fr> |
Remove comparison methods for MVT. The main cause
of apint codegen failure is the DAG combiner doing
the wrong thing because it was comparing MVT's using
< rather than comparing the number of bits. Removing
the < method makes this mistake impossible to commit.
Instead, add helper methods for comparing bits and use
them.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52098 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
egalizeDAG.cpp
egalizeTypesExpand.cpp
egalizeTypesFloatToInt.cpp
egalizeTypesScalarize.cpp
egalizeTypesSplit.cpp
electionDAG.cpp
electionDAGISel.cpp
argetLowering.cpp
|
| 1d685a46bf0c2f54378bc074c0b874bb7d12032e |
07-Jun-2008 |
Dan Gohman <gohman@apple.com> |
CodeGen support for insertvalue and extractvalue, and for loads and
stores of aggregate values.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52069 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 012bf581771137028c245496f21cae0099c3f2df |
07-Jun-2008 |
Dan Gohman <gohman@apple.com> |
CodeGen support for insertvalue and extractvalue, and for loads and
stores of aggregate values.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52069 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 2d389e8ad7e98fa50f8d021a7669ba0aab07a571 |
07-Jun-2008 |
Owen Anderson <resistor@mac.com> |
Connect successors before creating the DAG node for the branch. This has
no visible functionality change, but enables a future patch where node creation
will update the CFG if it decides to create an unconditional rather than a conditional branch.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52067 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 451a11271e6910c98804acabfe0284ddc5eee348 |
07-Jun-2008 |
Owen Anderson <resistor@mac.com> |
Connect successors before creating the DAG node for the branch. This has
no visible functionality change, but enables a future patch where node creation
will update the CFG if it decides to create an unconditional rather than a conditional branch.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52067 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 3b3adbb7456411957681e590b29697b3af307dd1 |
06-Jun-2008 |
Duncan Sands <baldrick@free.fr> |
Tighten up the abstraction slightly.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52045 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 3f5d243a231822874448d0f6353cdbf8c9f22bf9 |
06-Jun-2008 |
Duncan Sands <baldrick@free.fr> |
Tighten up the abstraction slightly.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52045 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 83ec4b6711980242ef3c55a4fa36b2d7a39c1bfb |
06-Jun-2008 |
Duncan Sands <baldrick@free.fr> |
Wrap MVT::ValueType in a struct to get type safety
and better control the abstraction. Rename the type
to MVT. To update out-of-tree patches, the main
thing to do is to rename MVT::ValueType to MVT, and
rewrite expressions like MVT::getSizeInBits(VT) in
the form VT.getSizeInBits(). Use VT.getSimpleVT()
to extract a MVT::SimpleValueType for use in switch
statements (you will get an assert failure if VT is
an extended value type - these shouldn't exist after
type legalization).
This results in a small speedup of codegen and no
new testsuite failures (x86-64 linux).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52044 91177308-0d34-0410-b5e6-96231b3b80d8
allingConvLower.cpp
AGCombiner.cpp
egalizeDAG.cpp
egalizeTypes.cpp
egalizeTypes.h
egalizeTypesExpand.cpp
egalizeTypesFloatToInt.cpp
egalizeTypesPromote.cpp
egalizeTypesScalarize.cpp
egalizeTypesSplit.cpp
cheduleDAG.cpp
cheduleDAGRRList.cpp
electionDAG.cpp
electionDAGISel.cpp
electionDAGPrinter.cpp
argetLowering.cpp
|
| 92c439168b552f73b1459d8ce1e31975cdca6d2a |
06-Jun-2008 |
Duncan Sands <baldrick@free.fr> |
Wrap MVT::ValueType in a struct to get type safety
and better control the abstraction. Rename the type
to MVT. To update out-of-tree patches, the main
thing to do is to rename MVT::ValueType to MVT, and
rewrite expressions like MVT::getSizeInBits(VT) in
the form VT.getSizeInBits(). Use VT.getSimpleVT()
to extract a MVT::SimpleValueType for use in switch
statements (you will get an assert failure if VT is
an extended value type - these shouldn't exist after
type legalization).
This results in a small speedup of codegen and no
new testsuite failures (x86-64 linux).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52044 91177308-0d34-0410-b5e6-96231b3b80d8
allingConvLower.cpp
AGCombiner.cpp
egalizeDAG.cpp
egalizeTypes.cpp
egalizeTypes.h
egalizeTypesExpand.cpp
egalizeTypesFloatToInt.cpp
egalizeTypesPromote.cpp
egalizeTypesScalarize.cpp
egalizeTypesSplit.cpp
cheduleDAG.cpp
cheduleDAGRRList.cpp
electionDAG.cpp
electionDAGISel.cpp
electionDAGPrinter.cpp
argetLowering.cpp
|
| fb4db316d835fa9774d608ac58336a24c7867192 |
05-Jun-2008 |
Evan Cheng <evan.cheng@apple.com> |
Fix a memcpy lowering bug. Even though the memcpy alignment is smaller than the desired alignment, the frame destination alignment may still be larger than the desired alignment. Don't change its alignment to something smaller.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@51970 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 36cd886d9a864f23b8f6f0231fbbffa5e5256481 |
05-Jun-2008 |
Evan Cheng <evan.cheng@apple.com> |
Fix a memcpy lowering bug. Even though the memcpy alignment is smaller than the desired alignment, the frame destination alignment may still be larger than the desired alignment. Don't change its alignment to something smaller.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@51970 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| ba12f57ebea3a5b3d0711d194e4584937309bc8b |
03-Jun-2008 |
Scott Michel <scottm@aero.org> |
Fix spellnig error
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@51917 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 7b54de0925ad741408f765a9ccf5b89f7d063b23 |
03-Jun-2008 |
Scott Michel <scottm@aero.org> |
Fix spellnig error
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@51917 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 33b625bee429986b2b3bd11108816d256df39334 |
03-Jun-2008 |
Dan Gohman <gohman@apple.com> |
Fold adds and subtracts of zero immediately, instead of waiting
for dagcombine to do this.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@51886 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 3f76aed6b4602554c3b0929fbe8457223302bc3f |
03-Jun-2008 |
Dan Gohman <gohman@apple.com> |
Fold adds and subtracts of zero immediately, instead of waiting
for dagcombine to do this.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@51886 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 8bf61e8c2a39bcf070c39848fea83eda57851ebb |
03-Jun-2008 |
Scott Michel <scottm@aero.org> |
Add necessary 64-bit support so that gcc frontend compiles (mostly). Current
issue is operand promotion for setcc/select... but looks like the fundamental
stuff is implemented for CellSPU.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@51884 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 67224b24594ea0fdb52ad449d9b849fa713a59c2 |
03-Jun-2008 |
Scott Michel <scottm@aero.org> |
Add necessary 64-bit support so that gcc frontend compiles (mostly). Current
issue is operand promotion for setcc/select... but looks like the fundamental
stuff is implemented for CellSPU.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@51884 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 28307418668f68e055688922ff8394d8a1ba8f15 |
31-May-2008 |
Dan Gohman <gohman@apple.com> |
Remove an unused variable.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@51807 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 055c20167c250d35cf81b86d65160241061d9f77 |
31-May-2008 |
Dan Gohman <gohman@apple.com> |
Remove an unused variable.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@51807 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 493e03851d630804830b0439f9a714b08638ab95 |
30-May-2008 |
Dan Gohman <gohman@apple.com> |
Remove an unused variable.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@51721 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 0adb35fab3fbe9094dd38242a3b97dfa4f758b86 |
30-May-2008 |
Dan Gohman <gohman@apple.com> |
Remove an unused variable.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@51721 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 21323f3a829df0e6d9b4566a551619a01e269ba6 |
29-May-2008 |
Dan Gohman <gohman@apple.com> |
Expand small memmovs using inline code. Set the X86 threshold for expanding
memmove to a more plausible value, now that it's actually being used.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@51696 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 42d311cef64ad01eec4e45967dbed33c8aea6b04 |
29-May-2008 |
Dan Gohman <gohman@apple.com> |
Expand small memmovs using inline code. Set the X86 threshold for expanding
memmove to a more plausible value, now that it's actually being used.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@51696 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| f26ffe987cf3643a7bd66bd9f97c34605ba7d08e |
29-May-2008 |
Evan Cheng <evan.cheng@apple.com> |
Implement vector shift up / down and insert zero with ps{rl}lq / ps{rl}ldq.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@51667 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| dea99367632d9e326909dbac319fbe04f70f3697 |
29-May-2008 |
Evan Cheng <evan.cheng@apple.com> |
Implement vector shift up / down and insert zero with ps{rl}lq / ps{rl}ldq.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@51667 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 43e2a035309f4e353a8bd5547d10125414597e74 |
27-May-2008 |
Duncan Sands <baldrick@free.fr> |
Fix some constructs that gcc-4.4 warns about.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@51591 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| f689071811289c4553024e901981734a4afe90fd |
27-May-2008 |
Duncan Sands <baldrick@free.fr> |
Fix some constructs that gcc-4.4 warns about.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@51591 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| ee335e35acf20d1ed5b781546d647c19b608890e |
23-May-2008 |
Dan Gohman <gohman@apple.com> |
Add #includes to make some dependencies explicit.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@51496 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| d408d39f59e8fc2445e2cdf90ee1546b3a9c1c57 |
23-May-2008 |
Dan Gohman <gohman@apple.com> |
Add #includes to make some dependencies explicit.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@51496 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| a332f17c8c80bb457617052fb35a3f2cecd05493 |
23-May-2008 |
Dan Gohman <gohman@apple.com> |
Generalize the new code in instcombine's ComputeNumSignBits for handling
and/or to handle more cases (such as this add-sitofp.ll testcase), and
port it to selectiondag's ComputeNumSignBits.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@51469 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 4afc4259d2a6408f4d58be0d54e30e4ed86325c8 |
23-May-2008 |
Dan Gohman <gohman@apple.com> |
Generalize the new code in instcombine's ComputeNumSignBits for handling
and/or to handle more cases (such as this add-sitofp.ll testcase), and
port it to selectiondag's ComputeNumSignBits.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@51469 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 4fa2a3f0efe0081272b09550fef6251d355047e4 |
23-May-2008 |
Dan Gohman <gohman@apple.com> |
Use isSingleValueType instead of isFirstClassType to
exclude struct and array types.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@51460 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| f9a85a33113be7403c6321c708741036ce04dcc8 |
23-May-2008 |
Dan Gohman <gohman@apple.com> |
Use isSingleValueType instead of isFirstClassType to
exclude struct and array types.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@51460 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| c84941be0af3a721183297ebb5e8511157a0c636 |
20-May-2008 |
Dan Gohman <gohman@apple.com> |
Port the fix for the select operator from instcombine's
ComputeNumSignBits to SelectionDAG's ComputeNumSignBits.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@51348 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 6ffcf26d0ae196b4ddd645a1e43a3e719501d306 |
20-May-2008 |
Dan Gohman <gohman@apple.com> |
Port the fix for the select operator from instcombine's
ComputeNumSignBits to SelectionDAG's ComputeNumSignBits.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@51348 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 1fdfa6aabf0518373030cdc7db16c281c33a35ce |
20-May-2008 |
Dan Gohman <gohman@apple.com> |
Code simplification.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@51345 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 2e0e0cf63f8a7bd4fc6da6851d0a60e7859994b8 |
20-May-2008 |
Dan Gohman <gohman@apple.com> |
Code simplification.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@51345 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 446efddfcd655131bd0ceeacce9c1166e30ed479 |
16-May-2008 |
Evan Cheng <evan.cheng@apple.com> |
If the result of a BIT_CONVERT is a v1* vector, it doesn't mean its source is a v1* vector.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@51192 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 2cc16e768c63832cfabaf3ba69e0f43a148cdffb |
16-May-2008 |
Evan Cheng <evan.cheng@apple.com> |
If the result of a BIT_CONVERT is a v1* vector, it doesn't mean its source is a v1* vector.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@51192 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 419cafb9fb6e77487197933714abec0426ae06c0 |
16-May-2008 |
Duncan Sands <baldrick@free.fr> |
Silence the compiler warning differently. The
original method caused gcc-4.2 to complain.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@51186 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGRRList.cpp
|
| 6517a637609946153088a5d0e37b484968c4ca5c |
16-May-2008 |
Duncan Sands <baldrick@free.fr> |
Silence the compiler warning differently. The
original method caused gcc-4.2 to complain.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@51186 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGRRList.cpp
|
| b434513a20c2df00b8c1cceb4858786fc9baad9e |
15-May-2008 |
Nate Begeman <natebegeman@mac.com> |
Actually scalarize the operand to BIT_CONVERT instead of asking someone to do
something with a v1 type.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@51160 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 17c39753aef7e13d8d52590b38cb60ef16049dd9 |
15-May-2008 |
Nate Begeman <natebegeman@mac.com> |
Actually scalarize the operand to BIT_CONVERT instead of asking someone to do
something with a v1 type.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@51160 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 041e2eb51721bcfecee5d9c9fc409ff185526e47 |
15-May-2008 |
Dan Gohman <gohman@apple.com> |
IR support for extractvalue and insertvalue instructions. Also, begin
moving toward making structs and arrays first-class types.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@51157 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 8055f7781b0430973392a8ddf54142afb9bcdd3d |
15-May-2008 |
Dan Gohman <gohman@apple.com> |
IR support for extractvalue and insertvalue instructions. Also, begin
moving toward making structs and arrays first-class types.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@51157 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| f0df03134e698ea84e9cc1c28a853f83c02560d5 |
15-May-2008 |
Evan Cheng <evan.cheng@apple.com> |
Make use of vector load and store operations to implement memcpy, memmove, and memset. Currently only X86 target is taking advantage of these.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@51140 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 8c59037415ea76be1c05ce4d6a70866e0f50f5b0 |
15-May-2008 |
Evan Cheng <evan.cheng@apple.com> |
Make use of vector load and store operations to implement memcpy, memmove, and memset. Currently only X86 target is taking advantage of these.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@51140 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 97e60d9e8cf83274a1e4ac6443ed6da76d4b6088 |
14-May-2008 |
Evan Cheng <evan.cheng@apple.com> |
Use a better idiom to silence compiler warnings.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@51131 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAG.cpp
|
| a6fe65a41e6af51def437f4348241ca05c096b30 |
14-May-2008 |
Evan Cheng <evan.cheng@apple.com> |
Use a better idiom to silence compiler warnings.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@51131 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAG.cpp
|
| 35213344672fb5215a36c8dd592a7cc7190445fa |
14-May-2008 |
Evan Cheng <evan.cheng@apple.com> |
Really silence compiler warnings.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@51126 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 11193bee277ec4263eafe5884401efaabced9592 |
14-May-2008 |
Evan Cheng <evan.cheng@apple.com> |
Really silence compiler warnings.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@51126 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| b2031145e3e64f5f6189a6ff8eac828a304cb150 |
14-May-2008 |
Evan Cheng <evan.cheng@apple.com> |
Really silence compiler warnings.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@51123 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAG.cpp
|
| 328064990075e03dcb709e735fbdc8dd2134a708 |
14-May-2008 |
Evan Cheng <evan.cheng@apple.com> |
Really silence compiler warnings.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@51123 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAG.cpp
|
| 50871247216dfef8386a112766e972a1792b0b56 |
14-May-2008 |
Evan Cheng <evan.cheng@apple.com> |
Silence some compiler warnings.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@51115 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAG.cpp
cheduleDAGRRList.cpp
electionDAGISel.cpp
|
| aaa364e68d32387a9bbe7c6ab5f16c273f23e68c |
14-May-2008 |
Evan Cheng <evan.cheng@apple.com> |
Silence some compiler warnings.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@51115 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAG.cpp
cheduleDAGRRList.cpp
electionDAGISel.cpp
|
| d64a78c9ed62f2615ca1ea524d1f1942f798c8de |
14-May-2008 |
Dan Gohman <gohman@apple.com> |
When bit-twiddling CondCode values for integer comparisons produces
SETOEQ, is it does with (SETEQ & SETULE), map it to SETEQ.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@51112 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| f1e8e550d891964106ca26667cb83d38d17fb1ae |
14-May-2008 |
Dan Gohman <gohman@apple.com> |
When bit-twiddling CondCode values for integer comparisons produces
SETOEQ, is it does with (SETEQ & SETULE), map it to SETEQ.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@51112 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 9c78a399076f8356a53ee67dca9c78e594e34967 |
14-May-2008 |
Dan Gohman <gohman@apple.com> |
Whitespace cleanups.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@51089 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| e8e4a418b0fb94b4de818c7c58a4bb4e022867cf |
14-May-2008 |
Dan Gohman <gohman@apple.com> |
Whitespace cleanups.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@51089 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 77f0b7a50a08614b5ffd58f1864b68a9a30d0cb0 |
13-May-2008 |
Evan Cheng <evan.cheng@apple.com> |
Instead of a vector load, shuffle and then extract an element. Load the element from address with an offset.
pshufd $1, (%rdi), %xmm0
movd %xmm0, %eax
=>
movl 4(%rdi), %eax
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@51026 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
electionDAG.cpp
|
| 411fc17b569bac71b8d0578174d027663202c203 |
13-May-2008 |
Evan Cheng <evan.cheng@apple.com> |
Instead of a vector load, shuffle and then extract an element. Load the element from address with an offset.
pshufd $1, (%rdi), %xmm0
movd %xmm0, %eax
=>
movl 4(%rdi), %eax
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@51026 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
electionDAG.cpp
|
| 844731a7f1909f55935e3514c9e713a62d67662e |
13-May-2008 |
Dan Gohman <gohman@apple.com> |
Clean up the use of static and anonymous namespaces. This turned up
several things that were neither in an anonymous namespace nor static
but not intended to be global.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@51017 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
electionDAGISel.cpp
|
| 089efffd7d1ca0d10522ace38d36e0a67f4fac2d |
13-May-2008 |
Dan Gohman <gohman@apple.com> |
Clean up the use of static and anonymous namespaces. This turned up
several things that were neither in an anonymous namespace nor static
but not intended to be global.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@51017 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
electionDAGISel.cpp
|
| 0d1704b955f9c7ae20e0b3a35b75aaab26e48cfd |
13-May-2008 |
Nate Begeman <natebegeman@mac.com> |
Teach Legalize how to scalarize VSETCC
Teach X86 a few more vsetcc patterns. Custom lowering for unsupported ones is next.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@51009 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 78ca4f9144ccd3593d3429d370571ad46eefac85 |
13-May-2008 |
Nate Begeman <natebegeman@mac.com> |
Teach Legalize how to scalarize VSETCC
Teach X86 a few more vsetcc patterns. Custom lowering for unsupported ones is next.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@51009 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 9bfa03c6fd8e02b738e0077fd1af7b18eeeeb4c1 |
13-May-2008 |
Evan Cheng <evan.cheng@apple.com> |
Xform bitconvert(build_pair(load a, load b)) to a single load if the load locations are at the right offset from each other.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@51008 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
argetLowering.cpp
|
| b62904638976dad2609610ffc593e2db617f5476 |
13-May-2008 |
Evan Cheng <evan.cheng@apple.com> |
Xform bitconvert(build_pair(load a, load b)) to a single load if the load locations are at the right offset from each other.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@51008 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
argetLowering.cpp
|
| ad4196b44ae714a6b95e238d9d96303df74b0429 |
12-May-2008 |
Evan Cheng <evan.cheng@apple.com> |
Refactor isConsecutiveLoad from X86 to TargetLowering so DAG combiner can make use of it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@50991 91177308-0d34-0410-b5e6-96231b3b80d8
argetLowering.cpp
|
| ef7be08d74f0a08484b852934226eae22eb58c8a |
12-May-2008 |
Evan Cheng <evan.cheng@apple.com> |
Refactor isConsecutiveLoad from X86 to TargetLowering so DAG combiner can make use of it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@50991 91177308-0d34-0410-b5e6-96231b3b80d8
argetLowering.cpp
|
| b43e9c196542acc80c9e4643809661065710848f |
12-May-2008 |
Nate Begeman <natebegeman@mac.com> |
Add support for vicmp/vfcmp codegen, more legalize support coming.
This is necessary to unbreak the build.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@50988 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
electionDAG.cpp
electionDAGISel.cpp
|
| 9a1ce155ed514899f62701a7750e42eacfa3939f |
12-May-2008 |
Nate Begeman <natebegeman@mac.com> |
Add support for vicmp/vfcmp codegen, more legalize support coming.
This is necessary to unbreak the build.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@50988 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
electionDAG.cpp
electionDAGISel.cpp
|
| 9ab9ee8209c313713a54db2d9451751d8cfb9e2a |
12-May-2008 |
Dan Gohman <gohman@apple.com> |
Fix a missing break in the ISD::FLT_ROUNDS_ handling. Patch by giuma!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@50967 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| e09dc8c5d2f5245161a2a1c57942f54911e72e09 |
12-May-2008 |
Dan Gohman <gohman@apple.com> |
Fix a missing break in the ISD::FLT_ROUNDS_ handling. Patch by giuma!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@50967 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 0b12ecf6ff6b5d3a144178257b6206f0c4788792 |
08-May-2008 |
Anton Korobeynikov <asl@math.spbu.ru> |
Turn StripPointerCast() into a method
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@50836 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 48fc88fa541d9084daf3ade6e4df2046ad9736e2 |
08-May-2008 |
Anton Korobeynikov <asl@math.spbu.ru> |
Turn StripPointerCast() into a method
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@50836 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 42ac929ed968939d22a715769e583aeed8f6c823 |
07-May-2008 |
Dan Gohman <gohman@apple.com> |
Fix a bug in the ComputeMaskedBits logic for multiply.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@50793 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 4c451857fc1d30f82254a9b06938ff30b6abf2a6 |
07-May-2008 |
Dan Gohman <gohman@apple.com> |
Fix a bug in the ComputeMaskedBits logic for multiply.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@50793 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| b04adddd50dfa4c3fbdad3b15d601402254c1ff5 |
07-May-2008 |
Anton Korobeynikov <asl@math.spbu.ru> |
Make StripPointerCast a common function (should we mak it method of Value instead?)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@50775 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| dd0dfe60781752661c3d39907989121bc7c3d254 |
07-May-2008 |
Anton Korobeynikov <asl@math.spbu.ru> |
Make StripPointerCast a common function (should we mak it method of Value instead?)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@50775 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 4a3f6c88820a204f80ca0fa3f1f2fe09ca10b02f |
06-May-2008 |
Dan Gohman <gohman@apple.com> |
Make several variable declarations static.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@50696 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 2c37da52902a619dc12b5dd46040fd223ee7d2eb |
06-May-2008 |
Dan Gohman <gohman@apple.com> |
Make several variable declarations static.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@50696 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 54eed371314af403ef8307b386b3b5b46c8aa6fb |
06-May-2008 |
Dan Gohman <gohman@apple.com> |
Instead of enumerating each opcode that isn't handled that
ComputeMaskedBits handles, just use a 'default:'. This avoids
TargetLowering's list getting out of date with SelectionDAG's.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@50693 91177308-0d34-0410-b5e6-96231b3b80d8
argetLowering.cpp
|
| 9a77bb65128afa9cccbdc68d1db076eb0dc52107 |
06-May-2008 |
Dan Gohman <gohman@apple.com> |
Instead of enumerating each opcode that isn't handled that
ComputeMaskedBits handles, just use a 'default:'. This avoids
TargetLowering's list getting out of date with SelectionDAG's.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@50693 91177308-0d34-0410-b5e6-96231b3b80d8
argetLowering.cpp
|
| 23e1df8b8d1d1fc8b9a20b80a47b0a2fdffe7f84 |
06-May-2008 |
Dan Gohman <gohman@apple.com> |
Correct the value of LowBits in srem and urem handling in
ComputeMaskedBits.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@50692 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 5a154a1a7f85eb3c2b756a949b66670bed62e32e |
06-May-2008 |
Dan Gohman <gohman@apple.com> |
Correct the value of LowBits in srem and urem handling in
ComputeMaskedBits.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@50692 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 63307c335aa08b0d6a75f81d64d79af7e90eb78b |
05-May-2008 |
Mon P Wang <wangmp@apple.com> |
Added addition atomic instrinsics and, or, xor, min, and max.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@50663 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
electionDAG.cpp
electionDAGISel.cpp
argetLowering.cpp
|
| 078a62d580cd4e62ecb7940323a953d49a0e72d2 |
05-May-2008 |
Mon P Wang <wangmp@apple.com> |
Added addition atomic instrinsics and, or, xor, min, and max.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@50663 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
electionDAG.cpp
electionDAGISel.cpp
argetLowering.cpp
|
| 1d9cd506774f2d51b7e7315b07fdbcc05efebe4a |
02-May-2008 |
Dan Gohman <gohman@apple.com> |
Fix a mistake in the computation of leading zeros for udiv.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@50591 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 1b9fb1f4382238ee81e16c59200b1a643869f260 |
02-May-2008 |
Dan Gohman <gohman@apple.com> |
Fix a mistake in the computation of leading zeros for udiv.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@50591 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 7ceda160b34f67a0514df9a518da2946e52a04ea |
02-May-2008 |
Dan Gohman <gohman@apple.com> |
Fix a typo in a comment.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@50562 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 14a027d0de763a09b14ea86975d7e03b67f060d2 |
02-May-2008 |
Dan Gohman <gohman@apple.com> |
Fix a typo in a comment.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@50562 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 1fa850bdd26fa51b0e593378a9fc1507154f992d |
02-May-2008 |
Dan Gohman <gohman@apple.com> |
Use push_back(...) instead of resize(1, ...), per review feedback.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@50561 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 111e04ee9ba119e8b0d66f6b21b10f5ffc59015b |
02-May-2008 |
Dan Gohman <gohman@apple.com> |
Use push_back(...) instead of resize(1, ...), per review feedback.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@50561 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| cba3b44d258ee89f7dae1ea6e67d97258211ff8b |
02-May-2008 |
Dan Gohman <gohman@apple.com> |
Fix uninitialized uses of the FPC variable.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@50558 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| fc28db227985ffd9b26927c0b64accaa6840b971 |
02-May-2008 |
Dan Gohman <gohman@apple.com> |
Fix uninitialized uses of the FPC variable.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@50558 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 6bf30ab347bc00a8dc7115244298d78f7721ea34 |
01-May-2008 |
Chris Lattner <sabre@nondot.org> |
don't randomly miscompile seto/setuo just because we are in
ffastmath mode. This fixes rdar://5902801, a miscompilation
of gcc.dg/builtins-8.c.
Bill, please pull this into Tak.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@50523 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 98deecafca8ae7b25100b0c0a9a0d5b16e08caeb |
01-May-2008 |
Chris Lattner <sabre@nondot.org> |
don't randomly miscompile seto/setuo just because we are in
ffastmath mode. This fixes rdar://5902801, a miscompilation
of gcc.dg/builtins-8.c.
Bill, please pull this into Tak.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@50523 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 30e62c098b5841259f8026df1c5c45c7c1182a38 |
30-Apr-2008 |
Arnold Schwaighofer <arnold.schwaighofer@gmail.com> |
Tail call optimization improvements:
Move platform independent code (lowering of possibly overwritten
arguments, check for tail call optimization eligibility) from
target X86ISelectionLowering.cpp to TargetLowering.h and
SelectionDAGISel.cpp.
Initial PowerPC tail call implementation:
Support ppc32 implemented and tested (passes my tests and
test-suite llvm-test).
Support ppc64 implemented and half tested (passes my tests).
On ppc tail call optimization is performed if
caller and callee are fastcc
call is a tail call (in tail call position, call followed by ret)
no variable argument lists or byval arguments
option -tailcallopt is enabled
Supported:
* non pic tail calls on linux/darwin
* module-local tail calls on linux(PIC/GOT)/darwin(PIC)
* inter-module tail calls on darwin(PIC)
If constraints are not met a normal call will be emitted.
A test checking the argument lowering behaviour on x86-64 was added.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@50477 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| a0032726c05cbb509988f05746de940adcbdf20d |
30-Apr-2008 |
Arnold Schwaighofer <arnold.schwaighofer@gmail.com> |
Tail call optimization improvements:
Move platform independent code (lowering of possibly overwritten
arguments, check for tail call optimization eligibility) from
target X86ISelectionLowering.cpp to TargetLowering.h and
SelectionDAGISel.cpp.
Initial PowerPC tail call implementation:
Support ppc32 implemented and tested (passes my tests and
test-suite llvm-test).
Support ppc64 implemented and half tested (passes my tests).
On ppc tail call optimization is performed if
caller and callee are fastcc
call is a tail call (in tail call position, call followed by ret)
no variable argument lists or byval arguments
option -tailcallopt is enabled
Supported:
* non pic tail calls on linux/darwin
* module-local tail calls on linux(PIC/GOT)/darwin(PIC)
* inter-module tail calls on darwin(PIC)
If constraints are not met a normal call will be emitted.
A test checking the argument lowering behaviour on x86-64 was added.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@50477 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 82747a54849d22c3a0b7c3b56399da9b9e020ee0 |
30-Apr-2008 |
Scott Michel <scottm@aero.org> |
Fix custom target lowering for zero/any/sign_extend: make sure that
DAG.UpdateNodeOperands() is called before (not after) the call to
TLI.LowerOperation().
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@50461 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| ac54d007432a173a8a37493143c3237cbd1c86b8 |
30-Apr-2008 |
Scott Michel <scottm@aero.org> |
Fix custom target lowering for zero/any/sign_extend: make sure that
DAG.UpdateNodeOperands() is called before (not after) the call to
TLI.LowerOperation().
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@50461 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| a0201d52049be8dcefffe4304a49690a831bcb34 |
29-Apr-2008 |
Roman Levenstein <romix.llvm@googlemail.com> |
Use std::set instead of std::priority_queue for the RegReductionPriorityQueue.
This removes the existing bottleneck related to the removal of elements from
the middle of the queue.
Also fixes a subtle bug in ScheduleDAGRRList::CapturePred:
It was updating the state of the SUnit before removing it. As a result, the
comparison operators were working incorrectly and this SUnit could not be removed
from the queue properly.
Reviewed by Evan and Dan. Approved by Dan.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@50412 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGRRList.cpp
|
| 85078e24b21a2e70e3a697a36bc0732fac3c0187 |
29-Apr-2008 |
Roman Levenstein <romix.llvm@googlemail.com> |
Use std::set instead of std::priority_queue for the RegReductionPriorityQueue.
This removes the existing bottleneck related to the removal of elements from
the middle of the queue.
Also fixes a subtle bug in ScheduleDAGRRList::CapturePred:
It was updating the state of the SUnit before removing it. As a result, the
comparison operators were working incorrectly and this SUnit could not be removed
from the queue properly.
Reviewed by Evan and Dan. Approved by Dan.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@50412 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGRRList.cpp
|
| 3fb2968f2febbcd8e05270270858b6f2afd4b342 |
29-Apr-2008 |
Chris Lattner <sabre@nondot.org> |
make the vector conversion magic handle multiple results.
We now compile test2/test3 to:
_test2:
## InlineAsm Start
set %xmm0, %xmm1
## InlineAsm End
addps %xmm1, %xmm0
ret
_test3:
## InlineAsm Start
set %xmm0, %xmm1
## InlineAsm End
paddd %xmm1, %xmm0
ret
as expected.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@50389 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 626164a792c07c1ab6559db74ba73059324cbf8c |
29-Apr-2008 |
Chris Lattner <sabre@nondot.org> |
make the vector conversion magic handle multiple results.
We now compile test2/test3 to:
_test2:
## InlineAsm Start
set %xmm0, %xmm1
## InlineAsm End
addps %xmm1, %xmm0
ret
_test3:
## InlineAsm Start
set %xmm0, %xmm1
## InlineAsm End
paddd %xmm1, %xmm0
ret
as expected.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@50389 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 41f6259a4b54d2dc58a4040e942b37f00d306b7b |
29-Apr-2008 |
Chris Lattner <sabre@nondot.org> |
add support for multiple return values in inline asm. This is a step
towards PR2094. It now compiles the attached .ll file to:
_sad16_sse2:
movslq %ecx, %rax
## InlineAsm Start
%ecx %rdx %rax %rax %r8d %rdx %rsi
## InlineAsm End
## InlineAsm Start
set %eax
## InlineAsm End
ret
which is pretty decent for a 3 output, 4 input asm.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@50386 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 08bbcb86f1d0ee66fec76739504f362dd9a2976a |
29-Apr-2008 |
Chris Lattner <sabre@nondot.org> |
add support for multiple return values in inline asm. This is a step
towards PR2094. It now compiles the attached .ll file to:
_sad16_sse2:
movslq %ecx, %rax
## InlineAsm Start
%ecx %rdx %rax %rax %r8d %rdx %rsi
## InlineAsm End
## InlineAsm Start
set %eax
## InlineAsm End
ret
which is pretty decent for a 3 output, 4 input asm.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@50386 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 33bf38ad881fa3d403cc81209d0ae796f94f125e |
29-Apr-2008 |
Evan Cheng <evan.cheng@apple.com> |
Fix a bug in RegsForValue::getCopyToRegs() that causes cyclical scheduling units. If it's creating multiple CopyToReg nodes that are "flagged" together, it should not create a TokenFactor for it's chain outputs:
c1, f1 = CopyToReg
c2, f2 = CopyToReg
c3 = TokenFactor c1, c2
...
= user c3, ..., f2
Now that the two CopyToReg's and the user are "flagged" together. They effectively forms a single scheduling unit. The TokenFactor is now both an operand and a successor of the Flagged nodes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@50376 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 80cb49ea90ad34a368bba08c09c3ad026e4ce898 |
29-Apr-2008 |
Evan Cheng <evan.cheng@apple.com> |
Fix a bug in RegsForValue::getCopyToRegs() that causes cyclical scheduling units. If it's creating multiple CopyToReg nodes that are "flagged" together, it should not create a TokenFactor for it's chain outputs:
c1, f1 = CopyToReg
c2, f2 = CopyToReg
c3 = TokenFactor c1, c2
...
= user c3, ..., f2
Now that the two CopyToReg's and the user are "flagged" together. They effectively forms a single scheduling unit. The TokenFactor is now both an operand and a successor of the Flagged nodes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@50376 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 187db7b950e57e2f1f10b57e7ee2a7f38e8965c0 |
28-Apr-2008 |
Dan Gohman <gohman@apple.com> |
Evan pointed out that folding sext to zext may not be correct
if the zext is not legal.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@50368 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 5b37f9d6ad40098a7b3cf8308092cc64919ac9e4 |
28-Apr-2008 |
Dan Gohman <gohman@apple.com> |
Evan pointed out that folding sext to zext may not be correct
if the zext is not legal.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@50368 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| ebc3a3a3b2adb3bf5a1dae0c0e6572be79375efd |
28-Apr-2008 |
Dan Gohman <gohman@apple.com> |
Delete an unused constructor.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@50367 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 4457edb33078af6468ccb030629416e20d1a6cf7 |
28-Apr-2008 |
Dan Gohman <gohman@apple.com> |
Delete an unused constructor.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@50367 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 10a6b7ab656ddce1acfa1216311d2564edaecbe3 |
28-Apr-2008 |
Dan Gohman <gohman@apple.com> |
Add a comment to CreateRegForValue that clarifies the handling of
aggregate types.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@50366 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| b901881157917b841f8c3be685dca44fdfeb29ca |
28-Apr-2008 |
Dan Gohman <gohman@apple.com> |
Add a comment to CreateRegForValue that clarifies the handling of
aggregate types.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@50366 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 0fe00906c8f1d1e455c780b221299a1349cc7094 |
28-Apr-2008 |
Dan Gohman <gohman@apple.com> |
Rewrite the comments for RegsForValue and its members, and
reorder some of the members for clarity.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@50365 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 65b2f4cc5077b45c120817ffcded4ea26310342e |
28-Apr-2008 |
Dan Gohman <gohman@apple.com> |
Rewrite the comments for RegsForValue and its members, and
reorder some of the members for clarity.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@50365 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| b20d4f8d499c4c5315de69bd22c652665a7e3ab8 |
28-Apr-2008 |
Dan Gohman <gohman@apple.com> |
Don't call size() on each iteration of the loop.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@50361 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 3a163d253056f54c7b4430487a8fe34300ab94fa |
28-Apr-2008 |
Dan Gohman <gohman@apple.com> |
Don't call size() on each iteration of the loop.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@50361 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 1f13c686df75ddbbe15b208606ece4846d7479a8 |
28-Apr-2008 |
Dan Gohman <gohman@apple.com> |
Fix the SVOffset values for loads and stores produced by
memcpy/memset expansion. It was a bug for the SVOffset value
to be used in the actual address calculations.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@50359 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 65118f43f2da7c789cd2fde6908bdac8774a2304 |
28-Apr-2008 |
Dan Gohman <gohman@apple.com> |
Fix the SVOffset values for loads and stores produced by
memcpy/memset expansion. It was a bug for the SVOffset value
to be used in the actual address calculations.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@50359 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 23e8b715267a64381e2fff8c208da1f24b387b83 |
28-Apr-2008 |
Dan Gohman <gohman@apple.com> |
Teach InstCombine's ComputeMaskedBits what SelectionDAG's
ComputeMaskedBits knows about cttz, ctlz, and ctpop. Teach
SelectionDAG's ComputeMaskedBits what InstCombine's knows
about SRem. And teach them both some things about high bits
in Mul, UDiv, URem, and Sub. This allows instcombine and
dagcombine to eliminate sign-extension operations in
several new cases.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@50358 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| bec1605c43a6375d755c88e1269d9176433bfecd |
28-Apr-2008 |
Dan Gohman <gohman@apple.com> |
Teach InstCombine's ComputeMaskedBits what SelectionDAG's
ComputeMaskedBits knows about cttz, ctlz, and ctpop. Teach
SelectionDAG's ComputeMaskedBits what InstCombine's knows
about SRem. And teach them both some things about high bits
in Mul, UDiv, URem, and Sub. This allows instcombine and
dagcombine to eliminate sign-extension operations in
several new cases.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@50358 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 8f0ad582e81e24f2ab35f9e9d2308339c8e8cbeb |
28-Apr-2008 |
Dan Gohman <gohman@apple.com> |
Teach DAGCombine to convert (sext x) to (zext x) when the
sign-bit of x is known to be zero.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@50357 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 415e13afea66fb0fea6a13c9988a96185e064dd8 |
28-Apr-2008 |
Dan Gohman <gohman@apple.com> |
Teach DAGCombine to convert (sext x) to (zext x) when the
sign-bit of x is known to be zero.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@50357 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 6833b0601bdd53957db049b13dfa2e6a9e56f65f |
28-Apr-2008 |
Chris Lattner <sabre@nondot.org> |
Another collection of random cleanups. No functionality change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@50341 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 02d73b3d12833492ea166bfec530b38c29ba55c1 |
28-Apr-2008 |
Chris Lattner <sabre@nondot.org> |
Another collection of random cleanups. No functionality change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@50341 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| b606dba13ba84721cc297174c2eb1275bc642604 |
28-Apr-2008 |
Chris Lattner <sabre@nondot.org> |
Remove the SmallVector ctor that converts from a SmallVectorImpl. This
conversion open the door for many nasty implicit conversion issues, and
can be easily solved by initializing with (V.begin(), V.end()) when
needed.
This patch includes many small cleanups for sdisel also.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@50340 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 622811e23626f12f8f9933b12077b8bd79394db1 |
28-Apr-2008 |
Chris Lattner <sabre@nondot.org> |
Remove the SmallVector ctor that converts from a SmallVectorImpl. This
conversion open the door for many nasty implicit conversion issues, and
can be easily solved by initializing with (V.begin(), V.end()) when
needed.
This patch includes many small cleanups for sdisel also.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@50340 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 8eaff0449c70a7baa75c6ec5d1d90ea9ac2dad5a |
28-Apr-2008 |
Chris Lattner <sabre@nondot.org> |
switch RegsForValue::Regs to be a SmallVector to avoid
heap thrash on tiny (usually single-element) vectors.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@50335 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 8c036649d7c3422d0ebbbfda6c3f6467cb556595 |
28-Apr-2008 |
Chris Lattner <sabre@nondot.org> |
switch RegsForValue::Regs to be a SmallVector to avoid
heap thrash on tiny (usually single-element) vectors.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@50335 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| f899fce0c0492a6fa405323c073b3380260e5806 |
28-Apr-2008 |
Chris Lattner <sabre@nondot.org> |
move static function out of anon namespace, no functionality change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@50330 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 5f2006ebaa1d2042088a50d6c0ec0686be117e99 |
28-Apr-2008 |
Chris Lattner <sabre@nondot.org> |
move static function out of anon namespace, no functionality change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@50330 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| acf8b01fd6dd7a796d490795886bdfa67f074631 |
28-Apr-2008 |
Chris Lattner <sabre@nondot.org> |
Another step to getting multiple result inline asm to work.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@50329 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 5f32330dcddd37e71a86a617b56661d396f6ff3a |
28-Apr-2008 |
Chris Lattner <sabre@nondot.org> |
Another step to getting multiple result inline asm to work.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@50329 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 24e1a9d3115a5bf4e1c21092ede0f6dfc0a810ad |
27-Apr-2008 |
Chris Lattner <sabre@nondot.org> |
typo
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@50316 91177308-0d34-0410-b5e6-96231b3b80d8
argetLowering.cpp
|
| f9fde546b68041fc780392289e6846b72e04892b |
27-Apr-2008 |
Chris Lattner <sabre@nondot.org> |
typo
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@50316 91177308-0d34-0410-b5e6-96231b3b80d8
argetLowering.cpp
|
| 5a09690446a36f94f990db7d18d9b9ac8587888a |
27-Apr-2008 |
Chris Lattner <sabre@nondot.org> |
Implement a signficant optimization for inline asm:
When choosing between constraints with multiple options,
like "ir", test to see if we can use the 'i' constraint and
go with that if possible. This produces more optimal ASM in
all cases (sparing a register and an instruction to load it),
and fixes inline asm like this:
void test () {
asm volatile (" %c0 %1 " : : "imr" (42), "imr"(14));
}
Previously we would dump "42" into a memory location (which
is ok for the 'm' constraint) which would cause a problem
because the 'c' modifier is not valid on memory operands.
Isn't it great how inline asm turns 'missed optimization'
into 'compile failed'??
Incidentally, this was the todo in
PowerPC/2007-04-24-InlineAsm-I-Modifier.ll
Please do NOT pull this into Tak.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@50315 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
argetLowering.cpp
|
| 4486c2ee43064fb60afad606262474cb993dd188 |
27-Apr-2008 |
Chris Lattner <sabre@nondot.org> |
Implement a signficant optimization for inline asm:
When choosing between constraints with multiple options,
like "ir", test to see if we can use the 'i' constraint and
go with that if possible. This produces more optimal ASM in
all cases (sparing a register and an instruction to load it),
and fixes inline asm like this:
void test () {
asm volatile (" %c0 %1 " : : "imr" (42), "imr"(14));
}
Previously we would dump "42" into a memory location (which
is ok for the 'm' constraint) which would cause a problem
because the 'c' modifier is not valid on memory operands.
Isn't it great how inline asm turns 'missed optimization'
into 'compile failed'??
Incidentally, this was the todo in
PowerPC/2007-04-24-InlineAsm-I-Modifier.ll
Please do NOT pull this into Tak.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@50315 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
argetLowering.cpp
|
| 507ffd2423cfd0f5204c69e44c50aa3c759609d8 |
27-Apr-2008 |
Chris Lattner <sabre@nondot.org> |
isa+cast -> dyn_cast
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@50314 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 786c4281ce5f801746cb649d5e0e502b5d0bbd97 |
27-Apr-2008 |
Chris Lattner <sabre@nondot.org> |
isa+cast -> dyn_cast
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@50314 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 4376fea6631d41fff3f2a7c6186faed9eff59619 |
27-Apr-2008 |
Chris Lattner <sabre@nondot.org> |
Move a bunch of inline asm code out of line.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@50313 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
argetLowering.cpp
|
| 4cf8c700dac90d58430ee14db6cf851463569c91 |
27-Apr-2008 |
Chris Lattner <sabre@nondot.org> |
Move a bunch of inline asm code out of line.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@50313 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
argetLowering.cpp
|
| 5e764233f398b6929b67701672a5e78fec20ce2e |
27-Apr-2008 |
Chris Lattner <sabre@nondot.org> |
A few inline asm cleanups:
- Make targetlowering.h fit in 80 cols.
- Make LowerAsmOperandForConstraint const.
- Make lowerXConstraint -> LowerXConstraint
- Make LowerXConstraint return a const char* instead of taking a string byref.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@50312 91177308-0d34-0410-b5e6-96231b3b80d8
argetLowering.cpp
|
| eca405c6ff03fda968effe2458f21a4a23974fe5 |
27-Apr-2008 |
Chris Lattner <sabre@nondot.org> |
A few inline asm cleanups:
- Make targetlowering.h fit in 80 cols.
- Make LowerAsmOperandForConstraint const.
- Make lowerXConstraint -> LowerXConstraint
- Make LowerXConstraint return a const char* instead of taking a string byref.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@50312 91177308-0d34-0410-b5e6-96231b3b80d8
argetLowering.cpp
|
| 23ce502cb7d9d06a1786d276a10be42e65759eca |
25-Apr-2008 |
Dan Gohman <gohman@apple.com> |
Remove the code from CodeGenPrepare that moved getresult instructions
to the block that defines their operands. This doesn't work in the
case that the operand is an invoke, because invoke is a terminator
and must be the last instruction in a block.
Replace it with support in SelectionDAGISel for copying struct values
into sequences of virtual registers.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@50279 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 30a71f593f2dc9af3ef7fa13720496d5c9d6fc1a |
25-Apr-2008 |
Dan Gohman <gohman@apple.com> |
Remove the code from CodeGenPrepare that moved getresult instructions
to the block that defines their operands. This doesn't work in the
case that the operand is an invoke, because invoke is a terminator
and must be the last instruction in a block.
Replace it with support in SelectionDAGISel for copying struct values
into sequences of virtual registers.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@50279 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 6867991d541d08ca95d86841eca5f7c1d5096864 |
25-Apr-2008 |
Nate Begeman <natebegeman@mac.com> |
Pull the code to perform an INSERT_VECTOR_ELT in memory out into its own
function, and then use it to fix a bug in SplitVectorOp that expected inserts
to always have constant insertion indices.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@50273 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 7c9e4b71d0c8f3fb0fc22b8ce1c114be6a925741 |
25-Apr-2008 |
Nate Begeman <natebegeman@mac.com> |
Pull the code to perform an INSERT_VECTOR_ELT in memory out into its own
function, and then use it to fix a bug in SplitVectorOp that expected inserts
to always have constant insertion indices.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@50273 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 67780f108ccb509dffe3ff63d3826ea6accb1bb1 |
23-Apr-2008 |
Dan Gohman <gohman@apple.com> |
Use isa instead of dyn_cast.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@50181 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 6b8524380d079983e9257e664013f9a2dccac6e1 |
23-Apr-2008 |
Dan Gohman <gohman@apple.com> |
Use isa instead of dyn_cast.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@50181 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 3dc34f682dfdfbf75c2b883e21a953d41df4f3a0 |
23-Apr-2008 |
Dan Gohman <gohman@apple.com> |
Add support to codegen for getresult instructions with undef operands.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@50180 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 10e4bdf5d1cf60d1c7bbfbb780996290fc2b94a7 |
23-Apr-2008 |
Dan Gohman <gohman@apple.com> |
Add support to codegen for getresult instructions with undef operands.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@50180 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 639cdc210b86302bfa03e2a88266ef0d4aba102c |
21-Apr-2008 |
Dan Gohman <gohman@apple.com> |
Fix an out-of-bounds access in -view-sunit-dags in the case of an
empty ScheduleDAG.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@50054 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGPrinter.cpp
|
| 66d5eaf43e9e37ebe38f08d2974b325fb912a393 |
21-Apr-2008 |
Dan Gohman <gohman@apple.com> |
Fix an out-of-bounds access in -view-sunit-dags in the case of an
empty ScheduleDAG.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@50054 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGPrinter.cpp
|
| 9dd2ce46c58dd05f0835df77f308396715890d66 |
20-Apr-2008 |
Dale Johannesen <dalej@apple.com> |
Check we aren't trying to convert PPC long double.
This fixes the testsuite failure on ppcf128-4.ll.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@49994 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 90c25d16c7db440514e86cec1843736b9bd46904 |
20-Apr-2008 |
Dale Johannesen <dalej@apple.com> |
Check we aren't trying to convert PPC long double.
This fixes the testsuite failure on ppcf128-4.ll.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@49994 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 02a260aa11a2e1b2c14335274d3c42ca3f3eabc0 |
20-Apr-2008 |
Chris Lattner <sabre@nondot.org> |
Switch to using Simplified ConstantFP::get API.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@49977 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
cheduleDAG.cpp
|
| 5e0610fe159d5f82f0d339a6148a693b53de2f08 |
20-Apr-2008 |
Chris Lattner <sabre@nondot.org> |
Switch to using Simplified ConstantFP::get API.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@49977 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
cheduleDAG.cpp
|
| 37bcda3de96a9c41dc1aa05615ca3df869119026 |
18-Apr-2008 |
Duncan Sands <baldrick@free.fr> |
Implement a bit more softfloat support in
LegalizeTypes. Correct the load logic so
that it actually works, and also teach it
to handle floating point extending loads.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@49923 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeTypes.h
egalizeTypesFloatToInt.cpp
|
| f45437511403930c7ad473fda878da4fab1c0d9a |
18-Apr-2008 |
Duncan Sands <baldrick@free.fr> |
Implement a bit more softfloat support in
LegalizeTypes. Correct the load logic so
that it actually works, and also teach it
to handle floating point extending loads.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@49923 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeTypes.h
egalizeTypesFloatToInt.cpp
|
| 4cc04564567686e62ec5aed7ef9efc7b3ef973aa |
18-Apr-2008 |
Duncan Sands <baldrick@free.fr> |
Add some more FIXME's for indexed loads and stores.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@49916 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeTypesPromote.cpp
egalizeTypesScalarize.cpp
egalizeTypesSplit.cpp
|
| 8aa1c9dd86b498c7296377c3819f1335b5d256a0 |
18-Apr-2008 |
Duncan Sands <baldrick@free.fr> |
Add some more FIXME's for indexed loads and stores.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@49916 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeTypesPromote.cpp
egalizeTypesScalarize.cpp
egalizeTypesSplit.cpp
|
| 41edfb8ae119d6cf6579046619dd2820ec876065 |
18-Apr-2008 |
Duncan Sands <baldrick@free.fr> |
Provide an explicit list of operands to MakeLibcall,
rather than having it suck them out of a node. Add
a bunch of new libcalls, and remove dead softfloat
code (dead, because FloatToInt is used not Expand
in this case). Note that indexed stores probably
aren't handled properly, likewise for loads.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@49915 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeTypes.cpp
egalizeTypes.h
egalizeTypesExpand.cpp
|
| 37d64ec5fdac3c4d014a48ea5d44b515a9465c06 |
18-Apr-2008 |
Duncan Sands <baldrick@free.fr> |
Provide an explicit list of operands to MakeLibcall,
rather than having it suck them out of a node. Add
a bunch of new libcalls, and remove dead softfloat
code (dead, because FloatToInt is used not Expand
in this case). Note that indexed stores probably
aren't handled properly, likewise for loads.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@49915 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeTypes.cpp
egalizeTypes.h
egalizeTypesExpand.cpp
|
| 35b31bea0dc9e16d4c384a6a78404bdd791b6693 |
18-Apr-2008 |
Dan Gohman <gohman@apple.com> |
Remove the implicit conversion from SDOperandPtr to SDOperand*; this
may fix a build error on Visual Studio.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@49876 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 1d47f5c106360e5e367255ae2633cd37051ce67a |
18-Apr-2008 |
Dan Gohman <gohman@apple.com> |
Remove the implicit conversion from SDOperandPtr to SDOperand*; this
may fix a build error on Visual Studio.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@49876 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 499c1bd358917ad64ed3dcc32492dd38e1a47706 |
17-Apr-2008 |
Dan Gohman <gohman@apple.com> |
Correct the SrcValue information in the Expand code for va_copy.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@49839 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 6b9a08e56759b0296b7b9ae4db2caa21e42d5379 |
17-Apr-2008 |
Dan Gohman <gohman@apple.com> |
Correct the SrcValue information in the Expand code for va_copy.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@49839 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 9cac5259fe237120a0c347d6d14e549005148f1b |
16-Apr-2008 |
Roman Levenstein <romix.llvm@googlemail.com> |
Ongoing work on improving the instruction selection infrastructure:
Rename SDOperandImpl back to SDOperand.
Introduce the SDUse class that represents a use of the SDNode referred by
an SDOperand. Now it is more similar to Use/Value classes.
Patch is approved by Dan Gohman.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@49795 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
egalizeDAG.cpp
egalizeTypes.cpp
egalizeTypes.h
cheduleDAG.cpp
electionDAG.cpp
|
| 98b8fcb96689930537f70ffb0023da9dce797a2f |
16-Apr-2008 |
Roman Levenstein <romix.llvm@googlemail.com> |
Ongoing work on improving the instruction selection infrastructure:
Rename SDOperandImpl back to SDOperand.
Introduce the SDUse class that represents a use of the SDNode referred by
an SDOperand. Now it is more similar to Use/Value classes.
Patch is approved by Dan Gohman.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@49795 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
egalizeDAG.cpp
egalizeTypes.cpp
egalizeTypes.h
cheduleDAG.cpp
electionDAG.cpp
|
| 5a2d335c4cdc2bf870f04b8ca20c8032638d1961 |
16-Apr-2008 |
Dan Gohman <gohman@apple.com> |
Fix the new scheduler assertion checks to work when
the scheduler has inserted no-ops. This fixes
the 2006-07-03-schedulers.ll regression on ppc32.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@49747 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGRRList.cpp
|
| 8701816221817cfb8b8b67ca06cc9a39bacbcbde |
16-Apr-2008 |
Dan Gohman <gohman@apple.com> |
Fix the new scheduler assertion checks to work when
the scheduler has inserted no-ops. This fixes
the 2006-07-03-schedulers.ll regression on ppc32.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@49747 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGRRList.cpp
|
| 6ccbbd89906157187ac04b2b3237c4aee7acd095 |
15-Apr-2008 |
Nicolas Geoffray <nicolas.geoffray@lip6.fr> |
Change Divided flag to Split, as suggested by Evan
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@49715 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 4fda257b66463f9974368255d5a5222057234db7 |
15-Apr-2008 |
Nicolas Geoffray <nicolas.geoffray@lip6.fr> |
Change Divided flag to Split, as suggested by Evan
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@49715 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 80792f3ddec43aff7f0758c9096f8cb53dcc1e40 |
15-Apr-2008 |
Dan Gohman <gohman@apple.com> |
Treat EntryToken nodes as "passive" so that they aren't added to the
ScheduleDAG; they don't correspond to any actual instructions so they
don't need to be scheduled.
This fixes a bug where the EntryToken was being scheduled multiple
times in some cases, though it ended up not causing any trouble because
EntryToken doesn't expand into anything. With this fixed the schedulers
reliably schedule the expected number of units, so we can check this
with an assertion.
This requires a tweak to test/CodeGen/X86/loop-hoist.ll because it
ends up getting scheduled differently in a trivial way, though it was
enough to fool the prcontext+grep that the test does.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@49701 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAG.cpp
cheduleDAGList.cpp
cheduleDAGRRList.cpp
|
| b7ba05e1b60c2f922940f069b495b099653f63d2 |
15-Apr-2008 |
Dan Gohman <gohman@apple.com> |
Treat EntryToken nodes as "passive" so that they aren't added to the
ScheduleDAG; they don't correspond to any actual instructions so they
don't need to be scheduled.
This fixes a bug where the EntryToken was being scheduled multiple
times in some cases, though it ended up not causing any trouble because
EntryToken doesn't expand into anything. With this fixed the schedulers
reliably schedule the expected number of units, so we can check this
with an assertion.
This requires a tweak to test/CodeGen/X86/loop-hoist.ll because it
ends up getting scheduled differently in a trivial way, though it was
enough to fool the prcontext+grep that the test does.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@49701 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAG.cpp
cheduleDAGList.cpp
cheduleDAGRRList.cpp
|
| 89bf0a6b05c8c353890c88ed1c10dec96a9a7bd8 |
15-Apr-2008 |
Dan Gohman <gohman@apple.com> |
In -view-sunit-dags, display "special" chain dependencies as cyan
instead of blue to distinguish them from regular dependencies.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@49696 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGPrinter.cpp
|
| 75d89e23a0ef82f58b1a7470c22fe17c78f69346 |
15-Apr-2008 |
Dan Gohman <gohman@apple.com> |
In -view-sunit-dags, display "special" chain dependencies as cyan
instead of blue to distinguish them from regular dependencies.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@49696 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGPrinter.cpp
|
| b91c89dfb9a7d119eb2184e3fda8af12d71713a6 |
14-Apr-2008 |
Dan Gohman <gohman@apple.com> |
Avoid creating MERGE_VALUES nodes for single values.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@49676 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 849d7c6f56c212b6e77cbe78f6285d1dc78a023b |
14-Apr-2008 |
Dan Gohman <gohman@apple.com> |
Avoid creating MERGE_VALUES nodes for single values.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@49676 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 29e4bdbf27c5f03b12dd2bc41d9ccb0d5f3dfdf4 |
14-Apr-2008 |
Dan Gohman <gohman@apple.com> |
Fix const-correctness issues with the SrcValue handling in the
memory intrinsic expansion code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@49666 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 64fd1a959022d190ca01e9a8ab665ea97c03546c |
14-Apr-2008 |
Dan Gohman <gohman@apple.com> |
Fix const-correctness issues with the SrcValue handling in the
memory intrinsic expansion code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@49666 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 9701c8a18fd3888d20f4cd8fcebc6bc99f005c0a |
14-Apr-2008 |
Nicolas Geoffray <nicolas.geoffray@lip6.fr> |
Fix /test/CodeGen/PowerPC/big-endian-actual-args.ll for linux/ppc32
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@49652 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 78dda99fdb44b376c644d836eda4cfae2115fb24 |
14-Apr-2008 |
Nicolas Geoffray <nicolas.geoffray@lip6.fr> |
Fix /test/CodeGen/PowerPC/big-endian-actual-args.ll for linux/ppc32
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@49652 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| ddc016cc8592fe5c9379feb42a1fb4fb63164a91 |
14-Apr-2008 |
Duncan Sands <baldrick@free.fr> |
Initial libcall support for LegalizeTypes. This is
much simpler than in LegalizeDAG because calls are
not yet expanded into call sequences: that happens
after type legalization has finished.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@49634 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeTypes.cpp
egalizeTypes.h
egalizeTypesExpand.cpp
|
| 5e7b04a9fb9bf0a6696c1f3d5d76f8bca23b2480 |
14-Apr-2008 |
Duncan Sands <baldrick@free.fr> |
Initial libcall support for LegalizeTypes. This is
much simpler than in LegalizeDAG because calls are
not yet expanded into call sequences: that happens
after type legalization has finished.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@49634 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeTypes.cpp
egalizeTypes.h
egalizeTypesExpand.cpp
|
| 4a6da60787fcc66c521288fbd139cf8afdca5957 |
13-Apr-2008 |
Duncan Sands <baldrick@free.fr> |
LegalizeTypes can sometimes have deleted nodes
in its maps. Add some sanity checks that catch
this kind of thing. Hopefully these can be
removed one day (once all problems are fixed!)
but for the moment it seems wise to have them in.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@49612 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeTypes.cpp
egalizeTypes.h
|
| 4ac8ecc756bd6829ca06c4289548d3eed31c3fa7 |
13-Apr-2008 |
Duncan Sands <baldrick@free.fr> |
LegalizeTypes can sometimes have deleted nodes
in its maps. Add some sanity checks that catch
this kind of thing. Hopefully these can be
removed one day (once all problems are fixed!)
but for the moment it seems wise to have them in.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@49612 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeTypes.cpp
egalizeTypes.h
|
| c0cb28fd3abee9a8b40856990e04f1af2f9bd7b8 |
13-Apr-2008 |
Nicolas Geoffray <nicolas.geoffray@lip6.fr> |
Add a divided flag for the first piece of an argument divided into mulitple parts. Fixes PR1643
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@49611 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 46253ddfa7d06facd4a16cd5bd80771c15a6918f |
13-Apr-2008 |
Nicolas Geoffray <nicolas.geoffray@lip6.fr> |
Add a divided flag for the first piece of an argument divided into mulitple parts. Fixes PR1643
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@49611 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 460a14e09c2af630fc1e840dcb3e0f725663067b |
12-Apr-2008 |
Duncan Sands <baldrick@free.fr> |
Factor some libcall code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@49583 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| f1db7c87bdd7136e5511cc38cafeb33421e3af36 |
12-Apr-2008 |
Duncan Sands <baldrick@free.fr> |
Factor some libcall code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@49583 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 707e0184233f27e0e9f9aee0309f2daab8cfe7f8 |
12-Apr-2008 |
Dan Gohman <gohman@apple.com> |
Drop ISD::MEMSET, ISD::MEMMOVE, and ISD::MEMCPY, which are not Legal
on any current target and aren't optimized in DAGCombiner. Instead
of using intermediate nodes, expand the operations, choosing between
simple loads/stores, target-specific code, and library calls,
immediately.
Previously, the code to emit optimized code for these operations
was only used at initial SelectionDAG construction time; now it is
used at all times. This fixes some cases where rep;movs was being
used for small copies where simple loads/stores would be better.
This also cleans up code that checks for alignments less than 4;
let the targets make that decision instead of doing it in
target-independent code. This allows x86 to use rep;movs in
low-alignment cases.
Also, this fixes a bug that resulted in the use of rep;stos for
memsets of 0 with non-constant memory size when the alignment was
at least 4. It's better to use the library in this case, which
can be significantly faster when the size is large.
This also preserves more SourceValue information when memory
intrinsics are lowered into simple loads/stores.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@49572 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
egalizeTypes.cpp
egalizeTypes.h
egalizeTypesExpand.cpp
egalizeTypesPromote.cpp
electionDAG.cpp
electionDAGISel.cpp
argetLowering.cpp
|
| e8b391ea3cf33a68b0c5eeafc448c53b412dd61f |
12-Apr-2008 |
Dan Gohman <gohman@apple.com> |
Drop ISD::MEMSET, ISD::MEMMOVE, and ISD::MEMCPY, which are not Legal
on any current target and aren't optimized in DAGCombiner. Instead
of using intermediate nodes, expand the operations, choosing between
simple loads/stores, target-specific code, and library calls,
immediately.
Previously, the code to emit optimized code for these operations
was only used at initial SelectionDAG construction time; now it is
used at all times. This fixes some cases where rep;movs was being
used for small copies where simple loads/stores would be better.
This also cleans up code that checks for alignments less than 4;
let the targets make that decision instead of doing it in
target-independent code. This allows x86 to use rep;movs in
low-alignment cases.
Also, this fixes a bug that resulted in the use of rep;stos for
memsets of 0 with non-constant memory size when the alignment was
at least 4. It's better to use the library in this case, which
can be significantly faster when the size is large.
This also preserves more SourceValue information when memory
intrinsics are lowered into simple loads/stores.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@49572 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
egalizeTypes.cpp
egalizeTypes.h
egalizeTypesExpand.cpp
egalizeTypesPromote.cpp
electionDAG.cpp
electionDAGISel.cpp
argetLowering.cpp
|
| 78256a199edba827b5356fcd041f60f92c9f205f |
11-Apr-2008 |
Gabor Greif <ggreif@gmail.com> |
detabify
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@49524 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 5bd3d9b7997c69b4131ea0288f83ff3e8e87a061 |
11-Apr-2008 |
Gabor Greif <ggreif@gmail.com> |
detabify
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@49524 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 36b5c1338a03453ba1c110b120269ca972fb65a3 |
07-Apr-2008 |
Dan Gohman <gohman@apple.com> |
Rename MemOperand to MachineMemOperand. This was suggested by
review feedback from Chris quite a while ago. No functionality
change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@49348 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAG.cpp
electionDAG.cpp
|
| 1fad9e6ca2c608b4cd09275e3c302ebc18ebc33a |
07-Apr-2008 |
Dan Gohman <gohman@apple.com> |
Rename MemOperand to MachineMemOperand. This was suggested by
review feedback from Chris quite a while ago. No functionality
change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@49348 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAG.cpp
electionDAG.cpp
|
| dc1adac582fa120861f18ae7221bfe1421fea59f |
07-Apr-2008 |
Roman Levenstein <romix.llvm@googlemail.com> |
Re-commit of the r48822, where the infinite looping problem discovered
by Dan Gohman is fixed.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@49330 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
egalizeDAG.cpp
egalizeTypes.cpp
egalizeTypes.h
cheduleDAG.cpp
electionDAG.cpp
|
| 05650fd0ba74ad3356d1bc5d1f07ff194b16b82e |
07-Apr-2008 |
Roman Levenstein <romix.llvm@googlemail.com> |
Re-commit of the r48822, where the infinite looping problem discovered
by Dan Gohman is fixed.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@49330 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
egalizeDAG.cpp
egalizeTypes.cpp
egalizeTypes.h
cheduleDAG.cpp
electionDAG.cpp
|
| 4fea2e982d79132715711dfcfdc46abf15239217 |
06-Apr-2008 |
Torok Edwin <edwintorok@gmail.com> |
Prefer to expand mask for xor to -1, so we have a chance to turn it into a not.
If it cannot be expanded, it will keep the old behaviour and try to shrink the constant.
Part of enhancement for PR2191.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@49280 91177308-0d34-0410-b5e6-96231b3b80d8
argetLowering.cpp
|
| 405b243971627c037b7f48a009dfcf5c159ef1a5 |
06-Apr-2008 |
Edwin Török <edwintorok@gmail.com> |
Prefer to expand mask for xor to -1, so we have a chance to turn it into a not.
If it cannot be expanded, it will keep the old behaviour and try to shrink the constant.
Part of enhancement for PR2191.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@49280 91177308-0d34-0410-b5e6-96231b3b80d8
argetLowering.cpp
|
| a4091d34f3c05717eb5bb66a1257a0c1005e6dfa |
05-Apr-2008 |
Dale Johannesen <dalej@apple.com> |
Make sure both PendingLoads and PendingExports are flushed
before an invoke. Failure to do this causes references in
the landing pad to variables that were not set. Fixes
g++.dg/eh/delayslot1.C
g++.dg/eh/fp-regs.C
g++.old-deja/g++.brendan/eh1.C
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@49243 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 1f68ca86fbb3cb1fbf05b8d64a7c3d1a7c9ab44e |
05-Apr-2008 |
Dale Johannesen <dalej@apple.com> |
Make sure both PendingLoads and PendingExports are flushed
before an invoke. Failure to do this causes references in
the landing pad to variables that were not set. Fixes
g++.dg/eh/delayslot1.C
g++.dg/eh/fp-regs.C
g++.old-deja/g++.brendan/eh1.C
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@49243 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 8a50f1fcf0147d4ba959dc48066ddf281d5bc7e6 |
03-Apr-2008 |
Evan Cheng <evan.cheng@apple.com> |
Start of a series of patches related to implicit_def.
There is no point in creating a long live range defined by an implicit_def. Scheduler now duplicates implicit_def instruction for each of its uses. Therefore, if an implicit_def node has multiple uses, it will become a number of very short live ranges, rather than a long one. This will make coalescer's job easier.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@49164 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAG.cpp
|
| 19da42df554776cd1ea82c3946f788751307b378 |
03-Apr-2008 |
Evan Cheng <evan.cheng@apple.com> |
Start of a series of patches related to implicit_def.
There is no point in creating a long live range defined by an implicit_def. Scheduler now duplicates implicit_def instruction for each of its uses. Therefore, if an implicit_def node has multiple uses, it will become a number of very short live ranges, rather than a long one. This will make coalescer's job easier.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@49164 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAG.cpp
|
| 6397c64441ddce3822ab0e712f224a11bd75811c |
03-Apr-2008 |
Evan Cheng <evan.cheng@apple.com> |
Backing out 48222 temporarily.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@49124 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
egalizeDAG.cpp
egalizeTypes.cpp
egalizeTypes.h
cheduleDAG.cpp
electionDAG.cpp
|
| 91624382f6e3d48485d23b4b1e67f85e9287c8f0 |
03-Apr-2008 |
Evan Cheng <evan.cheng@apple.com> |
Backing out 48222 temporarily.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@49124 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
egalizeDAG.cpp
egalizeTypes.cpp
egalizeTypes.h
cheduleDAG.cpp
electionDAG.cpp
|
| 1532f3ddd77c362dd5f613af06b4de636e3c5b0e |
02-Apr-2008 |
Dale Johannesen <dalej@apple.com> |
Recommitting EH patch; this should answer most of the
review feedback.
-enable-eh is still accepted but doesn't do anything.
EH intrinsics use Dwarf EH if the target supports that,
and are handled by LowerInvoke otherwise.
The separation of the EH table and frame move data is,
I think, logically figured out, but either one still
causes full EH info to be generated (not sure how to
split the metadata correctly).
MachineModuleInfo::needsFrameInfo is no longer used and
is removed.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@49064 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 8553576e0c959305b88e548148b0a472c94ffca8 |
02-Apr-2008 |
Dale Johannesen <dalej@apple.com> |
Recommitting EH patch; this should answer most of the
review feedback.
-enable-eh is still accepted but doesn't do anything.
EH intrinsics use Dwarf EH if the target supports that,
and are handled by LowerInvoke otherwise.
The separation of the EH table and frame move data is,
I think, logically figured out, but either one still
causes full EH info to be generated (not sure how to
split the metadata correctly).
MachineModuleInfo::needsFrameInfo is no longer used and
is removed.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@49064 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| b6d5b1439047609c050576f3dc52b722e76bd30b |
01-Apr-2008 |
Dale Johannesen <dalej@apple.com> |
Revert 49006 for the moment.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@49046 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 748a85ca991f61e8e097c6f42d721009b2f61936 |
01-Apr-2008 |
Dale Johannesen <dalej@apple.com> |
Revert 49006 for the moment.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@49046 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 9845eb5b033db5ba5213d0b8dba958c1e168ccd3 |
01-Apr-2008 |
Evan Cheng <evan.cheng@apple.com> |
More soft fp fixes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@49016 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| f99a775e11793fe01dbcf5c5b06a75f06bc21bd6 |
01-Apr-2008 |
Evan Cheng <evan.cheng@apple.com> |
More soft fp fixes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@49016 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| db45d1c649aa2e7c71accd8ad460aa764886cab3 |
01-Apr-2008 |
Evan Cheng <evan.cheng@apple.com> |
Pasto.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@49014 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| cadb43c532ea8019824b2f98fe20e60107563f0c |
01-Apr-2008 |
Evan Cheng <evan.cheng@apple.com> |
Pasto.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@49014 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 6ad2f930da0ebadb0e000397cea8384c650877bb |
01-Apr-2008 |
Evan Cheng <evan.cheng@apple.com> |
Add comment.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@49013 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 4a2f6df680cfd81dc50fe8af722905fbd60ccb05 |
01-Apr-2008 |
Evan Cheng <evan.cheng@apple.com> |
Add comment.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@49013 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 110cf48752dcf86c6d95698c08805f1dd534ac83 |
01-Apr-2008 |
Evan Cheng <evan.cheng@apple.com> |
Unbreak ARM / Thumb soft FP support.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@49012 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| a87400339fcb3e087996e7ad534816d640c8b716 |
01-Apr-2008 |
Evan Cheng <evan.cheng@apple.com> |
Unbreak ARM / Thumb soft FP support.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@49012 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 1544e4713be68edcf042de5aed7265dff7169d9d |
01-Apr-2008 |
Dale Johannesen <dalej@apple.com> |
Emit exception handling info for functions which are
not marked nounwind, or for all functions when -enable-eh
is set, provided the target supports Dwarf EH.
llvm-gcc generates nounwind in the right places; other FEs
will need to do so also. Given such a FE, -enable-eh should
no longer be needed.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@49006 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 80caa49bb50211658df49e9340fc562e7c3db625 |
01-Apr-2008 |
Dale Johannesen <dalej@apple.com> |
Emit exception handling info for functions which are
not marked nounwind, or for all functions when -enable-eh
is set, provided the target supports Dwarf EH.
llvm-gcc generates nounwind in the right places; other FEs
will need to do so also. Given such a FE, -enable-eh should
no longer be needed.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@49006 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| b061c4bc44caf62a16adad6047cda60785c2d0a4 |
31-Mar-2008 |
Dan Gohman <gohman@apple.com> |
Fix a DAGCombiner optimization to respect volatile qualification.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48994 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 729b5ff1c51532b0301074a9fe3b80304c114b01 |
31-Mar-2008 |
Dan Gohman <gohman@apple.com> |
Fix a DAGCombiner optimization to respect volatile qualification.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48994 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| d27c991cebe48fdf82b5d9eec6c2a1a244f82622 |
30-Mar-2008 |
Chris Lattner <sabre@nondot.org> |
Fix "Control reaches the end of non-void function" warnings,
patch by David Chisnall.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48963 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 2b06cd3076bbc4547d58109722c79b33366d594d |
30-Mar-2008 |
Chris Lattner <sabre@nondot.org> |
Fix "Control reaches the end of non-void function" warnings,
patch by David Chisnall.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48963 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| fd5da6c991ad0bb5c0b6ce797d56c49ad3f73803 |
29-Mar-2008 |
Evan Cheng <evan.cheng@apple.com> |
Cosmetic changes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48947 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGRRList.cpp
|
| f066822d7fdc0a0d5942e4c815f4110991d11b8a |
29-Mar-2008 |
Evan Cheng <evan.cheng@apple.com> |
Cosmetic changes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48947 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGRRList.cpp
|
| 2a88a5c92f898623d5cceb6cd1019427a1749999 |
28-Mar-2008 |
Chris Lattner <sabre@nondot.org> |
ifdef out a dead function. Should this be removed?
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48916 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGRRList.cpp
|
| 2e120bfdb3320317c8ddf00e959fbf2489a52ac5 |
28-Mar-2008 |
Chris Lattner <sabre@nondot.org> |
ifdef out a dead function. Should this be removed?
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48916 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGRRList.cpp
|
| e10efce22502d1a1855d25baf1458660f4ba6f33 |
28-Mar-2008 |
Duncan Sands <baldrick@free.fr> |
Rename getAnyLoad to getLoad is suggested by Evan.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48914 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeTypesFloatToInt.cpp
electionDAG.cpp
|
| b258971288d6212ea14387c2c464e1e1c8b94813 |
28-Mar-2008 |
Duncan Sands <baldrick@free.fr> |
Rename getAnyLoad to getLoad is suggested by Evan.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48914 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeTypesFloatToInt.cpp
electionDAG.cpp
|
| 14ea39cf3c62fad781b8a00cda9e4a15e61520dc |
27-Mar-2008 |
Duncan Sands <baldrick@free.fr> |
Implement LegalizeTypes support for softfloat LOAD.
In order to handle indexed nodes I had to introduce
a new constructor, and since I was there I factorized
the code in the various load constructors.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48894 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeTypes.h
egalizeTypesFloatToInt.cpp
electionDAG.cpp
|
| 9a2f4dce36bc801ca8dbe3b2b5ccd1a90d201c6e |
27-Mar-2008 |
Duncan Sands <baldrick@free.fr> |
Implement LegalizeTypes support for softfloat LOAD.
In order to handle indexed nodes I had to introduce
a new constructor, and since I was there I factorized
the code in the various load constructors.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48894 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeTypes.h
egalizeTypesFloatToInt.cpp
electionDAG.cpp
|
| 86e1ebf9bbde7408a1d7859ea207981457e11cc2 |
27-Mar-2008 |
Dan Gohman <gohman@apple.com> |
Avoid creating chain dependencies from CopyToReg nodes to load and store
nodes. This doesn't currently have much impact the generated code, but it
does produce simpler-looking SelectionDAGs, and consequently
simpler-looking ScheduleDAGs, because there are fewer spurious
dependencies.
In particular, CopyValueToVirtualRegister now uses the entry node as the
input chain dependency for new CopyToReg nodes instead of calling getRoot
and depending on the most recent memory reference.
Also, rename UnorderedChains to PendingExports and pull it up from being
a local variable in SelectionDAGISel::BuildSelectionDAG to being a
member variable of SelectionDAGISel, so that it doesn't have to be
passed around to all the places that need it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48893 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 9fe5bd631213c33d670cb9648f42f994bfb011a8 |
27-Mar-2008 |
Dan Gohman <gohman@apple.com> |
Avoid creating chain dependencies from CopyToReg nodes to load and store
nodes. This doesn't currently have much impact the generated code, but it
does produce simpler-looking SelectionDAGs, and consequently
simpler-looking ScheduleDAGs, because there are fewer spurious
dependencies.
In particular, CopyValueToVirtualRegister now uses the entry node as the
input chain dependency for new CopyToReg nodes instead of calling getRoot
and depending on the most recent memory reference.
Also, rename UnorderedChains to PendingExports and pull it up from being
a local variable in SelectionDAGISel::BuildSelectionDAG to being a
member variable of SelectionDAGISel, so that it doesn't have to be
passed around to all the places that need it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48893 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| d7d3ea00c0a26e2545d4ba01825d8358075264e7 |
27-Mar-2008 |
Roman Levenstein <romix.llvm@googlemail.com> |
Fix spelling. Thanks, Duncan! :-)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48873 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGRRList.cpp
|
| 74cd1228f65ee9ddcbf5f51f768bb83bc849e470 |
27-Mar-2008 |
Roman Levenstein <romix.llvm@googlemail.com> |
Fix spelling. Thanks, Duncan! :-)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48873 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGRRList.cpp
|
| 95d4184e7218d7ec21b5b8d693dd3b14146eefdc |
27-Mar-2008 |
Roman Levenstein <romix.llvm@googlemail.com> |
Speed-up the SumOfUnscheduledPredsOfSuccs by introducing a new function
called LimitedSumOfUnscheduledPredsOfSuccs. It terminates the computation
after a given treshold is reached. This new function is always faster, but
brings real wins only on bigger test-cases.
The old function SumOfUnscheduledPredsOfSuccs is left in-place for now and therefore a warning about an unused static function is produced.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48872 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGRRList.cpp
|
| 887332e4c70670894ba6cf853c1f3b411b223985 |
27-Mar-2008 |
Roman Levenstein <romix.llvm@googlemail.com> |
Speed-up the SumOfUnscheduledPredsOfSuccs by introducing a new function
called LimitedSumOfUnscheduledPredsOfSuccs. It terminates the computation
after a given treshold is reached. This new function is always faster, but
brings real wins only on bigger test-cases.
The old function SumOfUnscheduledPredsOfSuccs is left in-place for now and therefore a warning about an unused static function is produced.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48872 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGRRList.cpp
|
| e326332acd5fefb9854118603b4d07d4e44b64c5 |
26-Mar-2008 |
Roman Levenstein <romix.llvm@googlemail.com> |
Use a linked data structure for the uses lists of an SDNode, just like
LLVM Value/Use does and MachineRegisterInfo/MachineOperand does.
This allows constant time for all uses list maintenance operations.
The idea was suggested by Chris. Reviewed by Evan and Dan.
Patch is tested and approved by Dan.
On normal use-cases compilation speed is not affected. On very big basic
blocks there are compilation speedups in the range of 15-20% or even better.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48822 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
egalizeDAG.cpp
egalizeTypes.cpp
egalizeTypes.h
cheduleDAG.cpp
electionDAG.cpp
|
| 0664ef9d7e3b538fc448fe42e8557aa52d8d6d51 |
26-Mar-2008 |
Roman Levenstein <romix.llvm@googlemail.com> |
Use a linked data structure for the uses lists of an SDNode, just like
LLVM Value/Use does and MachineRegisterInfo/MachineOperand does.
This allows constant time for all uses list maintenance operations.
The idea was suggested by Chris. Reviewed by Evan and Dan.
Patch is tested and approved by Dan.
On normal use-cases compilation speed is not affected. On very big basic
blocks there are compilation speedups in the range of 15-20% or even better.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48822 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
egalizeDAG.cpp
egalizeTypes.cpp
egalizeTypes.h
cheduleDAG.cpp
electionDAG.cpp
|
| 8dba9afd086f72db920db81a3d73c7297390cda7 |
26-Mar-2008 |
Roman Levenstein <romix.llvm@googlemail.com> |
Fixed some spelling errors. Thanks, Duncan!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48819 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGRRList.cpp
|
| 186d9b73181e9f74bd6b835cb4aa7d919d5c0953 |
26-Mar-2008 |
Roman Levenstein <romix.llvm@googlemail.com> |
Fixed some spelling errors. Thanks, Duncan!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48819 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGRRList.cpp
|
| e513ba49589bcf8fdf7dad658e20db21d6ef4758 |
26-Mar-2008 |
Roman Levenstein <romix.llvm@googlemail.com> |
Some improvements related to the computation of isReachable.
This fixes Bugzilla #1835 (http://llvm.org/bugs/show_bug.cgi?id=1835).
This patched is reviewed by Tanya and Dan. Dan tested and approved it.
The reason for the bad performance of the old algorithm is that it is very naive and scans every
time all nodes of the DAG in the worst case.
This patch introduces a new algorithm based on the paper "Online algorithms
for maintaining the topological order of a directed acyclic graph" by
David J.Pearce and Paul H.J.Kelly. This is the MNR algorithm. It has a
linear time worst-case and performs much better in most situations.
The paper can be found here:
http://fano.ics.uci.edu/cites/Document/Online-algorithms-for-maintaining-the-topological-order-of-a-directed-acyclic-graph.html
The main idea of the new algorithm is to compute the topological ordering of the SNodes in the
DAG and to maintain it even after DAG modifications. The topological ordering allows for very fast
node reachability checks.
Tests on very big input files with tens of thousands of instructions in a BB indicate huge
speed-ups (up to 10x compilation time improvement) compared to the old version.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48817 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGRRList.cpp
|
| d7997a09b665eaa2aa637a59ae2d5948e86f6145 |
26-Mar-2008 |
Roman Levenstein <romix.llvm@googlemail.com> |
Some improvements related to the computation of isReachable.
This fixes Bugzilla #1835 (http://llvm.org/bugs/show_bug.cgi?id=1835).
This patched is reviewed by Tanya and Dan. Dan tested and approved it.
The reason for the bad performance of the old algorithm is that it is very naive and scans every
time all nodes of the DAG in the worst case.
This patch introduces a new algorithm based on the paper "Online algorithms
for maintaining the topological order of a directed acyclic graph" by
David J.Pearce and Paul H.J.Kelly. This is the MNR algorithm. It has a
linear time worst-case and performs much better in most situations.
The paper can be found here:
http://fano.ics.uci.edu/cites/Document/Online-algorithms-for-maintaining-the-topological-order-of-a-directed-acyclic-graph.html
The main idea of the new algorithm is to compute the topological ordering of the SNodes in the
DAG and to maintain it even after DAG modifications. The topological ordering allows for very fast
node reachability checks.
Tests on very big input files with tens of thousands of instructions in a BB indicate huge
speed-ups (up to 10x compilation time improvement) compared to the old version.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48817 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGRRList.cpp
|
| cfbb2f074da2842e42956d3b4c21e91b37f36f06 |
25-Mar-2008 |
Dan Gohman <gohman@apple.com> |
A quick nm audit turned up several fixed tables and objects that were
marked read-write. Use const so that they can be allocated in a
read-only segment.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48800 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAG.cpp
|
| 12300e1e31559e34d96e533506f74f7cb77020a2 |
25-Mar-2008 |
Dan Gohman <gohman@apple.com> |
A quick nm audit turned up several fixed tables and objects that were
marked read-write. Use const so that they can be allocated in a
read-only segment.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48800 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAG.cpp
|
| 26471c48b3d49bdbcfcc05cb9a575b5fa123fbbf |
25-Mar-2008 |
Evan Cheng <evan.cheng@apple.com> |
Handle a special case xor undef, undef -> 0. Technically this should be transformed to undef. But this is such a common idiom (misuse) we are going to handle it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48792 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
electionDAG.cpp
|
| 5d00cb423a9033583f5bdb46d5bfee2dd23cf02e |
25-Mar-2008 |
Evan Cheng <evan.cheng@apple.com> |
Handle a special case xor undef, undef -> 0. Technically this should be transformed to undef. But this is such a common idiom (misuse) we are going to handle it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48792 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
electionDAG.cpp
|
| cffbd2562a5e3ba435dd2b622710ec272c634da5 |
25-Mar-2008 |
Dan Gohman <gohman@apple.com> |
Fix typos.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48779 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGRRList.cpp
|
| d0088429325fea57087191b91b1be2119a608e58 |
25-Mar-2008 |
Dan Gohman <gohman@apple.com> |
Fix typos.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48779 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGRRList.cpp
|
| ea10046ebc7aa103e8434ef63c4350d676dc20f3 |
25-Mar-2008 |
Evan Cheng <evan.cheng@apple.com> |
Remove an unneeded test.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48755 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| e40b51cd8322c5b9f51ffbc1589280db05f7d97b |
25-Mar-2008 |
Evan Cheng <evan.cheng@apple.com> |
Remove an unneeded test.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48755 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 4c931fc6e2a901f86ef20d5844bcad3cfd99c781 |
24-Mar-2008 |
Dan Gohman <gohman@apple.com> |
APIntify SelectionDAG's EXTRACT_ELEMENT code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48726 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 452b4ce4d8ec5ac79706f7811fc8f4405aaa650c |
24-Mar-2008 |
Dan Gohman <gohman@apple.com> |
APIntify SelectionDAG's EXTRACT_ELEMENT code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48726 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| c73ede0a9beaee2e11d004f816a8207d9bd79072 |
22-Mar-2008 |
Anton Korobeynikov <asl@math.spbu.ru> |
Another comments fixing
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48683 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 851493043e6cf5b16727dd2e1ed291152555ea34 |
22-Mar-2008 |
Anton Korobeynikov <asl@math.spbu.ru> |
Another comments fixing
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48683 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 08b1173971a51eb89d7d6ee0992c39170c86994a |
22-Mar-2008 |
Evan Cheng <evan.cheng@apple.com> |
Teach DAG combiner to commute commutable binary nodes in order to achieve sdisel CSE.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48673 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
electionDAG.cpp
|
| d111358ce048c11a4e114418731ee892da23abdc |
22-Mar-2008 |
Evan Cheng <evan.cheng@apple.com> |
Teach DAG combiner to commute commutable binary nodes in order to achieve sdisel CSE.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48673 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
electionDAG.cpp
|
| 4145bd509d0be0ea2ebea693a7ad15948480d982 |
21-Mar-2008 |
Dan Gohman <gohman@apple.com> |
Fix -view-sunit-dags to support cross-rc-copy nodes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48664 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGPrinter.cpp
|
| d0627015cec0b75f7044b7aef28f6e802e0f4648 |
21-Mar-2008 |
Dan Gohman <gohman@apple.com> |
Fix -view-sunit-dags to support cross-rc-copy nodes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48664 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGPrinter.cpp
|
| 276dcbdc8db6614cfd5004dc7dc35e437ddf9c58 |
21-Mar-2008 |
Duncan Sands <baldrick@free.fr> |
Introduce a new node for holding call argument
flags. This is needed by the new legalize types
infrastructure which wants to expand the 64 bit
constants previously used to hold the flags on
32 bit machines. There are two functional changes:
(1) in LowerArguments, if a parameter has the zext
attribute set then that is marked in the flags;
before it was being ignored; (2) PPC had some bogus
code for handling two word arguments when using the
ELF 32 ABI, which was hard to convert because of
the bogusness. As suggested by the original author
(Nicolas Geoffray), I've disabled it for the moment.
Tested with "make check" and the Ada ACATS testsuite.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48640 91177308-0d34-0410-b5e6-96231b3b80d8
allingConvLower.cpp
egalizeDAG.cpp
electionDAG.cpp
electionDAGISel.cpp
electionDAGPrinter.cpp
|
| c93fae3679c1b0ce8da92aaf825630fcc8580a00 |
21-Mar-2008 |
Duncan Sands <baldrick@free.fr> |
Introduce a new node for holding call argument
flags. This is needed by the new legalize types
infrastructure which wants to expand the 64 bit
constants previously used to hold the flags on
32 bit machines. There are two functional changes:
(1) in LowerArguments, if a parameter has the zext
attribute set then that is marked in the flags;
before it was being ignored; (2) PPC had some bogus
code for handling two word arguments when using the
ELF 32 ABI, which was hard to convert because of
the bogusness. As suggested by the original author
(Nicolas Geoffray), I've disabled it for the moment.
Tested with "make check" and the Ada ACATS testsuite.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48640 91177308-0d34-0410-b5e6-96231b3b80d8
allingConvLower.cpp
egalizeDAG.cpp
electionDAG.cpp
electionDAGISel.cpp
electionDAGPrinter.cpp
|
| b9b042800445178e2dff1c83ead3d08d3f36dc29 |
20-Mar-2008 |
Christopher Lamb <christopher.lamb@gmail.com> |
Check even more carefully before applying this DAGCombine transform.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48580 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 21e8a955ef3481976b562d7f10db967f6def3d2d |
20-Mar-2008 |
Christopher Lamb <christopher.lamb@gmail.com> |
Check even more carefully before applying this DAGCombine transform.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48580 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 260e07ec8ceb98337a9eeb5377d97dfcc0058a25 |
20-Mar-2008 |
Evan Cheng <evan.cheng@apple.com> |
Fix this xform: (sra (shl X, m), result_size) -> (sign_extend (trunc (shl X, result_size - n - m)))
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48578 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| ca0e80fc6b927e48363387a8f721883141f8b2b3 |
20-Mar-2008 |
Evan Cheng <evan.cheng@apple.com> |
Fix this xform: (sra (shl X, m), result_size) -> (sign_extend (trunc (shl X, result_size - n - m)))
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48578 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 71a2cb25ebc818383dd0f80475bc166f834e8d99 |
20-Mar-2008 |
Chris Lattner <sabre@nondot.org> |
detabify llvm, patch by Mike Stump!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48577 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeTypesExpand.cpp
egalizeTypesPromote.cpp
|
| 6734c3a8ea14d2bbdf7704794f3df2e0a28aacb2 |
20-Mar-2008 |
Chris Lattner <sabre@nondot.org> |
detabify llvm, patch by Mike Stump!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48577 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeTypesExpand.cpp
egalizeTypesPromote.cpp
|
| 15cbde3cf6542ec9c120f59d5d8f3586f5f332c6 |
19-Mar-2008 |
Christopher Lamb <christopher.lamb@gmail.com> |
Fix X86's isTruncateFree to not claim that truncate to i1 is free. This fixes Bill's testcase that failed for r48491.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48542 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| fc5c164b753c9ca42901514c645c70e5b61c5c11 |
19-Mar-2008 |
Christopher Lamb <christopher.lamb@gmail.com> |
Fix X86's isTruncateFree to not claim that truncate to i1 is free. This fixes Bill's testcase that failed for r48491.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48542 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 2974e49019b05ee4bec175a8d9cc736a512e3254 |
18-Mar-2008 |
Bill Wendling <isanbard@gmail.com> |
Temporarily revert r48491. It's breaking test/CodeGen/X86/xorl.ll.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48510 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| c74ab2edfd76cd9b0e903082ad1c73d19ffb61bc |
18-Mar-2008 |
Bill Wendling <isanbard@gmail.com> |
Temporarily revert r48491. It's breaking test/CodeGen/X86/xorl.ll.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48510 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| cf49819877addffa29cbb33dc6aab963868e74ee |
18-Mar-2008 |
Dale Johannesen <dalej@apple.com> |
Make conversions of i8/i16 to ppcf128 work.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48493 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 6a779c89400c76ed380648e254436b56859206ed |
18-Mar-2008 |
Dale Johannesen <dalej@apple.com> |
Make conversions of i8/i16 to ppcf128 work.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48493 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 981576c8182d9099030153772ac2c40ef79290fb |
18-Mar-2008 |
Christopher Lamb <christopher.lamb@gmail.com> |
Target independent DAG transform to use truncate for field extraction + sign extend on targets where this is profitable. Passes nightly on x86-64.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48491 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| c1ca3cc7cbbf824cc877d65d211e4a0199447821 |
18-Mar-2008 |
Christopher Lamb <christopher.lamb@gmail.com> |
Target independent DAG transform to use truncate for field extraction + sign extend on targets where this is profitable. Passes nightly on x86-64.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48491 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| c9298235251b014e86a7368d92b589d093acb64a |
16-Mar-2008 |
Christopher Lamb <christopher.lamb@gmail.com> |
Make insert_subreg a two-address instruction, vastly simplifying LowerSubregs pass. Add a new TII, subreg_to_reg, which is like insert_subreg except that it takes an immediate implicit value to insert into rather than a register.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48412 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAG.cpp
|
| 76d72daac239517dd47b3ab462af7642fd10fefd |
16-Mar-2008 |
Christopher Lamb <christopher.lamb@gmail.com> |
Make insert_subreg a two-address instruction, vastly simplifying LowerSubregs pass. Add a new TII, subreg_to_reg, which is like insert_subreg except that it takes an immediate implicit value to insert into rather than a register.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48412 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAG.cpp
|
| da47e6e0d003c873da960361549e57ee4617c301 |
15-Mar-2008 |
Evan Cheng <evan.cheng@apple.com> |
Replace all target specific implicit def instructions with a target independent one: TargetInstrInfo::IMPLICIT_DEF.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48380 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAG.cpp
|
| 3c0eda5a21a0e79a345fc9da0489fdbb5ef6b07e |
15-Mar-2008 |
Evan Cheng <evan.cheng@apple.com> |
Replace all target specific implicit def instructions with a target independent one: TargetInstrInfo::IMPLICIT_DEF.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48380 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAG.cpp
|
| 23a1d0c1613002073e4340deb34449a61826c93c |
14-Mar-2008 |
Duncan Sands <baldrick@free.fr> |
Do not generate special entries in the dwarf eh
table for nounwind calls.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48373 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 85127f6fa8c6916862f4e81550a404dd6cc708a2 |
14-Mar-2008 |
Duncan Sands <baldrick@free.fr> |
Do not generate special entries in the dwarf eh
table for nounwind calls.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48373 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| d1ba3338d1b0084122c32a8085e41a8dd5e91edc |
14-Mar-2008 |
Duncan Sands <baldrick@free.fr> |
Simplify using getIntPtrConstant.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48355 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeTypesSplit.cpp
|
| 1f59dc09e6670841f26d6db940843573ad6d7946 |
14-Mar-2008 |
Duncan Sands <baldrick@free.fr> |
Simplify using getIntPtrConstant.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48355 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeTypesSplit.cpp
|
| 5922f561c65968ef1865cc8434d191041e450602 |
14-Mar-2008 |
Nate Begeman <natebegeman@mac.com> |
Tabs -> spaces
Use getIntPtrConstant in a couple places to shorten stuff up
Handle splitting vector shuffles with undefs in the mask
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48351 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 8bb3cb3b98d017204540a51407fdb82ed555d16c |
14-Mar-2008 |
Nate Begeman <natebegeman@mac.com> |
Tabs -> spaces
Use getIntPtrConstant in a couple places to shorten stuff up
Handle splitting vector shuffles with undefs in the mask
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48351 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| db2d773fe6e53995c49c11ba34271fc559e286a1 |
14-Mar-2008 |
Evan Cheng <evan.cheng@apple.com> |
Livein copy scheduling fixes: do not coalesce physical register copies, correctly determine the safe location to insert the copies.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48348 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAG.cpp
|
| a96f9644e3cde848afe811fba9f4efdbdea26950 |
14-Mar-2008 |
Evan Cheng <evan.cheng@apple.com> |
Livein copy scheduling fixes: do not coalesce physical register copies, correctly determine the safe location to insert the copies.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48348 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAG.cpp
|
| 002e5d0a170dadd5c307e0b00d8c7970835837e6 |
13-Mar-2008 |
Dan Gohman <gohman@apple.com> |
More APInt-ification.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48344 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
egalizeDAG.cpp
egalizeTypesExpand.cpp
electionDAG.cpp
argetLowering.cpp
|
| 9d24dc7472df0ac5c3c516987979058673ef02f6 |
13-Mar-2008 |
Dan Gohman <gohman@apple.com> |
More APInt-ification.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48344 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
egalizeDAG.cpp
egalizeTypesExpand.cpp
electionDAG.cpp
argetLowering.cpp
|
| 9e23336d0c99fc5cae04037ead6d8f2b677e8764 |
12-Mar-2008 |
Evan Cheng <evan.cheng@apple.com> |
Experimental scheduler change to schedule / coalesce the copies added for function livein's. Take 2008-03-10-RegAllocInfLoop.ll, the schedule looks like this after these copies are inserted:
entry: 0x12049d0, LLVM BB @0x1201fd0, ID#0:
Live Ins: %EAX %EDX %ECX
%reg1031<def> = MOVPC32r 0
%reg1032<def> = ADD32ri %reg1031, <es:_GLOBAL_OFFSET_TABLE_>, %EFLAGS<imp-def>
%reg1028<def> = MOV32rr %EAX
%reg1029<def> = MOV32rr %EDX
%reg1030<def> = MOV32rr %ECX
%reg1027<def> = MOV8rm %reg0, 1, %reg0, 0, Mem:LD(1,1) [0x1201910 + 0]
%reg1025<def> = MOV32rr %reg1029
%reg1026<def> = MOV32rr %reg1030
%reg1024<def> = MOV32rr %reg1028
The copies unnecessarily increase register pressure and it will end up requiring a physical register to be spilled.
With -schedule-livein-copies:
entry: 0x12049d0, LLVM BB @0x1201fa0, ID#0:
Live Ins: %EAX %EDX %ECX
%reg1031<def> = MOVPC32r 0
%reg1032<def> = ADD32ri %reg1031, <es:_GLOBAL_OFFSET_TABLE_>, %EFLAGS<imp-def>
%reg1024<def> = MOV32rr %EAX
%reg1025<def> = MOV32rr %EDX
%reg1026<def> = MOV32rr %ECX
%reg1027<def> = MOV8rm %reg0, 1, %reg0, 0, Mem:LD(1,1) [0x12018e0 + 0]
Much better!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48307 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAG.cpp
|
| 8725a1177fdd441520736f8f4af0f9a65ba07818 |
12-Mar-2008 |
Evan Cheng <evan.cheng@apple.com> |
Experimental scheduler change to schedule / coalesce the copies added for function livein's. Take 2008-03-10-RegAllocInfLoop.ll, the schedule looks like this after these copies are inserted:
entry: 0x12049d0, LLVM BB @0x1201fd0, ID#0:
Live Ins: %EAX %EDX %ECX
%reg1031<def> = MOVPC32r 0
%reg1032<def> = ADD32ri %reg1031, <es:_GLOBAL_OFFSET_TABLE_>, %EFLAGS<imp-def>
%reg1028<def> = MOV32rr %EAX
%reg1029<def> = MOV32rr %EDX
%reg1030<def> = MOV32rr %ECX
%reg1027<def> = MOV8rm %reg0, 1, %reg0, 0, Mem:LD(1,1) [0x1201910 + 0]
%reg1025<def> = MOV32rr %reg1029
%reg1026<def> = MOV32rr %reg1030
%reg1024<def> = MOV32rr %reg1028
The copies unnecessarily increase register pressure and it will end up requiring a physical register to be spilled.
With -schedule-livein-copies:
entry: 0x12049d0, LLVM BB @0x1201fa0, ID#0:
Live Ins: %EAX %EDX %ECX
%reg1031<def> = MOVPC32r 0
%reg1032<def> = ADD32ri %reg1031, <es:_GLOBAL_OFFSET_TABLE_>, %EFLAGS<imp-def>
%reg1024<def> = MOV32rr %EAX
%reg1025<def> = MOV32rr %EDX
%reg1026<def> = MOV32rr %ECX
%reg1027<def> = MOV8rm %reg0, 1, %reg0, 0, Mem:LD(1,1) [0x12018e0 + 0]
Much better!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48307 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAG.cpp
|
| d8742eeb2f7cabc45a1c3736a2780bf87ba684ba |
12-Mar-2008 |
Duncan Sands <baldrick@free.fr> |
Initial soft-float support for LegalizeTypes. I rewrote
the fcopysign expansion from LegalizeDAG to get rid of
what seems to be a bug: the use of sign extension means
that when copying the sign bit from an f32 to an f64,
the upper 32 bits of the f64 (now an i64) are set, not
just the top bit... I also generalized it to work for
any sized floating point types, and removed the bogosity:
SDOperand Mask1 = (SrcVT == MVT::f64)
? DAG.getConstantFP(BitsToDouble(1ULL << 63), SrcVT)
: DAG.getConstantFP(BitsToFloat(1U << 31), SrcVT);
Mask1 = DAG.getNode(ISD::BIT_CONVERT, SrcNVT, Mask1);
(here SrcNVT is an integer with the same size as SrcVT).
As far as I can see this takes a 1 << 63, converts to
a double, converts that to a floating point constant
then converts that to an integer constant, ending up
with... 1 << 63 as an integer constant! So I just
generate this integer constant directly.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48305 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeTypes.cpp
egalizeTypes.h
egalizeTypesExpand.cpp
egalizeTypesFloatToInt.cpp
egalizeTypesPromote.cpp
egalizeTypesSplit.cpp
|
| 40d4e512f1a420a79f8d8fca7abc6dc16add6059 |
12-Mar-2008 |
Duncan Sands <baldrick@free.fr> |
Initial soft-float support for LegalizeTypes. I rewrote
the fcopysign expansion from LegalizeDAG to get rid of
what seems to be a bug: the use of sign extension means
that when copying the sign bit from an f32 to an f64,
the upper 32 bits of the f64 (now an i64) are set, not
just the top bit... I also generalized it to work for
any sized floating point types, and removed the bogosity:
SDOperand Mask1 = (SrcVT == MVT::f64)
? DAG.getConstantFP(BitsToDouble(1ULL << 63), SrcVT)
: DAG.getConstantFP(BitsToFloat(1U << 31), SrcVT);
Mask1 = DAG.getNode(ISD::BIT_CONVERT, SrcNVT, Mask1);
(here SrcNVT is an integer with the same size as SrcVT).
As far as I can see this takes a 1 << 63, converts to
a double, converts that to a floating point constant
then converts that to an integer constant, ending up
with... 1 << 63 as an integer constant! So I just
generate this integer constant directly.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48305 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeTypes.cpp
egalizeTypes.h
egalizeTypesExpand.cpp
egalizeTypesFloatToInt.cpp
egalizeTypesPromote.cpp
egalizeTypesSplit.cpp
|
| 87a8615015ad85f1a95f79da221c7da9428d2208 |
12-Mar-2008 |
Duncan Sands <baldrick@free.fr> |
Fix typo.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48295 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeTypesScalarize.cpp
|
| 877c7a6838d51a6acd5e7bbf2c379fdcabd423a0 |
12-Mar-2008 |
Duncan Sands <baldrick@free.fr> |
Fix typo.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48295 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeTypesScalarize.cpp
|
| 25eb043759c23b61769108f78382eb9701c41db2 |
12-Mar-2008 |
Duncan Sands <baldrick@free.fr> |
Don't try to extract an i32 from an f64. This
getCopyToParts problem was noticed by the new
LegalizeTypes infrastructure. In order to avoid
this kind of thing in the future I've added a
check that EXTRACT_ELEMENT is only used with
integers. Once LegalizeTypes is up and running
most likely BUILD_PAIR and EXTRACT_ELEMENT can
be removed, in favour of using apints instead.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48294 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
electionDAGISel.cpp
|
| c4d85175a252066fde78c3c79a22fc9618351976 |
12-Mar-2008 |
Duncan Sands <baldrick@free.fr> |
Don't try to extract an i32 from an f64. This
getCopyToParts problem was noticed by the new
LegalizeTypes infrastructure. In order to avoid
this kind of thing in the future I've added a
check that EXTRACT_ELEMENT is only used with
integers. Once LegalizeTypes is up and running
most likely BUILD_PAIR and EXTRACT_ELEMENT can
be removed, in favour of using apints instead.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48294 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
electionDAGISel.cpp
|
| c8e3b147eea6155eb047340205730b5332259bb6 |
12-Mar-2008 |
Evan Cheng <evan.cheng@apple.com> |
Clean up my own mess.
X86 lowering normalize vector 0 to v4i32. However DAGCombine can fold (sub x, x) -> 0 after legalization. It can create a zero vector of a type that's not expected (e.g. v8i16). We don't want to disable the optimization since leaving a (sub x, x) is really bad. Add isel patterns for other types of vector 0 to ensure correctness. It's highly unlikely to happen other than in bugpoint reduced test cases.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48279 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| a15896ec75ccbfbd12600d9cd16dc42c4c39a8ac |
12-Mar-2008 |
Evan Cheng <evan.cheng@apple.com> |
Clean up my own mess.
X86 lowering normalize vector 0 to v4i32. However DAGCombine can fold (sub x, x) -> 0 after legalization. It can create a zero vector of a type that's not expected (e.g. v8i16). We don't want to disable the optimization since leaving a (sub x, x) is really bad. Add isel patterns for other types of vector 0 to ensure correctness. It's highly unlikely to happen other than in bugpoint reduced test cases.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48279 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 0cec956d814123140759cd25fec8f07e65b43849 |
12-Mar-2008 |
Evan Cheng <evan.cheng@apple.com> |
Total brain cramp.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48274 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 74b7f7bbd7426f5b292f30348fff9b744a81e75f |
12-Mar-2008 |
Evan Cheng <evan.cheng@apple.com> |
Total brain cramp.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48274 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 4d86e2a6b8edc814165a3e63f55bfaea0b8f224d |
11-Mar-2008 |
Anton Korobeynikov <asl@math.spbu.ru> |
Correctly propagate thread-local flag from aliasee to alias. This fixes PR2137
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48257 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| dd9dc5d5ecbb3e3982f34022311a5513b3ffbba6 |
11-Mar-2008 |
Anton Korobeynikov <asl@math.spbu.ru> |
Correctly propagate thread-local flag from aliasee to alias. This fixes PR2137
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48257 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 9736028d84de3a72dd8db5f49cfaa07280154a0e |
11-Mar-2008 |
Dan Gohman <gohman@apple.com> |
Use the correct value for InSignBit.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48245 91177308-0d34-0410-b5e6-96231b3b80d8
argetLowering.cpp
|
| 343b4d98232b0f59fa45ab9645226cb0d4baf424 |
11-Mar-2008 |
Dan Gohman <gohman@apple.com> |
Use the correct value for InSignBit.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48245 91177308-0d34-0410-b5e6-96231b3b80d8
argetLowering.cpp
|
| ef5d194aaa7d09937759447bceca0ff80bee1261 |
11-Mar-2008 |
Dan Gohman <gohman@apple.com> |
Initial codegen support for functions and calls with multiple return values.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48244 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 3fdea2e28b849b59e22bef28019faba58b9e4775 |
11-Mar-2008 |
Dan Gohman <gohman@apple.com> |
Initial codegen support for functions and calls with multiple return values.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48244 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 1fab4a6bbb6eb5d44d35c8aade2493143b44d288 |
11-Mar-2008 |
Christopher Lamb <christopher.lamb@gmail.com> |
Recommitting parts of r48130. These do not appear to cause the observed failures.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48223 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAG.cpp
|
| d0c8eaaf4275ec4f39b0798393a9dc5182100f4b |
11-Mar-2008 |
Christopher Lamb <christopher.lamb@gmail.com> |
Recommitting parts of r48130. These do not appear to cause the observed failures.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48223 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAG.cpp
|
| 676dd7c80b6f91178452535ac45ca58feb23cc42 |
11-Mar-2008 |
Evan Cheng <evan.cheng@apple.com> |
When the register allocator runs out of registers, spill a physical register around the def's and use's of the interval being allocated to make it possible for the interval to target a register and spill it right away and restore a register for uses. This likely generates terrible code but is before than aborting.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48218 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAG.cpp
cheduleDAGRRList.cpp
|
| 14cc83fc39c895bb5a8b6055fa4d7b1e454c685d |
11-Mar-2008 |
Evan Cheng <evan.cheng@apple.com> |
When the register allocator runs out of registers, spill a physical register around the def's and use's of the interval being allocated to make it possible for the interval to target a register and spill it right away and restore a register for uses. This likely generates terrible code but is before than aborting.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48218 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAG.cpp
cheduleDAGRRList.cpp
|
| ac7613a3263caa80d735f3fbf2b9f7b81deabc08 |
11-Mar-2008 |
Duncan Sands <baldrick@free.fr> |
Some LegalizeTypes code factorization and minor
enhancements.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48215 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeTypes.cpp
egalizeTypes.h
egalizeTypesExpand.cpp
egalizeTypesPromote.cpp
egalizeTypesSplit.cpp
|
| 664d27f26fa667a4eb83b2e482f673346b193cf1 |
11-Mar-2008 |
Duncan Sands <baldrick@free.fr> |
Some LegalizeTypes code factorization and minor
enhancements.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48215 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeTypes.cpp
egalizeTypes.h
egalizeTypesExpand.cpp
egalizeTypesPromote.cpp
egalizeTypesSplit.cpp
|
| 5d03f21744f30988b962f023bd397bb5c6a20178 |
11-Mar-2008 |
Chris Lattner <sabre@nondot.org> |
compile: double test() {}
into:
_test:
fldz
ret
instead of:
_test:
subl $12, %esp
#IMPLICIT_DEF %xmm0
movsd %xmm0, (%esp)
fldl (%esp)
addl $12, %esp
ret
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48213 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| e6465dde721ff9ad5d5407dc4616fe8cab9b8eef |
11-Mar-2008 |
Chris Lattner <sabre@nondot.org> |
compile: double test() {}
into:
_test:
fldz
ret
instead of:
_test:
subl $12, %esp
#IMPLICIT_DEF %xmm0
movsd %xmm0, (%esp)
fldl (%esp)
addl $12, %esp
ret
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48213 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| c5733ac5d31b4cac5af0bc769411386d931237ba |
11-Mar-2008 |
Chris Lattner <sabre@nondot.org> |
variadic instructions don't have operand info for variadic arguments.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48208 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAG.cpp
|
| 92d5128d2864330cd5dce9658f59c5aac983ddcb |
11-Mar-2008 |
Chris Lattner <sabre@nondot.org> |
variadic instructions don't have operand info for variadic arguments.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48208 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAG.cpp
|
| 034f60ed24c53c1e37f7695965f782faec2dff2b |
11-Mar-2008 |
Dan Gohman <gohman@apple.com> |
Generalize ExpandIntToFP to handle the case where the operand is legal
and it's the result that requires expansion. This code is a little confusing
because the TargetLoweringInfo tables for [US]INT_TO_FP use the operand type
(the integer type) rather than the result type.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48206 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 8b232ff522973d2cf38a44c9ded1fe849f92c7f8 |
11-Mar-2008 |
Dan Gohman <gohman@apple.com> |
Generalize ExpandIntToFP to handle the case where the operand is legal
and it's the result that requires expansion. This code is a little confusing
because the TargetLoweringInfo tables for [US]INT_TO_FP use the operand type
(the integer type) rather than the result type.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48206 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| b7795801001a1537fc6debb37f6d8658bcf6b517 |
11-Mar-2008 |
Chris Lattner <sabre@nondot.org> |
If a register operand comes from the variadic part of a node, don't
verify the register constraint matches what the instruction expects.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48205 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAG.cpp
|
| c3d37ab086626e06154b2466a28dcc3bb27189b2 |
11-Mar-2008 |
Chris Lattner <sabre@nondot.org> |
If a register operand comes from the variadic part of a node, don't
verify the register constraint matches what the instruction expects.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48205 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAG.cpp
|
| 6cf9b8adf43b0a460fb4ba8ddbff2787f5aa9d5e |
11-Mar-2008 |
Dan Gohman <gohman@apple.com> |
More APInt-ification.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48201 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 395097646538ea94d3573408b183d9ae9b8a9f20 |
11-Mar-2008 |
Dan Gohman <gohman@apple.com> |
More APInt-ification.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48201 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 45f36ea448cabcbd18b1cb0e29af8c70366baf55 |
11-Mar-2008 |
Dan Gohman <gohman@apple.com> |
Correctly clone FlaggedNodes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48196 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAG.cpp
|
| b100d80af680c01590c05f0f2cf2d31868e9c9a1 |
11-Mar-2008 |
Dan Gohman <gohman@apple.com> |
Correctly clone FlaggedNodes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48196 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAG.cpp
|
| f25275cb3c930b579707e33c22c1e1c5682b89d3 |
11-Mar-2008 |
Dan Gohman <gohman@apple.com> |
APInt-ify this.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48194 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeTypesExpand.cpp
|
| 1f6796f8476548629cb443920bc602614ca65ddd |
11-Mar-2008 |
Dan Gohman <gohman@apple.com> |
APInt-ify this.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48194 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeTypesExpand.cpp
|
| a2e9485e34f1348526ed104dbdc194673e291077 |
11-Mar-2008 |
Dan Gohman <gohman@apple.com> |
Implement more support for fp-to-i128 and i128-to-fp conversions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48189 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
argetLowering.cpp
|
| ec51f643a9a098c6d32ac7ab7c775bdf0d332b89 |
11-Mar-2008 |
Dan Gohman <gohman@apple.com> |
Implement more support for fp-to-i128 and i128-to-fp conversions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48189 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
argetLowering.cpp
|
| 76c605b18ee74e2c521a02431ab9e1ce6912d827 |
10-Mar-2008 |
Dan Gohman <gohman@apple.com> |
Fix mul expansion to check the correct number of bits for
zero extension when checking if an unsigned multiply is
safe.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48171 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 2594d94fcc0f5c4ffc32059dec5209efa97d55a6 |
10-Mar-2008 |
Dan Gohman <gohman@apple.com> |
Fix mul expansion to check the correct number of bits for
zero extension when checking if an unsigned multiply is
safe.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48171 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 62fcc41d958bf9b8cee43271789136cb7100705f |
10-Mar-2008 |
Evan Cheng <evan.cheng@apple.com> |
Somewhat better solution.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48170 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| cf31b8d763edf30c4d8cb9080de2c81a3764ef09 |
10-Mar-2008 |
Evan Cheng <evan.cheng@apple.com> |
Somewhat better solution.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48170 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| d2cde68855125b6815b1575f29cd96927614b0cd |
10-Mar-2008 |
Evan Cheng <evan.cheng@apple.com> |
Default ISD::PREFETCH to expand.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48169 91177308-0d34-0410-b5e6-96231b3b80d8
argetLowering.cpp
|
| 8d51ab3e4bb3f45ab8818519c5d27154cecf8b72 |
10-Mar-2008 |
Evan Cheng <evan.cheng@apple.com> |
Default ISD::PREFETCH to expand.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48169 91177308-0d34-0410-b5e6-96231b3b80d8
argetLowering.cpp
|
| 4499e495eabe8de7d595416a03c56af4688df507 |
10-Mar-2008 |
Evan Cheng <evan.cheng@apple.com> |
Revert 48125, 48126, and 48130 for now to unbreak some x86-64 tests.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48167 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAG.cpp
|
| bd97af057e8e7d03ae8300e570483ffbb3c40e5a |
10-Mar-2008 |
Evan Cheng <evan.cheng@apple.com> |
Revert 48125, 48126, and 48130 for now to unbreak some x86-64 tests.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48167 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAG.cpp
|
| 5b8f82e35b51bf007de07a7ca9347d804084ddf8 |
10-Mar-2008 |
Scott Michel <scottm@aero.org> |
Give TargetLowering::getSetCCResultType() a parameter so that ISD::SETCC's
return ValueType can depend its operands' ValueType.
This is a cosmetic change, no functionality impacted.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48145 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
egalizeDAG.cpp
egalizeTypesExpand.cpp
egalizeTypesPromote.cpp
electionDAGISel.cpp
argetLowering.cpp
|
| 502151f4cd47b5b42462b95736a0c2ab1d57072a |
10-Mar-2008 |
Scott Michel <scottm@aero.org> |
Give TargetLowering::getSetCCResultType() a parameter so that ISD::SETCC's
return ValueType can depend its operands' ValueType.
This is a cosmetic change, no functionality impacted.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48145 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
egalizeDAG.cpp
egalizeTypesExpand.cpp
egalizeTypesPromote.cpp
electionDAGISel.cpp
argetLowering.cpp
|
| ff247d2ed41dac50d99c5ff534b12f33bb57310a |
10-Mar-2008 |
Evan Cheng <evan.cheng@apple.com> |
Doh
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48140 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| ba0f30fd59e32c2bfb1ce949fa95ebb05f4d65cc |
10-Mar-2008 |
Evan Cheng <evan.cheng@apple.com> |
Doh
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48140 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| f79e60649a5edea03bdccf8521d77c15cbb33af4 |
10-Mar-2008 |
Evan Cheng <evan.cheng@apple.com> |
Avoid creating BUILD_VECTOR of all zero elements of "non-normalized" type (e.g. v8i16 on x86) after legalizer. Instruction selection does not expect to see them. In all likelihood this can only be an issue in a bugpoint reduced test case.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48136 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 8628067377765b56339e988ca44e206b7ceb48cc |
10-Mar-2008 |
Evan Cheng <evan.cheng@apple.com> |
Avoid creating BUILD_VECTOR of all zero elements of "non-normalized" type (e.g. v8i16 on x86) after legalizer. Instruction selection does not expect to see them. In all likelihood this can only be an issue in a bugpoint reduced test case.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48136 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 3feb0170a8d65984ce5c01a85e7dfd4005f8bb35 |
10-Mar-2008 |
Christopher Lamb <christopher.lamb@gmail.com> |
Allow insert_subreg into implicit, target-specific values.
Change insert/extract subreg instructions to be able to be used in TableGen patterns.
Use the above features to reimplement an x86-64 pseudo instruction as a pattern.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48130 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAG.cpp
|
| 5615ce4ec4c1b68fd48f4a19bc19a4f77c97c20a |
10-Mar-2008 |
Christopher Lamb <christopher.lamb@gmail.com> |
Allow insert_subreg into implicit, target-specific values.
Change insert/extract subreg instructions to be able to be used in TableGen patterns.
Use the above features to reimplement an x86-64 pseudo instruction as a pattern.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48130 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAG.cpp
|
| b8cafe3427a168414400e5dfcbea78996792d2c3 |
10-Mar-2008 |
Dale Johannesen <dalej@apple.com> |
Increase ISD::ParamFlags to 64 bits. Increase the ByValSize
field to 32 bits, thus enabling correct handling of ByVal
structs bigger than 0x1ffff. Abstract interface a bit.
Fixes gcc.c-torture/execute/pr23135.c and
gcc.c-torture/execute/pr28982b.c in gcc testsuite (were ICE'ing
on ppc32, quietly producing wrong code on x86-32.)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48122 91177308-0d34-0410-b5e6-96231b3b80d8
allingConvLower.cpp
electionDAGISel.cpp
|
| 322e3b73f704add3cd636a47381bacf1c6b2aa00 |
10-Mar-2008 |
Dale Johannesen <dalej@apple.com> |
Increase ISD::ParamFlags to 64 bits. Increase the ByValSize
field to 32 bits, thus enabling correct handling of ByVal
structs bigger than 0x1ffff. Abstract interface a bit.
Fixes gcc.c-torture/execute/pr23135.c and
gcc.c-torture/execute/pr28982b.c in gcc testsuite (were ICE'ing
on ppc32, quietly producing wrong code on x86-32.)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48122 91177308-0d34-0410-b5e6-96231b3b80d8
allingConvLower.cpp
electionDAGISel.cpp
|
| 4c55c633d9fd795e0e39642daa07e592c7a285aa |
09-Mar-2008 |
Chris Lattner <sabre@nondot.org> |
remove an extraneous (and ugly) default argument, thanks Duncan.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48117 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 96d0b96930844d116fcde59f0d97dd0d41f8fb97 |
09-Mar-2008 |
Chris Lattner <sabre@nondot.org> |
remove an extraneous (and ugly) default argument, thanks Duncan.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48117 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 4468c1fd1c3dcc2cca7b881eb9f37f018405d2d9 |
09-Mar-2008 |
Chris Lattner <sabre@nondot.org> |
fp_round's produced by getCopyFromParts should always be exact, because
they are produced by calls (which are known exact) and by cross block copies
which are known to be produced by extends.
This improves:
define double @test2() {
%tmp85 = call double asm sideeffect "fld0", "={st(0)}"()
ret double %tmp85
}
from:
_test2:
subl $20, %esp
# InlineAsm Start
fld0
# InlineAsm End
fstpl 8(%esp)
movsd 8(%esp), %xmm0
movsd %xmm0, (%esp)
fldl (%esp)
addl $20, %esp
#FP_REG_KILL
ret
to:
_test2:
# InlineAsm Start
fld0
# InlineAsm End
#FP_REG_KILL
ret
by avoiding a f64 <-> f80 trip
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48108 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| a7355b6a9de4d8a358a9ba6872ddfe909be27692 |
09-Mar-2008 |
Chris Lattner <sabre@nondot.org> |
fp_round's produced by getCopyFromParts should always be exact, because
they are produced by calls (which are known exact) and by cross block copies
which are known to be produced by extends.
This improves:
define double @test2() {
%tmp85 = call double asm sideeffect "fld0", "={st(0)}"()
ret double %tmp85
}
from:
_test2:
subl $20, %esp
# InlineAsm Start
fld0
# InlineAsm End
fstpl 8(%esp)
movsd 8(%esp), %xmm0
movsd %xmm0, (%esp)
fldl (%esp)
addl $20, %esp
#FP_REG_KILL
ret
to:
_test2:
# InlineAsm Start
fld0
# InlineAsm End
#FP_REG_KILL
ret
by avoiding a f64 <-> f80 trip
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48108 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| f30e1cf9b7f96395768e710b4707ecd5587e1185 |
09-Mar-2008 |
Chris Lattner <sabre@nondot.org> |
teach X86InstrInfo::copyRegToReg how to copy into ST(0) from
an RFP register class.
Teach ScheduleDAG how to handle CopyToReg with different src/dst
reg classes.
This allows us to compile trivial inline asms that expect stuff
on the top of x87-fp stack.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48107 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAG.cpp
|
| 0d12872f84c388a13107a4b96fe7f3ab9200f5f0 |
09-Mar-2008 |
Chris Lattner <sabre@nondot.org> |
teach X86InstrInfo::copyRegToReg how to copy into ST(0) from
an RFP register class.
Teach ScheduleDAG how to handle CopyToReg with different src/dst
reg classes.
This allows us to compile trivial inline asms that expect stuff
on the top of x87-fp stack.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48107 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAG.cpp
|
| 02b6d25a2702d8857b82d333f290550e3c6ec4dc |
09-Mar-2008 |
Chris Lattner <sabre@nondot.org> |
Add ScheduleDAG support for copytoreg where the src/dst register are
in different register classes, e.g. copy of ST(0) to RFP*. This gets
some really trivial inline asm working that plops things on the top of
stack (PR879)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48105 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAG.cpp
|
| e6fdb067f070ac3b648fb93a6a81c430d139fdbf |
09-Mar-2008 |
Chris Lattner <sabre@nondot.org> |
Add ScheduleDAG support for copytoreg where the src/dst register are
in different register classes, e.g. copy of ST(0) to RFP*. This gets
some really trivial inline asm working that plops things on the top of
stack (PR879)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48105 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAG.cpp
|
| d9c4c450bf3836cf71047364253d582a6cdaf5ad |
09-Mar-2008 |
Chris Lattner <sabre@nondot.org> |
fix 80 col violation
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48100 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAG.cpp
|
| 4e15fcc62ddd8f9f2c3f61499427e41eb815ddc0 |
09-Mar-2008 |
Chris Lattner <sabre@nondot.org> |
fix 80 col violation
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48100 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAG.cpp
|
| d43d85ccc9cb8d4cd00e5cf38827f50b415255ff |
09-Mar-2008 |
Chris Lattner <sabre@nondot.org> |
extend fp values with FP_EXTEND not FP_ROUND.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48097 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| f8eb9e8d1dd327ffe9ece689f2959e235f161aa8 |
09-Mar-2008 |
Chris Lattner <sabre@nondot.org> |
extend fp values with FP_EXTEND not FP_ROUND.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48097 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| f9d95c8835bc4f9072c33e1f9ebaa581a4d3268d |
09-Mar-2008 |
Chris Lattner <sabre@nondot.org> |
Fix two problems in SelectionDAGLegalize::ExpandBUILD_VECTOR's handling
of BUILD_VECTORS that only have two unique elements:
1. The previous code was nondeterminstic, because it walked a map in
SDOperand order, which isn't determinstic.
2. The previous code didn't handle the case when one element was undef
very well. Now we ensure that the generated shuffle mask has the
undef vector on the RHS (instead of potentially being on the LHS)
and that any elements that refer to it are themselves undef. This
allows us to compile CodeGen/X86/vec_set-9.ll into:
_test3:
movd %rdi, %xmm0
punpcklqdq %xmm0, %xmm0
ret
instead of:
_test3:
movd %rdi, %xmm1
#IMPLICIT_DEF %xmm0
punpcklqdq %xmm1, %xmm0
ret
... saving a register.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48060 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| d8cee73bf7f87593fc6a64fb729757b8e3192adc |
09-Mar-2008 |
Chris Lattner <sabre@nondot.org> |
Fix two problems in SelectionDAGLegalize::ExpandBUILD_VECTOR's handling
of BUILD_VECTORS that only have two unique elements:
1. The previous code was nondeterminstic, because it walked a map in
SDOperand order, which isn't determinstic.
2. The previous code didn't handle the case when one element was undef
very well. Now we ensure that the generated shuffle mask has the
undef vector on the RHS (instead of potentially being on the LHS)
and that any elements that refer to it are themselves undef. This
allows us to compile CodeGen/X86/vec_set-9.ll into:
_test3:
movd %rdi, %xmm0
punpcklqdq %xmm0, %xmm0
ret
instead of:
_test3:
movd %rdi, %xmm1
#IMPLICIT_DEF %xmm0
punpcklqdq %xmm1, %xmm0
ret
... saving a register.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48060 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| f3ba434781daa1c2b16f77a91e5209c21ce12428 |
09-Mar-2008 |
Chris Lattner <sabre@nondot.org> |
Teach SD some vector identities, allowing us to compile vec_set-9 into:
_test3:
movd %rdi, %xmm1
#IMPLICIT_DEF %xmm0
punpcklqdq %xmm1, %xmm0
ret
instead of:
_test3:
#IMPLICIT_DEF %rax
movd %rax, %xmm0
movd %rdi, %xmm1
punpcklqdq %xmm1, %xmm0
ret
This is still not ideal. There is no reason to two xmm regs.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48058 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 9f0705c05e504a58860a90d04bcd3984fb605556 |
09-Mar-2008 |
Chris Lattner <sabre@nondot.org> |
Teach SD some vector identities, allowing us to compile vec_set-9 into:
_test3:
movd %rdi, %xmm1
#IMPLICIT_DEF %xmm0
punpcklqdq %xmm1, %xmm0
ret
instead of:
_test3:
#IMPLICIT_DEF %rax
movd %rax, %xmm0
movd %rdi, %xmm1
punpcklqdq %xmm1, %xmm0
ret
This is still not ideal. There is no reason to two xmm regs.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48058 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 27b7db549e4c5bff4579d209304de5628513edeb |
08-Mar-2008 |
Evan Cheng <evan.cheng@apple.com> |
Implement x86 support for @llvm.prefetch. It corresponds to prefetcht{0|1|2} and prefetchnta instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48042 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
electionDAG.cpp
electionDAGISel.cpp
|
| d1d68074a0e6eebbfdde72a29e14f1cd3e831c67 |
08-Mar-2008 |
Evan Cheng <evan.cheng@apple.com> |
Implement x86 support for @llvm.prefetch. It corresponds to prefetcht{0|1|2} and prefetchnta instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48042 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
electionDAG.cpp
electionDAGISel.cpp
|
| eb49c4e008522df75f1b3f17ec0e2644eb4b1259 |
06-Mar-2008 |
Evan Cheng <evan.cheng@apple.com> |
80 col violation.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47998 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| eadaf4495d25535c9fed7d696a5891eb6ad302ce |
06-Mar-2008 |
Evan Cheng <evan.cheng@apple.com> |
80 col violation.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47998 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 433f6f62ca858c20d5d3f561e63818c2fda06ebe |
06-Mar-2008 |
Evan Cheng <evan.cheng@apple.com> |
Constant fold SIGN_EXTEND_INREG with ashr not lshr.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47992 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 7faa1d74f8d347615a0ff54eb05f8f0ac35af448 |
06-Mar-2008 |
Evan Cheng <evan.cheng@apple.com> |
Constant fold SIGN_EXTEND_INREG with ashr not lshr.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47992 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 0ea0356dff38dfd0420b8c0a2fdf2fae7898c024 |
05-Mar-2008 |
Dale Johannesen <dalej@apple.com> |
Clarify that CALLSEQ_START..END may not be nested,
and add some protection against creating such.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47957 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| ac246275b5c9541579515501e87c8b0763d9f6a1 |
05-Mar-2008 |
Dale Johannesen <dalej@apple.com> |
Clarify that CALLSEQ_START..END may not be nested,
and add some protection against creating such.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47957 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| ec4a5672f86a42730d8fcf98243322520eaffb33 |
05-Mar-2008 |
Chris Lattner <sabre@nondot.org> |
Generalize FP constant shrinking optimization to apply to any vt
except ppc long double. This allows us to shrink constant pool
entries for x86 long double constants, which in turn allows us to
use flds/fldl instead of fldt.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47938 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| d037d4843c6cf1c39fa1f076f0d623de6e051b05 |
05-Mar-2008 |
Chris Lattner <sabre@nondot.org> |
Generalize FP constant shrinking optimization to apply to any vt
except ppc long double. This allows us to shrink constant pool
entries for x86 long double constants, which in turn allows us to
use flds/fldl instead of fldt.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47938 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| aa2acbbbf06348f20274f4eeb77f9761c654a589 |
05-Mar-2008 |
Chris Lattner <sabre@nondot.org> |
Improve comment, pass in the original VT so that we can shrink a long double constant
all the way to float, not stopping at double.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47937 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| e718cc5ccad55fcd0b9692f5286dc3bedbb22fcc |
05-Mar-2008 |
Chris Lattner <sabre@nondot.org> |
Improve comment, pass in the original VT so that we can shrink a long double constant
all the way to float, not stopping at double.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47937 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 34bc178e4da0105f3a50a00cc06ca1193c529bcb |
05-Mar-2008 |
Dan Gohman <gohman@apple.com> |
Codegen support for i128 UINT_TO_FP. This just fixes a
bug in r47928 (Int64Ty is the correct type for the constant
pool entry here) and removes the asserts, now that the code
is capable of handling i128.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47932 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
egalizeTypesExpand.cpp
|
| a193dba5ce64cabea28aa0aca64d60010045b124 |
05-Mar-2008 |
Dan Gohman <gohman@apple.com> |
Codegen support for i128 UINT_TO_FP. This just fixes a
bug in r47928 (Int64Ty is the correct type for the constant
pool entry here) and removes the asserts, now that the code
is capable of handling i128.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47932 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
egalizeTypesExpand.cpp
|
| 6fd599fa6916bd9438dbea7994cf2437bdf4ab8c |
05-Mar-2008 |
Evan Cheng <evan.cheng@apple.com> |
Add a target lowering hook to control whether it's worthwhile to compress fp constant.
For x86, if sse2 is available, it's not a good idea since cvtss2sd is slower than a movsd load and it prevents load folding. On x87, it's important to shrink fp constant since fldt is very expensive.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47931 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 35190fd544eaee770b191618bd86af1ef7401758 |
05-Mar-2008 |
Evan Cheng <evan.cheng@apple.com> |
Add a target lowering hook to control whether it's worthwhile to compress fp constant.
For x86, if sse2 is available, it's not a good idea since cvtss2sd is slower than a movsd load and it prevents load folding. On x87, it's important to shrink fp constant since fldt is very expensive.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47931 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| d19189e9905e14a4001a8ca6fc4effb6a3f88e45 |
05-Mar-2008 |
Andrew Lenharth <andrewl@lenharth.org> |
64bit CAS on 32bit x86.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47929 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 8158082b53401707d47ecdb844129ebc146962a5 |
05-Mar-2008 |
Andrew Lenharth <alenhar2@cs.uiuc.edu> |
64bit CAS on 32bit x86.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47929 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| d91446de7a89a22c8ea1cbfd40fe2528467a4ccb |
05-Mar-2008 |
Dan Gohman <gohman@apple.com> |
Codegen support for i128 SINT_TO_FP.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47928 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
egalizeTypesExpand.cpp
argetLowering.cpp
|
| c98645c3c1eba211e43a494f0dbd90a0ab9f2c90 |
05-Mar-2008 |
Dan Gohman <gohman@apple.com> |
Codegen support for i128 SINT_TO_FP.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47928 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
egalizeTypesExpand.cpp
argetLowering.cpp
|
| d86449e77435508db465fbb20c80581a1c269f85 |
04-Mar-2008 |
Roman Levenstein <romix.llvm@googlemail.com> |
Some improvements related to the computation of heights, depths of SUnits.
The basic idea is that all these algorithms are computing the longest paths from the root node or to the exit node. Therefore the existing implementation that uses and iterative and potentially
exponential algorithm was changed to a well-known graph algorithm based on dynamic programming. It has a linear run-time.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47884 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAG.cpp
|
| 1db9b82cde7ec2f31498139c832041017886b36c |
04-Mar-2008 |
Roman Levenstein <romix.llvm@googlemail.com> |
Some improvements related to the computation of heights, depths of SUnits.
The basic idea is that all these algorithms are computing the longest paths from the root node or to the exit node. Therefore the existing implementation that uses and iterative and potentially
exponential algorithm was changed to a well-known graph algorithm based on dynamic programming. It has a linear run-time.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47884 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAG.cpp
|
| ef12057737229452c17983faa20857dba441ef05 |
04-Mar-2008 |
Evan Cheng <evan.cheng@apple.com> |
Refactor ExpandConstantFP so it can optimize load from constpool of types larger than f64 into extload from smaller types.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47883 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 354be06edd36dc6d9496555a24811ced0c487695 |
04-Mar-2008 |
Evan Cheng <evan.cheng@apple.com> |
Refactor ExpandConstantFP so it can optimize load from constpool of types larger than f64 into extload from smaller types.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47883 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 917be6814e0a4e529d290be5d806a054bbbc4a27 |
04-Mar-2008 |
Evan Cheng <evan.cheng@apple.com> |
Rename isOperand() to isOperandOf() (and other similar methods). It always confuses me.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47872 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
cheduleDAG.cpp
cheduleDAGRRList.cpp
electionDAG.cpp
|
| d93876883cdbc14819ea260c0aa839ad707c149a |
04-Mar-2008 |
Evan Cheng <evan.cheng@apple.com> |
Rename isOperand() to isOperandOf() (and other similar methods). It always confuses me.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47872 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
cheduleDAG.cpp
cheduleDAGRRList.cpp
electionDAG.cpp
|
| 220a823f8d044b7e9484999c9ec73e3cbe6d251c |
04-Mar-2008 |
Dan Gohman <gohman@apple.com> |
Misc. APInt-ification in the DAGCombiner.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47869 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| d047c3e716d3b54f67222de86173979575bddc0c |
04-Mar-2008 |
Dan Gohman <gohman@apple.com> |
Misc. APInt-ification in the DAGCombiner.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47869 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| bb271ff9fe1b92e8c0fdb54334f92803b344ee6a |
04-Mar-2008 |
Dan Gohman <gohman@apple.com> |
More APInt-ification.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47868 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 463db8ccdd26cf466e1cd122691ebaa623c0609a |
04-Mar-2008 |
Dan Gohman <gohman@apple.com> |
More APInt-ification.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47868 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 3370dd70aebf6b3c92d84c20245078c00290dffa |
03-Mar-2008 |
Dan Gohman <gohman@apple.com> |
Yet more APInt-ification.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47867 91177308-0d34-0410-b5e6-96231b3b80d8
argetLowering.cpp
|
| 04ec2f0e14e0597be5bcf862a12906f4462dbd39 |
03-Mar-2008 |
Dan Gohman <gohman@apple.com> |
Yet more APInt-ification.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47867 91177308-0d34-0410-b5e6-96231b3b80d8
argetLowering.cpp
|
| 6c6cd1ccb5de1ebab7089c8ce339889f33fa2577 |
03-Mar-2008 |
Dan Gohman <gohman@apple.com> |
More APInt-ification.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47866 91177308-0d34-0410-b5e6-96231b3b80d8
argetLowering.cpp
|
| d00055a5f156158ba4367c259ae4afb6a155fa1b |
03-Mar-2008 |
Dan Gohman <gohman@apple.com> |
More APInt-ification.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47866 91177308-0d34-0410-b5e6-96231b3b80d8
argetLowering.cpp
|
| 050f550aeb3938d8e202156473fac5eabf0fa703 |
03-Mar-2008 |
Dan Gohman <gohman@apple.com> |
More APInt-ification.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47864 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 97f1f8e4d8ef60749cda3d14ac76613dc3b124f5 |
03-Mar-2008 |
Dan Gohman <gohman@apple.com> |
More APInt-ification.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47864 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 26ed8697d4733f4ad588ef117ec4387560770ad0 |
01-Mar-2008 |
Andrew Lenharth <andrewl@lenharth.org> |
all but CAS working on x86
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47798 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 7dfe23f07fa1482f30c658938ea87936c76bbc93 |
01-Mar-2008 |
Andrew Lenharth <alenhar2@cs.uiuc.edu> |
all but CAS working on x86
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47798 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 3c8b59c546b5d56b2cae74da55e26eb994ed36bf |
01-Mar-2008 |
Dale Johannesen <dalej@apple.com> |
Add MVT::is128BitVector and is64BitVector. Shrink
unaligned load/store code using them. Per review
of unaligned load/store vector patch.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47782 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| f8c1e85b7f2cd1d72d83dfcf2bd47665de7cb3d5 |
01-Mar-2008 |
Dale Johannesen <dalej@apple.com> |
Add MVT::is128BitVector and is64BitVector. Shrink
unaligned load/store code using them. Per review
of unaligned load/store vector patch.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47782 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 84d4a2b4ad0874a46642bb568b45720d55e46b64 |
01-Mar-2008 |
Evan Cheng <evan.cheng@apple.com> |
Refactor / clean up code; remove td list scheduler special tie breaker (no real benefit).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47779 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGRRList.cpp
|
| dbde7f9d7779b2b5e8e5311f34090e89564bbfd9 |
01-Mar-2008 |
Evan Cheng <evan.cheng@apple.com> |
Refactor / clean up code; remove td list scheduler special tie breaker (no real benefit).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47779 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGRRList.cpp
|
| 6c231501f80e1ff05e3cada3d051b1c826d1f478 |
29-Feb-2008 |
Dan Gohman <gohman@apple.com> |
More APInt-ification.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47746 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 161652c4f46b9229efd09b99833bdd719f441e57 |
29-Feb-2008 |
Dan Gohman <gohman@apple.com> |
More APInt-ification.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47746 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| c7773bf90ee4398ccdeb847db6330cf4507b832b |
29-Feb-2008 |
Dan Gohman <gohman@apple.com> |
Use the new convertFromAPInt instead of convertFromZeroExtendedInteger,
which allows more of the surrounding arithmetic to be done with APInt
instead of uint64_t.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47745 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 88ae8c59b426349f31f355df183a3e5106651e88 |
29-Feb-2008 |
Dan Gohman <gohman@apple.com> |
Use the new convertFromAPInt instead of convertFromZeroExtendedInteger,
which allows more of the surrounding arithmetic to be done with APInt
instead of uint64_t.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47745 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| c6f9a06238daebd41620ccc795f289c607393f00 |
29-Feb-2008 |
Dan Gohman <gohman@apple.com> |
Use the new APInt-enabled form of getConstant instead of converting
an APInt into a uint64_t to call getConstant.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47742 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 5d797ecc7df83576facdddaf82be4b3cf537a27d |
29-Feb-2008 |
Dan Gohman <gohman@apple.com> |
Use the new APInt-enabled form of getConstant instead of converting
an APInt into a uint64_t to call getConstant.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47742 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 28d08fdb9f6572cafd5aae95c7caffa3cd136d8e |
28-Feb-2008 |
Dale Johannesen <dalej@apple.com> |
Interface of getByValTypeAlignment differed between
generic & x86 versions; change generic to follow x86
and improve comments. Add PPC version (not right
for non-Darwin.)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47734 91177308-0d34-0410-b5e6-96231b3b80d8
argetLowering.cpp
|
| 88945f8d5d28848e86c85019f5e2ded869eebe3c |
28-Feb-2008 |
Dale Johannesen <dalej@apple.com> |
Interface of getByValTypeAlignment differed between
generic & x86 versions; change generic to follow x86
and improve comments. Add PPC version (not right
for non-Darwin.)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47734 91177308-0d34-0410-b5e6-96231b3b80d8
argetLowering.cpp
|
| cd9f1747ab72f9863924fbdf43493d9fa6256719 |
28-Feb-2008 |
Dale Johannesen <dalej@apple.com> |
Fix an assertion message.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47722 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| b1d1ab90321e2e4ce57a5b6c49c420630beafc38 |
28-Feb-2008 |
Dale Johannesen <dalej@apple.com> |
Fix an assertion message.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47722 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 643afa55e72835e5e17c9f33876b883469d56814 |
28-Feb-2008 |
Evan Cheng <evan.cheng@apple.com> |
Keep track how many commutes are performed by the scheduler.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47710 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAG.cpp
|
| 7f6ade38ab2d9fb479f9e7dfa186d80a3bc106aa |
28-Feb-2008 |
Evan Cheng <evan.cheng@apple.com> |
Keep track how many commutes are performed by the scheduler.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47710 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAG.cpp
|
| e07415d4006b923ed1d2057ffa5a493353e28f9e |
28-Feb-2008 |
Chris Lattner <sabre@nondot.org> |
implement expand for ISD::DECLARE by just deleting it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47708 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 203cd0593702c58ca57e2fadfbf4a03f8740ea51 |
28-Feb-2008 |
Chris Lattner <sabre@nondot.org> |
implement expand for ISD::DECLARE by just deleting it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47708 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| fb8075d03f5c87bd57dcc9c5f2304f6b13c55aad |
28-Feb-2008 |
Evan Cheng <evan.cheng@apple.com> |
Add a quick and dirty "loop aligner pass". x86 uses it to align its loops to 16-byte boundaries.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47703 91177308-0d34-0410-b5e6-96231b3b80d8
argetLowering.cpp
|
| 45c1edb4f781571f11fefb07a46a2c0f08523650 |
28-Feb-2008 |
Evan Cheng <evan.cheng@apple.com> |
Add a quick and dirty "loop aligner pass". x86 uses it to align its loops to 16-byte boundaries.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47703 91177308-0d34-0410-b5e6-96231b3b80d8
argetLowering.cpp
|
| 8155d64c2ffab8b17e0fd8e3b7a66fcef6a8ec9d |
27-Feb-2008 |
Dale Johannesen <dalej@apple.com> |
Handle load/store of misaligned vectors that are the
same size as an int type by doing a bitconvert of
load/store of the int type (same algorithm as floating point).
This makes them work for ppc Altivec. There was some
code that purported to handle loads of (some) vectors
by splitting them into two smaller vectors, but getExtLoad
rejects subvector loads, so this could never have worked;
the patch removes it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47696 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| dc0ee195adc8a097560ec42e275d43d2cb8ca863 |
27-Feb-2008 |
Dale Johannesen <dalej@apple.com> |
Handle load/store of misaligned vectors that are the
same size as an int type by doing a bitconvert of
load/store of the int type (same algorithm as floating point).
This makes them work for ppc Altivec. There was some
code that purported to handle loads of (some) vectors
by splitting them into two smaller vectors, but getExtLoad
rejects subvector loads, so this could never have worked;
the patch removes it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47696 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 18714aeaed2a74bfc85dc5abe24a9193882406c5 |
27-Feb-2008 |
Dan Gohman <gohman@apple.com> |
Remove the `else', at Evan's insistence.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47686 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 7e7aa2cbbb88303157290790eedf2318e02cfe20 |
27-Feb-2008 |
Dan Gohman <gohman@apple.com> |
Remove the `else', at Evan's insistence.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47686 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 052e976f856fc66fce47d75be893480776906539 |
27-Feb-2008 |
Duncan Sands <baldrick@free.fr> |
Add a FIXME about the VECTOR_SHUFFLE evil hack.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47676 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeTypesSplit.cpp
|
| 9b6bc8a987ea10f5b2786fd756e9798ce79dd970 |
27-Feb-2008 |
Duncan Sands <baldrick@free.fr> |
Add a FIXME about the VECTOR_SHUFFLE evil hack.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47676 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeTypesSplit.cpp
|
| 077f9b20d0e8659d00a09046a63e28edf0665ffe |
27-Feb-2008 |
Duncan Sands <baldrick@free.fr> |
LegalizeTypes support for EXTRACT_VECTOR_ELT. The
approach taken is different to that in LegalizeDAG
when it is a question of expanding or promoting the
result type: for example, if extracting an i64 from
a <2 x i64>, when i64 needs expanding, it bitcasts
the vector to <4 x i32>, extracts the appropriate
two i32's, and uses those for the Lo and Hi parts.
Likewise, when extracting an i16 from a <4 x i16>,
and i16 needs promoting, it bitcasts the vector to
<2 x i32>, extracts the appropriate i32, twiddles
the bits if necessary, and uses that as the promoted
value. This puts more pressure on bitcast legalization,
and I've added the appropriate cases. They needed to
be added anyway since users can generate such bitcasts
too if they want to. Also, when considering various
cases (Legal, Promote, Expand, Scalarize, Split) it is
a pain that expand can correspond to Expand, Scalarize
or Split, so I've changed the LegalizeTypes enum so it
lists those different cases - now Expand only means
splitting a scalar in two.
The code produced is the same as by LegalizeDAG for
all relevant testcases, except for
2007-10-31-extractelement-i64.ll, where the code seems
to have improved (see below; can an expert please tell
me if it is better or not).
Before < vs after >.
< subl $92, %esp
< movaps %xmm0, 64(%esp)
< movaps %xmm0, (%esp)
< movl 4(%esp), %eax
< movl %eax, 28(%esp)
< movl (%esp), %eax
< movl %eax, 24(%esp)
< movq 24(%esp), %mm0
< movq %mm0, 56(%esp)
---
> subl $44, %esp
> movaps %xmm0, 16(%esp)
> pshufd $1, %xmm0, %xmm1
> movd %xmm1, 4(%esp)
> movd %xmm0, (%esp)
> movq (%esp), %mm0
> movq %mm0, 8(%esp)
< subl $92, %esp
< movaps %xmm0, 64(%esp)
< movaps %xmm0, (%esp)
< movl 12(%esp), %eax
< movl %eax, 28(%esp)
< movl 8(%esp), %eax
< movl %eax, 24(%esp)
< movq 24(%esp), %mm0
< movq %mm0, 56(%esp)
---
> subl $44, %esp
> movaps %xmm0, 16(%esp)
> pshufd $3, %xmm0, %xmm1
> movd %xmm1, 4(%esp)
> movhlps %xmm0, %xmm0
> movd %xmm0, (%esp)
> movq (%esp), %mm0
> movq %mm0, 8(%esp)
< subl $92, %esp
< movaps %xmm0, 64(%esp)
---
> subl $44, %esp
< movl 16(%esp), %eax
< movl %eax, 48(%esp)
< movl 20(%esp), %eax
< movl %eax, 52(%esp)
< movaps %xmm0, (%esp)
< movl 4(%esp), %eax
< movl %eax, 60(%esp)
< movl (%esp), %eax
< movl %eax, 56(%esp)
---
> pshufd $1, %xmm0, %xmm1
> movd %xmm1, 4(%esp)
> movd %xmm0, (%esp)
> movd %xmm1, 12(%esp)
> movd %xmm0, 8(%esp)
< subl $92, %esp
< movaps %xmm0, 64(%esp)
---
> subl $44, %esp
< movl 24(%esp), %eax
< movl %eax, 48(%esp)
< movl 28(%esp), %eax
< movl %eax, 52(%esp)
< movaps %xmm0, (%esp)
< movl 12(%esp), %eax
< movl %eax, 60(%esp)
< movl 8(%esp), %eax
< movl %eax, 56(%esp)
---
> pshufd $3, %xmm0, %xmm1
> movd %xmm1, 4(%esp)
> movhlps %xmm0, %xmm0
> movd %xmm0, (%esp)
> movd %xmm1, 12(%esp)
> movd %xmm0, 8(%esp)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47672 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeTypes.cpp
egalizeTypes.h
egalizeTypesExpand.cpp
egalizeTypesPromote.cpp
egalizeTypesScalarize.cpp
egalizeTypesSplit.cpp
|
| 01b3246f1ea2b41da19465decc29d78e6e98f1ff |
27-Feb-2008 |
Duncan Sands <baldrick@free.fr> |
LegalizeTypes support for EXTRACT_VECTOR_ELT. The
approach taken is different to that in LegalizeDAG
when it is a question of expanding or promoting the
result type: for example, if extracting an i64 from
a <2 x i64>, when i64 needs expanding, it bitcasts
the vector to <4 x i32>, extracts the appropriate
two i32's, and uses those for the Lo and Hi parts.
Likewise, when extracting an i16 from a <4 x i16>,
and i16 needs promoting, it bitcasts the vector to
<2 x i32>, extracts the appropriate i32, twiddles
the bits if necessary, and uses that as the promoted
value. This puts more pressure on bitcast legalization,
and I've added the appropriate cases. They needed to
be added anyway since users can generate such bitcasts
too if they want to. Also, when considering various
cases (Legal, Promote, Expand, Scalarize, Split) it is
a pain that expand can correspond to Expand, Scalarize
or Split, so I've changed the LegalizeTypes enum so it
lists those different cases - now Expand only means
splitting a scalar in two.
The code produced is the same as by LegalizeDAG for
all relevant testcases, except for
2007-10-31-extractelement-i64.ll, where the code seems
to have improved (see below; can an expert please tell
me if it is better or not).
Before < vs after >.
< subl $92, %esp
< movaps %xmm0, 64(%esp)
< movaps %xmm0, (%esp)
< movl 4(%esp), %eax
< movl %eax, 28(%esp)
< movl (%esp), %eax
< movl %eax, 24(%esp)
< movq 24(%esp), %mm0
< movq %mm0, 56(%esp)
---
> subl $44, %esp
> movaps %xmm0, 16(%esp)
> pshufd $1, %xmm0, %xmm1
> movd %xmm1, 4(%esp)
> movd %xmm0, (%esp)
> movq (%esp), %mm0
> movq %mm0, 8(%esp)
< subl $92, %esp
< movaps %xmm0, 64(%esp)
< movaps %xmm0, (%esp)
< movl 12(%esp), %eax
< movl %eax, 28(%esp)
< movl 8(%esp), %eax
< movl %eax, 24(%esp)
< movq 24(%esp), %mm0
< movq %mm0, 56(%esp)
---
> subl $44, %esp
> movaps %xmm0, 16(%esp)
> pshufd $3, %xmm0, %xmm1
> movd %xmm1, 4(%esp)
> movhlps %xmm0, %xmm0
> movd %xmm0, (%esp)
> movq (%esp), %mm0
> movq %mm0, 8(%esp)
< subl $92, %esp
< movaps %xmm0, 64(%esp)
---
> subl $44, %esp
< movl 16(%esp), %eax
< movl %eax, 48(%esp)
< movl 20(%esp), %eax
< movl %eax, 52(%esp)
< movaps %xmm0, (%esp)
< movl 4(%esp), %eax
< movl %eax, 60(%esp)
< movl (%esp), %eax
< movl %eax, 56(%esp)
---
> pshufd $1, %xmm0, %xmm1
> movd %xmm1, 4(%esp)
> movd %xmm0, (%esp)
> movd %xmm1, 12(%esp)
> movd %xmm0, 8(%esp)
< subl $92, %esp
< movaps %xmm0, 64(%esp)
---
> subl $44, %esp
< movl 24(%esp), %eax
< movl %eax, 48(%esp)
< movl 28(%esp), %eax
< movl %eax, 52(%esp)
< movaps %xmm0, (%esp)
< movl 12(%esp), %eax
< movl %eax, 60(%esp)
< movl 8(%esp), %eax
< movl %eax, 56(%esp)
---
> pshufd $3, %xmm0, %xmm1
> movd %xmm1, 4(%esp)
> movhlps %xmm0, %xmm0
> movd %xmm0, (%esp)
> movd %xmm1, 12(%esp)
> movd %xmm0, 8(%esp)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47672 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeTypes.cpp
egalizeTypes.h
egalizeTypesExpand.cpp
egalizeTypesPromote.cpp
egalizeTypesScalarize.cpp
egalizeTypesSplit.cpp
|
| 8745b52853c9b1d1370005d7cb42587ebe2a7193 |
27-Feb-2008 |
Duncan Sands <baldrick@free.fr> |
LegalizeTypes support for legalizing the mask
operand of a VECTOR_SHUFFLE. The mask is a
vector of constant integers. The code in
LegalizeDAG doesn't bother to legalize the
mask, since it's basically just storage for
a bunch of constants, however LegalizeTypes
is more picky. The problem is that there may
not exist any legal vector-of-integers type
with a legal element type, so it is impossible
to create a legal mask! Unless of course you
cheat by creating a BUILD_VECTOR where the
operands have a different type to the element
type of the vector being built... This is
pretty ugly but works - all relevant tests in
the testsuite pass, and produce the same
assembler with and without LegalizeTypes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47670 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeTypes.h
egalizeTypesSplit.cpp
|
| 3574980dcd2148403eeee50bc09e12d6afac9c69 |
27-Feb-2008 |
Duncan Sands <baldrick@free.fr> |
LegalizeTypes support for legalizing the mask
operand of a VECTOR_SHUFFLE. The mask is a
vector of constant integers. The code in
LegalizeDAG doesn't bother to legalize the
mask, since it's basically just storage for
a bunch of constants, however LegalizeTypes
is more picky. The problem is that there may
not exist any legal vector-of-integers type
with a legal element type, so it is impossible
to create a legal mask! Unless of course you
cheat by creating a BUILD_VECTOR where the
operands have a different type to the element
type of the vector being built... This is
pretty ugly but works - all relevant tests in
the testsuite pass, and produce the same
assembler with and without LegalizeTypes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47670 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeTypes.h
egalizeTypesSplit.cpp
|
| 4f069e6db1772a7e6cd8bfc360d819b56557badc |
27-Feb-2008 |
Duncan Sands <baldrick@free.fr> |
LegalizeTypes support for INSERT_VECTOR_ELT.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47669 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeTypes.h
egalizeTypesPromote.cpp
egalizeTypesScalarize.cpp
|
| 25ff37c21b2ddca6e93da7f511f64b03da4eb2cb |
27-Feb-2008 |
Duncan Sands <baldrick@free.fr> |
LegalizeTypes support for INSERT_VECTOR_ELT.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47669 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeTypes.h
egalizeTypesPromote.cpp
egalizeTypesScalarize.cpp
|
| e90a615f37aaee2ad9259c0ef21586d5e4142147 |
27-Feb-2008 |
Duncan Sands <baldrick@free.fr> |
Support for legalizing MEMBARRIER.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47667 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
egalizeTypes.h
egalizeTypesPromote.cpp
|
| 3ee041a58ff07dee5fe2eac3924dea27da84fe28 |
27-Feb-2008 |
Duncan Sands <baldrick@free.fr> |
Support for legalizing MEMBARRIER.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47667 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
egalizeTypes.h
egalizeTypesPromote.cpp
|
| 6ef781f3ce0d0311004adba9d1e7dbd7950918dd |
27-Feb-2008 |
Bill Wendling <isanbard@gmail.com> |
Final de-tabification.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47663 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGPrinter.cpp
|
| 6c02cd29b5ca35947c8414e7a20667066db64409 |
27-Feb-2008 |
Bill Wendling <isanbard@gmail.com> |
Final de-tabification.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47663 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGPrinter.cpp
|
| 1953ecb0a6fc8520b34b52fd04f7476a7eb4613f |
27-Feb-2008 |
Dan Gohman <gohman@apple.com> |
Teach Legalize how to expand an EXTRACT_ELEMENT.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47656 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 550c846758f3d72920a35e4f8484c604c7f98b3c |
27-Feb-2008 |
Dan Gohman <gohman@apple.com> |
Teach Legalize how to expand an EXTRACT_ELEMENT.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47656 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| b3564aa8367fc38efdab0a812868f6f93b9d883e |
27-Feb-2008 |
Dan Gohman <gohman@apple.com> |
Convert the last remaining users of the non-APInt form of
ComputeMaskedBits to use the APInt form, and remove the
non-APInt form.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47654 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 63f4e461c48befdc3a6fcd0e0abf5252efeb3a6a |
27-Feb-2008 |
Dan Gohman <gohman@apple.com> |
Convert the last remaining users of the non-APInt form of
ComputeMaskedBits to use the APInt form, and remove the
non-APInt form.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47654 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 7b8d4a9eef4eb02e561227b50c9d119cea4e8860 |
27-Feb-2008 |
Dan Gohman <gohman@apple.com> |
Convert SimplifyDemandedMask and ShrinkDemandedConstant to use APInt.
Change several cases in SimplifyDemandedMask that don't ever do any
simplifying to reuse the logic in ComputeMaskedBits instead of
duplicating it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47648 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
argetLowering.cpp
|
| 1160779f02d5369e4d9012ee1078798e866c6772 |
27-Feb-2008 |
Dan Gohman <gohman@apple.com> |
Convert SimplifyDemandedMask and ShrinkDemandedConstant to use APInt.
Change several cases in SimplifyDemandedMask that don't ever do any
simplifying to reuse the logic in ComputeMaskedBits instead of
duplicating it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47648 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
argetLowering.cpp
|
| e6d088acc90e422451e098555d383d4d65b6ce6b |
26-Feb-2008 |
Bill Wendling <isanbard@gmail.com> |
Rename PrintableName to Name.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47629 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
electionDAGPrinter.cpp
|
| 9b0baebd71c4f66b7b3f4a9d2ffdde9dc9ded8a7 |
26-Feb-2008 |
Bill Wendling <isanbard@gmail.com> |
Rename PrintableName to Name.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47629 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
electionDAGPrinter.cpp
|
| 74ab84c31ef64538a1b56e1f282e49303412ad17 |
26-Feb-2008 |
Bill Wendling <isanbard@gmail.com> |
Change "Name" to "AsmName" in the target register info. Gee, a refactoring tool
would have been a Godsend here!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47625 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
electionDAGPrinter.cpp
argetLowering.cpp
|
| 8eeb97927530a1e53c3529a9b93f94239056d1b4 |
26-Feb-2008 |
Bill Wendling <isanbard@gmail.com> |
Change "Name" to "AsmName" in the target register info. Gee, a refactoring tool
would have been a Godsend here!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47625 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
electionDAGPrinter.cpp
argetLowering.cpp
|
| d4cf992230a6cc4d76022c5d47dbd23115bdec44 |
26-Feb-2008 |
Dan Gohman <gohman@apple.com> |
Avoid aborting on invalid shift counts.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47612 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 4b8d000a42364bf84df5172e9710f196c731ebe4 |
26-Feb-2008 |
Dan Gohman <gohman@apple.com> |
Avoid aborting on invalid shift counts.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47612 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| aeecb6c73ae05100eec57e9521beb87635f1f26e |
26-Feb-2008 |
Chris Lattner <sabre@nondot.org> |
Fix PR2096, a regression introduced with my patch last night. This
also fixes cfrac, flops, and 175.vpr
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47605 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 46360036d82cc38520778bed3da820050e35d812 |
26-Feb-2008 |
Chris Lattner <sabre@nondot.org> |
Fix PR2096, a regression introduced with my patch last night. This
also fixes cfrac, flops, and 175.vpr
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47605 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 212a11c417e272cc8fd12e66cfe5110c47559e17 |
26-Feb-2008 |
Duncan Sands <baldrick@free.fr> |
Fix a nasty bug in LegalizeTypes (spotted in
CodeGen/PowerPC/illegal-element-type.ll): suppose
a node X is processed, and processing maps it to
a node Y. Then X continues to exist in the DAG,
but with no users. While processing some other
node, a new node may be created that happens to
be equal to X, and thus X will be reused rather
than a truly new node. This can cause X to
"magically reappear", and since it is in the
Processed state in will not be reprocessed, so
at the end of type legalization the illegal node
X can still be present. The solution is to replace
X with Y whenever X gets resurrected like this.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47601 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeTypes.cpp
egalizeTypes.h
egalizeTypesExpand.cpp
egalizeTypesPromote.cpp
egalizeTypesScalarize.cpp
egalizeTypesSplit.cpp
|
| 1464b445bf0d3ff9aaf5c2a3255578579b195234 |
26-Feb-2008 |
Duncan Sands <baldrick@free.fr> |
Fix a nasty bug in LegalizeTypes (spotted in
CodeGen/PowerPC/illegal-element-type.ll): suppose
a node X is processed, and processing maps it to
a node Y. Then X continues to exist in the DAG,
but with no users. While processing some other
node, a new node may be created that happens to
be equal to X, and thus X will be reused rather
than a truly new node. This can cause X to
"magically reappear", and since it is in the
Processed state in will not be reprocessed, so
at the end of type legalization the illegal node
X can still be present. The solution is to replace
X with Y whenever X gets resurrected like this.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47601 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeTypes.cpp
egalizeTypes.h
egalizeTypesExpand.cpp
egalizeTypesPromote.cpp
egalizeTypesScalarize.cpp
egalizeTypesSplit.cpp
|
| 0254e7033a1d879357e582dcdc1943e656192768 |
26-Feb-2008 |
Chris Lattner <sabre@nondot.org> |
Fix isNegatibleForFree to not return true for ConstantFP nodes
after legalize. Just because a constant is legal (e.g. 0.0 in SSE)
doesn't mean that its negated value is legal (-0.0). We could make
this stronger by checking to see if the negated constant is actually
legal post negation, but it doesn't seem like a big deal.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47591 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| e0992b832c3cf73bccf557910a69c652a1e55c5f |
26-Feb-2008 |
Chris Lattner <sabre@nondot.org> |
Fix isNegatibleForFree to not return true for ConstantFP nodes
after legalize. Just because a constant is legal (e.g. 0.0 in SSE)
doesn't mean that its negated value is legal (-0.0). We could make
this stronger by checking to see if the negated constant is actually
legal post negation, but it doesn't seem like a big deal.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47591 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 5c80760fdf71659c5bdf45cd85d173df454dfb41 |
26-Feb-2008 |
Evan Cheng <evan.cheng@apple.com> |
Refactor inline asm constraint matching code out of SDIsel into TargetLowering.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47587 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
argetLowering.cpp
|
| bcd6644c2f0d424a393716c558faa207ace9709b |
26-Feb-2008 |
Evan Cheng <evan.cheng@apple.com> |
Refactor inline asm constraint matching code out of SDIsel into TargetLowering.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47587 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
argetLowering.cpp
|
| f6283fd27be06021fbe262341be56331bc67786c |
25-Feb-2008 |
Dan Gohman <gohman@apple.com> |
Make some static variables const.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47566 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 84d0096ffb5d477628d081c17c2fba2086274765 |
25-Feb-2008 |
Dan Gohman <gohman@apple.com> |
Make some static variables const.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47566 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 2e68b6f52d0979575b2f02ed29717d907ba0684c |
25-Feb-2008 |
Dan Gohman <gohman@apple.com> |
Convert MaskedValueIsZero and all its users to use APInt. Also add
a SignBitIsZero function to simplify a common use case.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47561 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
egalizeDAG.cpp
egalizeTypesExpand.cpp
egalizeTypesPromote.cpp
electionDAG.cpp
electionDAGISel.cpp
argetLowering.cpp
|
| 07961cd7921c5cc75e77890a1435e41f6423f42f |
25-Feb-2008 |
Dan Gohman <gohman@apple.com> |
Convert MaskedValueIsZero and all its users to use APInt. Also add
a SignBitIsZero function to simplify a common use case.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47561 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
egalizeDAG.cpp
egalizeTypesExpand.cpp
egalizeTypesPromote.cpp
electionDAG.cpp
electionDAGISel.cpp
argetLowering.cpp
|
| 1a9c9df1db4ab3bf39f0395a7086576b4491d50b |
25-Feb-2008 |
Duncan Sands <baldrick@free.fr> |
In debug builds check that the key property holds: all
result and operand types are legal.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47546 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeTypes.cpp
|
| a80ff7ca83b73b0d25af379df41f262462dc1683 |
25-Feb-2008 |
Duncan Sands <baldrick@free.fr> |
In debug builds check that the key property holds: all
result and operand types are legal.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47546 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeTypes.cpp
|
| 14fd63cae875b8e41c70f4408b2185abf82d1d60 |
24-Feb-2008 |
Duncan Sands <baldrick@free.fr> |
Add support to LegalizeTypes for building legal vectors
out of illegal elements (BUILD_VECTOR). Uses and beefs
up BUILD_PAIR, though it didn't really have to. Like
most of LegalizeTypes, does not support soft-float.
This cures all "make check" vector building failures.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47537 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeTypes.h
egalizeTypesExpand.cpp
egalizeTypesPromote.cpp
|
| b59c7b2902878afea0d53fa05285b338fa5878ed |
24-Feb-2008 |
Duncan Sands <baldrick@free.fr> |
Add support to LegalizeTypes for building legal vectors
out of illegal elements (BUILD_VECTOR). Uses and beefs
up BUILD_PAIR, though it didn't really have to. Like
most of LegalizeTypes, does not support soft-float.
This cures all "make check" vector building failures.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47537 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeTypes.h
egalizeTypesExpand.cpp
egalizeTypesPromote.cpp
|
| 08e78b18b8ef2c939ee95469662c98e23846d860 |
22-Feb-2008 |
Dale Johannesen <dalej@apple.com> |
Pass alignment on ByVal parameters, from FE, all
the way through. It is now used for codegen.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47484 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 9b398787935ab9e5d9f74c4c2b751ebf61211ea8 |
22-Feb-2008 |
Dale Johannesen <dalej@apple.com> |
Pass alignment on ByVal parameters, from FE, all
the way through. It is now used for codegen.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47484 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 9e255b7df5a0a629920706e086e78ef89bf2f183 |
22-Feb-2008 |
Dan Gohman <gohman@apple.com> |
Fix a regression in 403.gcc and 186.crafty introduced in 47383. To test
that a value is >= 32, check that all of the high bits are zero, not
just one or more.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47467 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
egalizeTypesExpand.cpp
|
| eb3f11721f17186a725c5a541ef9a069d104610e |
22-Feb-2008 |
Dan Gohman <djg@cray.com> |
Fix a regression in 403.gcc and 186.crafty introduced in 47383. To test
that a value is >= 32, check that all of the high bits are zero, not
just one or more.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47467 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
egalizeTypesExpand.cpp
|
| 69e6a8d5a8c486bcdd2c19238171b01d470ba45f |
21-Feb-2008 |
Chris Lattner <sabre@nondot.org> |
Make the clobber analysis a bit more smart: we only are careful about
early clobbers if the clobber list contains a *register* not some thing
like {memory}, {dirflag} etc.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47457 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 17ac43108dab399ad5f8e03448228d10850dc286 |
21-Feb-2008 |
Chris Lattner <sabre@nondot.org> |
Make the clobber analysis a bit more smart: we only are careful about
early clobbers if the clobber list contains a *register* not some thing
like {memory}, {dirflag} etc.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47457 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 0fe71e9bb19ff1781813184e41a8aaaae4dd2908 |
21-Feb-2008 |
Chris Lattner <sabre@nondot.org> |
Treat clobber operands like early clobbers: if we have
any, we force sdisel to do all regalloc for an asm. This
leads to gross but correct codegen.
This fixes the rest of PR2078.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47454 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 75a19169fd7a788ccdb6a2db91c0a393fc7b243a |
21-Feb-2008 |
Chris Lattner <sabre@nondot.org> |
Treat clobber operands like early clobbers: if we have
any, we force sdisel to do all regalloc for an asm. This
leads to gross but correct codegen.
This fixes the rest of PR2078.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47454 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| c1c7bd610a1647d8e7eaeb4cc38ca1a85ae5e271 |
21-Feb-2008 |
Andrew Lenharth <andrewl@lenharth.org> |
Better names as per Evan's request
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47435 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 2205e3b404764988bdf78b76e965447159c29e8a |
21-Feb-2008 |
Andrew Lenharth <alenhar2@cs.uiuc.edu> |
Better names as per Evan's request
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47435 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| ab0b949e0e9de452f3b052b11634ab761e008b23 |
21-Feb-2008 |
Andrew Lenharth <andrewl@lenharth.org> |
Atomic op support. If any gcc test uses __sync builtins, it might start failing on archs that haven't implemented them yet
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47430 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
electionDAG.cpp
electionDAGISel.cpp
|
| e44f390d1a02e4ab6beffd7e3a4178e0557cbc8a |
21-Feb-2008 |
Andrew Lenharth <alenhar2@cs.uiuc.edu> |
Atomic op support. If any gcc test uses __sync builtins, it might start failing on archs that haven't implemented them yet
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47430 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
electionDAG.cpp
electionDAGISel.cpp
|
| f9853bc0d439d89c97979265593287c2ce81acb2 |
21-Feb-2008 |
Chris Lattner <sabre@nondot.org> |
Add support for matching mem operands. This fixes PR1133, patch by
Eli Friedman. This implements CodeGen/Generic/2008-02-20-MatchingMem.ll.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47428 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 58d032b16d90a5343811caf6ada67ac22343c91a |
21-Feb-2008 |
Chris Lattner <sabre@nondot.org> |
Add support for matching mem operands. This fixes PR1133, patch by
Eli Friedman. This implements CodeGen/Generic/2008-02-20-MatchingMem.ll.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47428 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 7cbeb2431c7264d0848d1343f43914f970828ac7 |
21-Feb-2008 |
Chris Lattner <sabre@nondot.org> |
Fix a (harmless) but where vregs were added to the used reg lists for
inline asms.
Fix PR2078 by marking aliases of registers used when a register is
marked used. This prevents EAX from being allocated when AX is listed
in the clobber set for the asm.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47426 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| bd0818be2be161868702925c005843212596be59 |
21-Feb-2008 |
Chris Lattner <sabre@nondot.org> |
Fix a (harmless) but where vregs were added to the used reg lists for
inline asms.
Fix PR2078 by marking aliases of registers used when a register is
marked used. This prevents EAX from being allocated when AX is listed
in the clobber set for the asm.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47426 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| c40a84a87727608bbc5c68b3bf5c6d96fb22aa00 |
20-Feb-2008 |
Devang Patel <dpatel@apple.com> |
assert is more effective reminder then FIXME tag for unimplemented features.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47388 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| a3ad242196b41529db8e203611f69c34aae083b6 |
20-Feb-2008 |
Devang Patel <dpatel@apple.com> |
assert is more effective reminder then FIXME tag for unimplemented features.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47388 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| f83b1f63ddf27aaba791393940f37709ebbda33b |
20-Feb-2008 |
Duncan Sands <baldrick@free.fr> |
LegalizeTypes support for scalarizing a vector store
and splitting extract_subvector. This fixes nine
"make check" testcases, for example
2008-02-04-ExtractSubvector.ll and (partially)
CodeGen/Generic/vector.ll.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47384 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeTypes.h
egalizeTypesScalarize.cpp
egalizeTypesSplit.cpp
electionDAG.cpp
|
| bd13a81015ff9a56076fe48db0a3d77f9bdd765f |
20-Feb-2008 |
Duncan Sands <baldrick@free.fr> |
LegalizeTypes support for scalarizing a vector store
and splitting extract_subvector. This fixes nine
"make check" testcases, for example
2008-02-04-ExtractSubvector.ll and (partially)
CodeGen/Generic/vector.ll.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47384 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeTypes.h
egalizeTypesScalarize.cpp
egalizeTypesSplit.cpp
electionDAG.cpp
|
| 91dc17ba4991e971c7e89e07642b10817aa28055 |
20-Feb-2008 |
Dan Gohman <gohman@apple.com> |
Convert Legalize to use the APInt form of ComputeMaskedBits.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47383 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
egalizeTypesExpand.cpp
|
| ece0a8855c33d52debe1f0d2e63768e7491920fc |
20-Feb-2008 |
Dan Gohman <djg@cray.com> |
Convert Legalize to use the APInt form of ComputeMaskedBits.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47383 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
egalizeTypesExpand.cpp
|
| b5660dc8223bd5eb3d21d9855692617fcdec5663 |
20-Feb-2008 |
Dan Gohman <gohman@apple.com> |
Add explicit keywords.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47382 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| a789bffed03de68a28fc8699e30b9da0d607541c |
20-Feb-2008 |
Dan Gohman <djg@cray.com> |
Add explicit keywords.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47382 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 948d8eadec92cc5f31f196de41dd6dfe8579a0c6 |
20-Feb-2008 |
Dan Gohman <gohman@apple.com> |
Convert DAGCombiner to use the APInt form of ComputeMaskedBits.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47381 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| bea075fa33f12f318cedaac3439a011263c9b7e6 |
20-Feb-2008 |
Dan Gohman <djg@cray.com> |
Convert DAGCombiner to use the APInt form of ComputeMaskedBits.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47381 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| ca93a43e8409c6dc5ccf2c9762fb513f9d318372 |
20-Feb-2008 |
Dan Gohman <gohman@apple.com> |
Use APInt::intersects.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47380 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 9150729ef08471591bce55e77adeefc4362dbe24 |
20-Feb-2008 |
Dan Gohman <djg@cray.com> |
Use APInt::intersects.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47380 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 4c71dfe356716e6bc1993ef5efdced08b68fe612 |
20-Feb-2008 |
Anton Korobeynikov <asl@math.spbu.ru> |
Update gcc 4.3 warnings fix patch with recent head changes
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47368 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
cheduleDAGRRList.cpp
electionDAG.cpp
electionDAGISel.cpp
|
| 53422f6643586cded61578fdd22bc3a94b5f9c91 |
20-Feb-2008 |
Anton Korobeynikov <asl@math.spbu.ru> |
Update gcc 4.3 warnings fix patch with recent head changes
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47368 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
cheduleDAGRRList.cpp
electionDAG.cpp
electionDAGISel.cpp
|
| 19fc1d3742ccba2d8dde5d69c5593e1a0b83fefa |
20-Feb-2008 |
Chris Lattner <sabre@nondot.org> |
Fix an incredibly subtle bug exposed by Ted's change to APInt profiling.
AddNodeIDNode does profiling for a ConstantSDNode, but so does
SelectionDAG::getConstant. This profiling should be moved to a common
static function in ConstantSDNode.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47359 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| f5e3e189858abfe3c24ef72b62bb6d94940a3e30 |
20-Feb-2008 |
Chris Lattner <sabre@nondot.org> |
Fix an incredibly subtle bug exposed by Ted's change to APInt profiling.
AddNodeIDNode does profiling for a ConstantSDNode, but so does
SelectionDAG::getConstant. This profiling should be moved to a common
static function in ConstantSDNode.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47359 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 40a04216daaaee119665e023019c005306ec48ac |
19-Feb-2008 |
Devang Patel <dpatel@apple.com> |
Add GetResultInst. First step for multiple return value support.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47348 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| d081ef080a26343b4314b9a1e08d4b3136cd5dd8 |
19-Feb-2008 |
Devang Patel <dpatel@apple.com> |
Add GetResultInst. First step for multiple return value support.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47348 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| efec751a1b786724862ceff52748df94873a807e |
19-Feb-2008 |
Evan Cheng <evan.cheng@apple.com> |
- When DAG combiner is folding a bit convert into a BUILD_VECTOR, it should check if it's essentially a SCALAR_TO_VECTOR. Avoid turning (v8i16) <10, u, u, u> to <10, 0, u, u, u, u, u, u>. Instead, simply convert it to a SCALAR_TO_VECTOR of the proper type.
- X86 now normalize SCALAR_TO_VECTOR to (BIT_CONVERT (v4i32 SCALAR_TO_VECTOR)). Get rid of X86ISD::S2VEC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47290 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
electionDAG.cpp
|
| d1045a634ff2156c6666ad36c747a265c1d902ee |
19-Feb-2008 |
Evan Cheng <evan.cheng@apple.com> |
- When DAG combiner is folding a bit convert into a BUILD_VECTOR, it should check if it's essentially a SCALAR_TO_VECTOR. Avoid turning (v8i16) <10, u, u, u> to <10, 0, u, u, u, u, u, u>. Instead, simply convert it to a SCALAR_TO_VECTOR of the proper type.
- X86 now normalize SCALAR_TO_VECTOR to (BIT_CONVERT (v4i32 SCALAR_TO_VECTOR)). Get rid of X86ISD::S2VEC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47290 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
electionDAG.cpp
|
| d497d9fab6e90499c703f3e672ec001dbfa074f9 |
16-Feb-2008 |
Andrew Lenharth <andrewl@lenharth.org> |
I cannot find a libgcc function for this builtin. Therefor expanding it to a noop (which is how it use to be treated). If someone who knows the x86 backend better than me could tell me how to get a lock prefix on an instruction, that would be nice to complete x86 support.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47213 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 0531ec5fcd743940a1e3074e94d764cfdbc8c135 |
16-Feb-2008 |
Andrew Lenharth <alenhar2@cs.uiuc.edu> |
I cannot find a libgcc function for this builtin. Therefor expanding it to a noop (which is how it use to be treated). If someone who knows the x86 backend better than me could tell me how to get a lock prefix on an instruction, that would be nice to complete x86 support.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47213 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 051bb7b07504be9f848f7cce802e62ed24980bc5 |
16-Feb-2008 |
Duncan Sands <baldrick@free.fr> |
Teach LegalizeTypes how to expand the operands of
br_cc. This fixes 5 "make check" failures.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47212 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeTypes.h
egalizeTypesExpand.cpp
|
| 4932e5861eea26356643819e6f27e66895c3ca1e |
16-Feb-2008 |
Duncan Sands <baldrick@free.fr> |
Teach LegalizeTypes how to expand the operands of
br_cc. This fixes 5 "make check" failures.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47212 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeTypes.h
egalizeTypesExpand.cpp
|
| 22c5c1b2dfcb1da6a7ebfebea903401fc77d56e6 |
16-Feb-2008 |
Andrew Lenharth <andrewl@lenharth.org> |
llvm.memory.barrier, and impl for x86 and alpha
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47204 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
electionDAG.cpp
electionDAGISel.cpp
|
| 785610d18b401d3138edf13037d21d7ec89e748a |
16-Feb-2008 |
Andrew Lenharth <alenhar2@cs.uiuc.edu> |
llvm.memory.barrier, and impl for x86 and alpha
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47204 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
electionDAG.cpp
electionDAGISel.cpp
|
| 42a77880a83b76112a1f42ce16b46dbde01cd0a8 |
16-Feb-2008 |
Dan Gohman <gohman@apple.com> |
Rename CountMemOperands to ComputeMemOperandsEnd to reflect what
it actually does. Simplify CountOperands a little by reusing
ComputeMemOperandsEnd. And reword some comments for both.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47198 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAG.cpp
|
| ce2564683245b224c3c763cce2a17de8a5299f70 |
16-Feb-2008 |
Dan Gohman <djg@cray.com> |
Rename CountMemOperands to ComputeMemOperandsEnd to reflect what
it actually does. Simplify CountOperands a little by reusing
ComputeMemOperandsEnd. And reword some comments for both.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47198 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAG.cpp
|
| 94ebde1d45dcd7e209663c49a1cf1a4589191df1 |
16-Feb-2008 |
Dan Gohman <gohman@apple.com> |
Revert 47177, which was incorrect.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47196 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGRRList.cpp
|
| 71fd07b3d2774cfd751514f453b3fa4836e6cd83 |
16-Feb-2008 |
Dan Gohman <djg@cray.com> |
Revert 47177, which was incorrect.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47196 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGRRList.cpp
|
| 0123b7dcfa9be97588926407163deb8d603487ce |
16-Feb-2008 |
Scott Michel <scottm@aero.org> |
Make tblgen a little smarter about constants smaller than i32. Currently,
tblgen will complain if a sign-extended constant does not fit into a
data type smaller than i32, e.g., i16. This causes a problem when certain
hex constants are used, such as 0xff for byte masks or immediate xor
values.
tblgen will try the sign-extended value first and, if the sign extended
value would overflow, it tries to see if the unsigned value will fit.
Consequently, a software developer can now safely incant:
(XORHIr16 R16C:$rA, 0xffff)
which is somewhat clearer and more informative than incanting:
(XORHIr16 R16C:$rA, (i16 -1))
even if the two are bitwise equivalent.
Tblgen also outputs the 64-bit unsigned constant in the generated ISel code
when getTargetConstant() is invoked.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47188 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| ac7091cb9cc8672cb11befc1a333f79752be0fc6 |
16-Feb-2008 |
Scott Michel <scottm@aero.org> |
Make tblgen a little smarter about constants smaller than i32. Currently,
tblgen will complain if a sign-extended constant does not fit into a
data type smaller than i32, e.g., i16. This causes a problem when certain
hex constants are used, such as 0xff for byte masks or immediate xor
values.
tblgen will try the sign-extended value first and, if the sign extended
value would overflow, it tries to see if the unsigned value will fit.
Consequently, a software developer can now safely incant:
(XORHIr16 R16C:$rA, 0xffff)
which is somewhat clearer and more informative than incanting:
(XORHIr16 R16C:$rA, (i16 -1))
even if the two are bitwise equivalent.
Tblgen also outputs the 64-bit unsigned constant in the generated ISel code
when getTargetConstant() is invoked.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47188 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 53c607f562a74d9374bd390a4be151a952ba5d29 |
15-Feb-2008 |
Dan Gohman <gohman@apple.com> |
Skip over the defs and start at the uses when looking for operands
with the TIED_TO attribute.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47177 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGRRList.cpp
|
| 3583a99f40a551d72661c278fb5a05951cf54709 |
15-Feb-2008 |
Dan Gohman <djg@cray.com> |
Skip over the defs and start at the uses when looking for operands
with the TIED_TO attribute.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47177 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGRRList.cpp
|
| 3b66555c53eb8921b2dd50335e0b278ddf80d220 |
15-Feb-2008 |
Dan Gohman <gohman@apple.com> |
Use the TargetInstrDescr to determine the number of operands
that should be checked for the TIED_TO attribute instead of
using CountOperands.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47176 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGRRList.cpp
|
| 2847ed57495d317b97ecc3128a1ce15beefe9ae1 |
15-Feb-2008 |
Dan Gohman <djg@cray.com> |
Use the TargetInstrDescr to determine the number of operands
that should be checked for the TIED_TO attribute instead of
using CountOperands.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47176 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGRRList.cpp
|
| ca3a56f2fbde4132e405ead4edadc3570b209386 |
15-Feb-2008 |
Duncan Sands <baldrick@free.fr> |
Teach LegalizeTypes how to promote the flags
in a ret node. These are created as i32 constants
but on some platforms i32 is not legal. This
fixes 26 "make check" failures, for example
Alpha/2005-07-12-TwoMallocCalls.ll.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47172 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeTypes.h
egalizeTypesPromote.cpp
|
| 820d4266218d0899b2c3adfaf87aa560bab8d5cc |
15-Feb-2008 |
Duncan Sands <baldrick@free.fr> |
Teach LegalizeTypes how to promote the flags
in a ret node. These are created as i32 constants
but on some platforms i32 is not legal. This
fixes 26 "make check" failures, for example
Alpha/2005-07-12-TwoMallocCalls.ll.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47172 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeTypes.h
egalizeTypesPromote.cpp
|
| 21be3849aef47e6d8c26f31b11def57d59167863 |
15-Feb-2008 |
Dan Gohman <gohman@apple.com> |
Use StoreSDNode::getValue instead of calling getOperand directly
with a hard-coded operand number.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47163 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| e9f633d8dc2da30c536db9df61b0adf4414d3c0d |
15-Feb-2008 |
Dan Gohman <djg@cray.com> |
Use StoreSDNode::getValue instead of calling getOperand directly
with a hard-coded operand number.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47163 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 423be627e6a108b72770426e16cb988b6167c3cb |
14-Feb-2008 |
Chris Lattner <sabre@nondot.org> |
Fix a miscompilation from Dan's recent apintification.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47128 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 69946fdd7428f0a1ccc7defc7c06533817bbf80e |
14-Feb-2008 |
Chris Lattner <sabre@nondot.org> |
Fix a miscompilation from Dan's recent apintification.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47128 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 00fee65fd21f9615d1a604b8b7d42cd16a3f6b47 |
14-Feb-2008 |
Duncan Sands <baldrick@free.fr> |
In TargetLowering::LowerCallTo, don't assert that
the return value is zero-extended if it isn't
sign-extended. It may also be any-extended.
Also, if a floating point value was returned
in a larger floating point type, pass 1 as the
second operand to FP_ROUND, which tells it
that all the precision is in the original type.
I think this is right but I could be wrong.
Finally, when doing libcalls, set isZExt on
a parameter if it is "unsigned". Currently
isSExt is set when signed, and nothing is
set otherwise. This should be right for all
calls to standard library routines.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47122 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
electionDAGISel.cpp
argetLowering.cpp
|
| ead972ea45c0c4dad4e2e5c8da1ad24abda2ef47 |
14-Feb-2008 |
Duncan Sands <baldrick@free.fr> |
In TargetLowering::LowerCallTo, don't assert that
the return value is zero-extended if it isn't
sign-extended. It may also be any-extended.
Also, if a floating point value was returned
in a larger floating point type, pass 1 as the
second operand to FP_ROUND, which tells it
that all the precision is in the original type.
I think this is right but I could be wrong.
Finally, when doing libcalls, set isZExt on
a parameter if it is "unsigned". Currently
isSExt is set when signed, and nothing is
set otherwise. This should be right for all
calls to standard library routines.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47122 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
electionDAGISel.cpp
argetLowering.cpp
|
| e179584f9b740cf3a36bde70f8cab40de59b8081 |
14-Feb-2008 |
Nate Begeman <natebegeman@mac.com> |
Change how FP immediates are handled.
1) ConstantFP is now expand by default
2) ConstantFP is not turned into TargetConstantFP during Legalize
if it is legal.
This allows ConstantFP to be handled like Constant, allowing for
targets that can encode FP immediates as MachineOperands.
As a bonus, fix up Itanium FP constants, which now correctly match,
and match more constants! Hooray.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47121 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
cheduleDAG.cpp
argetLowering.cpp
|
| e2ba64fc3785eb8bcc9a7fc2091c56ef056cbc07 |
14-Feb-2008 |
Nate Begeman <natebegeman@mac.com> |
Change how FP immediates are handled.
1) ConstantFP is now expand by default
2) ConstantFP is not turned into TargetConstantFP during Legalize
if it is legal.
This allows ConstantFP to be handled like Constant, allowing for
targets that can encode FP immediates as MachineOperands.
As a bonus, fix up Itanium FP constants, which now correctly match,
and match more constants! Hooray.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47121 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
cheduleDAG.cpp
argetLowering.cpp
|
| d9fe41c0c8f6eab686c6064e2ce0c8e211b0c995 |
14-Feb-2008 |
Dan Gohman <gohman@apple.com> |
Allow the APInt form of ComputeMaskedBits to operate on i128 types.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47101 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 56eaab3fda3198025c570ca7905ec1efbf177f49 |
14-Feb-2008 |
Dan Gohman <djg@cray.com> |
Allow the APInt form of ComputeMaskedBits to operate on i128 types.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47101 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 72d2fd57b67b8afc6ddf6314c483a9d2ec71569a |
13-Feb-2008 |
Dan Gohman <gohman@apple.com> |
Avoid setting bits that aren't demanded.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47098 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 4d81a743dea86765b5261dd3aa252c7339e3af4c |
13-Feb-2008 |
Dan Gohman <djg@cray.com> |
Avoid setting bits that aren't demanded.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47098 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 977a76fbb6ea1b87dfd7fbbe2ae2afb63e982ff3 |
13-Feb-2008 |
Dan Gohman <gohman@apple.com> |
Simplify some logic in ComputeMaskedBits. And change ComputeMaskedBits
to pass the mask APInt by value, not by reference.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47096 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
argetLowering.cpp
|
| d0dfc77ceb77510b470773f2b3725de475fc6bae |
13-Feb-2008 |
Dan Gohman <djg@cray.com> |
Simplify some logic in ComputeMaskedBits. And change ComputeMaskedBits
to pass the mask APInt by value, not by reference.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47096 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
argetLowering.cpp
|
| d462ba853981d45bf9c777564e79dc9e1c850ca6 |
13-Feb-2008 |
Duncan Sands <baldrick@free.fr> |
Teach LegalizeTypes how to expand and promote CTLZ,
CTTZ and CTPOP. The expansion code differs from
that in LegalizeDAG in that it chooses to take the
CTLZ/CTTZ count from the Hi/Lo part depending on
whether the Hi/Lo value is zero, not on whether
CTLZ/CTTZ of Hi/Lo returned 32 (or whatever the
width of the type is) for it. I made this change
because the optimizers may well know that Hi/Lo
is zero and exploit it. The promotion code for
CTTZ also differs from that in LegalizeDAG: it
uses an "or" to get the right result when the
original value is zero, rather than using a compare
and select. This also means the value doesn't
need to be zero extended.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47075 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeTypes.h
egalizeTypesExpand.cpp
egalizeTypesPromote.cpp
|
| 146d5af37804de3c482dde4e88e453622cb4039e |
13-Feb-2008 |
Duncan Sands <baldrick@free.fr> |
Teach LegalizeTypes how to expand and promote CTLZ,
CTTZ and CTPOP. The expansion code differs from
that in LegalizeDAG in that it chooses to take the
CTLZ/CTTZ count from the Hi/Lo part depending on
whether the Hi/Lo value is zero, not on whether
CTLZ/CTTZ of Hi/Lo returned 32 (or whatever the
width of the type is) for it. I made this change
because the optimizers may well know that Hi/Lo
is zero and exploit it. The promotion code for
CTTZ also differs from that in LegalizeDAG: it
uses an "or" to get the right result when the
original value is zero, rather than using a compare
and select. This also means the value doesn't
need to be zero extended.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47075 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeTypes.h
egalizeTypesExpand.cpp
egalizeTypesPromote.cpp
|
| 86ca3cacc5a56e862c8258ac9c9ee1e37598ebd8 |
13-Feb-2008 |
Chris Lattner <sabre@nondot.org> |
In SDISel, for targets that support FORMAL_ARGUMENTS nodes, lower this
node as soon as we create it in SDISel. Previously we would lower it in
legalize. The problem with this is that it only exposes the argument
loads implied by FORMAL_ARGUMENTs after legalize, so that only dag combine 2
can hack on them. This causes us to miss some optimizations because
datatype expansion also happens here.
Exposing the loads early allows us to do optimizations on them. For example
we now compile arg-cast.ll to:
_foo:
movl $2147483647, %eax
andl 8(%esp), %eax
ret
where we previously produced:
_foo:
subl $12, %esp
movsd 16(%esp), %xmm0
movsd %xmm0, (%esp)
movl $2147483647, %eax
andl 4(%esp), %eax
addl $12, %esp
ret
It might also make sense to do this for ISD::CALL nodes, which have implicit
stores on many targets.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47054 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 5cb5add9157b17a0be2be4bf0bb5165492ff3e43 |
13-Feb-2008 |
Chris Lattner <sabre@nondot.org> |
In SDISel, for targets that support FORMAL_ARGUMENTS nodes, lower this
node as soon as we create it in SDISel. Previously we would lower it in
legalize. The problem with this is that it only exposes the argument
loads implied by FORMAL_ARGUMENTs after legalize, so that only dag combine 2
can hack on them. This causes us to miss some optimizations because
datatype expansion also happens here.
Exposing the loads early allows us to do optimizations on them. For example
we now compile arg-cast.ll to:
_foo:
movl $2147483647, %eax
andl 8(%esp), %eax
ret
where we previously produced:
_foo:
subl $12, %esp
movsd 16(%esp), %xmm0
movsd %xmm0, (%esp)
movl $2147483647, %eax
andl 4(%esp), %eax
addl $12, %esp
ret
It might also make sense to do this for ISD::CALL nodes, which have implicit
stores on many targets.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47054 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| fec42eb6daff7e8b644bd24cbf12f83d6b14bd8b |
13-Feb-2008 |
Chris Lattner <sabre@nondot.org> |
teach dag combiner how to eliminate MERGE_VALUES nodes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47052 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| f32fa7f878660878815fb3fb2f36c92ce262d886 |
13-Feb-2008 |
Chris Lattner <sabre@nondot.org> |
teach dag combiner how to eliminate MERGE_VALUES nodes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47052 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 0325d90348f33e8aa719cd70e4663e7b108297fd |
13-Feb-2008 |
Nate Begeman <natebegeman@mac.com> |
Support legalizing insert_vector_elt on targets where the element
type is not legal.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47048 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 6fb7ebd546a28b2f8b941cf79d769304e5875b6a |
13-Feb-2008 |
Nate Begeman <natebegeman@mac.com> |
Support legalizing insert_vector_elt on targets where the element
type is not legal.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47048 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| fd29e0eb060ea8b4d490860329234d2ae5f5952e |
13-Feb-2008 |
Dan Gohman <gohman@apple.com> |
Convert SelectionDAG::ComputeMaskedBits to use APInt instead of uint64_t.
Add an overload that supports the uint64_t interface for use by clients
that haven't been updated yet.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47039 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
argetLowering.cpp
|
| 229fa05f26826290b9d128e7f6ffbc4889478c25 |
13-Feb-2008 |
Dan Gohman <djg@cray.com> |
Convert SelectionDAG::ComputeMaskedBits to use APInt instead of uint64_t.
Add an overload that supports the uint64_t interface for use by clients
that haven't been updated yet.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47039 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
argetLowering.cpp
|
| 014e04a5daeb312b1f0ebc1dd906ffc97c4abc5f |
12-Feb-2008 |
Duncan Sands <baldrick@free.fr> |
Generalize getCopyFromParts and getCopyToParts to
handle arbitrary precision integers and any number
of parts. For example, on a 32 bit machine an i50
corresponds to two i32 parts. getCopyToParts will
extend the i50 to an i64 then write half of the i64
to each part; getCopyFromParts will combine the two
i32 parts into an i64 then truncate the result to
i50.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47024 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 94f9e9a55b6161aa782059b6c49c07264875eb74 |
12-Feb-2008 |
Duncan Sands <baldrick@free.fr> |
Generalize getCopyFromParts and getCopyToParts to
handle arbitrary precision integers and any number
of parts. For example, on a 32 bit machine an i50
corresponds to two i32 parts. getCopyToParts will
extend the i50 to an i64 then write half of the i64
to each part; getCopyFromParts will combine the two
i32 parts into an i64 then truncate the result to
i50.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47024 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| b988baccc229ef3e175905c999245d5544a0d384 |
11-Feb-2008 |
Duncan Sands <baldrick@free.fr> |
Generalize the handling of call and return arguments,
in preparation for apint support. These changes are
intended to have no functional effect.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46967 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| e111ce83930bdd22c1281db2175a36419879e370 |
11-Feb-2008 |
Duncan Sands <baldrick@free.fr> |
Generalize the handling of call and return arguments,
in preparation for apint support. These changes are
intended to have no functional effect.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46967 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| cc20cd59e6c8c9bc6a633f5eea6d66c27c474053 |
11-Feb-2008 |
Dan Gohman <gohman@apple.com> |
From Chris' review: use isa instead of explicitly using classof.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46964 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAG.cpp
|
| 206208c3f3b99f6c99ffedfe71bf7358139e57b1 |
11-Feb-2008 |
Dan Gohman <djg@cray.com> |
From Chris' review: use isa instead of explicitly using classof.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46964 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAG.cpp
|
| 027ee7e3ca21e3cf16051caac91e9befa327f193 |
11-Feb-2008 |
Dan Gohman <gohman@apple.com> |
From Chris' review: minor corrections in comments.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46963 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAG.cpp
|
| 0256f1e63154c50e8cd6e35d4475d2c327f78ac5 |
11-Feb-2008 |
Dan Gohman <djg@cray.com> |
From Chris' review: minor corrections in comments.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46963 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAG.cpp
|
| bbbbb9c3dd4160990f856854d16a3beaead1f354 |
11-Feb-2008 |
Dan Gohman <gohman@apple.com> |
From Chris' review: use cast instead of dyn_cast with an assert.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46962 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 20e37966ab0c573f45750cc512c573fa2a998fe9 |
11-Feb-2008 |
Dan Gohman <djg@cray.com> |
From Chris' review: use cast instead of dyn_cast with an assert.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46962 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 1f801fa5ada9cb40fb97ae755c282e91af54a1bc |
11-Feb-2008 |
Ted Kremenek <kremenek@apple.com> |
Added "Profile" method to APFloat for use with FoldingSet.
Added member template "Add" to FoldingSetNodeID that allows "adding" arbitrary
objects to a profile via dispatch to FoldingSetTrait<T>::Profile().
Removed FoldingSetNodeID::AddAPFloat and FoldingSetNodeID::APInt, as their
functionality is now replaced using the above mentioned member template.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46957 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| dc71c8051d354cad8673e651209e431584310d5b |
11-Feb-2008 |
Ted Kremenek <kremenek@apple.com> |
Added "Profile" method to APFloat for use with FoldingSet.
Added member template "Add" to FoldingSetNodeID that allows "adding" arbitrary
objects to a profile via dispatch to FoldingSetTrait<T>::Profile().
Removed FoldingSetNodeID::AddAPFloat and FoldingSetNodeID::APInt, as their
functionality is now replaced using the above mentioned member template.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46957 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 0753fc1850a1ca4d17acca854d830d67737fd623 |
11-Feb-2008 |
Duncan Sands <baldrick@free.fr> |
Add a isBigEndian method to complement isLittleEndian.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46954 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
egalizeDAG.cpp
egalizeTypesExpand.cpp
|
| 9ff8fbf70903ad5bc02996bb15834f24231290a2 |
11-Feb-2008 |
Duncan Sands <baldrick@free.fr> |
Add a isBigEndian method to complement isLittleEndian.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46954 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
egalizeDAG.cpp
egalizeTypesExpand.cpp
|
| 6f0d024a534af18d9e60b3ea757376cd8a3a980e |
10-Feb-2008 |
Dan Gohman <gohman@apple.com> |
Rename MRegisterInfo to TargetRegisterInfo.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46930 91177308-0d34-0410-b5e6-96231b3b80d8
allingConvLower.cpp
cheduleDAG.cpp
cheduleDAGList.cpp
cheduleDAGRRList.cpp
electionDAG.cpp
electionDAGISel.cpp
electionDAGPrinter.cpp
argetLowering.cpp
|
| 1e57df3b4fd69b2a316d8931dee1b9e033ae3a9a |
10-Feb-2008 |
Dan Gohman <djg@cray.com> |
Rename MRegisterInfo to TargetRegisterInfo.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46930 91177308-0d34-0410-b5e6-96231b3b80d8
allingConvLower.cpp
cheduleDAG.cpp
cheduleDAGList.cpp
cheduleDAGRRList.cpp
electionDAG.cpp
electionDAGISel.cpp
electionDAGPrinter.cpp
argetLowering.cpp
|
| d885dbdf9eb7a51ebb9a15a85921f27d8219997c |
10-Feb-2008 |
Duncan Sands <baldrick@free.fr> |
Add truncate and AssertZext result expansion.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46926 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeTypes.h
egalizeTypesExpand.cpp
electionDAG.cpp
|
| 539510b437768ff1e18b67e8eb968f26efe2e054 |
10-Feb-2008 |
Duncan Sands <baldrick@free.fr> |
Add truncate and AssertZext result expansion.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46926 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeTypes.h
egalizeTypesExpand.cpp
electionDAG.cpp
|
| 91b9ad182411153608d5bb4232209f3b5fd6bd6b |
10-Feb-2008 |
Bill Wendling <isanbard@gmail.com> |
Return "(c1 + c2)" instead of yet another ADD node (which made this a
no-op).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46922 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| e58f7b81562784e4194905e0f233092360d7782a |
10-Feb-2008 |
Bill Wendling <isanbard@gmail.com> |
Return "(c1 + c2)" instead of yet another ADD node (which made this a
no-op).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46922 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 6394b099e836f56a937cdcc7332c9487b504ca68 |
08-Feb-2008 |
Dan Gohman <gohman@apple.com> |
Change ConstantSDNode to store an APInt instead of a uint64_t, and
begin adding some methods to use it this way.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46899 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| dc458cfef568772046cf0c1a508f0621c3a6a4fe |
08-Feb-2008 |
Dan Gohman <djg@cray.com> |
Change ConstantSDNode to store an APInt instead of a uint64_t, and
begin adding some methods to use it this way.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46899 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 547ca537b638c8fd5c8f4729e4c74898f8371e4e |
08-Feb-2008 |
Dan Gohman <gohman@apple.com> |
Avoid needlessly casting away const qualifiers.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46876 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 8cdf7897416cf307bcae281ef8a0f80873d31356 |
08-Feb-2008 |
Dan Gohman <djg@cray.com> |
Avoid needlessly casting away const qualifiers.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46876 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 3069b8743769527ce7af6cfb6591a2f0fc2faee4 |
07-Feb-2008 |
Dan Gohman <gohman@apple.com> |
Follow Chris' suggestion; change the PseudoSourceValue accessors
to return pointers instead of references, since this is always what
is needed.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46857 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
electionDAG.cpp
|
| fb020b625ece8bf264cbce7e40f73611c7b552e3 |
07-Feb-2008 |
Dan Gohman <djg@cray.com> |
Follow Chris' suggestion; change the PseudoSourceValue accessors
to return pointers instead of references, since this is always what
is needed.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46857 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
electionDAG.cpp
|
| 69de1932b350d7cdfc0ed1f4198d6f78c7822a02 |
06-Feb-2008 |
Dan Gohman <gohman@apple.com> |
Re-apply the memory operand changes, with a fix for the static
initializer problem, a minor tweak to the way the
DAGISelEmitter finds load/store nodes, and a renaming of the
new PseudoSourceValue objects.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46827 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
cheduleDAG.cpp
electionDAG.cpp
electionDAGPrinter.cpp
|
| 12a9c08252c8e0fcdf5dedcdbf182251012a6fab |
06-Feb-2008 |
Dan Gohman <djg@cray.com> |
Re-apply the memory operand changes, with a fix for the static
initializer problem, a minor tweak to the way the
DAGISelEmitter finds load/store nodes, and a renaming of the
new PseudoSourceValue objects.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46827 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
cheduleDAG.cpp
electionDAG.cpp
electionDAGPrinter.cpp
|
| a58891ff1e6b5cc61cbb3cfe46be7f2eeddbfe98 |
05-Feb-2008 |
Evan Cheng <evan.cheng@apple.com> |
Fix PR1975: dag isel emitter produces patterns that isel wrong flag result.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46776 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 07f307d74154af2be9ae7d1c5a90912aef42f0c6 |
05-Feb-2008 |
Evan Cheng <evan.cheng@apple.com> |
Fix PR1975: dag isel emitter produces patterns that isel wrong flag result.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46776 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| fc718542a3e73558af9c0272b0eea67a189e5397 |
05-Feb-2008 |
Evan Cheng <evan.cheng@apple.com> |
Typo.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46725 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| ee6db0f4e93fc47b6b482c2235c06fbbbdd4bb74 |
05-Feb-2008 |
Evan Cheng <evan.cheng@apple.com> |
Typo.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46725 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 6cb7e6d36bf7d5b3687ae19217fef6dd24448285 |
04-Feb-2008 |
Duncan Sands <baldrick@free.fr> |
I don't see how NodeUpdated can be called with a
ReadyToProcess node - add an assertion to check
this. Add an assertion to NodeDeleted that checks
that processed/ready nodes are indeed not deleted.
It is because they are never deleted that none of
the maps can have a deleted node as the source of
a mapping. It does however seem to be possible in
theory to have a deleted value as the target of a
mapping, however this has not yet been spotted in
the wild. Still mulling on what to do about this.
[The theoretical situation is this: a node A is
expanded/promoted/whatever to a newly created node
B. Thus A->B is added to a map. When the subtree
rooted at B is legalized it is conceivable that B
is deleted due to RAUW on a node somewhere above
it].
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46705 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeTypes.cpp
|
| 608f7ae5f7a2268b391c372a35d4fe70920dc49b |
04-Feb-2008 |
Duncan Sands <baldrick@free.fr> |
I don't see how NodeUpdated can be called with a
ReadyToProcess node - add an assertion to check
this. Add an assertion to NodeDeleted that checks
that processed/ready nodes are indeed not deleted.
It is because they are never deleted that none of
the maps can have a deleted node as the source of
a mapping. It does however seem to be possible in
theory to have a deleted value as the target of a
mapping, however this has not yet been spotted in
the wild. Still mulling on what to do about this.
[The theoretical situation is this: a node A is
expanded/promoted/whatever to a newly created node
B. Thus A->B is added to a map. When the subtree
rooted at B is legalized it is conceivable that B
is deleted due to RAUW on a node somewhere above
it].
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46705 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeTypes.cpp
|
| 9d3e5d476c4478d2837760a9bf43fedb8a5a7e51 |
03-Feb-2008 |
Chris Lattner <sabre@nondot.org> |
Fix typo
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46682 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeTypes.cpp
|
| 5a878cf91b5474e95491c4e5b9e36eeff334e61e |
03-Feb-2008 |
Chris Lattner <sabre@nondot.org> |
Fix typo
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46682 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeTypes.cpp
|
| fcd8e9e3a21efb32172a6395e8697889962067e1 |
03-Feb-2008 |
Chris Lattner <sabre@nondot.org> |
handle the case where a node can become ready to process
multiple times due to a RAUW.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46680 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeTypes.cpp
egalizeTypes.h
|
| 2d41a227a7422ac991a8412ddd0c7c1c5374f24e |
03-Feb-2008 |
Chris Lattner <sabre@nondot.org> |
handle the case where a node can become ready to process
multiple times due to a RAUW.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46680 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeTypes.cpp
egalizeTypes.h
|
| 42bd25f8ec6f506fa40d3304de47ba8a2e306f96 |
03-Feb-2008 |
Chris Lattner <sabre@nondot.org> |
Use the new infrastructure for listening to node updates to
keep the LegalizeTypes node flags up to date when doing a RAUW.
This fixes a nasty bug that Duncan ran into and makes the
previous (nonbuggy case) more efficent.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46679 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeTypes.cpp
egalizeTypes.h
|
| 0fdf4edd2d64ee5d6bdb5d66beed0da325e5e117 |
03-Feb-2008 |
Chris Lattner <sabre@nondot.org> |
Use the new infrastructure for listening to node updates to
keep the LegalizeTypes node flags up to date when doing a RAUW.
This fixes a nasty bug that Duncan ran into and makes the
previous (nonbuggy case) more efficent.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46679 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeTypes.cpp
egalizeTypes.h
|
| d8cd3be37062747f1abbcdb6de4547574ceea603 |
03-Feb-2008 |
Chris Lattner <sabre@nondot.org> |
the world doesn't need my debugging code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46678 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 9c980aa7364674c55978c4ee8f92cfeff71a57a7 |
03-Feb-2008 |
Chris Lattner <sabre@nondot.org> |
the world doesn't need my debugging code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46678 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| f8dc0617baceeba8ccd67c8881eb88eb1be2902c |
03-Feb-2008 |
Chris Lattner <sabre@nondot.org> |
Change the 'global modification' APIs in SelectionDAG to take a new
DAGUpdateListener object pointer instead of just returning a vector
of deleted nodes. This makes the interfaces more efficient (no more
allocating a vector [at least a malloc], filling it in, then walking
it) and more clean. This also allows the client to be notified of
nodes that are *changed* but not deleted.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46677 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
electionDAG.cpp
|
| 7bcb18f7002752829aca7ac639c1a76dba8f347f |
03-Feb-2008 |
Chris Lattner <sabre@nondot.org> |
Change the 'global modification' APIs in SelectionDAG to take a new
DAGUpdateListener object pointer instead of just returning a vector
of deleted nodes. This makes the interfaces more efficient (no more
allocating a vector [at least a malloc], filling it in, then walking
it) and more clean. This also allows the client to be notified of
nodes that are *changed* but not deleted.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46677 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
electionDAG.cpp
|
| 11d049c87f49cf273863248d44cda005690515a6 |
03-Feb-2008 |
Chris Lattner <sabre@nondot.org> |
Generalize the SDOperand->SDOperand form of
SelectionDAG::ReplaceAllUsesWith to handle replacement of
an SDOperand with *any* sdoperand, not just one for a node with
a single result. Note that this has a horrible FIXME'd hack in it
to work around PR1975. This should be removed when PR1975 is fixed.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46674 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| dca329fe24288b7d7f7303df17f949f5878cb16f |
03-Feb-2008 |
Chris Lattner <sabre@nondot.org> |
Generalize the SDOperand->SDOperand form of
SelectionDAG::ReplaceAllUsesWith to handle replacement of
an SDOperand with *any* sdoperand, not just one for a node with
a single result. Note that this has a horrible FIXME'd hack in it
to work around PR1975. This should be removed when PR1975 is fixed.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46674 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| a658baba78e9cb0a9efbc5e4921c63f7b92a920c |
03-Feb-2008 |
Chris Lattner <sabre@nondot.org> |
add a -view-legalize-types-dags option, for viewing the dags going into legalize types.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46672 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeTypes.cpp
|
| c90decaaa677dea71fbde50211c2c3ee89cffceb |
03-Feb-2008 |
Chris Lattner <sabre@nondot.org> |
add a -view-legalize-types-dags option, for viewing the dags going into legalize types.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46672 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeTypes.cpp
|
| a844bdeab31ef04221e7ef59a8467893584cc14d |
02-Feb-2008 |
Evan Cheng <evan.cheng@apple.com> |
SDIsel processes llvm.dbg.declare by recording the variable debug information descriptor and its corresponding stack frame index in MachineModuleInfo. This only works if the local variable is "homed" in the stack frame. It does not work for byval parameter, etc.
Added ISD::DECLARE node type to represent llvm.dbg.declare intrinsic. Now the intrinsic calls are lowered into a SDNode and lives on through out the codegen passes.
For now, since all the debugging information recording is done at isel time, when a ISD::DECLARE node is selected, it has the side effect of also recording the variable. This is a short term solution that should be fixed in time.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46659 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
cheduleDAG.cpp
electionDAG.cpp
electionDAGISel.cpp
|
| 2e28d627d086d38a7e62fc2e3b6f4b9ef24ecf07 |
02-Feb-2008 |
Evan Cheng <evan.cheng@apple.com> |
SDIsel processes llvm.dbg.declare by recording the variable debug information descriptor and its corresponding stack frame index in MachineModuleInfo. This only works if the local variable is "homed" in the stack frame. It does not work for byval parameter, etc.
Added ISD::DECLARE node type to represent llvm.dbg.declare intrinsic. Now the intrinsic calls are lowered into a SDNode and lives on through out the codegen passes.
For now, since all the debugging information recording is done at isel time, when a ISD::DECLARE node is selected, it has the side effect of also recording the variable. This is a short term solution that should be fixed in time.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46659 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
cheduleDAG.cpp
electionDAG.cpp
electionDAGISel.cpp
|
| 1b08bbca5592351a940bcd164bdec724ee954326 |
01-Feb-2008 |
Evan Cheng <evan.cheng@apple.com> |
Remove the nasty LABEL hack with a much less evil one. Now llvm.dbg.func.start implies a stoppoint is set. SelectionDAGISel records a new source line but does not create a ISD::LABEL node for this special stoppoint. Asm printer will magically print this label. This ensures nothing is emitted before.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46635 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAG.cpp
electionDAGISel.cpp
|
| a53c40a59981b6bae7e734fa9e42bc345c0457df |
01-Feb-2008 |
Evan Cheng <evan.cheng@apple.com> |
Remove the nasty LABEL hack with a much less evil one. Now llvm.dbg.func.start implies a stoppoint is set. SelectionDAGISel records a new source line but does not create a ISD::LABEL node for this special stoppoint. Asm printer will magically print this label. This ensures nothing is emitted before.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46635 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAG.cpp
electionDAGISel.cpp
|
| a647c92ec2b3c91e1e6de25cc5c7860912c7626b |
01-Feb-2008 |
Evan Cheng <evan.cheng@apple.com> |
Rename RecordLabel to RecordSourceLine because that's what it is doing.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46628 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 69eda82e77410e2ab9599e9861af2c97a44e863d |
01-Feb-2008 |
Evan Cheng <evan.cheng@apple.com> |
Rename RecordLabel to RecordSourceLine because that's what it is doing.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46628 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 334dc1f58d617dcff969a2e107febaae42bbc883 |
31-Jan-2008 |
Evan Cheng <evan.cheng@apple.com> |
Revert 46556 and 46585. Dan please fix the PseudoSourceValue problem and re-commit.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46623 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
cheduleDAG.cpp
electionDAG.cpp
electionDAGPrinter.cpp
|
| 36ddaf294db6fbbbac5e79ca0e2d166ea36fe187 |
31-Jan-2008 |
Evan Cheng <evan.cheng@apple.com> |
Revert 46556 and 46585. Dan please fix the PseudoSourceValue problem and re-commit.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46623 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
cheduleDAG.cpp
electionDAG.cpp
electionDAGPrinter.cpp
|
| 7bdc5f734f6aa16cc300f66d2a804d75b916d12b |
31-Jan-2008 |
Evan Cheng <evan.cheng@apple.com> |
Add a comment for a nasty short term hack.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46610 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAG.cpp
|
| 345235ccc9e9b11acd4fc4448a9d6e8c83dabf91 |
31-Jan-2008 |
Evan Cheng <evan.cheng@apple.com> |
Add a comment for a nasty short term hack.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46610 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAG.cpp
|
| bb81d97feb396a8bb21d074db1c57e9f66525f40 |
31-Jan-2008 |
Evan Cheng <evan.cheng@apple.com> |
Add an extra operand to LABEL nodes which distinguishes between debug, EH, or misc labels. This fixes the EH breakage. However I am not convinced this is *the* solution.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46609 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
cheduleDAG.cpp
electionDAG.cpp
electionDAGISel.cpp
|
| 13d1c2965485bc5df76e0bb609fcc77d257caca7 |
31-Jan-2008 |
Evan Cheng <evan.cheng@apple.com> |
Add an extra operand to LABEL nodes which distinguishes between debug, EH, or misc labels. This fixes the EH breakage. However I am not convinced this is *the* solution.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46609 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
cheduleDAG.cpp
electionDAG.cpp
electionDAGISel.cpp
|
| 175e81598ad3fc02f9f5a2ac3ef578a9fed31b6e |
31-Jan-2008 |
Christopher Lamb <christopher.lamb@gmail.com> |
Add more thorough error checking for NULL register classes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46605 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAG.cpp
|
| e08d9ec236815bc0da1828c0231e92698a98d27c |
31-Jan-2008 |
Christopher Lamb <christopher.lamb@gmail.com> |
Add more thorough error checking for NULL register classes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46605 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAG.cpp
|
| 1a0248690aaa9f7baaf1247e5f65a1c0c9e3783c |
31-Jan-2008 |
Dan Gohman <gohman@apple.com> |
Rename ISD::FLT_ROUNDS to ISD::FLT_ROUNDS_ to avoid conflicting
with the real FLT_ROUNDS (defined in <float.h>).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46587 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
electionDAG.cpp
electionDAGISel.cpp
|
| 819574c596dddbd97a3945cbbcf019106c405455 |
31-Jan-2008 |
Dan Gohman <djg@cray.com> |
Rename ISD::FLT_ROUNDS to ISD::FLT_ROUNDS_ to avoid conflicting
with the real FLT_ROUNDS (defined in <float.h>).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46587 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
electionDAG.cpp
electionDAGISel.cpp
|
| c6c391daddbafa722d9ca87d18f204e9a6e617a3 |
31-Jan-2008 |
Dan Gohman <gohman@apple.com> |
Create a new class, MemOperand, for describing memory references
in the backend. Introduce a new SDNode type, MemOperandSDNode, for
holding a MemOperand in the SelectionDAG IR, and add a MemOperand
list to MachineInstr, and code to manage them. Remove the offset
field from SrcValueSDNode; uses of SrcValueSDNode that were using
it are all all using MemOperandSDNode now.
Also, begin updating some getLoad and getStore calls to use the
PseudoSourceValue objects.
Most of this was written by Florian Brander, some
reorganization and updating to TOT by me.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46585 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
cheduleDAG.cpp
electionDAG.cpp
electionDAGPrinter.cpp
|
| f14b4476a7dfade92c1f57f5702175f283960f30 |
31-Jan-2008 |
Dan Gohman <djg@cray.com> |
Create a new class, MemOperand, for describing memory references
in the backend. Introduce a new SDNode type, MemOperandSDNode, for
holding a MemOperand in the SelectionDAG IR, and add a MemOperand
list to MachineInstr, and code to manage them. Remove the offset
field from SrcValueSDNode; uses of SrcValueSDNode that were using
it are all all using MemOperandSDNode now.
Also, begin updating some getLoad and getStore calls to use the
PseudoSourceValue objects.
Most of this was written by Florian Brander, some
reorganization and updating to TOT by me.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46585 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
cheduleDAG.cpp
electionDAG.cpp
electionDAGPrinter.cpp
|
| 965d1b4bba6107b451edee403c6666acb86f39e3 |
30-Jan-2008 |
Evan Cheng <evan.cheng@apple.com> |
Treat the label for the first @llvm.dbg.stoppoint the same way as the dbg_func_start label. Make sure nothing else is inserted before them.
Note this solution might be somewhat fragile since ISD::LABEL may be used for other
purposes. If that ends up to be an issue, we may need to introduce a different node
for debug labels.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46571 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAG.cpp
|
| a726585ca660c8766a9bd860476eb2ef8c019142 |
30-Jan-2008 |
Evan Cheng <evan.cheng@apple.com> |
Treat the label for the first @llvm.dbg.stoppoint the same way as the dbg_func_start label. Make sure nothing else is inserted before them.
Note this solution might be somewhat fragile since ISD::LABEL may be used for other
purposes. If that ends up to be an issue, we may need to introduce a different node
for debug labels.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46571 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAG.cpp
|
| 6b2cf285bd43fdc98ca68df477570ef6938d4fb2 |
30-Jan-2008 |
Evan Cheng <evan.cheng@apple.com> |
A semi-gross fix for a debug info issue. When inserting the "function start" label (i.e. first label in the entry block) take care to insert it at the beginning of the block.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46568 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAG.cpp
|
| 2d37392200dddf071bdc54cc3f0217284f550126 |
30-Jan-2008 |
Evan Cheng <evan.cheng@apple.com> |
A semi-gross fix for a debug info issue. When inserting the "function start" label (i.e. first label in the entry block) take care to insert it at the beginning of the block.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46568 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAG.cpp
|
| ff9b373e8f5006c629af81e2619778b4c4f5249e |
30-Jan-2008 |
Evan Cheng <evan.cheng@apple.com> |
Even though InsertAtEndOfBasicBlock is an ugly hack it still deserves a proper name. Rename it to EmitInstrWithCustomInserter since it does not necessarily insert
instruction at the end.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46562 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAG.cpp
electionDAGISel.cpp
|
| e637db117eb826a539e230590ee6a5db585f1ffb |
30-Jan-2008 |
Evan Cheng <evan.cheng@apple.com> |
Even though InsertAtEndOfBasicBlock is an ugly hack it still deserves a proper name. Rename it to EmitInstrWithCustomInserter since it does not necessarily insert
instruction at the end.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46562 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAG.cpp
electionDAGISel.cpp
|
| b625f2f8960de32bc973092aaee8ac62863006fe |
30-Jan-2008 |
Dan Gohman <gohman@apple.com> |
Factor the addressing mode and the load/store VT out of LoadSDNode
and StoreSDNode into their common base class LSBaseSDNode. Member
functions getLoadedVT and getStoredVT are replaced with the common
getMemoryVT to simplify code that will handle both loads and stores.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46538 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
egalizeDAG.cpp
egalizeTypesExpand.cpp
egalizeTypesPromote.cpp
electionDAG.cpp
electionDAGPrinter.cpp
argetLowering.cpp
|
| 9a4c92c2b43e51ac531e0dbc319855635a14f905 |
30-Jan-2008 |
Dan Gohman <djg@cray.com> |
Factor the addressing mode and the load/store VT out of LoadSDNode
and StoreSDNode into their common base class LSBaseSDNode. Member
functions getLoadedVT and getStoredVT are replaced with the common
getMemoryVT to simplify code that will handle both loads and stores.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46538 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
egalizeDAG.cpp
egalizeTypesExpand.cpp
egalizeTypesPromote.cpp
electionDAG.cpp
electionDAGPrinter.cpp
argetLowering.cpp
|
| 648f880dc907faf5c05f3d79a424597b65758360 |
29-Jan-2008 |
Duncan Sands <baldrick@free.fr> |
When expanding an operand, it's not the result value
type that matters but the operand type. This fixes
2008-01-08-IllegalCMP.ll which crashed with the new
legalize infrastructure because SETCC with result
type i8 and operand type i64 was being custom expanded
by the X86 backend. With this fix, the gcc build gets
as far as the first libcall.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46525 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeTypesExpand.cpp
|
| 03408917ba127906ebf3f305b8115cde9a649dc5 |
29-Jan-2008 |
Duncan Sands <baldrick@free.fr> |
When expanding an operand, it's not the result value
type that matters but the operand type. This fixes
2008-01-08-IllegalCMP.ll which crashed with the new
legalize infrastructure because SETCC with result
type i8 and operand type i64 was being custom expanded
by the X86 backend. With this fix, the gcc build gets
as far as the first libcall.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46525 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeTypesExpand.cpp
|
| 303595942502f17c087fa28874c2b89117148c45 |
29-Jan-2008 |
Dan Gohman <gohman@apple.com> |
Use empty() instead of comparing size() with zero.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46514 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
cheduleDAG.cpp
cheduleDAGList.cpp
cheduleDAGRRList.cpp
electionDAG.cpp
|
| 301f405ef34539e7f287513bd7df0cbcf4f71d07 |
29-Jan-2008 |
Dan Gohman <djg@cray.com> |
Use empty() instead of comparing size() with zero.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46514 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
cheduleDAG.cpp
cheduleDAGList.cpp
cheduleDAGRRList.cpp
electionDAG.cpp
|
| 9f65c39f806186e1bbe1c9e4b670d198c69a81c1 |
29-Jan-2008 |
Dan Gohman <gohman@apple.com> |
Fix a typo in a comment.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46513 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGRRList.cpp
|
| e490176fcdd23a72fffaafe08c96c00dab7610a3 |
29-Jan-2008 |
Dan Gohman <djg@cray.com> |
Fix a typo in a comment.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46513 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGRRList.cpp
|
| 6ee9661390849bd9564cda38bfbe563ec255c419 |
29-Jan-2008 |
Dan Gohman <gohman@apple.com> |
Fix a typo in a comment.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46508 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGRRList.cpp
|
| 3cd20f8d8b51c78018c20f2c6788065de13f48d7 |
29-Jan-2008 |
Dan Gohman <djg@cray.com> |
Fix a typo in a comment.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46508 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGRRList.cpp
|
| 55030dc460ff43f382abcc977b3e45bab7d87826 |
29-Jan-2008 |
Nate Begeman <natebegeman@mac.com> |
Properly expand extract-element for non-power-of-2 codegen
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46486 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 2b10fde55c58895edce4ae48a8242a6405840ed7 |
29-Jan-2008 |
Nate Begeman <natebegeman@mac.com> |
Properly expand extract-element for non-power-of-2 codegen
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46486 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| ba2a0b960ea4c73d0f81557f63ae2ea126e08905 |
29-Jan-2008 |
Dale Johannesen <dalej@apple.com> |
Handle 'X' constraint in asm's better.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46485 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
argetLowering.cpp
|
| e99fc909ce61423c2e27314675708a323e897d57 |
29-Jan-2008 |
Dale Johannesen <dalej@apple.com> |
Handle 'X' constraint in asm's better.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46485 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
argetLowering.cpp
|
| f32aac3090849fed64906f7bae499b726a51f877 |
28-Jan-2008 |
Chris Lattner <sabre@nondot.org> |
Fix PowerPC/./2007-10-18-PtrArithmetic.ll
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46424 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 336672fc0cfa6162f7e03f8cf1bf0f0c285563a1 |
28-Jan-2008 |
Chris Lattner <sabre@nondot.org> |
Fix PowerPC/./2007-10-18-PtrArithmetic.ll
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46424 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| ee339f4b2ab3e7789f02a714bbd8b1fb9f956467 |
28-Jan-2008 |
Chris Lattner <sabre@nondot.org> |
fix a crash on CodeGen/X86/vector-rem.ll
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46422 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| ce602f570656732a08598f43d6e7e41c01c56823 |
28-Jan-2008 |
Chris Lattner <sabre@nondot.org> |
fix a crash on CodeGen/X86/vector-rem.ll
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46422 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 3bd39d4ca89804e97c93b039f6c2933f514c165c |
27-Jan-2008 |
Chris Lattner <sabre@nondot.org> |
Implement some dag combines that allow doing fneg/fabs/fcopysign in integer
registers if used by a bitconvert or using a bitconvert. This allows us to
avoid constant pool loads and use cheaper integer instructions when the
values come from or end up in integer regs anyway. For example, we now
compile CodeGen/X86/fp-in-intregs.ll to:
_test1:
movl $2147483648, %eax
xorl 4(%esp), %eax
ret
_test2:
movl $1065353216, %eax
orl 4(%esp), %eax
andl $3212836864, %eax
ret
Instead of:
_test1:
movss 4(%esp), %xmm0
xorps LCPI2_0, %xmm0
movd %xmm0, %eax
ret
_test2:
movss 4(%esp), %xmm0
andps LCPI3_0, %xmm0
movss LCPI3_1, %xmm1
andps LCPI3_2, %xmm1
orps %xmm0, %xmm1
movd %xmm1, %eax
ret
bitconverts can happen due to various calling conventions that require
fp values to passed in integer regs in some cases, e.g. when returning
a complex.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46414 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| ef26cbc5c359373f39f7bb55df4fc10a89772539 |
27-Jan-2008 |
Chris Lattner <sabre@nondot.org> |
Implement some dag combines that allow doing fneg/fabs/fcopysign in integer
registers if used by a bitconvert or using a bitconvert. This allows us to
avoid constant pool loads and use cheaper integer instructions when the
values come from or end up in integer regs anyway. For example, we now
compile CodeGen/X86/fp-in-intregs.ll to:
_test1:
movl $2147483648, %eax
xorl 4(%esp), %eax
ret
_test2:
movl $1065353216, %eax
orl 4(%esp), %eax
andl $3212836864, %eax
ret
Instead of:
_test1:
movss 4(%esp), %xmm0
xorps LCPI2_0, %xmm0
movd %xmm0, %eax
ret
_test2:
movss 4(%esp), %xmm0
andps LCPI3_0, %xmm0
movss LCPI3_1, %xmm1
andps LCPI3_2, %xmm1
orps %xmm0, %xmm1
movd %xmm1, %eax
ret
bitconverts can happen due to various calling conventions that require
fp values to passed in integer regs in some cases, e.g. when returning
a complex.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46414 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 1329cb8d8992c34365fcc2ac0447356708157dfb |
26-Jan-2008 |
Chris Lattner <sabre@nondot.org> |
Infer alignment of loads and increase their alignment when we can tell they are
from the stack. This allows us to compile stack-align.ll to:
_test:
movsd LCPI1_0, %xmm0
movapd %xmm0, %xmm1
*** andpd 4(%esp), %xmm1
andpd _G, %xmm0
addsd %xmm1, %xmm0
movl 20(%esp), %eax
movsd %xmm0, (%eax)
ret
instead of:
_test:
movsd LCPI1_0, %xmm0
** movsd 4(%esp), %xmm1
** andpd %xmm0, %xmm1
andpd _G, %xmm0
addsd %xmm1, %xmm0
movl 20(%esp), %eax
movsd %xmm0, (%eax)
ret
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46401 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 1e3362f68ef7d05aa31fc8865291cd834add1cc6 |
26-Jan-2008 |
Chris Lattner <sabre@nondot.org> |
Infer alignment of loads and increase their alignment when we can tell they are
from the stack. This allows us to compile stack-align.ll to:
_test:
movsd LCPI1_0, %xmm0
movapd %xmm0, %xmm1
*** andpd 4(%esp), %xmm1
andpd _G, %xmm0
addsd %xmm1, %xmm0
movl 20(%esp), %eax
movsd %xmm0, (%eax)
ret
instead of:
_test:
movsd LCPI1_0, %xmm0
** movsd 4(%esp), %xmm1
** andpd %xmm0, %xmm1
andpd _G, %xmm0
addsd %xmm1, %xmm0
movl 20(%esp), %eax
movsd %xmm0, (%eax)
ret
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46401 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 5eee427594c87a037a108047b3cd39c14f724752 |
26-Jan-2008 |
Chris Lattner <sabre@nondot.org> |
Fix some bugs in SimplifyNodeWithTwoResults where it would call deletenode to
delete a node even if it was not dead in some cases. Instead, just add it to
the worklist. Also, make sure to use the CombineTo methods, as it was doing
things that were unsafe: the top level combine loop could touch dangling memory.
This fixes CodeGen/Generic/2008-01-25-dag-combine-mul.ll
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46384 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 4a7c84596446d1027621302b1e5b616943a1d034 |
26-Jan-2008 |
Chris Lattner <sabre@nondot.org> |
Fix some bugs in SimplifyNodeWithTwoResults where it would call deletenode to
delete a node even if it was not dead in some cases. Instead, just add it to
the worklist. Also, make sure to use the CombineTo methods, as it was doing
things that were unsafe: the top level combine loop could touch dangling memory.
This fixes CodeGen/Generic/2008-01-25-dag-combine-mul.ll
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46384 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 9967c15183e023b7cf59b094d69530ffeca1aa0f |
26-Jan-2008 |
Chris Lattner <sabre@nondot.org> |
don't bother making x&-1 only to simplify it in dag combine. This commonly occurs expanding i64 ops.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46383 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 8aa8a5ed27e9146cb3e601a9cdf0ed481893116d |
26-Jan-2008 |
Chris Lattner <sabre@nondot.org> |
don't bother making x&-1 only to simplify it in dag combine. This commonly occurs expanding i64 ops.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46383 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 50d8e491a2c044efb9f7b5c0c223d29ea2dbf6cd |
26-Jan-2008 |
Chris Lattner <sabre@nondot.org> |
reduce indentation
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46377 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 20e5390238ef213139bf402ba5bb484c8d4ed9b4 |
26-Jan-2008 |
Chris Lattner <sabre@nondot.org> |
reduce indentation
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46377 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 5bab78527a946632cd9614daa0b9a82ee7b5e1cc |
25-Jan-2008 |
Chris Lattner <sabre@nondot.org> |
fix long lines.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46355 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 2f69f133a833ce9df1c3a5c30be84269962bbbf6 |
25-Jan-2008 |
Chris Lattner <sabre@nondot.org> |
fix long lines.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46355 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 00161a63dda71714df312661ceed0a318ed8b266 |
25-Jan-2008 |
Chris Lattner <sabre@nondot.org> |
Add skeletal code to increase the alignment of loads and stores when
we can infer it. This will eventually help stuff, though it doesn't
do much right now because all fixed FI's have an alignment of 1.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46349 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 4e137af8b58c1a5b517baa524c81bdaf413f13eb |
25-Jan-2008 |
Chris Lattner <sabre@nondot.org> |
Add skeletal code to increase the alignment of loads and stores when
we can infer it. This will eventually help stuff, though it doesn't
do much right now because all fixed FI's have an alignment of 1.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46349 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 94ffc7eb4679df854266602eabcac906b22df8aa |
25-Jan-2008 |
Chris Lattner <sabre@nondot.org> |
include alignment and volatility information in -view-*-dags output
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46347 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGPrinter.cpp
|
| 35165f10a78c17485bcf73f87f96c2b61c972509 |
25-Jan-2008 |
Chris Lattner <sabre@nondot.org> |
include alignment and volatility information in -view-*-dags output
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46347 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGPrinter.cpp
|
| 23e202dee012011a25b3b309d3c05d1915767773 |
24-Jan-2008 |
Chris Lattner <sabre@nondot.org> |
clarify a comment, thanks Duncan.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46313 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| d2d109ae06abb1386c01a7c0a94d378cc5ca7bc7 |
24-Jan-2008 |
Chris Lattner <sabre@nondot.org> |
clarify a comment, thanks Duncan.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46313 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 125991a1f62db419fc4a504986a998d85fbef699 |
24-Jan-2008 |
Chris Lattner <sabre@nondot.org> |
Fix this buggy transformation. Two observations:
1. we already know the value is dead, so don't bother replacing
it with undef.
2. The very case the comment describes actually makes the load
live which asserts in deletenode. If we do the replacement
and the node becomes live, just treat it as new. This fixes
a failure on X86/2008-01-16-InvalidDAGCombineXform.ll with
some local changes in my tree.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46306 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| bb67c1910f1edb89dd4ab86f740c7cfb2fa9fb48 |
24-Jan-2008 |
Chris Lattner <sabre@nondot.org> |
Fix this buggy transformation. Two observations:
1. we already know the value is dead, so don't bother replacing
it with undef.
2. The very case the comment describes actually makes the load
live which asserts in deletenode. If we do the replacement
and the node becomes live, just treat it as new. This fixes
a failure on X86/2008-01-16-InvalidDAGCombineXform.ll with
some local changes in my tree.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46306 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 20e3d86766a38492b3f6203bf4cf70dd9d187b7b |
24-Jan-2008 |
Chris Lattner <sabre@nondot.org> |
The dag combiner is missing revisiting nodes that it really should, and thus leaving
dead stuff around. This gets fed into the isel pass and causes certain foldings from
happening because nodes have extraneous uses floating around. For example, if we turned
foo(bar(x)) -> baz(x), we sometimes left bar(x) around.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46305 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 2b00822a0f1081c9c41102f6a24aee0397861ce6 |
24-Jan-2008 |
Chris Lattner <sabre@nondot.org> |
The dag combiner is missing revisiting nodes that it really should, and thus leaving
dead stuff around. This gets fed into the isel pass and causes certain foldings from
happening because nodes have extraneous uses floating around. For example, if we turned
foo(bar(x)) -> baz(x), we sometimes left bar(x) around.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46305 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 0aa5e6f3fbde81c0bf0310ab0582420f0eeb7155 |
24-Jan-2008 |
Chris Lattner <sabre@nondot.org> |
fold fp_round(fp_round(x)) -> fp_round(x).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46304 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 7afb85556301e5ece26f4e8edd42fc6abeb831ba |
24-Jan-2008 |
Chris Lattner <sabre@nondot.org> |
fold fp_round(fp_round(x)) -> fp_round(x).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46304 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 3ae054385cfe9f2fcef2d77f26839615b1d3e48b |
24-Jan-2008 |
Evan Cheng <evan.cheng@apple.com> |
Forgot these.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46292 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
argetLowering.cpp
|
| 9b5992a45d2aaba843f4e4ba7a09a487dab1b95e |
24-Jan-2008 |
Evan Cheng <evan.cheng@apple.com> |
Forgot these.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46292 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
argetLowering.cpp
|
| f9c98e650d2795b8edfae8e1560c221029df218b |
23-Jan-2008 |
Duncan Sands <baldrick@free.fr> |
The last pieces needed for loading arbitrary
precision integers. This won't actually work
(and most of the code is dead) unless the new
legalization machinery is turned on. While
there, I rationalized the handling of i1, and
removed some bogus (and unused) sextload patterns.
For i1, this could result in microscopically
better code for some architectures (not X86).
It might also result in worse code if annotating
with AssertZExt nodes turns out to be more harmful
than helpful.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46280 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 082524cde46d15558f6270208e32cea0fe774586 |
23-Jan-2008 |
Duncan Sands <baldrick@free.fr> |
The last pieces needed for loading arbitrary
precision integers. This won't actually work
(and most of the code is dead) unless the new
legalization machinery is turned on. While
there, I rationalized the handling of i1, and
removed some bogus (and unused) sextload patterns.
For i1, this could result in microscopically
better code for some architectures (not X86).
It might also result in worse code if annotating
with AssertZExt nodes turns out to be more harmful
than helpful.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46280 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 8e1f7ac87d75ffc02d2fd363a5a9c6d4c7089daf |
22-Jan-2008 |
Chris Lattner <sabre@nondot.org> |
Simplify SelectionDAG::getNode so that a big switch stmt is not #ifndef
NDEBUG. This is in response to a really nasty bug I introduced that
Dale tracked down, hopefully this won't happen in the future.
Many thanks Dale.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46254 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| cc126e3919b3a5dd975d2198c5271724ca56fa45 |
22-Jan-2008 |
Chris Lattner <sabre@nondot.org> |
Simplify SelectionDAG::getNode so that a big switch stmt is not #ifndef
NDEBUG. This is in response to a really nasty bug I introduced that
Dale tracked down, hopefully this won't happen in the future.
Many thanks Dale.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46254 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 7e857201f387d004571e6058e2ea709163500f38 |
22-Jan-2008 |
Duncan Sands <baldrick@free.fr> |
The final piece needed for storing arbitrary precision
integers. Handle truncstore of a legal type to an unusual
number of bits. Most of this code is not reachable unless
the new legalize infrastructure is turned on.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46249 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 406766651528477d6969ac1309f6d3fee7290a66 |
22-Jan-2008 |
Duncan Sands <baldrick@free.fr> |
The final piece needed for storing arbitrary precision
integers. Handle truncstore of a legal type to an unusual
number of bits. Most of this code is not reachable unless
the new legalize infrastructure is turned on.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46249 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| da9bb3578ed4f57b7e1f5393dfae85ccdf76b4af |
21-Jan-2008 |
Dale Johannesen <dalej@apple.com> |
Move DAG-changing code out of #ifndef NDEBUG.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46204 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| d05b3a1ddbe025ad429a99bc38900635265504a9 |
21-Jan-2008 |
Dale Johannesen <dalej@apple.com> |
Move DAG-changing code out of #ifndef NDEBUG.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46204 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 713ed3f7c0cb788f74af0697fce3c4eafda4178e |
20-Jan-2008 |
Dale Johannesen <dalej@apple.com> |
Do not generate a FP_ROUND of f64 to f64.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46195 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| a0d3608864af5d055696d047cb82f29dca64f670 |
20-Jan-2008 |
Dale Johannesen <dalej@apple.com> |
Do not generate a FP_ROUND of f64 to f64.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46195 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| c9133f97720a36218ddfa6bfbf36ba6e22c011f7 |
18-Jan-2008 |
Chris Lattner <sabre@nondot.org> |
remove extraneous &'s.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46171 91177308-0d34-0410-b5e6-96231b3b80d8
argetLowering.cpp
|
| 0d551f3e09117788205c92667ba3b17aa108db3f |
18-Jan-2008 |
Chris Lattner <sabre@nondot.org> |
remove extraneous &'s.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46171 91177308-0d34-0410-b5e6-96231b3b80d8
argetLowering.cpp
|
| ddf89566a93081cb230bb9406a72ab2d3eada4a7 |
17-Jan-2008 |
Chris Lattner <sabre@nondot.org> |
This commit changes:
1. Legalize now always promotes truncstore of i1 to i8.
2. Remove patterns and gunk related to truncstore i1 from targets.
3. Rename the StoreXAction stuff to TruncStoreAction in TLI.
4. Make the TLI TruncStoreAction table a 2d table to handle from/to conversions.
5. Mark a wide variety of invalid truncstores as such in various targets, e.g.
X86 currently doesn't support truncstore of any of its integer types.
6. Add legalize support for truncstores with invalid value input types.
7. Add a dag combine transform to turn store(truncate) into truncstore when
safe.
The later allows us to compile CodeGen/X86/storetrunc-fp.ll to:
_foo:
fldt 20(%esp)
fldt 4(%esp)
faddp %st(1)
movl 36(%esp), %eax
fstps (%eax)
ret
instead of:
_foo:
subl $4, %esp
fldt 24(%esp)
fldt 8(%esp)
faddp %st(1)
fstps (%esp)
movl 40(%esp), %eax
movss (%esp), %xmm0
movss %xmm0, (%eax)
addl $4, %esp
ret
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46140 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
egalizeDAG.cpp
argetLowering.cpp
|
| 3bc0850bd4beeec5b464fce8513d3c749ee413eb |
17-Jan-2008 |
Chris Lattner <sabre@nondot.org> |
This commit changes:
1. Legalize now always promotes truncstore of i1 to i8.
2. Remove patterns and gunk related to truncstore i1 from targets.
3. Rename the StoreXAction stuff to TruncStoreAction in TLI.
4. Make the TLI TruncStoreAction table a 2d table to handle from/to conversions.
5. Mark a wide variety of invalid truncstores as such in various targets, e.g.
X86 currently doesn't support truncstore of any of its integer types.
6. Add legalize support for truncstores with invalid value input types.
7. Add a dag combine transform to turn store(truncate) into truncstore when
safe.
The later allows us to compile CodeGen/X86/storetrunc-fp.ll to:
_foo:
fldt 20(%esp)
fldt 4(%esp)
faddp %st(1)
movl 36(%esp), %eax
fstps (%eax)
ret
instead of:
_foo:
subl $4, %esp
fldt 24(%esp)
fldt 8(%esp)
faddp %st(1)
fstps (%esp)
movl 40(%esp), %eax
movss (%esp), %xmm0
movss %xmm0, (%eax)
addl $4, %esp
ret
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46140 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
egalizeDAG.cpp
argetLowering.cpp
|
| 4626b250a2a83fbd055dde70629cf0b89356e1d3 |
17-Jan-2008 |
Chris Lattner <sabre@nondot.org> |
code cleanups, no functionality change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46126 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 667f9c162d69a757cd32cd522276afb9eba25740 |
17-Jan-2008 |
Chris Lattner <sabre@nondot.org> |
code cleanups, no functionality change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46126 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 0bd4893a0726889b942405262e53d06cf3fe3be8 |
17-Jan-2008 |
Chris Lattner <sabre@nondot.org> |
* Introduce a new SelectionDAG::getIntPtrConstant method
and switch various codegen pieces and the X86 backend over
to using it.
* Add some comments to SelectionDAGNodes.h
* Introduce a second argument to FP_ROUND, which indicates
whether the FP_ROUND changes the value of its input. If
not it is safe to xform things like fp_extend(fp_round(x)) -> x.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46125 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
egalizeDAG.cpp
egalizeTypes.h
egalizeTypesExpand.cpp
egalizeTypesPromote.cpp
egalizeTypesSplit.cpp
electionDAG.cpp
electionDAGISel.cpp
|
| 5872a361d5332fddcdb89c6df684243c19a75f88 |
17-Jan-2008 |
Chris Lattner <sabre@nondot.org> |
* Introduce a new SelectionDAG::getIntPtrConstant method
and switch various codegen pieces and the X86 backend over
to using it.
* Add some comments to SelectionDAGNodes.h
* Introduce a second argument to FP_ROUND, which indicates
whether the FP_ROUND changes the value of its input. If
not it is safe to xform things like fp_extend(fp_round(x)) -> x.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46125 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
egalizeDAG.cpp
egalizeTypes.h
egalizeTypesExpand.cpp
egalizeTypesPromote.cpp
egalizeTypesSplit.cpp
electionDAG.cpp
electionDAGISel.cpp
|
| 02c42856431562376ac8280b57ad744ba83f1e38 |
17-Jan-2008 |
Evan Cheng <evan.cheng@apple.com> |
Fixes a nasty dag combiner bug that causes a bunch of tests to fail at -O0.
It's not safe to use the two value CombineTo variant to combine away a dead load.
e.g.
v1, chain2 = load chain1, loc
v2, chain3 = load chain2, loc
v3 = add v2, c
Now we replace use of v1 with undef, use of chain2 with chain1.
ReplaceAllUsesWith() will iterate through uses of the first load and update operands:
v1, chain2 = load chain1, loc
v2, chain3 = load chain1, loc
v3 = add v2, c
Now the second load is the same as the first load, SelectionDAG cse will ensure
the use of second load is replaced with the first load.
v1, chain2 = load chain1, loc
v3 = add v1, c
Then v1 is replaced with undef and bad things happen.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46099 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| e8b886aa842369e1e1d5ab25c16e05690adbaa33 |
17-Jan-2008 |
Evan Cheng <evan.cheng@apple.com> |
Fixes a nasty dag combiner bug that causes a bunch of tests to fail at -O0.
It's not safe to use the two value CombineTo variant to combine away a dead load.
e.g.
v1, chain2 = load chain1, loc
v2, chain3 = load chain2, loc
v3 = add v2, c
Now we replace use of v1 with undef, use of chain2 with chain1.
ReplaceAllUsesWith() will iterate through uses of the first load and update operands:
v1, chain2 = load chain1, loc
v2, chain3 = load chain1, loc
v3 = add v2, c
Now the second load is the same as the first load, SelectionDAG cse will ensure
the use of second load is replaced with the first load.
v1, chain2 = load chain1, loc
v3 = add v1, c
Then v1 is replaced with undef and bad things happen.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46099 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 7e2e033e232a3e414040d6b01c8c07a1095a0983 |
16-Jan-2008 |
Chris Lattner <sabre@nondot.org> |
Fix a ppc long double regression I introduced yesterday due to a
simplification. This fixes automotive-basicmath on PPC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46072 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| d3f561794425f7cfc7198ffaf988d6a6c1228494 |
16-Jan-2008 |
Chris Lattner <sabre@nondot.org> |
Fix a ppc long double regression I introduced yesterday due to a
simplification. This fixes automotive-basicmath on PPC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46072 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| a66bb39e9779ce17b7d16e311f4b73fddb2ede2f |
16-Jan-2008 |
Chris Lattner <sabre@nondot.org> |
merge a few pieces of code that do the store/load to stack
pattern to use EmitStackConvert now.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46066 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 59370bdbbcd43e7df61c89a4c2e5c27f15144c71 |
16-Jan-2008 |
Chris Lattner <sabre@nondot.org> |
merge a few pieces of code that do the store/load to stack
pattern to use EmitStackConvert now.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46066 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 1401d15c99b284ead81b8476a6db95328c5f28fd |
16-Jan-2008 |
Chris Lattner <sabre@nondot.org> |
rename ExpandBIT_CONVERT to EmitStackConvert, generalizing
it to allow it to emit different load and store kinds.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46065 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| b7d0aaa66da2a687078b5c566f882a42c97d4e9c |
16-Jan-2008 |
Chris Lattner <sabre@nondot.org> |
rename ExpandBIT_CONVERT to EmitStackConvert, generalizing
it to allow it to emit different load and store kinds.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46065 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 23594d4537fb88a963c6d6993af5027eac9bfbac |
16-Jan-2008 |
Chris Lattner <sabre@nondot.org> |
simplify a bunch of code by using SelectionDAG::CreateStackTemporary
instead of inlining its body.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46062 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 0aeb1d0ef531737591967237caca2e5fc9208c78 |
16-Jan-2008 |
Chris Lattner <sabre@nondot.org> |
simplify a bunch of code by using SelectionDAG::CreateStackTemporary
instead of inlining its body.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46062 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| f2670a89a7c5e29e7f71ab63e06e75dbf482c55b |
16-Jan-2008 |
Chris Lattner <sabre@nondot.org> |
Change legalizeop of FP_ROUND and FP_EXTEND to not fall through
into the ANY_EXTEND/ZERO_EXTEND/SIGN_EXTEND code to simplify it.
Unmerge the code for FP_ROUND and FP_EXTEND from each other to
make each one simpler.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46061 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 56ecde3901481957a5503a991bffde7232cd3443 |
16-Jan-2008 |
Chris Lattner <sabre@nondot.org> |
Change legalizeop of FP_ROUND and FP_EXTEND to not fall through
into the ANY_EXTEND/ZERO_EXTEND/SIGN_EXTEND code to simplify it.
Unmerge the code for FP_ROUND and FP_EXTEND from each other to
make each one simpler.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46061 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 572dee71af1313e6742e1dfd5274fff326b9ef1c |
16-Jan-2008 |
Chris Lattner <sabre@nondot.org> |
Factor the ReachesChainWithoutSideEffects out of dag combiner into
a public SDOperand::reachesChainWithoutSideEffects method. No
functionality change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46050 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
electionDAG.cpp
|
| 10d94f95f8be674d9511d0de1e0fcc2066607fee |
16-Jan-2008 |
Chris Lattner <sabre@nondot.org> |
Factor the ReachesChainWithoutSideEffects out of dag combiner into
a public SDOperand::reachesChainWithoutSideEffects method. No
functionality change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46050 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
electionDAG.cpp
|
| 034f12ea0864a9cca0a74715d6fb06a8bf1dc775 |
15-Jan-2008 |
Chris Lattner <sabre@nondot.org> |
The type of the 'abort' node should be pointer type (because
it's a function pointer) not MVT::Other. This fixes builtin_trap
lowering on ppc, alpha, ia64
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46018 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 88e0393bbca8a345eea56554b5585bcd80353919 |
15-Jan-2008 |
Chris Lattner <sabre@nondot.org> |
The type of the 'abort' node should be pointer type (because
it's a function pointer) not MVT::Other. This fixes builtin_trap
lowering on ppc, alpha, ia64
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46018 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 41bab0beac2600701af99f63e23a6b65f71468ac |
15-Jan-2008 |
Chris Lattner <sabre@nondot.org> |
Add support for targets that have a legal ISD::TRAP.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46014 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
argetLowering.cpp
|
| e99bbb7f959c42420bef8fce973247d4f104cd47 |
15-Jan-2008 |
Chris Lattner <sabre@nondot.org> |
Add support for targets that have a legal ISD::TRAP.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46014 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
argetLowering.cpp
|
| 4c46fc6bbf206a59b1b46d8b1af43896a4675c65 |
15-Jan-2008 |
Evan Cheng <evan.cheng@apple.com> |
Oops. Forgot to commit this.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46002 91177308-0d34-0410-b5e6-96231b3b80d8
allingConvLower.cpp
|
| fe2be6395e6ef27ba7c20fbb99cc9b5b248846c3 |
15-Jan-2008 |
Evan Cheng <evan.cheng@apple.com> |
Oops. Forgot to commit this.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46002 91177308-0d34-0410-b5e6-96231b3b80d8
allingConvLower.cpp
|
| 66fac79b899904ddd82e5ee354a6d370d80230f6 |
15-Jan-2008 |
Anton Korobeynikov <asl@math.spbu.ru> |
For PR1839: add initial support for __builtin_trap. llvm-gcc part is missed
as well as PPC codegen
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46001 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
electionDAG.cpp
electionDAGISel.cpp
|
| 39d40baea8a6d421568d50aa9655840683bb4651 |
15-Jan-2008 |
Anton Korobeynikov <asl@math.spbu.ru> |
For PR1839: add initial support for __builtin_trap. llvm-gcc part is missed
as well as PPC codegen
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46001 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
electionDAG.cpp
electionDAGISel.cpp
|
| c67e6e8e8203be62da647832842edd7d90c4c585 |
15-Jan-2008 |
Evan Cheng <evan.cheng@apple.com> |
ByVal stack slot alignment should be at least as large as pointer ABI alignment.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45995 91177308-0d34-0410-b5e6-96231b3b80d8
allingConvLower.cpp
|
| 25098bf8816f02edde4b0c47f70dabcc61bcc067 |
15-Jan-2008 |
Evan Cheng <evan.cheng@apple.com> |
ByVal stack slot alignment should be at least as large as pointer ABI alignment.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45995 91177308-0d34-0410-b5e6-96231b3b80d8
allingConvLower.cpp
|
| a41d7198035bdeaa3ba0a5840086d34ebcddac26 |
13-Jan-2008 |
Duncan Sands <baldrick@free.fr> |
Remove the assumption that byval has been applied to
a pointer to a struct.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45939 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 8b98c4db07a7e27cd2f380e2e05b54446f4a5aa4 |
13-Jan-2008 |
Duncan Sands <baldrick@free.fr> |
Remove the assumption that byval has been applied to
a pointer to a struct.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45939 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 007f9847c44ddbe7fd04cba362b4ec0f0f40964b |
10-Jan-2008 |
Duncan Sands <baldrick@free.fr> |
Output sinl for a long double FSIN node, not sin.
Likewise fix up a bunch of other libcalls. While
there I remove NEG_F32 and NEG_F64 since they are
not used anywhere. This fixes 9 Ada ACATS failures.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45833 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
argetLowering.cpp
|
| 37a3f478f1c3080d8dcb0b4ae561c716e9969eef |
10-Jan-2008 |
Duncan Sands <baldrick@free.fr> |
Output sinl for a long double FSIN node, not sin.
Likewise fix up a bunch of other libcalls. While
there I remove NEG_F32 and NEG_F64 since they are
not used anywhere. This fixes 9 Ada ACATS failures.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45833 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
argetLowering.cpp
|
| 19107563af7568713193c60be24503446556bff2 |
10-Jan-2008 |
Evan Cheng <evan.cheng@apple.com> |
Special copy SUnit's do not have SDNode's.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45787 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGRRList.cpp
|
| 2661f5aafb9f867355f873de16204552a506d5b6 |
10-Jan-2008 |
Evan Cheng <evan.cheng@apple.com> |
Special copy SUnit's do not have SDNode's.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45787 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGRRList.cpp
|
| 07649d9265c9a378fe753f80601ae5f4de3312dc |
09-Jan-2008 |
Chris Lattner <sabre@nondot.org> |
Make load->store deletion a bit smarter. This allows us to compile this:
void test(long long *P) { *P ^= 1; }
into just:
_test:
movl 4(%esp), %eax
xorl $1, (%eax)
ret
instead of code like this:
_test:
movl 4(%esp), %ecx
xorl $1, (%ecx)
movl 4(%ecx), %edx
movl %edx, 4(%ecx)
ret
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45762 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 2e0237787dc14f4d8938dc58cf4723ce9e151003 |
09-Jan-2008 |
Chris Lattner <sabre@nondot.org> |
Make load->store deletion a bit smarter. This allows us to compile this:
void test(long long *P) { *P ^= 1; }
into just:
_test:
movl 4(%esp), %eax
xorl $1, (%eax)
ret
instead of code like this:
_test:
movl 4(%esp), %ecx
xorl $1, (%ecx)
movl 4(%ecx), %edx
movl %edx, 4(%ecx)
ret
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45762 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 749c6f6b5ed301c84aac562e414486549d7b98eb |
07-Jan-2008 |
Chris Lattner <sabre@nondot.org> |
rename TargetInstrDescriptor -> TargetInstrDesc.
Make MachineInstr::getDesc return a reference instead
of a pointer, since it can never be null.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45695 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAG.cpp
cheduleDAGRRList.cpp
|
| 5b930374090970d785c0f77c2afc6d0a24c01f39 |
07-Jan-2008 |
Chris Lattner <sabre@nondot.org> |
rename TargetInstrDescriptor -> TargetInstrDesc.
Make MachineInstr::getDesc return a reference instead
of a pointer, since it can never be null.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45695 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAG.cpp
cheduleDAGRRList.cpp
|
| 3db805ea80eeec9084a1b86273d93804d233d938 |
07-Jan-2008 |
Chris Lattner <sabre@nondot.org> |
simplify some code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45693 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGRRList.cpp
|
| d16b431d3a20c1913f433a847afe36e0ea392d84 |
07-Jan-2008 |
Chris Lattner <sabre@nondot.org> |
simplify some code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45693 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGRRList.cpp
|
| 0ff23966feb90618bec4d085095ffbc28426e691 |
07-Jan-2008 |
Chris Lattner <sabre@nondot.org> |
Rename all the M_* flags to be namespace qualified enums, and switch
all clients over to using predicates instead of these flags directly.
These are now private values which are only to be used to statically
initialize the tables.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45692 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAG.cpp
cheduleDAGRRList.cpp
|
| d8529abca155e9add3d038481c9c7db119220a2b |
07-Jan-2008 |
Chris Lattner <sabre@nondot.org> |
Rename all the M_* flags to be namespace qualified enums, and switch
all clients over to using predicates instead of these flags directly.
These are now private values which are only to be used to statically
initialize the tables.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45692 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAG.cpp
cheduleDAGRRList.cpp
|
| e32d765f99f7ee0b8f50e419a2e1beb41003c99f |
07-Jan-2008 |
Chris Lattner <sabre@nondot.org> |
add more and significantly better comments to the rest of the machineinstr
flags that can be set. Add predicates for the ones lacking it, and switch
some clients over to using the predicates instead of Flags directly.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45690 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAG.cpp
|
| d6bfd8a3783ab30372c557510b6217a40945a79c |
07-Jan-2008 |
Chris Lattner <sabre@nondot.org> |
add more and significantly better comments to the rest of the machineinstr
flags that can be set. Add predicates for the ones lacking it, and switch
some clients over to using the predicates instead of Flags directly.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45690 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAG.cpp
|
| 8f707e15fbd09ca948b86419bcb0c92470827ac9 |
07-Jan-2008 |
Chris Lattner <sabre@nondot.org> |
rename hasVariableOperands() -> isVariadic(). Add some comments.
Evan, please review the comments I added to getNumDefs to make sure
that they are accurate, thx.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45687 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAG.cpp
|
| 2fb37c02f194e3dc9a9804dc7860701c072ea052 |
07-Jan-2008 |
Chris Lattner <sabre@nondot.org> |
rename hasVariableOperands() -> isVariadic(). Add some comments.
Evan, please review the comments I added to getNumDefs to make sure
that they are accurate, thx.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45687 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAG.cpp
|
| 349c4952009525b27383e2120a6b3c998f39bd09 |
07-Jan-2008 |
Chris Lattner <sabre@nondot.org> |
Move a bunch more accessors from TargetInstrInfo to TargetInstrDescriptor
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45680 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAG.cpp
cheduleDAGRRList.cpp
electionDAG.cpp
|
| 0c2a4f39ad5cdb32a2c4e20f787798d8af645393 |
07-Jan-2008 |
Chris Lattner <sabre@nondot.org> |
Move a bunch more accessors from TargetInstrInfo to TargetInstrDescriptor
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45680 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAG.cpp
cheduleDAGRRList.cpp
electionDAG.cpp
|
| ba6da5d5b72618c836ebc3a7613583a16bc8ceac |
07-Jan-2008 |
Chris Lattner <sabre@nondot.org> |
remove some uses of MachineOpCode, move getSchedClass
into TargetInstrDescriptor from TargetInstrInfo.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45678 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAG.cpp
|
| 3d54fcd67cddee78cd124515cf521da8ab74abcf |
07-Jan-2008 |
Chris Lattner <sabre@nondot.org> |
remove some uses of MachineOpCode, move getSchedClass
into TargetInstrDescriptor from TargetInstrInfo.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45678 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAG.cpp
|
| 8ca5c67c6e95fdcf5ddb2f06586873c843dd0cde |
07-Jan-2008 |
Chris Lattner <sabre@nondot.org> |
Add predicates methods to TargetOperandInfo, and switch all clients
over to using them, instead of diddling Flags directly. Change the
various flags from const variables to enums.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45677 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAG.cpp
|
| eeedb48603a82c7000532a395daa5212427d8c8d |
07-Jan-2008 |
Chris Lattner <sabre@nondot.org> |
Add predicates methods to TargetOperandInfo, and switch all clients
over to using them, instead of diddling Flags directly. Change the
various flags from const variables to enums.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45677 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAG.cpp
|
| 69244300b8a0112efb44b6273ecea4ca6264b8cf |
07-Jan-2008 |
Chris Lattner <sabre@nondot.org> |
Rename MachineInstr::getInstrDescriptor -> getDesc(), which reflects
that it is cheap and efficient to get.
Move a variety of predicates from TargetInstrInfo into
TargetInstrDescriptor, which makes it much easier to query a predicate
when you don't have TII around. Now you can use MI->getDesc()->isBranch()
instead of going through TII, and this is much more efficient anyway. Not
all of the predicates have been moved over yet.
Update old code that used MI->getInstrDescriptor()->Flags to use the
new predicates in many places.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45674 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAG.cpp
|
| 6232760ee0d566bcf09b2f20bae65c1d6e73946c |
07-Jan-2008 |
Chris Lattner <sabre@nondot.org> |
Rename MachineInstr::getInstrDescriptor -> getDesc(), which reflects
that it is cheap and efficient to get.
Move a variety of predicates from TargetInstrInfo into
TargetInstrDescriptor, which makes it much easier to query a predicate
when you don't have TII around. Now you can use MI->getDesc()->isBranch()
instead of going through TII, and this is much more efficient anyway. Not
all of the predicates have been moved over yet.
Update old code that used MI->getInstrDescriptor()->Flags to use the
new predicates in many places.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45674 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAG.cpp
|
| 6425f8be7263e625c2d7484eb2fb8f6643824f49 |
07-Jan-2008 |
Owen Anderson <resistor@mac.com> |
Update CodeGen for MRegisterInfo --> TargetInstrInfo changes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45673 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGRRList.cpp
|
| bf15ae2d5bc058fac01b0480433907481e47d7a9 |
07-Jan-2008 |
Owen Anderson <resistor@mac.com> |
Update CodeGen for MRegisterInfo --> TargetInstrInfo changes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45673 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGRRList.cpp
|
| ce2247755e56f99a2377b64a1a9d393726582b85 |
07-Jan-2008 |
Gordon Henriksen <gordonhenriksen@mac.com> |
Enabling the target-independent garbage collection infrastructure by hooking it
up to the various compiler pipelines.
This doesn't actually add support for any GC algorithms, which means it
temporarily breaks a few tests. To be fixed shortly.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45669 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| df87fdce8ab5371dd29aca057cbca22924840166 |
07-Jan-2008 |
Gordon Henriksen <gordonhenriksen@mac.com> |
Enabling the target-independent garbage collection infrastructure by hooking it
up to the various compiler pipelines.
This doesn't actually add support for any GC algorithms, which means it
temporarily breaks a few tests. To be fixed shortly.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45669 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 2281a991414f681c482157265461b29a923ef620 |
05-Jan-2008 |
Nate Begeman <natebegeman@mac.com> |
If custom lowering of insert element fails, the result Val will be 0.
Don't overwrite a variable used by the fallthrough code path in this
case.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45630 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 11f2e1dd26a13838a9f9e3b0b288969acacdb763 |
05-Jan-2008 |
Nate Begeman <natebegeman@mac.com> |
If custom lowering of insert element fails, the result Val will be 0.
Don't overwrite a variable used by the fallthrough code path in this
case.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45630 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| b027fa001f16660a231a54ecea6a79f5c7855d7c |
31-Dec-2007 |
Duncan Sands <baldrick@free.fr> |
Fix PR1833 - eh.exception and eh.selector return two
values, which means doing extra legalization work.
It would be easier to get this kind of thing right if
there was some documentation...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45472 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| c7f7d5e7c86e86b9fa99735f4bac646e74764810 |
31-Dec-2007 |
Duncan Sands <baldrick@free.fr> |
Fix PR1833 - eh.exception and eh.selector return two
values, which means doing extra legalization work.
It would be easier to get this kind of thing right if
there was some documentation...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45472 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| d10fd9791c20fd8368fa0ce94b626b769c6c8ba0 |
31-Dec-2007 |
Owen Anderson <resistor@mac.com> |
Move copyRegToReg from MRegisterInfo to TargetInstrInfo. This is part of the
Machine-level API cleanup instigated by Chris.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45470 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAG.cpp
|
| 8f2c893c01f61e358637d28c3b594a9310872d38 |
31-Dec-2007 |
Owen Anderson <resistor@mac.com> |
Move copyRegToReg from MRegisterInfo to TargetInstrInfo. This is part of the
Machine-level API cleanup instigated by Chris.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45470 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAG.cpp
|
| 534bcfb270d25d2a29759d19981443fee7260e94 |
31-Dec-2007 |
Chris Lattner <sabre@nondot.org> |
update a couple of references to SSARegMap.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45468 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAG.cpp
|
| b70e15149601396707d0727ece3a5b836bea6ffb |
31-Dec-2007 |
Chris Lattner <sabre@nondot.org> |
update a couple of references to SSARegMap.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45468 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAG.cpp
|
| 84bc5427d6883f73cfeae3da640acd011d35c006 |
31-Dec-2007 |
Chris Lattner <sabre@nondot.org> |
Rename SSARegMap -> MachineRegisterInfo in keeping with the idea
that "machine" classes are used to represent the current state of
the code being compiled. Given this expanded name, we can start
moving other stuff into it. For now, move the UsedPhysRegs and
LiveIn/LoveOuts vectors from MachineFunction into it.
Update all the clients to match.
This also reduces some needless #includes, such as MachineModuleInfo
from MachineFunction.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45467 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
cheduleDAG.cpp
cheduleDAGList.cpp
cheduleDAGRRList.cpp
electionDAGISel.cpp
|
| 1b98919de35bee879f414e9b97b38eeb9df287bc |
31-Dec-2007 |
Chris Lattner <sabre@nondot.org> |
Rename SSARegMap -> MachineRegisterInfo in keeping with the idea
that "machine" classes are used to represent the current state of
the code being compiled. Given this expanded name, we can start
moving other stuff into it. For now, move the UsedPhysRegs and
LiveIn/LoveOuts vectors from MachineFunction into it.
Update all the clients to match.
This also reduces some needless #includes, such as MachineModuleInfo
from MachineFunction.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45467 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
cheduleDAG.cpp
cheduleDAGList.cpp
cheduleDAGRRList.cpp
electionDAGISel.cpp
|
| 1c3e1e2ed07597111f0b1b1bb93b8080c96c526b |
30-Dec-2007 |
Chris Lattner <sabre@nondot.org> |
fix typo duncan noticed!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45459 91177308-0d34-0410-b5e6-96231b3b80d8
argetLowering.cpp
|
| 0bcfea01008bc931f5877020d4f3db72638c7c39 |
30-Dec-2007 |
Chris Lattner <sabre@nondot.org> |
fix typo duncan noticed!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45459 91177308-0d34-0410-b5e6-96231b3b80d8
argetLowering.cpp
|
| 9ce2e9d5a07cb3e0176cb32838231243829d67c5 |
30-Dec-2007 |
Chris Lattner <sabre@nondot.org> |
use simplified operand addition methods.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45436 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| e44906f4b91f33feadb5b776ee3579ef4cdccc0d |
30-Dec-2007 |
Chris Lattner <sabre@nondot.org> |
use simplified operand addition methods.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45436 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| fec65d55626d302de8049eea8f3a1338a261dd11 |
30-Dec-2007 |
Chris Lattner <sabre@nondot.org> |
use simplified operand addition methods.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45435 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAG.cpp
|
| 8dfd3127a57701e1570362697771b637530ff212 |
30-Dec-2007 |
Chris Lattner <sabre@nondot.org> |
use simplified operand addition methods.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45435 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAG.cpp
|
| 8019f41c0b7fda031d494e3900eada7d4e494772 |
30-Dec-2007 |
Chris Lattner <sabre@nondot.org> |
Start using the simplified methods for adding operands.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45432 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAG.cpp
|
| 63ab1f2d37f620bb9dde5c7b2a02571604e1055c |
30-Dec-2007 |
Chris Lattner <sabre@nondot.org> |
Start using the simplified methods for adding operands.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45432 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAG.cpp
|
| 4ee451de366474b9c228b4e5fa573795a715216d |
29-Dec-2007 |
Chris Lattner <sabre@nondot.org> |
Remove attribution from file headers, per discussion on llvmdev.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45418 91177308-0d34-0410-b5e6-96231b3b80d8
allingConvLower.cpp
AGCombiner.cpp
egalizeDAG.cpp
egalizeTypes.cpp
egalizeTypes.h
egalizeTypesExpand.cpp
egalizeTypesPromote.cpp
egalizeTypesScalarize.cpp
egalizeTypesSplit.cpp
cheduleDAG.cpp
cheduleDAGList.cpp
cheduleDAGRRList.cpp
electionDAG.cpp
electionDAGISel.cpp
electionDAGPrinter.cpp
argetLowering.cpp
|
| 081ce940e7351e90fff829320b7dc6738a6b3815 |
29-Dec-2007 |
Chris Lattner <sabre@nondot.org> |
Remove attribution from file headers, per discussion on llvmdev.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45418 91177308-0d34-0410-b5e6-96231b3b80d8
allingConvLower.cpp
AGCombiner.cpp
egalizeDAG.cpp
egalizeTypes.cpp
egalizeTypes.h
egalizeTypesExpand.cpp
egalizeTypesPromote.cpp
egalizeTypesScalarize.cpp
egalizeTypesSplit.cpp
cheduleDAG.cpp
cheduleDAGList.cpp
cheduleDAGRRList.cpp
electionDAG.cpp
electionDAGISel.cpp
electionDAGPrinter.cpp
argetLowering.cpp
|
| fc643c5e88c596f217750dd91fcc66488dfed73d |
29-Dec-2007 |
Chris Lattner <sabre@nondot.org> |
remove attribution from lib Makefiles.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45415 91177308-0d34-0410-b5e6-96231b3b80d8
akefile
|
| 80455b86f2c6c56b56f690db3c1fdd3a401f9df3 |
29-Dec-2007 |
Chris Lattner <sabre@nondot.org> |
remove attribution from lib Makefiles.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45415 91177308-0d34-0410-b5e6-96231b3b80d8
akefile
|
| 63079f0757785c5c461bafdd3101ee40aeb717fe |
29-Dec-2007 |
Chris Lattner <sabre@nondot.org> |
Fold comparisons against a constant nan, and optimize ORD/UNORD
comparisons with a constant. This allows us to compile isnan to:
_foo:
fcmpu cr7, f1, f1
mfcr r2
rlwinm r3, r2, 0, 31, 31
blr
instead of:
LCPI1_0: ; float
.space 4
_foo:
lis r2, ha16(LCPI1_0)
lfs f0, lo16(LCPI1_0)(r2)
fcmpu cr7, f1, f0
mfcr r2
rlwinm r3, r2, 0, 31, 31
blr
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45405 91177308-0d34-0410-b5e6-96231b3b80d8
argetLowering.cpp
|
| 4218443a430ae477b64b8edf2a6fd0d88cfe9344 |
29-Dec-2007 |
Chris Lattner <sabre@nondot.org> |
Fold comparisons against a constant nan, and optimize ORD/UNORD
comparisons with a constant. This allows us to compile isnan to:
_foo:
fcmpu cr7, f1, f1
mfcr r2
rlwinm r3, r2, 0, 31, 31
blr
instead of:
LCPI1_0: ; float
.space 4
_foo:
lis r2, ha16(LCPI1_0)
lfs f0, lo16(LCPI1_0)(r2)
fcmpu cr7, f1, f0
mfcr r2
rlwinm r3, r2, 0, 31, 31
blr
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45405 91177308-0d34-0410-b5e6-96231b3b80d8
argetLowering.cpp
|
| b253a8b382824586066a299e1279838f41117e3b |
29-Dec-2007 |
Chris Lattner <sabre@nondot.org> |
make sure not to zap volatile stores, thanks a lot to Dale for noticing this!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45402 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 3d98c49d173bdccb5fc23a73691701af6ef033cc |
29-Dec-2007 |
Chris Lattner <sabre@nondot.org> |
make sure not to zap volatile stores, thanks a lot to Dale for noticing this!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45402 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 5938bef2d259ca7648481ec3fb4cefbdff22458d |
29-Dec-2007 |
Chris Lattner <sabre@nondot.org> |
don't fold fp_round(fp_extend(load)) -> fp_round(extload)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45400 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 6f981fc6b7e7eb555763b21d0f161874475b1869 |
29-Dec-2007 |
Chris Lattner <sabre@nondot.org> |
don't fold fp_round(fp_extend(load)) -> fp_round(extload)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45400 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 3c87285af63bc6d9b93f8eefe46ce9fea063d66c |
29-Dec-2007 |
Chris Lattner <sabre@nondot.org> |
Delete a store whose input is a load from the same pointer:
x = load p
store x -> p
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45398 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 447d8e8978ea81da25e7cac988a57998ce2cba6d |
29-Dec-2007 |
Chris Lattner <sabre@nondot.org> |
Delete a store whose input is a load from the same pointer:
x = load p
store x -> p
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45398 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 2ceb2cfa8e8580a7d080f5c6235ab133b97fb8fb |
22-Dec-2007 |
Chris Lattner <sabre@nondot.org> |
initial code for forming an FGETSIGN node. This is disabled until
legalizer support goes in.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45323 91177308-0d34-0410-b5e6-96231b3b80d8
argetLowering.cpp
|
| 516731f9fd4eb91c18fa8fbecdff33eea3d4837f |
22-Dec-2007 |
Chris Lattner <sabre@nondot.org> |
initial code for forming an FGETSIGN node. This is disabled until
legalizer support goes in.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45323 91177308-0d34-0410-b5e6-96231b3b80d8
argetLowering.cpp
|
| d268a497f916b65efaf9ae7392f81d12d4f95e00 |
22-Dec-2007 |
Chris Lattner <sabre@nondot.org> |
improve support for fgetsign
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45322 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 13f06830c10455e7adbbd55161bf03989b4a06a9 |
22-Dec-2007 |
Chris Lattner <sabre@nondot.org> |
improve support for fgetsign
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45322 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| b16f55f3c82fe72e2ca73f1071db5daaa2124e51 |
22-Dec-2007 |
Chris Lattner <sabre@nondot.org> |
Tell TargetLoweringOpt whether it is running before
or after legalize.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45321 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 2f36eb975c28224cd21bfe7f930271dd64a15bdd |
22-Dec-2007 |
Chris Lattner <sabre@nondot.org> |
Tell TargetLoweringOpt whether it is running before
or after legalize.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45321 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 1a3048bb8e0f3de0b4e56704c15c556c71565f4b |
22-Dec-2007 |
Chris Lattner <sabre@nondot.org> |
Add a new FGETSIGN operation, which defaults to expand on all
targets.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45320 91177308-0d34-0410-b5e6-96231b3b80d8
argetLowering.cpp
|
| db5f7ff22ab5d435e137f48cdd77d57285ae5718 |
22-Dec-2007 |
Chris Lattner <sabre@nondot.org> |
Add a new FGETSIGN operation, which defaults to expand on all
targets.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45320 91177308-0d34-0410-b5e6-96231b3b80d8
argetLowering.cpp
|
| 180c210a1d96a56ae0611d4f8de81e1ada5559eb |
20-Dec-2007 |
Evan Cheng <evan.cheng@apple.com> |
More accurate checks for two-address constraints.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45259 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGRRList.cpp
|
| 08b7f349cd997c04b29d18916e3f9038c5e55d11 |
20-Dec-2007 |
Evan Cheng <evan.cheng@apple.com> |
More accurate checks for two-address constraints.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45259 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGRRList.cpp
|
| d6c0758944b31bb5316b36cad37f4610a77f784d |
20-Dec-2007 |
Evan Cheng <evan.cheng@apple.com> |
Bring back a burr scheduling heuristic that's still needed.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45252 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGRRList.cpp
|
| 7cead1c297f367069a91935694ae50eb5093c25b |
20-Dec-2007 |
Evan Cheng <evan.cheng@apple.com> |
Bring back a burr scheduling heuristic that's still needed.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45252 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGRRList.cpp
|
| 6f74b48862948ebb83c7bf7036a76c9e84543fb4 |
19-Dec-2007 |
Duncan Sands <baldrick@free.fr> |
Simplify LowerCallTo by using a callsite.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45198 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| e9bc9133656455ac559188a17e7b78424ef75934 |
19-Dec-2007 |
Duncan Sands <baldrick@free.fr> |
Simplify LowerCallTo by using a callsite.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45198 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 481dc721c37a3da0b3cc88191d01fe5b523625ee |
19-Dec-2007 |
Duncan Sands <baldrick@free.fr> |
The C++ exception handling personality function wants
to know about calls that cannot throw ('nounwind'):
if such a call does throw for some reason then the
personality will terminate the program. The distinction
between an ordinary call and a nounwind call is that
an ordinary call gets an entry in the exception table
but a nounwind call does not. This patch sets up the
exception table appropriately. One oddity is that
I've chosen to bracket nounwind calls with labels (like
invokes) - the other choice would have been to bracket
ordinary calls with labels. While bracketing
ordinary calls is more natural (because bracketing
by labels would then correspond exactly to getting an
entry in the exception table), I didn't do it because
introducing labels impedes some optimizations and I'm
guessing that ordinary calls occur more often than
nounwind calls. This fixes the gcc filter2 eh test,
at least at -O0 (the inliner needs some tweaking at
higher optimization levels).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45197 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 4ff179f65b51bfbeff381a5d4c38f1b00a1f5e52 |
19-Dec-2007 |
Duncan Sands <baldrick@free.fr> |
The C++ exception handling personality function wants
to know about calls that cannot throw ('nounwind'):
if such a call does throw for some reason then the
personality will terminate the program. The distinction
between an ordinary call and a nounwind call is that
an ordinary call gets an entry in the exception table
but a nounwind call does not. This patch sets up the
exception table appropriately. One oddity is that
I've chosen to bracket nounwind calls with labels (like
invokes) - the other choice would have been to bracket
ordinary calls with labels. While bracketing
ordinary calls is more natural (because bracketing
by labels would then correspond exactly to getting an
entry in the exception table), I didn't do it because
introducing labels impedes some optimizations and I'm
guessing that ordinary calls occur more often than
nounwind calls. This fixes the gcc filter2 eh test,
at least at -O0 (the inliner needs some tweaking at
higher optimization levels).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45197 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 02132d62c1ed55fc0d5e03413c314fffc59489f0 |
19-Dec-2007 |
Evan Cheng <evan.cheng@apple.com> |
Don't leave newly created nodes around if it turns out they are not needed.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45186 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 72b84d0735cd0ab995da3dcac1472ed3e497f97c |
19-Dec-2007 |
Evan Cheng <evan.cheng@apple.com> |
Don't leave newly created nodes around if it turns out they are not needed.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45186 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 636e5a216c8dab7567b5e5d8d1c7d982f507f7eb |
18-Dec-2007 |
Evan Cheng <evan.cheng@apple.com> |
Fix PR1872: SrcValue and SrcValueOffset should not be used to compute load / store node id.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45167 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 38c24dbf709fbc6f0da02f2ed621abebda70858b |
18-Dec-2007 |
Evan Cheng <evan.cheng@apple.com> |
Fix PR1872: SrcValue and SrcValueOffset should not be used to compute load / store node id.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45167 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 81310138619ac46a4eb5ea9a28929c9f5ea8012c |
18-Dec-2007 |
Evan Cheng <evan.cheng@apple.com> |
Also print alignment and volatileness.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45164 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 034c4f82d9316b2674e98abf4dcf38b13aa51924 |
18-Dec-2007 |
Evan Cheng <evan.cheng@apple.com> |
Also print alignment and volatileness.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45164 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| beec823d4bba22b1c0c6658d2b3e71cd64a70e2e |
18-Dec-2007 |
Evan Cheng <evan.cheng@apple.com> |
FIX for PR1799: When a load is unfolded from an instruction, check if it is a new node. If not, do not create a new SUnit.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45157 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGRRList.cpp
|
| 2e03ad02219f50c6001f085c9a7e110f1148fbf5 |
18-Dec-2007 |
Evan Cheng <evan.cheng@apple.com> |
FIX for PR1799: When a load is unfolded from an instruction, check if it is a new node. If not, do not create a new SUnit.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45157 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGRRList.cpp
|
| 88ce93e0efc644e1a27a518d2c26f62a1d9ddb7a |
18-Dec-2007 |
Evan Cheng <evan.cheng@apple.com> |
SelectionDAG::dump() should print SrcValue of LoadSDNode and StoreSDNode.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45151 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 7196a7bf345a8c2ba8f18be10e9394b4e55d6ef3 |
18-Dec-2007 |
Evan Cheng <evan.cheng@apple.com> |
SelectionDAG::dump() should print SrcValue of LoadSDNode and StoreSDNode.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45151 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| fd7b326bea39c077eea8d378156bcf09051cc4ec |
17-Dec-2007 |
Duncan Sands <baldrick@free.fr> |
Make invokes of inline asm legal. Teach codegen
how to lower them (with no attempt made to be
efficient, since they should only occur for
unoptimized code).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45108 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 1c5526cec6518153bbd04821ca59a592f27fc04b |
17-Dec-2007 |
Duncan Sands <baldrick@free.fr> |
Make invokes of inline asm legal. Teach codegen
how to lower them (with no attempt made to be
efficient, since they should only occur for
unoptimized code).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45108 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 7c07aebd19ea07c6219c36c9e96a5d7a6052ba95 |
14-Dec-2007 |
Evan Cheng <evan.cheng@apple.com> |
Bug fix. Must also match ResNo when matching an operand with a user.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45028 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAG.cpp
|
| 4f0345c285f0194616be756b6138d40f810b0984 |
14-Dec-2007 |
Evan Cheng <evan.cheng@apple.com> |
Bug fix. Must also match ResNo when matching an operand with a user.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45028 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAG.cpp
|
| 890813243f9b4f5aa9c6d5ab79ffe948458197ab |
12-Dec-2007 |
Dan Gohman <gohman@apple.com> |
Allow vector integer constants to be created with
SelectionDAG::getConstant, in the same way as vector floating-point
constants. This allows the legalize expansion code for @llvm.ctpop and
friends to be usable with vector types.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@44954 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 5b9d641e6a10c9aee165d2d492a5899dc99057db |
12-Dec-2007 |
Dan Gohman <djg@cray.com> |
Allow vector integer constants to be created with
SelectionDAG::getConstant, in the same way as vector floating-point
constants. This allows the legalize expansion code for @llvm.ctpop and
friends to be usable with vector types.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@44954 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| ce25443608063357247ca7943ff623af43debc77 |
11-Dec-2007 |
Evan Cheng <evan.cheng@apple.com> |
Pretty print shuffle mask operand.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@44837 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| aad43a0c0d71c15f305aa0b80aae13c17098d94a |
11-Dec-2007 |
Evan Cheng <evan.cheng@apple.com> |
Pretty print shuffle mask operand.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@44837 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 46a6e79e602b23ea3478027d5bdd1f904aea7924 |
09-Dec-2007 |
Chris Lattner <sabre@nondot.org> |
Duncan points out that the subtraction is unneeded since hte code
knows the vector is not pow2
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@44740 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeTypesSplit.cpp
|
| 419e907901bf2fe0f73f8a2b22dd9f0708735133 |
09-Dec-2007 |
Chris Lattner <sabre@nondot.org> |
Duncan points out that the subtraction is unneeded since hte code
knows the vector is not pow2
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@44740 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeTypesSplit.cpp
|
| 0097555e01683a0c9a25adef75efa1ed611e1705 |
09-Dec-2007 |
Chris Lattner <sabre@nondot.org> |
Add support for splitting the operand of a return instruction.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@44728 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeTypes.h
egalizeTypesExpand.cpp
egalizeTypesSplit.cpp
|
| ff354112b235304b9751448f0134d8364d7914b2 |
09-Dec-2007 |
Chris Lattner <sabre@nondot.org> |
Add support for splitting the operand of a return instruction.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@44728 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeTypes.h
egalizeTypesExpand.cpp
egalizeTypesSplit.cpp
|
| eeaad40246e45ec48c85acac4ab57e82457abf19 |
09-Dec-2007 |
Chris Lattner <sabre@nondot.org> |
add many new cases to SplitResult. SplitResult now handles all the cases that LegalizeDAG does.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@44726 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeTypes.h
egalizeTypesSplit.cpp
|
| 595c61f303919ac64c758b81fdae1e7487da6447 |
09-Dec-2007 |
Chris Lattner <sabre@nondot.org> |
add many new cases to SplitResult. SplitResult now handles all the cases that LegalizeDAG does.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@44726 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeTypes.h
egalizeTypesSplit.cpp
|
| 50187864c12dbf15f021cacfd6922d9c014f3f8d |
09-Dec-2007 |
Chris Lattner <sabre@nondot.org> |
Implement splitting support for store, allowing us to compile:
%f8 = type <8 x float>
define void @test_f8(%f8* %P, %f8* %Q, %f8* %S) {
%p = load %f8* %P ; <%f8> [#uses=1]
%q = load %f8* %Q ; <%f8> [#uses=1]
%R = add %f8 %p, %q ; <%f8> [#uses=1]
store %f8 %R, %f8* %S
ret void
}
into:
_test_f8:
movaps 16(%rdi), %xmm0
addps 16(%rsi), %xmm0
movaps (%rdi), %xmm1
addps (%rsi), %xmm1
movaps %xmm0, 16(%rdx)
movaps %xmm1, (%rdx)
ret
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@44725 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeTypes.h
egalizeTypesSplit.cpp
|
| 0cd03308ac3d130f80c83dee0efd0fb2c146d5ff |
09-Dec-2007 |
Chris Lattner <sabre@nondot.org> |
Implement splitting support for store, allowing us to compile:
%f8 = type <8 x float>
define void @test_f8(%f8* %P, %f8* %Q, %f8* %S) {
%p = load %f8* %P ; <%f8> [#uses=1]
%q = load %f8* %Q ; <%f8> [#uses=1]
%R = add %f8 %p, %q ; <%f8> [#uses=1]
store %f8 %R, %f8* %S
ret void
}
into:
_test_f8:
movaps 16(%rdi), %xmm0
addps 16(%rsi), %xmm0
movaps (%rdi), %xmm1
addps (%rsi), %xmm1
movaps %xmm0, 16(%rdx)
movaps %xmm1, (%rdx)
ret
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@44725 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeTypes.h
egalizeTypesSplit.cpp
|
| 697b53e0b2278ce39974748074fc23014a6636c5 |
09-Dec-2007 |
Chris Lattner <sabre@nondot.org> |
implement vector splitting of load, undef, and binops.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@44724 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeTypes.h
egalizeTypesSplit.cpp
|
| 8a42aabcfb14c177e270ef42d7fde657bee6e5b0 |
09-Dec-2007 |
Chris Lattner <sabre@nondot.org> |
implement vector splitting of load, undef, and binops.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@44724 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeTypes.h
egalizeTypesSplit.cpp
|
| e4af7b5a573593dcf2a37cd4590bf76d1322d6da |
08-Dec-2007 |
Chris Lattner <sabre@nondot.org> |
implement some methods.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@44723 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeTypes.cpp
egalizeTypes.h
|
| e089eb80bc47def3d8d3ab0b8c52cf0822588929 |
08-Dec-2007 |
Chris Lattner <sabre@nondot.org> |
implement some methods.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@44723 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeTypes.cpp
egalizeTypes.h
|
| 13c6a1740cb8877f10e202ee1442231e0c4a903a |
08-Dec-2007 |
Chris Lattner <sabre@nondot.org> |
add scaffolding for splitting of vectors.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@44722 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeTypes.cpp
egalizeTypes.h
egalizeTypesSplit.cpp
|
| 48c937fc4258ec7c90f37d39939def134ed743b6 |
08-Dec-2007 |
Chris Lattner <sabre@nondot.org> |
add scaffolding for splitting of vectors.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@44722 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeTypes.cpp
egalizeTypes.h
egalizeTypesSplit.cpp
|
| 7514646b3115706ee98452ddbcc7b686f6869ab0 |
08-Dec-2007 |
Chris Lattner <sabre@nondot.org> |
reorganize header to separate into functional blocks.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@44719 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeTypes.h
|
| 24790822d16fd46b91fb1b9531acb744a9bb1cb3 |
08-Dec-2007 |
Chris Lattner <sabre@nondot.org> |
reorganize header to separate into functional blocks.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@44719 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeTypes.h
|
| ee888132754c709de8d2e2c5ef85531a15ed44f2 |
08-Dec-2007 |
Chris Lattner <sabre@nondot.org> |
split scalarization out to its own file.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@44718 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeTypes.cpp
egalizeTypesScalarize.cpp
|
| ec3792d167c6c2bcd33168c64fc66b75b450c554 |
08-Dec-2007 |
Chris Lattner <sabre@nondot.org> |
split scalarization out to its own file.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@44718 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeTypes.cpp
egalizeTypesScalarize.cpp
|
| cc663a8112017f06e0cd4b6fe1546ccfcd5d05c3 |
08-Dec-2007 |
Chris Lattner <sabre@nondot.org> |
Split expansion out into its own file.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@44717 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeTypes.cpp
egalizeTypesExpand.cpp
|
| 47a84c94cf8d740012764697d176f61aef240c42 |
08-Dec-2007 |
Chris Lattner <sabre@nondot.org> |
Split expansion out into its own file.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@44717 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeTypes.cpp
egalizeTypesExpand.cpp
|
| 08d1275cb8137152dbfb13fab361b9b496725124 |
08-Dec-2007 |
Chris Lattner <sabre@nondot.org> |
Split promotion support out to its own file.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@44716 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeTypes.cpp
egalizeTypesPromote.cpp
|
| 145b85957e56b60bdc9be85f1bdf0a3df5a21840 |
08-Dec-2007 |
Chris Lattner <sabre@nondot.org> |
Split promotion support out to its own file.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@44716 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeTypes.cpp
egalizeTypesPromote.cpp
|
| 524825b626e8cf9b323a9dd985dcf0f74a99c46e |
08-Dec-2007 |
Chris Lattner <sabre@nondot.org> |
Rename LegalizeDAGTypes.cpp -> LegalizeTypes.cpp
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@44715 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAGTypes.cpp
egalizeTypes.cpp
|
| 0493715f4b23233bb29562cbd7b750b0d9ad346d |
08-Dec-2007 |
Chris Lattner <sabre@nondot.org> |
Rename LegalizeDAGTypes.cpp -> LegalizeTypes.cpp
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@44715 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAGTypes.cpp
egalizeTypes.cpp
|
| dff67f5770ada2942dd8c815323ad2480bfdde44 |
08-Dec-2007 |
Chris Lattner <sabre@nondot.org> |
Split the class definition of DAGTypeLegalizer out into a header.
Leave it visibility hidden, but not in an anon namespace.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@44714 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAGTypes.cpp
egalizeTypes.h
|
| 27f5b7287cd01a61c1d5dd267c4ddc7a3dc933e5 |
08-Dec-2007 |
Chris Lattner <sabre@nondot.org> |
Split the class definition of DAGTypeLegalizer out into a header.
Leave it visibility hidden, but not in an anon namespace.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@44714 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAGTypes.cpp
egalizeTypes.h
|
| e0e6fac5e9179b2c95fe3c25591474e4b94f5047 |
06-Dec-2007 |
Dale Johannesen <dalej@apple.com> |
Redo previous patch so optimization only done for i1.
Simpler and safer.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@44663 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 53e0ad7b804e913a95feb8aa700bd1ae7294570b |
06-Dec-2007 |
Dale Johannesen <dalej@apple.com> |
Redo previous patch so optimization only done for i1.
Simpler and safer.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@44663 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| d3fd6d2b25fc4e932ac796664ae7f4cd810ced8a |
06-Dec-2007 |
Chris Lattner <sabre@nondot.org> |
third time around: instead of disabling this completely,
only disable it if we don't know it will be obviously profitable.
Still fixme, but less so. :)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@44658 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| dcd197643fbae5f0f84620c2ff3864d8c3556456 |
06-Dec-2007 |
Chris Lattner <sabre@nondot.org> |
third time around: instead of disabling this completely,
only disable it if we don't know it will be obviously profitable.
Still fixme, but less so. :)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@44658 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| e00cbad78de86ac8e736f35db35632c83ef64c1d |
06-Dec-2007 |
Chris Lattner <sabre@nondot.org> |
Actually, disable this code for now. More analysis and improvements to
the X86 backend are needed before this should be enabled by default.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@44657 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 211f9f2d4307b306b2eb5faff5eab83a604340df |
06-Dec-2007 |
Chris Lattner <sabre@nondot.org> |
Actually, disable this code for now. More analysis and improvements to
the X86 backend are needed before this should be enabled by default.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@44657 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| e70da20f9a7edb15e1d9bd221839e2ff26e40955 |
06-Dec-2007 |
Chris Lattner <sabre@nondot.org> |
implement a readme entry, compiling the code into:
_foo:
movl $12, %eax
andl 4(%esp), %eax
movl _array(%eax), %eax
ret
instead of:
_foo:
movl 4(%esp), %eax
shrl $2, %eax
andl $3, %eax
movl _array(,%eax,4), %eax
ret
As it turns out, this triggers all the time, in a wide variety of
situations, for example, I see diffs like this in various programs:
- movl 8(%eax), %eax
- shll $2, %eax
- andl $1020, %eax
- movl (%esi,%eax), %eax
+ movzbl 8(%eax), %eax
+ movl (%esi,%eax,4), %eax
- shll $2, %edx
- andl $1020, %edx
- movl (%edi,%edx), %edx
+ andl $255, %edx
+ movl (%edi,%edx,4), %edx
Unfortunately, I also see stuff like this, which can be fixed in the
X86 backend:
- andl $85, %ebx
- addl _bit_count(,%ebx,4), %ebp
+ shll $2, %ebx
+ andl $340, %ebx
+ addl _bit_count(%ebx), %ebp
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@44656 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 91ed3c3f5c36a68bdf963b1438bdacc328fcf295 |
06-Dec-2007 |
Chris Lattner <sabre@nondot.org> |
implement a readme entry, compiling the code into:
_foo:
movl $12, %eax
andl 4(%esp), %eax
movl _array(%eax), %eax
ret
instead of:
_foo:
movl 4(%esp), %eax
shrl $2, %eax
andl $3, %eax
movl _array(,%eax,4), %eax
ret
As it turns out, this triggers all the time, in a wide variety of
situations, for example, I see diffs like this in various programs:
- movl 8(%eax), %eax
- shll $2, %eax
- andl $1020, %eax
- movl (%esi,%eax), %eax
+ movzbl 8(%eax), %eax
+ movl (%esi,%eax,4), %eax
- shll $2, %edx
- andl $1020, %edx
- movl (%edi,%edx), %edx
+ andl $255, %edx
+ movl (%edi,%edx,4), %edx
Unfortunately, I also see stuff like this, which can be fixed in the
X86 backend:
- andl $85, %ebx
- addl _bit_count(,%ebx,4), %ebp
+ shll $2, %ebx
+ andl $340, %ebx
+ addl _bit_count(%ebx), %ebp
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@44656 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 72b2df1f7718c2ac8a87802e28bf07a9b649252a |
06-Dec-2007 |
Chris Lattner <sabre@nondot.org> |
implement the rest of the functionality from SelectionDAGLegalize::ScalarizeVectorOp
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@44654 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAGTypes.cpp
|
| 12de88c3be91114fc075d3dac6ebe4156a8353ad |
06-Dec-2007 |
Chris Lattner <sabre@nondot.org> |
implement the rest of the functionality from SelectionDAGLegalize::ScalarizeVectorOp
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@44654 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAGTypes.cpp
|
| 59f1e97ef3940840e023ae1d6226c9b416222d2d |
06-Dec-2007 |
Dale Johannesen <dalej@apple.com> |
Fix PR1842.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@44649 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| a37fd09121d16fbaf6e8c4501a49b2b157390f51 |
06-Dec-2007 |
Dale Johannesen <dalej@apple.com> |
Fix PR1842.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@44649 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 60fb5eccccf0984e807276ac01e5e9286b199339 |
05-Dec-2007 |
Chris Lattner <sabre@nondot.org> |
more scalarization
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@44608 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAGTypes.cpp
|
| b455fec1b4613b0b55e4e9446d0566efa95c4f31 |
05-Dec-2007 |
Chris Lattner <sabre@nondot.org> |
more scalarization
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@44608 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAGTypes.cpp
|
| d36db029c82867adbae9289ecc9f901907665544 |
05-Dec-2007 |
Chris Lattner <sabre@nondot.org> |
scalarize vector binops
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@44607 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAGTypes.cpp
|
| a00601f6d3aab0968518ac18a09c9c962520bff2 |
05-Dec-2007 |
Chris Lattner <sabre@nondot.org> |
scalarize vector binops
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@44607 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAGTypes.cpp
|
| eb1819d1e5d6790c24bd92e4cce2058f81a5791a |
04-Dec-2007 |
Chris Lattner <sabre@nondot.org> |
Implement framework for scalarizing node results. This is sufficient
to codegen this:
define float @test_extract_elt(<1 x float> * %P) {
%p = load <1 x float>* %P
%R = extractelement <1 x float> %p, i32 0
ret float %R
}
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@44570 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAGTypes.cpp
|
| 777f2de998085e7bfc6256c97642dbcb0795131d |
04-Dec-2007 |
Chris Lattner <sabre@nondot.org> |
Implement framework for scalarizing node results. This is sufficient
to codegen this:
define float @test_extract_elt(<1 x float> * %P) {
%p = load <1 x float>* %P
%R = extractelement <1 x float> %p, i32 0
ret float %R
}
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@44570 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAGTypes.cpp
|
| 13c207b5c84cbac78147fa4472a4e14232cb6feb |
04-Dec-2007 |
Chris Lattner <sabre@nondot.org> |
start providing framework for scalarizing vectors.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@44569 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAGTypes.cpp
|
| c082f2c2689450a3f0c277733446411a88e50c14 |
04-Dec-2007 |
Chris Lattner <sabre@nondot.org> |
start providing framework for scalarizing vectors.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@44569 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAGTypes.cpp
|
| a3355ffb3d30d19d226bbb75707991c60f236e37 |
03-Dec-2007 |
Duncan Sands <baldrick@free.fr> |
Rather than having special rules like "intrinsics cannot
throw exceptions", just mark intrinsics with the nounwind
attribute. Likewise, mark intrinsics as readnone/readonly
and get rid of special aliasing logic (which didn't use
anything more than this anyway).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@44544 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 79d2887c7bd6fa2d4cd915d3f2b0e45e3dba83b2 |
03-Dec-2007 |
Duncan Sands <baldrick@free.fr> |
Rather than having special rules like "intrinsics cannot
throw exceptions", just mark intrinsics with the nounwind
attribute. Likewise, mark intrinsics as readnone/readonly
and get rid of special aliasing logic (which didn't use
anything more than this anyway).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@44544 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| afa3b6da11bc05281bcf09e45de9e037e0ee5011 |
28-Nov-2007 |
Duncan Sands <baldrick@free.fr> |
Add some convenience methods for querying attributes, and
use them.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@44403 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 637ec55233bf7a93bd9f605fb9d4a8fb7184eb14 |
28-Nov-2007 |
Duncan Sands <baldrick@free.fr> |
Add some convenience methods for querying attributes, and
use them.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@44403 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| d73ab8884f5c95d2704be3c00af4cc3dba963da6 |
27-Nov-2007 |
Nate Begeman <natebegeman@mac.com> |
Support returning non-power-of-2 vectors to unblock some work
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@44371 91177308-0d34-0410-b5e6-96231b3b80d8
argetLowering.cpp
|
| 3d83c3fd5cbc8b2268bd2ec46879cd4c04b9d32c |
27-Nov-2007 |
Nate Begeman <natebegeman@mac.com> |
Support returning non-power-of-2 vectors to unblock some work
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@44371 91177308-0d34-0410-b5e6-96231b3b80d8
argetLowering.cpp
|
| dc024674ff96820d6020757b48d47f46d4c07db2 |
27-Nov-2007 |
Duncan Sands <baldrick@free.fr> |
Fix PR1146: parameter attributes are longer part of
the function type, instead they belong to functions
and function calls. This is an updated and slightly
corrected version of Reid Spencer's original patch.
The only known problem is that auto-upgrading of
bitcode files doesn't seem to work properly (see
test/Bitcode/AutoUpgradeIntrinsics.ll). Hopefully
a bitcode guru (who might that be? :) ) will fix it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@44359 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| f5588dc4ec43da1e4423e5ff2394669c0f000350 |
27-Nov-2007 |
Duncan Sands <baldrick@free.fr> |
Fix PR1146: parameter attributes are longer part of
the function type, instead they belong to functions
and function calls. This is an updated and slightly
corrected version of Reid Spencer's original patch.
The only known problem is that auto-upgrading of
bitcode files doesn't seem to work properly (see
test/Bitcode/AutoUpgradeIntrinsics.ll). Hopefully
a bitcode guru (who might that be? :) ) will fix it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@44359 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| b3d9cdb6776355ffba1c43809094f29e4d57a45f |
27-Nov-2007 |
Chris Lattner <sabre@nondot.org> |
err, no really.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@44352 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 5624ae4479f46f442704fa8c54371bc96424ae01 |
27-Nov-2007 |
Chris Lattner <sabre@nondot.org> |
err, no really.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@44352 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 5ebfaa2c9d528d72903641653171eef73f0c547b |
27-Nov-2007 |
Chris Lattner <sabre@nondot.org> |
don't depend on ADL.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@44351 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 3b46e9c9589693851212da1a72fab37680d0f1e9 |
27-Nov-2007 |
Chris Lattner <sabre@nondot.org> |
don't depend on ADL.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@44351 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 77003040b21816725dc1ca3a55111044d36ac21f |
27-Nov-2007 |
Dan Gohman <gohman@apple.com> |
Don't lower srem/urem X%C to X-X/C*C unless the division is actually
optimized. This avoids creating illegal divisions when the combiner is
running after legalize; this fixes PR1815. Also, it produces better
code in the included testcase by avoiding the subtract and multiply
when the division isn't optimized.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@44341 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| fdb31f1da69c857d4fd7275652d0ccb2f55d9194 |
27-Nov-2007 |
Dan Gohman <djg@cray.com> |
Don't lower srem/urem X%C to X-X/C*C unless the division is actually
optimized. This avoids creating illegal divisions when the combiner is
running after legalize; this fixes PR1815. Also, it produces better
code in the included testcase by avoiding the subtract and multiply
when the division isn't optimized.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@44341 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| c58d558a79c3638c23d8fd09d89accff33285653 |
24-Nov-2007 |
Chris Lattner <sabre@nondot.org> |
Implement expand support for MERGE_VALUEs that only produces one result.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@44304 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 1b66f82d6e76174231832f513f1721cbddf972ca |
24-Nov-2007 |
Chris Lattner <sabre@nondot.org> |
Implement expand support for MERGE_VALUEs that only produces one result.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@44304 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 87726ac0f9f62178fcbba6ebc83ae048a4f97727 |
24-Nov-2007 |
Chris Lattner <sabre@nondot.org> |
Implement support for custom legalization in DAGTypeLegalizer::ExpandOperand.
Improve a comment.
Unbreak Duncan's carefully written path compression where I didn't realize
what was happening!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@44301 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAGTypes.cpp
|
| 63aaf6f6bd97e981038794865ed45f94f5da2d80 |
24-Nov-2007 |
Chris Lattner <sabre@nondot.org> |
Implement support for custom legalization in DAGTypeLegalizer::ExpandOperand.
Improve a comment.
Unbreak Duncan's carefully written path compression where I didn't realize
what was happening!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@44301 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAGTypes.cpp
|
| 27a6c7380fa4dfc8e1837a8dd67967d063b26544 |
24-Nov-2007 |
Chris Lattner <sabre@nondot.org> |
Several changes:
1) Change the interface to TargetLowering::ExpandOperationResult to
take and return entire NODES that need a result expanded, not just
the value. This allows us to handle things like READCYCLECOUNTER,
which returns two values.
2) Implement (extremely limited) support in LegalizeDAG::ExpandOp for MERGE_VALUES.
3) Reimplement custom lowering in LegalizeDAGTypes in terms of the new
ExpandOperationResult. This makes the result simpler and fully
general.
4) Implement (fully general) expand support for MERGE_VALUES in LegalizeDAGTypes.
5) Implement ExpandOperationResult support for ARM f64->i64 bitconvert and ARM
i64 shifts, allowing them to work with LegalizeDAGTypes.
6) Implement ExpandOperationResult support for X86 READCYCLECOUNTER and FP_TO_SINT,
allowing them to work with LegalizeDAGTypes.
LegalizeDAGTypes now passes several more X86 codegen tests when enabled and when
type legalization in LegalizeDAG is ifdef'd out.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@44300 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
egalizeDAGTypes.cpp
electionDAGISel.cpp
|
| dfb947d423f6355537d1a545fb8fa4fbc6dad230 |
24-Nov-2007 |
Chris Lattner <sabre@nondot.org> |
Several changes:
1) Change the interface to TargetLowering::ExpandOperationResult to
take and return entire NODES that need a result expanded, not just
the value. This allows us to handle things like READCYCLECOUNTER,
which returns two values.
2) Implement (extremely limited) support in LegalizeDAG::ExpandOp for MERGE_VALUES.
3) Reimplement custom lowering in LegalizeDAGTypes in terms of the new
ExpandOperationResult. This makes the result simpler and fully
general.
4) Implement (fully general) expand support for MERGE_VALUES in LegalizeDAGTypes.
5) Implement ExpandOperationResult support for ARM f64->i64 bitconvert and ARM
i64 shifts, allowing them to work with LegalizeDAGTypes.
6) Implement ExpandOperationResult support for X86 READCYCLECOUNTER and FP_TO_SINT,
allowing them to work with LegalizeDAGTypes.
LegalizeDAGTypes now passes several more X86 codegen tests when enabled and when
type legalization in LegalizeDAG is ifdef'd out.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@44300 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
egalizeDAGTypes.cpp
electionDAGISel.cpp
|
| baccd5872e87adb0431ae3ebfa83719b97880808 |
21-Nov-2007 |
Duncan Sands <baldrick@free.fr> |
Fix a bug in which node A is replaced by node B, but later
node A gets back into the DAG again because it was hiding in
one of the node maps: make sure that node replacement happens
in those maps too.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@44263 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAGTypes.cpp
|
| b03c790237122430b61b50841c48a71d108b28e8 |
21-Nov-2007 |
Duncan Sands <baldrick@free.fr> |
Fix a bug in which node A is replaced by node B, but later
node A gets back into the DAG again because it was hiding in
one of the node maps: make sure that node replacement happens
in those maps too.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@44263 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAGTypes.cpp
|
| e400af83b3f8b69407a8963f1d2e2c82fa766f33 |
19-Nov-2007 |
Chris Lattner <sabre@nondot.org> |
ExpandUnalignedLoad doesn't handle vectors right at all apparently.
Fix a couple of problems:
1. Don't assume the VT-1 is a VT that is half the size.
2. Treat vectors of FP in the vector path, not the FP path.
This has a couple of remaining problems before it will work with
the code in PR1811: the code below this change assumes that it can
use extload/shift/or to construct the result, which isn't right for
vectors.
This also doesn't handle vectors of 1 or vectors that aren't pow-2.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@44243 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 4cf8a5bde8b7db74f9ed878a354dc208c43f6a74 |
19-Nov-2007 |
Chris Lattner <sabre@nondot.org> |
ExpandUnalignedLoad doesn't handle vectors right at all apparently.
Fix a couple of problems:
1. Don't assume the VT-1 is a VT that is half the size.
2. Treat vectors of FP in the vector path, not the FP path.
This has a couple of remaining problems before it will work with
the code in PR1811: the code below this change assumes that it can
use extload/shift/or to construct the result, which isn't right for
vectors.
This also doesn't handle vectors of 1 or vectors that aren't pow-2.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@44243 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 6c9c6800b844771117943c400d0a9a47460a46b9 |
19-Nov-2007 |
Chris Lattner <sabre@nondot.org> |
Implement vector expand support for shuffle_vector. This fixes PR1811.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@44242 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 587c46dfdf4e0aeb23b9564486ed37cd86098fe3 |
19-Nov-2007 |
Chris Lattner <sabre@nondot.org> |
Implement vector expand support for shuffle_vector. This fixes PR1811.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@44242 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| daf9bc8eee3eb1bc992480921f50ef1b760f4159 |
19-Nov-2007 |
Chris Lattner <sabre@nondot.org> |
Implement splitting of UNDEF nodes. This is the first step towards fixing PR1811
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@44239 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 3dec33af58c8392159bd355c6c8ae2425c98c0d7 |
19-Nov-2007 |
Chris Lattner <sabre@nondot.org> |
Implement splitting of UNDEF nodes. This is the first step towards fixing PR1811
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@44239 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 089617d9e3acc242151a007e7a051ed2fb200b1f |
19-Nov-2007 |
Dan Gohman <gohman@apple.com> |
Add support in SplitVectorOp for remainder operators.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@44233 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 9e1b7ee6e84e14a314c94e7fc98f92d02266f1db |
19-Nov-2007 |
Dan Gohman <djg@cray.com> |
Add support in SplitVectorOp for remainder operators.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@44233 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| b348d18caf834bc26a80e60aa7a2c9b1748734e8 |
17-Nov-2007 |
Nate Begeman <natebegeman@mac.com> |
Add support for vectors to int <-> float casts.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@44204 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 78246cae8f37740879b3b099b388f0595106db6b |
17-Nov-2007 |
Nate Begeman <natebegeman@mac.com> |
Add support for vectors to int <-> float casts.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@44204 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 917c2a6ff2cfcd1263a5dd80c54336754c553ace |
16-Nov-2007 |
Anton Korobeynikov <asl@math.spbu.ru> |
Implement necessary bits for flt_rounds gcc builtin.
Codegen bits and llvm-gcc support will follow.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@44182 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
electionDAG.cpp
electionDAGISel.cpp
|
| c915e271dabb580bad526655306e39bb097f5980 |
16-Nov-2007 |
Anton Korobeynikov <asl@math.spbu.ru> |
Implement necessary bits for flt_rounds gcc builtin.
Codegen bits and llvm-gcc support will follow.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@44182 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
electionDAG.cpp
electionDAGISel.cpp
|
| 5db1afb462b048bc10e0003db5a770ed960b2ddf |
15-Nov-2007 |
Nate Begeman <natebegeman@mac.com> |
Basic non-power-of-2 vector support
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@44181 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 4a365ad43016e3bf8ce4d0383706a57f5d59976d |
15-Nov-2007 |
Nate Begeman <natebegeman@mac.com> |
Basic non-power-of-2 vector support
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@44181 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 560a737e073788463b9275c5e92ebc12f0ea62a2 |
15-Nov-2007 |
Duncan Sands <baldrick@free.fr> |
This assertion was bogus.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@44167 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 9b7e14879587a79a1ab17ca4e8c99f2d93064256 |
15-Nov-2007 |
Duncan Sands <baldrick@free.fr> |
This assertion was bogus.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@44167 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 0f8d9c04d9feef86cee35cf5fecfb348a6b3de50 |
13-Nov-2007 |
Bill Wendling <isanbard@gmail.com> |
Unify CALLSEQ_{START,END}. They take 4 parameters: the chain, two stack
adjustment fields, and an optional flag. If there is a "dynamic_stackalloc" in
the code, make sure that it's bracketed by CALLSEQ_START and CALLSEQ_END. If
not, then there is the potential for the stack to be changed while the stack's
being used by another instruction (like a call).
This can only result in tears...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@44037 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 22f8debd4e886118daaa419ba6bfa0c1ef279beb |
13-Nov-2007 |
Bill Wendling <isanbard@gmail.com> |
Unify CALLSEQ_{START,END}. They take 4 parameters: the chain, two stack
adjustment fields, and an optional flag. If there is a "dynamic_stackalloc" in
the code, make sure that it's bracketed by CALLSEQ_START and CALLSEQ_END. If
not, then there is the potential for the stack to be changed while the stack's
being used by another instruction (like a call).
This can only result in tears...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@44037 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| fd617d0143a158bc1c996445262d409280e7b0cc |
09-Nov-2007 |
Duncan Sands <baldrick@free.fr> |
Move MinAlign to MathExtras.h.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43944 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
egalizeDAG.cpp
egalizeDAGTypes.cpp
|
| d2f53d1904d1e405a876eb1f7fcbffa4f34c4255 |
09-Nov-2007 |
Duncan Sands <baldrick@free.fr> |
Move MinAlign to MathExtras.h.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43944 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
egalizeDAG.cpp
egalizeDAGTypes.cpp
|
| c6fa170b4db6659c411e77a9a5144ae2e92136c7 |
09-Nov-2007 |
Duncan Sands <baldrick@free.fr> |
Fix some load/store logic that would be wrong for
apints on big-endian machines if the bitwidth is
not a multiple of 8. Introduce a new helper,
MVT::getStoreSizeInBits, and use it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43934 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
egalizeDAGTypes.cpp
|
| 4f18d4f7d6ed1bdddc07599c0e946557107423eb |
09-Nov-2007 |
Duncan Sands <baldrick@free.fr> |
Fix some load/store logic that would be wrong for
apints on big-endian machines if the bitwidth is
not a multiple of 8. Introduce a new helper,
MVT::getStoreSizeInBits, and use it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43934 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
egalizeDAGTypes.cpp
|
| cc41586b9d79532172b37e1f44a9077da4b73fc9 |
09-Nov-2007 |
Evan Cheng <evan.cheng@apple.com> |
Much improved pic jumptable codegen:
Then:
call "L1$pb"
"L1$pb":
popl %eax
...
LBB1_1: # entry
imull $4, %ecx, %ecx
leal LJTI1_0-"L1$pb"(%eax), %edx
addl LJTI1_0-"L1$pb"(%ecx,%eax), %edx
jmpl *%edx
.align 2
.set L1_0_set_3,LBB1_3-LJTI1_0
.set L1_0_set_2,LBB1_2-LJTI1_0
.set L1_0_set_5,LBB1_5-LJTI1_0
.set L1_0_set_4,LBB1_4-LJTI1_0
LJTI1_0:
.long L1_0_set_3
.long L1_0_set_2
Now:
call "L1$pb"
"L1$pb":
popl %eax
...
LBB1_1: # entry
addl LJTI1_0-"L1$pb"(%eax,%ecx,4), %eax
jmpl *%eax
.align 2
.set L1_0_set_3,LBB1_3-"L1$pb"
.set L1_0_set_2,LBB1_2-"L1$pb"
.set L1_0_set_5,LBB1_5-"L1$pb"
.set L1_0_set_4,LBB1_4-"L1$pb"
LJTI1_0:
.long L1_0_set_3
.long L1_0_set_2
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43924 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
argetLowering.cpp
|
| 6fb0676d69697f38712be6843073618583d3a3f8 |
09-Nov-2007 |
Evan Cheng <evan.cheng@apple.com> |
Much improved pic jumptable codegen:
Then:
call "L1$pb"
"L1$pb":
popl %eax
...
LBB1_1: # entry
imull $4, %ecx, %ecx
leal LJTI1_0-"L1$pb"(%eax), %edx
addl LJTI1_0-"L1$pb"(%ecx,%eax), %edx
jmpl *%edx
.align 2
.set L1_0_set_3,LBB1_3-LJTI1_0
.set L1_0_set_2,LBB1_2-LJTI1_0
.set L1_0_set_5,LBB1_5-LJTI1_0
.set L1_0_set_4,LBB1_4-LJTI1_0
LJTI1_0:
.long L1_0_set_3
.long L1_0_set_2
Now:
call "L1$pb"
"L1$pb":
popl %eax
...
LBB1_1: # entry
addl LJTI1_0-"L1$pb"(%eax,%ecx,4), %eax
jmpl *%eax
.align 2
.set L1_0_set_3,LBB1_3-"L1$pb"
.set L1_0_set_2,LBB1_2-"L1$pb"
.set L1_0_set_5,LBB1_5-"L1$pb"
.set L1_0_set_4,LBB1_4-"L1$pb"
LJTI1_0:
.long L1_0_set_3
.long L1_0_set_2
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43924 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
argetLowering.cpp
|
| 2dfdefd282a04785c4d7b43e37782ace65af2ba6 |
09-Nov-2007 |
Evan Cheng <evan.cheng@apple.com> |
Didn't mean to check these in.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43923 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
argetLowering.cpp
|
| d5d2f0295f4abd084348d8a047836ef65433406a |
09-Nov-2007 |
Evan Cheng <evan.cheng@apple.com> |
Didn't mean to check these in.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43923 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
argetLowering.cpp
|
| 7da8f399bf09e9a03fe8bdd8c8eef6e5a7d87327 |
09-Nov-2007 |
Evan Cheng <evan.cheng@apple.com> |
Bug fix. Passive nodes are not in SUnitMap.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43922 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
cheduleDAGRRList.cpp
argetLowering.cpp
|
| a81a770f0f290e9f1f6c71a886d5294a0adeef8d |
09-Nov-2007 |
Evan Cheng <evan.cheng@apple.com> |
Bug fix. Passive nodes are not in SUnitMap.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43922 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
cheduleDAGRRList.cpp
argetLowering.cpp
|
| 4471194d69cc99ed53dc1638e06053b069dc6454 |
08-Nov-2007 |
Evan Cheng <evan.cheng@apple.com> |
If both parts of smul_lohi, etc. are used, don't simplify. If only one part is used, try simplify it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43888 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| ddfa8c7f39c64cb1211077ca8732ab9044c8cb66 |
08-Nov-2007 |
Evan Cheng <evan.cheng@apple.com> |
If both parts of smul_lohi, etc. are used, don't simplify. If only one part is used, try simplify it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43888 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 0d97426b7b3d57cc3ff651a400b758733f2058a8 |
06-Nov-2007 |
Dan Gohman <gohman@apple.com> |
Remainder operations must be either integer or floating-point.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43781 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 59b4b1040ecf1055854d86693a3674814510cf27 |
06-Nov-2007 |
Dan Gohman <djg@cray.com> |
Remainder operations must be either integer or floating-point.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43781 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 1fd15ba9614e81a3b9cc5cd9631ca76c845159b2 |
06-Nov-2007 |
Evan Cheng <evan.cheng@apple.com> |
Add pseudo dependency to force two-address instruction to be scheduled after
other uses. There was a overly restricted check that prevented some obvious
cases.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43762 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGRRList.cpp
|
| 48fb0205803f2fadef072d33720c11536490d213 |
06-Nov-2007 |
Evan Cheng <evan.cheng@apple.com> |
Add pseudo dependency to force two-address instruction to be scheduled after
other uses. There was a overly restricted check that prevented some obvious
cases.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43762 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGRRList.cpp
|
| 80176319f3ea5d3d943aa540e76381e8567f5dcb |
06-Nov-2007 |
Dan Gohman <gohman@apple.com> |
Add support for vector remainder operations.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43744 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 3e3fd8cf1c6bb2bff373903ff55d8c7562b2f4ea |
06-Nov-2007 |
Dan Gohman <djg@cray.com> |
Add support for vector remainder operations.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43744 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| f1ba1cad387dc52f3c2c5afc665edf9caad00992 |
06-Nov-2007 |
Rafael Espindola <rafael.espindola@gmail.com> |
Move the LowerMEMCPY and LowerMEMCPYCall to a common place.
Thanks for the suggestions Bill :-)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43742 91177308-0d34-0410-b5e6-96231b3b80d8
argetLowering.cpp
|
| dd867c703a1fb12d758ab2ea45aaa0e4e6be4074 |
06-Nov-2007 |
Rafael Espindola <rafael.espindola@gmail.com> |
Move the LowerMEMCPY and LowerMEMCPYCall to a common place.
Thanks for the suggestions Bill :-)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43742 91177308-0d34-0410-b5e6-96231b3b80d8
argetLowering.cpp
|
| eb57ea7ea2378b77bc995371c1888193b960cd03 |
05-Nov-2007 |
Dale Johannesen <dalej@apple.com> |
Make labels work in asm blocks; allow labels as
parameters. Rename ValueRefList to ParamList
in AsmParser, since its only use is for parameters.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43734 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAG.cpp
electionDAGISel.cpp
argetLowering.cpp
|
| cfb19e6297a5527845fd6c14b7dff5dea34b6a25 |
05-Nov-2007 |
Dale Johannesen <dalej@apple.com> |
Make labels work in asm blocks; allow labels as
parameters. Rename ValueRefList to ParamList
in AsmParser, since its only use is for parameters.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43734 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAG.cpp
electionDAGISel.cpp
argetLowering.cpp
|
| 111c4f897eb9a42eac6aceea830b8e76058afd73 |
02-Nov-2007 |
Dan Gohman <gohman@apple.com> |
Add std:: to sort calls.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43652 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 68840707c8763f4e7a5377039b14d08fef6caef9 |
02-Nov-2007 |
Dan Gohman <djg@cray.com> |
Add std:: to sort calls.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43652 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| b61f2f061feefd79623fadd21eee4f195b0b8e56 |
02-Nov-2007 |
Dan Gohman <gohman@apple.com> |
Change illegal uses of ++ to uses of STLExtra.h's next function.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43651 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 0bb8bdc724f0dbd88a4be9853dfe31cf6f244f56 |
02-Nov-2007 |
Dan Gohman <djg@cray.com> |
Change illegal uses of ++ to uses of STLExtra.h's next function.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43651 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| e414cdacb4ee442624128e41cb985c4e9f312b52 |
02-Nov-2007 |
Duncan Sands <baldrick@free.fr> |
Fix a thinko.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43639 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAGTypes.cpp
|
| ee9c9b0d7868ada6d88e959d6959f6848e320002 |
02-Nov-2007 |
Duncan Sands <baldrick@free.fr> |
Fix a thinko.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43639 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAGTypes.cpp
|
| 514ab348fddcdffa8367685dc608b2f8d5de986d |
01-Nov-2007 |
Duncan Sands <baldrick@free.fr> |
Executive summary: getTypeSize -> getTypeStoreSize / getABITypeSize.
The meaning of getTypeSize was not clear - clarifying it is important
now that we have x86 long double and arbitrary precision integers.
The issue with long double is that it requires 80 bits, and this is
not a multiple of its alignment. This gives a primitive type for
which getTypeSize differed from getABITypeSize. For arbitrary precision
integers it is even worse: there is the minimum number of bits needed to
hold the type (eg: 36 for an i36), the maximum number of bits that will
be overwriten when storing the type (40 bits for i36) and the ABI size
(i.e. the storage size rounded up to a multiple of the alignment; 64 bits
for i36).
This patch removes getTypeSize (not really - it is still there but
deprecated to allow for a gradual transition). Instead there is:
(1) getTypeSizeInBits - a number of bits that suffices to hold all
values of the type. For a primitive type, this is the minimum number
of bits. For an i36 this is 36 bits. For x86 long double it is 80.
This corresponds to gcc's TYPE_PRECISION.
(2) getTypeStoreSizeInBits - the maximum number of bits that is
written when storing the type (or read when reading it). For an
i36 this is 40 bits, for an x86 long double it is 80 bits. This
is the size alias analysis is interested in (getTypeStoreSize
returns the number of bytes). There doesn't seem to be anything
corresponding to this in gcc.
(3) getABITypeSizeInBits - this is getTypeStoreSizeInBits rounded
up to a multiple of the alignment. For an i36 this is 64, for an
x86 long double this is 96 or 128 depending on the OS. This is the
spacing between consecutive elements when you form an array out of
this type (getABITypeSize returns the number of bytes). This is
TYPE_SIZE in gcc.
Since successive elements in a SequentialType (arrays, pointers
and vectors) need to be aligned, the spacing between them will be
given by getABITypeSize. This means that the size of an array
is the length times the getABITypeSize. It also means that GEP
computations need to use getABITypeSize when computing offsets.
Furthermore, if an alloca allocates several elements at once then
these too need to be aligned, so the size of the alloca has to be
the number of elements multiplied by getABITypeSize. Logically
speaking this doesn't have to be the case when allocating just
one element, but it is simpler to also use getABITypeSize in this
case. So alloca's and mallocs should use getABITypeSize. Finally,
since gcc's only notion of size is that given by getABITypeSize, if
you want to output assembler etc the same as gcc then getABITypeSize
is the size you want.
Since a store will overwrite no more than getTypeStoreSize bytes,
and a read will read no more than that many bytes, this is the
notion of size appropriate for alias analysis calculations.
In this patch I have corrected all type size uses except some of
those in ScalarReplAggregates, lib/Codegen, lib/Target (the hard
cases). I will get around to auditing these too at some point,
but I could do with some help.
Finally, I made one change which I think wise but others might
consider pointless and suboptimal: in an unpacked struct the
amount of space allocated for a field is now given by the ABI
size rather than getTypeStoreSize. I did this because every
other place that reserves memory for a type (eg: alloca) now
uses getABITypeSize, and I didn't want to make an exception
for unpacked structs, i.e. I did it to make things more uniform.
This only effects structs containing long doubles and arbitrary
precision integers. If someone wants to pack these types more
tightly they can always use a packed struct.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43620 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
cheduleDAG.cpp
electionDAGISel.cpp
|
| f99fdc666e16255e15d8ab0888a49bddbb96aa2d |
01-Nov-2007 |
Duncan Sands <baldrick@free.fr> |
Executive summary: getTypeSize -> getTypeStoreSize / getABITypeSize.
The meaning of getTypeSize was not clear - clarifying it is important
now that we have x86 long double and arbitrary precision integers.
The issue with long double is that it requires 80 bits, and this is
not a multiple of its alignment. This gives a primitive type for
which getTypeSize differed from getABITypeSize. For arbitrary precision
integers it is even worse: there is the minimum number of bits needed to
hold the type (eg: 36 for an i36), the maximum number of bits that will
be overwriten when storing the type (40 bits for i36) and the ABI size
(i.e. the storage size rounded up to a multiple of the alignment; 64 bits
for i36).
This patch removes getTypeSize (not really - it is still there but
deprecated to allow for a gradual transition). Instead there is:
(1) getTypeSizeInBits - a number of bits that suffices to hold all
values of the type. For a primitive type, this is the minimum number
of bits. For an i36 this is 36 bits. For x86 long double it is 80.
This corresponds to gcc's TYPE_PRECISION.
(2) getTypeStoreSizeInBits - the maximum number of bits that is
written when storing the type (or read when reading it). For an
i36 this is 40 bits, for an x86 long double it is 80 bits. This
is the size alias analysis is interested in (getTypeStoreSize
returns the number of bytes). There doesn't seem to be anything
corresponding to this in gcc.
(3) getABITypeSizeInBits - this is getTypeStoreSizeInBits rounded
up to a multiple of the alignment. For an i36 this is 64, for an
x86 long double this is 96 or 128 depending on the OS. This is the
spacing between consecutive elements when you form an array out of
this type (getABITypeSize returns the number of bytes). This is
TYPE_SIZE in gcc.
Since successive elements in a SequentialType (arrays, pointers
and vectors) need to be aligned, the spacing between them will be
given by getABITypeSize. This means that the size of an array
is the length times the getABITypeSize. It also means that GEP
computations need to use getABITypeSize when computing offsets.
Furthermore, if an alloca allocates several elements at once then
these too need to be aligned, so the size of the alloca has to be
the number of elements multiplied by getABITypeSize. Logically
speaking this doesn't have to be the case when allocating just
one element, but it is simpler to also use getABITypeSize in this
case. So alloca's and mallocs should use getABITypeSize. Finally,
since gcc's only notion of size is that given by getABITypeSize, if
you want to output assembler etc the same as gcc then getABITypeSize
is the size you want.
Since a store will overwrite no more than getTypeStoreSize bytes,
and a read will read no more than that many bytes, this is the
notion of size appropriate for alias analysis calculations.
In this patch I have corrected all type size uses except some of
those in ScalarReplAggregates, lib/Codegen, lib/Target (the hard
cases). I will get around to auditing these too at some point,
but I could do with some help.
Finally, I made one change which I think wise but others might
consider pointless and suboptimal: in an unpacked struct the
amount of space allocated for a field is now given by the ABI
size rather than getTypeStoreSize. I did this because every
other place that reserves memory for a type (eg: alloca) now
uses getABITypeSize, and I didn't want to make an exception
for unpacked structs, i.e. I did it to make things more uniform.
This only effects structs containing long doubles and arbitrary
precision integers. If someone wants to pack these types more
tightly they can always use a packed struct.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43620 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
cheduleDAG.cpp
electionDAGISel.cpp
|
| 7169a2f9e87d3cb13666071b9af022fdb82218e4 |
31-Oct-2007 |
Duncan Sands <baldrick@free.fr> |
Promotion of sdiv/srem/udiv/urem.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43551 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAGTypes.cpp
|
| d12d06725624645c26540e82d848e4f13b490864 |
31-Oct-2007 |
Duncan Sands <baldrick@free.fr> |
Promotion of sdiv/srem/udiv/urem.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43551 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAGTypes.cpp
|
| 25f1d08619720b82e7c944b18eee488fc07ba153 |
31-Oct-2007 |
Dale Johannesen <dalej@apple.com> |
Make i64=expand_vector_elt(v2i64) work in 32-bit mode.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43535 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 2ff963d7b805464bb77a600a7dc3a8fc24d2836d |
31-Oct-2007 |
Dale Johannesen <dalej@apple.com> |
Make i64=expand_vector_elt(v2i64) work in 32-bit mode.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43535 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| de1631bc85380857b11240eb22ddff2bfa5b7104 |
30-Oct-2007 |
Evan Cheng <evan.cheng@apple.com> |
Typo.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43511 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 06aaf4c28ad00f87b797faf1a061aefadc5ab811 |
30-Oct-2007 |
Evan Cheng <evan.cheng@apple.com> |
Typo.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43511 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 01405f928418e1c1268dd0e7a4b9dd68e0cb146c |
30-Oct-2007 |
Duncan Sands <baldrick@free.fr> |
Add support for expanding trunc stores. Consider
storing an i170 on a 32 bit machine. This is first
promoted to a trunc-i170 store of an i256. On a
little-endian machine this expands to a store of
an i128 and a trunc-i42 store of an i128. The
trunc-i42 store is further expanded to a trunc-i42
store of an i64, then to a store of an i32 and a
trunc-i10 store of an i32. At this point the operand
type is legal (i32) and expansion stops (legalization
of the trunc-i10 needs to be handled in LegalizeDAG.cpp).
On big-endian machines the high bits are stored first,
and some bit-fiddling is needed in order to generate
aligned stores.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43499 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAGTypes.cpp
|
| 77bf4c48821a37c19b1c7fc41265fe327438eaa3 |
30-Oct-2007 |
Duncan Sands <baldrick@free.fr> |
Add support for expanding trunc stores. Consider
storing an i170 on a 32 bit machine. This is first
promoted to a trunc-i170 store of an i256. On a
little-endian machine this expands to a store of
an i128 and a trunc-i42 store of an i128. The
trunc-i42 store is further expanded to a trunc-i42
store of an i64, then to a store of an i32 and a
trunc-i10 store of an i32. At this point the operand
type is legal (i32) and expansion stops (legalization
of the trunc-i10 needs to be handled in LegalizeDAG.cpp).
On big-endian machines the high bits are stored first,
and some bit-fiddling is needed in order to generate
aligned stores.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43499 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAGTypes.cpp
|
| ba3b1d10fd9bc3034a5947da7cc6e32a70ce23d4 |
30-Oct-2007 |
Duncan Sands <baldrick@free.fr> |
If a call to getTruncStore is for a normal store,
offload to getStore rather than trying to handle
both cases at once (the assertions for example
assume the store really is truncating).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43498 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 06fcf6543423ddff7414f40a53279344e97044d9 |
30-Oct-2007 |
Duncan Sands <baldrick@free.fr> |
If a call to getTruncStore is for a normal store,
offload to getStore rather than trying to handle
both cases at once (the assertions for example
assume the store really is truncating).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43498 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 090b38a0dafbdad144db1e2c5c9db082eb7dc9fe |
29-Oct-2007 |
Dan Gohman <gohman@apple.com> |
Fix a DAGCombiner abort on a bitcast from a scalar to a vector.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43470 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| a3591d9ec3fd99ae03aee545913d5fc84fba60b8 |
29-Oct-2007 |
Dan Gohman <djg@cray.com> |
Fix a DAGCombiner abort on a bitcast from a scalar to a vector.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43470 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 3c3ddb3a856e44c603cb8cf8f52ff9c0f06ff14a |
29-Oct-2007 |
Evan Cheng <evan.cheng@apple.com> |
Enable more fold (sext (load x)) -> (sext (truncate (sextload x)))
transformation. Previously, it's restricted by ensuring the number of load uses
is one. Now the restriction is loosened up by allowing setcc uses to be
"extended" (e.g. setcc x, c, eq -> setcc sext(x), sext(c), eq).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43465 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 9decb33dcb7844c828849b763dd80af08785ba35 |
29-Oct-2007 |
Evan Cheng <evan.cheng@apple.com> |
Enable more fold (sext (load x)) -> (sext (truncate (sextload x)))
transformation. Previously, it's restricted by ensuring the number of load uses
is one. Now the restriction is loosened up by allowing setcc uses to be
"extended" (e.g. setcc x, c, eq -> setcc sext(x), sext(c), eq).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43465 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 9962054775455c43402bf176da4a28c68197feef |
29-Oct-2007 |
Dan Gohman <gohman@apple.com> |
Add explicit keywords.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43464 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAGTypes.cpp
|
| 751fed71f59d152b3017e2c175bc4285a219a9d0 |
29-Oct-2007 |
Dan Gohman <djg@cray.com> |
Add explicit keywords.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43464 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAGTypes.cpp
|
| dc84650679b6330e0fcdd4cf8bc2a351387db7ca |
28-Oct-2007 |
Duncan Sands <baldrick@free.fr> |
The guaranteed alignment of ptr+offset is only the minimum of
of offset and the alignment of ptr if these are both powers of
2. While the ptr alignment is guaranteed to be a power of 2,
there is no reason to think that offset is. For example, if
offset is 12 (the size of a long double on x86-32 linux) and
the alignment of ptr is 8, then the alignment of ptr+offset
will in general be 4, not 8. Introduce a function MinAlign,
lifted from gcc, for computing the minimum guaranteed alignment.
I've tried to fix up everywhere under lib/CodeGen/SelectionDAG/.
I also changed some places that weren't wrong (because both values
were a power of 2), as a defensive change against people copying
and pasting the code.
Hopefully someone who cares about alignment will review the rest
of LLVM and fix up the remaining places. Since I'm on x86 I'm
not very motivated to do this myself...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43421 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
egalizeDAG.cpp
egalizeDAGTypes.cpp
|
| a369143858d4b127ef672b305a4bd676b5030898 |
28-Oct-2007 |
Duncan Sands <baldrick@free.fr> |
The guaranteed alignment of ptr+offset is only the minimum of
of offset and the alignment of ptr if these are both powers of
2. While the ptr alignment is guaranteed to be a power of 2,
there is no reason to think that offset is. For example, if
offset is 12 (the size of a long double on x86-32 linux) and
the alignment of ptr is 8, then the alignment of ptr+offset
will in general be 4, not 8. Introduce a function MinAlign,
lifted from gcc, for computing the minimum guaranteed alignment.
I've tried to fix up everywhere under lib/CodeGen/SelectionDAG/.
I also changed some places that weren't wrong (because both values
were a power of 2), as a defensive change against people copying
and pasting the code.
Hopefully someone who cares about alignment will review the rest
of LLVM and fix up the remaining places. Since I'm on x86 I'm
not very motivated to do this myself...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43421 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
egalizeDAG.cpp
egalizeDAGTypes.cpp
|
| 984e986929c34f9fa41ad33e3a4f19816f80c1ad |
26-Oct-2007 |
Bill Wendling <isanbard@gmail.com> |
- Remove the hacky code that forces a memcpy. Alignment is taken care of in the
FE.
- Explicitly pass in the alignment of the load & store.
- XFAIL 2007-10-23-UnalignedMemcpy.ll because llc has a bug that crashes on
unaligned pointers.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43398 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 84ebece8b1abc9b63c7360fc124a7e282deee332 |
26-Oct-2007 |
Bill Wendling <isanbard@gmail.com> |
- Remove the hacky code that forces a memcpy. Alignment is taken care of in the
FE.
- Explicitly pass in the alignment of the load & store.
- XFAIL 2007-10-23-UnalignedMemcpy.ll because llc has a bug that crashes on
unaligned pointers.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43398 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 2e606cfc7a2a8523114f0666756fce1e61fa9f6b |
25-Oct-2007 |
Duncan Sands <baldrick@free.fr> |
Small formatting changes. Add a sanity check.
Use NVT rather than looking it up, since we have
it to hand.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43341 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAGTypes.cpp
|
| abace9db0cd2cbca0e9bbf17adfedc1650f92129 |
25-Oct-2007 |
Duncan Sands <baldrick@free.fr> |
Small formatting changes. Add a sanity check.
Use NVT rather than looking it up, since we have
it to hand.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43341 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAGTypes.cpp
|
| cac99db7dafb832710d9cb95bc7561d861f9e55b |
25-Oct-2007 |
Duncan Sands <baldrick@free.fr> |
Promote SETCC operands.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43340 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAGTypes.cpp
|
| 10ca7fb7ae34a80c98088dfb00e9362f80fed908 |
25-Oct-2007 |
Duncan Sands <baldrick@free.fr> |
Promote SETCC operands.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43340 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAGTypes.cpp
|
| a3d10d808eb68c8e330eee382168cd747c718baf |
25-Oct-2007 |
Duncan Sands <baldrick@free.fr> |
Correctly extract the ValueType from a VTSDNode.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43339 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAGTypes.cpp
|
| 2353b747aee0e6f4634b1219c94cf95cb3337f36 |
25-Oct-2007 |
Duncan Sands <baldrick@free.fr> |
Correctly extract the ValueType from a VTSDNode.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43339 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAGTypes.cpp
|
| 8eadd5a6db79da067c773d1bd1cc13edc07788cc |
25-Oct-2007 |
Dale Johannesen <dalej@apple.com> |
Another expansion for i64 multiply, suitable for PPC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43314 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 612c88b47558b9cd4109058733442a148b05feb5 |
25-Oct-2007 |
Dale Johannesen <dalej@apple.com> |
Another expansion for i64 multiply, suitable for PPC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43314 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 30eeb3c6c00088ecdcaae8850fbaaa933a316c32 |
24-Oct-2007 |
Bill Wendling <isanbard@gmail.com> |
Fix comment and use the "Size" variable that's already provided.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43271 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 6310506781df7714cf4df32de832b0ea8dcb64f0 |
24-Oct-2007 |
Bill Wendling <isanbard@gmail.com> |
Fix comment and use the "Size" variable that's already provided.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43271 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 8b1c68cee4ddf42b4b57d4224f945ad9e9d4a779 |
24-Oct-2007 |
Bill Wendling <isanbard@gmail.com> |
If there's an unaligned memcpy to/from the stack, don't lower it. Just call the
memcpy library function instead.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43270 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| f7fcf9c22399a68d9a0a114de561f25e2ac9bb82 |
24-Oct-2007 |
Bill Wendling <isanbard@gmail.com> |
If there's an unaligned memcpy to/from the stack, don't lower it. Just call the
memcpy library function instead.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43270 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 803396fce26270fae6ff0dfba4813f4d4e5002fd |
24-Oct-2007 |
Bill Wendling <isanbard@gmail.com> |
This broke lots. Reverting.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43264 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| b9dacd9fc2f988dc2635fa4534abc6fdebf6489a |
24-Oct-2007 |
Bill Wendling <isanbard@gmail.com> |
This broke lots. Reverting.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43264 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| de09040946b4aa9bdc70057d65f840685ac31fef |
23-Oct-2007 |
Bill Wendling <isanbard@gmail.com> |
Lowering a memcpy to the stack is killing PPC. The ARM and X86 backends already
have their own custom memcpy lowering code. This code needs to be factored out
into a target-independent lowering method with hooks to the backend. In the
meantime, just call memcpy if we're trying to copy onto a stack.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43262 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| d9216574ddab03de298afadafda68d770b49545d |
23-Oct-2007 |
Bill Wendling <isanbard@gmail.com> |
Lowering a memcpy to the stack is killing PPC. The ARM and X86 backends already
have their own custom memcpy lowering code. This code needs to be factored out
into a target-independent lowering method with hooks to the backend. In the
meantime, just call memcpy if we're trying to copy onto a stack.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43262 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| fec3ad3e5f98ffdafee873c4afed81648ff2049f |
22-Oct-2007 |
Duncan Sands <baldrick@free.fr> |
Support for expanding extending loads of integers with
funky bit-widths.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43225 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAGTypes.cpp
|
| 673b87b92c3f4a63eeab070ed6539be4e6a0df82 |
22-Oct-2007 |
Duncan Sands <baldrick@free.fr> |
Support for expanding extending loads of integers with
funky bit-widths.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43225 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAGTypes.cpp
|
| 245741d2a1ccec53a87bb5d02b711244c179f07a |
22-Oct-2007 |
Duncan Sands <baldrick@free.fr> |
Fix up the logic for result expanding the various extension
operations so they work right for integers with funky
bit-widths. For example, consider extending i48 to i64
on a 32 bit machine. The i64 result is expanded to 2 x i32.
We know that the i48 operand will be promoted to i64, then
also expanded to 2 x i32. If we had the expanded promoted
operand to hand, then expanding the result would be trivial.
Unfortunately at this stage we can only get hold of the
promoted operand. So instead we kind of hand-expand, doing
explicit shifting and truncating to get the top and bottom
halves of the i64 operand into 2 x i32, which are then used
to expand the result. This is harmless, because when the
promoted operand is finally expanded all this bit fiddling
turns into trivial operations which are eliminated either
by the expansion code itself or the DAG combiner.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43223 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAGTypes.cpp
|
| 78ca93bb4960929e72ad3a86219f2a83a4413288 |
22-Oct-2007 |
Duncan Sands <baldrick@free.fr> |
Fix up the logic for result expanding the various extension
operations so they work right for integers with funky
bit-widths. For example, consider extending i48 to i64
on a 32 bit machine. The i64 result is expanded to 2 x i32.
We know that the i48 operand will be promoted to i64, then
also expanded to 2 x i32. If we had the expanded promoted
operand to hand, then expanding the result would be trivial.
Unfortunately at this stage we can only get hold of the
promoted operand. So instead we kind of hand-expand, doing
explicit shifting and truncating to get the top and bottom
halves of the i64 operand into 2 x i32, which are then used
to expand the result. This is harmless, because when the
promoted operand is finally expanded all this bit fiddling
turns into trivial operations which are eliminated either
by the expansion code itself or the DAG combiner.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43223 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAGTypes.cpp
|
| d0e908e830b2d2415e501e862c0aafbb9d5c2a5f |
21-Oct-2007 |
Chris Lattner <sabre@nondot.org> |
Add promote operand support for [su]int_to_fp.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43204 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAGTypes.cpp
|
| 2db52893b4a0adf3a4203bda64d8582fae62a1aa |
21-Oct-2007 |
Chris Lattner <sabre@nondot.org> |
Add promote operand support for [su]int_to_fp.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43204 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAGTypes.cpp
|
| be5a0a466880b2636404a976d4ed6546877215b5 |
20-Oct-2007 |
Chris Lattner <sabre@nondot.org> |
Add result promotion of FP_TO_*INT, fixing CodeGen/X86/trunc-to-bool.ll
with the new legalizer.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43199 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAGTypes.cpp
|
| 6587f34750656282059b24f7af2a065baf095382 |
20-Oct-2007 |
Chris Lattner <sabre@nondot.org> |
Add result promotion of FP_TO_*INT, fixing CodeGen/X86/trunc-to-bool.ll
with the new legalizer.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43199 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAGTypes.cpp
|
| aaeb0c86666662d3ed5766540ecd8c552049c320 |
20-Oct-2007 |
Chris Lattner <sabre@nondot.org> |
simplify some code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43198 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAGTypes.cpp
|
| 786ab068cec0d55198d800ba57d5cb3ecf0c6e1e |
20-Oct-2007 |
Chris Lattner <sabre@nondot.org> |
simplify some code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43198 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAGTypes.cpp
|
| d20154c76286a750a0bcd270909190871e95c149 |
20-Oct-2007 |
Chris Lattner <sabre@nondot.org> |
Implement promote and expand for operands of memcpy and friends.
This fixes CodeGen/X86/mem*.ll.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43197 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAGTypes.cpp
|
| 180760038d0772da0a2ceb9ff2e07d7ce5b174dc |
20-Oct-2007 |
Chris Lattner <sabre@nondot.org> |
Implement promote and expand for operands of memcpy and friends.
This fixes CodeGen/X86/mem*.ll.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43197 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAGTypes.cpp
|
| e526962fc59d38b4b0f671717df7657b8e0d8baa |
20-Oct-2007 |
Dale Johannesen <dalej@apple.com> |
Fix a few places vector operations were not getting
the operand's type from the right place.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43195 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| db132452e3caa89308c519f44693efa96b583f59 |
20-Oct-2007 |
Dale Johannesen <dalej@apple.com> |
Fix a few places vector operations were not getting
the operand's type from the right place.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43195 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 7f5f6851c386e1f74d35ee708e4654ae1c1038b6 |
19-Oct-2007 |
Duncan Sands <baldrick@free.fr> |
Add support for a few more nodes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43190 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAGTypes.cpp
|
| 3d6e9e2fabde4875e638fb27a89392f286a3013e |
19-Oct-2007 |
Duncan Sands <baldrick@free.fr> |
Add support for a few more nodes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43190 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAGTypes.cpp
|
| b6210fc92b643a5440d8373b5f36b6e579b5feb8 |
19-Oct-2007 |
Dale Johannesen <dalej@apple.com> |
Redo "last ppc long double fix" as Chris wants.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43189 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
egalizeDAG.cpp
|
| 2550e3aa67fc6b5192976b0a6ad5c8cd7829cf32 |
19-Oct-2007 |
Dale Johannesen <dalej@apple.com> |
Redo "last ppc long double fix" as Chris wants.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43189 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
egalizeDAG.cpp
|
| f185e67844e6229e2b0fe9080a5f66fb01fb7f5a |
19-Oct-2007 |
Chris Lattner <sabre@nondot.org> |
Fix a really nasty vector miscompilation bill recently introduced.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43181 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 9f9b880c45ba65f79ab1262eef9c716c8d9a917a |
19-Oct-2007 |
Chris Lattner <sabre@nondot.org> |
Fix a really nasty vector miscompilation bill recently introduced.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43181 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 1c4d492b944768ded5356587779045cc346409d7 |
19-Oct-2007 |
Chris Lattner <sabre@nondot.org> |
rename ExpandOperation to ExpandOperationResult, as suggested
by Duncan
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43177 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAGTypes.cpp
electionDAGISel.cpp
|
| 92da0502967c55166272fabcd4fca394f31d03bf |
19-Oct-2007 |
Chris Lattner <sabre@nondot.org> |
rename ExpandOperation to ExpandOperationResult, as suggested
by Duncan
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43177 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAGTypes.cpp
electionDAGISel.cpp
|
| c8ca2365e5fcd1cd3b69d4324106d6ebb28a152a |
19-Oct-2007 |
Duncan Sands <baldrick@free.fr> |
Support for expanding ADDE and SUBE.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43175 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAGTypes.cpp
|
| 700e008b476479e4edd1123ab267fc03a071948a |
19-Oct-2007 |
Duncan Sands <baldrick@free.fr> |
Support for expanding ADDE and SUBE.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43175 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAGTypes.cpp
|
| 5d868b1ffedfb4917abcb3b41afa6e21d9160ff7 |
19-Oct-2007 |
Duncan Sands <baldrick@free.fr> |
If the value types are equal then this routine
asserts in later checks rather than producing
the ordinary load it is supposed to. Avoid all
such hassles by directly returning an ordinary
load in this case.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43174 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 9b61474a7e449c3274efd672d9fea79d210db625 |
19-Oct-2007 |
Duncan Sands <baldrick@free.fr> |
If the value types are equal then this routine
asserts in later checks rather than producing
the ordinary load it is supposed to. Avoid all
such hassles by directly returning an ordinary
load in this case.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43174 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 5c0d6ed325417baa5d119af9c2b6790231d8565f |
19-Oct-2007 |
Rafael Espindola <rafael.espindola@gmail.com> |
Add support for byval function whose argument is not 32 bit aligned.
To do this it is necessary to add a "always inline" argument to the
memcpy node. For completeness I have also added this node to memmove
and memset. I have also added getMem* functions, because the extra
argument makes it cumbersome to use getNode and because I get confused
by it :-)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43172 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
electionDAG.cpp
electionDAGISel.cpp
|
| 808259095dfac3128b20664c1c40f0b2a5b0f8bc |
19-Oct-2007 |
Rafael Espindola <rafael.espindola@gmail.com> |
Add support for byval function whose argument is not 32 bit aligned.
To do this it is necessary to add a "always inline" argument to the
memcpy node. For completeness I have also added this node to memmove
and memset. I have also added getMem* functions, because the extra
argument makes it cumbersome to use getNode and because I get confused
by it :-)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43172 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
electionDAG.cpp
electionDAGISel.cpp
|
| 1f39dc42cdb70b5ebe86e3076c025a814adcbc41 |
19-Oct-2007 |
Chris Lattner <sabre@nondot.org> |
Implement a few new operations.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43171 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAGTypes.cpp
|
| b235c4ab7f957f7b0ed314cf28809d289f648aba |
19-Oct-2007 |
Chris Lattner <sabre@nondot.org> |
Implement a few new operations.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43171 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAGTypes.cpp
|
| 50f4395d86fdf3c6910fc63f38cc4d6d1ce3cef6 |
19-Oct-2007 |
Chris Lattner <sabre@nondot.org> |
Implement expansion of SINT_TO_FP and UINT_TO_FP operands.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43170 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAGTypes.cpp
|
| 0a4f31160b6ee626086a27085db0be9853de22f6 |
19-Oct-2007 |
Chris Lattner <sabre@nondot.org> |
Implement expansion of SINT_TO_FP and UINT_TO_FP operands.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43170 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAGTypes.cpp
|
| c99df1b8484365318aaab3593f7252a7d95fd5f3 |
19-Oct-2007 |
Chris Lattner <sabre@nondot.org> |
implement support for custom expansion of any node type, in one place.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43169 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAGTypes.cpp
|
| 9d8cab4bf926f1616c1cea4deea1ce29cc7e61f4 |
19-Oct-2007 |
Chris Lattner <sabre@nondot.org> |
implement support for custom expansion of any node type, in one place.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43169 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAGTypes.cpp
|
| 597ab48ca04e470dc90a2022ca7729dce68d092a |
19-Oct-2007 |
Chris Lattner <sabre@nondot.org> |
Make use of TLI.ExpandOperation, remove softfloat stuff.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43167 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAGTypes.cpp
|
| 232a9342c32f42f74ccd695c78b93307004f8f6f |
19-Oct-2007 |
Chris Lattner <sabre@nondot.org> |
Make use of TLI.ExpandOperation, remove softfloat stuff.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43167 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAGTypes.cpp
|
| c224a53d7aa077d36f1495b242d7c8e4f324754d |
19-Oct-2007 |
Chris Lattner <sabre@nondot.org> |
add expand support for bit_convert result, even allowing custom expansion.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43166 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAGTypes.cpp
|
| 3236e9024d89112ffda3d35c9fd531700d2fcd1b |
19-Oct-2007 |
Chris Lattner <sabre@nondot.org> |
add expand support for bit_convert result, even allowing custom expansion.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43166 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAGTypes.cpp
|
| f58dac31690f37c8f93328f8470298e1fe7862cc |
19-Oct-2007 |
Chris Lattner <sabre@nondot.org> |
add a new target hook.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43165 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 3e5c6d07559da67346bdb4b74a8319b6325a4379 |
19-Oct-2007 |
Chris Lattner <sabre@nondot.org> |
add a new target hook.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43165 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 1851898e757008228453aa3f4e3e06bbaecce04d |
19-Oct-2007 |
Bill Wendling <isanbard@gmail.com> |
Negative indices aren't allowed here.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43161 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| b502067433df7a567b3a95b7863582ccc8d8991b |
19-Oct-2007 |
Bill Wendling <isanbard@gmail.com> |
Negative indices aren't allowed here.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43161 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| fabd32deb025ebd47c5eb47259d2424fd789b05c |
19-Oct-2007 |
Dale Johannesen <dalej@apple.com> |
More ppcf128 issues (maybe the last)?
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43160 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 6f3c7bf111297eddf8e5799a3032dd0b6bde245d |
19-Oct-2007 |
Dale Johannesen <dalej@apple.com> |
More ppcf128 issues (maybe the last)?
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43160 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 90bfc2d10520f9621309436c1c6928a59cd33616 |
18-Oct-2007 |
Bill Wendling <isanbard@gmail.com> |
Pointer arithmetic should be done with the index the same size as the pointer.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43120 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 60f7b4d2a301ad02e2aee5174f65037d22d1d7e2 |
18-Oct-2007 |
Bill Wendling <isanbard@gmail.com> |
Pointer arithmetic should be done with the index the same size as the pointer.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43120 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 70ba3d480302187143faf4dc5226a6f3c7b71bc8 |
18-Oct-2007 |
Duncan Sands <baldrick@free.fr> |
Support for ADDC/SUBC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43119 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAGTypes.cpp
|
| 221ca0a430c9ff0e9e274cd93754186452ebf86f |
18-Oct-2007 |
Duncan Sands <baldrick@free.fr> |
Support for ADDC/SUBC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43119 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAGTypes.cpp
|
| c623096fe227a7705ccac5a5db514b64ccdfe6b2 |
17-Oct-2007 |
Dan Gohman <gohman@apple.com> |
Add support for ISD::SELECT in SplitVectorOp.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43072 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| d5d4c872e2fbfeb92795cdbb9fe946c20280facc |
17-Oct-2007 |
Dan Gohman <djg@cray.com> |
Add support for ISD::SELECT in SplitVectorOp.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43072 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| f411b83c8c6853c2a922b692e782566353153f08 |
17-Oct-2007 |
Duncan Sands <baldrick@free.fr> |
Return Expand from getOperationAction for all extended
types. This is needed for SIGN_EXTEND_INREG at least.
It is not clear if this is correct for other operations.
On the other hand, for the various load/store actions
it seems to correct to return the type action, as is
currently done.
Also, it seems that SelectionDAG::getValueType can be
called for extended value types; introduce a map for
holding these, since we don't really want to extend
the vector to be 2^32 pointers long!
Generalize DAGTypeLegalizer::PromoteResult_TRUNCATE
and DAGTypeLegalizer::PromoteResult_INT_EXTEND to handle
the various funky possibilities that apints introduce,
for example that you can promote to a type that needs
to be expanded.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43071 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
egalizeDAGTypes.cpp
electionDAG.cpp
|
| d7307a96c5fd0340b60e962caa8f5a531442c72f |
17-Oct-2007 |
Duncan Sands <baldrick@free.fr> |
Return Expand from getOperationAction for all extended
types. This is needed for SIGN_EXTEND_INREG at least.
It is not clear if this is correct for other operations.
On the other hand, for the various load/store actions
it seems to correct to return the type action, as is
currently done.
Also, it seems that SelectionDAG::getValueType can be
called for extended value types; introduce a map for
holding these, since we don't really want to extend
the vector to be 2^32 pointers long!
Generalize DAGTypeLegalizer::PromoteResult_TRUNCATE
and DAGTypeLegalizer::PromoteResult_INT_EXTEND to handle
the various funky possibilities that apints introduce,
for example that you can promote to a type that needs
to be expanded.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43071 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
egalizeDAGTypes.cpp
electionDAG.cpp
|
| db44bf85d832b26c398cda9acfd3473832f6e585 |
17-Oct-2007 |
Dale Johannesen <dalej@apple.com> |
Disable attempts to constant fold PPC f128.
Remove the assumption that this will happen from
various places.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43053 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
electionDAG.cpp
|
| b89072ee61cbc97a45f90da25419396a4f62283f |
17-Oct-2007 |
Dale Johannesen <dalej@apple.com> |
Disable attempts to constant fold PPC f128.
Remove the assumption that this will happen from
various places.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43053 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
electionDAG.cpp
|
| af47b11b959713d70c45bee1922e468adfaeaff0 |
16-Oct-2007 |
Duncan Sands <baldrick@free.fr> |
Initial infrastructure for arbitrary precision integer
codegen support. This should have no effect on codegen
for other types. Debatable bits: (1) the use (abuse?)
of a set in SDNode::getValueTypeList; (2) the length of
getTypeToTransformTo, which maybe should be refactored
with a non-inline part for extended value types.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43030 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| a9810f32ff738d554b6795d58929e990b2415c7b |
16-Oct-2007 |
Duncan Sands <baldrick@free.fr> |
Initial infrastructure for arbitrary precision integer
codegen support. This should have no effect on codegen
for other types. Debatable bits: (1) the use (abuse?)
of a set in SDNode::getValueTypeList; (2) the length of
getTypeToTransformTo, which maybe should be refactored
with a non-inline part for extended value types.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43030 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| a7c97a7f5b82778ca5abfc3791c6b7f96b82a5fa |
16-Oct-2007 |
Duncan Sands <baldrick@free.fr> |
Fixes due to lack of type-safety for ValueType: (1) ValueType
being passed instead of an opcode; (2) ValueType being passed
for isVolatile (!) in getLoad.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43028 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| b42a44e003aa488665981ad8fb11b671a2834343 |
16-Oct-2007 |
Duncan Sands <baldrick@free.fr> |
Fixes due to lack of type-safety for ValueType: (1) ValueType
being passed instead of an opcode; (2) ValueType being passed
for isVolatile (!) in getLoad.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43028 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 59e84258cb899de1f31e730cc5568386b66ccc4b |
16-Oct-2007 |
Chris Lattner <sabre@nondot.org> |
implement promotion of select and select_cc, allowing MallocBench/gs to
work with type promotion on x86.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43025 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAGTypes.cpp
|
| ca9b0ac227f43301a4a51326a0bc94b038d0314f |
16-Oct-2007 |
Chris Lattner <sabre@nondot.org> |
implement promotion of select and select_cc, allowing MallocBench/gs to
work with type promotion on x86.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43025 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAGTypes.cpp
|
| 4859e277f773180924241beeb25fb4c37f7fa337 |
15-Oct-2007 |
Evan Cheng <evan.cheng@apple.com> |
Make CalcLatency() non-recursive.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43017 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGList.cpp
|
| f4aeeee312e009ff4a9f424f8fe5b36b79c6093c |
15-Oct-2007 |
Evan Cheng <evan.cheng@apple.com> |
Make CalcLatency() non-recursive.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43017 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGList.cpp
|
| 85dd3be7354f848231362bd70f6517c0e667f95d |
15-Oct-2007 |
Chris Lattner <sabre@nondot.org> |
Move CreateStackTemporary out to SelectionDAG
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42995 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 6fb53da769e50d3cc7a5c22e73f1177dd2c5e40c |
15-Oct-2007 |
Chris Lattner <sabre@nondot.org> |
Move CreateStackTemporary out to SelectionDAG
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42995 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 37ce9df0da6cddc3b8bfef9b63d33d058a0f2f15 |
15-Oct-2007 |
Chris Lattner <sabre@nondot.org> |
add a new CreateStackTemporary helper method.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42994 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 53f5aee28e0f06df7372f637853b71663571b2bf |
15-Oct-2007 |
Chris Lattner <sabre@nondot.org> |
add a new CreateStackTemporary helper method.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42994 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| cfc24007b13564c6720571a2e809cf84fda67737 |
15-Oct-2007 |
Chris Lattner <sabre@nondot.org> |
implement promotion of BR_CC operands, fixing bisort on ppc.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42992 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAGTypes.cpp
|
| 68f6d16711acf519f39f63730bb66f8e2a893ef8 |
15-Oct-2007 |
Chris Lattner <sabre@nondot.org> |
implement promotion of BR_CC operands, fixing bisort on ppc.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42992 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAGTypes.cpp
|
| 1296e9d306e32ee475e5f01826032e736698b5da |
15-Oct-2007 |
Chris Lattner <sabre@nondot.org> |
updates from duncan
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42991 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAGTypes.cpp
|
| 4ac63208f1ce76820f442d4d46b789ef5773165e |
15-Oct-2007 |
Chris Lattner <sabre@nondot.org> |
updates from duncan
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42991 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAGTypes.cpp
|
| 65f8d3bf6bd49e08d1a8f845e4a91e67228d564c |
15-Oct-2007 |
Duncan Sands <baldrick@free.fr> |
Fix some typos. Call getTypeToTransformTo rather than
getTypeToExpandTo. The difference is that
getTypeToExpandTo gives the final result of expansion
(eg: i128 -> i32 on a 32 bit machine) while
getTypeToTransformTo does just one step (i128 -> i64).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42982 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAGTypes.cpp
|
| 74ef38952f901006d42a78eb0c99663640a3f163 |
15-Oct-2007 |
Duncan Sands <baldrick@free.fr> |
Fix some typos. Call getTypeToTransformTo rather than
getTypeToExpandTo. The difference is that
getTypeToExpandTo gives the final result of expansion
(eg: i128 -> i32 on a 32 bit machine) while
getTypeToTransformTo does just one step (i128 -> i64).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42982 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAGTypes.cpp
|
| 01d029b82cb08367d81aa10cdc94d05360466649 |
15-Oct-2007 |
Chris Lattner <sabre@nondot.org> |
One mundane change: Change ReplaceAllUsesOfValueWith to *optionally*
take a deleted nodes vector, instead of requiring it.
One more significant change: Implement the start of a legalizer that
just works on types. This legalizer is designed to run before the
operation legalizer and ensure just that the input dag is transformed
into an output dag whose operand and result types are all legal, even
if the operations on those types are not.
This design/impl has the following advantages:
1. When finished, this will *significantly* reduce the amount of code in
LegalizeDAG.cpp. It will remove all the code related to promotion and
expansion as well as splitting and scalarizing vectors.
2. The new code is very simple, idiomatic, and modular: unlike
LegalizeDAG.cpp, it has no 3000 line long functions. :)
3. The implementation is completely iterative instead of recursive, good
for hacking on large dags without blowing out your stack.
4. The implementation updates nodes in place when possible instead of
deallocating and reallocating the entire graph that points to some
mutated node.
5. The code nicely separates out handling of operations with invalid
results from operations with invalid operands, making some cases
simpler and easier to understand.
6. The new -debug-only=legalize-types option is very very handy :),
allowing you to easily understand what legalize types is doing.
This is not yet done. Until the ifdef added to SelectionDAGISel.cpp is
enabled, this does nothing. However, this code is sufficient to legalize
all of the code in 186.crafty, olden and freebench on an x86 machine. The
biggest issues are:
1. Vectors aren't implemented at all yet
2. SoftFP is a mess, I need to talk to Evan about it.
3. No lowering to libcalls is implemented yet.
4. Various operations are missing etc.
5. There are FIXME's for stuff I hax0r'd out, like softfp.
Hey, at least it is a step in the right direction :). If you'd like to help,
just enable the #ifdef in SelectionDAGISel.cpp and compile code with it. If
this explodes it will tell you what needs to be implemented. Help is
certainly appreciated.
Once this goes in, we can do three things:
1. Add a new pass of dag combine between the "type legalizer" and "operation
legalizer" passes. This will let us catch some long-standing isel issues
that we miss because operation legalization often obfuscates the dag with
target-specific nodes.
2. We can rip out all of the type legalization code from LegalizeDAG.cpp,
making it much smaller and simpler. When that happens we can then
reimplement the core functionality left in it in a much more efficient and
non-recursive way.
3. Once the whole legalizer is non-recursive, we can implement whole-function
selectiondags maybe...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42981 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
egalizeDAGTypes.cpp
cheduleDAGRRList.cpp
electionDAG.cpp
electionDAGISel.cpp
|
| 8a2582060e6eed082ed099672f9f34f108b502e8 |
15-Oct-2007 |
Chris Lattner <sabre@nondot.org> |
One mundane change: Change ReplaceAllUsesOfValueWith to *optionally*
take a deleted nodes vector, instead of requiring it.
One more significant change: Implement the start of a legalizer that
just works on types. This legalizer is designed to run before the
operation legalizer and ensure just that the input dag is transformed
into an output dag whose operand and result types are all legal, even
if the operations on those types are not.
This design/impl has the following advantages:
1. When finished, this will *significantly* reduce the amount of code in
LegalizeDAG.cpp. It will remove all the code related to promotion and
expansion as well as splitting and scalarizing vectors.
2. The new code is very simple, idiomatic, and modular: unlike
LegalizeDAG.cpp, it has no 3000 line long functions. :)
3. The implementation is completely iterative instead of recursive, good
for hacking on large dags without blowing out your stack.
4. The implementation updates nodes in place when possible instead of
deallocating and reallocating the entire graph that points to some
mutated node.
5. The code nicely separates out handling of operations with invalid
results from operations with invalid operands, making some cases
simpler and easier to understand.
6. The new -debug-only=legalize-types option is very very handy :),
allowing you to easily understand what legalize types is doing.
This is not yet done. Until the ifdef added to SelectionDAGISel.cpp is
enabled, this does nothing. However, this code is sufficient to legalize
all of the code in 186.crafty, olden and freebench on an x86 machine. The
biggest issues are:
1. Vectors aren't implemented at all yet
2. SoftFP is a mess, I need to talk to Evan about it.
3. No lowering to libcalls is implemented yet.
4. Various operations are missing etc.
5. There are FIXME's for stuff I hax0r'd out, like softfp.
Hey, at least it is a step in the right direction :). If you'd like to help,
just enable the #ifdef in SelectionDAGISel.cpp and compile code with it. If
this explodes it will tell you what needs to be implemented. Help is
certainly appreciated.
Once this goes in, we can do three things:
1. Add a new pass of dag combine between the "type legalizer" and "operation
legalizer" passes. This will let us catch some long-standing isel issues
that we miss because operation legalization often obfuscates the dag with
target-specific nodes.
2. We can rip out all of the type legalization code from LegalizeDAG.cpp,
making it much smaller and simpler. When that happens we can then
reimplement the core functionality left in it in a much more efficient and
non-recursive way.
3. Once the whole legalizer is non-recursive, we can implement whole-function
selectiondags maybe...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42981 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
egalizeDAGTypes.cpp
cheduleDAGRRList.cpp
electionDAG.cpp
electionDAGISel.cpp
|
| 3cb9351e8a3691ee8cad6960601c6e3d4b293352 |
15-Oct-2007 |
Chris Lattner <sabre@nondot.org> |
One xform performed by LegalizeDAG is transformation of "store of fp" to "store of int".
Make two changes:
1) only xform "store of f32" if i32 is a legal type for the target.
2) only xform "store of f64" if either i64 or i32 are legal for the target.
3) if i64 isn't legal, manually lower to 2 stores of i32 instead of letting a
later pass of legalize do it. This is ugly, but helps future changes I'm
about to commit.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42980 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 19f229a5aa5fa80405a67fd662e5e53c9a3a451e |
15-Oct-2007 |
Chris Lattner <sabre@nondot.org> |
One xform performed by LegalizeDAG is transformation of "store of fp" to "store of int".
Make two changes:
1) only xform "store of f32" if i32 is a legal type for the target.
2) only xform "store of f64" if either i64 or i32 are legal for the target.
3) if i64 isn't legal, manually lower to 2 stores of i32 instead of letting a
later pass of legalize do it. This is ugly, but helps future changes I'm
about to commit.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42980 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 59afba0fe997c9f65abd66a4c3902ee2064abc4b |
15-Oct-2007 |
Chris Lattner <sabre@nondot.org> |
Add a (disabled by default) way to view the ID of a node.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42978 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGPrinter.cpp
|
| 7271a2d49ee103d63154bc87d5b921213d50cd0b |
15-Oct-2007 |
Chris Lattner <sabre@nondot.org> |
Add a (disabled by default) way to view the ID of a node.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42978 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGPrinter.cpp
|
| 7a3c85583d523edb90aa957a02385254957c6e37 |
14-Oct-2007 |
Chris Lattner <sabre@nondot.org> |
remove misleading comment.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42970 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 8c9314547dbfbe149b7b89ab3d3991447b0be71b |
14-Oct-2007 |
Chris Lattner <sabre@nondot.org> |
remove misleading comment.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42970 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| fb5b11046bfc27e4c8388f4b3d7f1adc927f7fe6 |
14-Oct-2007 |
Chris Lattner <sabre@nondot.org> |
If a target doesn't have HasMULHU or HasUMUL_LOHI, ExpandOp would return
without lo/hi set. Fall through to making a libcall instead.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42969 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 7048cc6604a095798ad251b5570c263ef0e77a34 |
14-Oct-2007 |
Chris Lattner <sabre@nondot.org> |
If a target doesn't have HasMULHU or HasUMUL_LOHI, ExpandOp would return
without lo/hi set. Fall through to making a libcall instead.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42969 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 5927d8e94d0b50296c2af4acdfe4d799e369fc08 |
14-Oct-2007 |
Dale Johannesen <dalej@apple.com> |
Disable some compile-time optimizations on PPC
long double.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42958 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 80ca14c85ebd6dd0e0e9c5e6a0aa321cbbb352e9 |
14-Oct-2007 |
Dale Johannesen <dalej@apple.com> |
Disable some compile-time optimizations on PPC
long double.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42958 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| e33544ce55ca18e6e9c90ab7a4de85c90f907258 |
13-Oct-2007 |
Chris Lattner <sabre@nondot.org> |
Enhance the truncstore optimization code to handle shifted
values and propagate demanded bits through them in simple cases.
This allows this code:
void foo(char *P) {
strcpy(P, "abc");
}
to compile to:
_foo:
ldrb r3, [r1]
ldrb r2, [r1, #+1]
ldrb r12, [r1, #+2]!
ldrb r1, [r1, #+1]
strb r1, [r0, #+3]
strb r2, [r0, #+1]
strb r12, [r0, #+2]
strb r3, [r0]
bx lr
instead of:
_foo:
ldrb r3, [r1, #+3]
ldrb r2, [r1, #+2]
orr r3, r2, r3, lsl #8
ldrb r2, [r1, #+1]
ldrb r1, [r1]
orr r2, r1, r2, lsl #8
orr r3, r2, r3, lsl #16
strb r3, [r0]
mov r2, r3, lsr #24
strb r2, [r0, #+3]
mov r2, r3, lsr #16
strb r2, [r0, #+2]
mov r3, r3, lsr #8
strb r3, [r0, #+1]
bx lr
testcase here: test/CodeGen/ARM/truncstore-dag-combine.ll
This also helps occasionally for X86 and other cases not involving
unaligned load/stores.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42954 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| b77ea550467091e8840d06886dc068f62e9e1c99 |
13-Oct-2007 |
Chris Lattner <sabre@nondot.org> |
Enhance the truncstore optimization code to handle shifted
values and propagate demanded bits through them in simple cases.
This allows this code:
void foo(char *P) {
strcpy(P, "abc");
}
to compile to:
_foo:
ldrb r3, [r1]
ldrb r2, [r1, #+1]
ldrb r12, [r1, #+2]!
ldrb r1, [r1, #+1]
strb r1, [r0, #+3]
strb r2, [r0, #+1]
strb r12, [r0, #+2]
strb r3, [r0]
bx lr
instead of:
_foo:
ldrb r3, [r1, #+3]
ldrb r2, [r1, #+2]
orr r3, r2, r3, lsl #8
ldrb r2, [r1, #+1]
ldrb r1, [r1]
orr r2, r1, r2, lsl #8
orr r3, r2, r3, lsl #16
strb r3, [r0]
mov r2, r3, lsr #24
strb r2, [r0, #+3]
mov r2, r3, lsr #16
strb r2, [r0, #+2]
mov r3, r3, lsr #8
strb r3, [r0, #+1]
bx lr
testcase here: test/CodeGen/ARM/truncstore-dag-combine.ll
This also helps occasionally for X86 and other cases not involving
unaligned load/stores.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42954 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 2b4c279a8e203fa8b13adf7ba3a5d4c8bef70df3 |
13-Oct-2007 |
Chris Lattner <sabre@nondot.org> |
Add a simple optimization to simplify the input to
truncate and truncstore instructions, based on the
knowledge that they don't demand the top bits.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42952 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
egalizeDAG.cpp
|
| e8671c5b8756ea7eef8898e52859dd8635e567bf |
13-Oct-2007 |
Chris Lattner <sabre@nondot.org> |
Add a simple optimization to simplify the input to
truncate and truncstore instructions, based on the
knowledge that they don't demand the top bits.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42952 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
egalizeDAG.cpp
|
| 48abc5cf6ba6d53513034aa8c68b0a9abd748190 |
12-Oct-2007 |
Arnold Schwaighofer <arnold.schwaighofer@gmail.com> |
Corrected many typing errors. And removed 'nest' parameter handling
for fastcc from X86CallingConv.td. This means that nested functions
are not supported for calling convention 'fastcc'.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42934 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 373e865aae83b50dfd2e2caa7038082f8d0216bb |
12-Oct-2007 |
Arnold Schwaighofer <arnold.schwaighofer@gmail.com> |
Corrected many typing errors. And removed 'nest' parameter handling
for fastcc from X86CallingConv.td. This means that nested functions
are not supported for calling convention 'fastcc'.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42934 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| f646774edd2588f6aa866ceb5e1b921f924a246f |
12-Oct-2007 |
Dale Johannesen <dalej@apple.com> |
ppc long double. Implement fabs and fneg.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42924 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 5707ef835b62d0c5e3bafee6aa331f6cfa67bddf |
12-Oct-2007 |
Dale Johannesen <dalej@apple.com> |
ppc long double. Implement fabs and fneg.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42924 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 6e63e092365b763b65cc97a4d2c634443046c15a |
12-Oct-2007 |
Dale Johannesen <dalej@apple.com> |
Implement i64->ppcf128 conversions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42919 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 9aec5b219861e4290deb7b037cff95854c057b79 |
12-Oct-2007 |
Dale Johannesen <dalej@apple.com> |
Implement i64->ppcf128 conversions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42919 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| a9b511187b5450ec2e241f45b640358bfdc9c42c |
12-Oct-2007 |
Dan Gohman <gohman@apple.com> |
Fix some corner cases with vectors in copyToRegs and copyFromRegs.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42907 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| c68a8de07faba0881b25a8eb9346deced1e024fd |
12-Oct-2007 |
Dan Gohman <djg@cray.com> |
Fix some corner cases with vectors in copyToRegs and copyFromRegs.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42907 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 9e04c82c0ec7c94d82168c07177ff9d1fea5b9d5 |
12-Oct-2007 |
Dan Gohman <gohman@apple.com> |
Add support to SplitVectorOp for powi, where the second operand
is a scalar integer.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42906 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| ae4c2f8b1a375dc9ecd8305061d35553b2d73536 |
12-Oct-2007 |
Dan Gohman <djg@cray.com> |
Add support to SplitVectorOp for powi, where the second operand
is a scalar integer.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42906 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 32dfbeada7292167bb488f36a71a5a6a519ddaff |
12-Oct-2007 |
Evan Cheng <evan.cheng@apple.com> |
EXTRACT_SUBREG coalescing support. The coalescer now treats EXTRACT_SUBREG like
(almost) a register copy. However, it always coalesced to the register of the
RHS (the super-register). All uses of the result of a EXTRACT_SUBREG are sub-
register uses which adds subtle complications to load folding, spiller rewrite,
etc.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42899 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAG.cpp
cheduleDAGRRList.cpp
|
| 687d1080abc51aac365d4f263ef206162815a86a |
12-Oct-2007 |
Evan Cheng <evan.cheng@apple.com> |
EXTRACT_SUBREG coalescing support. The coalescer now treats EXTRACT_SUBREG like
(almost) a register copy. However, it always coalesced to the register of the
RHS (the super-register). All uses of the result of a EXTRACT_SUBREG are sub-
register uses which adds subtle complications to load folding, spiller rewrite,
etc.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42899 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAG.cpp
cheduleDAGRRList.cpp
|
| ca68aaa0e50c4037c0faa9bfbe7e091087837259 |
12-Oct-2007 |
Dale Johannesen <dalej@apple.com> |
PPC long double. Implement a couple more conversions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42888 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 4c14d512ea8e8fd8ec625604cf82275e319303d9 |
12-Oct-2007 |
Dale Johannesen <dalej@apple.com> |
PPC long double. Implement a couple more conversions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42888 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| ac9385a5557ee2f34a509d39c58a8557a0ff686d |
12-Oct-2007 |
Dan Gohman <gohman@apple.com> |
Add intrinsics for sin, cos, and pow. These use llvm_anyfloat_ty, and so
may be overloaded with vector types. And add a testcase for codegen for
these.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42885 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| e1bb8c1838800f6817b7d80a58e41b1ef09a4f34 |
12-Oct-2007 |
Dan Gohman <djg@cray.com> |
Add intrinsics for sin, cos, and pow. These use llvm_anyfloat_ty, and so
may be overloaded with vector types. And add a testcase for codegen for
these.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42885 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 826695281344e3a4c4d44d73dd155107aafd689b |
12-Oct-2007 |
Dan Gohman <gohman@apple.com> |
Codegen support for vector intrinsics.
Factor out the code that expands the "nasty scalar code" for unrolling
vectors into a separate routine, teach it how to handle mixed
vector/scalar operands, as seen in powi, and use it for several operators,
including sin, cos, powi, and pow.
Add support in SplitVectorOp for fpow, fpowi and for several unary
operators.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42884 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 6d05cac05bddb54c7c88dd1337b21fadcb5124c8 |
12-Oct-2007 |
Dan Gohman <djg@cray.com> |
Codegen support for vector intrinsics.
Factor out the code that expands the "nasty scalar code" for unrolling
vectors into a separate routine, teach it how to handle mixed
vector/scalar operands, as seen in powi, and use it for several operators,
including sin, cos, powi, and pow.
Add support in SplitVectorOp for fpow, fpowi and for several unary
operators.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42884 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| fcf4d24ffbba0935de3e8371cfd52fc3d6980789 |
12-Oct-2007 |
Dale Johannesen <dalej@apple.com> |
Implement ppc long double->uint conversion.
Make ppc long double constants print.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42882 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| d3b6af370126a696c74e5fdbba4a6590b5866ad7 |
12-Oct-2007 |
Dale Johannesen <dalej@apple.com> |
Implement ppc long double->uint conversion.
Make ppc long double constants print.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42882 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| e54be104180d81b61c5fcc29ccb7960f9b78476e |
12-Oct-2007 |
Dan Gohman <gohman@apple.com> |
Add runtime library names for pow.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42880 91177308-0d34-0410-b5e6-96231b3b80d8
argetLowering.cpp
|
| fe67863e270972822d09cfc7e600e112508e9fa0 |
12-Oct-2007 |
Dan Gohman <djg@cray.com> |
Add runtime library names for pow.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42880 91177308-0d34-0410-b5e6-96231b3b80d8
argetLowering.cpp
|
| 07f04fd574a59c690f297fd10c2e0dd14093675e |
12-Oct-2007 |
Dan Gohman <gohman@apple.com> |
Add an ISD::FPOW node type.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42879 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 1d744bbe789014cd057ff17b72ca154d52f144d2 |
12-Oct-2007 |
Dan Gohman <djg@cray.com> |
Add an ISD::FPOW node type.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42879 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| c85e1716f0e45e4c18a9ef2fbe431a51ac3a4252 |
11-Oct-2007 |
Arnold Schwaighofer <arnold.schwaighofer@gmail.com> |
Added tail call optimization to the x86 back end. It can be
enabled by passing -tailcallopt to llc. The optimization is
performed if the following conditions are satisfied:
* caller/callee are fastcc
* elf/pic is disabled OR
elf/pic enabled + callee is in module + callee has
visibility protected or hidden
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42870 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| e2d6bbb00da7530c4f8846774bfeddeef56f66ed |
11-Oct-2007 |
Arnold Schwaighofer <arnold.schwaighofer@gmail.com> |
Added tail call optimization to the x86 back end. It can be
enabled by passing -tailcallopt to llc. The optimization is
performed if the following conditions are satisfied:
* caller/callee are fastcc
* elf/pic is disabled OR
elf/pic enabled + callee is in module + callee has
visibility protected or hidden
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42870 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| a471c2ecda37cd1bae0d94e832f002caa7b63216 |
11-Oct-2007 |
Dale Johannesen <dalej@apple.com> |
Next PPC long double bits. First cut at constants.
No compile-time support for constant operations yet,
just format transformations. Make readers and
writers work. Split constants into 2 doubles in
Legalize.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42865 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 2aef569811b24bf254b27cab0f6307c2c8d27d17 |
11-Oct-2007 |
Dale Johannesen <dalej@apple.com> |
Next PPC long double bits. First cut at constants.
No compile-time support for constant operations yet,
just format transformations. Make readers and
writers work. Split constants into 2 doubles in
Legalize.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42865 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 272dce013727398ff9a8726bc720bc6ecff81184 |
10-Oct-2007 |
Duncan Sands <baldrick@free.fr> |
Correct swapped arguments to getConstant.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42824 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| bed2147264e6fc3a09146e4d3dcf070c9cd27f08 |
10-Oct-2007 |
Duncan Sands <baldrick@free.fr> |
Correct swapped arguments to getConstant.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42824 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 6eaeff29b8a6990107735f7e5f5e49da38f56223 |
10-Oct-2007 |
Dale Johannesen <dalej@apple.com> |
Next PPC long double bits: ppcf128->i32 conversion.
Surprisingly complicated.
Adds getTargetNode for 2 outputs, no inputs (missing).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42822 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
electionDAG.cpp
|
| 3d8578b72446ca42809bbeb67be3e2126ecb3583 |
10-Oct-2007 |
Dale Johannesen <dalej@apple.com> |
Next PPC long double bits: ppcf128->i32 conversion.
Surprisingly complicated.
Adds getTargetNode for 2 outputs, no inputs (missing).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42822 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
electionDAG.cpp
|
| 525178cdbf00720ea8bce297a7d65b0cca0ab439 |
08-Oct-2007 |
Dan Gohman <gohman@apple.com> |
Migrate X86 and ARM from using X86ISD::{,I}DIV and ARMISD::MULHILO{U,S} to
use ISD::{S,U}DIVREM and ISD::{S,U}MUL_HIO. Move the lowering code
associated with these operators into target-independent in LegalizeDAG.cpp
and TargetLowering.cpp.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42762 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
argetLowering.cpp
|
| 5a199558c23d400e3dd83a9c7cab754c77778956 |
08-Oct-2007 |
Dan Gohman <djg@cray.com> |
Migrate X86 and ARM from using X86ISD::{,I}DIV and ARMISD::MULHILO{U,S} to
use ISD::{S,U}DIVREM and ISD::{S,U}MUL_HIO. Move the lowering code
associated with these operators into target-independent in LegalizeDAG.cpp
and TargetLowering.cpp.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42762 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
argetLowering.cpp
|
| 389079b59f6fc1283eeed407df36959a3fbc0e48 |
08-Oct-2007 |
Dan Gohman <gohman@apple.com> |
DAGCombiner support for UDIVREM/SDIVREM and UMUL_LOHI/SMUL_LOHI.
Check if one of the two results unneeded so see if a simpler operator
could bs used. Also check to see if each of the two computations could be
simplified if they were split into separate operators. Factor out the code
that calls visit() so that it can be used for this purpose.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42759 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 6c89ea78bcceb54fdf347bb2df19d42e0c98d9bd |
08-Oct-2007 |
Dan Gohman <djg@cray.com> |
DAGCombiner support for UDIVREM/SDIVREM and UMUL_LOHI/SMUL_LOHI.
Check if one of the two results unneeded so see if a simpler operator
could bs used. Also check to see if each of the two computations could be
simplified if they were split into separate operators. Factor out the code
that calls visit() so that it can be used for this purpose.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42759 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 08ce9769718354e6767d3815e4c255e7c9fc0a46 |
08-Oct-2007 |
Dan Gohman <gohman@apple.com> |
Add convenience overloads of SelectionDAG::getNode that take a SDVTList
and individual SDOperand operands.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42753 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 798d127ff6a22d89609e852678dc3c272bb8034d |
08-Oct-2007 |
Dan Gohman <djg@cray.com> |
Add convenience overloads of SelectionDAG::getNode that take a SDVTList
and individual SDOperand operands.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42753 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 417e11b9bf625b3626f8765d44248927fb200906 |
08-Oct-2007 |
Dan Gohman <gohman@apple.com> |
In -debug mode, dump SelectionDAGs both before and after the
optimization passes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42749 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| eebf44e7264e1caf85b96e166373e5be6994cad2 |
08-Oct-2007 |
Dan Gohman <djg@cray.com> |
In -debug mode, dump SelectionDAGs both before and after the
optimization passes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42749 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| ccf596a53e16ea221a9bf8b3874a7d6afa71f1f4 |
07-Oct-2007 |
Neil Booth <neil@daikokuya.co.uk> |
convertFromInteger, as originally written, expected sign-extended
input. APInt unfortunately zero-extends signed integers, so Dale
modified the function to expect zero-extended input. Make this
assumption explicit in the function name.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42732 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
electionDAG.cpp
|
| 4bdd45a1cdc1f329ce090b3dfd288b99db6c7fc6 |
07-Oct-2007 |
Neil Booth <neil@daikokuya.co.uk> |
convertFromInteger, as originally written, expected sign-extended
input. APInt unfortunately zero-extends signed integers, so Dale
modified the function to expect zero-extended input. Make this
assumption explicit in the function name.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42732 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
electionDAG.cpp
|
| 513da43c9c290094e3f12c0d1ba07c18f062d13c |
06-Oct-2007 |
Evan Cheng <evan.cheng@apple.com> |
Reapply 42677.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42692 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| d7ba7edc40d8b10972b4480e8e5db54e13edcb14 |
06-Oct-2007 |
Evan Cheng <evan.cheng@apple.com> |
Reapply 42677.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42692 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 5349de1372dabab40691d348f2404da1e1478ef7 |
06-Oct-2007 |
Chris Lattner <sabre@nondot.org> |
revert evan's patch until the header is committed
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42686 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 5a98f096c33623a15e8d91bbb653b4e6fb60f8a1 |
06-Oct-2007 |
Chris Lattner <sabre@nondot.org> |
revert evan's patch until the header is committed
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42686 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| c231e8c8a5af35bbecf7eca34a23e519083b1422 |
06-Oct-2007 |
Evan Cheng <evan.cheng@apple.com> |
Added DAG xforms. e.g.
(vextract (v4f32 s2v (f32 load $addr)), 0) -> (f32 load $addr)
(vextract (v4i32 bc (v4f32 s2v (f32 load $addr))), 0) -> (i32 load $addr)
Remove x86 specific patterns.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42677 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 5c57c7cef75d9d06bd51dba10a0c2f74467b0626 |
06-Oct-2007 |
Evan Cheng <evan.cheng@apple.com> |
Added DAG xforms. e.g.
(vextract (v4f32 s2v (f32 load $addr)), 0) -> (f32 load $addr)
(vextract (v4i32 bc (v4f32 s2v (f32 load $addr))), 0) -> (i32 load $addr)
Remove x86 specific patterns.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42677 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 638ccd52b9fa2d1d03a1e85992c09e2bf6800fc6 |
06-Oct-2007 |
Dale Johannesen <dalej@apple.com> |
Next powerpc long double bits. Comparisons work,
although not well, and shortening FP converts.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42672 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 472d15dc983079b244cb98c054120815bb32fffe |
06-Oct-2007 |
Dale Johannesen <dalej@apple.com> |
Next powerpc long double bits. Comparisons work,
although not well, and shortening FP converts.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42672 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 161e897b0fb35d156b2fe720fadabd975b0d6723 |
05-Oct-2007 |
Dale Johannesen <dalej@apple.com> |
First round of ppc long double. call/return and
basic arithmetic works.
Rename RTLIB long double functions to distinguish
different flavors of long double; the lib functions
have different names, alas.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42644 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
argetLowering.cpp
|
| ac77b2705767f57f2916a8ddf13f321aab8ca886 |
05-Oct-2007 |
Dale Johannesen <dalej@apple.com> |
First round of ppc long double. call/return and
basic arithmetic works.
Rename RTLIB long double functions to distinguish
different flavors of long double; the lib functions
have different names, alas.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42644 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
argetLowering.cpp
|
| e14ea867449cffa9a5835bc62c9c557ab0bc6618 |
05-Oct-2007 |
Dan Gohman <gohman@apple.com> |
Legalize support for MUL_LOHI and DIVREM.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42636 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 475cd73517e6a3b80bec936cbafcf7a53cdb9d7d |
05-Oct-2007 |
Dan Gohman <djg@cray.com> |
Legalize support for MUL_LOHI and DIVREM.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42636 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 2eb4ebd953314d7c7f96cfb5897d8ded94f6c9d4 |
05-Oct-2007 |
Dan Gohman <gohman@apple.com> |
Fix a typo in a comment.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42635 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGRRList.cpp
|
| 54ab4ec68e3d026457524f1d8f8c08b6643d1944 |
05-Oct-2007 |
Dan Gohman <djg@cray.com> |
Fix a typo in a comment.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42635 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGRRList.cpp
|
| ccd60799cdc9b75ddc971c02f0a1bf3bd7f48aba |
05-Oct-2007 |
Dan Gohman <gohman@apple.com> |
Provide names for MUL_LOHI and DIVREM operators.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42634 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| b945cee576f2d3470e2f2fcc5d3e0b4c5217287e |
05-Oct-2007 |
Dan Gohman <djg@cray.com> |
Provide names for MUL_LOHI and DIVREM operators.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42634 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| d5cb5a462b6fd91bf54116c3eefc3b046489c414 |
05-Oct-2007 |
Evan Cheng <evan.cheng@apple.com> |
Chain producing nodes cannot be moved, not chain reading nodes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42627 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGRRList.cpp
|
| da5a9699449c304922708f71e91c0078ca258531 |
05-Oct-2007 |
Evan Cheng <evan.cheng@apple.com> |
Chain producing nodes cannot be moved, not chain reading nodes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42627 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGRRList.cpp
|
| 117c3662192bb8590255b0f4435d8e31e5656a57 |
05-Oct-2007 |
Evan Cheng <evan.cheng@apple.com> |
Oops. Didn't mean to leave this in.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42626 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGRRList.cpp
|
| 01b2b8170e832653706931b7c80ec86751daccce |
05-Oct-2007 |
Evan Cheng <evan.cheng@apple.com> |
Oops. Didn't mean to leave this in.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42626 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGRRList.cpp
|
| f10c973797cf79da802f9b0118543cbd50954c9c |
05-Oct-2007 |
Evan Cheng <evan.cheng@apple.com> |
If a node that defines a physical register that is expensive to copy. The
scheduler will try a number of tricks in order to avoid generating the
copies. This may not be possible in case the node produces a chain value
that prevent movement. Try unfolding the load from the node before to allow
it to be moved / cloned.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42625 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAG.cpp
cheduleDAGRRList.cpp
|
| dd3f8b94fd690a11357cdafb95db4f1be97777ac |
05-Oct-2007 |
Evan Cheng <evan.cheng@apple.com> |
If a node that defines a physical register that is expensive to copy. The
scheduler will try a number of tricks in order to avoid generating the
copies. This may not be possible in case the node produces a chain value
that prevent movement. Try unfolding the load from the node before to allow
it to be moved / cloned.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42625 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAG.cpp
cheduleDAGRRList.cpp
|
| 39305cf55363046162c5a992f96f26d607a204e5 |
05-Oct-2007 |
Evan Cheng <evan.cheng@apple.com> |
Add a variant of getTargetNode() that takes a vector of MVT::ValueType.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42620 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| e3940911eb8f592cb319fb279890c4b08d6204a4 |
05-Oct-2007 |
Evan Cheng <evan.cheng@apple.com> |
Add a variant of getTargetNode() that takes a vector of MVT::ValueType.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42620 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| daccea18ca8357b4193ac3ba42a168e650b807e0 |
05-Oct-2007 |
Evan Cheng <evan.cheng@apple.com> |
Silence a warning.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42619 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 9bdaeaaadd3442ab27c6a60c412a7cbf0db92978 |
05-Oct-2007 |
Evan Cheng <evan.cheng@apple.com> |
Silence a warning.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42619 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| cb406c25973b4e88a6c10ad839ef1beeb3664715 |
03-Oct-2007 |
Dan Gohman <gohman@apple.com> |
Use empty() member functions when that's what's being tested for instead
of comparing begin() and end().
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42585 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAG.cpp
|
| 3f7d94b6cd40a3653c000f4b2e166c82dc3e3715 |
03-Oct-2007 |
Dan Gohman <djg@cray.com> |
Use empty() member functions when that's what's being tested for instead
of comparing begin() and end().
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42585 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAG.cpp
|
| 9ab7fb3ba47442d521a5bed09a27a5e8e7a786ed |
02-Oct-2007 |
Dale Johannesen <dalej@apple.com> |
Rewrite sqrt and powi to use anyfloat. By popular demand.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42537 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| c339d8efc813edf9c933b27478100191d949ac26 |
02-Oct-2007 |
Dale Johannesen <dalej@apple.com> |
Rewrite sqrt and powi to use anyfloat. By popular demand.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42537 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| a7ac2bd4076096bb3a9986dd5a44f20c7f715518 |
02-Oct-2007 |
Dale Johannesen <dalej@apple.com> |
Fix stride computations for long double arrays.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42508 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 5ec2e73dd166caacc6d746b148d8fbbc5f3006cf |
02-Oct-2007 |
Dale Johannesen <dalej@apple.com> |
Fix stride computations for long double arrays.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42508 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 450ff01faf47b48d9f0aea68b7676a20644fd0fc |
01-Oct-2007 |
Evan Cheng <evan.cheng@apple.com> |
Remove simple scheduler.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42499 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGSimple.cpp
|
| 71a090cd77014898ac532bf9b0bdf0289c7e445b |
01-Oct-2007 |
Evan Cheng <evan.cheng@apple.com> |
Remove simple scheduler.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42499 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGSimple.cpp
|
| d89b117850d1ebcc1390f23891b6ac0b64c99045 |
30-Sep-2007 |
Dale Johannesen <dalej@apple.com> |
remove dup comment
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42486 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| f37b54b475394ed08f4c1edb42dc765df9189688 |
30-Sep-2007 |
Dale Johannesen <dalej@apple.com> |
remove dup comment
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42486 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 88216af3ea4bb1c68a8793ed1d3b30308b64ab0e |
30-Sep-2007 |
Dale Johannesen <dalej@apple.com> |
Constant fold int-to-long-double conversions;
use APFloat for int-to-float/double; use
round-to-nearest for these (implementation-defined,
seems to match gcc).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42484 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
electionDAG.cpp
|
| 87fa68f68eb00accc7cd87ef0e8df0a53f3d6ee9 |
30-Sep-2007 |
Dale Johannesen <dalej@apple.com> |
Constant fold int-to-long-double conversions;
use APFloat for int-to-float/double; use
round-to-nearest for these (implementation-defined,
seems to match gcc).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42484 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
electionDAG.cpp
|
| 9fe4662d9a9e5b346dc053b6a53bc3d096adb77b |
29-Sep-2007 |
Dan Gohman <gohman@apple.com> |
Teach SplitVectorOp how to split INSERT_VECTOR_ELT.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42457 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| b3228dcf956c576a195e0be2d1bb833617a3e7cc |
29-Sep-2007 |
Dan Gohman <djg@cray.com> |
Teach SplitVectorOp how to split INSERT_VECTOR_ELT.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42457 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 22a529990bb4bb86bdb2ae1cfce7340320a6ca7f |
29-Sep-2007 |
Evan Cheng <evan.cheng@apple.com> |
If two instructions are both two-address code, favors (schedule closer to
terminator) the one that has a CopyToReg use. This fixes
2006-05-11-InstrSched.ll with -new-cc-modeling-scheme.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42453 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAG.cpp
cheduleDAGRRList.cpp
|
| ba597da943f93db7849837368d79476518db4333 |
29-Sep-2007 |
Evan Cheng <evan.cheng@apple.com> |
If two instructions are both two-address code, favors (schedule closer to
terminator) the one that has a CopyToReg use. This fixes
2006-05-11-InstrSched.ll with -new-cc-modeling-scheme.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42453 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAG.cpp
cheduleDAGRRList.cpp
|
| ddde335cb79d67c46c04b2a0ffd18750b6f70e28 |
28-Sep-2007 |
Evan Cheng <evan.cheng@apple.com> |
Remove a poor scheduling heuristic.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42443 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGRRList.cpp
|
| 3a88e370517e6400b1eb7a159e872140f0658002 |
28-Sep-2007 |
Evan Cheng <evan.cheng@apple.com> |
Remove a poor scheduling heuristic.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42443 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGRRList.cpp
|
| 74d2fd8dd847e0ebccef30e2c5907ff09495d518 |
28-Sep-2007 |
Evan Cheng <evan.cheng@apple.com> |
Trim some unneeded fields.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42442 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAG.cpp
cheduleDAGList.cpp
cheduleDAGRRList.cpp
|
| 6a64235d9037213c1a276391c4e7481e67f14b6c |
28-Sep-2007 |
Evan Cheng <evan.cheng@apple.com> |
Trim some unneeded fields.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42442 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAG.cpp
cheduleDAGList.cpp
cheduleDAGRRList.cpp
|
| 72292f07122de9c8bd41b85e94cb2d3235eca0c9 |
28-Sep-2007 |
Dale Johannesen <dalej@apple.com> |
Fix long double -> uint64 conversion.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42440 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 4e1cf5d4340f11e2d4175437482bc84178336e8f |
28-Sep-2007 |
Dale Johannesen <dalej@apple.com> |
Fix long double -> uint64 conversion.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42440 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 317096ab3710fda0960be58804e9f80c800340f6 |
28-Sep-2007 |
Dale Johannesen <dalej@apple.com> |
Add sqrt and powi intrinsics for long double.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42423 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
electionDAGISel.cpp
argetLowering.cpp
|
| 0c81a52b0e13160103f3da0303f5d23a1551ee26 |
28-Sep-2007 |
Dale Johannesen <dalej@apple.com> |
Add sqrt and powi intrinsics for long double.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42423 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
electionDAGISel.cpp
argetLowering.cpp
|
| cd1c00cc6521c265784ffc7a1b5baf4ef64d80bc |
27-Sep-2007 |
Evan Cheng <evan.cheng@apple.com> |
Avoid inserting a live register more than once.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42410 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGRRList.cpp
|
| bbb220dd6ff7da605c924f87cbe3aa2c1994a524 |
27-Sep-2007 |
Evan Cheng <evan.cheng@apple.com> |
Avoid inserting a live register more than once.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42410 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGRRList.cpp
|
| 64f638df568f2849b485cc50836efc734e367fc7 |
27-Sep-2007 |
Evan Cheng <evan.cheng@apple.com> |
Silence a compiler warning.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42389 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 2018681e1d5ee5b47cbfeea88bf7f41259069e39 |
27-Sep-2007 |
Evan Cheng <evan.cheng@apple.com> |
Silence a compiler warning.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42389 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 2dc7a0e075f619ecd657acdb19c4be8af051e35c |
27-Sep-2007 |
Evan Cheng <evan.cheng@apple.com> |
Boogs.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42388 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGRRList.cpp
|
| dc07d96051f41a0b30c911e32ff67f8a53a5bdf8 |
27-Sep-2007 |
Evan Cheng <evan.cheng@apple.com> |
Boogs.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42388 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGRRList.cpp
|
| a2ee2756f7f80d24312d6ac41b4f2ae548441cac |
27-Sep-2007 |
Evan Cheng <evan.cheng@apple.com> |
Be smarter about which node to force schedule. Reduce # of duplications + copies; Added statistics.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42387 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGRRList.cpp
|
| 01f82cade49881cf4e294ede4fe688c07650b487 |
27-Sep-2007 |
Evan Cheng <evan.cheng@apple.com> |
Be smarter about which node to force schedule. Reduce # of duplications + copies; Added statistics.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42387 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGRRList.cpp
|
| 6e4c46cea5daef8bc807a36ce2ab9bb7f9855b67 |
27-Sep-2007 |
Evan Cheng <evan.cheng@apple.com> |
Backtracking only when it won't create a cycle.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42384 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGRRList.cpp
|
| 75425623ecec7a0532c2600aa7a2a9c613c6faa5 |
27-Sep-2007 |
Evan Cheng <evan.cheng@apple.com> |
Backtracking only when it won't create a cycle.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42384 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGRRList.cpp
|
| 42d60274eaa70f8cdbed76d04d25d7a8fc1237cb |
26-Sep-2007 |
Evan Cheng <evan.cheng@apple.com> |
- Move getPhysicalRegisterRegClass() from ScheduleDAG to MRegisterInfo.
- Added ability to emit cross class register copies to the BBRU scheduler.
- More aggressive backtracking.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42375 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAG.cpp
cheduleDAGRRList.cpp
|
| 5ec4b76e12cfff33a4b3ac504e75d7d119845d6a |
26-Sep-2007 |
Evan Cheng <evan.cheng@apple.com> |
- Move getPhysicalRegisterRegClass() from ScheduleDAG to MRegisterInfo.
- Added ability to emit cross class register copies to the BBRU scheduler.
- More aggressive backtracking.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42375 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAG.cpp
cheduleDAGRRList.cpp
|
| 2f42901dff5d0b4a9bb571a2f57157c296584557 |
26-Sep-2007 |
Dale Johannesen <dalej@apple.com> |
Enable codegen for long double abs, sin, cos
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42368 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 7f1076becdf8b689d869472f3dd14dbc24d4cc75 |
26-Sep-2007 |
Dale Johannesen <dalej@apple.com> |
Enable codegen for long double abs, sin, cos
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42368 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| f41db2136fe50e1a92aabfcb3ba1ec1f70f5f0d5 |
26-Sep-2007 |
Dale Johannesen <dalej@apple.com> |
Fix f80 UNDEF.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42359 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 20b7635470aefc0e5d62a1b5d9109c247b664460 |
26-Sep-2007 |
Dale Johannesen <dalej@apple.com> |
Fix f80 UNDEF.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42359 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 9efce638d307b2c71bd7f0258d47501661434c27 |
26-Sep-2007 |
Evan Cheng <evan.cheng@apple.com> |
Allow copyRegToReg to emit cross register classes copies.
Tested with "make check"!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42346 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAG.cpp
cheduleDAGSimple.cpp
|
| b3d91cfa10387517c305f75a8220d192f7d133cb |
26-Sep-2007 |
Evan Cheng <evan.cheng@apple.com> |
Allow copyRegToReg to emit cross register classes copies.
Tested with "make check"!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42346 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAG.cpp
cheduleDAGSimple.cpp
|
| c3b0b5ca1d5772cf90c0c66e03412da33a0d7cdb |
25-Sep-2007 |
Dan Gohman <gohman@apple.com> |
Move the setOperationAction(ISD::DEBUG_LOC, MVT::Other, Expand) and
the check to see if the assembler supports .loc from X86TargetLowering
into the superclass TargetLowering.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42297 91177308-0d34-0410-b5e6-96231b3b80d8
argetLowering.cpp
|
| 21442858f8a084d4e27afe754863feed57bdebf8 |
25-Sep-2007 |
Dan Gohman <djg@cray.com> |
Move the setOperationAction(ISD::DEBUG_LOC, MVT::Other, Expand) and
the check to see if the assembler supports .loc from X86TargetLowering
into the superclass TargetLowering.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42297 91177308-0d34-0410-b5e6-96231b3b80d8
argetLowering.cpp
|
| a6fb1b6743ee1411accf2d6e636f73f2ee0a7f5b |
25-Sep-2007 |
Evan Cheng <evan.cheng@apple.com> |
Added major new capabilities to scheduler (only BURR for now) to support physical register dependency. The BURR scheduler can now backtrace and duplicate instructions in order to avoid "expensive / impossible to copy" values (e.g. status flag EFLAGS for x86) from being clobbered.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42284 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAG.cpp
cheduleDAGList.cpp
cheduleDAGRRList.cpp
cheduleDAGSimple.cpp
electionDAGPrinter.cpp
|
| 93f143e286acad609336954b78a87cf19091c53c |
25-Sep-2007 |
Evan Cheng <evan.cheng@apple.com> |
Added major new capabilities to scheduler (only BURR for now) to support physical register dependency. The BURR scheduler can now backtrace and duplicate instructions in order to avoid "expensive / impossible to copy" values (e.g. status flag EFLAGS for x86) from being clobbered.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42284 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAG.cpp
cheduleDAGList.cpp
cheduleDAGRRList.cpp
cheduleDAGSimple.cpp
electionDAGPrinter.cpp
|
| e40c7b097354974ebd42c7e5d54440b07b57cc33 |
24-Sep-2007 |
Dan Gohman <gohman@apple.com> |
Use the correct result value type instead of using getValueType(0)
in ExpandEXTRACT_VECTOR_ELT and SplitVectorOp. This fixes an abort
in the included testcase.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42264 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| a0763d94f9a02f3a40f09e3abe92d34dea848fef |
24-Sep-2007 |
Dan Gohman <djg@cray.com> |
Use the correct result value type instead of using getValueType(0)
in ExpandEXTRACT_VECTOR_ELT and SplitVectorOp. This fixes an abort
in the included testcase.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42264 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| b690a005c10b521e294b95b35c1503b7b34671f4 |
22-Sep-2007 |
Chris Lattner <sabre@nondot.org> |
initialize isstore/isload fields in ctor, fixing PR1695
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42222 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGSimple.cpp
|
| 696d2b491412490bffc044eee1c668ea8c306683 |
22-Sep-2007 |
Chris Lattner <sabre@nondot.org> |
initialize isstore/isload fields in ctor, fixing PR1695
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42222 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGSimple.cpp
|
| 910993e8dc49a25d9da3b53de4a82568c14e91cc |
22-Sep-2007 |
Dale Johannesen <dalej@apple.com> |
Change APFloat::convertFromInteger to take the incoming
bit width instead of number of words allocated, which
makes it actually work for int->APF conversions.
Adjust callers. Add const to one of the APInt constructors
to prevent surprising match when called with const
argument.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42210 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
electionDAG.cpp
|
| a6f7974e97825e9575b5c5cf9f6665aef86cbe03 |
22-Sep-2007 |
Dale Johannesen <dalej@apple.com> |
Change APFloat::convertFromInteger to take the incoming
bit width instead of number of words allocated, which
makes it actually work for int->APF conversions.
Adjust callers. Add const to one of the APInt constructors
to prevent surprising match when called with const
argument.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42210 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
electionDAG.cpp
|
| dfe8934258086ca901122d6ce48c64f297a10404 |
21-Sep-2007 |
Chris Lattner <sabre@nondot.org> |
initialize SetCCResultContents, fixing PR1693
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42193 91177308-0d34-0410-b5e6-96231b3b80d8
argetLowering.cpp
|
| e3f5e8295b32b3eda84afa7e52e36ec5f621e935 |
21-Sep-2007 |
Chris Lattner <sabre@nondot.org> |
initialize SetCCResultContents, fixing PR1693
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42193 91177308-0d34-0410-b5e6-96231b3b80d8
argetLowering.cpp
|
| 73328d14acba0144f121b557ce0e1539c6a21a18 |
20-Sep-2007 |
Dale Johannesen <dalej@apple.com> |
More long double fixes. x86_64 should build now.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42155 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
electionDAG.cpp
argetLowering.cpp
|
| 958b08bf53f17d2b007eef74c39610bc0010fe3d |
20-Sep-2007 |
Dale Johannesen <dalej@apple.com> |
More long double fixes. x86_64 should build now.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42155 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
electionDAG.cpp
argetLowering.cpp
|
| f4d4832724eb45f94d63e6a7ab932b8f77279587 |
19-Sep-2007 |
Dale Johannesen <dalej@apple.com> |
Fix longdouble -> uint conversion.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42143 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 280620d227a39d1f1b2fd916e1dd0cb4b045443b |
19-Sep-2007 |
Dale Johannesen <dalej@apple.com> |
Fix longdouble -> uint conversion.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42143 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 713a98dee8ab07a3066d1707a07648d27dd0c19c |
19-Sep-2007 |
Evan Cheng <evan.cheng@apple.com> |
Use struct SDep instead of std::pair for SUnit pred and succ lists. First step
in tracking physical register output dependencies.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42125 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAG.cpp
cheduleDAGList.cpp
cheduleDAGRRList.cpp
electionDAGPrinter.cpp
|
| e795947c884a4b47ed678c2c1e371141cae76ef7 |
19-Sep-2007 |
Evan Cheng <evan.cheng@apple.com> |
Use struct SDep instead of std::pair for SUnit pred and succ lists. First step
in tracking physical register output dependencies.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42125 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAG.cpp
cheduleDAGList.cpp
cheduleDAGRRList.cpp
electionDAGPrinter.cpp
|
| e0480d2ec271bb0043f18feaf4131f6b6cf50757 |
18-Sep-2007 |
Evan Cheng <evan.cheng@apple.com> |
Fix a bogus splat xform:
shuffle <undef, undef, x, undef>, <undef, undef, undef, undef>, <2, 2, 2, 2>
!=
<undef, undef, x, undef>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42111 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 8d68c2b521af0070408257c4ef586ee1679f498d |
18-Sep-2007 |
Evan Cheng <evan.cheng@apple.com> |
Fix a bogus splat xform:
shuffle <undef, undef, x, undef>, <undef, undef, undef, undef>, <2, 2, 2, 2>
!=
<undef, undef, x, undef>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42111 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| c7b21d520ac0400c5661dca2fb67a17ef65c6ac4 |
18-Sep-2007 |
Dale Johannesen <dalej@apple.com> |
Prevent crash on long double.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42103 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 1b4181da0342cb73321cfcffd629ceb472518b7e |
18-Sep-2007 |
Dale Johannesen <dalej@apple.com> |
Prevent crash on long double.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42103 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 8feb1f4467425d23ed74cce61e49f18a51a63421 |
18-Sep-2007 |
Devang Patel <dpatel@apple.com> |
Do not hide APInt::dump() inside #ifndef NDEBUG.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42068 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 26efc6e035d2c31dad215db3c492be0193a4adc9 |
18-Sep-2007 |
Devang Patel <dpatel@apple.com> |
Do not hide APInt::dump() inside #ifndef NDEBUG.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42068 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| ffe3612af4ba03269f9affd3d2552bdb78ed6824 |
17-Sep-2007 |
Devang Patel <dpatel@apple.com> |
This is not ideal but unbreaks build failure.
APInt::dump() is inside #ifndef NDEBUG, however SelectionDAG dump() routines are not.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42047 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 57c2feb59e8ed830d429964ee534b42ce21b0670 |
17-Sep-2007 |
Devang Patel <dpatel@apple.com> |
This is not ideal but unbreaks build failure.
APInt::dump() is inside #ifndef NDEBUG, however SelectionDAG dump() routines are not.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42047 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 118cd9dbbad3a47f37dc1b1529ef920e4d5e13f6 |
16-Sep-2007 |
Dale Johannesen <dalej@apple.com> |
Adjust per revew comments.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42002 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| b17a7a2a959a354241ddf6f8e744078b3f75a347 |
16-Sep-2007 |
Dale Johannesen <dalej@apple.com> |
Adjust per revew comments.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42002 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 9e3d3abd937c9bb79d56d25ec0e0724c7cbba67c |
15-Sep-2007 |
Dale Johannesen <dalej@apple.com> |
Remove the assumption that FP's are either float or
double from some of the many places in the optimizers
it appears, and do something reasonable with x86
long double.
Make APInt::dump() public, remove newline, use it to
dump ConstantSDNode's.
Allow APFloats in FoldingSet.
Expand X86 backend handling of long doubles (conversions
to/from int, mostly).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41967 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
electionDAG.cpp
electionDAGISel.cpp
|
| 2fc20789bb7336202950f2804abf313d612f44c1 |
15-Sep-2007 |
Dale Johannesen <dalej@apple.com> |
Remove the assumption that FP's are either float or
double from some of the many places in the optimizers
it appears, and do something reasonable with x86
long double.
Make APInt::dump() public, remove newline, use it to
dump ConstantSDNode's.
Allow APFloats in FoldingSet.
Expand X86 backend handling of long doubles (conversions
to/from int, mostly).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41967 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
electionDAG.cpp
electionDAGISel.cpp
|
| 3d6992fc7bfbd77e912044e7f15e324329d9b4eb |
13-Sep-2007 |
Chris Lattner <sabre@nondot.org> |
Fix build problems on Cygwin (PR1652), patch by Patrick Walton.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41923 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 4a22a676203f31c318e82ce816cd0766f75db2a8 |
13-Sep-2007 |
Chris Lattner <sabre@nondot.org> |
Fix build problems on Cygwin (PR1652), patch by Patrick Walton.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41923 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 66003775464ad01fc828ba3bfaae75759b3f18e8 |
13-Sep-2007 |
Evan Cheng <evan.cheng@apple.com> |
Bug fixes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41900 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGRRList.cpp
|
| 83e890395f87b5046fc3b83a518eda80e01477ac |
13-Sep-2007 |
Evan Cheng <evan.cheng@apple.com> |
Bug fixes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41900 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGRRList.cpp
|
| 690013281313284d0ab78f5b6a0ce15a35442c6b |
13-Sep-2007 |
Evan Cheng <evan.cheng@apple.com> |
Remove dead code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41899 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAG.cpp
|
| 9668960b2fa0d00d7e16d6b3a5e93c41843ecff0 |
13-Sep-2007 |
Evan Cheng <evan.cheng@apple.com> |
Remove dead code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41899 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAG.cpp
|
| 05e69c1f23f1097530fcbc7be97f99d696c019a2 |
13-Sep-2007 |
Evan Cheng <evan.cheng@apple.com> |
Yet another getTargetNode variant.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41898 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| e1d067ec05cf080937c2f21f5d1b9a5c59bfd4da |
13-Sep-2007 |
Evan Cheng <evan.cheng@apple.com> |
Yet another getTargetNode variant.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41898 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 9d5f45607793052bf5b4436d1b43013fab9999ac |
12-Sep-2007 |
Dale Johannesen <dalej@apple.com> |
Revise previous patch per review comments.
Next round of x87 long double stuff.
Getting close now, basically works.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41875 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
egalizeDAG.cpp
electionDAG.cpp
|
| fbd9cdafa9a1e124a0866470dc1d8f514d5db30e |
12-Sep-2007 |
Dale Johannesen <dalej@apple.com> |
Revise previous patch per review comments.
Next round of x87 long double stuff.
Getting close now, basically works.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41875 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
egalizeDAG.cpp
electionDAG.cpp
|
| 3f6eb7419de437436265831fce92f62498556e08 |
11-Sep-2007 |
Dale Johannesen <dalej@apple.com> |
Add APInt interfaces to APFloat (allows directly
access to bits). Use them in place of float and
double interfaces where appropriate.
First bits of x86 long double constants handling
(untested, probably does not work).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41858 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
egalizeDAG.cpp
electionDAG.cpp
|
| 1616e90a14e8df92adb026ceb047141056862de9 |
11-Sep-2007 |
Dale Johannesen <dalej@apple.com> |
Add APInt interfaces to APFloat (allows directly
access to bits). Use them in place of float and
double interfaces where appropriate.
First bits of x86 long double constants handling
(untested, probably does not work).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41858 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
egalizeDAG.cpp
electionDAG.cpp
|
| f7331b3dd72409e644833ecaf62a0f6db03c97ee |
11-Sep-2007 |
Duncan Sands <baldrick@free.fr> |
Fold the adjust_trampoline intrinsic into
init_trampoline. There is now only one
trampoline intrinsic.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41841 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
electionDAG.cpp
electionDAGISel.cpp
|
| 7407a9f0ce838891356c1faf3d52e1dacf4e5365 |
11-Sep-2007 |
Duncan Sands <baldrick@free.fr> |
Fold the adjust_trampoline intrinsic into
init_trampoline. There is now only one
trampoline intrinsic.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41841 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
electionDAG.cpp
electionDAGISel.cpp
|
| 61c5ff460b18b970aa651115c4ac78dfc0d602d7 |
10-Sep-2007 |
Chris Lattner <sabre@nondot.org> |
Emit:
cmpl %eax, %ecx
setae %al
movzbl %al, %eax
instead of:
cmpl %eax, %ecx
setb %al
xorb $1, %al
movzbl %al, %eax
when using logical not of a C comparison.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41807 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| e27cd509e5e95972be1f152ec63d1b11b495d37c |
10-Sep-2007 |
Chris Lattner <sabre@nondot.org> |
Emit:
cmpl %eax, %ecx
setae %al
movzbl %al, %eax
instead of:
cmpl %eax, %ecx
setb %al
xorb $1, %al
movzbl %al, %eax
when using logical not of a C comparison.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41807 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 87b51bc2b0e9bced27d6fd95573a3f21691a261c |
10-Sep-2007 |
Chris Lattner <sabre@nondot.org> |
1. Don't call Value::getName(), which is slow.
2. Lower calls to fabs and friends to FABS nodes etc unless the function has
internal linkage. Before we wouldn't lower if it had a definition, which
is incorrect. This allows us to compile:
define double @fabs(double %f) {
%tmp2 = tail call double @fabs( double %f )
ret double %tmp2
}
into:
_fabs:
fabs f1, f1
blr
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41805 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 3687e34c2cc7ce435bc29e9cacdb4d7320890b91 |
10-Sep-2007 |
Chris Lattner <sabre@nondot.org> |
1. Don't call Value::getName(), which is slow.
2. Lower calls to fabs and friends to FABS nodes etc unless the function has
internal linkage. Before we wouldn't lower if it had a definition, which
is incorrect. This allows us to compile:
define double @fabs(double %f) {
%tmp2 = tail call double @fabs( double %f )
ret double %tmp2
}
into:
_fabs:
fabs f1, f1
blr
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41805 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 907f28ce3032e67c02a50095659e901de867dd3c |
08-Sep-2007 |
Dale Johannesen <dalej@apple.com> |
Implement misaligned FP loads and stores.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41786 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 082753802dc328e81d1b3f286a855ad39c533a4e |
08-Sep-2007 |
Dale Johannesen <dalej@apple.com> |
Implement misaligned FP loads and stores.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41786 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 588af2fb99bf255c350fcfc582e475cf4840c606 |
07-Sep-2007 |
Rafael Espindola <rafael.espindola@gmail.com> |
Add support for having different alignment for objects on call frames.
The x86-64 ABI states that objects passed on the stack have
8 byte alignment. Implement that.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41768 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| b5c5df48b2dd9773149374d32fb40d12471269d4 |
07-Sep-2007 |
Rafael Espindola <rafael.espindola@gmail.com> |
Add support for having different alignment for objects on call frames.
The x86-64 ABI states that objects passed on the stack have
8 byte alignment. Implement that.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41768 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 8806c7b1f5317a9679a5779ffc08c552f2091bce |
07-Sep-2007 |
Anton Korobeynikov <asl@math.spbu.ru> |
Split eh.select / eh.typeid.for intrinsics into i32/i64 versions. This is needed, because they just "mark" register
liveins and we let frontend solve type issue, not lowering code :)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41763 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 94c46a0e5fae77e8e68c6d1abf442a1327bf1fb6 |
07-Sep-2007 |
Anton Korobeynikov <asl@math.spbu.ru> |
Split eh.select / eh.typeid.for intrinsics into i32/i64 versions. This is needed, because they just "mark" register
liveins and we let frontend solve type issue, not lowering code :)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41763 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 718cb665ca6ce2bc4d8e8479f46a45db91b49f86 |
07-Sep-2007 |
Owen Anderson <resistor@mac.com> |
Add lengthof and endof templates that hide a lot of sizeof computations.
Patch by Sterling Stein!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41758 91177308-0d34-0410-b5e6-96231b3b80d8
argetLowering.cpp
|
| 1636de94069d492185da2dd36859d4a1962a2eed |
07-Sep-2007 |
Owen Anderson <resistor@mac.com> |
Add lengthof and endof templates that hide a lot of sizeof computations.
Patch by Sterling Stein!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41758 91177308-0d34-0410-b5e6-96231b3b80d8
argetLowering.cpp
|
| 43421b3dd70af5b70e71816521f37502c397cc65 |
06-Sep-2007 |
Dale Johannesen <dalej@apple.com> |
Next round of APFloat changes.
Use APFloat in UpgradeParser and AsmParser.
Change all references to ConstantFP to use the
APFloat interface rather than double. Remove
the ConstantFP double interfaces.
Use APFloat functions for constant folding arithmetic
and comparisons.
(There are still way too many places APFloat is
just a wrapper around host float/double, but we're
getting there.)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41747 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| b9de9f07d611823ea3371b65f87035f482ace2ad |
06-Sep-2007 |
Dale Johannesen <dalej@apple.com> |
Next round of APFloat changes.
Use APFloat in UpgradeParser and AsmParser.
Change all references to ConstantFP to use the
APFloat interface rather than double. Remove
the ConstantFP double interfaces.
Use APFloat functions for constant folding arithmetic
and comparisons.
(There are still way too many places APFloat is
just a wrapper around host float/double, but we're
getting there.)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41747 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 57810cdac4c842b4b395d2a0b2fae406aacb3ee4 |
05-Sep-2007 |
Duncan Sands <baldrick@free.fr> |
Fix PR1628. When exception handling is turned on,
labels are generated bracketing each call (not just
invokes). This is used to generate entries in
the exception table required by the C++ personality.
However it gets in the way of tail-merging. This
patch solves the problem by no longer placing labels
around ordinary calls. Instead we generate entries
in the exception table that cover every instruction
in the function that wasn't covered by an invoke
range (the range given by the labels around the invoke).
As an optimization, such entries are only generated for
parts of the function that contain a call, since for
the moment those are the only instructions that can
throw an exception [1]. As a happy consequence, we
now get a smaller exception table, since the same
region can cover many calls. While there, I also
implemented folding of invoke ranges - successive
ranges are merged when safe to do so. Finally, if
a selector contains only a cleanup, there's a special
shorthand for it - place a 0 in the call-site entry.
I implemented this while there. As a result, the
exception table output (excluding filters) is now
optimal - it cannot be made smaller [2]. The
problem with throw filters is that folding them
optimally is hard, and the benefit of folding them is
minimal.
[1] I tested that having trapping instructions (eg
divide by zero) in such a region doesn't cause trouble.
[2] It could be made smaller with the help of higher
layers, eg by having branch folding reorder basic blocks
ending in invokes with the same landing pad so they
follow each other. I don't know if this is worth doing.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41718 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 241a0c904da8c32d56b058873f602790c09c07c4 |
05-Sep-2007 |
Duncan Sands <baldrick@free.fr> |
Fix PR1628. When exception handling is turned on,
labels are generated bracketing each call (not just
invokes). This is used to generate entries in
the exception table required by the C++ personality.
However it gets in the way of tail-merging. This
patch solves the problem by no longer placing labels
around ordinary calls. Instead we generate entries
in the exception table that cover every instruction
in the function that wasn't covered by an invoke
range (the range given by the labels around the invoke).
As an optimization, such entries are only generated for
parts of the function that contain a call, since for
the moment those are the only instructions that can
throw an exception [1]. As a happy consequence, we
now get a smaller exception table, since the same
region can cover many calls. While there, I also
implemented folding of invoke ranges - successive
ranges are merged when safe to do so. Finally, if
a selector contains only a cleanup, there's a special
shorthand for it - place a 0 in the call-site entry.
I implemented this while there. As a result, the
exception table output (excluding filters) is now
optimal - it cannot be made smaller [2]. The
problem with throw filters is that folding them
optimally is hard, and the benefit of folding them is
minimal.
[1] I tested that having trapping instructions (eg
divide by zero) in such a region doesn't cause trouble.
[2] It could be made smaller with the help of higher
layers, eg by having branch folding reorder basic blocks
ending in invokes with the same landing pad so they
follow each other. I don't know if this is worth doing.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41718 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| a34d395358ea8aa039566926650a12d0962ded38 |
04-Sep-2007 |
Evan Cheng <evan.cheng@apple.com> |
Fix for PR1632. EHSELECTION always produces a i32 value.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41712 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| e8d1e2aaa0148b78cfa96348bef99b51bb0c67de |
04-Sep-2007 |
Evan Cheng <evan.cheng@apple.com> |
Fix for PR1632. EHSELECTION always produces a i32 value.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41712 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| c4dd3c3b519aa2c2ed26ce03a4b1fbb992efeaca |
01-Sep-2007 |
Dale Johannesen <dalej@apple.com> |
Add mod, copysign, abs operations to APFloat.
Implement some constant folding in SelectionDAG and
DAGCombiner using APFloat. Remove double versions
of constructor and getValue from ConstantFPSDNode.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41664 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
electionDAG.cpp
|
| 7604c1b5a616eccc909ae58daa6e7afd54fa2d71 |
01-Sep-2007 |
Dale Johannesen <dalej@apple.com> |
Add mod, copysign, abs operations to APFloat.
Implement some constant folding in SelectionDAG and
DAGCombiner using APFloat. Remove double versions
of constructor and getValue from ConstantFPSDNode.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41664 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
electionDAG.cpp
|
| ee8476847da85e1ac44744f7f64de0675b89dc15 |
31-Aug-2007 |
Dale Johannesen <dalej@apple.com> |
Revise per review of previous patch.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41645 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 7684447199028b572f60fd76e043cf32ec7caa3f |
31-Aug-2007 |
Dale Johannesen <dalej@apple.com> |
Revise per review of previous patch.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41645 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| eaf089430e7681fcddc3465c3b33b9645273ab02 |
31-Aug-2007 |
Dale Johannesen <dalej@apple.com> |
Enhance APFloat to retain bits of NaNs (fixes oggenc).
Use APFloat interfaces for more references, mostly
of ConstantFPSDNode.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41632 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
electionDAGPrinter.cpp
|
| df8a831eb0f35fad163b2e45212f8154a17bbd36 |
31-Aug-2007 |
Dale Johannesen <dalej@apple.com> |
Enhance APFloat to retain bits of NaNs (fixes oggenc).
Use APFloat interfaces for more references, mostly
of ConstantFPSDNode.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41632 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
electionDAGPrinter.cpp
|
| f04afdbb48568ef09f11fd10ac03426101f2dbf8 |
30-Aug-2007 |
Dale Johannesen <dalej@apple.com> |
Change LegalFPImmediates to use APFloat.
Add APFloat interfaces to ConstantFP, SelectionDAG.
Fix integer bit in double->APFloat conversion.
Convert LegalizeDAG to use APFloat interface in
ConstantFPSDNode uses.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41587 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
electionDAG.cpp
|
| bbe2b709480f1b89d9ac4d42c2c29e7c29dca3bc |
30-Aug-2007 |
Dale Johannesen <dalej@apple.com> |
Change LegalFPImmediates to use APFloat.
Add APFloat interfaces to ConstantFP, SelectionDAG.
Fix integer bit in double->APFloat conversion.
Convert LegalizeDAG to use APFloat interface in
ConstantFPSDNode uses.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41587 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
electionDAG.cpp
|
| 055c5449a4046a5e1a5210d2f91aee4e3901cccf |
30-Aug-2007 |
Anton Korobeynikov <asl@math.spbu.ru> |
Fix use of declaration inside case block
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41584 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| e3d7f93f9f90611f886deb045b5aaf4ca9e99bb2 |
30-Aug-2007 |
Anton Korobeynikov <asl@math.spbu.ru> |
Fix use of declaration inside case block
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41584 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 066f7b40f8c442dfd52cdbc371a5f6c623d5ba90 |
29-Aug-2007 |
Anton Korobeynikov <asl@math.spbu.ru> |
Lower FRAME_TO_ADDR_OFFSET to zero by default (if not custom lowered)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41578 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 09386bd850e89f0cabae20944ad76bd806d4741d |
29-Aug-2007 |
Anton Korobeynikov <asl@math.spbu.ru> |
Lower FRAME_TO_ADDR_OFFSET to zero by default (if not custom lowered)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41578 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 3e1a7aef17575d9c7058a035449d57e3c7295ed0 |
28-Aug-2007 |
Dan Gohman <gohman@apple.com> |
Add an option, -view-sunit-dags, for viewing the actual SUnit DAGs used by
scheduling.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41556 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
electionDAGPrinter.cpp
|
| 134c5b61b7335d90dad114e2abb91f2a0f1e913f |
28-Aug-2007 |
Dan Gohman <djg@cray.com> |
Add an option, -view-sunit-dags, for viewing the actual SUnit DAGs used by
scheduling.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41556 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
electionDAGPrinter.cpp
|
| e9c8fa095e503933840fa1ea41b4583817db5680 |
27-Aug-2007 |
Dan Gohman <gohman@apple.com> |
Make DAGCombiner's global alias analysis query more precise in the case
where both pointers have non-zero offsets.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41491 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| e142c2e6b8b3a61c9282fd0f1202f380b23df251 |
27-Aug-2007 |
Dan Gohman <djg@cray.com> |
Make DAGCombiner's global alias analysis query more precise in the case
where both pointers have non-zero offsets.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41491 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 5f43f92c69aae9837064cf08291db1b36a82789f |
27-Aug-2007 |
Dan Gohman <gohman@apple.com> |
If the source and destination pointers in an llvm.memmove are known
to not alias each other, it can be translated as an llvm.memcpy.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41489 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| cc863aa72c83309f15f9175f97cad1dffb8d689b |
27-Aug-2007 |
Dan Gohman <djg@cray.com> |
If the source and destination pointers in an llvm.memmove are known
to not alias each other, it can be translated as an llvm.memcpy.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41489 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 6590b0457c5e28a7336ae31de194953d8127217a |
27-Aug-2007 |
Duncan Sands <baldrick@free.fr> |
There is an impedance matching problem between LLVM and
gcc exception handling: if an exception unwinds through
an invoke, then execution must branch to the invoke's
unwind target. We previously tried to enforce this by
appending a cleanup action to every selector, however
this does not always work correctly due to an optimization
in the C++ unwinding runtime: if only cleanups would be
run while unwinding an exception, then the program just
terminates without actually executing the cleanups, as
invoke semantics would require. I was hoping this
wouldn't be a problem, but in fact it turns out to be the
cause of all the remaining failures in the LLVM testsuite
(these also fail with -enable-correct-eh-support, so turning
on -enable-eh didn't make things worse!). Instead we need
to append a full-blown catch-all to the end of each
selector. The correct way of doing this depends on the
personality function, i.e. it is language dependent, so
can only be done by gcc. Thus this patch which generalizes
the eh.selector intrinsic so that it can handle all possible
kinds of action table entries (before it didn't accomodate
cleanups): now 0 indicates a cleanup, and filters have to be
specified using the number of type infos plus one rather than
the number of type infos. Related gcc patches will cause
Ada to pass a cleanup (0) to force the selector to always
fire, while C++ will use a C++ catch-all (null).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41484 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 923fdb10d27aede037ce7aacda78f69f5e29bb00 |
27-Aug-2007 |
Duncan Sands <baldrick@free.fr> |
There is an impedance matching problem between LLVM and
gcc exception handling: if an exception unwinds through
an invoke, then execution must branch to the invoke's
unwind target. We previously tried to enforce this by
appending a cleanup action to every selector, however
this does not always work correctly due to an optimization
in the C++ unwinding runtime: if only cleanups would be
run while unwinding an exception, then the program just
terminates without actually executing the cleanups, as
invoke semantics would require. I was hoping this
wouldn't be a problem, but in fact it turns out to be the
cause of all the remaining failures in the LLVM testsuite
(these also fail with -enable-correct-eh-support, so turning
on -enable-eh didn't make things worse!). Instead we need
to append a full-blown catch-all to the end of each
selector. The correct way of doing this depends on the
personality function, i.e. it is language dependent, so
can only be done by gcc. Thus this patch which generalizes
the eh.selector intrinsic so that it can handle all possible
kinds of action table entries (before it didn't accomodate
cleanups): now 0 indicates a cleanup, and filters have to be
specified using the number of type infos plus one rather than
the number of type infos. Related gcc patches will cause
Ada to pass a cleanup (0) to force the selector to always
fire, while C++ will use a C++ catch-all (null).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41484 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| e6c1742914149d44360fbf05a653041a672282af |
26-Aug-2007 |
Dale Johannesen <dalej@apple.com> |
Revise per review comments.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41409 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
electionDAG.cpp
|
| c53301c671d7a24e060ffd7e9f95c22b5d29ae77 |
26-Aug-2007 |
Dale Johannesen <dalej@apple.com> |
Revise per review comments.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41409 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
electionDAG.cpp
|
| 87503a63d5756f1836f66f4c9723ec0ea30ec3ca |
26-Aug-2007 |
Dale Johannesen <dalej@apple.com> |
Add APFloat interface to ConstantFPSDNode. Change
over uses in DAGCombiner. Fix interfaces to work
with APFloats.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41407 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
electionDAG.cpp
|
| 7f2c1d1a4f0703cfedd3808f0ec695724f99144d |
26-Aug-2007 |
Dale Johannesen <dalej@apple.com> |
Add APFloat interface to ConstantFPSDNode. Change
over uses in DAGCombiner. Fix interfaces to work
with APFloats.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41407 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
electionDAG.cpp
|
| 09ec1b058331aadb29a348091611d23892b5c492 |
25-Aug-2007 |
Chris Lattner <sabre@nondot.org> |
Allow target constants to be illegal types. The target should
know how to handle them. This fixes
test/CodeGen/Generic/asm-large-immediate.ll
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41388 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| dad577b42d1c678d0181fbd831d51c8a4f547bd3 |
25-Aug-2007 |
Chris Lattner <sabre@nondot.org> |
Allow target constants to be illegal types. The target should
know how to handle them. This fixes
test/CodeGen/Generic/asm-large-immediate.ll
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41388 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 7df31dc89b0323bca5fd6aa0a72db4d663c9b8f3 |
25-Aug-2007 |
Chris Lattner <sabre@nondot.org> |
Teach the dag scheduler to handle inline asm nodes with multi-value immediate operands.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41386 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAG.cpp
|
| 23544c1a464db6d5ef3a0ca174316038de701701 |
25-Aug-2007 |
Chris Lattner <sabre@nondot.org> |
Teach the dag scheduler to handle inline asm nodes with multi-value immediate operands.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41386 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAG.cpp
|
| 48884cd80b52be1528618f2e9b3425ac24e7b5ca |
25-Aug-2007 |
Chris Lattner <sabre@nondot.org> |
rename isOperandValidForConstraint to LowerAsmOperandForConstraint,
changing the interface to allow for future changes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41384 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
argetLowering.cpp
|
| a531abc62282978e331f9abc078ffa16ab1abbb4 |
25-Aug-2007 |
Chris Lattner <sabre@nondot.org> |
rename isOperandValidForConstraint to LowerAsmOperandForConstraint,
changing the interface to allow for future changes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41384 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
argetLowering.cpp
|
| 12595d7b165bf460b18f4ddd395dd29e6e6e68bc |
25-Aug-2007 |
Dale Johannesen <dalej@apple.com> |
Poison APFloat::operator==. Replace existing uses with bitwiseIsEqual.
This means backing out the preceding change to Constants.cpp, alas.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41378 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 0210fe8a151fe417c70ba5402f5ce9a4f94f3e3e |
25-Aug-2007 |
Dale Johannesen <dalej@apple.com> |
Poison APFloat::operator==. Replace existing uses with bitwiseIsEqual.
This means backing out the preceding change to Constants.cpp, alas.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41378 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 8bb369b8072c919ef5802f639a52b17620201190 |
24-Aug-2007 |
Dale Johannesen <dalej@apple.com> |
Use APFloat internally for ConstantFPSDNode.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41372 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 70aa12595d0387e2421e1adc4ec960705092bed4 |
24-Aug-2007 |
Dale Johannesen <dalej@apple.com> |
Use APFloat internally for ConstantFPSDNode.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41372 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 2f597bd09ec0a55689c9fd6d8999bde4fdf8688e |
23-Aug-2007 |
Anton Korobeynikov <asl@math.spbu.ru> |
Perform correct codegen for eh_dwarf_cfa intrinsic.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41316 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| b5641a0ffcdabb890443f18c8c26b3552d56c378 |
23-Aug-2007 |
Anton Korobeynikov <asl@math.spbu.ru> |
Perform correct codegen for eh_dwarf_cfa intrinsic.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41316 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 8d1bfad00b1ebff5b140b6e1bd7e26bad697d6e1 |
20-Aug-2007 |
Dan Gohman <gohman@apple.com> |
Minor cleanups to reduce some spurious differences between different
scheduler implementations.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41191 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGRRList.cpp
|
| cbc5fdda1070d3638f494d3fc0700f983c1fe6f4 |
20-Aug-2007 |
Dan Gohman <djg@cray.com> |
Minor cleanups to reduce some spurious differences between different
scheduler implementations.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41191 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGRRList.cpp
|
| 21485be444bd132941faf4e5653ac34b3ec74040 |
20-Aug-2007 |
Rafael Espindola <rafael.espindola@gmail.com> |
Partial implementation of calling functions with byval arguments:
*) The needed information is propagated to the DAG
*) The X86-64 backend detects it and aborts
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41179 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| b8bcfcdde33ce3a5812cd2133701dd6222bc40eb |
20-Aug-2007 |
Rafael Espindola <rafael.espindola@gmail.com> |
Partial implementation of calling functions with byval arguments:
*) The needed information is propagated to the DAG
*) The X86-64 backend detects it and aborts
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41179 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 571c4788d5d1527af39f9904e14983d9229c2443 |
18-Aug-2007 |
Evan Cheng <evan.cheng@apple.com> |
Fold C ? 0 : 1 to ~C or zext(~C) or trunc(~C) depending the types.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41163 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| ff601dc5ddab82677b266e7547398bc3165f8bfa |
18-Aug-2007 |
Evan Cheng <evan.cheng@apple.com> |
Fold C ? 0 : 1 to ~C or zext(~C) or trunc(~C) depending the types.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41163 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 3e20bba5eb5df2fdd3e6655c8470084cf05032d4 |
17-Aug-2007 |
Evan Cheng <evan.cheng@apple.com> |
Avoid issue on 64-bit hosts.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41143 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 51ce038ef93efb5ddb3f5b51552212ab8d1470b2 |
17-Aug-2007 |
Evan Cheng <evan.cheng@apple.com> |
Avoid issue on 64-bit hosts.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41143 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| fd273b6ed51494a99b585a92e60cdc68102fe371 |
17-Aug-2007 |
David Greene <greened@obbligato.org> |
Fix GLIBCXX_DEBUG error of comparing two singular iterators
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41139 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGSimple.cpp
|
| aa5912d071250c1fe8166072d0b177f2a6738d4c |
17-Aug-2007 |
David Greene <greened@obbligato.org> |
Fix GLIBCXX_DEBUG error of comparing two singular iterators
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41139 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGSimple.cpp
|
| 61bbbabe3da27479cc9a3a36e49091a1141ba7a3 |
17-Aug-2007 |
Evan Cheng <evan.cheng@apple.com> |
If dynamic_stackalloc alignment is > stack alignment, first issue an instruction to align the stack ptr before the decrement.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41133 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| a448bc405f5ade615e4076ed2540ef03ec24304d |
17-Aug-2007 |
Evan Cheng <evan.cheng@apple.com> |
If dynamic_stackalloc alignment is > stack alignment, first issue an instruction to align the stack ptr before the decrement.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41133 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 4515779fa39481649780bdd24fc966e89ec76edf |
17-Aug-2007 |
Evan Cheng <evan.cheng@apple.com> |
- If a dynamic_stackalloc alignment requirement is <= stack alignment, then the alignment argument is ignored.
- *Always* round up the size of the allocation to multiples of stack
alignment to ensure the stack ptr is never left in an invalid state after a dynamic_stackalloc.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41132 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| a31dc756af85ebe58b402d4ed71238a3ed669c45 |
17-Aug-2007 |
Evan Cheng <evan.cheng@apple.com> |
- If a dynamic_stackalloc alignment requirement is <= stack alignment, then the alignment argument is ignored.
- *Always* round up the size of the allocation to multiples of stack
alignment to ensure the stack ptr is never left in an invalid state after a dynamic_stackalloc.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41132 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| c90f08936d717ac6aa767c28cee7af4366eb6921 |
16-Aug-2007 |
Lauro Ramos Venancio <lauro.venancio@gmail.com> |
Implement FPOWI ExpandOp.
Fix PR1287.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41112 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| ccd0d7b44ec0fe140fe20b7269aeaa7b55aa1682 |
16-Aug-2007 |
Lauro Ramos Venancio <lauro.venancio@gmail.com> |
Implement FPOWI ExpandOp.
Fix PR1287.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41112 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 25ac7e8364f475597e2a6f3628fce839583e1f45 |
10-Aug-2007 |
Dan Gohman <gohman@apple.com> |
Fix EXTRACT_ELEMENT, EXTRACT_SUBVECTOR, and EXTRACT_VECTOR_ELT to
use an intptr ValueType instead of i32 for the index operand in
getCopyToParts.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@40987 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| f7b05137e4a49f6e41fcf12c910106cc1ea32e6b |
10-Aug-2007 |
Dan Gohman <djg@cray.com> |
Fix EXTRACT_ELEMENT, EXTRACT_SUBVECTOR, and EXTRACT_VECTOR_ELT to
use an intptr ValueType instead of i32 for the index operand in
getCopyToParts.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@40987 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 594d37e21aea4ef841d9ee5d9c328c4bf1c6bed7 |
10-Aug-2007 |
Rafael Espindola <rafael.espindola@gmail.com> |
propagate struct size and alignment of byval arguments to the DAG
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@40986 91177308-0d34-0410-b5e6-96231b3b80d8
allingConvLower.cpp
electionDAGISel.cpp
|
| e4e4d3eaa6f62a7f04abd2291e4e7a99a1d3b0ad |
10-Aug-2007 |
Rafael Espindola <rafael.espindola@gmail.com> |
propagate struct size and alignment of byval arguments to the DAG
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@40986 91177308-0d34-0410-b5e6-96231b3b80d8
allingConvLower.cpp
electionDAGISel.cpp
|
| ab081c7195ad0b2bc9a13fa718f2bbffe54ac61c |
09-Aug-2007 |
Dale Johannesen <dalej@apple.com> |
Update per review comments.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@40965 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 6089237a5c9aa481d5bf1e90f8b4ea986b334d34 |
09-Aug-2007 |
Dale Johannesen <dalej@apple.com> |
Update per review comments.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@40965 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 5411a3937f4303f9c3fc50be92f985a4532d95e6 |
09-Aug-2007 |
Dale Johannesen <dalej@apple.com> |
long double 9 of N. This finishes up the X86-32 bits
(constants are still not handled). Adds ConvertActions
to control fp-to-fp conversions (these are currently
defaulted for all other targets, so no changes there).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@40958 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
argetLowering.cpp
|
| 8f83a6b48b5b5d87f157d6af4bda360471106f2e |
09-Aug-2007 |
Dale Johannesen <dalej@apple.com> |
long double 9 of N. This finishes up the X86-32 bits
(constants are still not handled). Adds ConvertActions
to control fp-to-fp conversions (these are currently
defaulted for all other targets, so no changes there).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@40958 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
argetLowering.cpp
|
| c1513d24eab4b193c951f3cad450ef344e88e0a6 |
09-Aug-2007 |
Scott Michel <scottm@aero.org> |
If a target really needs to custom lower constants, it should be allowed
to do so.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@40955 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| f2e2b70a5ed3e807c590a61e4f2c9ac46f790ae1 |
09-Aug-2007 |
Scott Michel <scottm@aero.org> |
If a target really needs to custom lower constants, it should be allowed
to do so.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@40955 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 6994040a952e5fb27605eb3cf29ed86c4e59cf62 |
04-Aug-2007 |
Chandler Carruth <chandlerc@gmail.com> |
This is the patch to provide clean intrinsic function overloading support in LLVM. It cleans up the intrinsic definitions and generally smooths the process for more complicated intrinsic writing. It will be used by the upcoming atomic intrinsics as well as vector and float intrinsics in the future.
This also changes the syntax for llvm.bswap, llvm.part.set, llvm.part.select, and llvm.ct* intrinsics. They are automatically upgraded by both the LLVM ASM reader and the bitcode reader. The test cases have been updated, with special tests added to ensure the automatic upgrading is supported.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@40807 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| a228e39a1540baceadc27acb2f1af0f2563381e5 |
04-Aug-2007 |
Chandler Carruth <chandlerc@gmail.com> |
This is the patch to provide clean intrinsic function overloading support in LLVM. It cleans up the intrinsic definitions and generally smooths the process for more complicated intrinsic writing. It will be used by the upcoming atomic intrinsics as well as vector and float intrinsics in the future.
This also changes the syntax for llvm.bswap, llvm.part.set, llvm.part.select, and llvm.ct* intrinsics. They are automatically upgraded by both the LLVM ASM reader and the bitcode reader. The test cases have been updated, with special tests added to ensure the automatic upgrading is supported.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@40807 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| b15e49597f031fdd41fdec2887a3c24c0ea430d8 |
02-Aug-2007 |
Chris Lattner <sabre@nondot.org> |
don't redefine a parameter
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@40748 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| bc1200c45389e2ec5a20f0f457b33d83ef10f961 |
02-Aug-2007 |
Chris Lattner <sabre@nondot.org> |
don't redefine a parameter
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@40748 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 33d5595d667ba4a880bd7fe785724e8197bef70c |
02-Aug-2007 |
Evan Cheng <evan.cheng@apple.com> |
Do not emit copies for physical register output if it's not used.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@40722 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAG.cpp
electionDAG.cpp
|
| 0af04f7046e06eb43e7c979651f5d7529be79805 |
02-Aug-2007 |
Evan Cheng <evan.cheng@apple.com> |
Do not emit copies for physical register output if it's not used.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@40722 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAG.cpp
electionDAG.cpp
|
| 335f4f77882ace48bcdfb7a6019367bf9f4857cd |
02-Aug-2007 |
Scott Michel <scottm@aero.org> |
Style police: Expand the tabs to spaces!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@40712 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| bc62b41039d4838a09a57e3b4b6eaed98020cf67 |
02-Aug-2007 |
Scott Michel <scottm@aero.org> |
Style police: Expand the tabs to spaces!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@40712 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 8409747efadda025aa3cce626b1a2c33429fd5e5 |
02-Aug-2007 |
Evan Cheng <evan.cheng@apple.com> |
Instead of adding copyfromreg's to handle physical definitions. Now isel can
simply specify them as results and let scheduledag handle them. That
is, instead of
SDOperand Flag = DAG.getTargetNode(Opc, MVT::i32, MVT::Flag, ...)
SDOperand Result = DAG.getCopyFromReg(Chain, X86::EAX, MVT::i32, Flag)
Just write:
SDOperand Result = DAG.getTargetNode(Opc, MVT::i32, MVT::i32, ...)
And let scheduledag emit the move from X86::EAX to a virtual register.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@40710 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAG.cpp
|
| 2663978e4ab3d1c8be986f66d359be0474e9ea5b |
02-Aug-2007 |
Evan Cheng <evan.cheng@apple.com> |
Instead of adding copyfromreg's to handle physical definitions. Now isel can
simply specify them as results and let scheduledag handle them. That
is, instead of
SDOperand Flag = DAG.getTargetNode(Opc, MVT::i32, MVT::Flag, ...)
SDOperand Result = DAG.getCopyFromReg(Chain, X86::EAX, MVT::i32, Flag)
Just write:
SDOperand Result = DAG.getTargetNode(Opc, MVT::i32, MVT::i32, ...)
And let scheduledag emit the move from X86::EAX to a virtual register.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@40710 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAG.cpp
|
| f3c13c82e34b8e90f1080cfe06c6f1328a2d44e1 |
01-Aug-2007 |
Lauro Ramos Venancio <lauro.venancio@gmail.com> |
Expand unaligned loads/stores when the target doesn't support them. (PR1548)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@40682 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 578434fda9905776efe2f3176daf5ca72efd1594 |
01-Aug-2007 |
Lauro Ramos Venancio <lauro.venancio@gmail.com> |
Expand unaligned loads/stores when the target doesn't support them. (PR1548)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@40682 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 910b66d8d6fd8a27dcdea74431e3ea20c69b7db5 |
30-Jul-2007 |
Scott Michel <scottm@aero.org> |
- Allow custom lowering for CTPOP, CTTZ, CTLZ.
- Fixed an existing unexpanded tab.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@40605 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 48b63e605d097245fa3f4fd7f1e386d21fdc37d6 |
30-Jul-2007 |
Scott Michel <scottm@aero.org> |
- Allow custom lowering for CTPOP, CTTZ, CTLZ.
- Fixed an existing unexpanded tab.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@40605 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| be444ed6dbc2a6f36feab84b527a21aa0df9f808 |
30-Jul-2007 |
Dan Gohman <gohman@apple.com> |
Fix a bug in getCopyFromParts turned up in the testcase for PR1132.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@40598 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 90cfc9d25c9ef0f48729fc5ec230b40b5ec17a6d |
30-Jul-2007 |
Dan Gohman <djg@cray.com> |
Fix a bug in getCopyFromParts turned up in the testcase for PR1132.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@40598 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 36397f50343639ce9a25996f2d790c656791ab92 |
27-Jul-2007 |
Duncan Sands <baldrick@free.fr> |
Support for trampolines, except for X86 codegen which is
still under discussion.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@40549 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
electionDAG.cpp
electionDAGISel.cpp
|
| 38947cd9adc03b30ff6d50d97279421c63b6f2f2 |
27-Jul-2007 |
Duncan Sands <baldrick@free.fr> |
Support for trampolines, except for X86 codegen which is
still under discussion.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@40549 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
electionDAG.cpp
electionDAGISel.cpp
|
| 559742c0eae0a7368eb5f67cde7a3599eaf82ade |
26-Jul-2007 |
Dan Gohman <gohman@apple.com> |
Fix the alias analysis query in DAGCombiner to not add in two
offsets. The SrcValueOffset values are the real offsets from the
SrcValue base pointers.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@40534 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 45ee6d6dc54904f50e242cf9e32bee92f15a8f46 |
26-Jul-2007 |
Dan Gohman <djg@cray.com> |
Fix the alias analysis query in DAGCombiner to not add in two
offsets. The SrcValueOffset values are the real offsets from the
SrcValue base pointers.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@40534 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| e24f8f1ec9277dc80ebf38f0d914053f8c31caf1 |
26-Jul-2007 |
Christopher Lamb <christopher.lamb@gmail.com> |
Teach DAG scheduling how to properly emit subreg insert/extract machine instructions. PR1350
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@40520 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAG.cpp
|
| e95328d8af0c38590c675b703ecab1b940903b76 |
26-Jul-2007 |
Christopher Lamb <christopher.lamb@gmail.com> |
Teach DAG scheduling how to properly emit subreg insert/extract machine instructions. PR1350
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@40520 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAG.cpp
|
| 557c3631d320c5731e55b6f818a1c7b2d4d97176 |
26-Jul-2007 |
Christopher Lamb <christopher.lamb@gmail.com> |
Add selection DAG nodes for subreg insert/extract. PR1350
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@40516 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
electionDAG.cpp
|
| b768c2edff5a647884e01ba70f2a940053ba49c8 |
26-Jul-2007 |
Christopher Lamb <christopher.lamb@gmail.com> |
Add selection DAG nodes for subreg insert/extract. PR1350
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@40516 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
electionDAG.cpp
|
| 844228a631f47bb39f71f617063831fb83c3843b |
26-Jul-2007 |
Christopher Lamb <christopher.lamb@gmail.com> |
Fix infinite recursion for when extract_vector_elt is legal. Unfortunately no public targets use this code-path, so no test.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@40510 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| cc021a04f97e93777f8323dd564f2976de285f14 |
26-Jul-2007 |
Christopher Lamb <christopher.lamb@gmail.com> |
Fix infinite recursion for when extract_vector_elt is legal. Unfortunately no public targets use this code-path, so no test.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@40510 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| dc9b3d0bb5ed3a3f59cad61e264f0ec43c946459 |
25-Jul-2007 |
Dan Gohman <gohman@apple.com> |
Add const to CanBeFoldedBy, CheckAndMask, and CheckOrMask.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@40480 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| d609827e167ad05b2a312bad23136fd67b09f7f7 |
25-Jul-2007 |
Dan Gohman <djg@cray.com> |
Add const to CanBeFoldedBy, CheckAndMask, and CheckOrMask.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@40480 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 275769a77acd8f0dadbf9ca03384b31c9f1c3e01 |
23-Jul-2007 |
Dan Gohman <gohman@apple.com> |
Fix some uses of dyn_cast to be uses of cast.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@40443 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 53491e97731df5cbdd571484a43a1637c78073a4 |
23-Jul-2007 |
Dan Gohman <djg@cray.com> |
Fix some uses of dyn_cast to be uses of cast.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@40443 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 70d0bd16243e1e8b59e2689760cb2e5c1e521290 |
19-Jul-2007 |
Duncan Sands <baldrick@free.fr> |
As pointed out by g++-4.2, the original code didn't do
what it thought it was doing.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@40044 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| f9a4497ff16f0b12f6160830889a3d6e98717516 |
19-Jul-2007 |
Duncan Sands <baldrick@free.fr> |
As pointed out by g++-4.2, the original code didn't do
what it thought it was doing.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@40044 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 48613b930a34d6f98e7d3dd86aa49cc3dbd61c85 |
18-Jul-2007 |
Dan Gohman <gohman@apple.com> |
It's not necessary to do rounding for alloca operations when the requested
alignment is equal to the stack alignment.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@40004 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| f17a25c88b892d30c2b41ba7ecdfbdfb2b4be9cc |
18-Jul-2007 |
Dan Gohman <djg@cray.com> |
It's not necessary to do rounding for alloca operations when the requested
alignment is equal to the stack alignment.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@40004 91177308-0d34-0410-b5e6-96231b3b80d8
allingConvLower.cpp
AGCombiner.cpp
egalizeDAG.cpp
akefile
cheduleDAG.cpp
cheduleDAGList.cpp
cheduleDAGRRList.cpp
cheduleDAGSimple.cpp
electionDAG.cpp
electionDAGISel.cpp
electionDAGPrinter.cpp
argetLowering.cpp
|
| 07a96765daedf180a7102d39fe56c499878312b7 |
16-Jul-2007 |
Dan Gohman <gohman@apple.com> |
Fix comments about vectors to use the current wording.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@39921 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
electionDAGISel.cpp
|
| 6d4b711e7f2e27d94d3c49dc9e7575dbe0f242e0 |
14-Jul-2007 |
Nick Lewycky <nicholas@mxc.ca> |
Fix the build. Patch from Holger Schurig.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@39856 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 2365f51ed03afe6993bae962fdc2e5a956a64cd5 |
14-Jul-2007 |
Anton Korobeynikov <asl@math.spbu.ru> |
Long live the exception handling!
This patch fills the last necessary bits to enable exceptions
handling in LLVM. Currently only on x86-32/linux.
In fact, this patch adds necessary intrinsics (and their lowering) which
represent really weird target-specific gcc builtins used inside unwinder.
After corresponding llvm-gcc patch will land (easy) exceptions should be
more or less workable. However, exceptions handling support should not be
thought as 'finished': I expect many small and not so small glitches
everywhere.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@39855 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
electionDAG.cpp
electionDAGISel.cpp
|
| a346615d11f0a560c6e7280c1e614301d9f93051 |
13-Jul-2007 |
Dan Gohman <gohman@apple.com> |
Fix the comment for LegalizeOp to more accurately reflect what it does.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@39827 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 05d92fe7c4310340335512a3a7de97d3cf07d68d |
13-Jul-2007 |
Dan Gohman <gohman@apple.com> |
Don't call SimplifyVBinOp for non-vector operations, following earlier review
feedback. This theoretically makes the common (scalar) case more efficient.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@39823 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| e7e7d0d7e39d0c7c659d26b97e8081fce0fcd749 |
13-Jul-2007 |
Dale Johannesen <dalej@apple.com> |
Skeleton of post-RA scheduler; doesn't do anything yet.
Change name of -sched option and DEBUG_TYPE to
pre-RA-sched; adjust testcases.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@39816 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAG.cpp
cheduleDAGList.cpp
cheduleDAGRRList.cpp
cheduleDAGSimple.cpp
electionDAGISel.cpp
|
| 743d3a754820e64eb779335a2cb2688fd0dd58d5 |
10-Jul-2007 |
Dan Gohman <gohman@apple.com> |
Change the peep for EXTRACT_VECTOR_ELT of BUILD_PAIR to look for
the new CONCAT_VECTORS node type instead, as that's what legalize
uses now. And add a peep for EXTRACT_VECTOR_ELT of INSERT_VECTOR_ELT.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@38503 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 5e2456c95996338ad7ed461b8ce4d21cb9d70a0b |
10-Jul-2007 |
Evan Cheng <evan.cheng@apple.com> |
If the operand is marked M_OPTIONAL_DEF_OPERAND, then it's a def.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@38496 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAG.cpp
|
| 70fb1aefd58eb78404a2bc86b6960b7b64574082 |
10-Jul-2007 |
Dan Gohman <gohman@apple.com> |
Fix a bug in the folding of binary operators to undef.
Thanks to Lauro for spotting this!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@38491 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| d595b5f1f051d79764ac8469f02efaae398f115c |
10-Jul-2007 |
Dan Gohman <gohman@apple.com> |
Fix the folding of undef in several binary operators to recognize
undef in either the left or right operand.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@38489 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| af825c840ebc4ca5248c62325b2371091c9fb4b4 |
10-Jul-2007 |
Evan Cheng <evan.cheng@apple.com> |
When a node value is only used by a CopyToReg, use the user's dest. This should not be restricted to nodes that produce only a single value.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@38485 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAG.cpp
cheduleDAGSimple.cpp
|
| c63d391c9a886d58c6a53a7f565fbd544b076d9f |
10-Jul-2007 |
Evan Cheng <evan.cheng@apple.com> |
Move DenseMapKeyInfo<SDOperand> from LegalizeDAG.cpp to SelectionDAGNodes.h
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@38484 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| d6fd1bc122ba791c698255d8be158b8ec424e248 |
10-Jul-2007 |
Dan Gohman <gohman@apple.com> |
Preserve volatililty and alignment information when lowering or
simplifying loads and stores.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@38473 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
egalizeDAG.cpp
|
| 532dc2e1f2473b16b48566c1cbc9eefe94a4e58e |
09-Jul-2007 |
Dan Gohman <gohman@apple.com> |
Change getCopyToParts and getCopyFromParts to always use target-endian
register ordering, for both physical and virtual registers. Update the PPC
target lowering for calls to expect registers for the call result to
already be in target order.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@38471 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 93f81e2822aa67337f629398c81bc2844ef9400a |
09-Jul-2007 |
Dan Gohman <gohman@apple.com> |
Initialize the IndexedModeActions array with memset before
updating it with calls to setIndexedLoadAction/setIndexedStoreAction,
which only update a few bits at a time. This avoids ostensible
undefined behavior of operationg on values which may be
trap-representations, and as a practical matter fixes errors from
valgrind, which doesn't track uninitialized memory with bit
granularity.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@38468 91177308-0d34-0410-b5e6-96231b3b80d8
argetLowering.cpp
|
| e094f54f4cb6cb899252b66d328aa167013c982d |
09-Jul-2007 |
Chris Lattner <sabre@nondot.org> |
Fix this warning:
DAGCombiner.cpp: In member function 'llvm::SDOperand<unnamed>::DAGCombiner::visitOR(llvm::SDNode*)':
DAGCombiner.cpp:1608: warning: passing negative value '-0x00000000000000001' for argument 1 to 'llvm::SDOperand llvm::SelectionDAG::getConstant(uint64_t, llvm::MVT::ValueType, bool)'
oiy.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@38458 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| f664e41b201bad27ed3661bf50cd71f54242c114 |
06-Jul-2007 |
Duncan Sands <baldrick@free.fr> |
The exception handling intrinsics return values,
so must be lowered to a value, not nothing at all.
Subtle point: I made eh_selector return 0 and
eh_typeid_for return 1. This means that only
cleanups (destructors) will be run as the exception
unwinds [if eh_typeid_for returned 0 then it would
be as if the first catch always matched, and the
corresponding handler would be run], which is
probably want you want in the CBE.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37947 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 1aa7efbd2c98e761f50992197473304b99257ca9 |
06-Jul-2007 |
Rafael Espindola <rafael.espindola@gmail.com> |
Add the byval attribute
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37940 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 902919541fc2eb0e914390d9696088cfec3733df |
06-Jul-2007 |
Duncan Sands <baldrick@free.fr> |
Remove propagateEHRegister in favour of a more limited
fix, that is adequate while PR1508 remains unresolved.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37938 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| b4fd45e2fc4973214227fbaa96975d9fcc19ba42 |
06-Jul-2007 |
Duncan Sands <baldrick@free.fr> |
Remove ExtractGlobalVariable - use StripPointerCasts
instead.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37937 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 86da6600aec9b8f1c3fbae157414bf1648eb639c |
06-Jul-2007 |
Evan Cheng <evan.cheng@apple.com> |
Workaround of getCopyToRegs and getCopyFromRegs bugs for big-endian machines.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37935 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 991262834d688c02e279017335dac34579848b99 |
06-Jul-2007 |
Evan Cheng <evan.cheng@apple.com> |
Change CalculateHeights and CalculateDepths to be non-recursive.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37934 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAG.cpp
|
| 50b153335d2943a95acf37d7ee84095f8e8af53c |
05-Jul-2007 |
Dan Gohman <gohman@apple.com> |
Make the debug string for ISD::MERGE_VALUES consistent with the others.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37922 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 6183f78cf8c6f56cc436f19120acf2a7856cb9db |
05-Jul-2007 |
Dan Gohman <gohman@apple.com> |
Add a parameter to getCopyToParts and getCopyFromParts to specify whether
endian swapping should be done, and update the code to use it. This fixes
some register ordering issues on big-endian systems, such as PowerPC,
introduced by the recent illegal by-val arguments changes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37921 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| cf26d7ccac1ad052b750edec36b13bc9ea8f70d7 |
04-Jul-2007 |
Duncan Sands <baldrick@free.fr> |
Extend eh.selector to support both catches and filters.
Drop the eh.filter intrinsic.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37875 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 613e0d8008b97550ca08c3e816d74c2af2c4fe29 |
03-Jul-2007 |
Dan Gohman <gohman@apple.com> |
Fix several over-aggressive folds for undef nodes in dagcombine, to
follow the rules for undef used in instcombine.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37851 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 849f214a4e3676e41168b0c5398165c4d4fb99f8 |
03-Jul-2007 |
Dale Johannesen <dalej@apple.com> |
Fix for PR 1505 (and 1489). Rewrite X87 register
model to include f32 variants. Some factoring
improvments forthcoming.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37847 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
electionDAGISel.cpp
|
| 27a70be55f8b63181598d144d034b396402be66e |
02-Jul-2007 |
Dan Gohman <gohman@apple.com> |
Replace ExpandScalarFormalArgs and ExpandScalarCallArgs with the newly
refactored getCopyFromParts and getCopyToParts, which are more general.
This effectively adds support for lowering illegal by-val vector call
arguments.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37843 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 23ff1826b9c848c0627747f3de976b6c99c94b4b |
02-Jul-2007 |
Dan Gohman <gohman@apple.com> |
Teach GetNegatedExpression to negate 0-B to B in UnsafeFPMath mode, and
visitFSUB to fold 0-B to -B in UnsafeFPMath mode. Also change visitFNEG
to use isNegatibleForFree/GetNegatedExpression instead of doing a subset
of the same thing manually.
This fixes test/CodeGen/X86/negative-sin.ll.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37842 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| c45453fa1db7a5c520208fb6ffbc9fdb823b0526 |
29-Jun-2007 |
Evan Cheng <evan.cheng@apple.com> |
Only do FNEG xform when the vector type is a floating point type.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37818 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 821262953af418649e49e52009f9d3ddae5736c2 |
29-Jun-2007 |
David Greene <greened@obbligato.org> |
Remove unused variables.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37816 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGRRList.cpp
|
| c908dcde45c6d7ddff0443cbc174a7cbfec21d1b |
29-Jun-2007 |
Evan Cheng <evan.cheng@apple.com> |
Fix a vector FP constant CSE bug.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37814 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| a2a488594df335efa17bc253436465c2ae984f91 |
29-Jun-2007 |
David Greene <greened@obbligato.org> |
Remove unnecessary attributions in comments.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37799 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGRRList.cpp
electionDAGISel.cpp
|
| cfacc8f5d25f38112eee836530004f7816439765 |
29-Jun-2007 |
David Greene <greened@obbligato.org> |
Fix reference to cached end iterator invalidated by an erase operation.
Uncovered by _GLIBCXX_DEBUG.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37795 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| a4ab2e8c726e1702d74eb207536bf953bd3d5c81 |
29-Jun-2007 |
David Greene <greened@obbligato.org> |
Remove the "special tie breaker" because it resulted in inconsistent
ordering and thus violated the strict weak ordering requirement of
priority_queue. Uncovered by _GLIBCXX_DEBUG.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37794 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGRRList.cpp
|
| 10a7aa6dea8d862feda05098d82a7630c80c30d8 |
29-Jun-2007 |
Dan Gohman <gohman@apple.com> |
Fix an assertion failure in legalizing bitcast operators on targets where
vectors are split down to single elements as part of legalization.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37785 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| b6f5b00c3bad3415d3f2ee1a6d5ee5a6f66a4540 |
29-Jun-2007 |
Dan Gohman <gohman@apple.com> |
Add new TargetLowering code to provide the final register type that an
illegal value type will be transformed to, for code that needs the
register type after all transformations instead of just after the first
transformation.
Factor out the code that uses this information to do copy-from-regs and
copy-to-regs for various purposes into separate functions so that they
are done consistently.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37781 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
argetLowering.cpp
|
| e47c333a12094296e54571ed1ac511a04d74840d |
27-Jun-2007 |
Evan Cheng <evan.cheng@apple.com> |
Partial fix for PR1502: If a EH register is needed in a successor of landing pad, add it as livein to all the blocks in the paths between the landing pad and the specified block.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37763 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 6595cb3000d7f5f8e9a76d556aa8609db91b7887 |
27-Jun-2007 |
Dan Gohman <gohman@apple.com> |
Rename ("shrinkify") MVT::isExtendedValueType to MVT::isExtendedVT.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37758 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
electionDAG.cpp
|
| 8c8c5fcbd757b5c44fa7ad9af038a2f2d950b624 |
27-Jun-2007 |
Dan Gohman <gohman@apple.com> |
Use getVectorTypeBreakdown in FunctionLoweringInfo::CreateRegForValue
to compute the number and type of registers needed for vector values
instead of computing it manually. This fixes PR1529.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37755 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 89b20c07e9f9539b141c5251ac67cc38afa637d5 |
27-Jun-2007 |
Dan Gohman <gohman@apple.com> |
Make the comment for ScalarizeVectorOp mention that it is only for use
with single-element vectors.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37752 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 7f32156bb9c017b71971c52fac892fa7b9b06dd2 |
25-Jun-2007 |
Dan Gohman <gohman@apple.com> |
Generalize MVT::ValueType and associated functions to be able to represent
extended vector types. Remove the special SDNode opcodes used for pre-legalize
vector operations, and the special MVT::Vector type used with them. Adjust
lowering and legalize to work with the normal SDNode kinds instead, and to
use the normal MVT functions to work with vector types instead of using the
two special operands that the pre-legalize nodes held.
This allows pre-legalize and post-legalize DAGs, and the code that operates
on them, to be more consistent. Pre-legalize vector operators can be handled
more consistently with scalar operators. And, -view-dag-combine1-dags and
-view-legalize-dags now look prettier for vector code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37719 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
egalizeDAG.cpp
electionDAG.cpp
electionDAGISel.cpp
argetLowering.cpp
|
| ea859be53ca13a1547c4675549946b74dc3c6f41 |
22-Jun-2007 |
Dan Gohman <gohman@apple.com> |
Move ComputeMaskedBits, MaskedValueIsZero, and ComputeNumSignBits from
TargetLowering to SelectionDAG so that they have more convenient
access to the current DAG, in preparation for the ValueType routines
being changed from standalone functions to members of SelectionDAG for
the pre-legalize vector type changes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37704 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
egalizeDAG.cpp
electionDAG.cpp
electionDAGISel.cpp
argetLowering.cpp
|
| 0b2ce1fc19c5f8742051cf022ac119a3d4d9a3ad |
22-Jun-2007 |
Evan Cheng <evan.cheng@apple.com> |
std::set is really really terrible. Switch to SmallPtrSet to reduce compile time. For Duraid's example. The overall isel time is reduced from 0.6255 sec to 0.1876 sec.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37701 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGRRList.cpp
|
| 2d74a318deed2b7957250cdcc04dc8e01924258b |
21-Jun-2007 |
Dan Gohman <gohman@apple.com> |
Tidy up ValueType names in comments.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37688 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
argetLowering.cpp
|
| b9f10196961ebe5b5573a5705048a5a8a6b56bb3 |
21-Jun-2007 |
Dan Gohman <gohman@apple.com> |
Rename TargetLowering::getNumElements and friends to
TargetLowering::getNumRegisters and similar, to avoid confusion with
the actual number of elements for vector types.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37687 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
argetLowering.cpp
|
| b13cdbd8658635e33fc7c5b84dd3f8a053cd907d |
21-Jun-2007 |
Evan Cheng <evan.cheng@apple.com> |
Xforms:
(add (select cc, 0, c), x) -> (select cc, x, (add, x, c))
(sub x, (select cc, 0, c)) -> (select cc, x, (sub, x, c))
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37685 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| b5bec2b6f6f4a4da96170d1c258ad424112ad2c5 |
19-Jun-2007 |
Dan Gohman <gohman@apple.com> |
Pass a SelectionDAG into SDNode::dump everywhere it's used, in prepration
for needing the DAG node to print pre-legalize extended value types, and
to get better debug messages with target-specific nodes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37656 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
cheduleDAG.cpp
electionDAG.cpp
|
| aeeccfc5b240d6ac87e507188f152bb0278b6472 |
19-Jun-2007 |
Chris Lattner <sabre@nondot.org> |
add isVarArg to CCState
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37640 91177308-0d34-0410-b5e6-96231b3b80d8
allingConvLower.cpp
|
| e10e6f7a36f6f60d1889465a4df51ac8cdb34365 |
18-Jun-2007 |
Chris Lattner <sabre@nondot.org> |
make ComputeTopDownOrdering significantly faster and use less stack space
by making it non-recursive
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37629 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 7a0a4fc9127039cc7c55d74994fe7790ac30de43 |
18-Jun-2007 |
Dan Gohman <gohman@apple.com> |
Make chain dependencies blue, in addition to being dashed.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37626 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGPrinter.cpp
|
| 24e5aada7d112447c41c12008f7daf1fc15a24bc |
16-Jun-2007 |
Tanya Lattner <tonic@nondot.org> |
Codegen support (stripped out) for the annotate attribute.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37608 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| c2c28fc24cc0c7886da93939b0279d3f444b35dc |
15-Jun-2007 |
Chris Lattner <sabre@nondot.org> |
Fix CodeGen/X86/inline-asm-x-scalar.ll:test4, by retaining regclass info
for tied register constraints.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37601 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| f40708223e409a152834b1553c6883ff2035b957 |
15-Jun-2007 |
Duncan Sands <baldrick@free.fr> |
Workaround for PR1508.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37597 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 51eaa86758338d5935c0eff0469c418b1256aba7 |
15-Jun-2007 |
Dan Gohman <gohman@apple.com> |
Rename MVT::getVectorBaseType to MVT::getVectorElementType.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37579 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
egalizeDAG.cpp
electionDAG.cpp
electionDAGISel.cpp
|
| ea632439d4259254670dc4a27b13d6f9370216a8 |
13-Jun-2007 |
Duncan Sands <baldrick@free.fr> |
Only correctly lower exception handing intrinsics if exception handling is
turned on. Likewise for scanning of invokes to mark landing pads.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37570 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 6595635175764f402e7a5e53216c8d46bdce8c28 |
13-Jun-2007 |
Dan Gohman <gohman@apple.com> |
Introduce new SelectionDAG node opcodes VEXTRACT_SUBVECTOR and
VCONCAT_VECTORS. Use these for CopyToReg and CopyFromReg legalizing in
the case that the full register is to be split into subvectors instead
of scalars. This replaces uses of VBIT_CONVERT to present values as
vector-of-vector types in order to make whole subvectors accessible via
BUILD_VECTOR and EXTRACT_VECTOR_ELT.
This is in preparation for adding extended ValueType values, where
having vector-of-vector types is undesirable.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37569 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
electionDAG.cpp
electionDAGISel.cpp
|
| 2046e12f022ad098fe84776d55f4ea1a5e342c85 |
13-Jun-2007 |
Dan Gohman <gohman@apple.com> |
When creating CopyFromReg nodes, always use legal types. And use the
correct types for the result vector, even though it is currently bitcasted
to a different type immediately.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37568 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| f19f6bb31e45c5fc34b17d89d80ed938f61ff047 |
13-Jun-2007 |
Duncan Sands <baldrick@free.fr> |
The fix that was applied for PR1224 stops the compiler
crashing but breaks exception handling. The problem
described in PR1224 is that invoke is a terminator that
can produce a value. The value may be needed in other
blocks. The code that writes to registers values needed
in other blocks runs before terminators are lowered (in
this case invoke) so asserted because the value was not
yet available. The fix that was applied was to do invoke
lowering earlier, before writing values to registers.
The problem this causes is that the code to copy values
to registers can be output after the invoke call. If
an exception is raised and control is passed to the
landing pad then this copy-code will never execute. If
the value is needed in some code path reached via the
landing pad then that code will get something bogus.
So revert the original fix and simply skip invoke values
in the general copying to registers code. Instead copy
the invoke value to a register in the invoke lowering code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37567 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 62000eee7de696cad5e3a307de395c77a61350ee |
07-Jun-2007 |
Dale Johannesen <dalej@apple.com> |
Do not change the size of function arguments. PR 1489.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37496 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 9fac0b5ff24e733072bdde68c7f34590c1892922 |
06-Jun-2007 |
Duncan Sands <baldrick@free.fr> |
Additional fix for PR1422: make sure the landing pad label is placed in the
correct machine basic block - do not rely on the eh.exception intrinsic
being in the landing pad: the loop optimizers can move it out.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37463 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 39833585556a69de12053ca1e104fe7edfd86cbd |
04-Jun-2007 |
Dan Gohman <gohman@apple.com> |
Pass the DAG to SDNode::dump to let it do more detailed dumps in some cases.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37413 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 575e2f4ea874deae3af8a940f30df5348d272190 |
04-Jun-2007 |
Dan Gohman <gohman@apple.com> |
Resolve implicit alignment before computing the FoldingSet information so
that the CSE map always contains explicit alignment information. This allows
more loads to be CSE'd when there is a mix of explicit-alignment loads and
implicit-alignment loads.
Also, in SelectionDAG::FindModifiedNodeSlot, add the operands to the
FoldingSetNodeID before the load/store information instead of after, so
that it matches what is done elsewhere.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37411 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 73ef58ab92d5cd23b119b7f206e5f8a8c529098d |
02-Jun-2007 |
Duncan Sands <baldrick@free.fr> |
Integrate exception filter support and exception catch support. This
simplifies the code in DwarfWriter, allows for multiple filters and
makes it trivial to specify filters accompanied by cleanups or catch-all
specifications (see next patch). What a deal! Patch blessed by Anton.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37398 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 398898cc6a4cba85d908444a2bb42b1a9fc3df2a |
01-Jun-2007 |
Duncan Sands <baldrick@free.fr> |
Since TypeInfos are passed as i8 pointers, a NULL TypeInfo should be passed
as a null i8 pointer not as a 0 i32.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37383 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 4e7e6cd13ab8cab410ad11375101878865579325 |
30-May-2007 |
Chris Lattner <sabre@nondot.org> |
Fix CodeGen/PowerPC/2007-05-30-dagcombine-miscomp.ll, and PR1473.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37362 91177308-0d34-0410-b5e6-96231b3b80d8
argetLowering.cpp
|
| 3adf951364c30d30b528133df1d4cedf2c2b7046 |
25-May-2007 |
Chris Lattner <sabre@nondot.org> |
tighten up recursion depth again
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37330 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| fa73ea2d9fd785a214256ca44488407b26c5a3db |
24-May-2007 |
Dan Gohman <gohman@apple.com> |
Minor comment cleanups.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37321 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 237898ac1f6f6d1915282cc3afaa3c36435e76c0 |
24-May-2007 |
Dan Gohman <gohman@apple.com> |
Add explicit qualification for namespace MVT members.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37320 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| c843abe868be76bb18d77ca6bda53dd4d2cf12f7 |
24-May-2007 |
Evan Cheng <evan.cheng@apple.com> |
Fix a typo that caused combiner to create mal-formed pre-indexed store where value store is the same as the base pointer.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37318 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 070280e97f801ae809ddcc7930c153929f253997 |
23-May-2007 |
Anton Korobeynikov <asl@math.spbu.ru> |
Mark all calls as "could throw", when exceptions are enabled. Emit necessary LP info too. This fixes PR1439
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37311 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 501fee71e077aad705ab2ab86741aec15b779174 |
23-May-2007 |
Chris Lattner <sabre@nondot.org> |
prevent exponential recursion in isNegatibleForFree
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37310 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 7667c0bac3cb46249fc14bb2f76111fb1625cdd6 |
19-May-2007 |
Chris Lattner <sabre@nondot.org> |
same patch as the previous one, but the symmetric case
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37249 91177308-0d34-0410-b5e6-96231b3b80d8
argetLowering.cpp
|
| 2ad913b3428b634f46d6606a150c5d180b528197 |
19-May-2007 |
Chris Lattner <sabre@nondot.org> |
Disable the (A == (B-A)) -> 2*A == B xform when the sub has multiple uses (in
this case, the xform introduces an extra operation). This compiles
PowerPC/compare-duplicate.ll into:
_test:
subf r2, r3, r4
cmplw cr0, r2, r3
bne cr0, LBB1_2 ;F
instead of:
_test:
slwi r2, r3, 1
subf r3, r3, r4
cmplw cr0, r4, r2
bne cr0, LBB1_2 ;F
This is target independent of course.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37246 91177308-0d34-0410-b5e6-96231b3b80d8
argetLowering.cpp
|
| fcc4dd91e5d4ba2f8fb8bd9ff24ee0ca0e08ab30 |
18-May-2007 |
Dan Gohman <gohman@apple.com> |
Qualify calls to getTypeForValueType with MVT:: too.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37233 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| b55757ec5f6f0218342a8910e1bbd9f018adc7d7 |
18-May-2007 |
Dan Gohman <gohman@apple.com> |
Qualify several calls to functions in the MVT namespace, for consistency.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37230 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
electionDAGISel.cpp
electionDAGPrinter.cpp
argetLowering.cpp
|
| 3fc5b01d38ddccbe53ff0b32cc0100351d698c66 |
17-May-2007 |
Chris Lattner <sabre@nondot.org> |
disable MaskedValueIsZero, ComputeMaskedBits, and SimplifyDemandedBits for
i128 integers. The 64-bit masks are not wide enough to represent the results.
These should be converted to APInt someday.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37169 91177308-0d34-0410-b5e6-96231b3b80d8
argetLowering.cpp
|
| b429f7303eecc6fe0218d86e2f1321f70473deb4 |
17-May-2007 |
Chris Lattner <sabre@nondot.org> |
add expand support for ADDC/SUBC/ADDE/SUBE so we can codegen 128-bit add/sub on 32-bit (or less) targets
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37168 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| d60483ef99a15630abba934001b1ff7d16a33b18 |
17-May-2007 |
Evan Cheng <evan.cheng@apple.com> |
Add target hook to specify block size limit for if-conversion.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37134 91177308-0d34-0410-b5e6-96231b3b80d8
argetLowering.cpp
|
| 98a6c62aff7393683571b05f73f6f22701569c09 |
17-May-2007 |
Dale Johannesen <dalej@apple.com> |
Don't fold bitconvert(load) for preinc/postdec loads. Likewise stores.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37130 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| c76d4410ab31723ea1a44821f2daa01a5cfef8eb |
16-May-2007 |
Chris Lattner <sabre@nondot.org> |
Use a ptr set instead of a linear search to unique TokenFactor operands.
This fixes PR1423
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37102 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 93003b8cf221f084e71e2b4033c41ff2cae6c36d |
16-May-2007 |
Evan Cheng <evan.cheng@apple.com> |
Bug fix: should check ABI alignment, not pref. alignment.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37094 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| b5bb7ffa9c40d13b21d1a04aec53a4428a6c02a8 |
15-May-2007 |
Lauro Ramos Venancio <lauro.venancio@gmail.com> |
Fix an infinite recursion in GetNegatedExpression.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37086 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| c90233b836c5d00045bbe7ca3d5d92df4825f5a1 |
15-May-2007 |
Chris Lattner <sabre@nondot.org> |
Fix some subtle issues handling immediate values. This fixes
test/CodeGen/ARM/2007-05-14-InlineAsmCstCrash.ll
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37069 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 2944652569d1beb538f5a72ab1a4bb581ea5cf91 |
15-May-2007 |
Chris Lattner <sabre@nondot.org> |
implement a simple fneg optimization/propagation thing. This compiles:
CodeGen/PowerPC/fneg.ll into:
_t4:
fmul f0, f3, f4
fmadd f1, f1, f2, f0
blr
instead of:
_t4:
fneg f0, f3
fmul f0, f0, f4
fmsub f1, f1, f2, f0
blr
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37054 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 2c4f94363a02f482ddcfccc343978595a8a79438 |
09-May-2007 |
Evan Cheng <evan.cheng@apple.com> |
Can't fold the bit_convert is the store is a truncating store.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36962 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 7294b58ecdb430d1473d0a9220a234e62a710d54 |
09-May-2007 |
Anton Korobeynikov <asl@math.spbu.ru> |
Do not assert, when case range split metric is zero and JTs are not allowed: just emit binary tree in this case. This
fixes PR1403.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36959 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| c2cd2b29f5b8e2eda88a1edadcd4bc7478a2439c |
07-May-2007 |
Evan Cheng <evan.cheng@apple.com> |
Forgot a check.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36910 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 59d5b68dffc4b25290ab21416cd33a7956269389 |
07-May-2007 |
Evan Cheng <evan.cheng@apple.com> |
Enable a couple of xforms:
- (store (bitconvert v)) -> (store v) if resultant store does not require
higher alignment
- (bitconvert (load v)) -> (load (bitconvert*)v) if resultant load does not
require higher alignment
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36908 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 4fee7034d5a9dae46e78ff300fd6dbf2cdfcb8f9 |
07-May-2007 |
Duncan Sands <baldrick@free.fr> |
Parameter attributes on invoke calls were being lost due to the wrong
attribute index being used. Fix proposed by Anton Korobeynikov, who
asked me to implement and commit it for him. This is PR1398.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36906 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| b682448ebd8074dd63b40d41204fc69a417e0eac |
06-May-2007 |
Anton Korobeynikov <asl@math.spbu.ru> |
Detabify
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36891 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| b464c446791f03cd8abc0b55bab4d472de534218 |
05-May-2007 |
Chris Lattner <sabre@nondot.org> |
Propagate alignment/volatility in two places.
Implement support for expanding a bitcast from an illegal vector type to
a legal one (e.g. 4xi32 -> 4xf32 in SSE1). This fixes PR1371 and
CodeGen/X86/2007-05-05-VecCastExpand.ll
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36787 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 3b346368deddbe3cb853b29472de46bc9b58d6b8 |
04-May-2007 |
Duncan Sands <baldrick@free.fr> |
A bitcast of a global variable may have been constant folded to a GEP -
handle this case too.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36745 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| a7d4a04d244c5a8c6364af2e39a512ec6b9600a2 |
04-May-2007 |
Evan Cheng <evan.cheng@apple.com> |
Don't create indexed load / store with zero offset!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36716 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 75c7d2bd551acd1ad4f0f58b763ec8840f1d9c34 |
03-May-2007 |
Chris Lattner <sabre@nondot.org> |
Allow i/s to match (gv+c). This fixes CodeGen/PowerPC/2007-05-03-InlineAsm-S-Constraint.ll
and PR1382
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36672 91177308-0d34-0410-b5e6-96231b3b80d8
argetLowering.cpp
|
| 1997473cf72957d0e70322e2fe6fe2ab141c58a6 |
03-May-2007 |
Devang Patel <dpatel@apple.com> |
Drop 'const'
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36662 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 6ad8256d769f352103b6101c7090e4bfc0389330 |
03-May-2007 |
Anton Korobeynikov <asl@math.spbu.ru> |
Properly set arguments bitwidth of EHSELECT node
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36654 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 3e15bf33e024b9df9e89351a165acfdb1dde51ed |
02-May-2007 |
Devang Patel <dpatel@apple.com> |
Use 'static const char' instead of 'static const int'.
Due to darwin gcc bug, one version of darwin linker coalesces
static const int, which defauts PassID based pass identification.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36652 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 794fd75c67a2cdc128d67342c6d88a504d186896 |
01-May-2007 |
Devang Patel <dpatel@apple.com> |
Do not use typeinfo to identify pass in pass manager.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36632 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 498f55989a0ef437c098452ff83ccfe7ace2d802 |
01-May-2007 |
Evan Cheng <evan.cheng@apple.com> |
Forgot about chain result; also UNDEF cannot have multiple values.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36622 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 45a7ca9b23e7e3447465cdf97788d137aa98cb47 |
01-May-2007 |
Evan Cheng <evan.cheng@apple.com> |
* Only turn a load to UNDEF if all of its outputs have no uses (indexed loads
produce two results.)
* Do not touch volatile loads.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36604 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| e7cf56aeeebed7423402fdf84c5b1aaf6830316e |
30-Apr-2007 |
Chris Lattner <sabre@nondot.org> |
Continue refactoring inline asm code. If there is an earlyclobber output
register, preallocate all input registers and the early clobbered output.
This fixes PR1357 and CodeGen/PowerPC/2007-04-30-InlineAsmEarlyClobber.ll
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36599 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| bf996f1d5e441c7504ff155d818190f593d54672 |
30-Apr-2007 |
Chris Lattner <sabre@nondot.org> |
refactor GetRegistersForValue to take OpInfo as an argument instead of various
pieces of it. No functionality change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36592 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 3ff90dc1c8aaa5d9be94cdca8c4a7e71f45da8fd |
30-Apr-2007 |
Chris Lattner <sabre@nondot.org> |
refactor some code, no functionality change
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36590 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 6995cf6015580eeab07a1c671fca180084a1325e |
29-Apr-2007 |
Chris Lattner <sabre@nondot.org> |
generalize aggregate handling
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36568 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 09e4b7e1b7d624a3010ace2c23783e77b366fa7e |
28-Apr-2007 |
Chris Lattner <sabre@nondot.org> |
memory operands that have a direct operand should have their stores created
before the copies into physregs are done. This avoids having flag operands
skip the store, causing cycles in the dag at sched time. This fixes infinite
loops on these tests:
test/CodeGen/Generic/2007-04-08-MultipleFrameIndices.ll for PR1308
test/CodeGen/PowerPC/2007-01-29-lbrx-asm.ll
test/CodeGen/PowerPC/2007-01-31-InlineAsmAddrMode.ll
test/CodeGen/X86/2006-07-12-InlineAsmQConstraint.ll for PR828
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36547 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| c83994e5d4c75b4dc3d0e2ac52972a4fff816eb6 |
28-Apr-2007 |
Chris Lattner <sabre@nondot.org> |
eliminate more redundant constraint type analysis
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36546 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 2a600be22618b09165f3fe2a88bbe2fb71bc478d |
28-Apr-2007 |
Chris Lattner <sabre@nondot.org> |
merge constraint type analysis stuff together.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36545 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 0c58340aead6880876076ee4e3abf3aca92a2647 |
28-Apr-2007 |
Chris Lattner <sabre@nondot.org> |
Significant refactoring of the inline asm stuff, to support future changes.
No functionality change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36544 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 44b2c5098f5cf766b4eff43d9eb0d8a9a143e7d8 |
28-Apr-2007 |
Chris Lattner <sabre@nondot.org> |
memory inputs to an inline asm are required to have an address available.
If the operand is not already an indirect operand, spill it to a constant
pool entry or a stack slot.
This fixes PR1356 and CodeGen/X86/2007-04-27-InlineAsm-IntMemInput.ll
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36536 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
electionDAGISel.cpp
|
| f2f3cd5129a1eef6034ce09314b10f3a1e1abaf6 |
28-Apr-2007 |
Chris Lattner <sabre@nondot.org> |
Fix CodeGen/Generic/2007-04-27-LargeMemObject.ll and
CodeGen/Generic/2007-04-27-InlineAsm-X-Dest.ll
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36534 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| b01731812284e5396dcb6dd3b0eae769fcaed6d1 |
28-Apr-2007 |
Chris Lattner <sabre@nondot.org> |
Fix this to match change to InlineAsm class.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36524 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| eb7f34f2cb1584f155b9cefdb246b300fb2fc9c4 |
27-Apr-2007 |
Chris Lattner <sabre@nondot.org> |
Fix incorrect legalization of EHSELECTOR. This fixes
CodeGen/Generic/2007-04-14-EHSelectorCrash.ll and PR1326
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36510 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 4c6cfad85e63e2dbe273431bdf20533b495c955d |
27-Apr-2007 |
Evan Cheng <evan.cheng@apple.com> |
Expand UINT_TO_FP in turns of SINT_TO_FP when UINTTOFP_* libcalls are not available.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36501 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 99f9a77c496e8dc65fa7d9f693de9bec9aa574e5 |
27-Apr-2007 |
Chris Lattner <sabre@nondot.org> |
improve EH global handling, patch by Duncan Sands.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36499 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 64c0f84c725a5a21c4753575347f24ce0e250088 |
26-Apr-2007 |
Chris Lattner <sabre@nondot.org> |
enable Anton's shift/and switch lowering stuff! It now passes ppc bootstrap
successfully! woohoo...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36496 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| ab8fd404034439ba23230df512a8a2779e5d48a3 |
26-Apr-2007 |
Anton Korobeynikov <asl@math.spbu.ru> |
Fixx off-by-one bug, which prevents llvm-gcc bootstrap on ppc32
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36490 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| edc1d159841fd279d58177bfd6ac4bc1f616d91a |
26-Apr-2007 |
Dan Gohman <gohman@apple.com> |
Fix a typo in a comment.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36485 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGRRList.cpp
|
| c1a3520580c11f5d3430d5dab1e8006f8a0c7dc2 |
25-Apr-2007 |
Evan Cheng <evan.cheng@apple.com> |
This was lefted out. Fixed sumarray-dbl.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36445 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 6266c18ea12b42bd9b262a1f4f8c3d7a85130118 |
25-Apr-2007 |
Chris Lattner <sabre@nondot.org> |
allow support for 64-bit stack objects
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36420 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 964dd860542aa12bea93474dc159b4a7e3a6a9c1 |
25-Apr-2007 |
Chris Lattner <sabre@nondot.org> |
Be more careful about folding op(x, undef) when we have vector operands.
This fixes CodeGen/X86/2007-04-24-VectorCrash.ll
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36413 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 95b39550344bad0d15d1ffa7afc300eb1533ed19 |
24-Apr-2007 |
Bill Wendling <isanbard@gmail.com> |
Assertion when using a 1-element vector for an add operation. Get the
real vector type in this case.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36402 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| f147a8d56e0811525916f4d8cd5dd1777f834a85 |
24-Apr-2007 |
Scott Michel <scottm@aero.org> |
Use '-1U' where '-1UL' is obvious overkill, eliminating gcc warnings about
tests always being true in the process.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36387 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 95c218a83ecf77590b9dc40c636720772d2b5cd7 |
23-Apr-2007 |
Christopher Lamb <christopher.lamb@gmail.com> |
PR400 phase 2. Propagate attributed load/store information through DAGs.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36356 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
electionDAG.cpp
electionDAGISel.cpp
|
| 2c5c111b6c144b05718404c85b9dfcc76b1619e7 |
21-Apr-2007 |
Lauro Ramos Venancio <lauro.venancio@gmail.com> |
X86 TLS: Implement review feedback.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36318 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| c67bdc288aac130d88630f7fa95ceca6bcf95077 |
21-Apr-2007 |
Reid Spencer <rspencer@reidspencer.com> |
Revert Christopher Lamb's load/store alignment changes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36309 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
electionDAG.cpp
electionDAGISel.cpp
|
| 2330e4d4c4f8008d17f5a38ac0d7b04e139d4131 |
21-Apr-2007 |
Christopher Lamb <christopher.lamb@gmail.com> |
add support for alignment attributes on load/store instructions
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36301 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
electionDAG.cpp
electionDAGISel.cpp
|
| 0d3b67809ccab229a03db8c1bede852fb89eb081 |
21-Apr-2007 |
Lauro Ramos Venancio <lauro.venancio@gmail.com> |
Allow the lowering of ISD::GLOBAL_OFFSET_TABLE.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36290 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| b3a0417cad8b625acc3033bd5e24afb9ffd0b084 |
20-Apr-2007 |
Lauro Ramos Venancio <lauro.venancio@gmail.com> |
Implement "general dynamic", "initial exec" and "local exec" TLS models for
X86 32 bits.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36283 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
electionDAG.cpp
|
| 61a4c072b9407983df1a6c965ada57474766b282 |
18-Apr-2007 |
Chris Lattner <sabre@nondot.org> |
allow SRL to simplify its operands, as it doesn't demand all bits as input.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36245 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| ec06e9a6707b9b00889e34ebad7cd3f20cb70bb6 |
18-Apr-2007 |
Chris Lattner <sabre@nondot.org> |
When replacing a node in SimplifyDemandedBits, if the old node used any
single-use nodes, they will be dead soon. Make sure to remove them before
processing other nodes. This implements CodeGen/X86/shl_elim.ll
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36244 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 0a16a1f73816f7bdd420212feb72467707d5ac02 |
18-Apr-2007 |
Chris Lattner <sabre@nondot.org> |
fix a pasto
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36242 91177308-0d34-0410-b5e6-96231b3b80d8
argetLowering.cpp
|
| 8c7d2d56bf5aa2186e2d08ed1dc37c2f392b4aae |
18-Apr-2007 |
Chris Lattner <sabre@nondot.org> |
Fix a bug in my previous patch, grabbing the shift amount width from the
wrong operand.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36223 91177308-0d34-0410-b5e6-96231b3b80d8
argetLowering.cpp
|
| 895c4ab564c145d16a585201ea49b91541d806b6 |
17-Apr-2007 |
Chris Lattner <sabre@nondot.org> |
Fold (x << c1)>> c2 into a single shift if the bits shifted out aren't used.
This compiles:
int baz(long long a) { return (short)(((int)(a >>24)) >> 9); }
into:
_baz:
srwi r2, r3, 1
extsh r3, r2
blr
on PPC, instead of:
_baz:
slwi r2, r3, 8
srwi r2, r2, 9
extsh r3, r2
blr
GCC produces:
_baz:
srwi r10,r4,24
insrwi r10,r3,24,0
srawi r9,r3,24
srawi r3,r10,9
extsh r3,r3
blr
This implements CodeGen/PowerPC/shl_elim.ll
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36221 91177308-0d34-0410-b5e6-96231b3b80d8
argetLowering.cpp
|
| 95a5e0507e07fa3ef7c61aade9eb0efd1d716a25 |
17-Apr-2007 |
Chris Lattner <sabre@nondot.org> |
SIGN_EXTEND_INREG does not demand its top bits. Give SimplifyDemandedBits
a chance to hack on it. This compiles:
int baz(long long a) { return (short)(((int)(a >>24)) >> 9); }
into:
_baz:
slwi r2, r3, 8
srwi r2, r2, 9
extsh r3, r2
blr
instead of:
_baz:
srwi r2, r4, 24
rlwimi r2, r3, 8, 0, 23
srwi r2, r2, 9
extsh r3, r2
blr
This implements CodeGen/PowerPC/sign_ext_inreg1.ll
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36212 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| bed2946a96ecb15b0b636fa74cb26ce61b1c648e |
16-Apr-2007 |
Anton Korobeynikov <asl@math.spbu.ru> |
Removed tabs everywhere except autogenerated & external files. Add make
target for tabs checking.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36146 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGSimple.cpp
argetLowering.cpp
|
| 1c35968d4d622c30b82698506a6fa128f012a504 |
14-Apr-2007 |
Chris Lattner <sabre@nondot.org> |
disable switch lowering using shift/and. It still breaks ppc bootstrap for
some reason. :( Will investigate.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36011 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| e01017bba4f44ab65eba11fd065c9cd16b5edb33 |
14-Apr-2007 |
Anton Korobeynikov <asl@math.spbu.ru> |
Fix PR1325: Case range optimization was performed in the case it
shouldn't. Also fix some "latent" bug on 64-bit platforms
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35990 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 3ff981749bed4347dfe7196ac066be1d4f51ea1f |
14-Apr-2007 |
Chris Lattner <sabre@nondot.org> |
disable shift/and lowering to work around PR1325 for now.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35985 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 8085bcfdca515a359c746ea475a3b8e9cac1c077 |
13-Apr-2007 |
Anton Korobeynikov <asl@math.spbu.ru> |
Fix PR1323 : we haven't updated phi nodes in good manner :)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35963 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 3a508c94a6c6f124e8b0549358ce76deb92ab662 |
12-Apr-2007 |
Chris Lattner <sabre@nondot.org> |
the result of an inline asm copy can be an arbitrary VT that the register
class supports. In the case of vectors, this means we often get the wrong
type (e.g. we get v4f32 instead of v8i16). Make sure to convert the vector
result to the right type. This fixes CodeGen/X86/2007-04-11-InlineAsmVectorResult.ll
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35944 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 4829b1c6ab810ee274a104985915988b4f92aa7a |
12-Apr-2007 |
Chris Lattner <sabre@nondot.org> |
fold noop vbitconvert instructions
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35943 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| c2941779c3ed1ffbe66716c6f6b2a9fc38a5ea7b |
12-Apr-2007 |
Chris Lattner <sabre@nondot.org> |
Fix weirdness handling single element vectors.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35941 91177308-0d34-0410-b5e6-96231b3b80d8
argetLowering.cpp
|
| f75b874957aa61e81804e266daf671aa9dcc75b9 |
12-Apr-2007 |
Reid Spencer <rspencer@reidspencer.com> |
For PR1284:
Implement the "part_set" intrinsic.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35938 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| c24bbaddf869aa904300fcb0e8174070bde5c5a2 |
11-Apr-2007 |
Chris Lattner <sabre@nondot.org> |
fix an infinite loop compiling ldecod, notice by JeffC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35910 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 1eba01e9a04f4a59ddc1cb66dc049a333f256112 |
11-Apr-2007 |
Chris Lattner <sabre@nondot.org> |
Fix this harder.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35888 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| c56a81dff1553536efee17445ef5eab276f22380 |
11-Apr-2007 |
Chris Lattner <sabre@nondot.org> |
don't create shifts by zero, fix some problems with my previous patch
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35887 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 20a35c3fa57ba9c3184d8848541d9a89b6c2b338 |
11-Apr-2007 |
Chris Lattner <sabre@nondot.org> |
Teach the codegen to turn [aez]ext (setcc) -> selectcc of 1/0, which often
allows other simplifications. For example, this compiles:
int isnegative(unsigned int X) {
return !(X < 2147483648U);
}
Into this code:
x86:
movl 4(%esp), %eax
shrl $31, %eax
ret
arm:
mov r0, r0, lsr #31
bx lr
thumb:
lsr r0, r0, #31
bx lr
instead of:
x86:
cmpl $0, 4(%esp)
sets %al
movzbl %al, %eax
ret
arm:
mov r3, #0
cmp r0, #0
movlt r3, #1
mov r0, r3
bx lr
thumb:
mov r2, #1
mov r1, #0
cmp r0, #0
blt LBB1_2 @entry
LBB1_1: @entry
cpy r2, r1
LBB1_2: @entry
cpy r0, r2
bx lr
Testcase here: test/CodeGen/Generic/ispositive.ll
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35883 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 1982ef20c44d85386a239a1b24eb2bb72cea29ec |
11-Apr-2007 |
Chris Lattner <sabre@nondot.org> |
Codegen integer abs more efficiently using the trick from the PPC CWG. This
improves codegen on many architectures. Tests committed as CodeGen/*/iabs.ll
X86 Old: X86 New:
_test: _test:
movl 4(%esp), %ecx movl 4(%esp), %eax
movl %ecx, %eax movl %eax, %ecx
negl %eax sarl $31, %ecx
testl %ecx, %ecx addl %ecx, %eax
cmovns %ecx, %eax xorl %ecx, %eax
ret ret
PPC Old: PPC New:
_test: _test:
cmpwi cr0, r3, -1 srawi r2, r3, 31
neg r2, r3 add r3, r3, r2
bgt cr0, LBB1_2 ; xor r3, r3, r2
LBB1_1: ; blr
mr r3, r2
LBB1_2: ;
blr
ARM Old: ARM New:
_test: _test:
rsb r3, r0, #0 add r3, r0, r0, asr #31
cmp r0, #0 eor r0, r3, r0, asr #31
movge r3, r0 bx lr
mov r0, r3
bx lr
Thumb Old: Thumb New:
_test: _test:
neg r2, r0 asr r2, r0, #31
cmp r0, #0 add r0, r0, r2
bge LBB1_2 eor r0, r2
LBB1_1: @ bx lr
cpy r0, r2
LBB1_2: @
bx lr
Sparc Old: Sparc New:
test: test:
save -96, %o6, %o6 save -96, %o6, %o6
sethi 0, %l0 sra %i0, 31, %l0
sub %l0, %i0, %l0 add %i0, %l0, %l1
subcc %i0, -1, %l1 xor %l1, %l0, %i0
bg .BB1_2 restore %g0, %g0, %g0
nop retl
.BB1_1: nop
or %g0, %l0, %i0
.BB1_2:
restore %g0, %g0, %g0
retl
nop
It also helps alpha/ia64 :)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35881 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 18da0720887527ed570e9703ae5f290beb491ee1 |
11-Apr-2007 |
Reid Spencer <rspencer@reidspencer.com> |
For PR1146:
Put the parameter attributes in their own ParamAttr name space. Adjust the
rest of llvm as a result.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35877 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| c6eb6d72550aa3f7241141e3e28520dfef738c81 |
10-Apr-2007 |
Chris Lattner <sabre@nondot.org> |
apparently some people commit without building the tree, or they forget to
commit a LOT of files.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35858 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 2da8da46ba48b857a2e3e71a97c18ebb23c14af5 |
10-Apr-2007 |
Jeff Cohen <jeffc@jolt-lang.org> |
No longer needed.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35850 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 2b95fd67da204c6f608cc280ea91230ff781d998 |
10-Apr-2007 |
Chris Lattner <sabre@nondot.org> |
remove dead target hooks.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35847 91177308-0d34-0410-b5e6-96231b3b80d8
argetLowering.cpp
|
| b445d0cbb9b299ba8ec7be2494e35c501b6d3a93 |
10-Apr-2007 |
Chris Lattner <sabre@nondot.org> |
remove some dead target hooks, subsumed by isLegalAddressingMode
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35840 91177308-0d34-0410-b5e6-96231b3b80d8
argetLowering.cpp
|
| 54e2b142be6ac759e87dde8a643a7beaff0365df |
09-Apr-2007 |
Anton Korobeynikov <asl@math.spbu.ru> |
Use integer log for metric calculation
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35834 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| efc366263659db05ddc5e14532946cb9213bcdd6 |
09-Apr-2007 |
Jeff Cohen <jeffc@jolt-lang.org> |
Unbreak VC++ build.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35817 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 4198c58c716cbe4516ac3a1a407a3cd52548bc3b |
09-Apr-2007 |
Anton Korobeynikov <asl@math.spbu.ru> |
Next stage into switch lowering refactoring
1. Fix some bugs in the jump table lowering threshold
2. Implement much better metric for optimal pivot selection
3. Tune thresholds for different lowering methods
4. Implement shift-and trick for lowering small (<machine word
length) cases with few destinations. Good testcase will follow.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35816 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 5694b6e90eaf94fa7a21f101a8e4424d813a85ce |
09-Apr-2007 |
Reid Spencer <rspencer@reidspencer.com> |
For PR1146:
Adapt handling of parameter attributes to use the new ParamAttrsList class.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35814 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 1a6acc214dc066ea08365b605e109203e9164068 |
09-Apr-2007 |
Chris Lattner <sabre@nondot.org> |
implement CodeGen/X86/inline-asm-x-scalar.ll:test3
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35802 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| ff33cc4d08a115e40b8ad0caabfe971cd9a8351a |
09-Apr-2007 |
Chris Lattner <sabre@nondot.org> |
add some assertions
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35800 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 4b993b19f9837fdf2db55a3e042e8adab3d63c26 |
09-Apr-2007 |
Chris Lattner <sabre@nondot.org> |
Fix PR1316
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35783 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 921169b103497001e1d22927f4fd1682d43eba57 |
09-Apr-2007 |
Chris Lattner <sabre@nondot.org> |
Fix for CodeGen/X86/2007-04-08-InlineAsmCrash.ll and PR1314
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35779 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| e303ac9052b9d03eff236469eb560e5b5da7fae2 |
06-Apr-2007 |
Chris Lattner <sabre@nondot.org> |
minor comment fix
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35696 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 3f108cb5558a80a63711114d819358f19773c057 |
05-Apr-2007 |
Reid Spencer <rspencer@reidspencer.com> |
Change the bit_part_select (non)implementation from "return 0" to abort.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35679 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| addd11d98ee3a3013c66d3fd25ee2cfb09b3c7bd |
05-Apr-2007 |
Reid Spencer <rspencer@reidspencer.com> |
Implement the llvm.bit.part_select.iN.iN.iN overloaded intrinsic.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35678 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 5502bf67cd49221583c15472150905ce13184d36 |
04-Apr-2007 |
Anton Korobeynikov <asl@math.spbu.ru> |
Properly emit range comparisons for switch cases, where neighbour cases
go to the same destination. Now we're producing really good code for
switch-lower-feature.ll testcase
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35672 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| c9dc11457809b6641de853af2261721a97ad1f26 |
02-Apr-2007 |
Scott Michel <scottm@aero.org> |
1. Insert custom lowering hooks for ISD::ROTR and ISD::ROTL.
2. Help DAGCombiner recognize zero/sign/any-extended versions of ROTR and ROTL
patterns. This was motivated by the X86/rotate.ll testcase, which should now
generate code for other platforms (and soon-to-come platforms.) Rewrote code
slightly to make it easier to read.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35605 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
egalizeDAG.cpp
|
| a4f9c4d29affaae0b4a3315ffff20e9130ecd17f |
01-Apr-2007 |
Reid Spencer <rspencer@reidspencer.com> |
For PR1297:
Adjust for changes in the bit counting intrinsics. They all return i32
now so we have to trunc/zext the DAG node accordingly.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35546 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 577cc32d9a1af6ad3f6adf8b6de072b9ee1c9a8b |
01-Apr-2007 |
Reid Spencer <rspencer@reidspencer.com> |
For PR1297:
Change getOperationName to return std::string instead of const char*
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35545 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| c8d288f8fa9e46199a29e1954550c980f184bd1c |
31-Mar-2007 |
Chris Lattner <sabre@nondot.org> |
move a bunch of code out of the sdisel pass into its own opt pass "codegenprepare".
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35529 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| d2f340b746e54fca27b654fd6740973fdf6b85f1 |
31-Mar-2007 |
Chris Lattner <sabre@nondot.org> |
switch TL::getValueType to use MVT::getValueType.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35527 91177308-0d34-0410-b5e6-96231b3b80d8
argetLowering.cpp
|
| 1436bb657d22b01fd9a526ee7f9b2cb880c064a7 |
31-Mar-2007 |
Chris Lattner <sabre@nondot.org> |
add one addressing mode description hook to rule them all.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35520 91177308-0d34-0410-b5e6-96231b3b80d8
argetLowering.cpp
|
| 2041a0ef7544ec5ceece9cabd3963cc887861c1d |
30-Mar-2007 |
Dale Johannesen <dalej@apple.com> |
Fix incorrect combination of different loads. Reenable zext-over-truncate
combination.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35517 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
electionDAG.cpp
|
| b0b6c76ffe71fc5d16a38b831ef0eddec02ddbe3 |
29-Mar-2007 |
Evan Cheng <evan.cheng@apple.com> |
Disable load width reduction xform of variant (zext (truncate load x)) for
big endian targets until llvm-gcc build issue has been resolved.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35449 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 7aff11a1eddcebe9936e14836cd527c46acde651 |
28-Mar-2007 |
Evan Cheng <evan.cheng@apple.com> |
Scale 1 is always ok.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35407 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| caaf69107ece8bd9864fed4d64e2a84fa5f8cd4b |
28-Mar-2007 |
Evan Cheng <evan.cheng@apple.com> |
Remove isLegalAddressImmediate.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35406 91177308-0d34-0410-b5e6-96231b3b80d8
argetLowering.cpp
|
| baeccc8741958c0d27f1ba1d162468f615b565ac |
28-Mar-2007 |
Evan Cheng <evan.cheng@apple.com> |
GEP index sinking fixes:
1) Take address scale into consideration. e.g. i32* -> scale 4.
2) Examine all the users of GEP.
3) Generalize to inter-block GEP's (no longer uses loopinfo).
4) Don't do xform if GEP has other variable index(es).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35403 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| dd433210797bc13513989a033e488d4e19442723 |
27-Mar-2007 |
Anton Korobeynikov <asl@math.spbu.ru> |
Remove dead code
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35380 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| b17b08d1f2cdbc3aba28e31755d7a5c3c55e4c3a |
27-Mar-2007 |
Anton Korobeynikov <asl@math.spbu.ru> |
Split big monster into small helpers. No functionality change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35379 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| d0083bc5eccd2f776788cb67e589edb456e59a7e |
27-Mar-2007 |
Evan Cheng <evan.cheng@apple.com> |
SDISel does not preserve all, it changes CFG and other info.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35376 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 15213b77cfb1f725ebe199b4d68b79407d9e3a84 |
26-Mar-2007 |
Evan Cheng <evan.cheng@apple.com> |
SIGN_EXTEND_INREG requires one extra operand, a ValueType node.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35350 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 3a84b9baf67c938454840d10d9e53269c755cd3e |
25-Mar-2007 |
Anton Korobeynikov <asl@math.spbu.ru> |
First step of switch lowering refactoring: perform worklist-driven
strategy, emit JT's where possible.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35338 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 5df99b376f38a2a0aaa2fc63254cf0306eef3c1b |
25-Mar-2007 |
Chris Lattner <sabre@nondot.org> |
Implement support for vector operands to inline asm, implementing
CodeGen/X86/2007-03-24-InlineAsmVectorOp.ll
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35332 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| c13dd1cf4c0d83ac3ed2a6b0c36fab72e9d6c6e5 |
25-Mar-2007 |
Chris Lattner <sabre@nondot.org> |
implement initial support for the silly X constraint. Testcase here: CodeGen/X86/2007-03-24-InlineAsmXConstraint.ll
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35327 91177308-0d34-0410-b5e6-96231b3b80d8
argetLowering.cpp
|
| 065421f99fc155c3910a77c3a47de99f3f6af4d0 |
25-Mar-2007 |
Chris Lattner <sabre@nondot.org> |
Implement CodeGen/X86/2007-03-24-InlineAsmMultiRegConstraint.ll
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35324 91177308-0d34-0410-b5e6-96231b3b80d8
argetLowering.cpp
|
| 4234f57fa02b1f04a9f52a7b3c2aa22d32ac521c |
25-Mar-2007 |
Chris Lattner <sabre@nondot.org> |
switch TargetLowering::getConstraintType to take the entire constraint,
not just the first letter. No functionality change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35322 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
argetLowering.cpp
|
| 82dcb4fe23686784a5ad6379860970f1146db50d |
24-Mar-2007 |
Chris Lattner <sabre@nondot.org> |
don't rely on ADL
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35299 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| dae54ce7fc96be8d8d5d3a5afff856bbdf1e81a9 |
24-Mar-2007 |
Evan Cheng <evan.cheng@apple.com> |
Adjust offset to compensate for big endian machines.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35293 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| e177e307fce9cf543b8f0b7a7963cc0328c5f362 |
23-Mar-2007 |
Evan Cheng <evan.cheng@apple.com> |
Make sure SEXTLOAD of the specific type is supported on the target.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35289 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| b37b80ce4669c41dcebaeb227b15f552b2c24210 |
23-Mar-2007 |
Evan Cheng <evan.cheng@apple.com> |
Also replace uses of SRL if that's also folded during ReduceLoadWidth().
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35286 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 0b063def9809ed59797fd40a616665ac3e675657 |
23-Mar-2007 |
Evan Cheng <evan.cheng@apple.com> |
A couple of bug fixes for reducing load width xform:
1. Address offset is in bytes.
2. Make sure truncate node uses are replaced with new load.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35274 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| ecb7a77885b174cf4d001a9b48533b3979e7810d |
22-Mar-2007 |
Dan Gohman <gohman@apple.com> |
Change uses of Function::front to Function::getEntryBlock for readability.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35265 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| c88138fb5e0aa0bcbc95d6c3352e08cfdfcfecef |
22-Mar-2007 |
Evan Cheng <evan.cheng@apple.com> |
More opportunities to reduce load size.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35254 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| fa4bce2b76c8557cfd0794beef86efe5fb0087fa |
21-Mar-2007 |
Dale Johannesen <dalej@apple.com> |
repair x86 performance, dejagnu problems from previous change
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35245 91177308-0d34-0410-b5e6-96231b3b80d8
argetLowering.cpp
|
| 007b69eeaa59fef76acdf38726cec13862f9dd0c |
21-Mar-2007 |
Evan Cheng <evan.cheng@apple.com> |
fold (truncate (srl (load x), c)) -> (smaller load (x+c/vt bits))
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35239 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 8e59e163db8cd3e7b4c96e438fbedf78bff06707 |
20-Mar-2007 |
Dale Johannesen <dalej@apple.com> |
do not share old induction variables when this would result in invalid
instructions (that would have to be split later)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35227 91177308-0d34-0410-b5e6-96231b3b80d8
argetLowering.cpp
|
| c01a53007a4f4f9a601f1cc83ff4e2935405b905 |
20-Mar-2007 |
Jeff Cohen <jeffc@jolt-lang.org> |
Fix some VC++ warnings.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35224 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAG.cpp
|
| a0a26b7454ae6e7a729b4a47ee1b1e37c7c71858 |
20-Mar-2007 |
Lauro Ramos Venancio <lauro.venancio@gmail.com> |
Code clean up.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35220 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAG.cpp
|
| 29a68fb5b733119dd8295a4f7c7d069b9f78f0a3 |
20-Mar-2007 |
Evan Cheng <evan.cheng@apple.com> |
Minor bug.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35219 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 8334b9fa3bdfca1cc3c85b4156b165ed3f5f8c99 |
20-Mar-2007 |
Lauro Ramos Venancio <lauro.venancio@gmail.com> |
CopyToReg source operand can be a physical register.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35213 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAG.cpp
|
| db264ae07f451cbd5bb33d528ae00e4910ce386b |
17-Mar-2007 |
Evan Cheng <evan.cheng@apple.com> |
Use SmallSet instead of std::set.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35133 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 2edd5638255dbbcdad55ca724953e155ab13b5d1 |
17-Mar-2007 |
Evan Cheng <evan.cheng@apple.com> |
If sdisel has decided to sink GEP index expression into any BB. Replace all uses
in that BB.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35132 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 9e2d86add8ae62026d2f07ea1b33d6e1ae418449 |
16-Mar-2007 |
Evan Cheng <evan.cheng@apple.com> |
Turn on GEP index sinking by default.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35127 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 9f5ead9601e110b2e67123d73647cbd88308c379 |
16-Mar-2007 |
Evan Cheng <evan.cheng@apple.com> |
Stupid bug.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35126 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 3cd4e5095b06b2be94a0cab3060272aae3460167 |
16-Mar-2007 |
Evan Cheng <evan.cheng@apple.com> |
Sink a binary expression into its use blocks if it is a loop invariant
computation used as GEP indexes and if the expression can be folded into
target addressing mode of GEP load / store use types.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35123 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 14245a9d62d9a785a5d6590516380b300bab4957 |
16-Mar-2007 |
Evan Cheng <evan.cheng@apple.com> |
Added isLegalAddressExpression hook to test if the given expression can be
folded into target addressing mode for the given type.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35121 91177308-0d34-0410-b5e6-96231b3b80d8
argetLowering.cpp
|
| c6deb3d44707de57e82e16642ab845bc8b9e9e01 |
14-Mar-2007 |
Evan Cheng <evan.cheng@apple.com> |
Estimate a cost using the possible number of scratch registers required and use
it as a late BURR scheduling tie-breaker.
Intuitively, it's good to push down instructions whose results are liveout so
their long live ranges won't conflict with other values which are needed inside
the BB. Further prioritize liveout instructions by the number of operands which
are calculated within the BB.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35109 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGRRList.cpp
|
| 61230d18d21a5dca1378e994f43934e4b314e595 |
14-Mar-2007 |
Evan Cheng <evan.cheng@apple.com> |
Try schedule def + use closer whne Sethi-Ullman numbers are the same.
e.g.
t1 = op t2, c1
t3 = op t4, c2
and the following instructions are both ready.
t2 = op c3
t4 = op c4
Then schedule t2 = op first.
i.e.
t4 = op c4
t2 = op c3
t1 = op t2, c1
t3 = op t4, c2
This creates more short live intervals which work better with the register
allocator.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35089 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGRRList.cpp
|
| c289faf01559584be1ead2574631d54940a4dd4f |
13-Mar-2007 |
Evan Cheng <evan.cheng@apple.com> |
More flexible TargetLowering LSR hooks for testing whether an immediate is a legal target address immediate or scale.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35076 91177308-0d34-0410-b5e6-96231b3b80d8
argetLowering.cpp
|
| 6dfc6806bf4091cc736312a3ceca6225f81ef63e |
08-Mar-2007 |
Chris Lattner <sabre@nondot.org> |
implement support for floating point constants used as inline asm memory operands.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35033 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| b4ddac9bf7b9d4aa7267702f375647b370ad32f4 |
08-Mar-2007 |
Chris Lattner <sabre@nondot.org> |
make this fail even in non-assert builds.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35025 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| d0b82b301d700217a716526f9329bb031e0d6578 |
07-Mar-2007 |
Anton Korobeynikov <asl@math.spbu.ru> |
Refactoring of formal parameter flags. Enable properly use of
zext/sext/aext stuff.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35008 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
electionDAGISel.cpp
|
| 83060c544bde0e2e9798829516040c76c5dd5013 |
07-Mar-2007 |
Evan Cheng <evan.cheng@apple.com> |
Avoid combining indexed load further.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35005 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| edf2e8da256496c19390cfd46da80746373e9989 |
06-Mar-2007 |
Chris Lattner <sabre@nondot.org> |
big endian 32-bit systems (e.g. ppc32) want to return the high reg first, not
the lo-reg first. This is fallout from my ppc calling conv change yesterday,
it fixes test/ExecutionEngine/2003-05-06-LivenessClobber.llx
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34983 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 0db79d86de74c315813d60f51ed842c0ba0f34dd |
06-Mar-2007 |
Anton Korobeynikov <asl@math.spbu.ru> |
Enumerate SDISel formal parameter attributes. Make use of new
enumeration.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34960 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| ca5183d445954a9b2a570d6bbba1bc2b00ad6442 |
05-Mar-2007 |
Jeff Cohen <jeffc@jolt-lang.org> |
Unbreak VC++ build.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34917 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| b654176cb4d58c8784043fbedd4584f3f0eedc07 |
04-Mar-2007 |
Chris Lattner <sabre@nondot.org> |
fold away addc nodes when we know there cannot be a carry-out.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34913 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
electionDAG.cpp
|
| bcf24844508a6acdc6d3078cc4d24978fcd0cca5 |
04-Mar-2007 |
Chris Lattner <sabre@nondot.org> |
generalize
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34910 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 91153686f04bafe3b10c99edb1735444953f7517 |
04-Mar-2007 |
Chris Lattner <sabre@nondot.org> |
canonicalize constants to the RHS of addc/adde. If nothing uses the carry out of
addc, turn it into add.
This allows us to compile:
long long test(long long A, unsigned B) {
return (A + ((long long)B << 32)) & 123;
}
into:
_test:
movl $123, %eax
andl 4(%esp), %eax
xorl %edx, %edx
ret
instead of:
_test:
xorl %edx, %edx
movl %edx, %eax
addl 4(%esp), %eax ;; add of zero
andl $123, %eax
ret
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34909 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 175415e116feef0def0f7c084cca3646a403412b |
04-Mar-2007 |
Chris Lattner <sabre@nondot.org> |
eliminate some ops if they have an undef RHS
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34908 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 8b2d42c9494a42c8b5b9e5c2e46c8001b89e75b5 |
04-Mar-2007 |
Chris Lattner <sabre@nondot.org> |
Fix CodeGen/Generic/fpowi-promote.ll and PR1239
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34893 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| a9569f10de686119ff34b89e102b5a3cbafdf195 |
03-Mar-2007 |
Chris Lattner <sabre@nondot.org> |
Add an expand action for ISD label which just deletes the label.
This "fixes" PR1238.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34890 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 0b4711bd94e0723735848ad999bccfb1fb61eeb9 |
01-Mar-2007 |
Jim Laskey <jlaskey@mac.com> |
Lower eh filter intrinsic.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34802 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 8782d481a3c720304540254a7b71d25bbe7cbf49 |
28-Feb-2007 |
Jim Laskey <jlaskey@mac.com> |
Chain is on second operand.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34759 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 64ce0ca90d358da4984a089404dc2dabe45d05f1 |
28-Feb-2007 |
Jim Laskey <jlaskey@mac.com> |
MERGE_VALUES unnecessary.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34750 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 66baf26fe0c229142d483030e1633f656822c5ee |
28-Feb-2007 |
Chris Lattner <sabre@nondot.org> |
add methods for analysis of call results and return nodes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34738 91177308-0d34-0410-b5e6-96231b3b80d8
allingConvLower.cpp
|
| fb39f99fa4cdeab24c1b462cdd954a7d792323b7 |
28-Feb-2007 |
Chris Lattner <sabre@nondot.org> |
add methods to analyze calls and formals.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34736 91177308-0d34-0410-b5e6-96231b3b80d8
allingConvLower.cpp
|
| 13513b7a50f5b4497c276796e00ef9bae730d8e0 |
27-Feb-2007 |
Chris Lattner <sabre@nondot.org> |
Minor refactoring of CC Lowering interfaces
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34656 91177308-0d34-0410-b5e6-96231b3b80d8
allingConvLower.cpp
|
| 362e98a5f5cf1919ac6435ff5b630b58ecd95fc5 |
27-Feb-2007 |
Chris Lattner <sabre@nondot.org> |
move CC Lowering stuff to its own public interface
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34655 91177308-0d34-0410-b5e6-96231b3b80d8
allingConvLower.cpp
|
| 2255887574250bb0bc577fcfc0c65b3f617e8c3c |
26-Feb-2007 |
Chris Lattner <sabre@nondot.org> |
Fold (sext (truncate x)) more aggressively, by avoiding creation of a
sextinreg if not needed. This is useful in two cases: before legalize,
it avoids creating a sextinreg that will be trivially removed. After legalize
if the target doesn't support sextinreg, the trunc/sext would not have been
removed before.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34621 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| ddf53e45b29087c57e0c864c93f86d5e99182d55 |
26-Feb-2007 |
Chris Lattner <sabre@nondot.org> |
track signedness of formal argument, though we have a fixme here.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34620 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 183f47fb1aa30ba9a56e645c35a7d798cf7e467c |
25-Feb-2007 |
Jim Laskey <jlaskey@mac.com> |
Fix for PR1224.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34610 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 251db1890c1fe03d02ee878ada8129537844d031 |
25-Feb-2007 |
Chris Lattner <sabre@nondot.org> |
optimize duplicate ValueMap lookups
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34599 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 753d9cb50e1d2e78b9a82185dc64f0e672560775 |
25-Feb-2007 |
Chris Lattner <sabre@nondot.org> |
fold trivial token factor nodes. This allows us to compile
test/CodeGen/X86/fp-stack-ret.ll into:
movl 4(%esp), %eax
fldl (%eax)
ret
instead of:
subl $12, %esp
movl 16(%esp), %eax
movsd (%eax), %xmm0
movsd %xmm0, (%esp)
fldl (%esp)
addl $12, %esp
ret
by eliminating a token factor that blocked a check.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34584 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 6618039f9f1f2e41fe2742d83007c68bdebc3656 |
25-Feb-2007 |
Chris Lattner <sabre@nondot.org> |
initialize a instance variable
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34567 91177308-0d34-0410-b5e6-96231b3b80d8
argetLowering.cpp
|
| 7a1de987a69a059ba67779ee8fca3b391e8aa253 |
24-Feb-2007 |
Jim Laskey <jlaskey@mac.com> |
Deal with cases when MMI is not requested.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34556 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| e80873ee75a96916176c505aa0e3242edf1204d3 |
24-Feb-2007 |
Jim Laskey <jlaskey@mac.com> |
Drop unused operand.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34555 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 01ca65b23e31a1dfac702cef9a2fc963347a3f71 |
24-Feb-2007 |
Chris Lattner <sabre@nondot.org> |
Fix CodeGen/Generic/2007-02-23-DAGCombine-Miscompile.ll and PR1219
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34551 91177308-0d34-0410-b5e6-96231b3b80d8
argetLowering.cpp
|
| 1da20a71d1bbabc472f281208be77475550be751 |
23-Feb-2007 |
Jim Laskey <jlaskey@mac.com> |
Handle improper cast.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34535 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 9bb3c93af271449dcbfce9f7fb7442dd11d93813 |
22-Feb-2007 |
Jim Laskey <jlaskey@mac.com> |
Need to init.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34499 91177308-0d34-0410-b5e6-96231b3b80d8
argetLowering.cpp
|
| cbfdb7b871ddb383c9b323d4b9fba112ad500214 |
22-Feb-2007 |
Jim Laskey <jlaskey@mac.com> |
Tighten up error checking of args.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34493 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 735b6f8cc3abe3d6939d44a39d2e512c32716538 |
22-Feb-2007 |
Jim Laskey <jlaskey@mac.com> |
Handle lowering invoke to call correctly.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34492 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 2bc210d99f5a7322a1ae84775eba351d9ab6ea85 |
22-Feb-2007 |
Jim Laskey <jlaskey@mac.com> |
Simplify lowering and selection of exception ops.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34491 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| b180aa17539e14a5430d020bbc7de83c79b7fc4b |
21-Feb-2007 |
Jim Laskey <jlaskey@mac.com> |
Selection and lowering for exception handling.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34481 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
electionDAG.cpp
electionDAGISel.cpp
|
| 95ad943ed5b2212652b40ebcbb675fde67dc474a |
17-Feb-2007 |
Chris Lattner <sabre@nondot.org> |
print target nodes nicely
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34369 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAG.cpp
|
| 9ff6ee85fe281c5686e0885eaa0c37ad5378ed52 |
17-Feb-2007 |
Chris Lattner <sabre@nondot.org> |
Implement i/n/s constraints correctly. This fixes
test/CodeGen/PowerPC/2007-02-16-InlineAsmNConstraint.ll
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34368 91177308-0d34-0410-b5e6-96231b3b80d8
argetLowering.cpp
|
| 5d4a9f77314952af0638e7339bcd3f4f236c6098 |
15-Feb-2007 |
Chris Lattner <sabre@nondot.org> |
fix indentation
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34307 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAG.cpp
|
| 0152829e89427a6c6cb22ff54dd580ccc4f4cc2a |
15-Feb-2007 |
Chris Lattner <sabre@nondot.org> |
Apply B Scott Michel's patch for PR1184, which improves diagnostics in an
abort case.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34306 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAG.cpp
|
| ac9dcb94dde5f166ee29372385c0e3b695227ab4 |
15-Feb-2007 |
Reid Spencer <rspencer@reidspencer.com> |
For PR1195:
Change use of "packed" term to "vector" in comments, strings, variable
names, etc.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34300 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
cheduleDAG.cpp
electionDAGISel.cpp
|
| 9d6565a5b1fbc4286d6ee638d8f47a3171a9ed7e |
15-Feb-2007 |
Reid Spencer <rspencer@reidspencer.com> |
For PR1195:
Rename PackedType -> VectorType, ConstantPacked -> ConstantVector, and
PackedTyID -> VectorTyID. No functional changes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34293 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
electionDAGISel.cpp
argetLowering.cpp
|
| c661d61d82b2b512ad9670b248bbacb4eda5d293 |
14-Feb-2007 |
Chris Lattner <sabre@nondot.org> |
fix a warning
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34272 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 21840b1c5c8e0fcedf236f0c2b95e9e147859a8e |
14-Feb-2007 |
Chris Lattner <sabre@nondot.org> |
Refix CodeGen/Generic/switch-lower.ll. In contrast to my previous patch,
this doesn't miscompile lots of programs :)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34268 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| d2b7cec527a0efa552628378ebca7a8ca63bb45d |
14-Feb-2007 |
Chris Lattner <sabre@nondot.org> |
Generalize TargetData strings, to support more interesting forms of data.
Patch by Scott Michel.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34266 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
electionDAGISel.cpp
|
| 4c948eb373779718e5be36d7674382b52114bf65 |
14-Feb-2007 |
Chris Lattner <sabre@nondot.org> |
implement expand of truncate. This allows truncates from i128 to i64 to
be supported on 32-bit hosts.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34257 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| f839ce7d03ce3ec6c7e36b71267f43a6b6aefeaa |
14-Feb-2007 |
Chris Lattner <sabre@nondot.org> |
Fix PR1198, by adding initial i128 support. Patch by Dan Gohman.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34256 91177308-0d34-0410-b5e6-96231b3b80d8
argetLowering.cpp
|
| ae4f99d8430f06cfbc316f231e404201d288ef94 |
13-Feb-2007 |
Chris Lattner <sabre@nondot.org> |
revert my previous switch lowering change, which miscompiles a few programs.
This will break a dj test until I have time to investigate.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34247 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| cf8270a9941e697243bb9c91d5d8b2e1fc01a35c |
13-Feb-2007 |
Lauro Ramos Venancio <lauro.venancio@gmail.com> |
Add a space between // and the comment.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34244 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 7aa47b69ca5f4feb6b106a50959e37822bd25b4f |
13-Feb-2007 |
Lauro Ramos Venancio <lauro.venancio@gmail.com> |
Add "original alignment" to function arguments flags.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34240 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 818d42f1e81db75300223fedb75227c17ec0ef83 |
13-Feb-2007 |
Chris Lattner <sabre@nondot.org> |
Fix switch lowering to order cases in zext order, which is how we emit the
comparisons. This fixes an infinite loop on CodeGen/Generic/switch-lower.ll
and PR1197
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34216 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| b1919e2f08ecb37140af676fd2916f8d5ed7df3d |
10-Feb-2007 |
Chris Lattner <sabre@nondot.org> |
Privatize StructLayout::MemberOffsets, adding an accessor
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34156 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| ad2070c667ebabf1650be63e6b3e0b411da86918 |
10-Feb-2007 |
Evan Cheng <evan.cheng@apple.com> |
Add function live-ins to entry block live-in set.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34112 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 15699fc5ed0378205f9705d35d019d9ff0cf200d |
10-Feb-2007 |
Evan Cheng <evan.cheng@apple.com> |
Rename some variables to avoid confusion with SelectionDAGISel::BB.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34110 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 2e67781ef571f5daffd7e6c2f71750be122e0ac9 |
08-Feb-2007 |
Evan Cheng <evan.cheng@apple.com> |
Make use of TLI.SimplifySetCC() in LegalizeSetCCOperands().
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34066 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| fa1eb27b76ab1e0f78574bf52a432c84a4c1a520 |
08-Feb-2007 |
Evan Cheng <evan.cheng@apple.com> |
Move SimplifySetCC to TargetLowering and allow it to be shared with legalizer.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34065 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
argetLowering.cpp
|
| 831e0374a7da654071279f2b1f93f52f7eeb5eae |
04-Feb-2007 |
Chris Lattner <sabre@nondot.org> |
switch the VRBaseMap in the scheduler from an std::map to a DenseMap. This
speeds up the isel pass from 2.5570s to 2.4722s on kc++ (3.4%).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33879 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAG.cpp
cheduleDAGSimple.cpp
|
| 3f97eb449b08069e3370d4ba7566c60bdbf0babd |
04-Feb-2007 |
Chris Lattner <sabre@nondot.org> |
Introduce new UnarySDNode/BinarySDNode/TernarySDNode nodes, which coallocate
their operands with the node itself. This reduces malloc traffic for operand
lists. This reduces isel time on kc++ from 2.6164 to 2.5570s, about 2.3%.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33878 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| ab4ed595385d0b9421c0d45c809ec6324cf11f11 |
04-Feb-2007 |
Chris Lattner <sabre@nondot.org> |
eliminate the SDNode::setValueTypes method.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33876 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 63e3f14df6cf76f1a12de1153e1114f4b20b15a9 |
04-Feb-2007 |
Chris Lattner <sabre@nondot.org> |
eliminate a bunch of duplicate ctors and helper functions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33875 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| d429bcd4ac734540ebbc15a0ee37d154ae1daf73 |
04-Feb-2007 |
Chris Lattner <sabre@nondot.org> |
move MorphNode to out of line and merge setNodeOperands into it. There is
no behavior or performance change here.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33869 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 48b85926524f9d29ae600123c90194cd73fd629e |
04-Feb-2007 |
Chris Lattner <sabre@nondot.org> |
simplify MorphNodeTo to take a VTList operand.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33868 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 67612a1188980d92a4bdd84c34a5aa89a4b9d929 |
04-Feb-2007 |
Chris Lattner <sabre@nondot.org> |
eliminate some extraneous methods in SDNode
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33867 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| c76e3c86026b9fa44bfbb0888881b52955078011 |
04-Feb-2007 |
Chris Lattner <sabre@nondot.org> |
Give each selectiondag node class a home for it's vtable and rtti info
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33866 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 9f24ad79ce32200b06499ef638b502fc1c36ed04 |
04-Feb-2007 |
Chris Lattner <sabre@nondot.org> |
Switch VAlueMap from std::map to DenseMap.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33863 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 0da331fe0bff24e6c90c706ef8f1f1c3a8d90c2a |
04-Feb-2007 |
Chris Lattner <sabre@nondot.org> |
Switch NodeMap from std::map to DenseMap, this speeds up isel by 2.3%
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33862 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 0ed44170752b85c3dd3bbf95459dd2668864f5ec |
04-Feb-2007 |
Chris Lattner <sabre@nondot.org> |
swtich vector-> smallvector, speeding up selectiondag stuff 1%
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33861 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 40030bfa75ae6d72702bc60e964ae2fce8c0f3ed |
04-Feb-2007 |
Chris Lattner <sabre@nondot.org> |
Switch promoted/expanded ops over to using a DenseMap. Vector related maps
aren't worth it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33860 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 718071c476014cb0aaff9c7d018120d5a8930217 |
04-Feb-2007 |
Chris Lattner <sabre@nondot.org> |
switch LegalizedNodes from std::map to a DenseMap. This speeds up isel
time as a whole on kc++ by 11%.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33857 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 00755df36c1448ac4728a74d907aa09e3d8b2d49 |
04-Feb-2007 |
Chris Lattner <sabre@nondot.org> |
Eliminate some malloc traffic from LegalizeAllNodesNotLeadingTo, speeding
up isel on kimwitu by 0.7%.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33853 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| d48c5e871a0f3386e536e0987ca06dbc4e274acf |
04-Feb-2007 |
Chris Lattner <sabre@nondot.org> |
Eliminate some std::sets. This speeds up isel of kimwitu by about 0.9%
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33852 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| cf5640bd52e919b6fbb06f231122e718f48dbb12 |
04-Feb-2007 |
Chris Lattner <sabre@nondot.org> |
Switch SelectionDAG::ReplaceAllUsesOfValueWith to use a SmallSetVector for
the users set (most nodes have 1 or 2 users). This speeds up the isel pass
3.2% on kimwitu.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33849 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 2ba528b3a75955c960347e5b5b28ae74d5a81909 |
03-Feb-2007 |
Chris Lattner <sabre@nondot.org> |
switch the sched unit map over to use a DenseMap instead of std::map. This
speeds up isel as a whole time by 2.6%.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33810 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGList.cpp
cheduleDAGRRList.cpp
|
| 7971514755a08ec156a1b9c0f7f05d67919c56b7 |
03-Feb-2007 |
Chris Lattner <sabre@nondot.org> |
Switch ComputeTopDownOrdering over to using a densemap. This speeds up
isel as a whole by 3.3%.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33809 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 5efdecc030f1a71cdb5b49d97c6c1c45e68ff731 |
03-Feb-2007 |
Evan Cheng <evan.cheng@apple.com> |
Pasto
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33806 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 832254e1c2387c0cbeb0a820b8315fbe85cb003a |
02-Feb-2007 |
Reid Spencer <rspencer@reidspencer.com> |
Changes to support making the shift instructions be true BinaryOperators.
This feature is needed in order to support shifts of more than 255 bits
on large integer types. This changes the syntax for llvm assembly to
make shl, ashr and lshr instructions look like a binary operator:
shl i32 %X, 1
instead of
shl i32 %X, i8 1
Additionally, this should help a few passes perform additional optimizations.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33776 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| b25fe8267182662750dcb76a70a20f4b14a5568d |
01-Feb-2007 |
Anton Korobeynikov <asl@math.spbu.ru> |
Fixed uninitialized stuff inside LegalizeDAG. Fortunately, the only
affected part is codegen of "memove" inside x86 backend. This fixes
PR1144
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33752 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| fea997aac5773e936754de5436029c2a4fa1e930 |
01-Feb-2007 |
Chris Lattner <sabre@nondot.org> |
Fit in 80 columns
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33745 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
cheduleDAGRRList.cpp
cheduleDAGSimple.cpp
electionDAG.cpp
electionDAGISel.cpp
argetLowering.cpp
|
| 527fae12c3b58d6151aa1c534c10b55d603b8da1 |
01-Feb-2007 |
Chris Lattner <sabre@nondot.org> |
Emit a better assertion message for PR1133
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33736 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| d385fd62cb43435b3ad70d789198d34bf148e579 |
31-Jan-2007 |
Evan Cheng <evan.cheng@apple.com> |
Allow the target to override the ISD::CondCode that's to be used to test the
result of the comparison libcall against zero.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33701 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
argetLowering.cpp
|
| 5cbf985dcbc89fba3208e7baf8b6f488b06d3ec9 |
30-Jan-2007 |
Reid Spencer <rspencer@reidspencer.com> |
For PR1136: Rename GlobalVariable::isExternal as isDeclaration to avoid
confusion with external linkage types.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33663 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 367f109ba954239a348c624a3331422bfdb31d03 |
30-Jan-2007 |
Chris Lattner <sabre@nondot.org> |
add initial support for handling inline asms with multiple constraints.
This doesn't do the "right thing" but will probably work in most cases.
This implements CodeGen/PowerPC/2007-01-29-lbrx-asm.ll.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33643 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| bcc5f36765e8111c13873a0c0dc874c92385d808 |
29-Jan-2007 |
Nate Begeman <natebegeman@mac.com> |
Finish off bug 680, allowing targets to custom lower frame and return
address nodes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33636 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
electionDAG.cpp
electionDAGISel.cpp
|
| 6aa279dc8b5a05499b2cd158f8187d7225adc4f4 |
28-Jan-2007 |
Anton Korobeynikov <asl@math.spbu.ru> |
Arguments are counting from 1. not from 0. Maybe we should change
numbering somehow? E.g. make return argument the last?
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33606 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| ac2b2cf88c9331bf44e802f6d31805c40a56af0f |
28-Jan-2007 |
Anton Korobeynikov <asl@math.spbu.ru> |
More cleanup
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33605 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
electionDAGISel.cpp
|
| b10308e440c80dd6ffb4b478f741ff7e5f30cb48 |
28-Jan-2007 |
Anton Korobeynikov <asl@math.spbu.ru> |
Propagate changes from my local tree. This patch includes:
1. New parameter attribute called 'inreg'. It has meaning "place this
parameter in registers, if possible". This is some generalization of
gcc's regparm(n) attribute. It's currently used only in X86-32 backend.
2. Completely rewritten CC handling/lowering code inside X86 backend.
Merged stdcall + c CCs and fastcall + fast CC.
3. Dropped CSRET CC. We cannot add struct return variant for each
target-specific CC (e.g. stdcall + csretcc and so on).
4. Instead of CSRET CC introduced 'sret' parameter attribute. Setting in
on first attribute has meaning 'This is hidden pointer to structure
return. Handle it gently'.
5. Fixed small bug in llvm-extract + add new feature to
FunctionExtraction pass, which relinks all internal-linkaged callees
from deleted function to external linkage. This will allow further
linking everything together.
NOTEs: 1. Documentation will be updated soon.
2. llvm-upgrade should be improved to translate csret => sret.
Before this, there will be some unexpected test fails.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33597 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
electionDAGISel.cpp
|
| 44c3b9fdd416c79f4b67cde1aecfced5921efd81 |
26-Jan-2007 |
Jim Laskey <jlaskey@mac.com> |
Change the MachineDebugInfo to MachineModuleInfo to better reflect usage
for debugging and exception handling.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33550 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
electionDAGISel.cpp
|
| 1ee29257428960fede862fcfdbe80d5d007927e9 |
26-Jan-2007 |
Jim Laskey <jlaskey@mac.com> |
Make LABEL a builtin opcode.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33537 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
cheduleDAG.cpp
electionDAG.cpp
electionDAGISel.cpp
|
| de268f7dcf8a650afde162b84608ed434fb10613 |
24-Jan-2007 |
Evan Cheng <evan.cheng@apple.com> |
Renamed getTypeAlignmentShift() to getPreferredTypeAlignmentShift().
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33482 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAG.cpp
|
| f6d039a039ca35f9f0ee835c40cfced946915d5b |
23-Jan-2007 |
Evan Cheng <evan.cheng@apple.com> |
Remove the DoubleTy special case.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33449 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAG.cpp
|
| 24d6da5fedcf39891f7d8c5b031c01324b3db545 |
21-Jan-2007 |
Reid Spencer <rspencer@reidspencer.com> |
For PR970:
Clean up handling of isFloatingPoint() and dealing with PackedType.
Patch by Gordon Henriksen!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33415 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 58092e35a3368e130438cbc793c8f9dce2e4fe0f |
20-Jan-2007 |
Chris Lattner <sabre@nondot.org> |
Teach TargetData to handle 'preferred' alignment for each target, and use
these alignment amounts to align scalars when we can. Patch by Scott Michel!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33409 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
electionDAGISel.cpp
|
| 597a3bde3578f33dc2a038186275b021c79c00b9 |
20-Jan-2007 |
Evan Cheng <evan.cheng@apple.com> |
Fix for PR1108: type of insert_vector_elt index operand is PtrVT, not MVT::i32.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33398 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| c10305743c313558405079452138f03124e87581 |
19-Jan-2007 |
Reid Spencer <rspencer@reidspencer.com> |
For PR1043:
This is the final patch for this PR. It implements some minor cleanup
in the use of IntegerType, to wit:
1. Type::getIntegerTypeMask -> IntegerType::getBitMask
2. Type::Int*Ty changed to IntegerType* from Type*
3. ConstantInt::getType() returns IntegerType* now, not Type*
This also fixes PR1120.
Patch by Sheng Zhou.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33370 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 42d7ccfd8e672bf3a5d42052f8da50f0d610afb2 |
19-Jan-2007 |
Evan Cheng <evan.cheng@apple.com> |
Remove this xform:
(shl (add x, c1), c2) -> (add (shl x, c2), c1<<c2)
Replace it with:
(add (shl (add x, c1), c2), ) -> (add (add (shl x, c2), c1<<c2), )
This fixes test/CodeGen/ARM/smul.ll
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33361 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| c4e664bb9d640e7b04f6fce23830dfb808895b31 |
16-Jan-2007 |
Chris Lattner <sabre@nondot.org> |
Fix PR1114 and CodeGen/Generic/2007-01-15-LoadSelectCycle.ll by being
careful when folding "c ? load p : load q" that C doesn't reach either load.
If so, folding this into load (c ? p : q) will induce a cycle in the graph.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33251 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 938ab02256289a688b1d4f992349f35d44afe4a0 |
16-Jan-2007 |
Chris Lattner <sabre@nondot.org> |
add options to view the dags before the first or second pass of dag combine.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33249 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| e5530da20895a49ddef3201de0d5f8587d007977 |
13-Jan-2007 |
Reid Spencer <rspencer@reidspencer.com> |
Compensate for loss of DerivedTypes.h in TargetLowering.h
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33159 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAG.cpp
|
| 02114aa0e507a10b18989ff6f4542d8572a07da0 |
13-Jan-2007 |
Reid Spencer <rspencer@reidspencer.com> |
Move a function out of line.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33158 91177308-0d34-0410-b5e6-96231b3b80d8
argetLowering.cpp
|
| 79cca507fe51aa8af7a9006b380977c61b6f3fea |
12-Jan-2007 |
Evan Cheng <evan.cheng@apple.com> |
Minor fix.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33149 91177308-0d34-0410-b5e6-96231b3b80d8
argetLowering.cpp
|
| 56966225d1eed9f9a6951d2167bfbbec9628c8d6 |
12-Jan-2007 |
Evan Cheng <evan.cheng@apple.com> |
Store default libgcc routine names and allow them to be redefined by target.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33105 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
argetLowering.cpp
|
| 6b6b6ef1677fa71b1072c2911b4c1f9524a558c9 |
11-Jan-2007 |
Zhou Sheng <zhousheng00@gmail.com> |
For PR1043:
Merge ConstantIntegral and ConstantBool into ConstantInt.
Remove ConstantIntegral and ConstantBool from LLVM.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33073 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| c8edc64188399437f5476d7fa45f714a92f2cb93 |
09-Jan-2007 |
Evan Cheng <evan.cheng@apple.com> |
Naming consistency.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33026 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGRRList.cpp
|
| c62d4bb6952a1459f10aa93579e1b881d42a33ea |
09-Jan-2007 |
Evan Cheng <evan.cheng@apple.com> |
Fix for PR1075: bottom-up register-reduction scheduling actually increases register pressure.
- Fixed bugs in sethi-ullman number computation and priority queue comparison
functions.
- Separate code that handles priority computation special cases from SU number computation.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33025 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGRRList.cpp
|
| ddae4bd68358df7415d532e6930c0ba9c60f6cb5 |
09-Jan-2007 |
Chris Lattner <sabre@nondot.org> |
Implement some trivial FP foldings when -enable-unsafe-fp-math is specified.
This implements CodeGen/PowerPC/unsafe-math.ll
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33024 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| a4810b52d024ec4dcf638c906db9589338c05117 |
07-Jan-2007 |
Chris Lattner <sabre@nondot.org> |
remove support for llvm.isunordered
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32992 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 636c753b6ba2418ed707ef0efb31444ec70a46f2 |
06-Jan-2007 |
Evan Cheng <evan.cheng@apple.com> |
Expand fcopysign to the bitwise sequence if select is marked as expensive.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32940 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 068c5f47ea9243b353a49ca7eb07fac0cb32f1ee |
05-Jan-2007 |
Evan Cheng <evan.cheng@apple.com> |
Bug in ExpandFCOPYSIGNToBitwiseOps(). Clear the old sign bit of operand 0
before or'ing in the sign bit of operand 1.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32930 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 489a87ca091ff4208ce0a972480e41ba1f78a2bf |
05-Jan-2007 |
Evan Cheng <evan.cheng@apple.com> |
CopyToReg source operand can be a register as well. e.g. Copy from GlobalBaseReg.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32929 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAG.cpp
|
| 0d630d220414b02fed6873555bb46795a682174b |
05-Jan-2007 |
Evan Cheng <evan.cheng@apple.com> |
GEP subscript is interpreted as a signed value.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32888 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| f8e7a219121b7d6f8bcf1e22828648a243384fbb |
04-Jan-2007 |
Chris Lattner <sabre@nondot.org> |
fix PowerPC/2007-01-04-ArgExtension.ll, a bug handling K&R prototypes with
the recent signless changes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32884 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 912095becac923ff614d7b07728eb345ada67765 |
04-Jan-2007 |
Evan Cheng <evan.cheng@apple.com> |
Expand fcopysign to a series of bitwise of operations when it's profitable to
do so.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32881 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| bcca3405bd6698af82eeed20e24744d0625aa1b3 |
03-Jan-2007 |
Reid Spencer <rspencer@reidspencer.com> |
Legalizer doesn't do an ANY_EXTEND if we don't ask for one so make sure
that we default to an ANY_EXTEND if no parameter attribute is set on the
result value of a function.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32836 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 376dd212f9142cd0f0b03e0b6296b2df7208bb9a |
03-Jan-2007 |
Reid Spencer <rspencer@reidspencer.com> |
Restore previous behavior of defaulting to ZEXT. This works around two
things: (1) preventing PR1071 and (2) working around missing parameter
attributes for bool type. (2) will be fixed shortly. When PR1071 is fixed,
this patch should be undone.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32831 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 8c57dfb1aea24132bd5b58c4ed4893ea967ba131 |
03-Jan-2007 |
Reid Spencer <rspencer@reidspencer.com> |
Two changes:
1. Switch expression and cases are compared signed and are sign extended.
2. For function results needing extended, do SIGN_EXTEND if the SExtAttribute
is set and ZERO_EXTEND if the ZExtAttribute is set, otherwise just let
the Legalizer do ANY_EXTEND.
This fixes the recent regression in kimwitu++ and probably the llvm-gcc
bootstrap issue we had today.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32830 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| b47b25cfda5aee910e128c89d08c630722eb480b |
03-Jan-2007 |
Reid Spencer <rspencer@reidspencer.com> |
Clean up from recent changes. Comment the new parameter to ExpandLibCall.
Consolidate some lines of code and remove duplication.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32829 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 47857812e29324a9d1560796a05b53d3a9217fd9 |
31-Dec-2006 |
Reid Spencer <rspencer@reidspencer.com> |
For PR950:
Three changes:
1. Convert signed integer types to signless versions.
2. Implement the @sext and @zext parameter attributes. Previously the
type of an function parameter was used to determine whether it should
be sign extended or zero extended before the call. This information is
now communicated via the function type's parameter attributes.
3. The interface to LowerCallTo had to be changed in order to accommodate
the parameter attribute information. Although it would have been
convenient to pass in the FunctionType itself, there isn't always one
present in the caller. Consequently, a signedness indication for the
result type and for each parameter was provided for in the interface
to this method. All implementations were changed to make the adjustment
necessary.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32788 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
electionDAGISel.cpp
|
| e4d87aa2de6e52952dca73716386db09aad5a8fd |
23-Dec-2006 |
Reid Spencer <rspencer@reidspencer.com> |
For PR950:
This patch removes the SetCC instructions and replaces them with the ICmp
and FCmp instructions. The SetCondInst instruction has been removed and
been replaced with ICmpInst and FCmpInst.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32751 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 0b4f80ee898c1e85242482e4cb363e6bfe0a133b |
20-Dec-2006 |
Evan Cheng <evan.cheng@apple.com> |
getLoad() and getStore() calls missed SVOffset operand. Thanks to Dan Gohman
for pointing it out!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32712 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| cd3245ac45c595da96bb768a55cddc356dff55fe |
19-Dec-2006 |
Chris Lattner <sabre@nondot.org> |
Eliminate static ctors from Statistics
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32698 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
cheduleDAGList.cpp
|
| 7df28dc9d7160772c3c0aabd72c32830c1bb5e57 |
19-Dec-2006 |
Evan Cheng <evan.cheng@apple.com> |
May need to promote the operand (either sign_extend_inreg or and) before
expanding a {s|u}int_to_fp.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32665 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 722cb360690e5d7742b01a9f497fdb65bf8079d5 |
18-Dec-2006 |
Evan Cheng <evan.cheng@apple.com> |
LegalizeSetCCOperands() may end up inserting libcalls. They need to be
properly serialized. Do not clear LastCallSEQ_END until that is done.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32659 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| f2174da7132b1a3ce81d8a154a20c1285b5b15dd |
17-Dec-2006 |
Bill Wendling <isanbard@gmail.com> |
Fixed so that it dereferences the ostream pointer.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32640 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGSimple.cpp
|
| 5c7e326585f3a543388ba871c3425f7664cd9143 |
17-Dec-2006 |
Bill Wendling <isanbard@gmail.com> |
Added an automatic cast to "std::ostream*" etc. from OStream. We then can
rework the hacks that had us passing OStream in. We pass in std::ostream*
instead, check for null, and then dispatch to the correct print() method.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32636 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGSimple.cpp
|
| 36d439666c9f9f781d57dc2fd6d3cc80602fe095 |
16-Dec-2006 |
Chris Lattner <sabre@nondot.org> |
Fix PR1049 and CodeGen/Generic/2006-12-16-InlineAsmCrash.ll
by producing target constants instead of constants. Constants can get
selected to li/movri instructions, which causes the scheduler to explode.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32633 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| e90460ee9ae9844d4dba9a29c39161ece61e8094 |
16-Dec-2006 |
Evan Cheng <evan.cheng@apple.com> |
Cannot combine an indexed load / store any further.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32629 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| aa975c1c4785a1d7930f2cd1026cb40ce54d21e4 |
16-Dec-2006 |
Evan Cheng <evan.cheng@apple.com> |
Expand FP undef
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32623 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 0b1b9dcf22745b533562134c2f0472098fe085fd |
16-Dec-2006 |
Evan Cheng <evan.cheng@apple.com> |
Allow promoted FP_TO_UINT / FP_TO_SINT to expand operand.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32621 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 966bf24491f7e53238fc4127bb9fcf43e6739586 |
16-Dec-2006 |
Evan Cheng <evan.cheng@apple.com> |
Expand fabs / fneg to and / xor.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32619 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 19103b11ecbd5153537a1c64ffefa922fe591add |
15-Dec-2006 |
Evan Cheng <evan.cheng@apple.com> |
Fix select_cc, select expansion to soft-fp bugs.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32616 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| f6c4ccfaab372081e021c9b02415f3db4190b37d |
15-Dec-2006 |
Jim Laskey <jlaskey@mac.com> |
This code was usurping the sextload expand in teh legalizer. Just make
sure the right conditions are checked.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32611 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 2d53a320b4dbcd4af54b17458ed81c3963b544fd |
15-Dec-2006 |
Chris Lattner <sabre@nondot.org> |
silence a bogus warning
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32597 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 2b49c500838666dd0186d021389d4dd70ffda240 |
15-Dec-2006 |
Evan Cheng <evan.cheng@apple.com> |
Expand FP compares to soft-fp call(s)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32590 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| acd80ac7bb19f8bdfa55336d567c9ecbe695c8b8 |
14-Dec-2006 |
Jim Laskey <jlaskey@mac.com> |
1. Tidy up jump table info.
2. Allow the jit to handle PIC relocable jump tables.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32581 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 9f87788040786b1bc6530763e4cf7e105bfb2924 |
13-Dec-2006 |
Evan Cheng <evan.cheng@apple.com> |
More soft-fp work.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32559 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
electionDAGISel.cpp
|
| 548f611baeb53e821e7e80f97722b048ab6b09b2 |
13-Dec-2006 |
Evan Cheng <evan.cheng@apple.com> |
Expand (f64 extload f32) to (f64 fp_ext (load f32)) if f64 type action is expand.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32527 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 98ff3b979af4916ba8a82eda7d77a66cdad31842 |
13-Dec-2006 |
Evan Cheng <evan.cheng@apple.com> |
Expand fsqrt, fsin, and fcos to libcalls.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32526 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 6af00d588c1b353d9d7a3dd8f58927056eccd6c1 |
13-Dec-2006 |
Evan Cheng <evan.cheng@apple.com> |
Expand f32 / f64 to i32 / i64 conversion to soft-fp library calls.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32523 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 7b06bd532d3324a2f76bbc856ae20ff89d8e0e92 |
13-Dec-2006 |
Reid Spencer <rspencer@reidspencer.com> |
Replace CastInst::createInferredCast calls with more accurate cast
creation calls.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32521 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 279101eb1ac61e2d5b83d5bdcc5be56e710d2cd7 |
12-Dec-2006 |
Evan Cheng <evan.cheng@apple.com> |
Expand FP constant to integers if FP types are not legal.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32497 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 5c9ce1893a4bee65bc05c7c48f11734f55405692 |
12-Dec-2006 |
Evan Cheng <evan.cheng@apple.com> |
Soft fp FNEG, SINT_TO_FP, UINT_TO_FP libcall expansion.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32495 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 004952140f3cf92ee098c2c5b8cdee1449bdc2ed |
12-Dec-2006 |
Evan Cheng <evan.cheng@apple.com> |
Expand ConstantFP to load from CP if float types are being expanded.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32494 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 0ca67332fa4eaed35e8e85b2c935500798ea6c2a |
12-Dec-2006 |
Evan Cheng <evan.cheng@apple.com> |
Expand i32/i64 CopyToReg f32/f64 to BIT_CONVERT + CopyToReg.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32493 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 7b2b5c846c371f58db73f453a007e52eda62da89 |
12-Dec-2006 |
Evan Cheng <evan.cheng@apple.com> |
- When expanding a bit_convert whose src operand is also to be expanded and
its expansion result type is equal to the result type of the bit_convert,
e.g. (i64 bit_convert (f64 op)) if FP is not legal
returns the result of the expanded source operand.
- Store f32 / f64 may be expanded to a single store i32/i64.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32490 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| b15974a65ce3c5d5cdde8d5e524055d3f1d59a77 |
12-Dec-2006 |
Evan Cheng <evan.cheng@apple.com> |
Expand formal arguments and call arguments recursively: e.g. f64 -> i64 -> 2 x i32.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32476 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| f0094839f058f56983f674ca575fcfda23d495ca |
12-Dec-2006 |
Chris Lattner <sabre@nondot.org> |
fit in 80 cols
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32474 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| d9e06a5d031ca370e3137c93f4bd1b97c719633d |
12-Dec-2006 |
Chris Lattner <sabre@nondot.org> |
this can only be fptrunc.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32473 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| d93d46ee7e0a0e539d42139b85c71b2b8c3968fe |
12-Dec-2006 |
Chris Lattner <sabre@nondot.org> |
Revert Nate's patch to fix X86/store-fp-constant.ll. With the dag combiner
and legalizer separated like they currently are, I don't see a way to handle
this xform.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32466 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 62be1a71f41813c99f24a136cc31c20fecd9bfb1 |
12-Dec-2006 |
Chris Lattner <sabre@nondot.org> |
make this code more aggressive about turning store fpimm into store int imm.
This is not sufficient to fix X86/store-fp-constant.ll
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32465 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 15f46d6c280cc91be70c60ed181931fbe0088652 |
12-Dec-2006 |
Reid Spencer <rspencer@reidspencer.com> |
Change inferred cast creation calls to more specific cast creations.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32460 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 13acce3ef03d29679c2b241bdba6ca015644e8b6 |
11-Dec-2006 |
Evan Cheng <evan.cheng@apple.com> |
Re-apply changes that were backed out and fix a naughty typo.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32442 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 2381f6f6c6ab62724caaded8268b425564d61aca |
11-Dec-2006 |
John Criswell <criswell@uiuc.edu> |
It seems the llvm::OStream class does not handle stream manipulators.
For now, just grab the stream and perform the output on it directly.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32441 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGSimple.cpp
|
| 70a24b3141c098d67321dda4d6f615a9153d7d9b |
11-Dec-2006 |
Chris Lattner <sabre@nondot.org> |
Revert changes that broke oggenc on ppc
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32440 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 25ece66ff39e9f136a8b48e0fea7aff2332848dc |
11-Dec-2006 |
Evan Cheng <evan.cheng@apple.com> |
Don't convert store double C, Ptr to store long C, Ptr if i64 is not a legal type.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32434 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| bbf1e5e2e9608d6077bc4ac03e884c1972148fe0 |
11-Dec-2006 |
Evan Cheng <evan.cheng@apple.com> |
f32 / f64 node is expanded to one i32 / i64 node.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32433 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| b618230231273e9e609b9a39b8eb4684820b7149 |
11-Dec-2006 |
Evan Cheng <evan.cheng@apple.com> |
Clean up some bad code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32432 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 2cbba8934745fe30662f2d5a59d03545ad5212c5 |
11-Dec-2006 |
Nate Begeman <natebegeman@mac.com> |
Move something that should be in the dag combiner from the legalizer to the
dag combiner.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32431 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
egalizeDAG.cpp
|
| d27a258d2d7691db3731135a448b7654d260cc07 |
11-Dec-2006 |
Anton Korobeynikov <asl@math.spbu.ru> |
Cleaned setjmp/longjmp lowering interfaces. Now we're producing right
code (both asm & cbe) for Mingw32 target.
Removed autoconf checks for underscored versions of setjmp/longjmp.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32415 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
argetLowering.cpp
|
| 1a8f1fe676f1d83e0da7336e744ebcdcc14a88c4 |
09-Dec-2006 |
Evan Cheng <evan.cheng@apple.com> |
Preliminary soft float support.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32394 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
electionDAGISel.cpp
argetLowering.cpp
|
| 555d8d6f4b0693309cd70efbf51b7abf804df5e4 |
07-Dec-2006 |
Chris Lattner <sabre@nondot.org> |
Fix CodeGen/PowerPC/2006-12-07-SelectCrash.ll on PPC64
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32336 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| bcd2498f4f1682dbdc41452add5b9bc72cbd6b3f |
07-Dec-2006 |
Bill Wendling <isanbard@gmail.com> |
Removed more <iostream> includes
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32321 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 832171cb9724d2d31c8dfb73172e2be8f6dd13ee |
07-Dec-2006 |
Bill Wendling <isanbard@gmail.com> |
Removing even more <iostream> includes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32320 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
egalizeDAG.cpp
cheduleDAG.cpp
cheduleDAGList.cpp
cheduleDAGRRList.cpp
cheduleDAGSimple.cpp
electionDAG.cpp
electionDAGISel.cpp
electionDAGPrinter.cpp
|
| ac0b6ae358944ae8b2b5a11dc08f52c3ed89f2da |
06-Dec-2006 |
Chris Lattner <sabre@nondot.org> |
Detemplatize the Statistic class. The only type it is instantiated with
is 'unsigned'.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32279 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
cheduleDAGList.cpp
|
| 97af751deb9b26fd42fbcee082da9ccc4ded5b45 |
02-Dec-2006 |
Jeff Cohen <jeffc@jolt-lang.org> |
Unbreak VC++ build.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32113 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| ba59a1e453e110f7b84233f07613f9c5d9a39b87 |
01-Dec-2006 |
Evan Cheng <evan.cheng@apple.com> |
Match TargetInstrInfo changes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32098 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAG.cpp
cheduleDAGRRList.cpp
|
| 6a16c5ab2d7786583d3c9a79646dc85fbda6cd41 |
29-Nov-2006 |
Evan Cheng <evan.cheng@apple.com> |
Avoid inifinite looping if READCYCLECOUNTER isn't custom lowered.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32022 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| f0b3ba6752a49a8868d423ddc2704a52b7101571 |
29-Nov-2006 |
Evan Cheng <evan.cheng@apple.com> |
Allow target to custom lower READCYCLECOUNTER (when it doesn't have to be expanded).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32016 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| f3e486e069011c70abb771958dc1218912b98eea |
29-Nov-2006 |
Evan Cheng <evan.cheng@apple.com> |
Fix for PR1023 by Dan Gohman.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32003 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| a5a57d66f5717873dbf3c48b174c0b0ce54b6612 |
29-Nov-2006 |
Evan Cheng <evan.cheng@apple.com> |
Fix for PR1022 (folding loads of static initializers) by Dan Gohman.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32000 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 3f7927c84c1b8c449378eaaf67eb9c563eb78949 |
29-Nov-2006 |
Chris Lattner <sabre@nondot.org> |
add a hook to allow targets to hack on inline asms to lower them to llvm
when they want to.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31997 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| b6c806045bbd4a650f90f613a96cee01a1584412 |
28-Nov-2006 |
Chris Lattner <sabre@nondot.org> |
Fix PR1016
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31950 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| c0f64ffab93d11fb27a3b8a0707b77400918a20e |
28-Nov-2006 |
Evan Cheng <evan.cheng@apple.com> |
Change MachineInstr ctor's to take a TargetInstrDescriptor reference instead
of opcode and number of operands.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31947 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAG.cpp
electionDAGISel.cpp
|
| 3687c1a4d3ecbe6709fddd77d79dc6b128d31431 |
27-Nov-2006 |
Chris Lattner <sabre@nondot.org> |
Fix the dag combiner bug corresponding to PR1014.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31943 91177308-0d34-0410-b5e6-96231b3b80d8
argetLowering.cpp
|
| bc4cf8d5b137d43a1d6fde8238184e47efe162be |
27-Nov-2006 |
Chris Lattner <sabre@nondot.org> |
For better or worse, load from i1 is assumed to be zero extended. Do not
form a load from i1 from larger loads that may not be zext'd.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31933 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| f9908172e980aab15a36bd110ccdbc5f7afa44f6 |
27-Nov-2006 |
Chris Lattner <sabre@nondot.org> |
If a brcond condition is promoted, make sure to zero extend it, even if not
expanded into BR_CC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31932 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 3da59db637a887474c1b1346c1f3ccf53b6c4663 |
27-Nov-2006 |
Reid Spencer <rspencer@reidspencer.com> |
For PR950:
The long awaited CAST patch. This introduces 12 new instructions into LLVM
to replace the cast instruction. Corresponding changes throughout LLVM are
provided. This passes llvm-test, llvm/test, and SPEC CPUINT2000 with the
exception of 175.vpr which fails only on a slight floating point output
difference.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31931 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 32ba1aa20468a1906ee69315bda47da6b1b2dc5e |
20-Nov-2006 |
Chris Lattner <sabre@nondot.org> |
Fix PR1011 and CodeGen/Generic/2006-11-20-DAGCombineCrash.ll
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31878 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 45fb3f3cb2b8efc01d9bbe42a64194f35b92c759 |
20-Nov-2006 |
Reid Spencer <rspencer@reidspencer.com> |
For PR950:
First in a series of patches to convert SetCondInst into ICmpInst and
FCmpInst using only two opcodes and having the instructions contain their
predicate value. Nothing uses these classes yet. More patches to follow.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31867 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 5f64a16869ea8982146fccbc2f94011d550392f5 |
17-Nov-2006 |
Jim Laskey <jlaskey@mac.com> |
Fixing the ENABLE_OPTIMIZED=1 DISABLE_ASSERTIONS=1 build.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31822 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGPrinter.cpp
|
| cc47021f49851a1b5344b7a0530f7ac50a395216 |
16-Nov-2006 |
Evan Cheng <evan.cheng@apple.com> |
Fix an incorrectly inverted condition.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31773 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
electionDAG.cpp
|
| 43193d60e9c512fbb7ac8e682b4c807ba3e8408e |
15-Nov-2006 |
Chris Lattner <sabre@nondot.org> |
remove dead #include
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31753 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 7ce45783531cfa81bfd7be561ea7e4738e8c6ca8 |
14-Nov-2006 |
Evan Cheng <evan.cheng@apple.com> |
Matches MachineInstr changes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31712 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAG.cpp
|
| a07d5b91644eedadf768f91d3959224357fafbc9 |
11-Nov-2006 |
Reid Spencer <rspencer@reidspencer.com> |
Make an assert comment match the tested assertion.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31686 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 3ba433a7e85c4f5b943ae6585a0327f4ccd461a0 |
11-Nov-2006 |
Evan Cheng <evan.cheng@apple.com> |
Add methods to add implicit def use operands to a MI.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31675 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAG.cpp
|
| 41e53fd39b453be9266e832d7534ae0edeaf334c |
11-Nov-2006 |
Chris Lattner <sabre@nondot.org> |
disallow preinc of a frameindex. This is not profitable and causes 2-addr
pass to explode. This fixes a bunch of llc-beta failures on ppc last night.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31661 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 9f1794ea58fd2acd10b6f39a01ff0fb5a29466cc |
11-Nov-2006 |
Chris Lattner <sabre@nondot.org> |
reduce indentation by using early exits. No functionality change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31660 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 448f219fedf4f2d119599952b6229f11ed11b035 |
11-Nov-2006 |
Chris Lattner <sabre@nondot.org> |
move big chunks of code out-of-line, no functionality change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31658 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 734c91d2506233d6e5d6531abcfbf6302bff3c8d |
10-Nov-2006 |
Chris Lattner <sabre@nondot.org> |
Fix a dag combiner bug exposed by my recent instcombine patch. This fixes
CodeGen/Generic/2006-11-10-DAGCombineMiscompile.ll and PPC gsm/toast
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31644 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 438f7bc67cf235ccee7e6f7ac7f4ae2186eb8020 |
10-Nov-2006 |
Evan Cheng <evan.cheng@apple.com> |
Add implicit def / use operands to MachineInstr.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31633 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAG.cpp
|
| a7ff64d6080ed2b4bd08b6ee75920e8ad5302143 |
10-Nov-2006 |
Evan Cheng <evan.cheng@apple.com> |
When forming a pre-indexed store, make sure ptr isn't the same or is a pred of value being stored. It would cause a cycle.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31631 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 1e7aa5c209109d07af30c8a2e9bfd82cf3824246 |
10-Nov-2006 |
Chris Lattner <sabre@nondot.org> |
commentate
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31627 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 8dc5cad8a255caa4d12d4eba20ad66f3959d161c |
09-Nov-2006 |
Evan Cheng <evan.cheng@apple.com> |
Don't attempt expensive pre-/post- indexed dag combine if target does not support them.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31598 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 5ff839fbabe8b1d26cf4db5c541eb5d7942c25d6 |
09-Nov-2006 |
Evan Cheng <evan.cheng@apple.com> |
Add a mechanism to specify whether a target supports a particular indexed load / store.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31597 91177308-0d34-0410-b5e6-96231b3b80d8
argetLowering.cpp
|
| 00305822396b34bce1b48231b0aaefaadd08e099 |
09-Nov-2006 |
Evan Cheng <evan.cheng@apple.com> |
Rename ISD::MemOpAddrMode to ISD::MemIndexedMode
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31596 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGPrinter.cpp
|
| 144d8f09e139f691cafadbc17873943ba4c465f3 |
09-Nov-2006 |
Evan Cheng <evan.cheng@apple.com> |
Rename ISD::MemOpAddrMode to ISD::MemIndexedMode
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31595 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
electionDAG.cpp
|
| d258efaf6eeb63792ba630edc50405fb559337fb |
09-Nov-2006 |
Evan Cheng <evan.cheng@apple.com> |
getPostIndexedAddressParts change: passes in load/store instead of its loaded / stored VT.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31584 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| b00dddd1643f207f09de382dd67675f375327bb7 |
08-Nov-2006 |
Evan Cheng <evan.cheng@apple.com> |
Match more post-indexed ops.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31569 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| d6c3422e3126927840683574a658a0deada903f0 |
08-Nov-2006 |
Jim Laskey <jlaskey@mac.com> |
Remove redundant <cmath>.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31561 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
electionDAG.cpp
|
| 03fa6ea4025d9c658badc5670413e02e4eefc2f2 |
08-Nov-2006 |
Evan Cheng <evan.cheng@apple.com> |
- When performing pre-/post- indexed load/store transformation, do not worry
about whether the new base ptr would be live below the load/store. Let two
address pass split it back to non-indexed ops.
- Minor tweaks / fixes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31544 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| a4f53ef527e20310555f73e624e7343cda3496cd |
08-Nov-2006 |
Evan Cheng <evan.cheng@apple.com> |
Fixed a minor bug preventing some pre-indexed load / store transformation.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31543 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 3822ff5c71478c7c90a50ca57045fb676fcb5005 |
08-Nov-2006 |
Reid Spencer <rspencer@reidspencer.com> |
For PR950:
This patch converts the old SHR instruction into two instructions,
AShr (Arithmetic) and LShr (Logical). The Shr instructions now are not
dependent on the sign of their operands.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31542 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 6c1491dd0610ca826d460ad469af9ade62290708 |
08-Nov-2006 |
Evan Cheng <evan.cheng@apple.com> |
Fix a obscure post-indexed load / store dag combine bug.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31537 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| bbd6f6ec1a79c1624fb9cd0a3a1d26155de7c090 |
07-Nov-2006 |
Evan Cheng <evan.cheng@apple.com> |
Add post-indexed load / store transformations.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31498 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| fa9aa2b424d0a7d9f7201f8fdcf5ccfa05db3a80 |
07-Nov-2006 |
Chris Lattner <sabre@nondot.org> |
Fix PR988 and CodeGen/Generic/2006-11-06-MemIntrinsicExpand.ll.
The low part goes in the first operand of expandop, not the second one.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31487 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| d5ad440f4371448e2c926b4f6613cc7107dd5c5c |
06-Nov-2006 |
Evan Cheng <evan.cheng@apple.com> |
Remove dead code; added a missing null ptr check.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31478 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGRRList.cpp
|
| 3ef554d2b12af4ed0a25161fa02222d8f14026e5 |
06-Nov-2006 |
Evan Cheng <evan.cheng@apple.com> |
Add comment.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31473 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| d41b30def3181bce4bf87e8bde664d15663165d0 |
05-Nov-2006 |
Jeff Cohen <jeffc@jolt-lang.org> |
Unbreak VC++ build.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31464 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
electionDAG.cpp
|
| 33dbedcdcb6d4d647b013b1c57ad30bf53b15e1f |
05-Nov-2006 |
Evan Cheng <evan.cheng@apple.com> |
Added pre-indexed store support.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31459 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 9109fb1eb7d3341727353777c2a4282aa1a0c39a |
05-Nov-2006 |
Evan Cheng <evan.cheng@apple.com> |
Added getIndexedStore.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31458 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 95f6edeff5ab6de9cf5589f662c8e7a6ba119c2c |
04-Nov-2006 |
Evan Cheng <evan.cheng@apple.com> |
Changes to use operand constraints to process two-address instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31453 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAG.cpp
cheduleDAGList.cpp
cheduleDAGRRList.cpp
|
| e6e97e66a366cc7d2d103ac58db56e4bfd700b10 |
03-Nov-2006 |
Evan Cheng <evan.cheng@apple.com> |
Fix comments.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31414 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 1a854be35295fd1c9c4d0d0f8894e720e22b5e4f |
03-Nov-2006 |
Evan Cheng <evan.cheng@apple.com> |
Rename
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31413 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| b8f4e0aa1719c1d5b93b096a8723ec7f68b4929a |
03-Nov-2006 |
Reid Spencer <rspencer@reidspencer.com> |
Remove dead variable. Fix 80 column violations.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31412 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 7fc033a24d5e82674212379ef4d4d67373a03990 |
03-Nov-2006 |
Evan Cheng <evan.cheng@apple.com> |
Added DAG combiner transformation to generate pre-indexed loads.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31410 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| c5fc57dcaeac6b479fb15b9e1f4aca0845141006 |
03-Nov-2006 |
Evan Cheng <evan.cheng@apple.com> |
Added isPredecessor.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31409 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 02cb49ee679f60662220fca4e26df4f9f16db5e0 |
03-Nov-2006 |
Chris Lattner <sabre@nondot.org> |
silence warning
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31397 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGRRList.cpp
electionDAG.cpp
|
| 3ed469ccd7b028a030b550d84b7336d146f5d8fa |
02-Nov-2006 |
Reid Spencer <rspencer@reidspencer.com> |
For PR786:
Turn on -Wunused and -Wno-unused-parameter. Clean up most of the resulting
fall out by removing unused variables. Remaining warnings have to do with
unused functions (I didn't want to delete code without review) and unused
variables in generated code. Maintainers should clean up the remaining
issues when they see them. All changes pass DejaGnu tests and Olden.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31380 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
egalizeDAG.cpp
cheduleDAGRRList.cpp
cheduleDAGSimple.cpp
electionDAG.cpp
electionDAGISel.cpp
argetLowering.cpp
|
| 0a783f783ca05c961234385f5b269d4cf03dbbdb |
02-Nov-2006 |
Reid Spencer <rspencer@reidspencer.com> |
For PR950:
Replace the REM instruction with UREM, SREM and FREM.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31369 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 2a821601f1db665fbb825727aacf1a54d17b91ef |
02-Nov-2006 |
Chris Lattner <sabre@nondot.org> |
Allow the getRegForInlineAsmConstraint method to return a register class with
no fixes physreg. Treat this as permission to use any register in the register
class. When this happens and it is safe, allow the llvm register allcoator to
allocate the register instead of doing it at isel time. This eliminates a ton
of copies around common inline asms. For example:
int test2(int Y, int X) {
asm("foo %0, %1" : "=r"(X): "r"(X));
return X;
}
now compiles to:
_test2:
foo r3, r4
blr
instead of:
_test2:
mr r2, r4
foo r2, r2
mr r3, r2
blr
GCC produces:
_test2:
foo r4, r4
mr r3,r4
blr
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31366 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 1dabb68ab45cb05a2c50e9a6f18f60cd3d7105f4 |
01-Nov-2006 |
Evan Cheng <evan.cheng@apple.com> |
Clean up.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31359 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGRRList.cpp
|
| 93467e7fe3ba5cb60dec94b3ae8cdb13e51aa9a2 |
01-Nov-2006 |
Evan Cheng <evan.cheng@apple.com> |
CopyFromReg starts a live range so its use should not be considered a floater.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31356 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGRRList.cpp
|
| 6cc31ae4da958abc85309f2160e64d6effaa2d3c |
01-Nov-2006 |
Evan Cheng <evan.cheng@apple.com> |
Print jumptable index.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31340 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
electionDAGPrinter.cpp
|
| 0ccb500fa7a28baeb66754ff4a6950fa0e82617d |
01-Nov-2006 |
Chris Lattner <sabre@nondot.org> |
Compile CodeGen/PowerPC/fp-branch.ll to:
_intcoord_cond_next55:
LBB1_3: ;cond_next55
lis r2, ha16(LCPI1_0)
lfs f0, lo16(LCPI1_0)(r2)
fcmpu cr0, f1, f0
blt cr0, LBB1_2 ;cond_next62.exitStub
LBB1_1: ;bb72.exitStub
li r3, 1
blr
LBB1_2: ;cond_next62.exitStub
li r3, 0
blr
instead of:
_intcoord_cond_next55:
LBB1_3: ;cond_next55
lis r2, ha16(LCPI1_0)
lfs f0, lo16(LCPI1_0)(r2)
fcmpu cr0, f1, f0
bge cr0, LBB1_1 ;bb72.exitStub
LBB1_4: ;cond_next55
lis r2, ha16(LCPI1_0)
lfs f0, lo16(LCPI1_0)(r2)
fcmpu cr0, f1, f0
bnu cr0, LBB1_2 ;cond_next62.exitStub
LBB1_1: ;bb72.exitStub
li r3, 1
blr
LBB1_2: ;cond_next62.exitStub
li r3, 0
blr
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31330 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| df19f27d039fd791c73e39f4134319debc75db4f |
31-Oct-2006 |
Chris Lattner <sabre@nondot.org> |
look through isunordered to inline it into branch blocks.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31328 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| efa46ce87bd454d128c4429475fea805aa98a5f6 |
31-Oct-2006 |
Chris Lattner <sabre@nondot.org> |
handle global address constant sdnodes
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31323 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAG.cpp
|
| 53069fbbae2558a3138df24776448791fea3acee |
31-Oct-2006 |
Chris Lattner <sabre@nondot.org> |
TargetLowering::isOperandValidForConstraint
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31319 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| dba1aeedd8179114a45be655b985455218d20806 |
31-Oct-2006 |
Chris Lattner <sabre@nondot.org> |
Change the prototype for TargetLowering::isOperandValidForConstraint
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31318 91177308-0d34-0410-b5e6-96231b3b80d8
argetLowering.cpp
|
| d03f1581c8a854fdbe4f5a738e9322341c2bc77f |
31-Oct-2006 |
Chris Lattner <sabre@nondot.org> |
Turn an assert into an error message. This is commonly triggered when
we don't support a specific constraint yet. When this happens, print the
unsupported constraint.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31310 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| d063189c0958536aae7ecebec5676541b2cdef9b |
31-Oct-2006 |
Evan Cheng <evan.cheng@apple.com> |
Fix a typo which can break jumptables.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31305 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 3d4ce1108520a4dcf31cb01523e145d286ee64c1 |
30-Oct-2006 |
Evan Cheng <evan.cheng@apple.com> |
Lower jumptable to BR_JT. The legalizer can lower it to a BRIND or let the target custom lower it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31293 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
electionDAGISel.cpp
|
| c41cd9c391f1f69adf416145a5a1308d7ce342fc |
30-Oct-2006 |
Evan Cheng <evan.cheng@apple.com> |
Added a new SDNode type: BR_JT for jumptable branch.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31292 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 6a586c8d9a7ba032adf0619d06473310c41cae14 |
29-Oct-2006 |
Chris Lattner <sabre@nondot.org> |
fix Generic/2006-10-29-Crash.ll
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31281 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 5a145f0094d7e15ca3c0326b1af2ea0ad19f9726 |
29-Oct-2006 |
Chris Lattner <sabre@nondot.org> |
Fix a load folding issue that Evan noticed: there is no need to export values
used by comparisons in the main block.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31279 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| ba726ab3ec88b3b149b4caa34dec5ade5a3a7f89 |
29-Oct-2006 |
Evan Cheng <evan.cheng@apple.com> |
VLOAD is not the LoadSDNode opcode.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31276 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| f6aaaaa39ef0901623965b9e8306c36a6d3bb89e |
29-Oct-2006 |
Nick Lewycky <nicholas@mxc.ca> |
Remove spurious case. EXTLOAD is not one of the node opcodes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31275 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| bad7f48c7070444eeb767c169f8bbed86b2c1ae1 |
28-Oct-2006 |
Chris Lattner <sabre@nondot.org> |
split critical edges more carefully and intelligently. In particular, critical
edges whose destinations are not phi nodes don't bother us. Also, share
split edges, since the split edge can't have a phi. This significantly
reduces the complexity of generated code in some cases.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31274 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 1c6f01aaa58c1f8666c30465b73b702524fa9553 |
28-Oct-2006 |
Jim Laskey <jlaskey@mac.com> |
Load and stores have not been uniqued properly.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31261 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 47e32e6b831dad8289fd498c71c5f641172b1c09 |
28-Oct-2006 |
Chris Lattner <sabre@nondot.org> |
Split *all* critical edges before isel. This resolves issues with spill code
being inserted on unsplit critical edges, which introduces (sometimes large
amounts of) partially dead spill code.
This also fixes PR925 + CodeGen/Generic/switch-crit-edge-constant.ll
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31260 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 6fb6ef4d65abcbbb0b0d81e1b51d99949664ac86 |
28-Oct-2006 |
Chris Lattner <sabre@nondot.org> |
Fix a serious bug that caused any x86 vector stuff to infinite loop
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31254 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| def69b92e70d156ed6f8c7af33c9a87d3f475e09 |
28-Oct-2006 |
Jim Laskey <jlaskey@mac.com> |
Clean up.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31243 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 8c494ab759266322aa05d5e99af9c05eb0d44576 |
28-Oct-2006 |
Chris Lattner <sabre@nondot.org> |
Fix a bug in merged condition handling (CodeGen/Generic/2006-10-27-CondFolding.ll).
Add many fewer CFG edges and PHI node entries. If there is a switch which has
the same block as multiple destinations, only add that block once as a successor/phi
node (in the jumptable case)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31242 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 583bd47f777fe3eb8305872fa0eadab31e833dff |
28-Oct-2006 |
Jim Laskey <jlaskey@mac.com> |
Switch over from SelectionNodeCSEMap to FoldingSet.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31240 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
electionDAGCSEMap.cpp
|
| 1c9b2f312d63902303507ee35dbd7631447773be |
27-Oct-2006 |
Chris Lattner <sabre@nondot.org> |
remove debug code
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31233 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| d2f9ee9ea7b08c23a8742b6a53dd78a20233adc0 |
27-Oct-2006 |
Chris Lattner <sabre@nondot.org> |
Codegen cond&cond with two branches. This compiles (f.e.) PowerPC/and-branch.ll to:
cmpwi cr0, r4, 4
bgt cr0, LBB1_2 ;UnifiedReturnBlock
LBB1_3: ;entry
cmplwi cr0, r3, 0
bne cr0, LBB1_2 ;UnifiedReturnBlock
instead of:
cmpwi cr7, r4, 4
mfcr r2
addic r4, r3, -1
subfe r3, r4, r3
rlwinm r2, r2, 30, 31, 31
or r2, r2, r3
cmplwi cr0, r2, 0
bne cr0, LBB1_2 ;UnifiedReturnBlock
LBB1_1: ;cond_true
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31232 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 571e434a34e26f295f13db2dd07551de7e25f8a9 |
27-Oct-2006 |
Chris Lattner <sabre@nondot.org> |
Turn conditions like x<Y|z==q into multiple blocks.
This compiles Regression/CodeGen/X86/or-branch.ll into:
_foo:
subl $12, %esp
call L_bar$stub
movl 20(%esp), %eax
movl 16(%esp), %ecx
cmpl $5, %eax
jl LBB1_1 #cond_true
LBB1_3: #entry
testl %ecx, %ecx
jne LBB1_2 #UnifiedReturnBlock
LBB1_1: #cond_true
call L_bar$stub
addl $12, %esp
ret
LBB1_2: #UnifiedReturnBlock
addl $12, %esp
ret
instead of:
_foo:
subl $12, %esp
call L_bar$stub
movl 20(%esp), %eax
movl 16(%esp), %ecx
cmpl $4, %eax
setg %al
testl %ecx, %ecx
setne %cl
testb %cl, %al
jne LBB1_2 #UnifiedReturnBlock
LBB1_1: #cond_true
call L_bar$stub
addl $12, %esp
ret
LBB1_2: #UnifiedReturnBlock
addl $12, %esp
ret
And on ppc to:
cmpwi cr0, r29, 5
blt cr0, LBB1_1 ;cond_true
LBB1_3: ;entry
cmplwi cr0, r30, 0
bne cr0, LBB1_2 ;UnifiedReturnBlock
instead of:
cmpwi cr7, r4, 4
mfcr r2
addic r4, r3, -1
subfe r30, r4, r3
rlwinm r29, r2, 30, 31, 31
and r2, r29, r30
cmplwi cr0, r2, 0
bne cr0, LBB1_2 ;UnifiedReturnBlock
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31230 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 5270cf1b77e68b19e2c689e87700029821c70aa2 |
26-Oct-2006 |
Evan Cheng <evan.cheng@apple.com> |
getPreIndexedLoad -> getIndexedLoad.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31209 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 1628cec4d7fce310d9cde0bcc73997e5a71692c4 |
26-Oct-2006 |
Reid Spencer <rspencer@reidspencer.com> |
For PR950:
Make necessary changes to support DIV -> [SUF]Div. This changes llvm to
have three division instructions: signed, unsigned, floating point. The
bytecode and assembler are bacwards compatible, however.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31195 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 2452595927a19a84ab20f012f1e2414a18f65ffb |
24-Oct-2006 |
Chris Lattner <sabre@nondot.org> |
visitSwitchCase knows how to insert conditional branches well. Change
visitBr to just call visitSwitchCase, eliminating duplicate logic.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31167 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 57ab65972e09be54da6461e483664ebf34afa1ee |
24-Oct-2006 |
Chris Lattner <sabre@nondot.org> |
Generalize CaseBlock a bit more:
Rename LHSBB/RHSBB to TrueBB/FalseBB. Allow the RHS value to be null,
in which case the LHS is treated as a bool.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31166 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 7b248d986670c214674c45d362950ec105668255 |
24-Oct-2006 |
Chris Lattner <sabre@nondot.org> |
generalize 'CaseBlock'. It really allows any comparison to be inserted.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31161 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| b354343af79ce7b64e3b32696f37ad0ce29f3ffd |
23-Oct-2006 |
Chris Lattner <sabre@nondot.org> |
Minor tweak. Instead of generating:
movl 32(%esp), %eax
cmpl $1, %eax
je LBB1_1 #bb
LBB1_4: #entry
cmpl $2, %eax
je LBB1_2 #bb2
jmp LBB1_3 #UnifiedReturnBlock
LBB1_1: #bb
notice that we would miss the fall through and emit this instead:
movl 32(%esp), %eax
cmpl $2, %eax
je LBB1_2 #bb2
LBB1_4: #entry
cmpl $1, %eax
jne LBB1_3 #UnifiedReturnBlock
LBB1_1: #bb
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31130 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| b2e806eecd85c98367f038817e742ef183dd9f87 |
23-Oct-2006 |
Chris Lattner <sabre@nondot.org> |
Fix phi node updating for switches lowered to linear sequences of branches.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31125 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| e236ac64a2b149ccf4216159430de512ec58a504 |
23-Oct-2006 |
Chris Lattner <sabre@nondot.org> |
disable this code for now, it's not yet safely updating phi nodes
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31124 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| d2c1d2200b4d1012c61c4bcddfbc6fefcf3a05e1 |
22-Oct-2006 |
Chris Lattner <sabre@nondot.org> |
Implement PR964 and Regression/CodeGen/Generic/SwitchLowering.ll
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31119 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 34ab4d45d2aa11bee666836e3571be2627959a42 |
20-Oct-2006 |
Chris Lattner <sabre@nondot.org> |
Make flag and chain edges visually distinguishable from value edges in DOT
output.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31067 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGPrinter.cpp
|
| b83eb6447ba155342598f0fabe1f08f5baa9164a |
20-Oct-2006 |
Reid Spencer <rspencer@reidspencer.com> |
For PR950:
This patch implements the first increment for the Signless Types feature.
All changes pertain to removing the ConstantSInt and ConstantUInt classes
in favor of just using ConstantInt.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31063 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
electionDAGISel.cpp
|
| c70ddad2b7d7abffeaaace913939fb3c5c55a38b |
19-Oct-2006 |
Bill Wendling <isanbard@gmail.com> |
Partially in response to PR926: insert the newly created machine basic
blocks into the basic block list when lowering the switch inst. into a
binary tree of if-then statements. This allows the "visitSwitchCase" func
to allow for fall-through behavior.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31057 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 07a2709e9de7c619edc26d97b3491c48ccae55ef |
18-Oct-2006 |
Jim Laskey <jlaskey@mac.com> |
Add option for controlling inclusion of global AA.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31040 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 096c22ea3d0174d1c75358dbdc49618cf18e9fb7 |
18-Oct-2006 |
Jim Laskey <jlaskey@mac.com> |
Use global info for alias analysis.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31035 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| b360729873eb142ae2327cd399880e4ef55bea2a |
17-Oct-2006 |
Chris Lattner <sabre@nondot.org> |
Trivial patch to speed up legalizing common i64 constants.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31020 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 50662beab7cc6394a0d6524d16fe7de1d5192196 |
17-Oct-2006 |
Chris Lattner <sabre@nondot.org> |
Fix CodeGen/PowerPC/2006-10-17-brcc-miscompile.ll
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31019 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 649b7ef6273aced78ae32321de282489ce9be6b3 |
17-Oct-2006 |
Evan Cheng <evan.cheng@apple.com> |
Fix printer for StoreSDNode.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31017 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGPrinter.cpp
|
| 2cacccae194b5ed648c004f6c06fce5565331ee9 |
17-Oct-2006 |
Evan Cheng <evan.cheng@apple.com> |
Reflect MemOpAddrMode change; added a helper to create pre-indexed load.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31016 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 26f7fa7bba94eb18bf0e43586dd2b596cb58ca80 |
17-Oct-2006 |
Jim Laskey <jlaskey@mac.com> |
Make it simplier to dump DAGs while in DAGCombiner. Remove a nasty optimization.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31009 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
electionDAG.cpp
electionDAGPrinter.cpp
|
| 5d04a1af4fe7600b43812d28757a5d62ba409942 |
17-Oct-2006 |
Evan Cheng <evan.cheng@apple.com> |
Make sure operand does have size and element type operands.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30999 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 5956922a2d22dc46523078e35de7dc648a1db172 |
17-Oct-2006 |
Evan Cheng <evan.cheng@apple.com> |
Be careful when looking through a vbit_convert. Optimizing this:
(vector_shuffle
(vbitconvert (vbuildvector (copyfromreg v4f32), 1, v4f32), 4, f32),
(undef, undef, undef, undef), (0, 0, 0, 0), 4, f32)
to the
vbitconvert
is a very bad idea.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30989 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| c7c3f110eda0ff8040e4bd99e38d3112b910810f |
16-Oct-2006 |
Jim Laskey <jlaskey@mac.com> |
Pass AliasAnalysis thru to DAGCombiner.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30984 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
electionDAGISel.cpp
|
| d4edf2cf911f1f6543ec6cc89fe7b8bb37ad95b3 |
14-Oct-2006 |
Jim Laskey <jlaskey@mac.com> |
Tidy up after truncstore changes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30961 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| d42a5238a967c9cdfec8fe086bd18876bff5a951 |
14-Oct-2006 |
Evan Cheng <evan.cheng@apple.com> |
Debug tweak.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30959 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAG.cpp
cheduleDAGRRList.cpp
|
| 30f73e78bd92f9815647ef8e3d29dd355f29432c |
14-Oct-2006 |
Chris Lattner <sabre@nondot.org> |
Make sure that the node returned by SimplifySetCC is added to the worklist
so that it can be deleted if unused.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30955 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 8ac9d0ebdea49dedca3387fafa4e40e911d3269f |
14-Oct-2006 |
Chris Lattner <sabre@nondot.org> |
fold setcc of a setcc.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30953 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 51dabfb28375be7bc5848806ae31cd068b6133f8 |
14-Oct-2006 |
Chris Lattner <sabre@nondot.org> |
When SimplifySetCC was moved to the DAGCombiner, it was never removed from
SelectionDAG and it has since bitrotted. Remove the copy from SelectionDAG.
Next, remove the constant folding piece of DAGCombiner::SimplifySetCC into
a new FoldSetCC method which can be used by getNode() and SimplifySetCC.
This fixes obscure bugs.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30952 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
electionDAG.cpp
|
| 274062c172bbdf70b8f717875ecf0dabb176c6e5 |
14-Oct-2006 |
Jim Laskey <jlaskey@mac.com> |
Reduce the workload by not adding chain users to work list.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30948 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| dc78cbf45794739ee0fbc8e0c0597f97b5e94df6 |
14-Oct-2006 |
Chris Lattner <sabre@nondot.org> |
Fix a bug where we incorrectly turned '(X & 0) == 0' into '(X & 0) >> -1',
which is undefined. "0" isn't a power of 2.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30947 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 8b2794aeff151be8cdbd44786c1d0f94f8f2e427 |
13-Oct-2006 |
Evan Cheng <evan.cheng@apple.com> |
Merge ISD::TRUNCSTORE to ISD::STORE. Switch to using StoreSDNode.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30945 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
egalizeDAG.cpp
electionDAG.cpp
electionDAGISel.cpp
argetLowering.cpp
|
| 26d2990e03e60adc66fc5232baac5855fe65c747 |
12-Oct-2006 |
Chris Lattner <sabre@nondot.org> |
Lower X%C into X/C+stuff. This allows the 'division by a constant' logic to
apply to rems as well as divs. This fixes PR945 and speeds up ReedSolomon
from 14.57s to 10.90s (which is now faster than gcc).
It compiles CodeGen/X86/rem.ll into:
_test1:
subl $4, %esp
movl %esi, (%esp)
movl $2155905153, %ecx
movl 8(%esp), %esi
movl %esi, %eax
imull %ecx
addl %esi, %edx
movl %edx, %eax
shrl $31, %eax
sarl $7, %edx
addl %eax, %edx
imull $255, %edx, %eax
subl %eax, %esi
movl %esi, %eax
movl (%esp), %esi
addl $4, %esp
ret
_test2:
movl 4(%esp), %eax
movl %eax, %ecx
sarl $31, %ecx
shrl $24, %ecx
addl %eax, %ecx
andl $4294967040, %ecx
subl %ecx, %eax
ret
_test3:
subl $4, %esp
movl %esi, (%esp)
movl $2155905153, %ecx
movl 8(%esp), %esi
movl %esi, %eax
mull %ecx
shrl $7, %edx
imull $255, %edx, %eax
subl %eax, %esi
movl %esi, %eax
movl (%esp), %esi
addl $4, %esp
ret
instead of div/idiv instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30920 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 130a6471b90f66e99b1f9f42877fdf611c330ac6 |
12-Oct-2006 |
Evan Cheng <evan.cheng@apple.com> |
Add RemoveDeadNode to remove a dead node and its (potentially) dead operands.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30916 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 3657ffe03733cf7cd9d6ed823ad696edb4547362 |
12-Oct-2006 |
Chris Lattner <sabre@nondot.org> |
add a minor dag combine noticed when looking at PR945
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30915 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 3ad175bd707f268436afa42af8672569b5b92cb2 |
12-Oct-2006 |
Jim Laskey <jlaskey@mac.com> |
D'oh - need to use the rigth kind of store.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30903 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 7aed46c25b9c1527b4112e71060f35c4f9c6b024 |
11-Oct-2006 |
Jim Laskey <jlaskey@mac.com> |
Alias analysis of TRUNCSTORE.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30889 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 2d84c4c7b314242346dea1a7f48563333476a4d5 |
11-Oct-2006 |
Jim Laskey <jlaskey@mac.com> |
Typo
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30884 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| c2b19f3449a48bb4810afbf1a80a46bc87098606 |
11-Oct-2006 |
Jim Laskey <jlaskey@mac.com> |
Handle aliasing of loadext.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30883 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 7ca56aff2257ac0acceb54f3ae7ba65458d46e67 |
11-Oct-2006 |
Jim Laskey <jlaskey@mac.com> |
Fix regression in combiner alias analysis.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30880 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 2e49f090f9656af7d5ed4d5c4e9fa26af59c7233 |
11-Oct-2006 |
Evan Cheng <evan.cheng@apple.com> |
Naming consistency.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30878 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
egalizeDAG.cpp
electionDAG.cpp
electionDAGPrinter.cpp
argetLowering.cpp
|
| 82c3d8f81ab20dc7571f29ffc46a5bb1b7ed8323 |
11-Oct-2006 |
Andrew Lenharth <andrewl@lenharth.org> |
Jimptables working again on alpha.
As a bonus, use the GOT node instead of the AlphaISD::GOT for internal stuff.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30873 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
electionDAG.cpp
electionDAGISel.cpp
|
| 755480681c795d585c73556c028b6143c46bda86 |
11-Oct-2006 |
Chris Lattner <sabre@nondot.org> |
add two helper methods.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30869 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 9629abac79fe4efdd000ca1996b2cabd1609190c |
11-Oct-2006 |
Evan Cheng <evan.cheng@apple.com> |
FindModifiedNodeSlot needs to add LoadSDNode ivars to create proper SelectionDAGCSEMap ID.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30866 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 45aeccc1fda9e0938c38f554c002c6950bd92500 |
10-Oct-2006 |
Evan Cheng <evan.cheng@apple.com> |
Also update getNodeLabel for LoadSDNode.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30861 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGPrinter.cpp
|
| 0ac1c6ad9af78654188ca5164c1d0839e834444e |
10-Oct-2006 |
Evan Cheng <evan.cheng@apple.com> |
SDNode::dump should also print out extension type and VT.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30860 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 55b5708b6bbffc79cf133c31faa51d144bfc5d4a |
10-Oct-2006 |
Chris Lattner <sabre@nondot.org> |
Fix another bug in extload promotion.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30857 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 62f2a3c7aa0eba3e7bc5e2d59e268c5e1f48fb46 |
10-Oct-2006 |
Evan Cheng <evan.cheng@apple.com> |
Fix a bug introduced by my LOAD/LOADX changes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30853 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 466685d41a9ea4905b9486fea38e83802e46f196 |
09-Oct-2006 |
Evan Cheng <evan.cheng@apple.com> |
Reflects ISD::LOAD / ISD::LOADX / LoadSDNode changes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30844 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
egalizeDAG.cpp
electionDAG.cpp
electionDAGISel.cpp
argetLowering.cpp
|
| 6270f686b323281aa6774d019413a52696337ff2 |
09-Oct-2006 |
Chris Lattner <sabre@nondot.org> |
Eliminate more token factors by taking advantage of transitivity:
if TF depends on A and B, and A depends on B, TF just needs to depend on
A. With Jim's alias-analysis stuff enabled, this compiles the testcase in
PR892 into:
__Z4test3Val:
subl $44, %esp
call L__Z3foov$stub
movl %edx, 28(%esp)
movl %eax, 32(%esp)
movl %eax, 24(%esp)
movl %edx, 36(%esp)
movl 52(%esp), %ecx
movl %ecx, 4(%esp)
movl %eax, 8(%esp)
movl %edx, 12(%esp)
movl 48(%esp), %eax
movl %eax, (%esp)
call L__Z3bar3ValS_$stub
addl $44, %esp
ret
instead of:
__Z4test3Val:
subl $44, %esp
call L__Z3foov$stub
movl %eax, 24(%esp)
movl %edx, 28(%esp)
movl 24(%esp), %eax
movl %eax, 32(%esp)
movl 28(%esp), %eax
movl %eax, 36(%esp)
movl 32(%esp), %eax
movl 36(%esp), %ecx
movl 52(%esp), %edx
movl %edx, 4(%esp)
movl %eax, 8(%esp)
movl %ecx, 12(%esp)
movl 48(%esp), %eax
movl %eax, (%esp)
call L__Z3bar3ValS_$stub
addl $44, %esp
ret
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30821 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 7138234bafedf3fc3b9099d3d4bb7c062eb49c6a |
08-Oct-2006 |
Jim Laskey <jlaskey@mac.com> |
Combiner alias analysis passes Multisource (release-asserts.)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30818 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| ed83a7019be05c2ed16a134fc9a708eb25dcd641 |
07-Oct-2006 |
Chris Lattner <sabre@nondot.org> |
Fix a bug legalizing zero-extending i64 loads into 32-bit loads. The bottom
part was always forced to be sextload, even when we needed an zextload.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30782 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| cf9668f23d67b171d3529087061b1387b20eb8b9 |
07-Oct-2006 |
Chris Lattner <sabre@nondot.org> |
initialize ivar
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30780 91177308-0d34-0410-b5e6-96231b3b80d8
argetLowering.cpp
|
| e0cfc8b2f24394c7b5d9275235678269aa4425fd |
07-Oct-2006 |
Chris Lattner <sabre@nondot.org> |
jump tables handle pic
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30776 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 4bdd2753db4a9d92b64c68b042c8b38f7223238d |
06-Oct-2006 |
Chris Lattner <sabre@nondot.org> |
Fix a miscompilation of:
long long foo(long long X) {
return (long long)(signed char)(int)X;
}
Instead of:
_foo:
extsb r2, r4
srawi r3, r4, 31
mr r4, r2
blr
we now produce:
_foo:
extsb r4, r4
srawi r3, r4, 31
blr
This fixes a miscompilation in ConstantFolding.cpp.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30768 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 786225adf09e606c795ef68a1f789c12f37869f2 |
06-Oct-2006 |
Evan Cheng <evan.cheng@apple.com> |
Make use of getStore().
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30759 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
egalizeDAG.cpp
electionDAGISel.cpp
|
| ad071e1cd1a4b880019f1b2e827ee81867815f82 |
06-Oct-2006 |
Evan Cheng <evan.cheng@apple.com> |
Add getStore() helper function to create ISD::STORE nodes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30758 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| bc588b8bbf30a3349ff7b8fa7a8fa2326b0a5df0 |
05-Oct-2006 |
Jim Laskey <jlaskey@mac.com> |
Alias analysis code clean ups.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30753 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 693163e74d047a05799eaaf619ba4972fdc3a0e9 |
05-Oct-2006 |
Evan Cheng <evan.cheng@apple.com> |
Fix some typos that can cause a flag value to have more than one use.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30727 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 6ff23e5e844b49cee021894f168c739a4af423b5 |
04-Oct-2006 |
Jim Laskey <jlaskey@mac.com> |
More extensive alias analysis.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30721 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| c548428c5d7328592f4db6f6cd815af18b3152a3 |
04-Oct-2006 |
Evan Cheng <evan.cheng@apple.com> |
Combine ISD::EXTLOAD, ISD::SEXTLOAD, ISD::ZEXTLOAD into ISD::LOADX. Add an
extra operand to LOADX to specify the exact value extension type.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30714 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
egalizeDAG.cpp
electionDAG.cpp
argetLowering.cpp
|
| bf497a3a68b18472d8ad755bf483588b0caaa8cb |
04-Oct-2006 |
Evan Cheng <evan.cheng@apple.com> |
Fix an obvious typo.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30711 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 01078fb7ec3b8f62679c49a147a69b3978092500 |
02-Oct-2006 |
Jim Laskey <jlaskey@mac.com> |
Debugging kruft
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30688 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGPrinter.cpp
|
| ec20402c90b605afeedbcf0e3aabe6f8054f23dd |
02-Oct-2006 |
Jim Laskey <jlaskey@mac.com> |
Add ability to annotate (color) nodes in a viewGraph.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30686 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGPrinter.cpp
|
| 57f9a43c64e8c5c8b2566fb6649754c11b59b98a |
28-Sep-2006 |
Chris Lattner <sabre@nondot.org> |
refactor critical edge breaking out into the SplitCritEdgesForPHIConstants method.
This is a baby step towards fixing PR925.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30643 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 16113431e84bb8adba21fc73bb5715a1297000ae |
26-Sep-2006 |
Andrew Lenharth <andrewl@lenharth.org> |
Comments on JumpTableness
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30615 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
electionDAGISel.cpp
|
| bb1518585b2f2b2f501f70cc45c49a2d2ea57804 |
26-Sep-2006 |
Jim Laskey <jlaskey@mac.com> |
Load chain check is not needed
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30613 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 79597d2af6e1bd80a7768eab3b380d3d71469f5d |
26-Sep-2006 |
Jim Laskey <jlaskey@mac.com> |
Chain can be any operand
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30611 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 3dd1170616001e38b4dd899d5990734cea339663 |
26-Sep-2006 |
Jim Laskey <jlaskey@mac.com> |
Wrong size for load
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30610 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 172585b3aac4444e22d250a68e59bc03b8837ef4 |
26-Sep-2006 |
Jim Laskey <jlaskey@mac.com> |
Can't move a load node if it's chain is not used.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30609 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 14fbcbfa2b7146569c588c451825206906c3b55a |
25-Sep-2006 |
Jim Laskey <jlaskey@mac.com> |
Accidental enable of bad code
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30601 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 288af5e740174463c27539e6021369e0e8ca20fa |
25-Sep-2006 |
Jim Laskey <jlaskey@mac.com> |
Fix chain dropping in load and drop unused stores in ret blocks.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30600 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 279f053eae35729f449f38e08618664b118806bd |
25-Sep-2006 |
Jim Laskey <jlaskey@mac.com> |
Core antialiasing for load and store.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30597 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| beec30eaf301bd6882cd06800b5175b94f033f9d |
24-Sep-2006 |
Andrew Lenharth <andrewl@lenharth.org> |
Add support for other relocation bases to jump tables, as well as custom asm directives
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30593 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
electionDAGISel.cpp
|
| 2ae5b87996dca039d0721f1c463835f726979030 |
24-Sep-2006 |
Evan Cheng <evan.cheng@apple.com> |
PIC jump table entries are always 32-bit. This fixes PIC jump table support on X86-64.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30590 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 2adffa1f6648c2bb1d96f22a4bf97964b7e4128f |
21-Sep-2006 |
Evan Cheng <evan.cheng@apple.com> |
Make it work for DAG combine of multi-value nodes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30573 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 516b0eacff5aedf26e146812d1fbcd5f3ceedca8 |
21-Sep-2006 |
Jim Laskey <jlaskey@mac.com> |
core corrections
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30570 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| d1aed7aaf7047873b8878502859905159eaf5362 |
21-Sep-2006 |
Jim Laskey <jlaskey@mac.com> |
Basic "in frame" alias analysis.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30568 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 0e4b922680f55a8e28fc2c3db0b80a1c78d24918 |
21-Sep-2006 |
Chris Lattner <sabre@nondot.org> |
fold (aext (and (trunc x), cst)) -> (and x, cst).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30561 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| bf3708794f4dca6e959247a3fe7cbe0cb5348eeb |
21-Sep-2006 |
Chris Lattner <sabre@nondot.org> |
Check the right value type. This fixes 186.crafty on x86
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30560 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 111c22824115ed77a8f14e555c10880d07a45eb4 |
21-Sep-2006 |
Chris Lattner <sabre@nondot.org> |
Compile:
int %test(ulong *%tmp) {
%tmp = load ulong* %tmp ; <ulong> [#uses=1]
%tmp.mask = shr ulong %tmp, ubyte 50 ; <ulong> [#uses=1]
%tmp.mask = cast ulong %tmp.mask to ubyte
%tmp2 = and ubyte %tmp.mask, 3 ; <ubyte> [#uses=1]
%tmp2 = cast ubyte %tmp2 to int ; <int> [#uses=1]
ret int %tmp2
}
to:
_test:
movl 4(%esp), %eax
movl 4(%eax), %eax
shrl $18, %eax
andl $3, %eax
ret
instead of:
_test:
movl 4(%esp), %eax
movl 4(%eax), %eax
shrl $18, %eax
# TRUNCATE movb %al, %al
andb $3, %al
movzbl %al, %eax
ret
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30558 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 6007b84a5bdcba9ee012418fedd32c236aad2cf6 |
21-Sep-2006 |
Chris Lattner <sabre@nondot.org> |
Generalize (zext (truncate x)) and (sext (truncate x)) folding to work when
the src/dst are not the same size. This catches things like "truncate
32-bit X to 8 bits, then zext to 16", which happens a bit on X86.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30557 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| e3152e54b5e92ef4bc29b3d8c5923893d31617ab |
20-Sep-2006 |
Chris Lattner <sabre@nondot.org> |
Compile:
int test3(int a, int b) { return (a < 0) ? a : 0; }
to:
_test3:
srawi r2, r3, 31
and r3, r2, r3
blr
instead of:
_test3:
cmpwi cr0, r3, 1
li r2, 0
blt cr0, LBB2_2 ;entry
LBB2_1: ;entry
mr r3, r2
LBB2_2: ;entry
blr
This implements: PowerPC/select_lt0.ll:seli32_a_a
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30517 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 84750587bf859a048580f7f13b1b2710d0b681fb |
20-Sep-2006 |
Chris Lattner <sabre@nondot.org> |
Fold the full generality of (any_extend (truncate x))
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30514 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 5f42a240ba5c6199d2d78fb1238938da2c073755 |
20-Sep-2006 |
Chris Lattner <sabre@nondot.org> |
Two things:
1. teach SimplifySetCC that '(srl (ctlz x), 5) == 0' is really x != 0.
2. Teach visitSELECT_CC to use SimplifySetCC instead of calling it and
ignoring the result. This allows us to compile:
bool %test(ulong %x) {
%tmp = setlt ulong %x, 4294967296
ret bool %tmp
}
to:
_test:
cntlzw r2, r3
cmplwi cr0, r3, 1
srwi r2, r2, 5
li r3, 0
beq cr0, LBB1_2 ;
LBB1_1: ;
mr r3, r2
LBB1_2: ;
blr
instead of:
_test:
addi r2, r3, -1
cntlzw r2, r2
cntlzw r3, r3
srwi r2, r2, 5
cmplwi cr0, r2, 0
srwi r2, r3, 5
li r3, 0
bne cr0, LBB1_2 ;
LBB1_1: ;
mr r3, r2
LBB1_2: ;
blr
This isn't wonderful, but it's an improvement.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30513 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 0ea26ca45b56b2b4cc1839cdbccc13a38b066969 |
20-Sep-2006 |
Chris Lattner <sabre@nondot.org> |
Expand 64-bit shifts more optimally if we know that the high bit of the
shift amount is one or zero. For example, for:
long long foo1(long long X, int C) {
return X << (C|32);
}
long long foo2(long long X, int C) {
return X << (C&~32);
}
we get:
_foo1:
movb $31, %cl
movl 4(%esp), %edx
andb 12(%esp), %cl
shll %cl, %edx
xorl %eax, %eax
ret
_foo2:
movb $223, %cl
movl 4(%esp), %eax
movl 8(%esp), %edx
andb 12(%esp), %cl
shldl %cl, %eax, %edx
shll %cl, %eax
ret
instead of:
_foo1:
subl $4, %esp
movl %ebx, (%esp)
movb $32, %bl
movl 8(%esp), %eax
movl 12(%esp), %edx
movb %bl, %cl
orb 16(%esp), %cl
shldl %cl, %eax, %edx
shll %cl, %eax
xorl %ecx, %ecx
testb %bl, %bl
cmovne %eax, %edx
cmovne %ecx, %eax
movl (%esp), %ebx
addl $4, %esp
ret
_foo2:
subl $4, %esp
movl %ebx, (%esp)
movb $223, %cl
movl 8(%esp), %eax
movl 12(%esp), %edx
andb 16(%esp), %cl
shldl %cl, %eax, %edx
shll %cl, %eax
xorl %ecx, %ecx
xorb %bl, %bl
testb %bl, %bl
cmovne %eax, %edx
cmovne %ecx, %eax
movl (%esp), %ebx
addl $4, %esp
ret
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30506 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 863ac769b850d75a390bfdc20b62d7d120fb69a9 |
19-Sep-2006 |
Chris Lattner <sabre@nondot.org> |
Fold extract_element(cst) to cst
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30478 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 5c6621c3bc7e53e0754cb74062d27a6e8b7275e8 |
19-Sep-2006 |
Chris Lattner <sabre@nondot.org> |
Minor speedup for legalize by avoiding some malloc traffic
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30477 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 6b5578f052c2405c0d622192ccacfd47563c99a8 |
19-Sep-2006 |
Evan Cheng <evan.cheng@apple.com> |
Fix a typo.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30474 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 52cc1ea2a1a374b58801398460a6289723089d91 |
18-Sep-2006 |
Evan Cheng <evan.cheng@apple.com> |
Allow i32 UDIV, SDIV, UREM, SREM to be expanded into libcalls.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30470 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 3fbd67898e365f12436564a52d8995a4aeb4ef89 |
18-Sep-2006 |
Andrew Lenharth <andrewl@lenharth.org> |
absolute addresses must match pointer size
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30461 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 8829dc88a8637fe588e299d96de394afc3ecc528 |
16-Sep-2006 |
Chris Lattner <sabre@nondot.org> |
Oh yeah, this is needed too
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30407 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| a89654b1a17478a272af33221e325b7feb9aec1b |
16-Sep-2006 |
Chris Lattner <sabre@nondot.org> |
simplify control flow, no functionality change
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30403 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 7d7bffe157c0896cc850ed384dd748aae1a00c7b |
16-Sep-2006 |
Chris Lattner <sabre@nondot.org> |
Allow custom expand of mul
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30402 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 1ec72738ac685543a02068559877ec713b36a463 |
14-Sep-2006 |
Chris Lattner <sabre@nondot.org> |
Fold (X & C1) | (Y & C2) -> (X|Y) & C3 when possible.
This implements CodeGen/X86/and-or-fold.ll
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30379 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 516b962b5a043e4773f0655d0790e58780e3a345 |
14-Sep-2006 |
Chris Lattner <sabre@nondot.org> |
Split rotate matching code out to its own function. Make it stronger, by
matching things like ((x >> c1) & c2) | ((x << c3) & c4) to (rot x, c5) & c6
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30376 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| c970f062e0a66d97a06eca213486a16fae1b37a4 |
13-Sep-2006 |
Chris Lattner <sabre@nondot.org> |
If LSR went through a lot of trouble to put constants (e.g. the addr of a global
in a specific BB, don't undo this!). This allows us to compile
CodeGen/X86/loop-hoist.ll into:
_foo:
xorl %eax, %eax
*** movl L_Arr$non_lazy_ptr, %ecx
movl 4(%esp), %edx
LBB1_1: #cond_true
movl %eax, (%ecx,%eax,4)
incl %eax
cmpl %edx, %eax
jne LBB1_1 #cond_true
LBB1_2: #return
ret
instead of:
_foo:
xorl %eax, %eax
movl 4(%esp), %ecx
LBB1_1: #cond_true
*** movl L_Arr$non_lazy_ptr, %edx
movl %eax, (%edx,%eax,4)
incl %eax
cmpl %ecx, %eax
jne LBB1_1 #cond_true
LBB1_2: #return
ret
This was noticed in 464.h264ref. This doesn't usually affect PPC,
but strikes X86 all the time.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30290 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 79980b07dab50da1a8f572f9504674bfa853d484 |
13-Sep-2006 |
Chris Lattner <sabre@nondot.org> |
Compile X << 1 (where X is a long-long) to:
addl %ecx, %ecx
adcl %eax, %eax
instead of:
movl %ecx, %edx
addl %edx, %edx
shrl $31, %ecx
addl %eax, %eax
orl %ecx, %eax
and to:
addc r5, r5, r5
adde r4, r4, r4
instead of:
slwi r2,r9,1
srwi r0,r11,31
slwi r3,r11,1
or r2,r0,r2
on PPC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30284 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| d6594ae54cfde4db4d30272192645c0a45fb9902 |
12-Sep-2006 |
Evan Cheng <evan.cheng@apple.com> |
Added support for machine specific constantpool values. These are useful for
representing expressions that can only be resolved at link time, etc.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30278 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAG.cpp
electionDAG.cpp
electionDAGCSEMap.cpp
electionDAGPrinter.cpp
|
| c66764c00756d800aede2fd32d55658a236b1912 |
10-Sep-2006 |
Chris Lattner <sabre@nondot.org> |
This code was trying too hard. By eliminating redundant edges in the CFG
due to switch cases going to the same place, it make #pred != #phi entries,
breaking live interval analysis.
This fixes 458.sjeng on x86 with llc.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30236 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 6ddf8ed6fe2d0aa5e15f7b9ad7e5049e2223bbd1 |
09-Sep-2006 |
Chris Lattner <sabre@nondot.org> |
Implement the fpowi now by lowering to a libcall
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30225 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
electionDAG.cpp
electionDAGISel.cpp
|
| f3f333dbd67afde147165bb5ba87889d76a6f436 |
09-Sep-2006 |
Chris Lattner <sabre@nondot.org> |
Allow targets to custom lower expanded BIT_CONVERT's
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30217 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| d5e93c07957844e3086fb12d686b93dbbd2524c2 |
07-Sep-2006 |
Chris Lattner <sabre@nondot.org> |
Fix CodeGen/Generic/2006-09-06-SwitchLowering.ll, a bug where SDIsel inserted
too many phi operands when lowering a switch to branches in some cases.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30142 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 7acf5f39fea463df5ad196affbef0176f3b25e0f |
05-Sep-2006 |
Chris Lattner <sabre@nondot.org> |
Change the default to 0, which means 'default'.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30114 91177308-0d34-0410-b5e6-96231b3b80d8
argetLowering.cpp
|
| 09e460662a8d7328da1b938d5581a6ef3740b51d |
05-Sep-2006 |
Chris Lattner <sabre@nondot.org> |
Completely eliminate def&use operands. Now a register operand is EITHER a
def operand or a use operand.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30109 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAG.cpp
electionDAGISel.cpp
|
| 0c9e0ff24900aa2bcae9518f8b1bdc3fd41dc2ed |
04-Sep-2006 |
Duraid Madina <duraid@octopus.com.au> |
forgot this
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30097 91177308-0d34-0410-b5e6-96231b3b80d8
argetLowering.cpp
|
| 3f4fd0fd644faec87330ef17ebcb93acb74da9c6 |
01-Sep-2006 |
Evan Cheng <evan.cheng@apple.com> |
Allow legalizer to expand ISD::MUL using only MULHS in the rare case that is
possible and the target only supports MULHS.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30022 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| dfcfacb0cba97e1ac7e1f619b091d4383218fbd0 |
31-Aug-2006 |
Evan Cheng <evan.cheng@apple.com> |
DAG combiner fix for rotates. Previously the outer-most condition checks
for ROTL availability. This prevents it from forming ROTR for targets that
has ROTR only.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29997 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 1efba0ecb4d0b3807c48e6e0f74e3ce5c9fad809 |
29-Aug-2006 |
Evan Cheng <evan.cheng@apple.com> |
Move isCommutativeBinOp from SelectionDAG.cpp and DAGCombiner.cpp out. Make it a static method of SelectionDAG.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29951 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
electionDAG.cpp
|
| a4f0b3a084d120cfc5b5bb06f64b222f5cb72740 |
27-Aug-2006 |
Chris Lattner <sabre@nondot.org> |
s|llvm/Support/Visibility.h|llvm/Support/Compiler.h|
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29911 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
egalizeDAG.cpp
cheduleDAGList.cpp
cheduleDAGRRList.cpp
cheduleDAGSimple.cpp
electionDAGISel.cpp
|
| 694481ee01bfe507c6e37de0dc1c64cff455eefd |
27-Aug-2006 |
Evan Cheng <evan.cheng@apple.com> |
Eliminate SelectNodeTo() and getTargetNode() variants which take more than
3 SDOperand operands. They are replaced by versions which take an array
of SDOperand and the number of operands.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29905 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 95514bae7309ffacfc0a79b267159dcfde2b7720 |
26-Aug-2006 |
Evan Cheng <evan.cheng@apple.com> |
SelectNodeTo now returns a SDNode*.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29901 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| f921a518912df706a8edf1f867f52e8afc6e2b55 |
21-Aug-2006 |
Chris Lattner <sabre@nondot.org> |
Fix PR861
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29796 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 228a18e0f220fb85ee06fd5bfa29304e57047ff1 |
17-Aug-2006 |
Chris Lattner <sabre@nondot.org> |
switch the SUnit pred/succ sets from being std::sets to being smallvectors.
This reduces selectiondag time on kc++ from 5.43s to 4.98s (9%). More
significantly, this speeds up the default ppc scheduler from ~1571ms to 1063ms,
a 33% speedup.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29743 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAG.cpp
cheduleDAGList.cpp
cheduleDAGRRList.cpp
|
| be384162c68641233deba8702666af51bdfd4b83 |
17-Aug-2006 |
Chris Lattner <sabre@nondot.org> |
minor changes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29740 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
electionDAGISel.cpp
|
| f83482dcad35ac4fcb0d387d8f84794cda70f857 |
16-Aug-2006 |
Chris Lattner <sabre@nondot.org> |
Use the appropriate typedef
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29730 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 0b3e525a3a6b55b66dc5676675712b26e4c1ed9f |
15-Aug-2006 |
Chris Lattner <sabre@nondot.org> |
Start using SDVTList more consistently
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29711 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
electionDAGCSEMap.cpp
|
| 70046e920fa37989a041af663ada2b2b646e258f |
15-Aug-2006 |
Chris Lattner <sabre@nondot.org> |
add a new SDVTList type and new SelectionDAG::getVTList methods to streamline
the creation of canonical VTLists.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29709 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| f9f37fc52c444e34bad7846729ae5481a65e0a53 |
15-Aug-2006 |
Chris Lattner <sabre@nondot.org> |
eliminate use of getNode that takes vector of valuetypes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29687 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
electionDAGISel.cpp
|
| 2fa6d3b1fcadbde90eaee0e8e89aebd81630b662 |
15-Aug-2006 |
Chris Lattner <sabre@nondot.org> |
Add a new getNode() method that takes a pointer to an already-intern'd list
of value-type nodes. This avoids having to do mallocs for std::vectors of
valuetypes when a node returns more than one type.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29685 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| e51ee04c3d682b4701e4ba03233a37645206cf20 |
15-Aug-2006 |
Chris Lattner <sabre@nondot.org> |
remove SelectionDAG::InsertISelMapEntry, it is dead
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29677 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 213a16c637926bfc38ba373d3aba6778e181e3ec |
15-Aug-2006 |
Chris Lattner <sabre@nondot.org> |
Add code to resize the CSEMap hash table. This doesn't speedup codegen of
kimwitu, but seems like a good idea from a "avoid performance cliffs" standpoint :)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29675 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
electionDAGCSEMap.cpp
|
| 130fc13506b4da64981632c83734721a8b5b2d2d |
14-Aug-2006 |
Chris Lattner <sabre@nondot.org> |
Add the actual constant to the hash for ConstantPool nodes. Thanks to
Rafael Espindola for pointing this out.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29669 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
electionDAGCSEMap.cpp
|
| dd289001684a6c4fba54328255329325bb7b2ff5 |
12-Aug-2006 |
Chris Lattner <sabre@nondot.org> |
Switch to using SuperFastHash instead of adding all elements together. This
doesn't significantly improve performance but it helps a small amount.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29642 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGCSEMap.cpp
|
| 7ed9ea81f8b4ec26c27da73ea9ad0e84337a3e4a |
12-Aug-2006 |
Chris Lattner <sabre@nondot.org> |
Switch NodeID to track 32-bit chunks instead of 8-bit chunks, for a 2.5%
speedup in isel time.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29640 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGCSEMap.cpp
|
| c9f8f416800784ca6453222b307bc44ad24739b0 |
11-Aug-2006 |
Chris Lattner <sabre@nondot.org> |
Remove 8 more std::map's.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29631 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
electionDAGCSEMap.cpp
|
| 61b09412fe2c98367730c7064d56eff537b03434 |
11-Aug-2006 |
Chris Lattner <sabre@nondot.org> |
Move the BBNodes, GlobalValues, TargetGlobalValues, Constants, TargetConstants,
RegNodes, and ValueNodes maps into the CSEMap.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29626 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
electionDAGCSEMap.cpp
|
| 4a283e90af7984762eb3e984cee747d32c82e3db |
11-Aug-2006 |
Chris Lattner <sabre@nondot.org> |
eliminate the NullaryOps map, use CSEMap instead.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29621 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 3577e38c2b34c7978b8a1b6047eed3e421559d28 |
11-Aug-2006 |
Chris Lattner <sabre@nondot.org> |
change internal impl of dag combiner so that calls to CombineTo never have to
make a temporary vector.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29618 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| b9ea4a39b8192bd13d69d5e15d1e6a2290d24e80 |
11-Aug-2006 |
Chris Lattner <sabre@nondot.org> |
Change one ReplaceAllUsesWith method to take an array of operands to replace
instead of a vector of operands.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29616 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
electionDAG.cpp
|
| bd564bfc63163e31f320c3da9749db70992dc35e |
08-Aug-2006 |
Chris Lattner <sabre@nondot.org> |
Start eliminating temporary vectors used to create DAG nodes. Instead, pass
in the start of an array and a count of operands where applicable. In many
cases, the number of operands is known, so this static array can be allocated
on the stack, avoiding the heap. In many other cases, a SmallVector can be
used, which has the same benefit in the common cases.
I updated a lot of code calling getNode that takes a vector, but ran out of
time. The rest of the code should be updated, and these methods should be
removed.
We should also do the same thing to eliminate the methods that take a
vector of MVT::ValueTypes.
It would be extra nice to convert the dagiselemitter to avoid creating vectors
for operands when calling getTargetNode.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29566 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
egalizeDAG.cpp
electionDAG.cpp
electionDAGISel.cpp
|
| f06f35e30b4c4d7db304f717a3d4dc6595fbd078 |
08-Aug-2006 |
Chris Lattner <sabre@nondot.org> |
Eliminate some malloc traffic by allocating vectors on the stack. Change some
method that took std::vector<SDOperand> to take a pointer to a first operand
and #operands.
This speeds up isel on kc++ by about 3%.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29561 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
electionDAG.cpp
|
| a5682853b9921bbb0dd2ee175c9bd44142d4819e |
08-Aug-2006 |
Chris Lattner <sabre@nondot.org> |
Revamp the "CSEMap" datastructure used in the SelectionDAG class. This
eliminates a bunch of std::map's in the SelectionDAG, replacing them with a
home-grown hashtable.
This is still a work in progress: not all the maps have been moved over and the
hashtable never resizes. That said, this still speeds up llc 20% on kimwitu++
with -fast -regalloc=local using a release build.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29550 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
electionDAGCSEMap.cpp
|
| 99157a00a6cadfd733cf02b947e2b7c7ed27246b |
08-Aug-2006 |
Evan Cheng <evan.cheng@apple.com> |
Clear TopOrder before assigning topological order. Some clean ups.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29546 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 3b97acdbdb179cf592f62a3491d82f5e234a863c |
08-Aug-2006 |
Evan Cheng <evan.cheng@apple.com> |
Reverse the FlaggedNodes after scanning up for flagged preds or else the order would be reversed.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29545 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAG.cpp
|
| 190a418bf6b49a4ef1c1980229a2f0d516e8a2cd |
04-Aug-2006 |
Chris Lattner <sabre@nondot.org> |
Make SelectionDAG::RemoveDeadNodes iterative instead of recursive, which
also make it simpler.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29524 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
electionDAG.cpp
|
| f492391de03dc1f1fe539d97271bdb05f59dbdbc |
03-Aug-2006 |
Jim Laskey <jlaskey@mac.com> |
Copy the liveins for the first block. PR859
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29511 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGSimple.cpp
|
| 3700f90c19f51deae00f85b80d31e1f7fbda1f99 |
03-Aug-2006 |
Chris Lattner <sabre@nondot.org> |
Work around a GCC 3.3.5 bug noticed by a user.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29490 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| c384d6c3989cf2055b577754fc61a4673af30618 |
03-Aug-2006 |
Evan Cheng <evan.cheng@apple.com> |
- Change AssignTopologicalOrder to return vector of SDNode* by reference.
- Tweak implementation to avoid using std::map.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29479 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| eb577ba3b815a1fa4627b060dd2345d17abf672d |
02-Aug-2006 |
Jim Laskey <jlaskey@mac.com> |
Final polish on machine pass registries.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29471 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGList.cpp
cheduleDAGRRList.cpp
cheduleDAGSimple.cpp
electionDAGISel.cpp
|
| 9373beba6010dd34316a801c3a9b37ab9e048031 |
01-Aug-2006 |
Jim Laskey <jlaskey@mac.com> |
Now that the ISel is available, it's possible to create a default instruction
scheduler creator.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29452 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 9ff542f2cce5bf7bf3cf9f692cf3ec0690ad2b3b |
01-Aug-2006 |
Jim Laskey <jlaskey@mac.com> |
1. Change use of "Cache" to "Default".
2. Added argument to instruction scheduler creators so the creators can do
special things.
3. Repaired target hazard code.
4. Misc.
More to follow.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29450 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGList.cpp
cheduleDAGRRList.cpp
cheduleDAGSimple.cpp
electionDAGISel.cpp
|
| 13ec702c430b91ee49b9e6d9581cd95412f216c8 |
01-Aug-2006 |
Jim Laskey <jlaskey@mac.com> |
Introducing plugable register allocators and instruction schedulers.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29434 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGList.cpp
cheduleDAGRRList.cpp
cheduleDAGSimple.cpp
electionDAGISel.cpp
|
| e6f35d8a5cc92d776cf460200e2b815e8c301b14 |
01-Aug-2006 |
Evan Cheng <evan.cheng@apple.com> |
Added AssignTopologicalOrder() to assign each node an unique id based on their topological order.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29431 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 8825a485e2e99216adc0c469a7c43895cd4eae40 |
01-Aug-2006 |
Evan Cheng <evan.cheng@apple.com> |
PIC jump table entries are always 32-bit even in 64-bit mode.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29422 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 2641cad180e94c0d26630d4ed455352f19be3d3e |
28-Jul-2006 |
Evan Cheng <evan.cheng@apple.com> |
Remove InFlightSet hack. No longer needed.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29373 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 4d9bbdc4408cc871d229677313cc4887862719d7 |
27-Jul-2006 |
Nate Begeman <natebegeman@mac.com> |
Code cleanups, per review
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29347 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 7c16d776cb827922dd0f8f0a88c5b65a90810c0b |
27-Jul-2006 |
Evan Cheng <evan.cheng@apple.com> |
AssignNodeIds should return unsigned.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29343 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 091cba1b9132759cc4ef0e9e528f244c2024c445 |
27-Jul-2006 |
Evan Cheng <evan.cheng@apple.com> |
AssignNodeIds assign each node in the DAG an unique id.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29337 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 2f1ae88445c696a9b9d61e14747ba721190cdc99 |
27-Jul-2006 |
Nate Begeman <natebegeman@mac.com> |
Support jump tables when in PIC relocation model
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29318 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| c9cf4f1a7573ac7e379efd6ad15d7bd0a84a097c |
27-Jul-2006 |
Chris Lattner <sabre@nondot.org> |
Fix a case where LegalizeAllNodesNotLeadingTo could take exponential time.
This manifested itself as really long time to compile
Regression/CodeGen/Generic/2003-05-28-ManyArgs.ll on ppc.
This is PR847.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29313 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 7107c3badfe78ec89dcab6c02cf1b1bcaccc42a8 |
26-Jul-2006 |
Reid Spencer <rspencer@reidspencer.com> |
For PR780:
1. Move IncludeFile.h to System library
2. Move IncludeFile.cpp to System library
3. #1 and #2 required to prevent cyclic library dependencies for libSystem
4. Convert all existing uses of Support/IncludeFile.h to System/IncludeFile.h
5. Add IncludeFile support to various lib/System classes.
6. Add new lib/System classes to LinkAllVMCore.h
All this in an attempt to pull in lib/System to what's required for VMCore
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29287 91177308-0d34-0410-b5e6-96231b3b80d8
akefile
|
| 9160a6a18fdd091717cc3375bbac604d1949a65c |
25-Jul-2006 |
Reid Spencer <rspencer@reidspencer.com> |
Initialize some variables the compiler warns about.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29277 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 60f09928a0d22d5927ff0a40fe9163cf1ba1014a |
21-Jul-2006 |
Jim Laskey <jlaskey@mac.com> |
Use an enumeration to eliminate data relocations.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29249 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAG.cpp
cheduleDAGRRList.cpp
|
| 917ec983df36c642492cdc786dee531fbdd6a775 |
21-Jul-2006 |
Evan Cheng <evan.cheng@apple.com> |
If a shuffle is a splat, check if the argument is a build_vector with all elements being the same. If so, return the argument.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29242 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 02b04b4d347b537becdf8453c511bf058fa4389a |
21-Jul-2006 |
Chris Lattner <sabre@nondot.org> |
Build more debugger/selectiondag libraries as archives instead of .o files.
This works around bugs in some versions of the cygwin linker.
Patch contributed by Anton Korobeynikov.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29239 91177308-0d34-0410-b5e6-96231b3b80d8
akefile
|
| e7bec0dbb50235ec60f78f1f7b3f6d2f6bb5cd91 |
21-Jul-2006 |
Evan Cheng <evan.cheng@apple.com> |
If a shuffle is unary, i.e. one of the vector argument is not needed, turn the
operand into a undef and adjust mask accordingly.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29232 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| a15cf7045efc688b813f4bc7cbc9f17c27114c04 |
20-Jul-2006 |
Chris Lattner <sabre@nondot.org> |
Mems can be in the output list also. This is the second half of a fix for
PR833
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29224 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| ae6153f943970f3899ace54287ef4421879813e6 |
20-Jul-2006 |
Andrew Lenharth <andrewl@lenharth.org> |
80 cols
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29221 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| ed41f1bb1981a98eea63f00c5988cf62bbdd7c59 |
20-Jul-2006 |
Andrew Lenharth <andrewl@lenharth.org> |
Reduce number of exported symbols
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29220 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
cheduleDAGList.cpp
|
| 917d2c9dc2cc8879ed97533e7f75f3f92fa26b61 |
19-Jul-2006 |
Chris Lattner <sabre@nondot.org> |
Add an out-of-line virtual method for the sdnode class to give it a home.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29192 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 16d42c6ac65e19aedfb4853724416cefda27134e |
11-Jul-2006 |
Jim Laskey <jlaskey@mac.com> |
It was pointed out that DEBUG() is only available with -debug.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29106 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAG.cpp
|
| e37fe9b3a1cadceb42ac27fa0718f5a10ea2f0e6 |
11-Jul-2006 |
Jim Laskey <jlaskey@mac.com> |
Ensure that dump calls that are associated with asserts are removed from
non-debug build.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29105 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
cheduleDAG.cpp
|
| 25a022c7801b047b31d7610386e8a9ddca878cb1 |
11-Jul-2006 |
Chris Lattner <sabre@nondot.org> |
Fix CodeGen/Alpha/2006-07-03-ASMFormalLowering.ll and PR818.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29099 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 42f75a926ab4b55f97da010f2ac05d2bc97a6dbf |
07-Jul-2006 |
Evan Cheng <evan.cheng@apple.com> |
Fix a typo that causes 2006-07-07-ComputeMaskedBits.ll to fail.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29072 91177308-0d34-0410-b5e6-96231b3b80d8
argetLowering.cpp
|
| 322812e603705e1c2037313633e72f689524b163 |
30-Jun-2006 |
Evan Cheng <evan.cheng@apple.com> |
Ugly hack! Add helper functions InsertInFlightSetEntry and
RemoveInFlightSetEntry. They are used in place of direct set operators to
reduce instruction selection function stack size.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28987 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 9525528a7dc5462b6374d38c81ba5c07b11741fe |
29-Jun-2006 |
Chris Lattner <sabre@nondot.org> |
Use hidden visibility to make symbols in an anonymous namespace get
dropped. This shrinks libllvmgcc.dylib another 67K
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28975 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGRRList.cpp
electionDAGISel.cpp
|
| f8c68f694c25b1ae8c0e5adb2a19432cb405d232 |
29-Jun-2006 |
Chris Lattner <sabre@nondot.org> |
Shave another 27K off libllvmgcc.dylib with visibility hidden
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28973 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGList.cpp
cheduleDAGRRList.cpp
cheduleDAGSimple.cpp
|
| 360e8200ec544a3c877ff74b48f445140ac9bbd6 |
28-Jun-2006 |
Chris Lattner <sabre@nondot.org> |
Mark these two classes as hidden, shrinking libllbmgcc.dylib by 25K
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28970 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
egalizeDAG.cpp
|
| 883a52de66da854de158b602952d8242acddcb48 |
28-Jun-2006 |
Chris Lattner <sabre@nondot.org> |
Fix CodeGen/Generic/2006-06-28-SimplifySetCCCrash.ll
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28965 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 9d5b532de9bdca37810a59a93a69128441b02c55 |
27-Jun-2006 |
Reid Spencer <rspencer@reidspencer.com> |
For PR801:
Refactor the Graph writing code to use a common implementation which is
now in lib/Support/GraphWriter.cpp. This completes the PR.
Patch by Anton Korobeynikov. Thanks, Anton!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28925 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGPrinter.cpp
|
| a844126c43976387a66dafbe5137a762169f1f34 |
15-Jun-2006 |
Evan Cheng <evan.cheng@apple.com> |
Consistency. EXTRACT_ELEMENT index operand should have ptr type.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28795 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 8d3af5e7d082dbd029c3987ceadbdcf9e49af6d7 |
15-Jun-2006 |
Evan Cheng <evan.cheng@apple.com> |
Instructions with variable operands (variable_ops) can have a number required
operands. e.g.
def CALL32r : I<0xFF, MRM2r, (ops GR32:$dst, variable_ops),
"call {*}$dst", [(X86call GR32:$dst)]>;
TableGen should emit operand informations for the "required" operands.
Added a target instruction info flag M_VARIABLE_OPS to indicate the target
instruction may have more operands in addition to the minimum required
operands.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28791 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAG.cpp
|
| c4fa603347e798c94f54430227df8265736ef183 |
13-Jun-2006 |
Chris Lattner <sabre@nondot.org> |
Port some bugfixes in shift handling from SimplifyDemandedBits over to
ComputeMaskedBits. DemandedMasks and KnownZero/One masks should never have
bits set out of the range of the base datatype.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28768 91177308-0d34-0410-b5e6-96231b3b80d8
argetLowering.cpp
|
| 9bfa2dcff6c341814c18703d6760c3645bcc14e9 |
13-Jun-2006 |
Jim Laskey <jlaskey@mac.com> |
TargetLowering::ComputeMaskedBits was not clearing reciprocal bits on shifts.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28765 91177308-0d34-0410-b5e6-96231b3b80d8
argetLowering.cpp
|
| a3bb86dd6b6220c69d9d7e4e11aea42fa1ec2bc5 |
12-Jun-2006 |
Chris Lattner <sabre@nondot.org> |
Make sure to update the CFG correctly if a switch only has a default dest.
This fixes CodeGen/Generic/2006-06-12-LowerSwitchCrash.ll
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28755 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 232c910b8acd81cbf47fb18595ce557789c2217c |
12-Jun-2006 |
Andrew Lenharth <andrewl@lenharth.org> |
Start on my todo list
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28752 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
argetLowering.cpp
|
| 0c48fd4610cc7a90a998428c93a0c68246e79e57 |
08-Jun-2006 |
Chris Lattner <sabre@nondot.org> |
Fix X86/inline-asm.ll:test2, a case where an input value was implicitly
truncated.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28733 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| cf752aa502a2ce6eaca9db4640171143c49e1733 |
08-Jun-2006 |
Chris Lattner <sabre@nondot.org> |
Fix Regression/CodeGen/X86/inline-asm.ll, a case where inline asm causes
implement extension of a register.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28731 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| fcadfbbdef6c87cf3952142e396e5872e30da8a3 |
05-Jun-2006 |
Reid Spencer <rspencer@reidspencer.com> |
For PR798:
Provide GraphViz support for MingW32. Patch provided by Anton Korobeynikov
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28688 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGPrinter.cpp
|
| 18c8b49e7d3c94d7f84a4205a19f8761722fc4e5 |
01-Jun-2006 |
Reid Spencer <rspencer@reidspencer.com> |
Use archive libraries instead of object files for VMCore, BCReader,
BCWriter, and bzip2 libraries. Adjust the various makefiles to accommodate
these changes. This was done to speed up link times.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28610 91177308-0d34-0410-b5e6-96231b3b80d8
akefile
|
| 4c6f2f9e92eae3e676ee09133e9666567782faa3 |
31-May-2006 |
Evan Cheng <evan.cheng@apple.com> |
commuteInstruction() does not always create a new MI!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28592 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAG.cpp
|
| 16eee25c660010e5fc632b3707037b3baaa32909 |
31-May-2006 |
Evan Cheng <evan.cheng@apple.com> |
Eliminate a memory leak.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28585 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAG.cpp
|
| 7b336a87466da67cbd528d124e38c12390707a24 |
31-May-2006 |
Evan Cheng <evan.cheng@apple.com> |
visitVBinOp: Can't fold divide by zero!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28584 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 6b8e5a93183ab08811b7b71887d8c7d774666210 |
30-May-2006 |
Evan Cheng <evan.cheng@apple.com> |
Make sure the register pressure reduction schedulers work for non-uniform
latency targets, e.g. PPC32.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28561 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGRRList.cpp
|
| 19564e3d83c9c3cdf908005c91bad13d26b5cedf |
30-May-2006 |
Evan Cheng <evan.cheng@apple.com> |
When a priority_queue is empty, the behavior of top() operator is
non-deterministic. Returns NULL when it's empty!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28560 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGList.cpp
|
| 729c6d1da87ad5b3bf849c4102b255657f67276c |
27-May-2006 |
Chris Lattner <sabre@nondot.org> |
Fix a nasty dag combiner bug that caused nondeterminstic crashes (MY FAVORITE!):
SimplifySelectOps would eliminate a Select, delete it, then return true.
The clients would see that it did something and return null.
The top level would see a null return, and decide that nothing happened,
proceeding to process the node in other ways: boom.
The fix is simple: clients of SimplifySelectOps should return the select
node itself.
In order to catch really obnoxious boogs like this in the future, add an
assert that nodes are not deleted. We do this by checking for a sentry node
type that the SDNode dtor sets when a node is destroyed.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28514 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| d61c4820c9e39500a67bec4d6cfe521a833afdcc |
27-May-2006 |
Evan Cheng <evan.cheng@apple.com> |
Make CALL node consistent with RET node. Signness of value has type MVT::i32
instead of MVT::i1. Either is fine except MVT::i32 is probably a legal type
for most (if not all) platforms while MVT::i1 is not.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28511 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 8e7d056bc5c0688501f6721994c8f4074d699c69 |
27-May-2006 |
Evan Cheng <evan.cheng@apple.com> |
Change RET node to include signness information of the return values. e.g.
RET chain, value1, sign1, value2, sign2
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28509 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
electionDAGISel.cpp
|
| 3b788238683396671e63cad36298d26eb4806dbe |
25-May-2006 |
Evan Cheng <evan.cheng@apple.com> |
Turn on -sched-commute-nodes by default.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28465 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGRRList.cpp
|
| f6d62c2e2a53e3ebf2e25f0891e5f1a0b772b368 |
25-May-2006 |
Evan Cheng <evan.cheng@apple.com> |
CALL node change: now including signness of every argument.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28461 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| d74ea2bbd8bb630331f35ead42d385249bd42af8 |
24-May-2006 |
Chris Lattner <sabre@nondot.org> |
Patches to make the LLVM sources more -pedantic clean. Patch provided
by Anton Korobeynikov! This is a step towards closing PR786.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28447 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 80235d508e5f7a9603ef43ba6625984173ff0323 |
23-May-2006 |
Evan Cheng <evan.cheng@apple.com> |
-enable-unsafe-fp-math implies -enable-finite-only-fp-math
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28437 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 124729155d860a0850eb4ef2a7cea4145e13a057 |
23-May-2006 |
Vladimir Prus <ghost@cs.msu.su> |
Fix missing include
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28435 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| f6f9581983c85f8b4d2775b22870c1a4516fabdf |
23-May-2006 |
Evan Cheng <evan.cheng@apple.com> |
Incorrect SETCC CondCode used for FP comparisons.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28433 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 21d03f2de0087d60dbf575d95924404a97852879 |
18-May-2006 |
Evan Cheng <evan.cheng@apple.com> |
lib/Target/Target.td
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28386 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAG.cpp
|
| d202ca4d988b5ee3f30656a7e82443db4752dd91 |
17-May-2006 |
Chris Lattner <sabre@nondot.org> |
Fix the result of the call to use a correct vbitconvert. There is no need to
use getPackedTypeBreakdown at all here.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28365 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 1b8daae71b0118b489cbecf2f1b8ed86b6bc8e57 |
17-May-2006 |
Chris Lattner <sabre@nondot.org> |
Correct a previous patch which broke CodeGen/PowerPC/vec_call.ll
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28364 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 7e399c14abb27f9d1291442ee7f9251fa827f2e9 |
17-May-2006 |
Evan Cheng <evan.cheng@apple.com> |
Another typo. Pointed out by Nate Begeman.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28353 91177308-0d34-0410-b5e6-96231b3b80d8
argetLowering.cpp
|
| 6c43f35d740ccd1d746be90d98ee11f8829fe543 |
17-May-2006 |
Evan Cheng <evan.cheng@apple.com> |
Fixed a LowerCallTo and LowerArguments bug. They were introducing illegal
VBIT_VECTOR nodes. There were some confusion about the semantics of
getPackedTypeBreakdown(). e.g. for <4 x f32> it returns 1 and v4f32, not 4,
and f32.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28352 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| e9b3da17cdc5b54bb1194043f27d4d2914d77097 |
17-May-2006 |
Evan Cheng <evan.cheng@apple.com> |
Fix an obvious bug in getPackedTypeBreakdown. Return 1 if type is legal.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28351 91177308-0d34-0410-b5e6-96231b3b80d8
argetLowering.cpp
|
| c5d7d7c715f7b7a4eeea1ceaafefc3d1d6df2add |
17-May-2006 |
Chris Lattner <sabre@nondot.org> |
When we legalize target nodes, do not use getNode to create a new node,
use UpdateNodeOperands to just update the operands! This is important because
getNode will allocate a new node if the node returns a flag and this breaks
assumptions in the legalizer that you can legalize some things multiple times
and get exactly the same results.
This latent bug was exposed by my ppc patch last night, and this fixes
gsm/toast.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28348 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| b248e16afd105fd8c01e08d8bf997b08ff08d127 |
17-May-2006 |
Chris Lattner <sabre@nondot.org> |
Add an assertion, avoid some unneeded work for each call. No functionality
change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28347 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| da098e7d1017e9435617d4c3de58ff72ae01ca22 |
17-May-2006 |
Chris Lattner <sabre@nondot.org> |
Add support for calls that pass and return legal vectors.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28340 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| f4ec817299a4187044a6162c2f520772b3ad69a0 |
17-May-2006 |
Chris Lattner <sabre@nondot.org> |
Add a new ISD::CALL node, make the default impl of TargetLowering::LowerCallTo
produce it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28338 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
electionDAG.cpp
electionDAGISel.cpp
|
| 3e348494bbe72609893957510d56fb0266531306 |
16-May-2006 |
Andrew Lenharth <andrewl@lenharth.org> |
this should be 128 I think
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28330 91177308-0d34-0410-b5e6-96231b3b80d8
argetLowering.cpp
|
| dae9cbe8d4fcd8f182a99403d67cae906bdb3175 |
16-May-2006 |
Andrew Lenharth <andrewl@lenharth.org> |
Move this code to a common place
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28329 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
argetLowering.cpp
|
| 8c0c10c2b9fef21dcbabac81fffa32f4407a0b7f |
16-May-2006 |
Chris Lattner <sabre@nondot.org> |
Add a chain to FORMAL_ARGUMENTS. This is a minimal port of the X86 backend,
it doesn't currently use/maintain the chain properly. Also, make the
X86ISelLowering.cpp file 80-col clean.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28320 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 966454129dc62260df1f438f0243f6877dcd185c |
16-May-2006 |
Chris Lattner <sabre@nondot.org> |
Move function-live-in-handling code from the sdisel code to the scheduler.
This code should be emitted after legalize, so it can't be in sdisel.
Note that the EmitFunctionEntryCode hook should be updated to operate on the
DAG. The X86 backend is the only one currently using this hook.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28315 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAG.cpp
electionDAGISel.cpp
|
| e2e41730ccfa9bebfabbd17ab3454aa2bb620b2a |
16-May-2006 |
Chris Lattner <sabre@nondot.org> |
Legalize FORMAL_ARGUMENTS nodes correctly, we don't want to legalize them once
for each argument.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28313 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 8820ad5154eae194a685a8735bd5999221fdffd0 |
13-May-2006 |
Evan Cheng <evan.cheng@apple.com> |
Fixing 2006-05-01-SchedCausingSpills.ll; some clean up
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28279 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAG.cpp
cheduleDAGRRList.cpp
|
| ee00a1d12c631eb7360ddd4809bdde72331b2736 |
13-May-2006 |
Evan Cheng <evan.cheng@apple.com> |
Revert an un-intended change
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28278 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| a2d079a7763d01922e806e7874553da2ae4006af |
13-May-2006 |
Chris Lattner <sabre@nondot.org> |
Merge identical code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28274 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| b5d9319bc585d872b59967eec71ada21a3bbd497 |
12-May-2006 |
Chris Lattner <sabre@nondot.org> |
Remove dead vars
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28255 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| f1343c1b7929930c276939ac571cfbfadc283c4e |
12-May-2006 |
Chris Lattner <sabre@nondot.org> |
remove dead vars
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28254 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 5eed34d208159e02949097ec91d98d5d9eb30e27 |
12-May-2006 |
Chris Lattner <sabre@nondot.org> |
Comment out dead variables
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28252 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| e41102bb610aeebe73eeec6a4afe62301de10042 |
12-May-2006 |
Chris Lattner <sabre@nondot.org> |
Compile:
%tmp152 = setgt uint %tmp144, %tmp149 ; <bool> [#uses=1]
%tmp159 = setlt uint %tmp144, %tmp149 ; <bool> [#uses=1]
%bothcond2 = or bool %tmp152, %tmp159 ; <bool> [#uses=1]
To setne, not setune, which causes an assertion fault.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28244 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 07000c6f01d8f57170f2d4c77a86d934bdc5c696 |
12-May-2006 |
Owen Anderson <resistor@mac.com> |
Refactor a bunch of includes so that TargetMachine.h doesn't have to include
TargetData.h. This should make recompiles a bit faster with my current
TargetData tinkering.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28238 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAG.cpp
cheduleDAGList.cpp
cheduleDAGRRList.cpp
cheduleDAGSimple.cpp
argetLowering.cpp
|
| 626da3d9aeb5e18a47a7516cbeae38c9324636e5 |
12-May-2006 |
Evan Cheng <evan.cheng@apple.com> |
Duh. That could take a long time.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28235 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAG.cpp
|
| 21a57dc75172aa964c51d386b2cdd0ad3be7792f |
12-May-2006 |
Chris Lattner <sabre@nondot.org> |
Two simplifications for token factor nodes: simplify tf(x,x) -> x.
simplify tf(x,y,y,z) -> tf(x,y,z).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28233 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 13d41b9d721f98372b97d2ec119e6c91932ab0ae |
12-May-2006 |
Evan Cheng <evan.cheng@apple.com> |
Add capability to scheduler to commute nodes for profit.
If a two-address code whose first operand has uses below, it should be commuted
when possible.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28230 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAG.cpp
cheduleDAGRRList.cpp
|
| e165a78551a91d8420cd8f074d97701e8788f8b5 |
12-May-2006 |
Evan Cheng <evan.cheng@apple.com> |
Refactor scheduler code. Move register-reduction list scheduler to a
separate file. Added an initial implementation of top-down register pressure
reduction list scheduler.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28226 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAG.cpp
cheduleDAGList.cpp
cheduleDAGRRList.cpp
electionDAGISel.cpp
|
| 90db0358bbe4479099adfe41589f1787e3dc1545 |
10-May-2006 |
Evan Cheng <evan.cheng@apple.com> |
Templatify RegReductionPriorityQueue
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28212 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGList.cpp
|
| ec57fd91af6be26a29535e7dd3dcb63beb71d898 |
09-May-2006 |
Nate Begeman <natebegeman@mac.com> |
Fix PR773
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28207 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| b63b0679251834601633ed91b5567801a89d77fe |
09-May-2006 |
Evan Cheng <evan.cheng@apple.com> |
Add pseudo dependency to force a def&use operand to be scheduled last (unless
the distance between the def and another use is much longer). This is under
option control for now "-sched-lower-defnuse".
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28201 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGList.cpp
|
| 60e8c71c9f63959890ecabb70c6e2cde2f947224 |
09-May-2006 |
Evan Cheng <evan.cheng@apple.com> |
Debugging info
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28200 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 4b37e87ab9e7bfad8b87115278ca589f8d49ba26 |
08-May-2006 |
Chris Lattner <sabre@nondot.org> |
Make the case I just checked in stronger. Now we compile this:
short test2(short X, short x) {
int Y = (short)(X+x);
return Y >> 1;
}
to:
_test2:
add r2, r3, r4
extsh r2, r2
srawi r3, r2, 1
blr
instead of:
_test2:
add r2, r3, r4
extsh r2, r2
srwi r2, r2, 1
extsh r3, r2
blr
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28175 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| eaeda56649052fc75e527b37089d6d67c4a5976d |
08-May-2006 |
Chris Lattner <sabre@nondot.org> |
Implement and_sext.ll:test3, generating:
_test4:
srawi r3, r3, 16
blr
instead of:
_test4:
srwi r2, r3, 16
extsh r3, r2
blr
for:
short test4(unsigned X) {
return (X >> 16);
}
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28174 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| a850446a0be73ceb9ac1b312bffb1e06d7e40d99 |
08-May-2006 |
Chris Lattner <sabre@nondot.org> |
Compile this:
short test4(unsigned X) {
return (X >> 16);
}
to:
_test4:
movl 4(%esp), %eax
sarl $16, %eax
ret
instead of:
_test4:
movl $-65536, %eax
andl 4(%esp), %eax
sarl $16, %eax
ret
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28171 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 2cfd6746ae4ab9dbfc25b025bc3e8bccddc47475 |
08-May-2006 |
Chris Lattner <sabre@nondot.org> |
Fold shifts with undef operands.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28167 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 1b7371331fef3db77999b9c4ca62c2ddbaf1d804 |
08-May-2006 |
Chris Lattner <sabre@nondot.org> |
When tracking demanded bits, if any bits from the sext of an SRA are demanded,
then so is the input sign bit. This fixes mediabench/g721 on X86.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28166 91177308-0d34-0410-b5e6-96231b3b80d8
argetLowering.cpp
|
| 17c275ff2ce9e94d647e781f6dac6320d088f899 |
08-May-2006 |
Nate Begeman <natebegeman@mac.com> |
Make emission of jump tables a bit less conservative; they are now required
to be only 31.25% dense, rather than 75% dense.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28165 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 5c742681edc9d0e8be16f7518af5429d2b643078 |
08-May-2006 |
Nate Begeman <natebegeman@mac.com> |
Fix PR772
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28161 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 822db93e57f9b8800268e8ba7b2cbc1234bc265c |
07-May-2006 |
Chris Lattner <sabre@nondot.org> |
Use ComputeMaskedBits to determine # sign bits as a fallback. This allows us
to handle all kinds of stuff, including silly things like:
sextinreg(setcc,i16) -> setcc.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28155 91177308-0d34-0410-b5e6-96231b3b80d8
argetLowering.cpp
|
| e60351bb72938117a0a0dd6fe2844381e9ec4ca9 |
07-May-2006 |
Chris Lattner <sabre@nondot.org> |
Add some more sign propagation cases
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28154 91177308-0d34-0410-b5e6-96231b3b80d8
argetLowering.cpp
|
| 310b578023bc6c91f5961582ec8de49c9268f711 |
07-May-2006 |
Chris Lattner <sabre@nondot.org> |
Simplify some code, add a couple minor missed folds
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28152 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| b9ebacdb4dccd0048b7fc8bcd2559d17e5293d38 |
07-May-2006 |
Chris Lattner <sabre@nondot.org> |
constant fold sign_extend_inreg
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28151 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 541a24f7af685610838b5a89b2feffc2285937db |
07-May-2006 |
Chris Lattner <sabre@nondot.org> |
remove cases handled elsewhere
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28150 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| d6f7fe76a63ae8c3eff0699b3214278cae30e4b6 |
07-May-2006 |
Chris Lattner <sabre@nondot.org> |
Add some more simple sign bit propagation cases.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28149 91177308-0d34-0410-b5e6-96231b3b80d8
argetLowering.cpp
|
| ee4ea923589a2556ff85edbaf444d9575050613a |
06-May-2006 |
Chris Lattner <sabre@nondot.org> |
Use the new TargetLowering::ComputeNumSignBits method to eliminate
sign_extend_inreg operations. Though ComputeNumSignBits is still rudimentary,
this is enough to compile this:
short test(short X, short x) {
int Y = X+x;
return (Y >> 1);
}
short test2(short X, short x) {
int Y = (short)(X+x);
return Y >> 1;
}
into:
_test:
add r2, r3, r4
srawi r3, r2, 1
blr
_test2:
add r2, r3, r4
extsh r2, r2
srawi r3, r2, 1
blr
instead of:
_test:
add r2, r3, r4
srawi r2, r2, 1
extsh r3, r2
blr
_test2:
add r2, r3, r4
extsh r2, r2
srawi r2, r2, 1
extsh r3, r2
blr
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28146 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 5c3e21d68726dbfc313d8af3d320b0a6b3eeac36 |
06-May-2006 |
Chris Lattner <sabre@nondot.org> |
Add some really really simple code for computing sign-bit propagation.
This will certainly be enhanced in the future.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28145 91177308-0d34-0410-b5e6-96231b3b80d8
argetLowering.cpp
|
| f0df8824eb2bf8a5fb91ce6fd1db590caf34f994 |
06-May-2006 |
Chris Lattner <sabre@nondot.org> |
When inserting casts, be careful of where we put them. We cannot insert
a cast immediately before a PHI node.
This fixes Regression/CodeGen/Generic/2006-05-06-GEP-Cast-Sink-Crash.ll
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28143 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| c93dfda9056a83a81b07ad25ed567cc303893990 |
06-May-2006 |
Chris Lattner <sabre@nondot.org> |
Fold (trunc (srl x, c)) -> (srl (trunc x), c)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28138 91177308-0d34-0410-b5e6-96231b3b80d8
argetLowering.cpp
|
| b72773bb88859633c62bc4938d05aafedb1442f1 |
06-May-2006 |
Chris Lattner <sabre@nondot.org> |
Fold trunc(any_ext). This gives stuff like:
27,28c27
< movzwl %di, %edi
< movl %edi, %ebx
---
> movw %di, %bx
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28137 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 06afe070371c5bdcdc76d90d9e13f8532d9f95aa |
06-May-2006 |
Chris Lattner <sabre@nondot.org> |
Shrink shifts when possible.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28136 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| fe8babf689c624c53d03f5629324b049b5327a6e |
06-May-2006 |
Chris Lattner <sabre@nondot.org> |
Implement ComputeMaskedBits/SimplifyDemandedBits for ISD::TRUNCATE
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28135 91177308-0d34-0410-b5e6-96231b3b80d8
argetLowering.cpp
|
| e564dbb51ca1ad9ff6d88ae6120782a48bd040c2 |
05-May-2006 |
Chris Lattner <sabre@nondot.org> |
Fold (fpext (load x)) -> (extload x)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28130 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 903236468c3ebb3f9ae8f51b6f2e68f10c7e1d3a |
05-May-2006 |
Chris Lattner <sabre@nondot.org> |
More aggressively sink GEP offsets into loops. For example, before we
generated:
movl 8(%esp), %eax
movl %eax, %edx
addl $4316, %edx
cmpb $1, %cl
ja LBB1_2 #cond_false
LBB1_1: #cond_true
movl L_QuantizationTables720$non_lazy_ptr, %ecx
movl %ecx, (%edx)
movl L_QNOtoQuantTableShift720$non_lazy_ptr, %edx
movl %edx, 4460(%eax)
ret
...
Now we generate:
movl 8(%esp), %eax
cmpb $1, %cl
ja LBB1_2 #cond_false
LBB1_1: #cond_true
movl L_QuantizationTables720$non_lazy_ptr, %ecx
movl %ecx, 4316(%eax)
movl L_QNOtoQuantTableShift720$non_lazy_ptr, %ecx
movl %ecx, 4460(%eax)
ret
... which uses one fewer register.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28129 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 0d8dae749c116a4168c3b4312f1bc0352d22c9db |
05-May-2006 |
Chris Lattner <sabre@nondot.org> |
Fold some common code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28124 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 540121f1ec6495445aab87ff464b170c0b762d05 |
05-May-2006 |
Chris Lattner <sabre@nondot.org> |
Implement:
// fold (and (sext x), (sext y)) -> (sext (and x, y))
// fold (or (sext x), (sext y)) -> (sext (or x, y))
// fold (xor (sext x), (sext y)) -> (sext (xor x, y))
// fold (and (aext x), (aext y)) -> (aext (and x, y))
// fold (or (aext x), (aext y)) -> (aext (or x, y))
// fold (xor (aext x), (aext y)) -> (aext (xor x, y))
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28123 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| a3dc3f692c2967dc9cfac6344c7216f62098feda |
05-May-2006 |
Chris Lattner <sabre@nondot.org> |
Pull and through and/or/xor. This compiles some bitfield code to:
mov EAX, DWORD PTR [ESP + 4]
mov ECX, DWORD PTR [EAX]
mov EDX, ECX
add EDX, EDX
or EDX, ECX
and EDX, -2147483648
and ECX, 2147483647
or EDX, ECX
mov DWORD PTR [EAX], EDX
ret
instead of:
sub ESP, 4
mov DWORD PTR [ESP], ESI
mov EAX, DWORD PTR [ESP + 8]
mov ECX, DWORD PTR [EAX]
mov EDX, ECX
add EDX, EDX
mov ESI, ECX
and ESI, -2147483648
and EDX, -2147483648
or EDX, ESI
and ECX, 2147483647
or EDX, ECX
mov DWORD PTR [EAX], EDX
mov ESI, DWORD PTR [ESP]
add ESP, 4
ret
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28122 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 5ffc066912ce4f5c32741c5e56dc28a8fe1dc050 |
05-May-2006 |
Chris Lattner <sabre@nondot.org> |
Implement a variety of simplifications for ANY_EXTEND.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28121 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 35e5c14b80a732c7d061a13a3717362e936852b1 |
05-May-2006 |
Chris Lattner <sabre@nondot.org> |
Factor some code, add these transformations:
// fold (and (trunc x), (trunc y)) -> (trunc (and x, y))
// fold (or (trunc x), (trunc y)) -> (trunc (or x, y))
// fold (xor (trunc x), (trunc y)) -> (trunc (xor x, y))
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28120 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 4b75e73791f32f73ca1fc91f073a5126e6700b7a |
05-May-2006 |
Jeff Cohen <jeffc@jolt-lang.org> |
Fix VC++ compilation error.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28117 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGList.cpp
|
| 7e598096ea8db3f19f4ec8f4cb407aea996bd7c2 |
05-May-2006 |
Chris Lattner <sabre@nondot.org> |
Sink noop copies into the basic block that uses them. This reduces the number
of cross-block live ranges, and allows the bb-at-a-time selector to always
coallesce these away, at isel time.
This reduces the load on the coallescer and register allocator. For example
on a codec on X86, we went from:
1643 asm-printer - Number of machine instrs printed
419 liveintervals - Number of loads/stores folded into instructions
1144 liveintervals - Number of identity moves eliminated after coalescing
1022 liveintervals - Number of interval joins performed
282 liveintervals - Number of intervals after coalescing
1304 liveintervals - Number of original intervals
86 regalloc - Number of times we had to backtrack
1.90232 regalloc - Ratio of intervals processed over total intervals
40 spiller - Number of values reused
182 spiller - Number of loads added
121 spiller - Number of stores added
132 spiller - Number of register spills
6 twoaddressinstruction - Number of instructions commuted to coalesce
360 twoaddressinstruction - Number of two-address instructions
to:
1636 asm-printer - Number of machine instrs printed
403 liveintervals - Number of loads/stores folded into instructions
1155 liveintervals - Number of identity moves eliminated after coalescing
1033 liveintervals - Number of interval joins performed
279 liveintervals - Number of intervals after coalescing
1312 liveintervals - Number of original intervals
76 regalloc - Number of times we had to backtrack
1.88998 regalloc - Ratio of intervals processed over total intervals
1 spiller - Number of copies elided
41 spiller - Number of values reused
191 spiller - Number of loads added
114 spiller - Number of stores added
128 spiller - Number of register spills
4 twoaddressinstruction - Number of instructions commuted to coalesce
356 twoaddressinstruction - Number of two-address instructions
On this testcase, this change provides a modest reduction in spill code,
regalloc iterations, and total instructions emitted. It increases the number
of register coallesces.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28115 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 14a6db8bd9c83f5fa1821c133f43ccaebdebef91 |
04-May-2006 |
Evan Cheng <evan.cheng@apple.com> |
Initial support for register pressure aware scheduling. The register reduction
scheduler can go into a "vertical mode" (i.e. traversing up the two-address
chain, etc.) when the register pressure is low.
This does seem to reduce the number of spills in the cases I've looked at. But
with x86, it's no guarantee the performance of the code improves.
It can be turned on with -sched-vertically option.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28108 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGList.cpp
|
| 8b915b4ed2c6e43413937ac71c0cbcf476ad1a98 |
04-May-2006 |
Chris Lattner <sabre@nondot.org> |
Remove and simplify some more machineinstr/machineoperand stuff.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28105 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAG.cpp
|
| 2d90ac7ca6117d3b160dde8a4f322c1079a6ffce |
04-May-2006 |
Chris Lattner <sabre@nondot.org> |
Rename MO_VirtualRegister -> MO_Register. Clean up immediate handling.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28104 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAG.cpp
|
| ea50fabfd4e5fad25a25b312f64a9b2a53363586 |
04-May-2006 |
Chris Lattner <sabre@nondot.org> |
Remove a bunch more SparcV9 specific stuff
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28093 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAG.cpp
|
| f4360a478944af45d5f851a0903fbbfa44f520dc |
03-May-2006 |
Nate Begeman <natebegeman@mac.com> |
Finish up the initial jump table implementation by allowing jump tables to
not be 100% dense. Increase the minimum threshold for the number of cases
in a switch statement from 4 to 6 in order to create a jump table.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28079 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| c9a83a45ba53abeab329548e7ac9f3968b440e64 |
03-May-2006 |
Evan Cheng <evan.cheng@apple.com> |
Bottom up register pressure reduction work: clean up some hacks and enhanced
the heuristic to further reduce spills for several test cases. (Note, it may
not necessarily translate to runtime win!)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28076 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGList.cpp
|
| a69571c7991813c93cba64e88eced6899ce93d81 |
03-May-2006 |
Owen Anderson <resistor@mac.com> |
Refactor TargetMachine, pushing handling of TargetData into the target-specific subclasses. This has one caller-visible change: getTargetData() now returns a pointer instead of a reference.
This fixes PR 759.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28074 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
cheduleDAG.cpp
electionDAGISel.cpp
argetLowering.cpp
|
| 22608c2d1feeb649770f8cceab5ccdf949a24543 |
01-May-2006 |
Evan Cheng <evan.cheng@apple.com> |
Dis-favor stores more
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28035 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGList.cpp
|
| f229a5d4beffae21e89481cb93c874ac5a149c2d |
01-May-2006 |
Evan Cheng <evan.cheng@apple.com> |
Bottom up register-pressure reduction scheduler now pushes store operations
up the schedule. This helps code that looks like this:
loads ...
computations (first set) ...
stores (first set) ...
loads
computations (seccond set) ...
stores (seccond set) ...
Without this change, the stores and computations are more likely to
interleave:
loads ...
loads ...
computations (first set) ...
computations (second set) ...
computations (first set) ...
stores (first set) ...
computations (second set) ...
stores (stores set) ...
This can increase the number of spills if we are unlucky.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28033 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGList.cpp
|
| 3766d66b91c2cf850c79c6f0dbb5f20413edea71 |
01-May-2006 |
Evan Cheng <evan.cheng@apple.com> |
Didn't mean ScheduleDAGList.cpp to make the last checkin.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28030 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGList.cpp
|
| 10dbd3ead83e64aae614181ee23965e10f341973 |
01-May-2006 |
Evan Cheng <evan.cheng@apple.com> |
Remove temp. option -spiller-check-liveout, it didn't cause any failure nor performance regressions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28029 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGList.cpp
|
| 25c344a7589054bd3f6ad31c777a02fb4916c31f |
29-Apr-2006 |
Chris Lattner <sabre@nondot.org> |
Remove a bogus transformation. This fixes SingleSource/UnitTests/2006-01-23-InitializedBitField.c
with some changes I have to the new CFE.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28022 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 55d0fa1bfaec665c949b1069225bbc23ca7782bc |
28-Apr-2006 |
Evan Cheng <evan.cheng@apple.com> |
Remove the temporary option: -no-isel-fold-inflight
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28012 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 020c41f21e8b6b01bc40db69e660c3c6e29b0978 |
28-Apr-2006 |
Evan Cheng <evan.cheng@apple.com> |
TargetLowering::LowerArguments should return a VBIT_CONVERT of
FORMAL_ARGUMENTS SDOperand in the return result vector.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28009 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 552c4a849422ad91fa9988255ae35aebbf3acf7b |
28-Apr-2006 |
Evan Cheng <evan.cheng@apple.com> |
Added a temporary option -no-isel-fold-inflight to control whether a "inflight"
node can be folded.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28003 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| f7179bb56ea49e627cdc531ea73d7b6940e87372 |
27-Apr-2006 |
Evan Cheng <evan.cheng@apple.com> |
Insert a VBIT_CONVERT between a FORMAL_ARGUMENT node and its vector uses
(VAND, VADD, etc.). Legalizer will assert otherwise.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27991 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| a83385fb7bdb325921d091729d95e2e1f4d49cc1 |
27-Apr-2006 |
Chris Lattner <sabre@nondot.org> |
Fix Regression/CodeGen/Generic/2006-04-26-SetCCAnd.ll and
PR748.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27987 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 3b0d286d0085fbf8314d9f5510c2f78558ab5dea |
26-Apr-2006 |
Evan Cheng <evan.cheng@apple.com> |
Don't forget return void.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27974 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 9453eea49bca1c3904047db495855c93e001d1cd |
23-Apr-2006 |
Nate Begeman <natebegeman@mac.com> |
Fix the updating of the machine CFG when a PHI node was in a successor of
the jump table's range check block. This re-enables 100% dense jump tables
by default on PPC & x86
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27952 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 05f9466cf0f4f47803af7283f7708cb25f4da889 |
23-Apr-2006 |
Nate Begeman <natebegeman@mac.com> |
Turn of jump tables for a bit, there are still some issues to work out with
updating the machine CFG.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27949 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 37efe6764568a3829fee26aba532283131d1a104 |
22-Apr-2006 |
Nate Begeman <natebegeman@mac.com> |
JumpTable support! What this represents is working asm and jit support for
x86 and ppc for 100% dense switch statements when relocations are non-PIC.
This support will be extended and enhanced in the coming days to support
PIC, and less dense forms of jump tables.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27947 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
cheduleDAG.cpp
electionDAG.cpp
electionDAGISel.cpp
|
| 4a1cd9c61e3e648587d33d5f02ddad97e87f16aa |
21-Apr-2006 |
Chris Lattner <sabre@nondot.org> |
The BFS scheduler is apparently nondeterminstic (causes many llvmgcc bootstrap
miscompares). Switch RISC targets to use the list-td scheduler, which isn't.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27933 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| ef027f940cca409d9e923be3e30afa3f4f0af41a |
21-Apr-2006 |
Chris Lattner <sabre@nondot.org> |
Fix a couple more memory issues
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27930 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| fedced7bc3702f2db5c5d78531b7f58e0f6c9c50 |
21-Apr-2006 |
Chris Lattner <sabre@nondot.org> |
Fix a really subtle and obnoxious memory bug that caused issues with an
llvm-gcc4 boostrap. Whenever a node is deleted by the dag combiner, it
*must* be returned by the visit function, or the dag combiner will not
know that the node has been processed (and will, e.g., send it to the
target dag combine xforms).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27922 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 44f1f09b4e08bf6f94269c1fe4363b99ef17af50 |
20-Apr-2006 |
Evan Cheng <evan.cheng@apple.com> |
Turn a VAND into a VECTOR_SHUFFLE is applicable.
DAG combiner can turn a VAND V, <-1, 0, -1, -1>, i.e. vector clear elements,
into a vector shuffle with a zero vector. It only does so when TLI tells it
the xform is profitable.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27874 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 62b5772959741f1f1368e9a603d171caac1083f5 |
20-Apr-2006 |
Chris Lattner <sabre@nondot.org> |
Implement folding of a bunch of binops with undef
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27863 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 89a1b380a475cbe477e50ff4b94335596b37f21a |
20-Apr-2006 |
Chris Lattner <sabre@nondot.org> |
Simplify some code
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27846 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 80edfb3af5ed214c5cd7797b37cb3bb024e98cc6 |
18-Apr-2006 |
Chris Lattner <sabre@nondot.org> |
Fix handling of calls in functions that use vectors. This fixes a crash on
the code in GCC PR26546.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27780 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 8d5a894501b7546dee94df03118b90126c420820 |
17-Apr-2006 |
Chris Lattner <sabre@nondot.org> |
Codegen insertelement with constant insertion points as scalar_to_vector
and a shuffle. For this:
void %test2(<4 x float>* %F, float %f) {
%tmp = load <4 x float>* %F ; <<4 x float>> [#uses=2]
%tmp3 = add <4 x float> %tmp, %tmp ; <<4 x float>> [#uses=1]
%tmp2 = insertelement <4 x float> %tmp3, float %f, uint 2 ; <<4 x float>> [#uses=2]
%tmp6 = add <4 x float> %tmp2, %tmp2 ; <<4 x float>> [#uses=1]
store <4 x float> %tmp6, <4 x float>* %F
ret void
}
we now get this on X86 (which will get better):
_test2:
movl 4(%esp), %eax
movaps (%eax), %xmm0
addps %xmm0, %xmm0
movaps %xmm0, %xmm1
shufps $3, %xmm1, %xmm1
movaps %xmm0, %xmm2
shufps $1, %xmm2, %xmm2
unpcklps %xmm1, %xmm2
movss 8(%esp), %xmm1
unpcklps %xmm1, %xmm0
unpcklps %xmm2, %xmm0
addps %xmm0, %xmm0
movaps %xmm0, (%eax)
ret
instead of:
_test2:
subl $28, %esp
movl 32(%esp), %eax
movaps (%eax), %xmm0
addps %xmm0, %xmm0
movaps %xmm0, (%esp)
movss 36(%esp), %xmm0
movss %xmm0, 8(%esp)
movaps (%esp), %xmm0
addps %xmm0, %xmm0
movaps %xmm0, (%eax)
addl $28, %esp
ret
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27765 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 2efce0a589e2a688a1a06b5dc2ed0db32ae79924 |
16-Apr-2006 |
Chris Lattner <sabre@nondot.org> |
Add support for promoting stores from one legal type to another, allowing us
to write one pattern for vector stores instead of 4.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27730 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 547a16f27315a08527c41dc521c7cdf6ad9a0b6c |
16-Apr-2006 |
Chris Lattner <sabre@nondot.org> |
Make these predicates return true for bit_convert(buildvector)'s as well as
buildvectors.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27723 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 3824e50b1e931f15e47bdf9edeb324737f236fe6 |
14-Apr-2006 |
Chris Lattner <sabre@nondot.org> |
Make this assertion better
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27695 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| cc9876124e7096d050e6750dd075758320f2cdce |
12-Apr-2006 |
Evan Cheng <evan.cheng@apple.com> |
Promote vector AND, OR, and XOR
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27632 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 41f6cbbeb21d7d4376b8c0302b9766c3e43be5f2 |
12-Apr-2006 |
Evan Cheng <evan.cheng@apple.com> |
Vector type promotion for ISD::LOAD and ISD::SELECT
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27606 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| fdfded55888e35b76bb70231a5bb2f60877c2f6a |
12-Apr-2006 |
Chris Lattner <sabre@nondot.org> |
Implement support for the formal_arguments node. To get this, targets shouldcustom legalize it and remove their XXXTargetLowering::LowerArguments overload
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27604 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
electionDAG.cpp
electionDAGISel.cpp
|
| 9d956250f547eb50c453edcb83b9d1783ee1558c |
12-Apr-2006 |
Chris Lattner <sabre@nondot.org> |
Don't memoize vloads in the load map! Don't memoize them anywhere here, let
getNode do it. This fixes CodeGen/Generic/2006-04-11-vecload.ll
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27602 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 98f8aeb45fc1e54437cbb8f2a7445c609deab832 |
11-Apr-2006 |
Evan Cheng <evan.cheng@apple.com> |
Only get Tmp2 for cases where number of operands is > 1. Fixed return void.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27586 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| b49e52c7e2d828c45583f862c0f7e1a4a2649aca |
11-Apr-2006 |
Chris Lattner <sabre@nondot.org> |
add some todos
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27580 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| f87324e44de88da5b3d57d6aeda5bc9d30f86374 |
11-Apr-2006 |
Chris Lattner <sabre@nondot.org> |
Add basic support for legalizing returns of vectors
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27578 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| db3c626eb9e85e9192dbee59ff0c4d143c37c94d |
10-Apr-2006 |
Evan Cheng <evan.cheng@apple.com> |
Missing break
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27559 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| b22e35a3c3bec07f5559c1476b3143e0d6d64269 |
09-Apr-2006 |
Chris Lattner <sabre@nondot.org> |
Add code generator support for VSELECT
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27542 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
electionDAG.cpp
electionDAGISel.cpp
|
| 17614ea63db9189050b6ca0310f535d12bdedb81 |
08-Apr-2006 |
Chris Lattner <sabre@nondot.org> |
Canonicalize vvector_shuffle(x,x) -> vvector_shuffle(x,undef) to enable patterns
to match again :)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27533 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
egalizeDAG.cpp
|
| 3e104b11168da4692b69cc6b236c1da22adff959 |
08-Apr-2006 |
Chris Lattner <sabre@nondot.org> |
Codegen shufflevector as VVECTOR_SHUFFLE
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27529 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
electionDAGISel.cpp
|
| 4ddd283f6928fc337c1bf3277566d7b31526e8d9 |
08-Apr-2006 |
Chris Lattner <sabre@nondot.org> |
add a sanity check: LegalizeOp should return a value that is the same type
as its input.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27528 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| f6bf87f2cc685d13d6a8fa37693425956b33a840 |
08-Apr-2006 |
Evan Cheng <evan.cheng@apple.com> |
INSERT_VECTOR_ELT lowering bug:
store vector to $esp
store element to $esp + sizeof(VT) * index
load vector from $esp
The bug is VT is the type of the vector element, not the type of the vector!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27517 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 67f13514984c71f80cedf32b698e585a68bcf3e0 |
08-Apr-2006 |
Chris Lattner <sabre@nondot.org> |
Stub out shufflevector
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27514 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| c04766a22832bd044bf3e1c3740415165b9400d6 |
07-Apr-2006 |
Evan Cheng <evan.cheng@apple.com> |
1. If both vector operands of a vector_shuffle are undef, turn it into an undef.
2. A shuffle mask element can also be an undef.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27472 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 2e2ef9535070bb352601482cceac1140c1158cdd |
05-Apr-2006 |
Chris Lattner <sabre@nondot.org> |
Make a vector live across blocks have the correct Vec type. This fixes
CodeGen/X86/2006-04-04-CrossBlockCrash.ll
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27436 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 18dd6d0a2aeb3b827391f46996a7b40c9b1f907a |
05-Apr-2006 |
Evan Cheng <evan.cheng@apple.com> |
Exapnd a VECTOR_SHUFFLE to a BUILD_VECTOR if target asks for it to be expanded
or custom lowering fails.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27432 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| e44be60ee91b65df8dcf13cca15563ab80b236c4 |
04-Apr-2006 |
Chris Lattner <sabre@nondot.org> |
Do not create ZEXTLOAD's unless we are before legalize or the operation is
legal.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27402 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 4352cc9e217e4482ad53f5a7b92c3543f569eb6e |
04-Apr-2006 |
Chris Lattner <sabre@nondot.org> |
* Add supprot for SCALAR_TO_VECTOR operations where the input needs to be
promoted/expanded (e.g. SCALAR_TO_VECTOR from i8/i16 on PPC).
* Add support for targets to request that VECTOR_SHUFFLE nodes be promoted
to a canonical type, for example, we only want v16i8 shuffles on PPC.
* Move isShuffleLegal out of TLI into Legalize.
* Teach isShuffleLegal to allow shuffles that need to be promoted.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27399 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 08da55eeff8fdacd232e69c76bc5142eb4b1474e |
04-Apr-2006 |
Chris Lattner <sabre@nondot.org> |
Constant fold bitconvert(undef)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27391 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 97c2073270e59efd966e9fe1c9b6697cc863d680 |
03-Apr-2006 |
Chris Lattner <sabre@nondot.org> |
Add a missing check, this fixes UnitTests/Vector/sumarray.c
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27375 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| a4c5d8c6b4e91b880fcd1b8b293f330e3aa198a3 |
03-Apr-2006 |
Chris Lattner <sabre@nondot.org> |
Add a missing check, which broke a bunch of vector tests.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27374 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| cf4fb61f6c1daa3b4446ad0444b63770f3026d2d |
03-Apr-2006 |
Andrew Lenharth <andrewl@lenharth.org> |
back this out
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27367 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 50a0d426e85b4e27766a99279d2e61f622525f94 |
02-Apr-2006 |
Andrew Lenharth <andrewl@lenharth.org> |
This should be a win of every arch
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27364 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 1b5232a93767eac1424c67fb86580deef97e21e0 |
02-Apr-2006 |
Chris Lattner <sabre@nondot.org> |
relax assertion
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27358 91177308-0d34-0410-b5e6-96231b3b80d8
argetLowering.cpp
|
| 1482b5fc7affd691fbd8ece7808ddd4559ad20ae |
02-Apr-2006 |
Chris Lattner <sabre@nondot.org> |
Allow targets to compute masked bits for intrinsics.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27357 91177308-0d34-0410-b5e6-96231b3b80d8
argetLowering.cpp
|
| 350bec0fb9680b849942052b25f838d8ad10c743 |
02-Apr-2006 |
Chris Lattner <sabre@nondot.org> |
Add a little dag combine to compile this:
int %AreSecondAndThirdElementsBothNegative(<4 x float>* %in) {
entry:
%tmp1 = load <4 x float>* %in ; <<4 x float>> [#uses=1]
%tmp = tail call int %llvm.ppc.altivec.vcmpgefp.p( int 1, <4 x float> < float 0x7FF8000000000000, float 0.000000e+00, float 0.000000e+00, float 0x7FF8000000000000 >, <4 x float> %tmp1 ) ; <int> [#uses=1]
%tmp = seteq int %tmp, 0 ; <bool> [#uses=1]
%tmp3 = cast bool %tmp to int ; <int> [#uses=1]
ret int %tmp3
}
into this:
_AreSecondAndThirdElementsBothNegative:
mfspr r2, 256
oris r4, r2, 49152
mtspr 256, r4
li r4, lo16(LCPI1_0)
lis r5, ha16(LCPI1_0)
lvx v0, 0, r3
lvx v1, r5, r4
vcmpgefp. v0, v1, v0
mfcr r3, 2
rlwinm r3, r3, 27, 31, 31
mtspr 256, r2
blr
instead of this:
_AreSecondAndThirdElementsBothNegative:
mfspr r2, 256
oris r4, r2, 49152
mtspr 256, r4
li r4, lo16(LCPI1_0)
lis r5, ha16(LCPI1_0)
lvx v0, 0, r3
lvx v1, r5, r4
vcmpgefp. v0, v1, v0
mfcr r3, 2
rlwinm r3, r3, 27, 31, 31
xori r3, r3, 1
cntlzw r3, r3
srwi r3, r3, 5
mtspr 256, r2
blr
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27356 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 4aab2f4ab50d2b04dc559c7b197f1de7612c896b |
02-Apr-2006 |
Chris Lattner <sabre@nondot.org> |
Implement promotion for EXTRACT_VECTOR_ELT, allowing v16i8 multiplies to work with PowerPC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27349 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| bc70cf8be95f33f9aa30c8c3d0fd79e3fa636360 |
02-Apr-2006 |
Chris Lattner <sabre@nondot.org> |
Implement the Expand action for binary vector operations to break the binop
into elements and operate on each piece. This allows generic vector integer
multiplies to work on PPC, though the generated code is horrible.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27347 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| e58a780166eb684164a0a95b999f29328d4e9b2b |
02-Apr-2006 |
Chris Lattner <sabre@nondot.org> |
Intrinsics that just load from memory can be treated like loads: they don't
have to serialize against each other. This allows us to schedule lvx's
across each other, for example.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27346 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| edab1b91336af19e815e780f2e28eb3d2013ddf4 |
02-Apr-2006 |
Chris Lattner <sabre@nondot.org> |
Constant fold all of the vector binops. This allows us to compile this:
"vector unsigned char mergeLowHigh = (vector unsigned char)
( 8, 9, 10, 11, 16, 17, 18, 19, 12, 13, 14, 15, 20, 21, 22, 23 );
vector unsigned char mergeHighLow = vec_xor( mergeLowHigh, vec_splat_u8(8));"
aka:
void %test2(<16 x sbyte>* %P) {
store <16 x sbyte> cast (<4 x int> xor (<4 x int> cast (<16 x ubyte> < ubyte 8, ubyte 9, ubyte 10, ubyte 11, ubyte 16, ubyte 17, ubyte 18, ubyte 19, ubyte 12, ubyte 13, ubyte 14, ubyte 15, ubyte 20, ubyte 21, ubyte 22, ubyte 23 > to <4 x int>), <4 x int> cast (<16 x sbyte> < sbyte 8, sbyte 8, sbyte 8, sbyte 8, sbyte 8, sbyte 8, sbyte 8, sbyte 8, sbyte 8, sbyte 8, sbyte 8, sbyte 8, sbyte 8, sbyte 8, sbyte 8, sbyte 8 > to <4 x int>)) to <16 x sbyte>), <16 x sbyte> * %P
ret void
}
into this:
_test2:
mfspr r2, 256
oris r4, r2, 32768
mtspr 256, r4
li r4, lo16(LCPI2_0)
lis r5, ha16(LCPI2_0)
lvx v0, r5, r4
stvx v0, 0, r3
mtspr 256, r2
blr
instead of this:
_test2:
mfspr r2, 256
oris r4, r2, 49152
mtspr 256, r4
li r4, lo16(LCPI2_0)
lis r5, ha16(LCPI2_0)
vspltisb v0, 8
lvx v1, r5, r4
vxor v0, v1, v0
stvx v0, 0, r3
mtspr 256, r2
blr
... which occurs here:
http://developer.apple.com/hardware/ve/calcspeed.html
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27343 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 5e46a19ec848cd4fc9649bd5170c43d9e657668c |
02-Apr-2006 |
Chris Lattner <sabre@nondot.org> |
Add a new -view-legalize-dags command line option
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27342 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
electionDAGISel.cpp
|
| 6258fb2592d97e1c8e58d4fadf6c47ddeb23b455 |
02-Apr-2006 |
Chris Lattner <sabre@nondot.org> |
Implement constant folding of bit_convert of arbitrary constant vbuild_vector nodes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27341 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 5e08a1103950722c1faa999aabb04048342392b7 |
02-Apr-2006 |
Chris Lattner <sabre@nondot.org> |
These entries already exist
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27340 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 97d23335ad9a3a1e5b78b9feea49c57252ab53e9 |
02-Apr-2006 |
Chris Lattner <sabre@nondot.org> |
Add some missing node names
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27339 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| f8814cf8b8ba8953add60078e304fd5a4113f9cc |
02-Apr-2006 |
Chris Lattner <sabre@nondot.org> |
Prefer larger register classes over smaller ones when a register occurs in
multiple register classes. This fixes PowerPC/2006-04-01-FloatDoubleExtend.ll
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27334 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| f1d0c623c6d9ce3e5d1b30ba3e76e122adc6720e |
01-Apr-2006 |
Chris Lattner <sabre@nondot.org> |
Delete identity shuffles, implementing CodeGen/Generic/vector-identity-shuffle.ll
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27317 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| c741ea424a290373b24b06b77f161d06f08f7fa7 |
31-Mar-2006 |
Chris Lattner <sabre@nondot.org> |
Do not endian swap split vector loads. This fixes UnitTests/Vector/sumarray-dbl on PPC.
Now all UnitTests/Vector/* tests pass on PPC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27299 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| d9731af75b38f30c02f19d6e81333b9c2599ad5f |
31-Mar-2006 |
Chris Lattner <sabre@nondot.org> |
Do not endian swap the operands to a store if the operands came from a vector.
This fixes UnitTests/Vector/simple.c with altivec.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27298 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 29cd7db31097a1ae70a88d7f721a46f207363b46 |
31-Mar-2006 |
Chris Lattner <sabre@nondot.org> |
Remove dead *extloads. This allows us to codegen vector.ll:test_extract_elt
to:
test_extract_elt:
alloc r3 = ar.pfs,0,1,0,0
adds r8 = 12, r32
;;
ldfs f8 = [r8]
mov ar.pfs = r3
br.ret.sptk.many rp
instead of:
test_extract_elt:
alloc r3 = ar.pfs,0,1,0,0
adds r8 = 28, r32
adds r9 = 24, r32
adds r10 = 20, r32
adds r11 = 16, r32
;;
ldfs f6 = [r8]
;;
ldfs f6 = [r9]
adds r8 = 12, r32
adds r9 = 8, r32
adds r14 = 4, r32
;;
ldfs f6 = [r10]
;;
ldfs f6 = [r11]
ldfs f8 = [r8]
;;
ldfs f6 = [r9]
;;
ldfs f6 = [r14]
;;
ldfs f6 = [r32]
mov ar.pfs = r3
br.ret.sptk.many rp
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27297 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| e4b953939c2848cd71ab4aeaecaa150ba1ae7fd9 |
31-Mar-2006 |
Chris Lattner <sabre@nondot.org> |
Delete dead loads in the dag. This allows us to compile
vector.ll:test_extract_elt2 into:
_test_extract_elt2:
lfd f1, 32(r3)
blr
instead of:
_test_extract_elt2:
lfd f0, 56(r3)
lfd f0, 48(r3)
lfd f0, 40(r3)
lfd f1, 32(r3)
lfd f0, 24(r3)
lfd f0, 16(r3)
lfd f0, 8(r3)
lfd f0, 0(r3)
blr
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27296 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 1597221eace1c53ce5f84a7018397497d11a8393 |
31-Mar-2006 |
Chris Lattner <sabre@nondot.org> |
Implement PromoteOp for VEXTRACT_VECTOR_ELT. Thsi fixes
Generic/vector.ll:test_extract_elt on non-sse X86 systems.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27294 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 2ae2e98d4f83a02b5e576ec7a0da74d8aebb38cf |
31-Mar-2006 |
Chris Lattner <sabre@nondot.org> |
Scalarized vector stores need not be legal, e.g. if the vector element type
needs to be promoted or expanded. Relegalize the scalar store once created.
This fixes CodeGen/Generic/vector.ll:test1 on non-SSE x86 targets.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27293 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 7e02151ce2686687446ba7293e66d6b096106e68 |
31-Mar-2006 |
Chris Lattner <sabre@nondot.org> |
Make sure to pass enough values to phi nodes when we are dealing with
decimated vectors. This fixes UnitTests/Vector/sumarray-dbl.c
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27280 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 70c2a61e0a0fb0a7e8b9bddd26bdcc92762772f0 |
31-Mar-2006 |
Chris Lattner <sabre@nondot.org> |
Significantly improve handling of vectors that are live across basic blocks,
handling cases where the vector elements need promotion, expansion, and when
the vector type itself needs to be decimated.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27278 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
electionDAG.cpp
electionDAGISel.cpp
|
| a6c9de42938a26aa7edf50f4250cfd5cdca7737d |
31-Mar-2006 |
Chris Lattner <sabre@nondot.org> |
Was returning the wrong type.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27277 91177308-0d34-0410-b5e6-96231b3b80d8
argetLowering.cpp
|
| eb0b461cf4884bf2c98e463663a298e5c4ae9883 |
31-Mar-2006 |
Evan Cheng <evan.cheng@apple.com> |
Expand INSERT_VECTOR_ELT to store vec, sp; store elt, sp+k; vec = load sp;
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27274 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 79227e2906656b2c92965f5dbebcd66a5774c87f |
31-Mar-2006 |
Chris Lattner <sabre@nondot.org> |
Modify the TargetLowering::getPackedTypeBreakdown method to also return the
unpromoted element type.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27273 91177308-0d34-0410-b5e6-96231b3b80d8
argetLowering.cpp
|
| dc879296090a738c66968f5eec77db65d7e03623 |
31-Mar-2006 |
Chris Lattner <sabre@nondot.org> |
Implement TargetLowering::getPackedTypeBreakdown
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27270 91177308-0d34-0410-b5e6-96231b3b80d8
argetLowering.cpp
|
| 2bbd81064a6998496a71ff7ae8160b3caada64fa |
29-Mar-2006 |
Chris Lattner <sabre@nondot.org> |
Bug fixes: handle constantexpr insert/extract element operations
Handle constantpacked vectors with constantexpr elements.
This fixes CodeGen/Generic/vector-constantexpr.ll
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27241 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| cef896e50cf58e6b3dc3cd431693d78b8ebfa079 |
29-Mar-2006 |
Chris Lattner <sabre@nondot.org> |
When building a VVECTOR_SHUFFLE node from extract_element operations, make
sure to build it as SHUFFLE(X, undef, mask), not SHUFFLE(X, X, mask).
The later is not canonical form, and prevents the PPC splat pattern from
matching. For a particular splat, we go from generating this:
li r10, lo16(LCPI1_0)
lis r11, ha16(LCPI1_0)
lvx v3, r11, r10
vperm v3, v2, v2, v3
to generating:
vspltw v3, v2, 3
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27236 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 66445d3e0a3c6d02585a3c18ec295451a80d427c |
29-Mar-2006 |
Chris Lattner <sabre@nondot.org> |
Canonicalize VECTOR_SHUFFLE(X, X, Y) -> VECTOR_SHUFFLE(X,undef,Y')
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27235 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| d7648c89343c62e154a7d374485dc93a9dc49d54 |
28-Mar-2006 |
Chris Lattner <sabre@nondot.org> |
Turn a series of extract_element's feeding a build_vector into a
vector_shuffle node. For this:
void test(__m128 *res, __m128 *A, __m128 *B) {
*res = _mm_unpacklo_ps(*A, *B);
}
we now produce this code:
_test:
movl 8(%esp), %eax
movaps (%eax), %xmm0
movl 12(%esp), %eax
unpcklps (%eax), %xmm0
movl 4(%esp), %eax
movaps %xmm0, (%eax)
ret
instead of this:
_test:
subl $76, %esp
movl 88(%esp), %eax
movaps (%eax), %xmm0
movaps %xmm0, (%esp)
movaps %xmm0, 32(%esp)
movss 4(%esp), %xmm0
movss 32(%esp), %xmm1
unpcklps %xmm0, %xmm1
movl 84(%esp), %eax
movaps (%eax), %xmm0
movaps %xmm0, 16(%esp)
movaps %xmm0, 48(%esp)
movss 20(%esp), %xmm0
movss 48(%esp), %xmm2
unpcklps %xmm0, %xmm2
unpcklps %xmm1, %xmm2
movl 80(%esp), %eax
movaps %xmm2, (%eax)
addl $76, %esp
ret
GCC produces this (with -fomit-frame-pointer):
_test:
subl $12, %esp
movl 20(%esp), %eax
movaps (%eax), %xmm0
movl 24(%esp), %eax
unpcklps (%eax), %xmm0
movl 16(%esp), %eax
movaps %xmm0, (%eax)
addl $12, %esp
ret
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27233 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 5b2316e2b06e0fb6aea31d9d3eb61376b40c23a6 |
28-Mar-2006 |
Chris Lattner <sabre@nondot.org> |
Teach Legalize how to pack VVECTOR_SHUFFLE nodes into VECTOR_SHUFFLE nodes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27232 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 354cde9a7e7038ec0cb61a76f22baae289131ade |
28-Mar-2006 |
Chris Lattner <sabre@nondot.org> |
new node
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27231 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 4fbdd59f4ff40122ddf5a7adb40e1344da4f5f2b |
28-Mar-2006 |
Chris Lattner <sabre@nondot.org> |
Don't crash on X^X if X is a vector. Instead, produce a vector of zeros.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27229 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| f35b29765b2c1393aa479cd2d9c82d99c18d7430 |
28-Mar-2006 |
Chris Lattner <sabre@nondot.org> |
Add an assertion
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27228 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| bf7637d59028a5d9911769810f537c499e23bb8e |
28-Mar-2006 |
Jim Laskey <jlaskey@mac.com> |
More bulletproofing of llvm.dbg.declare.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27224 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 48b61a729df6576c8833a83893d4086bddff69a5 |
28-Mar-2006 |
Chris Lattner <sabre@nondot.org> |
Tblgen doesn't like multiple SDNode<> definitions that map to the sameenum value. Split them into separate enums.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27201 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
electionDAG.cpp
electionDAGISel.cpp
|
| 8c39020359e1b80277277382c63560f592619a2f |
28-Mar-2006 |
Jim Laskey <jlaskey@mac.com> |
Reactivate llvm.dbg.declare.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27192 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 67995340fb223d91636c95ba35488c34d47b726a |
27-Mar-2006 |
Chris Lattner <sabre@nondot.org> |
Disable dbg_declare, it currently breaks the CFE build
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27182 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 13fc2f1d270cdedffb72b33621369cee9a2cdaaa |
27-Mar-2006 |
Chris Lattner <sabre@nondot.org> |
Fix legalization of intrinsics with chain and result values
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27181 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 401ec7f6a9fb339f752ec424efe13431a556cc6d |
27-Mar-2006 |
Chris Lattner <sabre@nondot.org> |
Unbreak the build on non-apple compilers :-(
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27173 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 23cc8708c316128088674675707e140658043f85 |
27-Mar-2006 |
Evan Cheng <evan.cheng@apple.com> |
Try again
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27171 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| f48b50a7ef18044c8f05075e6432d072db069f5d |
27-Mar-2006 |
Evan Cheng <evan.cheng@apple.com> |
Incorrect check for FP all one's
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27169 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| a8df166fbef047c90adba3c673162a1b1f6681c4 |
27-Mar-2006 |
Evan Cheng <evan.cheng@apple.com> |
Change isBuildVectorAllOnesInteger to isBuildVectorAllOnes. Also check for
floating point cases.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27165 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 70a248d284af550ae46c8dfc18ea2bbc15d31eb0 |
27-Mar-2006 |
Chris Lattner <sabre@nondot.org> |
Instead of printing "INTRINSIC" on intrinsic node, print the intrinsic name.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27164 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| f15485a8d0dff5f720b7ad27346129ac5c3ec503 |
27-Mar-2006 |
Nate Begeman <natebegeman@mac.com> |
SelectionDAGISel can now natively handle Switch instructions, in the same
manner that the LowerSwitch LLVM to LLVM pass does: emitting a binary
search tree of basic blocks. The new approach has several advantages:
it is faster, it generates significantly smaller code in many cases, and
it paves the way for implementing dense switch tables as a jump table by
handling switches directly in the instruction selector.
This functionality is currently only enabled on x86, but should be safe for
every target. In anticipation of making it the default, the cfg is now
properly updated in the x86, ppc, and sparc select lowering code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27156 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| fbcf23c3c12449c264f1448a2eee524be0b799f7 |
27-Mar-2006 |
Jim Laskey <jlaskey@mac.com> |
Bullet proof against undefined args produced by upgrading ols-style debug info.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27155 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 4a147842eb24a7611fcd7bfb37c55185b4664927 |
26-Mar-2006 |
Evan Cheng <evan.cheng@apple.com> |
Add ISD::isBuildVectorAllZeros predicate
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27147 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 10d7fa62fffbceed580c34a00bd30f16643f6607 |
26-Mar-2006 |
Chris Lattner <sabre@nondot.org> |
Allow targets to custom lower their own intrinsics if desired.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27146 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 452e8354d58960289aae610fa265ee69431b6b83 |
25-Mar-2006 |
Chris Lattner <sabre@nondot.org> |
Fix a bug in ISD::isBuildVectorAllOnesInteger that caused it to always return
false
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27131 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 61d4399dfc7046595e30ad34a28c72a885cb8100 |
25-Mar-2006 |
Chris Lattner <sabre@nondot.org> |
Implement the ISD::isBuildVectorAllOnesInteger predicate
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27130 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 6ea2dee6f675bd5eb32de08b4eecfe21ebe107a0 |
25-Mar-2006 |
Chris Lattner <sabre@nondot.org> |
Don't call SimplifyDemandedBits on vectors
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27128 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 7255a545613f9e713779ca81f55711c0863d9cc9 |
24-Mar-2006 |
Chris Lattner <sabre@nondot.org> |
fix inverted conditional
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27089 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 73d7b6029ac8b52a90f302d06831abcc04c77077 |
24-Mar-2006 |
Evan Cheng <evan.cheng@apple.com> |
Only to vector shuffle for {x,x,y,y} cases when SCALAR_TO_VECTOR is free.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27071 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 0892cee81fa8c1ea6a0901b268fe9ad2b8fa733a |
24-Mar-2006 |
Jim Laskey <jlaskey@mac.com> |
Rename for truth in advertising.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27063 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 2eb8653157ccd318b357af74bfd517c76ef166b8 |
24-Mar-2006 |
Chris Lattner <sabre@nondot.org> |
prefer to generate constant pool loads over splats. This prevents us from
using a splat for {1.0,1.0,1.0,1.0}
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27055 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 45053fc7fc2712d5ead1c087ce603637c99cad93 |
24-Mar-2006 |
Chris Lattner <sabre@nondot.org> |
fix spello
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27053 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAG.cpp
|
| d1f04d40a078d6ca7c876b16a178992a109af774 |
24-Mar-2006 |
Chris Lattner <sabre@nondot.org> |
legalize vbit_convert nodes whose result is a legal type.
Legalize intrinsic nodes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27036 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 0eade319cdb72e24c11d068728a98083737c6435 |
24-Mar-2006 |
Chris Lattner <sabre@nondot.org> |
Lower target intrinsics into an INTRINSIC node
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27035 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| e8a30fdf519a7db1c5e157aa29d72839cfc16174 |
24-Mar-2006 |
Chris Lattner <sabre@nondot.org> |
fix some bogus assertions: noop bitconverts are legal
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27032 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 033e6816668da71ff0866a61f5c0a7e7e795d069 |
24-Mar-2006 |
Evan Cheng <evan.cheng@apple.com> |
Lower BUILD_VECTOR to VECTOR_SHUFFLE if there are two distinct nodes (and if
the target can handle it). Issue two SCALAR_TO_VECTOR ops followed by a
VECTOR_SHUFFLE to select from the two vectors.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27023 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 3e8f3ce8f6d7fb7bee4cf7ac27bea2e90f83b25d |
24-Mar-2006 |
Chris Lattner <sabre@nondot.org> |
Identify the INTRINSIC node
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27020 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 677274b1cb511613df087adaebfdb0817c7beb49 |
24-Mar-2006 |
Evan Cheng <evan.cheng@apple.com> |
Typo
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27008 91177308-0d34-0410-b5e6-96231b3b80d8
argetLowering.cpp
|
| 7692eb4201e2071fb2afddcdaa6ba93b5e6abad4 |
23-Mar-2006 |
Chris Lattner <sabre@nondot.org> |
add support for splitting casts. This implements
CodeGen/Generic/vector.ll:test_cast_2.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26999 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 43970fec322d9e0153ca513de41d80af1c79bdde |
23-Mar-2006 |
Jim Laskey <jlaskey@mac.com> |
Handle new forms of llvm.dbg intrinsics.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26988 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 408c428096df3a3970a8387f9dd258ae948663a6 |
23-Mar-2006 |
Chris Lattner <sabre@nondot.org> |
simplify some code
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26972 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 7e358908b885f50fb9258b7d10509bad20ca4c3b |
22-Mar-2006 |
Chris Lattner <sabre@nondot.org> |
Fix a typo
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26965 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| e25ca692c0478af5e15170fce23cea2a5b5fd0b9 |
22-Mar-2006 |
Chris Lattner <sabre@nondot.org> |
Implement simple support for vector casting. This can currently only handle
casts between legal vector types.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26961 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
electionDAG.cpp
electionDAGISel.cpp
|
| 841c882f5dae8c953ea99b5824108313549cfaf8 |
22-Mar-2006 |
Chris Lattner <sabre@nondot.org> |
Endianness does not affect the order of vector fields. This fixes
SingleSource/UnitTests/Vector/build.c
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26936 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 3b9fa89fcaf3eb08397c4c68b60c72fc73f8ab44 |
22-Mar-2006 |
Chris Lattner <sabre@nondot.org> |
Enclose some variables in a scope to avoid error with some gcc versions
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26934 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| e35c218f3e8e15f96cb44c5fbc70c7ea20d6c962 |
21-Mar-2006 |
Chris Lattner <sabre@nondot.org> |
add expand support for extractelement
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26931 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 384504cea6c392125a2318d8bbb7f25aa0bbff7e |
21-Mar-2006 |
Chris Lattner <sabre@nondot.org> |
add some trivial support for extractelement.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26928 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
electionDAG.cpp
electionDAGISel.cpp
|
| 1c6191ffe764f3294cc2dda2bb3703403a416414 |
21-Mar-2006 |
Chris Lattner <sabre@nondot.org> |
Add a hacky workaround for crashes due to vectors live across blocks.
Note that this code won't work for vectors that aren't legal on the
target. Improvements coming.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26925 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
electionDAG.cpp
electionDAGISel.cpp
|
| 87100e0b83b808757bf44dabecd1d1048255d1ad |
20-Mar-2006 |
Chris Lattner <sabre@nondot.org> |
If a target supports splatting with SHUFFLE_VECTOR, lower to it from BUILD_VECTOR(x,x,x,x)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26885 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 54a30b9639d81abb91022963054e6d17ea21e9ca |
20-Mar-2006 |
Chris Lattner <sabre@nondot.org> |
TargetData doesn't know the alignment of vectors :(
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26884 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAG.cpp
|
| fb194b9e738ab2730ea0a3189f091737aba31c5b |
20-Mar-2006 |
Chris Lattner <sabre@nondot.org> |
Add very basic support for VECTOR_SHUFFLE
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26880 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 4d3abee6183f110c9db56b94b0a4b5f8c985002a |
19-Mar-2006 |
Chris Lattner <sabre@nondot.org> |
Allow SCALAR_TO_VECTOR to be custom lowered.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26867 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| ce87215131efcc68dcf7fca61055ad783a7aeb0e |
19-Mar-2006 |
Chris Lattner <sabre@nondot.org> |
Add SCALAR_TO_VECTOR support
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26866 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
electionDAG.cpp
|
| 74881908fec5de98175d41d6fa065971736b2119 |
19-Mar-2006 |
Chris Lattner <sabre@nondot.org> |
Don't bother storing undef elements of BUILD_VECTOR's
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26858 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 5fcd0350be08acc2f0415941c1e2101f5a399622 |
19-Mar-2006 |
Chris Lattner <sabre@nondot.org> |
Implement expand of BUILD_VECTOR containing variable elements.
This implements CodeGen/Generic/vector.ll:test_variable_buildvector
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26852 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| ca2424423416032dc95dae4c106a5cf99795e589 |
19-Mar-2006 |
Chris Lattner <sabre@nondot.org> |
fold insertelement(buildvector) -> buildvector if the inserted element # is
a constant. This implements test_constant_insert in CodeGen/Generic/vector.ll
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26851 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 2332b9f16fe17d1886566729b2241b8cd90f9916 |
19-Mar-2006 |
Chris Lattner <sabre@nondot.org> |
implement basic support for INSERT_VECTOR_ELT.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26849 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
electionDAGISel.cpp
|
| b2827b0901162169bb2692b77a839c9767849134 |
19-Mar-2006 |
Chris Lattner <sabre@nondot.org> |
Rename ConstantVec -> BUILD_VECTOR and VConstant -> VBUILD_VECTOR. Allow*BUILD_VECTOR to take variable inputs.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26847 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
electionDAG.cpp
electionDAGISel.cpp
|
| 23d564c11fbe628dbebd6d8f09d7d07fa862b719 |
19-Mar-2006 |
Chris Lattner <sabre@nondot.org> |
implement vector.ll:test_undef
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26845 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
electionDAGISel.cpp
|
| 4794a6b6a09e3440438cd653ec09cf0c2e45be1c |
19-Mar-2006 |
Chris Lattner <sabre@nondot.org> |
Fix the remaining bugs in the vector expansion rework I commited yesterday.
This fixes CodeGen/Generic/vector.ll
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26843 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| c7029805ef35ce9805931067b841e6af11db382e |
18-Mar-2006 |
Chris Lattner <sabre@nondot.org> |
Change the structure of lowering vector stuff. Note: This breaks some
things.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26840 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
electionDAG.cpp
electionDAGISel.cpp
|
| 0c486bdc221768f229e97ad15f5d160288817e96 |
17-Mar-2006 |
Chris Lattner <sabre@nondot.org> |
add a couple enum values
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26830 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 81e8097377529dc3b666f33bb525c49cfbac3f51 |
17-Mar-2006 |
Nate Begeman <natebegeman@mac.com> |
Remove BRTWOWAY*
Make the PPC backend not dependent on BRTWOWAY_CC and make the branch
selector smarter about the code it generates, fixing a case in the
readme.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26814 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
egalizeDAG.cpp
electionDAG.cpp
electionDAGISel.cpp
|
| 6cb7004c3499f07c034a01f6335b5058aa80a5ce |
17-Mar-2006 |
Chris Lattner <sabre@nondot.org> |
Fix a problem fully scalarizing values.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26811 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 199862b74973198c2ab5a139f664c86713e7b579 |
16-Mar-2006 |
Chris Lattner <sabre@nondot.org> |
Add support for CopyFromReg from vector values. Note: this doesn't support
illegal vector types yet!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26799 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 3c38449be6371d53a58d0df80ecf3772a2f9a79f |
16-Mar-2006 |
Chris Lattner <sabre@nondot.org> |
Teach CreateRegForValue how to handle vector types.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26798 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 3a59358499f527ad9a8d1d4ed7d80b6bf0f1c12d |
16-Mar-2006 |
Chris Lattner <sabre@nondot.org> |
set TransformToType correctly for vector types.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26797 91177308-0d34-0410-b5e6-96231b3b80d8
argetLowering.cpp
|
| 28b5b1c7b54c2065882b98af2406c38a3bcee802 |
15-Mar-2006 |
Chris Lattner <sabre@nondot.org> |
add support for vector->vector casts
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26788 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
electionDAGISel.cpp
|
| 06ac6ab938cf54596202de851da4b20aa61fe64e |
15-Mar-2006 |
Chris Lattner <sabre@nondot.org> |
Add a note, this code should be moved to the dag combiner.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26787 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 30b37b5f29991874648d839d018aa2921b39355f |
14-Mar-2006 |
Evan Cheng <evan.cheng@apple.com> |
Add LSR hooks.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26740 91177308-0d34-0410-b5e6-96231b3b80d8
argetLowering.cpp
|
| ac0f8f29290ff018d51ce58bd11be13ab148e698 |
13-Mar-2006 |
Chris Lattner <sabre@nondot.org> |
make sure dead token factor nodes are removed by the dag combiner.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26731 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| f4321a3a438833dade457e24da6e1e6907cabcd5 |
13-Mar-2006 |
Jim Laskey <jlaskey@mac.com> |
Handle the removal of the debug chain.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26729 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 947c28935d179f486c8137323361923ba4f23886 |
13-Mar-2006 |
Chris Lattner <sabre@nondot.org> |
Fold X+Y -> X|Y when safe. This implements:
Regression/CodeGen/PowerPC/and_add.ll
a case that occurs with dynamic allocas of constant size.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26727 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| b6b17ffbc61025c6b3233787ccce2e6335d60b49 |
13-Mar-2006 |
Chris Lattner <sabre@nondot.org> |
I can't convince myself that this is safe, remove the recursive call.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26725 91177308-0d34-0410-b5e6-96231b3b80d8
argetLowering.cpp
|
| 79dbea5ab4c73243a4f6a09fa1637a618263493e |
13-Mar-2006 |
Chris Lattner <sabre@nondot.org> |
add a couple of missing folds
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26724 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 8f4191d61978529e9e9d7ddc24dbcd528ef7dd4c |
13-Mar-2006 |
Chris Lattner <sabre@nondot.org> |
For targets with FABS/FNEG support, lower copysign to an integer load,
a select and FABS/FNEG.
This speeds up a trivial (aka stupid) copysign benchmark I wrote from 6.73s
to 2.64s, woo.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26723 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| fc3549ee8ccf15ab3fad8ec18a299eef0aa53b41 |
12-Mar-2006 |
Chris Lattner <sabre@nondot.org> |
Don't advance the hazard recognizer when there are no hazards and no instructions
to be emitted.
Don't add one to the latency of a completed instruction if the latency of the
op is 0.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26718 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGList.cpp
|
| b2215030d6a6c3096ed5da8fde43c4eed7165768 |
12-Mar-2006 |
Chris Lattner <sabre@nondot.org> |
Chain operands aren't real uses: they don't require the full latency of the
predecessor to finish before they can start.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26717 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGList.cpp
|
| 53fbf2a8e810bbdf5ad5d7808fabe9ae4f3497e2 |
12-Mar-2006 |
Chris Lattner <sabre@nondot.org> |
As a pending queue data structure to keep track of instructions whose
operands have all issued, but whose results are not yet available. This
allows us to compile:
int G;
int test(int A, int B, int* P) {
return (G+A)*(B+1);
}
to:
_test:
lis r2, ha16(L_G$non_lazy_ptr)
addi r4, r4, 1
lwz r2, lo16(L_G$non_lazy_ptr)(r2)
lwz r2, 0(r2)
add r2, r2, r3
mullw r3, r2, r4
blr
instead of this, which has a stall between the lis/lwz:
_test:
lis r2, ha16(L_G$non_lazy_ptr)
lwz r2, lo16(L_G$non_lazy_ptr)(r2)
addi r4, r4, 1
lwz r2, 0(r2)
add r2, r2, r3
mullw r3, r2, r4
blr
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26716 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGList.cpp
|
| 84690316227247b9375a797184ca2cbea55e9f62 |
11-Mar-2006 |
Chris Lattner <sabre@nondot.org> |
rename priorityqueue -> availablequeue. When a node is scheduled, remember
which cycle it lands on.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26714 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGList.cpp
|
| c1c078c170b45459f7fb914079cd7aff14878f17 |
11-Mar-2006 |
Chris Lattner <sabre@nondot.org> |
Make CurrCycle a local var instead of an instance var
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26713 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGList.cpp
|
| 7d82b000488fbb2cd7abae073770c94d8ed2fbc2 |
11-Mar-2006 |
Chris Lattner <sabre@nondot.org> |
Move some methods around so that BU specific code is together, TD specific code
is together, and direction independent code is together.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26712 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGList.cpp
|
| 309cf8a7132bf6dcd00135a49fef4258bbd1a903 |
11-Mar-2006 |
Chris Lattner <sabre@nondot.org> |
merge preds/chainpreds -> preds set
merge succs/chainsuccs -> succs set
This has no functionality change, simplifies the code, and reduces the size
of sunits.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26711 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGList.cpp
|
| 0937103368992af8d3d8032d31a7d152aeae32d5 |
11-Mar-2006 |
Evan Cheng <evan.cheng@apple.com> |
Added a parameter to control whether Constant::getStringValue() would chop
off the result string at the first null terminator.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26704 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 7d74d1145fd17cdc11113755cee2a21f3cb0b7cf |
10-Mar-2006 |
Chris Lattner <sabre@nondot.org> |
scrape out bits of llvm-db
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26701 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| a34b6f8713cd065306b07aafb1c978c30bc64947 |
10-Mar-2006 |
Chris Lattner <sabre@nondot.org> |
Move simple-selector-specific types to the simple selector.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26693 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGSimple.cpp
|
| 20a4921791eafc0cce00fb01dcacfcfc15a0d0fc |
10-Mar-2006 |
Chris Lattner <sabre@nondot.org> |
Simplify the interface to the schedulers, to not pass the selected heuristicin.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26692 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGSimple.cpp
electionDAGISel.cpp
|
| 2f5806c2b37a4e59cb12a6d49f0e3423c2082a64 |
10-Mar-2006 |
Chris Lattner <sabre@nondot.org> |
Move some simple-sched-specific instance vars to the simple scheduler.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26690 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAG.cpp
cheduleDAGList.cpp
cheduleDAGSimple.cpp
|
| 1e433c59e0e123743bc08ba9518fa3c9792dc419 |
10-Mar-2006 |
Chris Lattner <sabre@nondot.org> |
prune #includes
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26689 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAG.cpp
|
| e76074ab89136d9ffd4520949f580c6114402512 |
10-Mar-2006 |
Chris Lattner <sabre@nondot.org> |
move some simple scheduler methods into the simple scheduler
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26688 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAG.cpp
cheduleDAGSimple.cpp
|
| 8c7ef0599c3d5b0beea9c16ac1e4ac6755d34de2 |
10-Mar-2006 |
Chris Lattner <sabre@nondot.org> |
Make EmitNode take a SDNode instead of a NodeInfo*
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26687 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAG.cpp
cheduleDAGList.cpp
|
| df3750642a90e2865145104157f9f12b46ce5e24 |
10-Mar-2006 |
Chris Lattner <sabre@nondot.org> |
Move the VRBase field from NodeInfo to being a separate, explicit, map.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26686 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAG.cpp
cheduleDAGList.cpp
|
| 8d41651da73e2458f6eff9926a3de0a7932653e4 |
10-Mar-2006 |
Chris Lattner <sabre@nondot.org> |
no need to build groups anymore
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26684 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGList.cpp
|
| b2042e31a7cc58a454889593a39bce42de09fd62 |
10-Mar-2006 |
Chris Lattner <sabre@nondot.org> |
Create SUnits directly from the SelectionDAG.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26683 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGList.cpp
|
| be24e5996c9cb06c6af5d9c86d1181b62a3a8393 |
10-Mar-2006 |
Chris Lattner <sabre@nondot.org> |
Push PrepareNodeInfo/IdentifyGroups down the inheritance hierarchy
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26682 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAG.cpp
cheduleDAGList.cpp
cheduleDAGSimple.cpp
|
| da4ff69153c7562a71a1990929adc0faa8d0996d |
10-Mar-2006 |
Chris Lattner <sabre@nondot.org> |
Teach the latency scheduler some new tricks. In particular, to break ties,
keep track of a sense of "mobility", i.e. how many other nodes scheduling one
node will free up. For something like this:
float testadd(float *X, float *Y, float *Z, float *W, float *V) {
return (*X+*Y)*(*Z+*W)+*V;
}
For example, this makes us schedule *X then *Y, not *X then *Z. The former
allows us to issue the add, the later only lets us issue other loads.
This turns the above code from this:
_testadd:
lfs f0, 0(r3)
lfs f1, 0(r6)
lfs f2, 0(r4)
lfs f3, 0(r5)
fadds f0, f0, f2
fadds f1, f3, f1
lfs f2, 0(r7)
fmadds f1, f0, f1, f2
blr
into this:
_testadd:
lfs f0, 0(r6)
lfs f1, 0(r5)
fadds f0, f1, f0
lfs f1, 0(r4)
lfs f2, 0(r3)
fadds f1, f2, f1
lfs f2, 0(r7)
fmadds f1, f1, f0, f2
blr
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26680 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGList.cpp
|
| f83a47d905f4c6a4d1099bc5e1963c84af5300ee |
10-Mar-2006 |
Chris Lattner <sabre@nondot.org> |
add an aggregate method for reinserting scheduled nodes, add a callback for
priority impls that want to be notified when a node is scheduled
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26678 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGList.cpp
|
| 9630d271c524fac27301ac205b16f90eae461721 |
10-Mar-2006 |
Jeff Cohen <jeffc@jolt-lang.org> |
Fix VC++ build breakage.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26676 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGList.cpp
|
| 59bcce5ae52afff2ba4840bfa630b20e8ff4ddb2 |
09-Mar-2006 |
Chris Lattner <sabre@nondot.org> |
remove dbg_declare, it's not used yet.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26659 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 8c84f3f0dfae7975e93fb5465c41c8a41bd70aa6 |
09-Mar-2006 |
Chris Lattner <sabre@nondot.org> |
remove temporary option
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26646 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGList.cpp
|
| 571340633f1d4941a606a4049c1d7d982002f754 |
09-Mar-2006 |
Chris Lattner <sabre@nondot.org> |
yes yes, enabled debug output is bad
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26637 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGList.cpp
|
| 6a4b70bbcfa0ebdc36420de4d16b62cb62f76ef7 |
09-Mar-2006 |
Chris Lattner <sabre@nondot.org> |
switch the t-d scheduler to use a really dumb and trivial critical path
latency priority function.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26636 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGList.cpp
|
| 477ef6d8cb987e90a177b39ae0207139059de5c3 |
09-Mar-2006 |
Chris Lattner <sabre@nondot.org> |
Pull latency information for target instructions out of the latency tables. :)
Only enable this with -use-sched-latencies, I'll enable it by default with a
clean nightly tester run tonight.
PPC is the only target that provides latency info currently.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26634 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGList.cpp
|
| e70f671b97a59cb0851131b398384f7ba88bf7c7 |
09-Mar-2006 |
Chris Lattner <sabre@nondot.org> |
don't copy all itinerary data
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26633 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGSimple.cpp
|
| 0324ba8f02f4193659c1ff35d8de3cc7e14f604e |
09-Mar-2006 |
Chris Lattner <sabre@nondot.org> |
PriorityQueue is an instance var, use it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26632 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGList.cpp
|
| e87c5c8088d2f267469917ca69c0f6dc324a5249 |
09-Mar-2006 |
Chris Lattner <sabre@nondot.org> |
add some comments
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26631 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGList.cpp
|
| e32178dd32ebe28034528bbc47c4d253cadb6faf |
09-Mar-2006 |
Chris Lattner <sabre@nondot.org> |
Refactor the priority mechanism one step further: now that it is a separate
class, sever its implementation from the interface. Now we can provide new
implementations of the same interface (priority computation) without touching
the scheduler itself.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26630 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGList.cpp
|
| 21b6c9d6477c8df3f884c3f1ebeaaa44dd53aafe |
08-Mar-2006 |
Jim Laskey <jlaskey@mac.com> |
Get rid of the multiple copies of getStringValue. Now a Constant:: method.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26616 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 49eee4a26f17b27d8949be3b6da7d9e75846be00 |
08-Mar-2006 |
Chris Lattner <sabre@nondot.org> |
Split the priority function computation and priority queue management out
of the ScheduleDAGList class into a new SchedulingPriorityQueue class.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26613 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGList.cpp
|
| c45a59bb327a1c8b908f43a1112a0118b659495b |
08-Mar-2006 |
Chris Lattner <sabre@nondot.org> |
switch from an explicitly managed list of SUnits to a simple vector of sunits
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26612 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGList.cpp
|
| 6a67b3a4e636bccb25c5003972424d4545efa279 |
08-Mar-2006 |
Chris Lattner <sabre@nondot.org> |
Shrinkify some fields, fit to 80 columns
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26611 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGList.cpp
|
| 6b24af87e6af1d2e8beb644554e06fcb5d620182 |
08-Mar-2006 |
Chris Lattner <sabre@nondot.org> |
revert the previous patch, didn't mean to check it in yet
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26610 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 5874f82564d6cd9da086cc705e1c5c8ec8ff8361 |
08-Mar-2006 |
Chris Lattner <sabre@nondot.org> |
remove "Slot", it is dead
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26609 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
cheduleDAGList.cpp
|
| b0d21ef20c29f4ea46d21b488f17feaa6a8760e1 |
08-Mar-2006 |
Chris Lattner <sabre@nondot.org> |
Change the interface for getting a target HazardRecognizer to be more clean.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26608 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAG.cpp
cheduleDAGList.cpp
electionDAGISel.cpp
|
| b2d635803db0e82ce6f6692af6fac4880e029fac |
07-Mar-2006 |
Chris Lattner <sabre@nondot.org> |
Fix some formatting, when looking for hazards, prefer target nodes over
things like copyfromreg.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26586 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGList.cpp
|
| 6af7ef8da874635f5f060ad19afb19811452b447 |
06-Mar-2006 |
Chris Lattner <sabre@nondot.org> |
update file comment
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26573 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGList.cpp
|
| adc5e5c85fdf188166690084675a971aa5e9f188 |
06-Mar-2006 |
Evan Cheng <evan.cheng@apple.com> |
Remove some code that doesn't make sense
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26572 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGList.cpp
|
| 6b36ce920254dc8ca5c60baec1a23e271e7a34ce |
06-Mar-2006 |
Evan Cheng <evan.cheng@apple.com> |
Remove SUnit::Priority1: it is re-calculated on demand as number of live
range to be generated.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26570 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGList.cpp
|
| 03fc53c174e654adae4e42a0c352c7937de2cd87 |
06-Mar-2006 |
Chris Lattner <sabre@nondot.org> |
Hoist the HazardRecognizer out of the ScheduleDAGList.cpp file to where
targets can implement them. Make the top-down scheduler non-g5-specific.
Remove the old testing hazard recognizer.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26569 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGList.cpp
electionDAGISel.cpp
|
| 67727308fa1fbcc5090e1da657bd2bb93c6d0858 |
06-Mar-2006 |
Chris Lattner <sabre@nondot.org> |
Comment fixes
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26567 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGList.cpp
|
| 3c232c83be461b741c40fb25b932a1f60256a462 |
06-Mar-2006 |
Chris Lattner <sabre@nondot.org> |
Don't depend on the C99 copysign function, implement it ourselves.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26566 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| a93dfcd40a0750455d093903a9b65627c4e58a8e |
06-Mar-2006 |
Chris Lattner <sabre@nondot.org> |
When a hazard recognizer needs noops to be inserted, do so. This represents
noops as null pointers in the instruction sequence.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26564 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAG.cpp
cheduleDAGList.cpp
|
| 6cc3f0a77427b66378f5a57aff2cd4310b91a670 |
06-Mar-2006 |
Chris Lattner <sabre@nondot.org> |
Implement G5HazardRecognizer as a trivial thing that wants 5 cycles between
copyfromreg nodes. Clearly useful!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26559 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGList.cpp
|
| ad0f78ace25ebc5a9597c189b0a797331f350fea |
05-Mar-2006 |
Chris Lattner <sabre@nondot.org> |
Add basic hazard recognizer support. noop insertion isn't complete yet though.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26558 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGList.cpp
|
| 3d68e15c20fd91183e352b906395fbc98c27d7af |
05-Mar-2006 |
Jeff Cohen <jeffc@jolt-lang.org> |
Fix VC++ compilation error.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26554 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| a5de484bc7c8f896b5903999797c4d57f4e45185 |
05-Mar-2006 |
Chris Lattner <sabre@nondot.org> |
Split the list scheduler into top-down and bottom-up pieces. The priority
function of the top-down scheduler are completely bogus currently, and
having (future) PPC specific in this file is also wrong, but this is a
small incremental step.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26552 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGList.cpp
electionDAGISel.cpp
|
| 41f5ea06659026f149915009217f7caeb463cc53 |
05-Mar-2006 |
Chris Lattner <sabre@nondot.org> |
Move the available queue to being inside the ListSchedule method, since it
bounds its lifetime.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26550 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGList.cpp
|
| cac7059d0f8e6e1be5d4001eb942e23780af2300 |
05-Mar-2006 |
Chris Lattner <sabre@nondot.org> |
Reinstate this now that the offending opposite xform has been removed.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26548 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| c1d9f1de41b26769752224829987a6aa06fe4b87 |
05-Mar-2006 |
Chris Lattner <sabre@nondot.org> |
Do not fold (add (shl x, c1), (shl c2, c1)) -> (shl (add x, c2), c1),
we want to canonicalize the other way.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26547 91177308-0d34-0410-b5e6-96231b3b80d8
argetLowering.cpp
|
| 52676510577a5fdab082eb0c065ae151903d9dcf |
05-Mar-2006 |
Chris Lattner <sabre@nondot.org> |
print arbitrary constant pool entries
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26545 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGPrinter.cpp
|
| 9176b0169c8650fa6fb1d0464256d7c3e8ecf115 |
05-Mar-2006 |
Evan Cheng <evan.cheng@apple.com> |
Back out fold (shl (add x, c1), c2) -> (add (shl x, c2), c1<<c2) for now.
It's causing an infinite loop compiling ldecod on x86 / Darwin.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26544 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 12d830346b78b8e92dc0346e710f261cc680480f |
05-Mar-2006 |
Chris Lattner <sabre@nondot.org> |
Add some simple copysign folds
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26543 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
electionDAG.cpp
|
| a09f848c11c9db3c2614e0275a3256310ac26653 |
05-Mar-2006 |
Chris Lattner <sabre@nondot.org> |
Codegen copysign[f] into a FCOPYSIGN node
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26542 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
electionDAG.cpp
electionDAGISel.cpp
|
| a1deca3cd62963c1f5a7c48e7e5e67fec9beadaa |
05-Mar-2006 |
Chris Lattner <sabre@nondot.org> |
fold (mul (add x, c1), c2) -> (add (mul x, c2), c1*c2)
fold (shl (add x, c1), c2) -> (add (shl x, c2), c1<<c2)
This allows us to compile CodeGen/PowerPC/addi-reassoc.ll into:
_test1:
slwi r2, r4, 4
add r2, r2, r3
lwz r3, 36(r2)
blr
_test2:
mulli r2, r4, 5
add r2, r2, r3
lbz r2, 11(r2)
extsb r3, r2
blr
instead of:
_test1:
addi r2, r4, 2
slwi r2, r2, 4
add r2, r3, r2
lwz r3, 4(r2)
blr
_test2:
addi r2, r4, 2
mulli r2, r2, 5
add r2, r3, r2
lbz r2, 1(r2)
extsb r3, r2
blr
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26535 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 3e1ce5a44d3d59b2b9ca68a21261f0f487d69269 |
03-Mar-2006 |
Evan Cheng <evan.cheng@apple.com> |
Add more vector NodeTypes: VSDIV, VUDIV, VAND, VOR, and VXOR.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26504 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
electionDAGISel.cpp
|
| 33143dce15c0dc4155ff4cf2e375a9a59c8a5d61 |
03-Mar-2006 |
Evan Cheng <evan.cheng@apple.com> |
Number of NodeTypes now exceeds 128.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26503 91177308-0d34-0410-b5e6-96231b3b80d8
argetLowering.cpp
|
| bfa284f69752c54f81bffc2b0d15d5c1e618a659 |
03-Mar-2006 |
Evan Cheng <evan.cheng@apple.com> |
SDOperand::isOperand should not be a forwarding. It must check *this against N's operands.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26502 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 80d8eaae05d9bcb25abf6c6f0385ec2554355f26 |
03-Mar-2006 |
Evan Cheng <evan.cheng@apple.com> |
Added isOperand(N): true if this is an operand of N
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26501 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| fb43331226ae41cac862972c52a05f6c05dfcf19 |
03-Mar-2006 |
Evan Cheng <evan.cheng@apple.com> |
A bit more tweaking
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26500 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGList.cpp
|
| d84525480ae75e783b2a4d9a9480f1ec11222ce3 |
03-Mar-2006 |
Jeff Cohen <jeffc@jolt-lang.org> |
Fix VC++ compilation errors.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26498 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGList.cpp
|
| 41edaa0529997e41a2bd64efd5f3e8027c67d99f |
03-Mar-2006 |
Chris Lattner <sabre@nondot.org> |
remove the read/write port/io intrinsics.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26479 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
electionDAG.cpp
electionDAGISel.cpp
|
| 03dd4652158f8a4c1db65f066195342d4a3695a7 |
03-Mar-2006 |
Chris Lattner <sabre@nondot.org> |
Split memcpy/memset/memmove intrinsics into i32/i64 versions, resolving
PR709, and paving the way for future progress.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26476 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 86ec7d1d073dae5b75ad5749f65fc54c141180f5 |
02-Mar-2006 |
Evan Cheng <evan.cheng@apple.com> |
- Fixed some priority calculation bugs that were causing bug 478. Among them:
a predecessor appearing more than once in the operand list was counted as
multiple predecessor; priority1 should be updated during scheduling;
CycleBound was updated after the node is inserted into priority queue; one
of the tie breaking condition was flipped.
- Take into consideration of two address opcodes. If a predecessor is a def&use
operand, it should have a higher priority.
- Scheduler should also favor floaters, i.e. nodes that do not have real
predecessors such as MOV32ri.
- The scheduling fixes / tweaks fixed bug 478:
.text
.align 4
.globl _f
_f:
movl 4(%esp), %eax
movl 8(%esp), %ecx
movl %eax, %edx
imull %ecx, %edx
imull %eax, %eax
imull %ecx, %ecx
addl %eax, %ecx
leal (%ecx,%edx,2), %eax
ret
It is also a slight performance win (1% - 3%) for most tests.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26470 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGList.cpp
|
| 1ec05d1bb4e8903321caf29f57a805952f5b8b86 |
01-Mar-2006 |
Chris Lattner <sabre@nondot.org> |
Fix CodeGen/Generic/2006-03-01-dagcombineinfloop.ll, an infinite loop
in the dag combiner on 176.gcc on x86.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26459 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| b2742f4a2693510aa77d69f6e91fd8983e07680f |
01-Mar-2006 |
Chris Lattner <sabre@nondot.org> |
Fix a typo evan noticed
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26454 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 2466472a2b6a2992a65efdc4634bcee08d23d8a8 |
01-Mar-2006 |
Chris Lattner <sabre@nondot.org> |
Add support for target-specific dag combines
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26443 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 00ffed0468ad406062b7c08c2ff46d79d2d1be4d |
01-Mar-2006 |
Chris Lattner <sabre@nondot.org> |
Add interfaces for targets to provide target-specific dag combiner optimizations.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26442 91177308-0d34-0410-b5e6-96231b3b80d8
argetLowering.cpp
|
| 5750df9d695bf5aea6d672d00fdfb4243984fd38 |
01-Mar-2006 |
Chris Lattner <sabre@nondot.org> |
Add a new AddToWorkList method, start using it
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26441 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 0b1a85f110c4ed50f7adf181490d9f6a1b4f55a5 |
01-Mar-2006 |
Chris Lattner <sabre@nondot.org> |
Pull shifts by a constant through multiplies (a form of reassociation),
implementing Regression/CodeGen/X86/mul-shift-reassoc.ll
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26440 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 860771d2d86243b65ec16fac6cc57b285078f138 |
01-Mar-2006 |
Evan Cheng <evan.cheng@apple.com> |
Vector ops lowering.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26436 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
egalizeDAG.cpp
electionDAGISel.cpp
|
| 1ab7d859cf5c490612799d7e132c0b1c39f8f497 |
01-Mar-2006 |
Evan Cheng <evan.cheng@apple.com> |
- Added VConstant as an abstract version of ConstantVec.
- All abstrct vector nodes must have # of elements and element type as their
first two operands.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26432 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 35a9f5a24114f65002504b2276ee1b553f282058 |
28-Feb-2006 |
Chris Lattner <sabre@nondot.org> |
Compile:
unsigned foo4(unsigned short *P) { return *P & 255; }
unsigned foo5(short *P) { return *P & 255; }
to:
_foo4:
lbz r3,1(r3)
blr
_foo5:
lbz r3,1(r3)
blr
not:
_foo4:
lhz r2, 0(r3)
rlwinm r3, r2, 0, 24, 31
blr
_foo5:
lhz r2, 0(r3)
rlwinm r3, r2, 0, 24, 31
blr
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26419 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 15045b6973bfe7a5adda8c0fb53bb1b0cdc06b8d |
28-Feb-2006 |
Chris Lattner <sabre@nondot.org> |
Fold "and (LOAD P), 255" -> zextload. This allows us to compile:
unsigned foo3(unsigned *P) { return *P & 255; }
as:
_foo3:
lbz r3, 3(r3)
blr
instead of:
_foo3:
lwz r2, 0(r3)
rlwinm r3, r2, 0, 24, 31
blr
and:
unsigned short foo2(float a) { return a; }
as:
_foo2:
fctiwz f0, f1
stfd f0, -8(r1)
lhz r3, -2(r1)
blr
instead of:
_foo2:
fctiwz f0, f1
stfd f0, -8(r1)
lwz r2, -4(r1)
rlwinm r3, r2, 0, 16, 31
blr
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26417 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 71d9ebcbc1c74848372e11c96989ede974b2366d |
28-Feb-2006 |
Chris Lattner <sabre@nondot.org> |
fold (sra (sra x, c1), c2) -> (sra x, c1+c2)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26416 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 22873462c965a57664c4e375aa6e8bf02c9c6ad8 |
28-Feb-2006 |
Chris Lattner <sabre@nondot.org> |
Add support for output memory constraints.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26410 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| a6bc5a4d2138ea3cba90f5a794dd525228ec2c73 |
27-Feb-2006 |
Chris Lattner <sabre@nondot.org> |
Implement bit propagation through sub nodes, this (re)implements
PowerPC/div-2.ll
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26392 91177308-0d34-0410-b5e6-96231b3b80d8
argetLowering.cpp
|
| 2d2536c9d7669c1ba809664dd164be50222183dd |
27-Feb-2006 |
Chris Lattner <sabre@nondot.org> |
remove some completed notes
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26390 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 81cd35586f5b675faf5391e1f597908bdda5338e |
27-Feb-2006 |
Chris Lattner <sabre@nondot.org> |
Check RHS simplification before LHS simplification to avoid infinitely looping
on PowerPC/small-arguments.ll
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26389 91177308-0d34-0410-b5e6-96231b3b80d8
argetLowering.cpp
|
| 5f0c658aa40c6d1475f7c9daa72497362fbee216 |
27-Feb-2006 |
Chris Lattner <sabre@nondot.org> |
Just like we use the RHS of an AND to simplify the LHS, use the LHS to
simplify the RHS. This allows for the elimination of many thousands of
ands from multisource, and compiles CodeGen/PowerPC/and-elim.ll:test2
into this:
_test2:
srwi r2, r3, 1
xori r3, r2, 40961
blr
instead of this:
_test2:
rlwinm r2, r3, 31, 17, 31
xori r2, r2, 40961
rlwinm r3, r2, 0, 16, 31
blr
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26388 91177308-0d34-0410-b5e6-96231b3b80d8
argetLowering.cpp
|
| ec665151b891bf59d7c7c6cab180a978e2c20265 |
27-Feb-2006 |
Chris Lattner <sabre@nondot.org> |
Add a bunch of missed cases. Perhaps the most significant of which is that
assertzext produces zero bits.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26386 91177308-0d34-0410-b5e6-96231b3b80d8
argetLowering.cpp
|
| 38b7327ec02fbc6f163905ac85ea55d357dece51 |
26-Feb-2006 |
Evan Cheng <evan.cheng@apple.com> |
Print ConstantPoolSDNode offset field.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26381 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 404cb4f9fa2df50eac4d84b8a77c84a92188c6d5 |
25-Feb-2006 |
Evan Cheng <evan.cheng@apple.com> |
Added an offset field to ConstantPoolSDNode.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26371 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAG.cpp
electionDAG.cpp
|
| daf6bc6347b4785102611bdf21c512e8a7678cce |
24-Feb-2006 |
Chris Lattner <sabre@nondot.org> |
Pass all the flags to the asm printer, not just the # operands.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26362 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAG.cpp
|
| fd6d282a7154fd724e7fe6abaac358bb3041cb23 |
24-Feb-2006 |
Chris Lattner <sabre@nondot.org> |
rename NumOps -> NumVals to avoid shadowing a NumOps var in an outer scope.
Add support for addressing modes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26361 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAG.cpp
|
| ed18b6896ee244b1484daea3fbd5987bea25658f |
24-Feb-2006 |
Chris Lattner <sabre@nondot.org> |
Refactor operand adding out to a new AddOperand method
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26358 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAG.cpp
|
| 7e88103cdea8c36b2229dae8c60def14e3816512 |
24-Feb-2006 |
Jeff Cohen <jeffc@jolt-lang.org> |
Get VC++ building again.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26351 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 0e43f2ba114df7bfc1f70d0ef62b663f6ea4c09d |
24-Feb-2006 |
Chris Lattner <sabre@nondot.org> |
Implement (most of) selection of inline asm memory operands.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26350 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 87bc3bd1213ced06eade93e3267178198d41a381 |
24-Feb-2006 |
Chris Lattner <sabre@nondot.org> |
Lower C_Memory operands.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26346 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 2b7401e28e0c3c18ef027345560f9ce5abeef4d2 |
24-Feb-2006 |
Chris Lattner <sabre@nondot.org> |
Recognize memory operand codes
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26345 91177308-0d34-0410-b5e6-96231b3b80d8
argetLowering.cpp
|
| 9f6637db10642fae51fa3628b7833c6999f7fdb3 |
23-Feb-2006 |
Chris Lattner <sabre@nondot.org> |
Fix an endianness problem on big-endian targets with expanded operands
to inline asms. Mark some methods const.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26334 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| c3a9f8d31ce93ba384bd2bbdd55c757b06600a15 |
23-Feb-2006 |
Chris Lattner <sabre@nondot.org> |
Record all of the expanded registers in the DAG and machine instr, fixing
several bugs in inline asm expanded operands.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26332 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAG.cpp
electionDAGISel.cpp
|
| 9b6fb5de49f30d03b3e3f2fcb99e777b3149b783 |
23-Feb-2006 |
Chris Lattner <sabre@nondot.org> |
This fixes a couple of problems with expansion
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26318 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| b3befd41b4b5aa882bed9796bbb097df29b505ac |
23-Feb-2006 |
Chris Lattner <sabre@nondot.org> |
Don't return registers from register classes that aren't legal.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26317 91177308-0d34-0410-b5e6-96231b3b80d8
argetLowering.cpp
|
| 864635ad7b3046d3042311423071152c613961de |
22-Feb-2006 |
Chris Lattner <sabre@nondot.org> |
Change a whole bunch of code to be built around RegsForValue instead of
a single register number. This fully implements promotion for inline asms,
expand is close but not quite right yet.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26316 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 1efa40f6a4b561cf8f80fe018684236010645cd0 |
22-Feb-2006 |
Chris Lattner <sabre@nondot.org> |
split register class handling from explicit physreg handling.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26308 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
argetLowering.cpp
|
| 0f0b7d4927e56e622cf43da0db56f3e0d40b8aaf |
22-Feb-2006 |
Chris Lattner <sabre@nondot.org> |
Adjust to changes in getRegForInlineAsmConstraint prototype
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26306 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 4217ca8dc175f7268a4335c8406dedd901e8e631 |
22-Feb-2006 |
Chris Lattner <sabre@nondot.org> |
Updates to match change of getRegForInlineAsmConstraint prototype
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26305 91177308-0d34-0410-b5e6-96231b3b80d8
argetLowering.cpp
|
| 7d20d39009f89e7c2ab905d0b5dc3af059e7e886 |
20-Feb-2006 |
Chris Lattner <sabre@nondot.org> |
Fix a problem Nate and Duraid reported where simplifying nodes can cause
them to get ressurected, in which case, deleting the undead nodes is
unfriendly.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26291 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| dca7abed918c8191de6e258ddf394cf11de240f2 |
20-Feb-2006 |
Chris Lattner <sabre@nondot.org> |
Fix a problem on itanium with memset. The value to set has been promoted to
i64 before this code, so zero_ext doesn't work.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26290 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 003a272319d8871492edf9cecc25d9275b872f99 |
18-Feb-2006 |
Nate Begeman <natebegeman@mac.com> |
Add a fold for add that exchanges it with a constant shift if possible, so
that the shift may be more easily folded into other operations.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26286 91177308-0d34-0410-b5e6-96231b3b80d8
argetLowering.cpp
|
| b0d04a7deaf1ffc78f2eb85295af987a54223c00 |
18-Feb-2006 |
Nate Begeman <natebegeman@mac.com> |
Add checks to make sure we don't create bogus extend nodes, and fix a bug
where we were doing exactly that which was causing failures on x86 and
alpha.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26284 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
electionDAG.cpp
|
| 012f241987a017ea74d34d4c126997f84902ef61 |
17-Feb-2006 |
Chris Lattner <sabre@nondot.org> |
Fix a tricky issue in the SimplifyDemandedBits code where CombineTo wasn't
exactly the API we wanted to call into. This fixes the crash on crafty last
night.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26269 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
electionDAG.cpp
|
| fb7217bea3fe0472850798a0554c9b45689c4fbd |
17-Feb-2006 |
Nate Begeman <natebegeman@mac.com> |
Clean up DemandedBitsAreZero interface
Make more use of the new mask helpers in valuetypes.h
Combine (sra (srl x, c1), c1) -> sext_inreg if legal
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26263 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| cd6a6ed0a9d4b63535b430bf4c5c4396cd9d4e86 |
17-Feb-2006 |
Nate Begeman <natebegeman@mac.com> |
Don't expand sdiv by power of two before legalize, since it will likely
generate illegal nodes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26261 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 551bf3f80058a026b6a128dffd5530019e1df1b9 |
17-Feb-2006 |
Nate Begeman <natebegeman@mac.com> |
kill ADD_PARTS & SUB_PARTS and replace them with fancy new ADDC, ADDE, SUBC
and SUBE nodes that actually expose what's going on and allow for
significant simplifications in the targets.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26255 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
egalizeDAG.cpp
electionDAG.cpp
|
| 25125697fb0a761da440b222671cf2d6d4deaeac |
17-Feb-2006 |
Chris Lattner <sabre@nondot.org> |
Fix another miscompilation exposed by lencode, where we lowered i64->f32
conversions to __floatdidf instead of __floatdisf on targets that support
f32 but not i64 (e.g. sparc).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26254 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 5755b17044b5929b89f06f6f8d19e9ccd4d6c0c9 |
17-Feb-2006 |
Jeff Cohen <jeffc@jolt-lang.org> |
Fix bug noticed by VC++.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26252 91177308-0d34-0410-b5e6-96231b3b80d8
argetLowering.cpp
|
| cffbb5174f283d123d6bfc582292f4a9c84cb3ed |
17-Feb-2006 |
Evan Cheng <evan.cheng@apple.com> |
Dumb bug. Code sees a memcpy from X+c so it increments src offset. But it
turns out not to point to a constant string but it forgot change the offset
back.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26242 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 368e18d56a87308045d341e85584597bfe7426e9 |
16-Feb-2006 |
Nate Begeman <natebegeman@mac.com> |
Rework the SelectionDAG-based implementations of SimplifyDemandedBits
and ComputeMaskedBits to match the new improved versions in instcombine.
Tested against all of multisource/benchmarks on ppc.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26238 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
argetLowering.cpp
|
| 298ebf2bd80ca415e58bbcbd9866ee58f167b620 |
16-Feb-2006 |
Evan Cheng <evan.cheng@apple.com> |
If the false case is the current basic block, then this is a self loop.
We do not want to emit "Loop: ... brcond Out; br Loop", as it adds an extra
instruction in the loop. Instead, invert the condition and emit
"Loop: ... br!cond Loop; br Out.
Generalize the fix by moving it from PPCDAGToDAGISel to SelectionDAGLowering.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26231 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 8f4880be6675dbf1840446bc7a335f71ff557154 |
16-Feb-2006 |
Chris Lattner <sabre@nondot.org> |
Lowering of sdiv X, pow2 was broken, this fixes it. This patch is written
by Nate, I'm just committing it for him.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26230 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| a47876d87a84fa94bf9f09cfef6756223575611d |
15-Feb-2006 |
Evan Cheng <evan.cheng@apple.com> |
Remove an unused function parameter.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26221 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 74d0aa9a4b1f5e021d2ce851a7af344e9b4ebb23 |
15-Feb-2006 |
Evan Cheng <evan.cheng@apple.com> |
Turn a memcpy from string constant into a series of stores of constant values.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26219 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| d0e58e36a9857c45ecdc910ec8db04c21e143db5 |
15-Feb-2006 |
Jim Laskey <jlaskey@mac.com> |
Should not combine ISD::LOCATIONs until we have scheme to remove from
MachineDebugInfo tables.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26216 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
egalizeDAG.cpp
|
| c080d6fb3dc7769c5a1e00c6a77cb415453b0b89 |
15-Feb-2006 |
Evan Cheng <evan.cheng@apple.com> |
Lower memcpy with small constant size operand into a series of load / store
ops.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26195 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| dea7245997f37972ed2f94d4ca1ec50c5af5000a |
15-Feb-2006 |
Evan Cheng <evan.cheng@apple.com> |
Doh again!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26188 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| c4f8eee05447a1d7ead3deabbeb087e3e037f3f8 |
14-Feb-2006 |
Evan Cheng <evan.cheng@apple.com> |
Keep to < 80 cols
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26177 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| ac940ab1bf21be40f74a83b202419a20ad2e279f |
14-Feb-2006 |
Evan Cheng <evan.cheng@apple.com> |
Missed a break so memcpy cases fell through to memset. Doh.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26176 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 80e89d7d6c02233a92d26bd4625e4188d48cbfa1 |
14-Feb-2006 |
Evan Cheng <evan.cheng@apple.com> |
Fixed a build breakage.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26175 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| a03a5dc7ce876dac4b3b91bae14216de4233bacd |
14-Feb-2006 |
Evan Cheng <evan.cheng@apple.com> |
Rename maxStoresPerMemSet to maxStoresPerMemset, etc.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26174 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
argetLowering.cpp
|
| 1db92f947cc600dee5edb9305a4e0f1c5c872965 |
14-Feb-2006 |
Evan Cheng <evan.cheng@apple.com> |
Expand memset dst, c, size to a series of stores if size falls below the
target specific theshold, e.g. 16 for x86.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26171 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 06a248c9b398049d41cf6dd1a3f9eecc75603401 |
14-Feb-2006 |
Chris Lattner <sabre@nondot.org> |
now that libcalls don't suck, we can remove this hack
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26164 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 4b653a0405bb16b555334d134c1eb8a97366ec3d |
14-Feb-2006 |
Chris Lattner <sabre@nondot.org> |
Fix a latent bug in the call sequence handling stuff. Some targets (e.g. x86)
create these nodes with flag results. Remember that we legalized them.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26156 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| d96185aa62dacf5c75d889231a8ab2e0f1ceb073 |
13-Feb-2006 |
Jim Laskey <jlaskey@mac.com> |
Rename to better reflect usage (current and planned.)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26145 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 6831a815999dde4cf801e2076e66b4943964daf2 |
13-Feb-2006 |
Chris Lattner <sabre@nondot.org> |
Completely rewrite libcall insertion by the legalizer, providing the
following handy-dandy properties:
1. it is always correct now
2. it is much faster than before
3. it is easier to understand
This implementation builds off of the recent simplifications of the
legalizer that made it single-pass instead of iterative.
This fixes JM/lencod, JM/ldecod, and
CodeGen/Generic/2006-02-12-InsertLibcall.ll (at least on PPC).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26144 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| ce72b1755f5993a42c2e04e32a93fa5228a285d4 |
11-Feb-2006 |
Jim Laskey <jlaskey@mac.com> |
Reorg for integration with gcc4. Old style debug info will not be passed though
to SelIDAG.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26115 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| fae9f1cb34d6d2c4dbd007f2d748a70b67776a82 |
09-Feb-2006 |
Evan Cheng <evan.cheng@apple.com> |
Added SelectionDAG::InsertISelMapEntry(). This is used to workaround the gcc
problem where it inline the map insertion call too aggressively. Before this
change it was producing a frame size of 24k for Select_store(), now it's down
to 10k (by calling this method rather than calling the map insertion operator).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26094 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 6ae46c4c8757237bca2b78b589c96c37015bc356 |
09-Feb-2006 |
Evan Cheng <evan.cheng@apple.com> |
More changes to reduce frame size.
Move all getTargetNode() out of SelectionDAG.h into SelectionDAG.cpp. This
prevents them from being inlined.
Change getTargetNode() so they return SDNode * instead of SDOperand to prevent
copying. It should also help compilation speed.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26083 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 948d9668a7bc96b435de7ebc1b4a28b70aeb0fc3 |
09-Feb-2006 |
Chris Lattner <sabre@nondot.org> |
Make MachineConstantPool entries alignments explicit
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26071 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAG.cpp
|
| 3391bcd434c644747f6340e8077b3dac858b9d5d |
08-Feb-2006 |
Chris Lattner <sabre@nondot.org> |
Compile this:
xori r6, r2, 1
rlwinm r6, r6, 0, 31, 31
cmpwi cr0, r6, 0
bne cr0, LBB1_3 ; endif
to this:
rlwinm r6, r2, 0, 31, 31
cmpwi cr0, r6, 0
beq cr0, LBB1_3 ; endif
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26047 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| be71442292e89b2e0cca61a8ecca9997df319d93 |
05-Feb-2006 |
Nate Begeman <natebegeman@mac.com> |
Back out previous commit, it isn't safe.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26006 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| bab9239d0572d35a08423782eb964e532c3c6524 |
05-Feb-2006 |
Nate Begeman <natebegeman@mac.com> |
fold c1 << (x + c2) into (c1 << c2) << x. fix a warning.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26005 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| c031e33b68168ee776b825b01eca83c56b2b2996 |
05-Feb-2006 |
Nate Begeman <natebegeman@mac.com> |
Handle urem by shifted powers of 2.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26001 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| fb5e4bdded9c204c5f50c4770431544c074ef7bb |
05-Feb-2006 |
Nate Begeman <natebegeman@mac.com> |
handle combining A / (B << N) into A >>u (log2(B)+N) when B is a power of 2
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26000 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 4ee621125876cc954cba5280dd9395552755a871 |
05-Feb-2006 |
Evan Cheng <evan.cheng@apple.com> |
* Added SDNode::isOnlyUse().
* Fix hasNUsesOfValue(), it should be const.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25990 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| f3afef3b3a9d7c4ca69d4b0306a684a61e1e50d5 |
04-Feb-2006 |
Jeff Cohen <jeffc@jolt-lang.org> |
Fix VC++ warning.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25975 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAG.cpp
|
| cccf1232a69e2d78516c61a97e7bfa26acefb714 |
04-Feb-2006 |
Evan Cheng <evan.cheng@apple.com> |
Get rid of some memory leaks identified by Valgrind
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25960 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAG.cpp
electionDAGISel.cpp
|
| dc19b70d24e5fc0b80da36240550e31eb6ee4ee8 |
04-Feb-2006 |
Chris Lattner <sabre@nondot.org> |
Add initial support for immediates. This allows us to compile this:
int %rlwnm(int %A, int %B) {
%C = call int asm "rlwnm $0, $1, $2, $3, $4", "=r,r,r,n,n"(int %A, int %B, int 4, int 17)
ret int %C
}
into:
_rlwnm:
or r2, r3, r3
or r3, r4, r4
rlwnm r2, r2, r3, 4, 17 ;; note the immediates :)
or r3, r2, r2
blr
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25955 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAG.cpp
electionDAGISel.cpp
|
| 3d81fee8511536962543cbf420fd70ef15ae9c3a |
04-Feb-2006 |
Chris Lattner <sabre@nondot.org> |
Initial early support for non-register operands, like immediates
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25952 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| eb8146b5ee4b9b66d6294f62a5ed556e332018ab |
04-Feb-2006 |
Chris Lattner <sabre@nondot.org> |
implementation of some methods for inlineasm
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25951 91177308-0d34-0410-b5e6-96231b3b80d8
argetLowering.cpp
|
| 244d1dccd11fc4b35f6d90e08631cc40f722ff95 |
03-Feb-2006 |
Nate Begeman <natebegeman@mac.com> |
Implement some feedback from sabre
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25946 91177308-0d34-0410-b5e6-96231b3b80d8
argetLowering.cpp
|
| de99629e2ae8cd7cc731328d2ad6ed6b8e759f2c |
03-Feb-2006 |
Nate Begeman <natebegeman@mac.com> |
Add a framework for eliminating instructions that produces undemanded bits.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25945 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
argetLowering.cpp
|
| 7632e2beb4f0eacc49d580cbf23c89f24ad07ce9 |
03-Feb-2006 |
Chris Lattner <sabre@nondot.org> |
remove some #ifdef'd out code, which should properly be in the dag combiner anyway.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25941 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| eefae25034a116d8cd1639f61e2920e913f2259f |
03-Feb-2006 |
Chris Lattner <sabre@nondot.org> |
remove dead fn
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25935 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| cd4d58cef1b932fe6ae66fdccdb2f69e80bbb734 |
03-Feb-2006 |
Nate Begeman <natebegeman@mac.com> |
Add common code for reassociating ops in the dag combiner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25934 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 9fda2f9106112a522aecf080c016ea5317f52b21 |
03-Feb-2006 |
Evan Cheng <evan.cheng@apple.com> |
Added case HANDLENODE to getOperationName().
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25920 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 3603cd62aed5cc54ec626848d0195eed2958312a |
02-Feb-2006 |
Chris Lattner <sabre@nondot.org> |
Turn any_extend nodes into zero_extend nodes when it allows us to remove an
and instruction. This allows us to compile stuff like this:
bool %X(int %X) {
%Y = add int %X, 14
%Z = setne int %Y, 12345
ret bool %Z
}
to this:
_X:
cmpl $12331, 4(%esp)
setne %al
movzbl %al, %eax
ret
instead of this:
_X:
cmpl $12331, 4(%esp)
setne %al
movzbl %al, %eax
andl $1, %eax
ret
This occurs quite a bit with the X86 backend. For example, 25 times in
lambda, 30 times in 177.mesa, 14 times in galgel, 70 times in fma3d,
25 times in vpr, several hundred times in gcc, ~45 times in crafty,
~60 times in parser, ~140 times in eon, 110 times in perlbmk, 55 on gap,
16 times on bzip2, 14 times on twolf, and 1-2 times in many other SPEC2K
programs.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25901 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 9a06cce0f2088a298f357b933fb7d8e268f6ca52 |
02-Feb-2006 |
Chris Lattner <sabre@nondot.org> |
Implement MaskedValueIsZero for ANY_EXTEND nodes
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25900 91177308-0d34-0410-b5e6-96231b3b80d8
argetLowering.cpp
|
| b3ddfc42af8d6f5c4b168797ccbcb6b55cb9397f |
02-Feb-2006 |
Chris Lattner <sabre@nondot.org> |
add two dag combines:
(C1-X) == C2 --> X == C1-C2
(X+C1) == C2 --> X == C2-C1
This allows us to compile this:
bool %X(int %X) {
%Y = add int %X, 14
%Z = setne int %Y, 12345
ret bool %Z
}
into this:
_X:
cmpl $12331, 4(%esp)
setne %al
movzbl %al, %eax
andl $1, %eax
ret
not this:
_X:
movl $14, %eax
addl 4(%esp), %eax
cmpl $12345, %eax
setne %al
movzbl %al, %eax
andl $1, %eax
ret
Testcase here: Regression/CodeGen/X86/compare-add.ll
nukage of the and coming up next.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25898 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 1e8791d790ad3a3bbc141eb8a7ff326b618d799c |
02-Feb-2006 |
Chris Lattner <sabre@nondot.org> |
make -debug output less newliney
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25895 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGList.cpp
|
| 2223aea6ed33e4261d506afdcfbf30ccd8f52bfb |
02-Feb-2006 |
Chris Lattner <sabre@nondot.org> |
Implement matching constraints. We can now say things like this:
%C = call int asm "xyz $0, $1, $2, $3", "=r,r,r,0"(int %A, int %B, int 4)
and get:
xyz r2, r3, r4, r2
note that the r2's are pinned together. Yaay for 2-address instructions.
2342 ----------------------------------------------------------------------
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25893 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| da06e9e665a1a94886541ed85e97315f58b357b0 |
01-Feb-2006 |
Nate Begeman <natebegeman@mac.com> |
*** empty log message ***
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25879 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 4e4b576e2edfc7d40a3d7177c639acbe91cfd45f |
01-Feb-2006 |
Chris Lattner <sabre@nondot.org> |
Implement simple register assignment for inline asms. This allows us to compile:
int %test(int %A, int %B) {
%C = call int asm "xyz $0, $1, $2", "=r,r,r"(int %A, int %B)
ret int %C
}
into:
(0x8906130, LLVM BB @0x8902220):
%r2 = OR4 %r3, %r3
%r3 = OR4 %r4, %r4
INLINEASM <es:xyz $0, $1, $2>, %r2<def>, %r2, %r3
%r3 = OR4 %r2, %r2
BLR
which asmprints as:
_test:
or r2, r3, r3
or r3, r4, r4
xyz $0, $1, $2 ;; need to print the operands now :)
or r3, r2, r2
blr
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25878 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 750ac1bdfa6f09bddfd9efce1d6360dde8fa74c0 |
01-Feb-2006 |
Nate Begeman <natebegeman@mac.com> |
Fix some of the stuff in the PPC README file, and clean up legalization
of the SELECT_CC, BR_CC, and BRTWOWAY_CC nodes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25875 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
egalizeDAG.cpp
|
| a55079a5ccdf0cdb4d482fb47a3fb21825f56713 |
01-Feb-2006 |
Chris Lattner <sabre@nondot.org> |
Beef up the interface to inline asm constraint parsing, making it more general, useful, and easier to use.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25866 91177308-0d34-0410-b5e6-96231b3b80d8
argetLowering.cpp
|
| 2cc2f66c25d9576743026688fdae5ed402726532 |
01-Feb-2006 |
Chris Lattner <sabre@nondot.org> |
adjust to changes in InlineAsm interface. Fix a few minor bugs.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25865 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| b8973bd8f50d7321635e1e07b81a880a0828d185 |
31-Jan-2006 |
Evan Cheng <evan.cheng@apple.com> |
Allow the specification of explicit alignments for constant pool entries.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25855 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAG.cpp
electionDAG.cpp
|
| 59ad781e0118021d1ca7dfbc9f8db2ed828745e0 |
31-Jan-2006 |
Evan Cheng <evan.cheng@apple.com> |
Allow custom lowering of fabs. I forgot to check in this change which
caused several test failures.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25852 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 19c5c4cca9edd0e1e2961879d3da164325af6d63 |
31-Jan-2006 |
Chris Lattner <sabre@nondot.org> |
Only insert an AND when converting from BR_COND to BRCC if needed.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25832 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 6656dd1a7888e6dabc82ebce734734127b1df6a7 |
31-Jan-2006 |
Chris Lattner <sabre@nondot.org> |
Handle physreg input/outputs. We now compile this:
int %test_cpuid(int %op) {
%B = alloca int
%C = alloca int
%D = alloca int
%A = call int asm "cpuid", "=eax,==ebx,==ecx,==edx,eax"(int* %B, int* %C, int* %D, int %op)
%Bv = load int* %B
%Cv = load int* %C
%Dv = load int* %D
%x = add int %A, %Bv
%y = add int %x, %Cv
%z = add int %y, %Dv
ret int %z
}
to this:
_test_cpuid:
sub %ESP, 16
mov DWORD PTR [%ESP], %EBX
mov %EAX, DWORD PTR [%ESP + 20]
cpuid
mov DWORD PTR [%ESP + 8], %ECX
mov DWORD PTR [%ESP + 12], %EBX
mov DWORD PTR [%ESP + 4], %EDX
mov %ECX, DWORD PTR [%ESP + 12]
add %EAX, %ECX
mov %ECX, DWORD PTR [%ESP + 8]
add %EAX, %ECX
mov %ECX, DWORD PTR [%ESP + 4]
add %EAX, %ECX
mov %EBX, DWORD PTR [%ESP]
add %ESP, 16
ret
... note the proper register allocation. :)
it is unclear to me why the loads aren't folded into the adds.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25827 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAG.cpp
electionDAGISel.cpp
|
| 73e142f2b6a3b5223de2d557d646f319ca8168cf |
30-Jan-2006 |
Chris Lattner <sabre@nondot.org> |
Fix a bug in my legalizer reworking that caused the X86 backend to not get
a chance to custom legalize setcc, which broke a bunch of C++ Codes.
Testcase here: CodeGen/X86/2006-01-30-LongSetcc.ll
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25821 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 0e753d617be1ff6a9ac0f894da9d2544e2489850 |
30-Jan-2006 |
Chris Lattner <sabre@nondot.org> |
don't insert an and node if it isn't needed here, this can prevent folding
of lowered target nodes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25804 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| c6fd6cd65c88ef1f11da43c11be0152cb69013a7 |
30-Jan-2006 |
Chris Lattner <sabre@nondot.org> |
Move MaskedValueIsZero from the DAGCombiner to the TargetLowering interface,making isMaskedValueZeroForTargetNode simpler, and useable from other partsof the compiler.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25803 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
argetLowering.cpp
|
| 5c413bc451f6e889639864fda6157be6a5f4fd7c |
30-Jan-2006 |
Chris Lattner <sabre@nondot.org> |
pass the address of MaskedValueIsZero into isMaskedValueZeroForTargetNode,
to permit recursion
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25799 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 87c890a9c2a8f9818772f3b9e359d301b246e3a4 |
30-Jan-2006 |
Chris Lattner <sabre@nondot.org> |
adjust prototype
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25798 91177308-0d34-0410-b5e6-96231b3b80d8
argetLowering.cpp
|
| 6862dbc446f2f633f6f4905d07a3bafd96741da2 |
29-Jan-2006 |
Chris Lattner <sabre@nondot.org> |
Fix RET of promoted values on targets that custom expand RET to a target node.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25794 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 68a17febc70d9beb5353454e0c6d136ca1e87605 |
29-Jan-2006 |
Chris Lattner <sabre@nondot.org> |
cleanups to the ValueTypeActions interface
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25785 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 3e6e8cc26b0f78e7e9164b59aaf7bdead6715127 |
29-Jan-2006 |
Chris Lattner <sabre@nondot.org> |
clean up interface to ValueTypeActions
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25783 91177308-0d34-0410-b5e6-96231b3b80d8
argetLowering.cpp
|
| 70814bc38435d61a8c7cc32f2375c09e21f12a8a |
29-Jan-2006 |
Chris Lattner <sabre@nondot.org> |
Remove some special case hacks for CALLSEQ_*, using UpdateNodeOperands
instead.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25780 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
electionDAG.cpp
|
| 8ca05e0c302e15d6365afd2a0ea5fe15c9e85758 |
29-Jan-2006 |
Chris Lattner <sabre@nondot.org> |
Allow custom expansion of ConstantVec nodes. PPC will use this in the future.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25774 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 3181a771ff5b2090b7ed55f9b18a684ea8fe625a |
29-Jan-2006 |
Chris Lattner <sabre@nondot.org> |
Legalize ConstantFP into TargetConstantFP when the target allows. Implement
custom expansion of ConstantFP nodes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25772 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
electionDAG.cpp
|
| 03d5e877fd30d7f18546e6df8fd60837081ad8cc |
29-Jan-2006 |
Chris Lattner <sabre@nondot.org> |
eliminate uses of SelectionDAG::getBR2Way_CC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25767 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
egalizeDAG.cpp
|
| c52ad4f04ea5f51a1b4c67e585acea5c0525fc3d |
28-Jan-2006 |
Chris Lattner <sabre@nondot.org> |
Use the new "UpdateNodeOperands" method to simplify LegalizeDAG and make it
faster. This cuts about 120 lines of code out of the legalizer (mostly code
checking to see if operands have changed).
It also fixes an ugly performance issue, where the legalizer cloned the entire
graph after any change. Now the "UpdateNodeOperands" method gives it a chance
to reuse nodes if the operands of a node change but not its opcode or valuetypes.
This speeds up instruction selection time on kimwitu++ by about 8.2% with a
release build.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25746 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 809ec110885ad7cc820889d789b06aaa3ea7358f |
28-Jan-2006 |
Chris Lattner <sabre@nondot.org> |
add another method variant
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25744 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| df6eb30fa9bc8600862cae18fce66da466188323 |
28-Jan-2006 |
Chris Lattner <sabre@nondot.org> |
add some methods for updating nodes
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25742 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 948c1b1cda280c6428dbeaa03a6c2c559dbb93f4 |
28-Jan-2006 |
Chris Lattner <sabre@nondot.org> |
minor tweaks
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25740 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 22cde6a518782cafc2115ad8d8233f79c9e9d52e |
28-Jan-2006 |
Chris Lattner <sabre@nondot.org> |
move a bunch of code, no other change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25739 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 7cd2997a83444b4ce14644db1a985f6c717f765e |
28-Jan-2006 |
Chris Lattner <sabre@nondot.org> |
remove a couple more now-extraneous legalizeop's
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25738 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 5c62f337fe846247f5e72acb32844e24b4f18b71 |
28-Jan-2006 |
Chris Lattner <sabre@nondot.org> |
fix a bug
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25737 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 456a93afcec7740c45cafa8354317f7b17987a6d |
28-Jan-2006 |
Chris Lattner <sabre@nondot.org> |
Several major changes:
1. Pull out the expand cases for BSWAP and CT* into a separate function,
reducing the size of LegalizeOp.
2. Fix a bug where expand(bswap i64) was wrong when i64 is legal.
3. Changed LegalizeOp/PromoteOp so that the legalizer never needs to be
iterative. It now operates in a single pass over the nodes.
4. Simplify a LOT of code, with a net reduction of ~280 lines.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25736 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 8137c9e41d69943ac84066e6c7a95390b84e29f2 |
28-Jan-2006 |
Chris Lattner <sabre@nondot.org> |
Eliminate the need for ExpandOp to set 'needsanotheriteration', as it already
relegalizes the stuff it returns.
Add the ability to custom expand ADD/SUB, so that targets don't need to deal
with ADD_PARTS/SUB_PARTS if they don't want.
Fix some obscure potential bugs and simplify code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25732 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 9c6b4b8c3a48aa420f6499ca6c1a356f74e100f8 |
28-Jan-2006 |
Chris Lattner <sabre@nondot.org> |
Instead of making callers of ExpandLibCall legalize the result, make
ExpandLibCall do it itself.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25731 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 0e8ea71a4f45b070aecfe9a896bbe402c8b175d6 |
28-Jan-2006 |
Chris Lattner <sabre@nondot.org> |
Eliminate the need to do another iteration of the legalizer after inserting
a libcall.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25730 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 04c62c78f451807b13520efbfe0f5d432bc755cb |
28-Jan-2006 |
Chris Lattner <sabre@nondot.org> |
remove method I just added
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25728 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 4f16e70faad0840357998059f7f296e5f5e412be |
28-Jan-2006 |
Chris Lattner <sabre@nondot.org> |
add a new callback
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25727 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 0aed7840ec8cc85f91b4aa6e69318bba0cbd1f03 |
28-Jan-2006 |
Nate Begeman <natebegeman@mac.com> |
Implement Promote for VAARG, and allow it to be custom promoted for people
who don't want the default behavior (Alpha).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25726 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
electionDAGISel.cpp
|
| 61af66e687561a821181f742677c38a933a6fea0 |
28-Jan-2006 |
Nate Begeman <natebegeman@mac.com> |
Add a missing case to the dag combiner.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25723 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 0ff5c27a00926e2ea4c99b3d5e62c55b29faf06b |
28-Jan-2006 |
Chris Lattner <sabre@nondot.org> |
Remove the ISD::CALL and ISD::TAILCALL nodes
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25721 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
electionDAG.cpp
|
| ee625573b5b39b91441fc6ea23f3ba415abdc71f |
27-Jan-2006 |
Nate Begeman <natebegeman@mac.com> |
Remove TLI.LowerReturnTo, and just let targets custom lower ISD::RET for
the same functionality. This addresses another piece of bug 680. Next,
on to fixing Alpha VAARG, which I broke last time.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25696 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| acc43bf4ab8d7fe6fdb0deee13931e4935fbf145 |
27-Jan-2006 |
Chris Lattner <sabre@nondot.org> |
Teach the scheduler to emit the appropriate INLINEASM MachineInstr for an
ISD::INLINEASM node.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25668 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAG.cpp
|
| ce7518ce92f45568dc7d4cbb863284afb962fec5 |
26-Jan-2006 |
Chris Lattner <sabre@nondot.org> |
initial selectiondag support for new INLINEASM node. Note that inline asms
with outputs or inputs are not supported yet. :)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25664 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
electionDAG.cpp
electionDAGISel.cpp
|
| 4ccb070f158b0f331c68de800c6bab8c31c2ecb6 |
26-Jan-2006 |
Chris Lattner <sabre@nondot.org> |
Implement a method for inline asm support
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25660 91177308-0d34-0410-b5e6-96231b3b80d8
argetLowering.cpp
|
| cdf3838bf180d7295c3a4eca5efd3e5a58b714fd |
26-Jan-2006 |
Evan Cheng <evan.cheng@apple.com> |
Clean up some code; improve efficiency; and fixed a potential bug involving
chain successors.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25630 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGList.cpp
|
| 2a8e6186e971743da51e9220753f7803a9fb3f88 |
25-Jan-2006 |
Reid Spencer <rspencer@reidspencer.com> |
Don't break the optimized build (by incorrect placement of #endif)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25613 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGList.cpp
|
| ee4a76563a84839453588104e94d4891fc44d625 |
25-Jan-2006 |
Chris Lattner <sabre@nondot.org> |
initialize an instance var, apparently I forgot to commit this long ago
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25609 91177308-0d34-0410-b5e6-96231b3b80d8
argetLowering.cpp
|
| 46c01cfe9f1c6900ea63df9c79094d0826fd9ecc |
25-Jan-2006 |
Evan Cheng <evan.cheng@apple.com> |
No need to keep track of top and bottom nodes in a group since the vector is
already in order. Thanks Jim for pointing it out.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25608 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAG.cpp
|
| 0577a22c678bd5e31047e6b8038c6917202271ee |
25-Jan-2006 |
Evan Cheng <evan.cheng@apple.com> |
Set SchedulingForLatency to be the default scheduling preference for all.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25607 91177308-0d34-0410-b5e6-96231b3b80d8
argetLowering.cpp
|
| acc398c195a697795bff3245943d104eb19192b9 |
25-Jan-2006 |
Nate Begeman <natebegeman@mac.com> |
First part of bug 680:
Remove TLI.LowerVA* and replace it with SDNodes that are lowered the same
way as everything else.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25606 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
electionDAG.cpp
electionDAGISel.cpp
|
| 44c687d0afa9be89e1dc45dca96713e58a94ccb8 |
25-Jan-2006 |
Jeff Cohen <jeffc@jolt-lang.org> |
Fix VC++ compilation error.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25604 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGList.cpp
|
| cd1419af1e9ef5472e09cd8a7c7eca971eae94ae |
25-Jan-2006 |
Evan Cheng <evan.cheng@apple.com> |
Bottom up register usage reducing list scheduler.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25601 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGList.cpp
|
| e0a58323747bfca126f698d4e89e719b36007bf7 |
25-Jan-2006 |
Evan Cheng <evan.cheng@apple.com> |
Keep track of bottom / top element of a set of flagged nodes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25600 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAG.cpp
|
| 3f23952404cd03a8ab934cedcef7916f52a796c0 |
25-Jan-2006 |
Evan Cheng <evan.cheng@apple.com> |
If scheduler choice is the default (-sched=default), use target scheduling
preference to determine which scheduler to use. SchedulingForLatency ==
Breadth first; SchedulingForRegPressure == bottom up register reduction list
scheduler.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25599 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 6a5428934ba6159c1acc541944332e51a6cfa59a |
24-Jan-2006 |
Chris Lattner <sabre@nondot.org> |
Fix an infinite loop I caused by making sure to legalize the flag operand
of CALLSEQ_* nodes
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25582 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
electionDAG.cpp
|
| 2aa750a874b31ecab56f923a714e43a029526e56 |
24-Jan-2006 |
Jeff Cohen <jeffc@jolt-lang.org> |
Fix VC++ compilation error.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25577 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGSimple.cpp
|
| 7cf11b4ab248d6ab7fb0d9df0b72baf158201abe |
23-Jan-2006 |
Andrew Lenharth <andrewl@lenharth.org> |
another couple selects
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25551 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 8c6f1ee5aa376118f1cb7b16b62994fc255eac56 |
23-Jan-2006 |
Andrew Lenharth <andrewl@lenharth.org> |
another selectto
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25548 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 17d52f723421ce28d1b9fe2fc058366ed43ec094 |
23-Jan-2006 |
Jim Laskey <jlaskey@mac.com> |
Typo.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25545 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| f0f9c90204c650b9f3c3feb02ccfcb1e40c6acdd |
23-Jan-2006 |
Evan Cheng <evan.cheng@apple.com> |
Skeleton of the list schedule.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25544 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGList.cpp
electionDAGISel.cpp
|
| 414842906419a345813bb72edf698df9acdaad87 |
23-Jan-2006 |
Evan Cheng <evan.cheng@apple.com> |
Minor clean up.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25543 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGSimple.cpp
|
| 67993f7b974cd17e4372a6b7b9f9cad5ed174df1 |
23-Jan-2006 |
Chris Lattner <sabre@nondot.org> |
Fix Regression/CodeGen/SparcV8/2006-01-22-BitConvertLegalize.ll by making
sure that the result of expanding a BIT_CONVERT node is itself legalized.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25538 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| dfeeac9f002454ccba362893f218fd2e6f502f48 |
23-Jan-2006 |
Evan Cheng <evan.cheng@apple.com> |
Remove a couple of unnecessary #include's
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25535 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAGSimple.cpp
|
| 4ef10867499aa146cd819c78d8d37a8353d4f0ff |
23-Jan-2006 |
Evan Cheng <evan.cheng@apple.com> |
Factor out more instruction scheduler code to the base class.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25532 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAG.cpp
cheduleDAGSimple.cpp
electionDAGISel.cpp
|
| 39a17dd31ddc4af6067940cb31e2c7d380773478 |
23-Jan-2006 |
Chris Lattner <sabre@nondot.org> |
Fix bugs lowering stackrestore, fixing 2004-08-12-InlinerAndAllocas.c on
PPC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25522 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 2c2c6c61f100bc7c3df873b11203fcea1b5e18fe |
23-Jan-2006 |
Chris Lattner <sabre@nondot.org> |
Add explicit #includes of <iostream>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25515 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| a3818e6f9a62db0c5b6aee28e44c30d5f96c9fa4 |
21-Jan-2006 |
Chris Lattner <sabre@nondot.org> |
Fix a bug in a recent refactor that caused a bunch of programs to miscompile
or the compiler to crash.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25503 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 348e93c8f7132c6ecbaf5866048e087feb7520e2 |
21-Jan-2006 |
Chris Lattner <sabre@nondot.org> |
Fix CodeGen/PowerPC/2006-01-20-ShiftPartsCrash.ll
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25496 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| a9c2091cd38e401c846391c9951ff416e709b65e |
21-Jan-2006 |
Evan Cheng <evan.cheng@apple.com> |
Do some code refactoring on Jim's scheduler in preparation of the new list
scheduler.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25493 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAG.cpp
cheduleDAGSimple.cpp
electionDAGISel.cpp
|
| a68d204843fc8b9606e7760fcddd20b99e8e340d |
20-Jan-2006 |
Chris Lattner <sabre@nondot.org> |
remove some unintentionally committed code
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25483 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 4eebb60f843e0aa67b62f3b8643101bc0e39531d |
20-Jan-2006 |
Chris Lattner <sabre@nondot.org> |
If the target doesn't support f32 natively, insert the FP_EXTEND in target-indep
code, so that the LowerReturn code doesn't have to handle it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25482 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
electionDAGISel.cpp
|
| 12f2274ba8c6af21e8b6c71ef872afe43a64b6d7 |
19-Jan-2006 |
Evan Cheng <evan.cheng@apple.com> |
Another typo
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25440 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 8ff318b7fb6185e94403c0a902f1132141847ac5 |
19-Jan-2006 |
Andrew Lenharth <andrewl@lenharth.org> |
was ignoring the legalized chain in this case, fixed SPASS on alpha
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25428 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| a148d9811a37a320adbf512276abcf42cc36d04c |
18-Jan-2006 |
Nate Begeman <natebegeman@mac.com> |
Get rid of code in the DAGCombiner that is duplicated in SelectionDAG.cpp
Now all constant folding in the code generator is in one place.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25426 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| d12b2d7b5ae73c6f1b89a30f12e9d30e731b2e20 |
18-Jan-2006 |
Chris Lattner <sabre@nondot.org> |
Temporary work around for a libcall insertion bug: If a target doesn't
support FSIN/FCOS nodes, do not lower sin/cos to them.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25425 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 4090aee72e0f29976c9b1e7a0e0c7b4456f645b5 |
18-Jan-2006 |
Chris Lattner <sabre@nondot.org> |
Fix a backwards conditional that caused an inf loop in some cases. This
fixes: test/Regression/CodeGen/Generic/2005-01-18-SetUO-InfLoop.ll
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25419 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 4eb2e3a6f45e6f0a4a8f0002918f8d14c34169c1 |
17-Jan-2006 |
Robert Bocchino <bocchino@illinois.edu> |
Support for the insertelement operation.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25405 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 433f8acefb78f1c8a2cf79c12b101ce7c4b20202 |
17-Jan-2006 |
Evan Cheng <evan.cheng@apple.com> |
Bug fix: missing LegalizeOp() on newly created nodes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25401 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 063e765345fd49df0f53b807e57ada7c2ded7e16 |
17-Jan-2006 |
Jim Laskey <jlaskey@mac.com> |
Adding basic support for Dwarf line number debug information.
I promise to keep future commits smaller.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25396 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 0b118206bf3411722707f2e5cab8fd2eedcd50d6 |
16-Jan-2006 |
Reid Spencer <rspencer@reidspencer.com> |
For PR411:
This patch is an incremental step towards supporting a flat symbol table.
It de-overloads the intrinsic functions by providing type-specific intrinsics
and arranging for automatically upgrading from the old overloaded name to
the new non-overloaded name. Specifically:
llvm.isunordered -> llvm.isunordered.f32, llvm.isunordered.f64
llvm.sqrt -> llvm.sqrt.f32, llvm.sqrt.f64
llvm.ctpop -> llvm.ctpop.i8, llvm.ctpop.i16, llvm.ctpop.i32, llvm.ctpop.i64
llvm.ctlz -> llvm.ctlz.i8, llvm.ctlz.i16, llvm.ctlz.i32, llvm.ctlz.i64
llvm.cttz -> llvm.cttz.i8, llvm.cttz.i16, llvm.cttz.i32, llvm.cttz.i64
New code should not use the overloaded intrinsic names. Warnings will be
emitted if they are used.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25366 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 1b5db7aaec8bbe350b1af42ecfe97c73f0e07d0f |
16-Jan-2006 |
Nate Begeman <natebegeman@mac.com> |
Constant fold ctpop/ctlz/cttz, and a couple other small cleanups
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25357 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| c02d98e335703d8aa51b42d9b22a1fa2ac5d6c33 |
16-Jan-2006 |
Nate Begeman <natebegeman@mac.com> |
Expand case for 64b Legalize, even though no one should end up using this
(itanium supports bswap natively, alpha should custom lower it using the
VAX floating point swapload, ha ha).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25356 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| bf40c4bfe1607980ea570ac69bf134cc4e58d0ca |
15-Jan-2006 |
Chris Lattner <sabre@nondot.org> |
Disable two transformations that contribute to bus errors on SparcV8.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25339 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 903d278a9b7398d8905c90832e587e0556c52789 |
15-Jan-2006 |
Chris Lattner <sabre@nondot.org> |
Allow the target to specify 'expand' if they just require the amount to
be subtracted from the stack pointer.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25331 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 5f652295c27826f26547cf5eb4096a59d86b56b8 |
15-Jan-2006 |
Chris Lattner <sabre@nondot.org> |
Fix custom lowering of dynamic_stackalloc
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25329 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| cc0aad20dd1bac26f7da21fb9720df76cc3c26e7 |
15-Jan-2006 |
Chris Lattner <sabre@nondot.org> |
add a missing node name
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25327 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| c0ab5226cc92b8d33104374a21896b8331f3fee1 |
14-Jan-2006 |
Chris Lattner <sabre@nondot.org> |
Token chain results are not always the first or last result. Consider copyfromreg nodes, where they are the middle result (the flag result is last)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25325 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 3a04ffbf6daa66e489aaf29f6c9c728d7272d8a8 |
14-Jan-2006 |
Nate Begeman <natebegeman@mac.com> |
Remove some duplicated code
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25313 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| d88fc03602947b5baa35c8b09fe8bcfa2b4a03c1 |
14-Jan-2006 |
Nate Begeman <natebegeman@mac.com> |
bswap implementation
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25312 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
electionDAGISel.cpp
|
| 4f0d8e4018d50c5796660a4fa167763f46259646 |
13-Jan-2006 |
Chris Lattner <sabre@nondot.org> |
If a target specified a stack pointer with setStackPointerRegisterToSaveRestore,
lower STACKSAVE/STACKRESTORE into a copy from/to that register.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25276 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 140d53c99c3a70b9d3858a3c87f8ecb098994748 |
13-Jan-2006 |
Chris Lattner <sabre@nondot.org> |
Compile llvm.stacksave/restore into STACKSAVE/STACKRESTORE nodes, and allow
targets to custom expand them as they desire.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25273 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
electionDAGISel.cpp
|
| 5a67afc118d47a0061ca9809c763451ea3125306 |
13-Jan-2006 |
Chris Lattner <sabre@nondot.org> |
add stacksave/stackrestore nodes
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25270 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| e8f7a4bbee5b29d0c94120e7e24365113758f0a2 |
13-Jan-2006 |
Chris Lattner <sabre@nondot.org> |
Add "support" for stacksave/stackrestore to the dag isel
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25268 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 4aafb4ff92ee6b5372aaaa51845445f2418a7fd1 |
12-Jan-2006 |
Chris Lattner <sabre@nondot.org> |
Add a simple missing fold to produce this:
subfic r3, r2, 33
instead of this:
subfic r2, r2, 32
addi r3, r2, 1
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25255 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| af551bcf6be6c2c44b1b5dac5573c58bdc3da972 |
12-Jan-2006 |
Chris Lattner <sabre@nondot.org> |
Don't create rotate instructions in unsupported types, because we don't have
promote/expand code yet. This fixes the 177.mesa failure on PPC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25250 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| a7dce3c6c29fb9513d215c1bc44b01865571b4c2 |
11-Jan-2006 |
Evan Cheng <evan.cheng@apple.com> |
Allow custom lowering of DYNAMIC_STACKALLOC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25224 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 140e99babce85d0a54fc5df7bdec4603e718ccb9 |
11-Jan-2006 |
Evan Cheng <evan.cheng@apple.com> |
ignore register #0
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25223 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 35ef913ec21de0f4f1b39c811b4335438717a9b8 |
11-Jan-2006 |
Nate Begeman <natebegeman@mac.com> |
Add bswap, rotl, and rotr nodes
Add dag combiner code to recognize rotl, rotr
Add ppc code to match rotl
Targets should add rotl/rotr patterns if they have them
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25222 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
egalizeDAG.cpp
electionDAG.cpp
|
| 269f8c069105e13f3845a8dbc7796ac9a15dc882 |
10-Jan-2006 |
Chris Lattner <sabre@nondot.org> |
silence a warning
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25184 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| c0f4cd99316b0b9ae10b5774d1036d74d838f0af |
10-Jan-2006 |
Robert Bocchino <bocchino@illinois.edu> |
Added selection DAG support for the extractelement operation.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25179 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| de387ce81024f9be0ca523e9487b1aafeb95fa22 |
10-Jan-2006 |
Chris Lattner <sabre@nondot.org> |
Fix an exponential function in libcall insertion to not be exponential. :)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25165 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 05a2d568c60b8d547a5ac78f99107c476e6612b5 |
09-Jan-2006 |
Evan Cheng <evan.cheng@apple.com> |
* Allow custom lowering of ADD_PARTS, SUB_PARTS, SHL_PARTS, SRA_PARTS,
and SRL_PARTS.
* Fix a bug that caused *_PARTS to be custom lowered twice.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25157 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 909addffc3c9391dfda2c67b7c05eeb42259eb90 |
09-Jan-2006 |
Evan Cheng <evan.cheng@apple.com> |
New getNode() variants.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25156 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 47f5beaaaf41ffa2db51da6f99314474be6aca7d |
06-Jan-2006 |
Chris Lattner <sabre@nondot.org> |
Unbreak the build :(
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25124 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 6907708c23303703c6f89e055d1c204c5abb27a5 |
06-Jan-2006 |
Evan Cheng <evan.cheng@apple.com> |
Revert the previous check-in. Leave shl x, 1 along for target to deal with.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25121 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| da95a84a11e684072ea25fbb9830e769039fd985 |
06-Jan-2006 |
Evan Cheng <evan.cheng@apple.com> |
fold (shl x, 1) -> (add x, x)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25120 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 17c428e23dbeac1f985d725905ce6be1c725491f |
06-Jan-2006 |
Evan Cheng <evan.cheng@apple.com> |
Support for custom lowering of ISD::RET.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25116 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| abf6d1784b2d4bbcb7d20ab64881f77d755059f6 |
05-Jan-2006 |
Jim Laskey <jlaskey@mac.com> |
Added initial support for DEBUG_LABEL allowing debug specific labels to be
inserted in the code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25104 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
egalizeDAG.cpp
electionDAG.cpp
|
| b2efb853f00d45b1c8d57f92acd0028fbdeffda6 |
04-Jan-2006 |
Jim Laskey <jlaskey@mac.com> |
Applied some recommend changes from sabre. The dominate one beginning "let the
pass manager do it's thing." Fixes crash when compiling -g files and suppresses
dwarf statements if no debug info is present.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25100 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
electionDAGISel.cpp
|
| 5bf6f25b4a888afaf3e37acd18c43186d45cac2e |
04-Jan-2006 |
Jim Laskey <jlaskey@mac.com> |
Add unique id to debug location for debug label use (work in progress.)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25096 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
egalizeDAG.cpp
|
| 7ca9ab3f5c1e9f2b1d4ded2389373ec672da217a |
04-Jan-2006 |
Jim Laskey <jlaskey@mac.com> |
Change how MachineDebugInfo is fetched.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25089 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 512beb9465ec9d22de6352eee4339e8295bfb79b |
30-Dec-2005 |
Nate Begeman <natebegeman@mac.com> |
Make sure to pass the offset into the new node, so that we don't silently
drop it on the floor.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25044 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| f65d917f71690dfc0e10f8d8d7672f3c2a84837e |
29-Dec-2005 |
Duraid Madina <duraid@octopus.com.au> |
purity++
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25041 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAG.cpp
|
| 57030e36e41ebd982a24632e7cea5b584b2d49fc |
25-Dec-2005 |
Andrew Lenharth <andrewl@lenharth.org> |
allow custom lowering to return null for legal results
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25007 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| e8f65f1e62ea1d4f2ca9fd0137ae2e0ce20e26e1 |
25-Dec-2005 |
Andrew Lenharth <andrewl@lenharth.org> |
Support Custom lowering of a few more operations.
Alpha needs to custom lower *DIV and *REM
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25006 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| d6e8d4134022a3b451439a631b41744e9e07c034 |
23-Dec-2005 |
Jim Laskey <jlaskey@mac.com> |
Remove redundant debug locations.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24995 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| c26f7a033f5416f216ef08929cbc8cb8df509ef3 |
23-Dec-2005 |
Chris Lattner <sabre@nondot.org> |
unbreak the build :-/
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24992 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| f3fd9fe20dbcb40f3dffc1518ab955a0b5d6fa23 |
23-Dec-2005 |
Evan Cheng <evan.cheng@apple.com> |
Allow custom lowering of LOAD, EXTLOAD, ZEXTLOAD, STORE, and TRUNCSTORE. Not
currently used.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24988 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| c33baaafb6fb59eb4077f7b2cadff6cf743ce605 |
23-Dec-2005 |
Chris Lattner <sabre@nondot.org> |
Simplify store(bitconv(x)) to store(x). This allows us to compile this:
void bar(double Y, double *X) {
*X = Y;
}
to this:
bar:
save -96, %o6, %o6
st %i1, [%i2+4]
st %i0, [%i2]
restore %g0, %g0, %g0
retl
nop
instead of this:
bar:
save -104, %o6, %o6
st %i1, [%i6+-4]
st %i0, [%i6+-8]
ldd [%i6+-8], %f0
std %f0, [%i2]
restore %g0, %g0, %g0
retl
nop
on sparcv8.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24983 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 5710410deaceab136878e73dc48b6d468cff9701 |
23-Dec-2005 |
Chris Lattner <sabre@nondot.org> |
fold (conv (load x)) -> (load (conv*)x).
This allows us to compile this:
void foo(double);
void bar(double *X) { foo(*X); }
To this:
bar:
save -96, %o6, %o6
ld [%i0+4], %o1
ld [%i0], %o0
call foo
nop
restore %g0, %g0, %g0
retl
nop
instead of this:
bar:
save -104, %o6, %o6
ldd [%i0], %f0
std %f0, [%i6+-8]
ld [%i6+-4], %o1
ld [%i6+-8], %o0
call foo
nop
restore %g0, %g0, %g0
retl
nop
on SparcV8.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24982 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| c8547d856d3459a61ca9e35b5342288fe626c295 |
23-Dec-2005 |
Chris Lattner <sabre@nondot.org> |
Fold bitconv(bitconv(x)) -> x. We now compile this:
void foo(double);
void bar(double X) { foo(X); }
to this:
bar:
save -96, %o6, %o6
or %g0, %i0, %o0
or %g0, %i1, %o1
call foo
nop
restore %g0, %g0, %g0
retl
nop
instead of this:
bar:
save -112, %o6, %o6
st %i1, [%i6+-4]
st %i0, [%i6+-8]
ldd [%i6+-8], %f0
std %f0, [%i6+-16]
ld [%i6+-12], %o1
ld [%i6+-16], %o0
call foo
nop
restore %g0, %g0, %g0
retl
nop
on V8.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24981 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
electionDAG.cpp
|
| 94683777aee436a0e5f12e08a4b3827a11265fb2 |
23-Dec-2005 |
Chris Lattner <sabre@nondot.org> |
constant fold bits_convert in getNode and in the dag combiner for fp<->int
conversions. This allows V8 to compiles this:
void %test() {
call float %test2( float 1.000000e+00, float 2.000000e+00, double 3.000000e+00, double* null )
ret void
}
into:
test:
save -96, %o6, %o6
sethi 0, %o3
sethi 1049088, %o2
sethi 1048576, %o1
sethi 1040384, %o0
or %g0, %o3, %o4
call test2
nop
restore %g0, %g0, %g0
retl
nop
instead of:
test:
save -112, %o6, %o6
sethi 0, %o4
sethi 1049088, %l0
st %o4, [%i6+-12]
st %l0, [%i6+-16]
ld [%i6+-12], %o3
ld [%i6+-16], %o2
sethi 1048576, %o1
sethi 1040384, %o0
call test2
nop
restore %g0, %g0, %g0
retl
nop
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24980 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
electionDAG.cpp
|
| 232348d66fcfe8f42f8b14cfacd2df3d00d2596e |
23-Dec-2005 |
Chris Lattner <sabre@nondot.org> |
Fix a pasto
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24973 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| ed7b5babfbdc708c564266052ad3b0ce0a5726c5 |
23-Dec-2005 |
Chris Lattner <sabre@nondot.org> |
fix a thinko in the bit_convert handling code
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24972 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 35481892da1e5634bf497c8a0cabb1bb5a8b8fef |
23-Dec-2005 |
Chris Lattner <sabre@nondot.org> |
add very simple support for the BIT_CONVERT node
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24970 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
electionDAG.cpp
|
| 0fcd40f501d99ce50b23f67e578a37f0943dec36 |
22-Dec-2005 |
Chris Lattner <sabre@nondot.org> |
remove dead code
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24965 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
electionDAG.cpp
|
| 1ccf26a6392034a11827aeaa0d58d025ecb2b85a |
22-Dec-2005 |
Chris Lattner <sabre@nondot.org> |
The 81st column doesn't like code in it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24943 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| ff9be11da215602358e9358c3ff2d7d08c319bab |
22-Dec-2005 |
Evan Cheng <evan.cheng@apple.com> |
Lefted out TargetLowering::
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24922 91177308-0d34-0410-b5e6-96231b3b80d8
argetLowering.cpp
|
| 3a03ebb37747c2b3fd9b4f8b44f1124f53727894 |
22-Dec-2005 |
Evan Cheng <evan.cheng@apple.com> |
* Fix a GlobalAddress lowering bug.
* Teach DAG combiner about X86ISD::SETCC by adding a TargetLowering hook.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24921 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
argetLowering.cpp
|
| e81aecbae69d4b3bd24523ec87673632d3b0beec |
21-Dec-2005 |
Jim Laskey <jlaskey@mac.com> |
Disengage DEBUG_LOC from non-PPC targets.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24919 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
cheduleDAG.cpp
|
| d5781fca4f8f98863560338d4f8d017389428119 |
21-Dec-2005 |
Evan Cheng <evan.cheng@apple.com> |
* Added support for X86 RET with an additional operand to specify number of
bytes to pop off stack.
* Added support for X86 SETCC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24917 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| f9dee6a0473db4f3713bf40c7408fa30578ac141 |
21-Dec-2005 |
Chris Lattner <sabre@nondot.org> |
make sure to relegalize all cases
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24911 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 9797c5cc3ebc2c78ff30866ce0650d87ea02946c |
21-Dec-2005 |
Chris Lattner <sabre@nondot.org> |
enable the gep isel opt
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24910 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 83397363348662e9352455ea1e6e88e7026300a4 |
21-Dec-2005 |
Chris Lattner <sabre@nondot.org> |
fix a bug I introduced that broke recursive expansion of nodes (e.g. scalarizing vectors)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24905 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 3b841e9f52611c1f92c60f979c775adf2c1fe22d |
21-Dec-2005 |
Chris Lattner <sabre@nondot.org> |
Lower ConstantAggregateZero into zeros
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24890 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 7226158d7e3986e55b58214a749aa4eabb3fb6d5 |
20-Dec-2005 |
Evan Cheng <evan.cheng@apple.com> |
Added a hook to print out names of target specific DAG nodes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24877 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
argetLowering.cpp
|
| 69a889eb35d59a10e78a07cc26d41cbab31eddce |
20-Dec-2005 |
Chris Lattner <sabre@nondot.org> |
Fix a nasty latent bug in the legalizer that was triggered by my patch
last night, breaking crafty and twolf. Make sure that the newly found
legal nodes are themselves not re-legalized until the next iteration.
Also, since this functionality exists now, we can reduce number of legalizer
iterations by depending on this behavior instead of having to misuse 'do
another iteration' to get the same effect.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24875 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 898101c15fa11a896deb4e2fcb73b4727e1dcc1f |
20-Dec-2005 |
Evan Cheng <evan.cheng@apple.com> |
X86 conditional branch support.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24870 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 115c036a4c83cd277ffac0867a21b34f63829db7 |
20-Dec-2005 |
Evan Cheng <evan.cheng@apple.com> |
Print out opcode number if it's an unknown target node.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24869 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 9f8cc69009468a5096e32e897060ee0b5b9dddd8 |
19-Dec-2005 |
Chris Lattner <sabre@nondot.org> |
Fix a case where the DAG Combiner would accidentally CSE flag-producing nodes,
creating graphs that cannot be scheduled.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24866 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| d845582d4a4b866513f6e3b656dc80d59dc9c05b |
19-Dec-2005 |
Jim Laskey <jlaskey@mac.com> |
Amend comment.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24861 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAG.cpp
|
| de48ee28a319f3990dcaac637b6dad78d48ab61f |
19-Dec-2005 |
Jim Laskey <jlaskey@mac.com> |
Create a strong dependency for loads following stores. This will leave a
latency period between the two.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24860 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAG.cpp
|
| e773673d8e0094bbff2f9ab2f2da9ecb5c4d0909 |
19-Dec-2005 |
Chris Lattner <sabre@nondot.org> |
Make sure to relegalize new nodes
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24843 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 18840db533de12aaabbc3b7bdce7a4d1688f323e |
18-Dec-2005 |
Jeff Cohen <jeffc@jolt-lang.org> |
Keep VC++ happy.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24835 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAG.cpp
|
| f1a47c3371ecd5bb449f39736a36ebbebd4e9e14 |
18-Dec-2005 |
Chris Lattner <sabre@nondot.org> |
More corrections for flagged copyto/from reg
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24828 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 7310fb11f2a074069bf9ec3fc169c742ac48d32b |
18-Dec-2005 |
Chris Lattner <sabre@nondot.org> |
legalize copytoreg and copyfromreg nodes that have flag operands correctly.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24826 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| bd2b6214862ccc33d3bb63005faa15c16ee51c49 |
18-Dec-2005 |
Jim Laskey <jlaskey@mac.com> |
Fix a bug Sabre was having where the DAG root was a group. The group dominator
needed to be added to the ordering list, not the first member of the group.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24816 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAG.cpp
|
| 9022ed955adc8ecdc8ebf19bb05efea924d1ad0e |
18-Dec-2005 |
Jim Laskey <jlaskey@mac.com> |
Groups were not emitted if the dominator node and the node in the ordering list
were not the same node. Ultimately the test was bogus.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24815 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAG.cpp
|
| a5282d8df2fe5253b274c97de2617a7c141c5ca8 |
18-Dec-2005 |
Chris Lattner <sabre@nondot.org> |
Simplify code
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24806 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAG.cpp
|
| 181b7a382fbdd3d03ce373a6ffac2204e763f9c3 |
18-Dec-2005 |
Chris Lattner <sabre@nondot.org> |
allow custom expansion of BR_CC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24804 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 7df96d66729d1f33934de7b52553e5f071686041 |
17-Dec-2005 |
Evan Cheng <evan.cheng@apple.com> |
X86 lowers SELECT to a cmp / test followed by a conditional move.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24754 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| f5395cee6a24699a016b2e379cf4804b09ce5030 |
16-Dec-2005 |
Jim Laskey <jlaskey@mac.com> |
Added source file/line correspondence for dwarf (PowerPC only at this point.)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24748 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
electionDAG.cpp
electionDAGISel.cpp
|
| d0f6d18aa896a6c37f26e2d947d24d8ec95f1164 |
15-Dec-2005 |
Chris Lattner <sabre@nondot.org> |
Don't create SEXTLOAD/ZEXTLOAD instructions that the target doesn't support
if after legalize. This fixes IA64 failures.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24725 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| d4771840fd59654becb989675fbc0d0dc54c6dd4 |
14-Dec-2005 |
Chris Lattner <sabre@nondot.org> |
When folding loads into ops, immediately replace uses of the op with the
load. This reduces number of worklist iterations and avoid missing optimizations
depending on folding of things into sext_inreg nodes (which aren't supported by
all targets).
Tested by Regression/CodeGen/X86/extend.ll:test2
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24712 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| ad25d4e2df3fe01541d62ab0fd22c7de22ce3a42 |
14-Dec-2005 |
Chris Lattner <sabre@nondot.org> |
Fix the (zext (zextload)) case to trigger, similarly for sign extends.
Allow (zext (truncate)) to apply after legalize if the target supports
AND (which all do).
This compiles
short %foo() {
%tmp.0 = load ubyte* %X ; <ubyte> [#uses=1]
%tmp.3 = cast ubyte %tmp.0 to short ; <short> [#uses=1]
ret short %tmp.3
}
to:
_foo:
movzbl _X, %eax
ret
instead of:
_foo:
movzbl _X, %eax
movzbl %al, %eax
ret
thanks to Evan for pointing this out.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24709 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 00cb95c9bef6b4d96994112422d9d66679dfe986 |
14-Dec-2005 |
Chris Lattner <sabre@nondot.org> |
Fix a miscompilation in crafty due to a recent patch
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24706 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 110dec20008c94216a486f5c0d2eba30cbc2deef |
14-Dec-2005 |
Evan Cheng <evan.cheng@apple.com> |
Fold (zext (load x) to (zextload x).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24702 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 86cb643801be1308ba1da7db774b64852a119e94 |
13-Dec-2005 |
Chris Lattner <sabre@nondot.org> |
Don't lump the filename and working dir together
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24697 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| d7d746f60337684310fcd985d4466edd6a5980ac |
13-Dec-2005 |
Nate Begeman <natebegeman@mac.com> |
Lowering constant pool entries on ppc exposed a bug in the recently added
ConstantVec legalizing code, which would return constantpool nodes that
were not of the target's pointer type.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24691 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| ac22c83e6853c759a10eb7310b019b22e1d42d16 |
12-Dec-2005 |
Chris Lattner <sabre@nondot.org> |
Accept and ignore prefetches for now
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24678 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 58f7963b8b3cb8894623a7d7663cc54005fea8f9 |
12-Dec-2005 |
Chris Lattner <sabre@nondot.org> |
Fix CodeGen/Generic/2005-12-12-ExpandSextInreg.ll
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24677 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 3802c2552fe4475418db3c948e7601d7259f996d |
11-Dec-2005 |
Chris Lattner <sabre@nondot.org> |
Minor tweak to get isel opt
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24663 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 28a6b02626c29b1fe9bb16c14c193549fab4cab8 |
10-Dec-2005 |
Nate Begeman <natebegeman@mac.com> |
Add support for TargetConstantPool nodes to the dag isel emitter, and use
them in the PPC backend, to simplify some logic out of Select and
SelectAddr.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24657 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 7038daf34272d58da160989dd97f0bce39f5b0b1 |
10-Dec-2005 |
Evan Cheng <evan.cheng@apple.com> |
Added new getNode and getTargetNode variants for X86 stores.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24653 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 5e3c5b4e13d45d631cddf42176b380f64fde918f |
09-Dec-2005 |
Chris Lattner <sabre@nondot.org> |
Teach legalize how to promote sext_inreg to fix a problem Andrew pointed
out to me.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24644 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| c78b0b740bcf2e00a8871090709c3571fe442f07 |
08-Dec-2005 |
Chris Lattner <sabre@nondot.org> |
improve code insertion in two ways:
1. Only forward subst offsets into loads and stores, not into arbitrary
things, where it will likely become a load.
2. If the source is a cast from pointer, forward subst the cast as well,
allowing us to fold the cast away (improving cases when the cast is
from an alloca or global).
This hasn't been fully tested, but does appear to further reduce register
pressure and improve code. Lets let the testers grind on it a bit. :)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24640 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| cc827e60b67b2cbcf08a37b119e68081e4171b8a |
07-Dec-2005 |
Nate Begeman <natebegeman@mac.com> |
Fix a crash where ConstantVec nodes were being generated with the wrong
type when the target did not support them. Also teach Legalize how to
expand ConstantVecs.
This allows us to generate
_test:
lwz r2, 12(r3)
lwz r4, 8(r3)
lwz r5, 4(r3)
lwz r6, 0(r3)
addi r2, r2, 4
addi r4, r4, 3
addi r5, r5, 2
addi r6, r6, 1
stw r2, 12(r3)
stw r4, 8(r3)
stw r5, 4(r3)
stw r6, 0(r3)
blr
For:
void %test(%v4i *%P) {
%T = load %v4i* %P
%S = add %v4i %T, <int 1, int 2, int 3, int 4>
store %v4i %S, %v4i * %P
ret void
}
On PowerPC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24633 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
electionDAGISel.cpp
|
| cc2210b4fa9debfaafa2d385549b0c30448e9c12 |
07-Dec-2005 |
Chris Lattner <sabre@nondot.org> |
Only transform (sext (truncate x)) -> (sextinreg x) if before legalize or
if the target supports the resultant sextinreg
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24632 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| b14ab8a10d7955501ec80b247b2510bbd2511b12 |
07-Dec-2005 |
Chris Lattner <sabre@nondot.org> |
Teach the dag combiner to turn a truncate/sign_extend pair into a sextinreg
when the types match up. This allows the X86 backend to compile:
sbyte %toggle_value(sbyte* %tmp.1) {
%tmp.2 = load sbyte* %tmp.1
ret sbyte %tmp.2
}
to this:
_toggle_value:
mov %EAX, DWORD PTR [%ESP + 4]
movsx %EAX, BYTE PTR [%EAX]
ret
instead of this:
_toggle_value:
mov %EAX, DWORD PTR [%ESP + 4]
movsx %EAX, BYTE PTR [%EAX]
movsx %EAX, %AL
ret
noticed in Shootout/objinst.
-Chris
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24630 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 8cfa57b1b4eade4e0101195b2f94ab288cd03563 |
06-Dec-2005 |
Nate Begeman <natebegeman@mac.com> |
Teach the SelectionDAG ISel how to turn ConstantPacked values into
constant nodes with vector types. Also teach the asm printer how to print
ConstantPacked constant pool entries. This allows us to generate altivec
code such as the following, which adds a vector constantto a packed float.
LCPI1_0: <4 x float> < float 0.0e+0, float 0.0e+0, float 0.0e+0, float 1.0e+0 >
.space 4
.space 4
.space 4
.long 1065353216 ; float 1
.text
.align 4
.globl _foo
_foo:
lis r2, ha16(LCPI1_0)
la r2, lo16(LCPI1_0)(r2)
li r4, 0
lvx v0, r4, r2
lvx v1, r4, r3
vaddfp v0, v1, v0
stvx v0, r4, r3
blr
For the llvm code:
void %foo(<4 x float> * %a) {
entry:
%tmp1 = load <4 x float> * %a;
%tmp2 = add <4 x float> %tmp1, < float 0.0, float 0.0, float 0.0, float 1.0 >
store <4 x float> %tmp2, <4 x float> *%a
ret void
}
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24616 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
electionDAG.cpp
electionDAGISel.cpp
|
| c88d8e944dae71e31595b8ae264668e68db6b8ed |
05-Dec-2005 |
Chris Lattner <sabre@nondot.org> |
Fix the #1 code quality problem that I have seen on X86 (and it also affects
PPC and other targets). In a particular, consider code like this:
struct Vector3 { double x, y, z; };
struct Matrix3 { Vector3 a, b, c; };
double dot(Vector3 &a, Vector3 &b) {
return a.x * b.x + a.y * b.y + a.z * b.z;
}
Vector3 mul(Vector3 &a, Matrix3 &b) {
Vector3 r;
r.x = dot( a, b.a );
r.y = dot( a, b.b );
r.z = dot( a, b.c );
return r;
}
void transform(Matrix3 &m, Vector3 *x, int n) {
for (int i = 0; i < n; i++)
x[i] = mul( x[i], m );
}
we compile transform to a loop with all of the GEP instructions for indexing
into 'm' pulled out of the loop (9 of them). Because isel occurs a bb at a time
we are unable to fold the constant index into the loads in the loop, leading to
PPC code that looks like this:
LBB3_1: ; no_exit.preheader
li r2, 0
addi r6, r3, 64 ;; 9 values live across the loop body!
addi r7, r3, 56
addi r8, r3, 48
addi r9, r3, 40
addi r10, r3, 32
addi r11, r3, 24
addi r12, r3, 16
addi r30, r3, 8
LBB3_2: ; no_exit
lfd f0, 0(r30)
lfd f1, 8(r4)
fmul f0, f1, f0
lfd f2, 0(r3) ;; no constant indices folded into the loads!
lfd f3, 0(r4)
lfd f4, 0(r10)
lfd f5, 0(r6)
lfd f6, 0(r7)
lfd f7, 0(r8)
lfd f8, 0(r9)
lfd f9, 0(r11)
lfd f10, 0(r12)
lfd f11, 16(r4)
fmadd f0, f3, f2, f0
fmul f2, f1, f4
fmadd f0, f11, f10, f0
fmadd f2, f3, f9, f2
fmul f1, f1, f6
stfd f0, 0(r4)
fmadd f0, f11, f8, f2
fmadd f1, f3, f7, f1
stfd f0, 8(r4)
fmadd f0, f11, f5, f1
addi r29, r4, 24
stfd f0, 16(r4)
addi r2, r2, 1
cmpw cr0, r2, r5
or r4, r29, r29
bne cr0, LBB3_2 ; no_exit
uh, yuck. With this patch, we now sink the constant offsets into the loop, producing
this code:
LBB3_1: ; no_exit.preheader
li r2, 0
LBB3_2: ; no_exit
lfd f0, 8(r3)
lfd f1, 8(r4)
fmul f0, f1, f0
lfd f2, 0(r3)
lfd f3, 0(r4)
lfd f4, 32(r3) ;; much nicer.
lfd f5, 64(r3)
lfd f6, 56(r3)
lfd f7, 48(r3)
lfd f8, 40(r3)
lfd f9, 24(r3)
lfd f10, 16(r3)
lfd f11, 16(r4)
fmadd f0, f3, f2, f0
fmul f2, f1, f4
fmadd f0, f11, f10, f0
fmadd f2, f3, f9, f2
fmul f1, f1, f6
stfd f0, 0(r4)
fmadd f0, f11, f8, f2
fmadd f1, f3, f7, f1
stfd f0, 8(r4)
fmadd f0, f11, f5, f1
addi r6, r4, 24
stfd f0, 16(r4)
addi r2, r2, 1
cmpw cr0, r2, r5
or r4, r6, r6
bne cr0, LBB3_2 ; no_exit
This is much nicer as it reduces register pressure in the loop a lot. On X86,
this takes the function from having 9 spilled registers to 2. This should help
some spec programs on X86 (gzip?)
This is currently only enabled with -enable-gep-isel-opt to allow perf testing
tonight.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24606 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| d67b3a8bf75d4d3c50263960a9375e6856588f2c |
03-Dec-2005 |
Chris Lattner <sabre@nondot.org> |
dbg.stoppoint returns a value, don't forget to init it
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24583 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| cde0f5cfe7b7e0a73708c0db29dcfc0d00294e98 |
02-Dec-2005 |
Andrew Lenharth <andrewl@lenharth.org> |
bah, must generate all results
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24574 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 49c709f891a3e49db58b56ca94eafa98cbb12c4d |
02-Dec-2005 |
Andrew Lenharth <andrewl@lenharth.org> |
cycle counter fix
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24573 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| fe14b34d83c085e6b7d46e915fdd9c21344e323b |
02-Dec-2005 |
Chris Lattner <sabre@nondot.org> |
Don't remove two operand, two result nodes from the binary ops map. These
should come from the arbitrary ops map.
This fixes Regression/CodeGen/PowerPC/2005-12-01-Crash.ll
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24571 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 9ad17c9c9abfd6e011751d2fd2b03448e1dccb71 |
01-Dec-2005 |
Chris Lattner <sabre@nondot.org> |
Promote line and column number information for our friendly 64-bit targets.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24568 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| c5e6c649b5856c8f02726de014fa3d415a0cb87b |
01-Dec-2005 |
Chris Lattner <sabre@nondot.org> |
This is a bugfix for SelectNodeTo. In certain situations, we could be
selecting a node and use a mix of getTargetNode() and SelectNodeTo. Because
SelectNodeTo didn't check the CSE maps for a preexisting node and didn't insert
its result into the CSE maps, we would sometimes miss a CSE opportunity.
This is extremely rare, but worth fixing for completeness.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24565 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 6510b22cec7de4f0acc9965ec24c3668a6a8a87e |
01-Dec-2005 |
Nate Begeman <natebegeman@mac.com> |
Support multiple ValueTypes per RegisterClass, needed for upcoming vector
work. This change has no effect on generated code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24563 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAG.cpp
|
| eb19e40efbd3cae80c908a30cdf4d33450733c45 |
30-Nov-2005 |
Chris Lattner <sabre@nondot.org> |
Make SelectNodeTo return N
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24548 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| c85a9f37e92f972467962c82c08cc083c344243f |
30-Nov-2005 |
Chris Lattner <sabre@nondot.org> |
CALLSEQ_START/END nodes don't get memoized, do not add them in when
replaceAllUses'ing.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24539 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| ae35575957a3ab446e2766aa05d03020ced27d14 |
30-Nov-2005 |
Andrew Lenharth <andrewl@lenharth.org> |
At long last, you can say that f32 isn't supported for setcc
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24537 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| f43a3ca26d7bf431be5cdfb5963350a158e840af |
30-Nov-2005 |
Nate Begeman <natebegeman@mac.com> |
First chunk of actually generating vector code for packed types. These
changes allow us to generate the following code:
_foo:
li r2, 0
lvx v0, r2, r3
vaddfp v0, v0, v0
stvx v0, r2, r3
blr
for this llvm:
void %foo(<4 x float>* %a) {
entry:
%tmp1 = load <4 x float>* %a
%tmp2 = add <4 x float> %tmp1, %tmp1
store <4 x float> %tmp2, <4 x float>* %a
ret void
}
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24534 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 5b5b8c27556e5dc8792e37436e4ddd7ab157192d |
30-Nov-2005 |
Andrew Lenharth <andrewl@lenharth.org> |
add support for custom lowering SINT_TO_FP
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24531 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 6ff7240a5c484af6e42e2ba6a6d7e03ddf844922 |
30-Nov-2005 |
Reid Spencer <rspencer@reidspencer.com> |
Fix a problem with llvm-ranlib that (on some platforms) caused the archive
file to become corrupted due to interactions between mmap'd memory segments
and file descriptors closing. The problem is completely avoiding by using
a third temporary file.
Patch provided by Evan Jones
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24527 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 14229bb6369c110644c11bc7906b0c1167d3a87a |
30-Nov-2005 |
Evan Cheng <evan.cheng@apple.com> |
Fixed a bug introduced by my last commit: TargetGlobalValues should key on
GlobalValue * and index pair. Update getGlobalAddress() for symmetry.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24524 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 61ca74bc3a29b2af2be7e4bd612289da8aae85b5 |
30-Nov-2005 |
Evan Cheng <evan.cheng@apple.com> |
Added an index field to GlobalAddressSDNode so it can represent X+12, etc.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24523 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAG.cpp
electionDAG.cpp
electionDAGPrinter.cpp
|
| 36ce69195ed488034d0bb11180cc2ebd923679c8 |
29-Nov-2005 |
Chris Lattner <sabre@nondot.org> |
Add support for a new STRING and LOCATION node for line number support, patch
contributed by Daniel Berlin, with a few cleanups here and there by me.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24515 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
electionDAG.cpp
electionDAGISel.cpp
electionDAGPrinter.cpp
|
| 6a648614e88586e85a36ceb5c1d3b84e4f55b458 |
29-Nov-2005 |
Nate Begeman <natebegeman@mac.com> |
Add the majority of the vector machien value types we expect to support,
and make a few changes to the legalization machinery to support more than
16 types.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24511 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
argetLowering.cpp
|
| ab48be377298bd509427a29e174cf4e305138819 |
22-Nov-2005 |
Nate Begeman <natebegeman@mac.com> |
Check in code to scalarize arbitrarily wide packed types for some simple
vector operations (load, add, sub, mul).
This allows us to codegen:
void %foo(<4 x float> * %a) {
entry:
%tmp1 = load <4 x float> * %a;
%tmp2 = add <4 x float> %tmp1, %tmp1
store <4 x float> %tmp2, <4 x float> *%a
ret void
}
on ppc as:
_foo:
lfs f0, 12(r3)
lfs f1, 8(r3)
lfs f2, 4(r3)
lfs f3, 0(r3)
fadds f0, f0, f0
fadds f1, f1, f1
fadds f2, f2, f2
fadds f3, f3, f3
stfs f0, 12(r3)
stfs f1, 8(r3)
stfs f2, 4(r3)
stfs f3, 0(r3)
blr
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24484 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
electionDAG.cpp
electionDAGISel.cpp
|
| 4ef3b817fee7ea5be7219e00ab8e15976bfe279f |
22-Nov-2005 |
Nate Begeman <natebegeman@mac.com> |
Rather than attempting to legalize 1 x float, make sure the SD ISel never
generates it. Make MVT::Vector expand-only, and remove the code in
Legalize that attempts to legalize it.
The plan for supporting N x Type is to continually epxand it in ExpandOp
until it gets down to 2 x Type, where it will be scalarized into a pair of
scalars.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24482 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
electionDAGISel.cpp
argetLowering.cpp
|
| 308575be66ec3870d27b19df044fda18448feb41 |
20-Nov-2005 |
Chris Lattner <sabre@nondot.org> |
Legalize MERGE_VALUES, expand READCYCLECOUNTER correctly, so it doesn't
break control dependence.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24437 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| f70e30b41dc6a92733681dcea2c06d8b3dd488db |
20-Nov-2005 |
Andrew Lenharth <andrewl@lenharth.org> |
The first patch of X86 support for read cycle counter
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24429 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 6bf234c4a894b898954f8be3fb5973caba241012 |
20-Nov-2005 |
Chris Lattner <sabre@nondot.org> |
more progress towards bug 291 being finished. Patch by Owen Anderson,
HAVE_GV case fixed up by me.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24428 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGPrinter.cpp
|
| b67eb9131c5c04d2e55c6b587fde954619feceaf |
19-Nov-2005 |
Chris Lattner <sabre@nondot.org> |
Unbreak codegen of bools. This should fix the llc/jit/llc-beta failures
from last night.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24427 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 3aa2c74e192124244d22aaef857980e16fab49ea |
19-Nov-2005 |
Chris Lattner <sabre@nondot.org> |
Improve Selection DAG printer portability. Patch by Owen Anderson!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24425 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGPrinter.cpp
|
| 44fa764355eec81d8ef8fbd63824695b1554c4ab |
19-Nov-2005 |
Chris Lattner <sabre@nondot.org> |
Teach the graph viewer to handle register operands that are zero.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24421 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGPrinter.cpp
|
| b89175feffa7148c05d1d30a8e382b8d321edae5 |
19-Nov-2005 |
Chris Lattner <sabre@nondot.org> |
Silence a bogus warning
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24420 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 0fb094fd60f3762f9031655e0223b3bfa72c5ac2 |
19-Nov-2005 |
Chris Lattner <sabre@nondot.org> |
Add some method variants, patch by Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24418 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 5fbb5d2459a5410590f285250faa604576308a93 |
19-Nov-2005 |
Nate Begeman <natebegeman@mac.com> |
Teach LLVM how to scalarize packed types. Currently, this only works on
packed types with an element count of 1, although more generic support is
coming. This allows LLVM to turn the following code:
void %foo(<1 x float> * %a) {
entry:
%tmp1 = load <1 x float> * %a;
%tmp2 = add <1 x float> %tmp1, %tmp1
store <1 x float> %tmp2, <1 x float> *%a
ret void
}
Into:
_foo:
lfs f0, 0(r3)
fadds f0, f0, f0
stfs f0, 0(r3)
blr
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24416 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
electionDAG.cpp
electionDAGISel.cpp
|
| e21ea61588996609f827213a2701a204f2f13fb3 |
18-Nov-2005 |
Nate Begeman <natebegeman@mac.com> |
Split out the shift code from visitBinary.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24412 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 0c8fbe33a4bdf7c60e0cfd5a9c86499c817d9f1a |
17-Nov-2005 |
Chris Lattner <sabre@nondot.org> |
Allow targets to custom legalize leaf nodes like GlobalAddress.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24387 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| b9debbf54c926036d5c22b3e7f0d12c79c1c15a3 |
17-Nov-2005 |
Chris Lattner <sabre@nondot.org> |
Teach legalize about targetglobaladdress
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24385 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| b1a5a5c4c0182205b91b962def7b008228a1f7e6 |
16-Nov-2005 |
Chris Lattner <sabre@nondot.org> |
when debugging lower dbg intrinsics to calls
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24377 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 06d9b4ab24d1a6aa94fd0c6f24ab8381e1771f93 |
12-Nov-2005 |
Jeff Cohen <jeffc@jolt-lang.org> |
Fix operator precedence bug caught by VC++.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24318 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 8b91c77385a055474d271aa8c10f0382fdeaafeb |
11-Nov-2005 |
Andrew Lenharth <andrewl@lenharth.org> |
added a chain output
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24306 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 51b8d54922350b7e1c2cd5a5183ef2c5f5d1b1d5 |
11-Nov-2005 |
Andrew Lenharth <andrewl@lenharth.org> |
continued readcyclecounter support
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24300 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
electionDAG.cpp
electionDAGISel.cpp
|
| de202b3cda00f17ba2c047be7270b51f9585a413 |
10-Nov-2005 |
Chris Lattner <sabre@nondot.org> |
Switch the allnodes list from a vector of pointers to an ilist of nodes.This eliminates the vector, allows constant time removal of a node froma graph, and makes iteration over the all nodes list stable when adding
nodes to the graph.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24263 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
egalizeDAG.cpp
cheduleDAG.cpp
electionDAG.cpp
|
| c9ea6fde305b35ab7c9f909ac390d4b53e33d536 |
09-Nov-2005 |
Chris Lattner <sabre@nondot.org> |
Refactor intrinsic lowering stuff out of visitCall
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24261 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 040c11c24e9f6c172eaf680e135d9bb466c284b2 |
09-Nov-2005 |
Chris Lattner <sabre@nondot.org> |
Handle the trivial (but common) two-op case more efficiently
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24259 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 6b2d69655ace2788b244c8a4ebcfb6f2a926ad92 |
09-Nov-2005 |
Chris Lattner <sabre@nondot.org> |
Fix CodeGen/X86/shift-folding.ll:test3 on X86
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24256 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 7436b57de32333cc337b8c7cea208c8863eee793 |
09-Nov-2005 |
Chris Lattner <sabre@nondot.org> |
Avoid creating a token factor node in trivially redundant cases. This
eliminates almost one node per block in common cases.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24254 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 7c0104b525a4ba8b5268ee5455f92b011f7cc263 |
09-Nov-2005 |
Chris Lattner <sabre@nondot.org> |
Handle GEP's a bit more intelligently. Fold constant indices early and
turn power-of-two multiplies into shifts early to improve compile time.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24253 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 0d902a9c740bdaa57396547f26a02c234752c579 |
09-Nov-2005 |
Chris Lattner <sabre@nondot.org> |
Allocate the right amount of memory for this vector up front.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24252 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| a32551197ab7f39bb2bff8cee24ecf70c2a40f6f |
09-Nov-2005 |
Chris Lattner <sabre@nondot.org> |
Change the ValueList array for each node to be shared instead of individuallyallocated. Further, in the common case where a node has a single value, justreference an element from a small array. This is a small compile-time win.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24251 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 65113b2f86ac0b714f3f580beb886d42c988c5b6 |
08-Nov-2005 |
Chris Lattner <sabre@nondot.org> |
Switch the operandlist/valuelist from being vectors to being just an array.This saves 12 bytes from SDNode, but doesn't speed things up substantially
(our graphs apparently already fit within the cache on my g5). In any case
this reduces memory usage.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24249 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 4012eb2137c91668d4951a312fc6067b4a5da4cd |
08-Nov-2005 |
Chris Lattner <sabre@nondot.org> |
Explicitly initialize some instance vars
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24247 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAG.cpp
|
| f469cb654600969db1131eb80002fc7ff53d1f5e |
08-Nov-2005 |
Chris Lattner <sabre@nondot.org> |
Clean up RemoveDeadNodes significantly, by eliminating the need for a temporary
set and eliminating the need to iterate whenever something is removed (which
can be really slow in some cases). Thx to Jim for pointing out something silly
I was getting stuck on. :)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24241 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 26b91ebb63b29c94b3803b15ff1e6929f135caec |
07-Nov-2005 |
Jim Laskey <jlaskey@mac.com> |
Let's try ignoring resource utilization on the backward pass.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24231 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAG.cpp
|
| ae232e7a1055033436370c0b3aecf054fa44d5e7 |
06-Nov-2005 |
Nate Begeman <natebegeman@mac.com> |
Add the necessary support to the ISel to allow targets to codegen the new
alignment information appropriately. Includes code for PowerPC to support
fixed-size allocas with alignment larger than the stack. Support for
arbitrarily aligned dynamic allocas coming soon.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24224 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| a5e5bff8b85cc3b5bf0632b409e949eda5eb7ac1 |
05-Nov-2005 |
Jim Laskey <jlaskey@mac.com> |
Fix logic bug in finding retry slot in tally.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24188 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAG.cpp
|
| 54f997d23f8fbab68bdb70bd0bc8b0a956134dae |
04-Nov-2005 |
Jim Laskey <jlaskey@mac.com> |
Fix a warning
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24187 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAG.cpp
|
| 7d090f3485b5a17431b5a956fdd5d1fc03cbd5d5 |
04-Nov-2005 |
Jim Laskey <jlaskey@mac.com> |
Scheduling now uses itinerary data.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24180 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAG.cpp
|
| 5dc7e861f8c58301886b54f4ec1a1077b1e5281e |
02-Nov-2005 |
Nate Begeman <natebegeman@mac.com> |
Fix a crash that Andrew noticed, and add a pair of braces to unfconfuse
XCode's indenting.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24159 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 7c22575e3292a80b42ec6189d618976a464f7406 |
02-Nov-2005 |
Chris Lattner <sabre@nondot.org> |
Fix a source of undefined behavior when dealing with 64-bit types. This
may fix PR652. Thanks to Andrew for tracking down the problem.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24145 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 5a608ddadae5ad5bc121a263c37015c42c526d7a |
31-Oct-2005 |
Jim Laskey <jlaskey@mac.com> |
1. Embed and not inherit vector for NodeGroup.
2. Iterate operands and not uses (performance.)
3. Some long pending comment changes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24119 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAG.cpp
|
| bf209489ad3f7a38ce6b2159b22d8727500e60c2 |
30-Oct-2005 |
Chris Lattner <sabre@nondot.org> |
Significantly simplify this code and make it more aggressive. Instead of having
a special case hack for X86, make the hack more general: if an incoming argument
register is not used in any block other than the entry block, don't copy it to
a vreg. This helps us compile code like this:
%struct.foo = type { int, int, [0 x ubyte] }
int %test(%struct.foo* %X) {
%tmp1 = getelementptr %struct.foo* %X, int 0, uint 2, int 100
%tmp = load ubyte* %tmp1 ; <ubyte> [#uses=1]
%tmp2 = cast ubyte %tmp to int ; <int> [#uses=1]
ret int %tmp2
}
to:
_test:
lbz r3, 108(r3)
blr
instead of:
_test:
lbz r2, 108(r3)
or r3, r2, r2
blr
The (dead) copy emitted to copy r3 into a vreg for extra-block uses was
increasing the live range of r3 past the load, preventing the coallescing.
This implements CodeGen/PowerPC/reg-coallesce-simple.ll
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24115 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| a4176525cc4018e781b48fd35d4000040841287f |
30-Oct-2005 |
Chris Lattner <sabre@nondot.org> |
Reduce the number of copies emitted as machine instructions by
generating results in vregs that will need them. In the case of something
like this: CopyToReg((add X, Y), reg1024), we no longer emit code like
this:
reg1025 = add X, Y
reg1024 = reg 1025
Instead, we emit:
reg1024 = add X, Y
Whoa! :)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24111 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAG.cpp
|
| 3e6099b05fa85d9e5d82f04f73722f2af301c772 |
30-Oct-2005 |
Chris Lattner <sabre@nondot.org> |
Codegen mul by negative power of two with a shift and negate.
This implements test/Regression/CodeGen/PowerPC/mul-neg-power-2.ll,
producing:
_foo:
slwi r2, r3, 1
subfic r3, r2, 63
blr
instead of:
_foo:
mulli r2, r3, -2
addi r3, r2, 63
blr
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24106 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| fe7f046de875e41dd338163a719a32571da7ec06 |
27-Oct-2005 |
Chris Lattner <sabre@nondot.org> |
Fix DSE to not nuke dead stores unless they redundant store is the same
VT as the killing one. Fix fixes PR491
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24034 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 731d348166792bb9846022a82f7712c7bcec8f30 |
27-Oct-2005 |
Chris Lattner <sabre@nondot.org> |
Add a simple xform that is useful for bitfield operations.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24029 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| b7f6ef12f682c7068ca7513e088177a0d1046b35 |
26-Oct-2005 |
Nate Begeman <natebegeman@mac.com> |
Allow custom lowered FP_TO_SINT ops in the check for whether a larger
FP_TO_SINT is preferred to a larger FP_TO_UINT. This seems to be begging
for a TLI.isOperationCustom() helper function.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23992 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| a158eee3130b93717d9b53b6a128fe193238aea3 |
25-Oct-2005 |
Chris Lattner <sabre@nondot.org> |
Clear a bit in this file that was causing a miscompilation of 178.galgel.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23980 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 2a2de66db2093a5bc1fd620d1b6ae7992a552b24 |
23-Oct-2005 |
Andrew Lenharth <andrewl@lenharth.org> |
add TargetExternalSymbol
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23886 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| e9936d14b899cc17572bfd6165dd6a9aa0ff89b8 |
22-Oct-2005 |
Chris Lattner <sabre@nondot.org> |
BuildSDIV and BuildUDIV only work for i32/i64, but they don't check that
the input is that type, this caused a failure on gs on X86 last night.
Move the hard checks into Build[US]Div since that is where decisions like
this should be made.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23881 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| c8597ca6985f8de7ab4398f60b0be1e1bea3a5b9 |
21-Oct-2005 |
Chris Lattner <sabre@nondot.org> |
add a case missing from the dag combiner that exposed the failure on
2005-10-21-longlonggtu.ll.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23875 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 4d3856768934ee748f754cc134ba88180ce42d1c |
21-Oct-2005 |
Nate Begeman <natebegeman@mac.com> |
Fix a typo in the dag combiner, so that this can work on i64 targets
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23856 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 405e3ecb563f21e7b4ee30f0de57821f3eb91219 |
21-Oct-2005 |
Nate Begeman <natebegeman@mac.com> |
Invert the TargetLowering flag that controls divide by consant expansion.
Add a new flag to TargetLowering indicating if the target has really cheap
signed division by powers of two, make ppc use it. This will probably go
away in the future.
Implement some more ISD::SDIV folds in the dag combiner
Remove now dead code in the x86 backend.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23853 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
argetLowering.cpp
|
| c6a454e8d57acd47e9769516b36ce0810e9dc4f4 |
20-Oct-2005 |
Nate Begeman <natebegeman@mac.com> |
Fix a couple bugs in the const div stuff where we'd generate MULHS/MULHU
for types that aren't legal, and fail a divisor is less than zero
comparison, which would cause us to drop a subtract.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23846 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| f75f2a0a026621430f412d903c489b3fc951dbb3 |
20-Oct-2005 |
Chris Lattner <sabre@nondot.org> |
don't use llabs with apparently VC++ doesn't have
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23845 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 6957523b9ddc6e85aede47a107502043fd1a3b2d |
20-Oct-2005 |
Nate Begeman <natebegeman@mac.com> |
Move the target constant divide optimization up into the dag combiner, so
that the nodes can be folded with other nodes, and we can not duplicate
code in every backend. Alpha will probably want this too.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23835 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 5dc897b0e4e5eb4513adc2f161412ce23f6bf2e0 |
19-Oct-2005 |
Nate Begeman <natebegeman@mac.com> |
Teach Legalize how to do something with EXTRACT_ELEMENT when the type of
the pair of elements is a legal type.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23804 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 4a95945fa5aa431110f50092f4a45d24772a553b |
19-Oct-2005 |
Nate Begeman <natebegeman@mac.com> |
Add the ability to lower return instructions to TargetLowering. This
allows us to lower legal return types to something else, to meet ABI
requirements (such as that i64 be returned in two i32 regs on Darwin/ppc).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23802 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| d222f6ab67472fa2b2e211172a11b43905aa9445 |
19-Oct-2005 |
Chris Lattner <sabre@nondot.org> |
Fix Generic/2005-10-18-ZeroSizeStackObject.ll by not requesting a zero
sized stack object if either the array size or the type size is zero.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23801 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 2dfa8192abaad8a3c29132dba50e8b85218e918c |
19-Oct-2005 |
Chris Lattner <sabre@nondot.org> |
remove hack
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23797 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 40c62d50697a8515abdaf83655c031968d06a900 |
18-Oct-2005 |
Chris Lattner <sabre@nondot.org> |
Fold (select C, load A, load B) -> load (select C, A, B). This happens quite
a lot throughout many programs. In particular, specfp triggers it a bunch for
constant FP nodes when you have code like cond ? 1.0 : -1.0.
If the PPC ISel exposed the loads implicit in pic references to external globals,
we would be able to eliminate a load in cases like this as well:
%X = external global int
%Y = external global int
int* %test4(bool %C) {
%G = select bool %C, int* %X, int* %Y
ret int* %G
}
Note that this breaks things that use SrcValue's (see the fixme), but since nothing
uses them yet, this is ok.
Also, simplify some code to use hasOneUse() on an SDOperand instead of hasNUsesOfValue directly.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23781 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| a0e221dc75ee1f2d8830eec9569116386a56a936 |
18-Oct-2005 |
Nate Begeman <natebegeman@mac.com> |
Implement some feedback from Chris re: constant canonicalization
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23777 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 419f8b62f73541dd783aa98c9eda6e483a487d51 |
18-Oct-2005 |
Nate Begeman <natebegeman@mac.com> |
Legalize BUILD_PAIR appropriately for upcoming 64 bit PowerPC work.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23776 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 11af4eaa6d061befe341420b0ff7762b51e920ce |
17-Oct-2005 |
Nate Begeman <natebegeman@mac.com> |
fold fmul X, +2.0 -> fadd X, X;
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23774 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 854077d3a5a42c3286f22fd5f72ee98797ed3d71 |
17-Oct-2005 |
Chris Lattner <sabre@nondot.org> |
add a trivial fold
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23764 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 750dbd5950ab5a6689f189adbea900eee9e6884d |
16-Oct-2005 |
Chris Lattner <sabre@nondot.org> |
Fix this logic.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23756 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 85d63bbff740d23fae631ec1ecf5c7603e4b321d |
16-Oct-2005 |
Chris Lattner <sabre@nondot.org> |
Add a case we were missing that was causing us to fail CodeGen/PowerPC/rlwinm.ll:test3
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23755 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 8136cdae60eaa30cea91f288f25564a417b19a84 |
15-Oct-2005 |
Chris Lattner <sabre@nondot.org> |
Use getExtLoad here instead of getNode, as extloads produce two values. This
fixes a legalize failure on SPASS for itanium.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23747 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 216def8ecfb8d2b03520a4fe004d498ad7b8b1c9 |
14-Oct-2005 |
Nate Begeman <natebegeman@mac.com> |
fold sext_in_reg, sext_in_reg where both have the same VT. This was
popping up in Fourinarow.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23722 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 5054f162127f19ad43bc4d0b8ab232f0fee32953 |
14-Oct-2005 |
Nate Begeman <natebegeman@mac.com> |
Relax the checking on zextload generation a bit, since as sabre pointed out
you could be AND'ing with the result of a shift that shifts out all the
bits you care about, in addition to a constant.
Also, move over an add/sub_parts fold from legalize to the dag combiner,
where it works for things other than constants. Woot!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23720 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
egalizeDAG.cpp
|
| 24edbb7a6cdf8adcd80086700448d59c59a810b9 |
14-Oct-2005 |
Chris Lattner <sabre@nondot.org> |
Fix the trunc(load) case, finally allowing crafty and povray to pass
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23718 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| f98840531a8da37e481a838971abd9ab4ee69eb9 |
13-Oct-2005 |
Chris Lattner <sabre@nondot.org> |
Fix some bugs in (sext (load x))
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23717 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 9ad8481cfbbb9dfe451b771978098677bc8dd254 |
13-Oct-2005 |
Chris Lattner <sabre@nondot.org> |
When ExpandOp'ing a [SZ]EXTLOAD, make sure to remember that the chain
is also legal. Add support for ExpandOp'ing raw EXTLOADs too.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23716 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 4c8f8f0481b26818d7810a6a585e7ecf52973e93 |
13-Oct-2005 |
Chris Lattner <sabre@nondot.org> |
Implement PromoteOp for *EXTLOAD, allowing MallocBench/gs to Legalize
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23715 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| bfd65a05c96988d175dec57b0b59e7dca2be04c1 |
13-Oct-2005 |
Nate Begeman <natebegeman@mac.com> |
Fix the remaining DAGCombiner issues pointed out by sabre. This should fix
the remainder of the failures introduced by my patch last night.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23714 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 67a44cd3aa26003a6bc2cd755516c9cc12c36ca0 |
13-Oct-2005 |
Chris Lattner <sabre@nondot.org> |
Fix a minor bug in the dag combiner that broke pcompress2 and some other
tests.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23713 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 144ff660e66845a575586bc4092c0cf349b5bfb9 |
13-Oct-2005 |
Nate Begeman <natebegeman@mac.com> |
Add support to Legalize for expanding i64 sextload/zextload into hi and lo
parts. This should fix the crafty and signed long long unit test failure
on x86 last night.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23711 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 53c523c00e6c160bb8e3a6931497eb87d82eb108 |
13-Oct-2005 |
Jim Laskey <jlaskey@mac.com> |
Inhibit instructions from being pushed before function calls. This will
minimize unnecessary spilling.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23710 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAG.cpp
|
| ded4963ab98c424a8e83f4dc0e63203754ca353b |
13-Oct-2005 |
Nate Begeman <natebegeman@mac.com> |
Move some Legalize functionality over to the DAGCombiner where it belongs.
Kill some dead code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23706 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
egalizeDAG.cpp
electionDAG.cpp
|
| 765784ad760ee6cc504d79e4966c272387c313f8 |
13-Oct-2005 |
Nate Begeman <natebegeman@mac.com> |
Fix a potential bug with two combine-to's back to back that chris pointed
out, where after the first CombineTo() call, the node the second CombineTo
wishes to replace may no longer exist.
Fix a very real bug with the truncated load optimization on little endian
targets, which do not need a byte offset added to the load.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23704 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 3df4d525c58d5db878eaadcfdcffbbfca96dd6a2 |
12-Oct-2005 |
Nate Begeman <natebegeman@mac.com> |
More cool stuff for the dag combiner. We can now finally handle things
like turning:
_foo:
fctiwz f0, f1
stfd f0, -8(r1)
lwz r2, -4(r1)
rlwinm r3, r2, 0, 16, 31
blr
into
_foo:
fctiwz f0,f1
stfd f0,-8(r1)
lhz r3,-2(r1)
blr
Also removed an unncessary constraint from sra -> srl conversion, which
should take care of hte only reason we would ever need to handle sra in
MaskedValueIsZero, AFAIK.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23703 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| fab66f69009857f77bad1e9cb9f41733c04e011f |
12-Oct-2005 |
Jim Laskey <jlaskey@mac.com> |
Finally committing to the new scheduler. Still -sched=none by default.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23702 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAG.cpp
|
| a179ab3016a08051c34ba82d7feaeb4198702a60 |
11-Oct-2005 |
Chris Lattner <sabre@nondot.org> |
Fix a powerpc crash on CodeGen/Generic/llvm-ct-intrinsics.ll
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23694 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 05b57433e68de3ba0f6eb01f4a0271fee3abeb09 |
11-Oct-2005 |
Chris Lattner <sabre@nondot.org> |
Add a canonicalization that got lost, fixing PowerPC/fold-li.ll:SUB
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23693 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 04ecf6d65fb5c8703eff8a3dcd5a8208e91318fe |
11-Oct-2005 |
Chris Lattner <sabre@nondot.org> |
clean up some corner cases
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23692 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 87514ca04cb069310d29fd77e0501601c1e22c11 |
11-Oct-2005 |
Chris Lattner <sabre@nondot.org> |
Implement trivial DSE. If two stores are neighbors and store to the same
location, replace them with a new store of the last value. This occurs
in the same neighborhood in 197.parser, speeding it up about 1.5%
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23691 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 01a220213852223f2503f05c8bbb8b72e3c71290 |
11-Oct-2005 |
Chris Lattner <sabre@nondot.org> |
Add support for CombineTo, allowing the dag combiner to replace nodes with
multiple results.
Use this support to implement trivial store->load forwarding, implementing
CodeGen/PowerPC/store-load-fwd.ll. Though this is the most simple case and
can be extended in the future, it is still useful. For example, it speeds
up 197.parser by 6.2% by avoiding an LSU reject in xalloc:
stw r6, lo16(l5_end_of_array)(r2)
addi r2, r5, -4
stwx r5, r4, r2
- lwzx r5, r4, r2
- rlwinm r5, r5, 0, 0, 30
stwx r5, r4, r2
lwz r2, -4(r4)
ori r2, r2, 1
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23690 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 07ed417df21269c51e61746176caf73d8aef43e8 |
10-Oct-2005 |
Nate Begeman <natebegeman@mac.com> |
Teach the DAGCombiner several new tricks, teaching it how to turn
sext_inreg into zext_inreg based on the signbit (fires a lot), srem into
urem, etc.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23688 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| d739075cbb88463dd83d212426cfe13ad17e00da |
10-Oct-2005 |
Chris Lattner <sabre@nondot.org> |
Fix comment
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23686 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| bba9aa3475e307be7bd60eecc733cd46eeaf107a |
10-Oct-2005 |
Chris Lattner <sabre@nondot.org> |
Add ISD::ADD to MaskedValueIsZero
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23685 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 3892560680e244601e52080f448df75988d89663 |
10-Oct-2005 |
Chris Lattner <sabre@nondot.org> |
This function is now dead
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23684 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| af21d55aee8d6852fedfd630395a3c7c95df8f12 |
10-Oct-2005 |
Chris Lattner <sabre@nondot.org> |
Enable Nate's excellent DAG combiner work by default. This allows the
removal of a bunch of ad-hoc and crufty code from SelectionDAG.cpp.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23682 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
electionDAGISel.cpp
|
| a19cea061e661277489655f5d0777360fb9fe736 |
10-Oct-2005 |
Chris Lattner <sabre@nondot.org> |
add a todo for something I noticed
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23679 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| ee899e6bfc854adefdbfd6631e206d18fd43ab81 |
10-Oct-2005 |
Chris Lattner <sabre@nondot.org> |
(X & Y) & C == 0 if either X&C or Y&C are zero
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23678 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
electionDAG.cpp
|
| 089c25ccb3469946d70d9fa97d2e0b7ab16902a2 |
09-Oct-2005 |
Chris Lattner <sabre@nondot.org> |
When emiting a CopyFromReg and the source is already a vreg, do not bother
creating a new vreg and inserting a copy: just use the input vreg directly.
This speeds up the compile (e.g. about 5% on mesa with a debug build of llc)
by not adding a bunch of copies and vregs to be coallesced away. On mesa,
for example, this reduces the number of intervals from 168601 to 129040
going into the coallescer.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23671 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAG.cpp
|
| f845b4563a960047b1092618093a79dc0bf998a8 |
08-Oct-2005 |
Nate Begeman <natebegeman@mac.com> |
Lo and behold, the last bits of SelectionDAG.cpp have been moved over.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23665 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 9a9719eea1d134809c582754188cc10df1021717 |
07-Oct-2005 |
Chris Lattner <sabre@nondot.org> |
remove debugging code
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23663 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| c4ced268d8d35942eb57aac2ce8d5dc7580cae94 |
07-Oct-2005 |
Chris Lattner <sabre@nondot.org> |
implement CodeGen/PowerPC/div-2.ll:test2-4 by propagating zero bits through
C-X's
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23662 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
electionDAG.cpp
|
| 6c4dad0b8bd75f827c83a92245df54e1f776bc61 |
07-Oct-2005 |
Chris Lattner <sabre@nondot.org> |
fix indentation
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23660 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 094c8fcd14a04a3bac12eb17e7e04276ce594e11 |
07-Oct-2005 |
Chris Lattner <sabre@nondot.org> |
Turn sdivs into udivs when we can prove the sign bits are clear. This
implements CodeGen/PowerPC/div-2.ll
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23659 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
electionDAG.cpp
|
| cf5c79b34fcffdf7f0de72bc693ddcd3e2ec47a6 |
06-Oct-2005 |
Chris Lattner <sabre@nondot.org> |
silence a bogus GCC warning
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23646 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 32fca00a23a9872c31999d054b4dd7c724276d9d |
06-Oct-2005 |
Chris Lattner <sabre@nondot.org> |
Make the legalizer completely non-recursive
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23642 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 0558f61b0c758344ce18c548e4046b794610ea42 |
05-Oct-2005 |
Nate Begeman <natebegeman@mac.com> |
Let the combiner handle more cases
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23641 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 829cb818065673a50101435f3c25e50ca82a02bf |
05-Oct-2005 |
Nate Begeman <natebegeman@mac.com> |
Remove some bad code from Legalize
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23640 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| e17daebb30195ad5e95c1dc0ade89aa1eca9fd51 |
05-Oct-2005 |
Nate Begeman <natebegeman@mac.com> |
Check in some more DAGCombiner pieces
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23639 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 3ea0b47f81caeb53f9594dd3f7702ae01c4f2cc6 |
05-Oct-2005 |
Chris Lattner <sabre@nondot.org> |
implement visitBR_CC so that PowerPC/inverted-bool-compares.ll passes
with the dag combiner. This speeds up espresso by 8%, reaching performance
parity with the dag-combiner-disabled llc.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23636 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
electionDAG.cpp
|
| ad13715ed4068a347452de9a86f5c1a702458f83 |
05-Oct-2005 |
Chris Lattner <sabre@nondot.org> |
fix some pastos
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23635 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 9503859c545496838165a340b1e1730dc1b83736 |
05-Oct-2005 |
Chris Lattner <sabre@nondot.org> |
Add a new HandleNode class, which is used to handle (haha) cases in the
dead node elim and dag combiner passes where the root is potentially updated.
This fixes a fixme in the dag combiner.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23634 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
electionDAG.cpp
|
| 5c46f74ec78e73bc91785299a6877f45a7b2f1df |
05-Oct-2005 |
Chris Lattner <sabre@nondot.org> |
Implement the code for PowerPC/inverted-bool-compares.ll, even though it
that testcase still does not pass with the dag combiner. This is because
not all forms of br* are folded yet.
Also, when we combine a node into another one, delete the node immediately
instead of waiting for the node to potentially come up in the future.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23632 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| d48050aa1509130871b8bb2453270c92b969c2e7 |
05-Oct-2005 |
Chris Lattner <sabre@nondot.org> |
make sure that -view-isel-dags is the input to the isel, not the input to
the second phase of dag combining
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23631 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 91559026d346747886bb4a5a686b29d64efdd640 |
05-Oct-2005 |
Chris Lattner <sabre@nondot.org> |
Fix a crash compiling Olden/tsp
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23630 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 9d528dc2b4a936a9515b874b59a3c1b9b786b37b |
04-Oct-2005 |
Jim Laskey <jlaskey@mac.com> |
Reverting to version - until problem isolated.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23622 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAG.cpp
|
| 1aa1972c63fb6b940b11250f7c12bcb368026014 |
04-Oct-2005 |
Nate Begeman <natebegeman@mac.com> |
Fix some faulty logic in the libcall inserter.
Since calls return more than one value, don't bail if one of their uses
happens to be a node that's not an MVT::Other when following the chain
from CALLSEQ_START to CALLSEQ_END.
Once we've found a CALLSEQ_START, we can just return; there's no need to
tail-recurse further up the graph.
Most importantly, just because something only has one use doesn't mean we
should use it's one use to follow from start to end. This faulty logic
caused us to follow a chain of one-use FP operations back to a much earlier
call, putting a cycle in the graph from a later start to an earlier end.
This is a better fix that reverting to the workaround committed earlier
today.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23620 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 27d404ccd1e86b7fffaf8037bf6b6dfb0b9d683b |
04-Oct-2005 |
Nate Begeman <natebegeman@mac.com> |
Add back a workaround that fixes some breakages from chris's last change.
Neither of us have yet figured out why this code is necessary, but stuff
breaks if its not there. Still tracking this down...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23617 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 8ba732bb1c21059153215a1cbe664a1db9293e1f |
03-Oct-2005 |
Jim Laskey <jlaskey@mac.com> |
Refactor gathering node info and emission.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23610 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAG.cpp
|
| ab510a76d6fed412f2dbbb29b3e123eef34f9c0a |
02-Oct-2005 |
Chris Lattner <sabre@nondot.org> |
Fix a problem where the legalizer would run out of stack space on extremely
large basic blocks because it was purely recursive. This switches it to an
iterative/recursive hybrid.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23596 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| dcd5abc70c03fe7679363ab704da57478a948b85 |
02-Oct-2005 |
Chris Lattner <sabre@nondot.org> |
silence a bogus warning
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23595 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAG.cpp
|
| a3638c0f1fd13d7c685de3f7ead39b046a604d84 |
02-Oct-2005 |
Chris Lattner <sabre@nondot.org> |
Add assertions to the trivial scheduler to check that the value types match
up between defs and uses.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23590 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAG.cpp
|
| 14765be0bc7cba8a0cda45de3a20e0d7c33411ca |
02-Oct-2005 |
Chris Lattner <sabre@nondot.org> |
Codegen CopyFromReg using the regclass that matches the valuetype of the
destination vreg.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23586 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAG.cpp
|
| 505277a7f554fcfe73e97cbdca304da5716cefa7 |
01-Oct-2005 |
Chris Lattner <sabre@nondot.org> |
Add some very paranoid checking for operand/result reg class matchup
For instructions that define multiple results, use the right regclass
to define the result, not always the rc of result #0
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23580 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAG.cpp
|
| 2aeaf4e839438d51766996006fc22310d05ab2a7 |
01-Oct-2005 |
Jeff Cohen <jeffc@jolt-lang.org> |
Fix VC++ warnings.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23579 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 37345fe3cd2dd56c3711592a5af6c294c10c7aba |
01-Oct-2005 |
Chris Lattner <sabre@nondot.org> |
add a method
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23575 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGPrinter.cpp
|
| 22f6212e9f1551c93a76f2ad8ea0e9688a3e3775 |
01-Oct-2005 |
Jim Laskey <jlaskey@mac.com> |
typo
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23574 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAG.cpp
|
| 41755e2c7e112f96a448e71521685318fe42f37e |
01-Oct-2005 |
Jim Laskey <jlaskey@mac.com> |
1. Simplify the gathering of node groups.
2. Printing node groups when displaying nodes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23573 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAG.cpp
|
| b6d4c2cf2d3e5173fb16c24d93b18eb13ba04f37 |
30-Sep-2005 |
Jim Laskey <jlaskey@mac.com> |
1. Made things node-centric (from operand).
2. Added node groups to handle flagged nodes.
3. Started weaning simple scheduling off existing emitter.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23566 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAG.cpp
|
| 473a99073cc29f59809a0d5dfee11f5e9e6ad2b7 |
29-Sep-2005 |
Chris Lattner <sabre@nondot.org> |
Fix two bugs in my patch earlier today that broke int->fp conversion on X86.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23522 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| fef80f43e0f5be66baf74db5e585ef10a101b355 |
29-Sep-2005 |
Jeff Cohen <jeffc@jolt-lang.org> |
Silence VC++ redeclaration warnings.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23516 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAG.cpp
|
| 01b3d73c20f5afb8265ae943a8ba23c2238c5eea |
29-Sep-2005 |
Chris Lattner <sabre@nondot.org> |
Add FP versions of the binary operators, keeping the int and fp worlds seperate.
Though I have done extensive testing, it is possible that this will break
things in configs I can't test. Please let me know if this causes a problem
and I'll fix it ASAP.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23504 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
egalizeDAG.cpp
electionDAG.cpp
electionDAGISel.cpp
|
| 6c38b33613d64522581dc55d82fffa4aee0e9f22 |
28-Sep-2005 |
Chris Lattner <sabre@nondot.org> |
If the target prefers it, use _setjmp/_longjmp should be used instead of setjmp/longjmp for llvm.setjmp/llvm.longjmp.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23481 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 8e6be8b9218b3b9c44b784b559d49236f80c1049 |
28-Sep-2005 |
Chris Lattner <sabre@nondot.org> |
initialize new flag
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23480 91177308-0d34-0410-b5e6-96231b3b80d8
argetLowering.cpp
|
| 5324fec6449555a76fa622a1a90760d42c50bd6b |
27-Sep-2005 |
Jim Laskey <jlaskey@mac.com> |
Remove some redundancies.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23469 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAG.cpp
|
| e6b90fba4a0ab4ea14bbb11f029305b7153905cb |
26-Sep-2005 |
Jim Laskey <jlaskey@mac.com> |
Addition of a simple two pass scheduler. This version is currently hacked up
for testing and will require target machine info to do a proper scheduling.
The simple scheduler can be turned on using -sched=simple (defaults
to -sched=none)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23455 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAG.cpp
|
| 5ae7911b2437aec6f695d6820284ff7bc60ec97a |
23-Sep-2005 |
Chris Lattner <sabre@nondot.org> |
Turn (X^C1) == C2 into X == C1^C2 iff X&~C1 = 0 (and move a function)
This happens all the time on PPC for bool values, e.g. eliminating a xori
in inverted-bool-compares.ll.
This should be added to the dag combiner as well.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23403 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 44728a7bb65f5228fff631da807ed7ed3c791a8d |
20-Sep-2005 |
Nate Begeman <natebegeman@mac.com> |
Stub out the rest of the DAG Combiner. Just need to fill in the
select_cc bits and then wrap it in a convenience function for use with
regular select.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23389 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 452d7bebaab3990ed16efa5f21b1031894a99caf |
16-Sep-2005 |
Nate Begeman <natebegeman@mac.com> |
More DAG combining. Still need the branch instructions, and select_cc
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23371 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| fa57702388f139e964befecb4b98c7dfe836945f |
13-Sep-2005 |
Chris Lattner <sabre@nondot.org> |
If a function has liveins, and if the target requested that they be plopped
into particular vregs, emit copies into the entry MBB.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23331 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 13d58e71b7ab2857162b88860c56dce4c9cea3de |
10-Sep-2005 |
Chris Lattner <sabre@nondot.org> |
Allow targets to say they don't support truncstore i1 (which includes a mask
when storing to an 8-bit memory location), as most don't.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23303 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| a500fc681de6329194e9755e051422d621387aa3 |
10-Sep-2005 |
Chris Lattner <sabre@nondot.org> |
Add a missing #include, patch courtesy of Baptiste Lepilleur.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23302 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 3ec5d74fc5bc03bdb3ab5876799dff4d82e38193 |
10-Sep-2005 |
Chris Lattner <sabre@nondot.org> |
Fix a problem duraid encountered on itanium where this folding:
select (x < y), 1, 0 -> (x < y) incorrectly: the setcc returns i1 but the
select returned i32. Add the zero extend as needed.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23301 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 08addbd4770a60adb6dbdc29cf73e7720f08197a |
10-Sep-2005 |
Chris Lattner <sabre@nondot.org> |
Fix a crash viewing dags that have target nodes in them
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23300 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 39ee1ac7e58a66aff7f6986c04878bb7e1bc5b5d |
09-Sep-2005 |
Nate Begeman <natebegeman@mac.com> |
Last round of 2-node folds from SD.cpp. Will move on to 3 node ops such
as setcc and select next.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23295 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
electionDAG.cpp
|
| 223df2269da508eadc160e34e0dc03c9e02e7d0b |
08-Sep-2005 |
Nate Begeman <natebegeman@mac.com> |
Move yet more folds over to the dag combiner from sd.cpp
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23278 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
electionDAG.cpp
|
| 998011927000c8150499bb887ca0d68bb1ff38c2 |
08-Sep-2005 |
Nate Begeman <natebegeman@mac.com> |
Another round of dag combiner changes. This fixes some missing XOR folds
as well as fixing how we replace old values with new values.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23260 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
electionDAG.cpp
|
| f89d78d7c7c93e83c0f19ecabc16cef4ba748d61 |
07-Sep-2005 |
Nate Begeman <natebegeman@mac.com> |
Implement a common missing fold, (add (add x, c1), c2) -> (add x, c1+c2).
This restores all of stanford to being identical with and without the dag
combiner with the add folding turned off in sd.cpp.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23258 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 1e111c7bbb50eec1cb1ebc7d12fcfb22c36f8d87 |
07-Sep-2005 |
Chris Lattner <sabre@nondot.org> |
Fix a bug nate ran into with replacealluseswith. In the recursive cse case,
we were losing a node, causing an assertion to fail. Now we eagerly delete
discovered CSE's, and provide an optional vector to keep track of these
discovered equivalences.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23255 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 2300f5504643eaddc307d3db8a3ccd224c4fa251 |
07-Sep-2005 |
Nate Begeman <natebegeman@mac.com> |
Add an option to the DAG Combiner to enable it for beta runs, and turn on
that option for PowerPC's beta.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23253 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
electionDAGISel.cpp
|
| 83e75ecd2725aed3ace0bd52945f2b5266696d00 |
06-Sep-2005 |
Nate Begeman <natebegeman@mac.com> |
Next round of DAGCombiner changes. This version now passes all the tests
I have run so far when run before Legalize. It still needs to pick up the
SetCC folds, and nodes that use SetCC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23243 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 6a8a21ced4fd1bb3655aa3b5990a6e9b65022089 |
03-Sep-2005 |
Chris Lattner <sabre@nondot.org> |
Fix a checking failure in gs
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23235 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 646d7e2727950b7729b9b1604a7c84246e81550f |
02-Sep-2005 |
Nate Begeman <natebegeman@mac.com> |
Next round of DAG Combiner changes. Just need to support multiple return
values, and then we should be able to hook it up.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23231 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 6fdcb250d5692235813b30274cdfcd0e76377f00 |
02-Sep-2005 |
Chris Lattner <sabre@nondot.org> |
Clean up some code from the last checkin
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23229 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 99c25b86aa85b0093f24b2394a5aa37f66294b2b |
02-Sep-2005 |
Chris Lattner <sabre@nondot.org> |
Fix a bug in legalize where it would emit two calls to libcalls that return
i64 values on targets that need that expanded to 32-bit registers. This fixes
PowerPC/2005-09-02-LegalizeDuplicatesCalls.ll and speeds up 189.lucas from
taking 122.72s to 81.96s on my desktop.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23228 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 70b9b1098a82990cca7804ba6425e7aa151ea8b4 |
02-Sep-2005 |
Chris Lattner <sabre@nondot.org> |
Make sure to auto-cse nullary ops
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23224 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 6621e3b9636174886c9665b648f2ddc13effbc8a |
02-Sep-2005 |
Chris Lattner <sabre@nondot.org> |
Fix some buggy logic where we would try to remove nodes with two operands
from the binary ops map, even if they had multiple results. This latent bug
caused a few failures with the dag isel last night.
To prevent stuff like this from happening in the future, add some really
strict checking to make sure that the CSE maps always match up with reality!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23221 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| fd88f64934c43613dd4a70b97db620de1338782b |
02-Sep-2005 |
Chris Lattner <sabre@nondot.org> |
Don't create zero sized stack objects even for array allocas with a zero
number of elements.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23219 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| a639a43602cd64087a9730632fbf6f7cf7d88276 |
02-Sep-2005 |
Chris Lattner <sabre@nondot.org> |
Fix the release build, noticed by Eric van Riet Paap
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23215 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAG.cpp
electionDAGISel.cpp
|
| 08951a32fbc1de3ec3746e14109a74ca506ca251 |
02-Sep-2005 |
Chris Lattner <sabre@nondot.org> |
Make sure to legalize assert[zs]ext's operand correctly
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23208 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| fab08875b73656f373b10a59aad475615df82baf |
02-Sep-2005 |
Chris Lattner <sabre@nondot.org> |
For values that are live across basic blocks and need promotion, use ANY_EXTEND
instead of ZERO_EXTEND to eliminate extraneous extensions. This eliminates
dead zero extensions on formal arguments and other cases on PPC, implementing
the newly tightened up test/Regression/CodeGen/PowerPC/small-arguments.ll test.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23205 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 13c78e2e5f158e9008b279b43b685ff02bb3cbea |
02-Sep-2005 |
Chris Lattner <sabre@nondot.org> |
legalize ANY_EXTEND appropriately
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23204 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 4ed11b4b791422af543c87d5451183a2a1081e80 |
02-Sep-2005 |
Chris Lattner <sabre@nondot.org> |
Add support for ANY_EXTEND and add a few minor folds for it
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23203 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 39f60a230243d8da02f5e17be3f8918f689ec72b |
02-Sep-2005 |
Nate Begeman <natebegeman@mac.com> |
Fix some code in the current node combining code, spotted when it was moved
over to DAGCombiner.cpp
1. Don't assume that SetCC returns i1 when folding (xor (setcc) constant)
2. Don't duplicate code in folding AND with AssertZext that is handled by
MaskedValueIsZero
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23196 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 4ebd805c6af9db5099214b463003387691df50e8 |
02-Sep-2005 |
Nate Begeman <natebegeman@mac.com> |
Implement first round of feedback from chris (there's still a couple things
left to do).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23195 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| da8abb02397d7cd62a1e16e7c534edd7096ac873 |
01-Sep-2005 |
Chris Lattner <sabre@nondot.org> |
It is NDEBUG not _NDEBUG
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23186 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAG.cpp
electionDAGISel.cpp
|
| 4942a9687dc6c3322dd135cab005c1dd7345df23 |
01-Sep-2005 |
Nate Begeman <natebegeman@mac.com> |
Add the rest of the currently implemented visit routines to the switch
statement in visit().
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23185 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 1d4d41411190dd9e62764e56713753d4155764dd |
01-Sep-2005 |
Nate Begeman <natebegeman@mac.com> |
First pass at the DAG Combiner. It isn't used anywhere yet, but it should
be mostly functional. It currently has all folds from SelectionDAG.cpp
that do not involve a condition code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23184 91177308-0d34-0410-b5e6-96231b3b80d8
AGCombiner.cpp
|
| 50ec8979047065bd0ff41fac4ffd44f744b77723 |
31-Aug-2005 |
Chris Lattner <sabre@nondot.org> |
Allow targets to custom expand shifts that are too large for their registers
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23173 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 7383ce4127f0e1d9ff4eaaa7dac8e71e02d860c6 |
31-Aug-2005 |
Jeff Cohen <jeffc@jolt-lang.org> |
Fix VC++ precedence warnings
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23169 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| fe75a2836abd15557cf21a5cc34a7048cbba654f |
31-Aug-2005 |
Nate Begeman <natebegeman@mac.com> |
Sigh, not my day. Fix typo.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23166 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 9f52f2838d99774d3262bfce7b22d70a7a3f0196 |
31-Aug-2005 |
Nate Begeman <natebegeman@mac.com> |
Fix a mistake in my previous patch pointed out by sabre; the AssertZext
case in MaskedValueIsZero was wrong.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23165 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| b85dfab8898807d592ea96acf19f41ebcd9e8813 |
31-Aug-2005 |
Nate Begeman <natebegeman@mac.com> |
Remove some unnecessary casts, and add the AssertZext case to
MaskedValueIsZero.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23164 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 0fdd7680948a6facf34e0791bd2dfa8b5a2e4942 |
31-Aug-2005 |
Chris Lattner <sabre@nondot.org> |
Allow physregs to occur in the dag with multiple types. Though I don't likethis, it is a requirement on PPC, which can have an f32 value in r3 at onepoint in a function and a f64 value in r3 at another point. :(
This fixes compilation of mesa
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23161 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| cc0675a4be9a5133abd48ee272ff999ae48feabf |
30-Aug-2005 |
Chris Lattner <sabre@nondot.org> |
Fix FreeBench/fourinarow with the dag isel, by not adding a bogus result
to SHIFT_PARTS nodes
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23151 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| ec176e30d655f96d75b49e620a849008bf0f63a2 |
30-Aug-2005 |
Chris Lattner <sabre@nondot.org> |
Fix a miscompile of PtrDist/bc. Sign extending bools is not the right thing,
at least tends to expose problems elsewhere.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23149 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 5ffcd9b56c527c060b6d7c128610916f6afb507a |
30-Aug-2005 |
Nate Begeman <natebegeman@mac.com> |
Remove a bogus piece of my AssertSext/AssertZext patch. oops.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23148 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 56eb86806d5d178d42108f17d11098b3e640b996 |
30-Aug-2005 |
Nate Begeman <natebegeman@mac.com> |
Add support for AssertSext and AssertZext, folding other extensions with
them. This allows for elminination of redundant extends in the entry
blocks of functions on PowerPC.
Add support for i32 x i32 -> i64 multiplies, by recognizing when the inputs
to ISD::MUL in ExpandOp are actually just extended i32 values and not real
i64 values. this allows us to codegen
int mulhs(int a, int b) { return ((long long)a * b) >> 32; }
as:
_mulhs:
mulhw r3, r4, r3
blr
instead of:
_mulhs:
mulhwu r2, r4, r3
srawi r5, r3, 31
mullw r5, r4, r5
add r2, r2, r5
srawi r4, r4, 31
mullw r3, r4, r3
add r3, r2, r3
blr
with a similar improvement on x86.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23147 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
electionDAG.cpp
|
| f155635b53e02e3460af3374000d22d1f8432f1c |
30-Aug-2005 |
Chris Lattner <sabre@nondot.org> |
Name this variable to be what it really is!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23145 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAG.cpp
|
| 55334fc45c27c55de61d895e4ec704f0727ebb46 |
30-Aug-2005 |
Chris Lattner <sabre@nondot.org> |
Handle CopyToReg nodes with flag operands correctly
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23144 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAG.cpp
|
| 82e14db9a90413cc11fcf2ba27431346146aed75 |
30-Aug-2005 |
Chris Lattner <sabre@nondot.org> |
Add a hack to avoid some horrible code in some cases by always emitting
token chains first. For this C function:
int test() {
int i;
for (i = 0; i < 100000; ++i)
foo();
}
Instead of emitting this (condition before call)
.LBB_test_1: ; no_exit
addi r30, r30, 1
lis r2, 1
ori r2, r2, 34464
cmpw cr2, r30, r2
bl L_foo$stub
bne cr2, .LBB_test_1 ; no_exit
Emit this:
.LBB_test_1: ; no_exit
bl L_foo$stub
addi r30, r30, 1
lis r2, 1
ori r2, r2, 34464
cmpw cr0, r30, r2
bne cr0, .LBB_test_1 ; no_exit
Which makes it so we don't have to save/restore cr2 in the prolog/epilog of
the function.
This also makes the code much more similar to what the pattern isel produces.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23135 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAG.cpp
|
| c26aefa15ae7f02b37923f6fed5a74d60e76ff56 |
29-Aug-2005 |
Chris Lattner <sabre@nondot.org> |
Add a new API for Nate
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23131 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 5e3efbc2ca459621400211f7370d7f121d4827d9 |
29-Aug-2005 |
Andrew Lenharth <andrewl@lenharth.org> |
Some of us cared about the the promote path
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23130 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 507f752f6ed28aa9f0ae680e95bfc93df4e9e2dc |
29-Aug-2005 |
Chris Lattner <sabre@nondot.org> |
Fix an infinite loop on x86
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23129 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| ff01698ec037050fd9452d3b3486de568024ee72 |
29-Aug-2005 |
Chris Lattner <sabre@nondot.org> |
Fix a bug in ReplaceAllUsesWith
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23122 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 0f9beca707b98ecfc7af252c5827958f7ede4c74 |
27-Aug-2005 |
Reid Spencer <rspencer@reidspencer.com> |
Change the names of member variables per Chris' instructions, and document
them more clearly.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23118 91177308-0d34-0410-b5e6-96231b3b80d8
argetLowering.cpp
|
| 88b9c159120703555a30314411af26f425597d90 |
27-Aug-2005 |
Chris Lattner <sabre@nondot.org> |
Disable this code, which broke many tests last night
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23114 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 620c93cca1aeef8a53b00eee19e3f16926dcc1cf |
27-Aug-2005 |
Chris Lattner <sabre@nondot.org> |
fix PHI node emission for basic blocks that have select_cc's in them on ppc32
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23113 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAG.cpp
|
| eb150d7d1fe0a7c63a9008798324a284bbcb9ce9 |
27-Aug-2005 |
Chris Lattner <sabre@nondot.org> |
Nate noticed that Andrew never did this. This fixes PR600
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23110 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 9d3a483a3826d3749c2db9863ddb6e824f1dd6d4 |
27-Aug-2005 |
Chris Lattner <sabre@nondot.org> |
Don't copy regs that are only used in the entry block into a vreg. This
changes the code generated for:
short %test(short %A) {
%B = xor short %A, -32768
ret short %B
}
to:
_test:
xori r2, r3, 32768
xoris r2, r2, 65535
extsh r3, r2
blr
instead of:
_test:
rlwinm r2, r3, 0, 16, 31
xori r2, r3, 32768
xoris r2, r2, 65535
extsh r3, r2
blr
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23109 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 579cfabdade805651c42971a22ae042dba3a33c4 |
26-Aug-2005 |
Chris Lattner <sabre@nondot.org> |
Checking types here is not safe, because multiple types can map to the same
register class.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23103 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 025c39bf36b6bc2f35a5544338de6cf96fa511a9 |
26-Aug-2005 |
Chris Lattner <sabre@nondot.org> |
Call the InsertAtEndOfBasicBlock hook if the usesCustomDAGSchedInserter
flag is set on an instruction.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23098 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAG.cpp
electionDAGISel.cpp
|
| 8b52f21f100b090c49fc264fc482942c767eaa18 |
26-Aug-2005 |
Chris Lattner <sabre@nondot.org> |
Revampt ReplaceAllUsesWith to be more efficient and easier to use.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23087 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 5839bf2b3bd22689d9dd0e9de66c2dce71d130ae |
26-Aug-2005 |
Chris Lattner <sabre@nondot.org> |
Change ConstantPoolSDNode to actually hold the Constant itself instead of
putting it into the constant pool. This allows the isel machinery to
create constants that it will end up deciding are not needed, without them
ending up in the resultant function constant pool.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23081 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
cheduleDAG.cpp
electionDAG.cpp
electionDAGPrinter.cpp
|
| 2bb06cdf27905cf95bd39e4120f1ad57c68ac73e |
26-Aug-2005 |
Chris Lattner <sabre@nondot.org> |
Fix a huge annoyance: SelectNodeTo took types before the opcode unlike
every other SD API. Fix it to take the opcode before the types.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23079 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| d7050a9c50211dd215cb3c2bc28b4fb6bfa4a116 |
26-Aug-2005 |
Chris Lattner <sabre@nondot.org> |
the 5th operand is the 4th number
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23074 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 23004e5f21716671401e95e3be91d87dc7d4d68b |
26-Aug-2005 |
Chris Lattner <sabre@nondot.org> |
Add support for targets that want to custom expand select_cc in some cases.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23071 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 07dffd6af673c73352150583150b242a93694f00 |
26-Aug-2005 |
Chris Lattner <sabre@nondot.org> |
Allow LowerOperation to return a null SDOperand in case it wants to lower
some things given to it, but not all.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23070 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| f07d023dd9a4638dc157d1361482c780117c1302 |
26-Aug-2005 |
Chris Lattner <sabre@nondot.org> |
Fix a nasty bug from a previous patch of mine
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23069 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 1999b4b974d2674e94953c32e5e4a47ede7664b4 |
25-Aug-2005 |
Nate Begeman <natebegeman@mac.com> |
New fold for SELECT_CC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23058 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 43247a157b613dbf3caedacdbb171a9d653e3ef5 |
25-Aug-2005 |
Chris Lattner <sabre@nondot.org> |
Don't auto-cse nodes that return flags
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23055 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 9d338cf3a3888c18cb031e6bf7633992c0c0b8a0 |
25-Aug-2005 |
Chris Lattner <sabre@nondot.org> |
simplify the code a bit using isOperationLegal
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23053 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 376d54f9b622424bbc485834f45e8e4fc0001749 |
25-Aug-2005 |
Chris Lattner <sabre@nondot.org> |
Add support for flag operands
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23050 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAG.cpp
|
| 4025a9c2cc4ac3b9efa465a2f64be50fdaba9da9 |
25-Aug-2005 |
Chris Lattner <sabre@nondot.org> |
ADd support for TargetConstantPool nodes
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23041 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| afb2dd43de61f4585e75d1f3ab93a9ac4b3b7592 |
25-Aug-2005 |
Chris Lattner <sabre@nondot.org> |
add a new TargetFrameIndex node
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23035 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 7651fa4a7ed1c81abb004847af1eeb3beb9c88fd |
25-Aug-2005 |
Chris Lattner <sabre@nondot.org> |
add a method
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23027 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 7b2880c4cd29f5a90ac8af897f970b3199a9bbb1 |
25-Aug-2005 |
Chris Lattner <sabre@nondot.org> |
Add ReplaceAllUsesWith that can take a vector of replacement values.
Add some foldings to hopefully help the illegal setcc issue, and move some code around.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23025 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 14b392af1d696c3880b1ed1e5202533d7afe3855 |
25-Aug-2005 |
Chris Lattner <sabre@nondot.org> |
Add support for external symbols, and support for variable arity instructions
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23022 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAG.cpp
|
| e39db07713641cb933d1183a343ffe4eb8f44492 |
24-Aug-2005 |
Chris Lattner <sabre@nondot.org> |
Fix pasto that prevented VT ndoes from showing up in -view-isel-dags correctly
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23021 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGPrinter.cpp
|
| 1d6373c1af26236385e41b52b3a4d93c00bf7431 |
24-Aug-2005 |
Chris Lattner <sabre@nondot.org> |
teach selection dag mask tracking about the fact that select_cc operates like
select. Also teach it that the bit count instructions can only set the low bits
of the result, depending on the size of the input.
This allows us to compile this:
int %eq0(int %a) {
%tmp.1 = seteq int %a, 0 ; <bool> [#uses=1]
%tmp.2 = cast bool %tmp.1 to int ; <int> [#uses=1]
ret int %tmp.2
}
To this:
_eq0:
cntlzw r2, r3
srwi r3, r2, 5
blr
instead of this:
_eq0:
cntlzw r2, r3
rlwinm r3, r2, 27, 31, 31
blr
when setcc is marked illegal on ppc (which restores parity to non-illegal
setcc). Thanks to Nate for pointing this out.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23013 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| c9c60f6429416d362c2131b14d097ce0a9ac9599 |
24-Aug-2005 |
Chris Lattner <sabre@nondot.org> |
Start using isOperationLegal and isTypeLegal to simplify the code
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23012 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 9ed62c16f2b463461fa8667143969fea0b81781e |
24-Aug-2005 |
Chris Lattner <sabre@nondot.org> |
Adjust to new interface
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23010 91177308-0d34-0410-b5e6-96231b3b80d8
argetLowering.cpp
|
| cebd433d8de9cdfeea4a27341e4afea7ca5fca67 |
24-Aug-2005 |
Nate Begeman <natebegeman@mac.com> |
Teach SelectionDAG how to simplify a few more setcc-equivalent select_cc
nodes so that backends don't have to.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22999 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 82cfa5d616ff0f760425cbf6e2983fbab618fbda |
24-Aug-2005 |
Chris Lattner <sabre@nondot.org> |
Make -view-isel-dags show the dag before instruction selecting, in case
the target isel crashes due to unimplemented features like calls :)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22997 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 0750a40a4ff494a2dec24f5761149b8b00e642c5 |
24-Aug-2005 |
Nate Begeman <natebegeman@mac.com> |
Fix optimization of select_cc seteq X, 0, 1, 0 -> srl (ctlz X), log2 X size
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22995 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 7042f15bded917ba68e5e66be873ad4d06f9ca2d |
23-Aug-2005 |
Nate Begeman <natebegeman@mac.com> |
Teach the SelectionDAG how to transform select_cc eq, X, 0, 1, 0 into
either seteq X, 0 or srl (ctlz X), size(X-1), depending on what's legal
for the target.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22978 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| b942a3dd5f9318b2c57f137d2991440c2f0262ad |
23-Aug-2005 |
Nate Begeman <natebegeman@mac.com> |
Teach Legalize how to turn setcc into select_cc
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22977 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 8f03405ee57094d627c342fb6087399a30009a02 |
22-Aug-2005 |
Chris Lattner <sabre@nondot.org> |
Fix a problem where constant expr shifts would not have their shift amount
promoted to the right type. This fixes: IA64/2005-08-22-LegalizerCrash.ll
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22969 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 23553cfb4a7f859e0dbfef2f9fb739526bad8984 |
22-Aug-2005 |
Chris Lattner <sabre@nondot.org> |
Add a fast-path for register values. Add support for constant pool entries,
allowing us to compile this:
float %test2(float* %P) {
%Q = load float* %P
%R = add float %Q, 10.1
ret float %R
}
to this:
_test2:
lfs r2, 0(r3)
lis r3, ha16(.CPI_test2_0)
lfs r3, lo16(.CPI_test2_0)(r3)
fadds f1, r2, r3
blr
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22962 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAG.cpp
|
| c975e1dedcffd55894a14b41ccdb7255aaf19034 |
22-Aug-2005 |
Chris Lattner <sabre@nondot.org> |
add anew method
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22957 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 81e72b13d778772738747b0d9fd2131855db42c4 |
21-Aug-2005 |
Chris Lattner <sabre@nondot.org> |
Add support for frame index nodes
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22956 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAG.cpp
|
| 99baddaf57e0ae8eb7e09504262b47e7ed44520e |
21-Aug-2005 |
Chris Lattner <sabre@nondot.org> |
add a method
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22955 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 6b09a296049d765ad663ae21ab1b26ce7c2c93ae |
21-Aug-2005 |
Chris Lattner <sabre@nondot.org> |
add a method
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22949 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| f85ab15acfd44de684df7153f9c07ec67139f8d9 |
21-Aug-2005 |
Chris Lattner <sabre@nondot.org> |
Add support for basic blocks, fix a bug in result # computation
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22948 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAG.cpp
|
| 550b1e59c4eb5db020766012b1406fc56833251d |
21-Aug-2005 |
Chris Lattner <sabre@nondot.org> |
When legalizing brcond ->brcc or select -> selectcc, make sure to truncate
the old condition to a one bit value. The incoming value must have been
promoted, and the top bits are undefined. This causes us to generate:
_test:
rlwinm r2, r3, 0, 31, 31
li r3, 17
cmpwi cr0, r2, 0
bne .LBB_test_2 ;
.LBB_test_1: ;
li r3, 1
.LBB_test_2: ;
blr
instead of:
_test:
rlwinm r2, r3, 0, 31, 31
li r2, 17
cmpwi cr0, r3, 0
bne .LBB_test_2 ;
.LBB_test_1: ;
li r2, 1
.LBB_test_2: ;
or r3, r2, r2
blr
for:
int %test(bool %c) {
%retval = select bool %c, int 17, int 1
ret int %retval
}
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22947 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| fe0c2c8721fc448fec15e6361d727de70f5f61e2 |
20-Aug-2005 |
Chris Lattner <sabre@nondot.org> |
fix bogus warning
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22943 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAG.cpp
|
| 9b78db7f16193f4a4ad866ea4d98f482b70e3171 |
20-Aug-2005 |
Chris Lattner <sabre@nondot.org> |
Add support for global address nodes
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22940 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAG.cpp
|
| aaaa0b67dd0a943ee9275c42d7df4bd244d52c95 |
20-Aug-2005 |
Chris Lattner <sabre@nondot.org> |
Add support for TargetGlobalAddress nodes
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22938 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 7ef330478ff7f87fece5144ebeb5783894fa3f33 |
19-Aug-2005 |
Chris Lattner <sabre@nondot.org> |
Implement CopyFromReg, TokenFactor, and fix a bug in CopyToReg. This allows
us to compile stuff like this:
double %test(double %A, double %B, double %C, double %E) {
%F = mul double %A, %A
%G = add double %F, %B
%H = sub double -0.0, %G
%I = mul double %H, %C
%J = add double %I, %E
ret double %J
}
to:
_test:
fnmadd f0, f1, f1, f2
fmadd f1, f0, f3, f4
blr
woot!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22937 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAG.cpp
|
| fa164b61d11a3fe4056c8e9b97209bfda6c0b61b |
19-Aug-2005 |
Chris Lattner <sabre@nondot.org> |
Fix a bug in previous commit
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22936 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 7228aa78686c2920c0f8588628b1278698720d07 |
19-Aug-2005 |
Chris Lattner <sabre@nondot.org> |
Print physreg register nodes with target names (e.g. F1) instead of numbers
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22934 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
electionDAGPrinter.cpp
|
| 0189197608d14f03437da889b87393d59cc5c66a |
19-Aug-2005 |
Chris Lattner <sabre@nondot.org> |
Before implementing copyfromreg, we'll implement copytoreg correctly.
This gets us this for the previous testcase:
_test:
lis r2, 0
ori r3, r2, 65535
blr
Note that we actually write to r3 (the return reg) correctly now :)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22933 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAG.cpp
|
| 4ccd406317942375c32b223625d757180867a547 |
19-Aug-2005 |
Chris Lattner <sabre@nondot.org> |
Now that we have operand info for machine instructions, use it to create
temporary registers for things that define a register. This allows dag->dag
isel to compile this:
int %test() { ret int 65535 }
into:
_test:
lis r2, 0
ori r2, r2, 65535
blr
Next up, getting CopyFromReg to work, allowing arguments and cross-bb values.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22932 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAG.cpp
|
| a92b7c36e97c22bf528706bfceb568ff512de751 |
19-Aug-2005 |
Jeff Cohen <jeffc@jolt-lang.org> |
Fix VC++ precedence warning.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22902 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| ca6aa2f70ca1325d8cc4af3d6a7d99ab693e5456 |
19-Aug-2005 |
Chris Lattner <sabre@nondot.org> |
Fix computation of # operands, add a temporary hack for CopyToReg
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22896 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAG.cpp
|
| 068ca15d5e1c55af57e2b0898c1ea6a5aee836c0 |
18-Aug-2005 |
Chris Lattner <sabre@nondot.org> |
add a new -view-sched-dags option to view dags as they are sent to the scheduler.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22878 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAG.cpp
|
| 2d973e45b8a8d33f45ccb4940f599cadcfa5a19d |
18-Aug-2005 |
Chris Lattner <sabre@nondot.org> |
Implement the first chunk of a code emitter. This is sophisticated enough to
codegen:
_empty:
.LBB_empty_0: ;
blr
but can't do anything more (yet). :)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22876 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAG.cpp
|
| d32b23690d9919a31ac6c56b2783efb622051e75 |
18-Aug-2005 |
Chris Lattner <sabre@nondot.org> |
new file, obviously just a stub
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22868 91177308-0d34-0410-b5e6-96231b3b80d8
cheduleDAG.cpp
|
| 36b708f05720c407f5e5657f2fd4b0677702ad46 |
18-Aug-2005 |
Chris Lattner <sabre@nondot.org> |
Enable critical edge splitting by default
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22863 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 294a0a103d561864f2089b9f5948fb1a49801918 |
18-Aug-2005 |
Nate Begeman <natebegeman@mac.com> |
Add support for target DAG nodes that take 4 operands, such as PowerPC's
rlwinm.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22856 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| a23e8154dc58a62225074bb4eb1633c363ce331b |
18-Aug-2005 |
Chris Lattner <sabre@nondot.org> |
Fix printing of VTSDNodes
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22853 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
electionDAGPrinter.cpp
|
| 58b968be853ef02d0f448e5e2c31676e361c210f |
17-Aug-2005 |
Jim Laskey <jlaskey@mac.com> |
Move the code dependency for MathExtras.h from SelectionDAGNodes.h.
Added some class dividers in SelectionDAG.cpp.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22841 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| cb6682fa44e13262bdef7dd22b4ba90f8c2e7b97 |
17-Aug-2005 |
Jim Laskey <jlaskey@mac.com> |
Culling out use of unions for converting FP to bits and vice versa.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22838 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
electionDAG.cpp
|
| 8b8749f367fd30a8a3d57284576a6d59b60b69eb |
17-Aug-2005 |
Chris Lattner <sabre@nondot.org> |
Fix a bug in RemoveDeadNodes where it would crash when its "optional"
argument is not specified.
Implement ReplaceAllUsesWith.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22834 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 02659d23637f69f90640bfa3e66919517103c57a |
17-Aug-2005 |
Jim Laskey <jlaskey@mac.com> |
Switched to using BitsToDouble for int_to_float to avoid aliasing problem.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22831 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 491dfa88e48ac48b1dae0adf89d2ff77c828c735 |
17-Aug-2005 |
Jim Laskey <jlaskey@mac.com> |
Change hex float constants for the sake of VC++.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22828 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 495a0b51915eb763576874f29192820b731edc22 |
17-Aug-2005 |
Chris Lattner <sabre@nondot.org> |
Add a new beta option for critical edge splitting, to avoid a problem that
Nate noticed in yacr2 (and I know occurs in other places as well).
This is still rough, as the critical edge blocks are not intelligently placed
but is added to get some idea to see if this improves performance.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22825 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| fae59b99b8d1942f30a4be609423282c3fd62dd8 |
17-Aug-2005 |
Chris Lattner <sabre@nondot.org> |
Fix a regression on X86, where FP values can be promoted too.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22822 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 6269ed125fc492d81dc5e3f48482816fc9d47f49 |
17-Aug-2005 |
Jim Laskey <jlaskey@mac.com> |
Added generic code expansion for [signed|unsigned] i32 to [f32|f64] casts in the
legalizer. PowerPC now uses this expansion instead of ISel version.
Example:
// signed integer to double conversion
double f1(signed x) {
return (double)x;
}
// unsigned integer to double conversion
double f2(unsigned x) {
return (double)x;
}
// signed integer to float conversion
float f3(signed x) {
return (float)x;
}
// unsigned integer to float conversion
float f4(unsigned x) {
return (float)x;
}
Byte Code:
internal fastcc double %_Z2f1i(int %x) {
entry:
%tmp.1 = cast int %x to double ; <double> [#uses=1]
ret double %tmp.1
}
internal fastcc double %_Z2f2j(uint %x) {
entry:
%tmp.1 = cast uint %x to double ; <double> [#uses=1]
ret double %tmp.1
}
internal fastcc float %_Z2f3i(int %x) {
entry:
%tmp.1 = cast int %x to float ; <float> [#uses=1]
ret float %tmp.1
}
internal fastcc float %_Z2f4j(uint %x) {
entry:
%tmp.1 = cast uint %x to float ; <float> [#uses=1]
ret float %tmp.1
}
internal fastcc double %_Z2g1i(int %x) {
entry:
%buffer = alloca [2 x uint] ; <[2 x uint]*> [#uses=3]
%tmp.0 = getelementptr [2 x uint]* %buffer, int 0, int 0 ; <uint*> [#uses=1]
store uint 1127219200, uint* %tmp.0
%tmp.2 = cast int %x to uint ; <uint> [#uses=1]
%tmp.3 = xor uint %tmp.2, 2147483648 ; <uint> [#uses=1]
%tmp.5 = getelementptr [2 x uint]* %buffer, int 0, int 1 ; <uint*> [#uses=1]
store uint %tmp.3, uint* %tmp.5
%tmp.9 = cast [2 x uint]* %buffer to double* ; <double*> [#uses=1]
%tmp.10 = load double* %tmp.9 ; <double> [#uses=1]
%tmp.13 = load double* cast (long* %signed_bias to double*) ; <double> [#uses=1]
%tmp.14 = sub double %tmp.10, %tmp.13 ; <double> [#uses=1]
ret double %tmp.14
}
internal fastcc double %_Z2g2j(uint %x) {
entry:
%buffer = alloca [2 x uint] ; <[2 x uint]*> [#uses=3]
%tmp.0 = getelementptr [2 x uint]* %buffer, int 0, int 0 ; <uint*> [#uses=1]
store uint 1127219200, uint* %tmp.0
%tmp.1 = getelementptr [2 x uint]* %buffer, int 0, int 1 ; <uint*> [#uses=1]
store uint %x, uint* %tmp.1
%tmp.4 = cast [2 x uint]* %buffer to double* ; <double*> [#uses=1]
%tmp.5 = load double* %tmp.4 ; <double> [#uses=1]
%tmp.8 = load double* cast (long* %unsigned_bias to double*) ; <double> [#uses=1]
%tmp.9 = sub double %tmp.5, %tmp.8 ; <double> [#uses=1]
ret double %tmp.9
}
internal fastcc float %_Z2g3i(int %x) {
entry:
%buffer = alloca [2 x uint] ; <[2 x uint]*> [#uses=3]
%tmp.0 = getelementptr [2 x uint]* %buffer, int 0, int 0 ; <uint*> [#uses=1]
store uint 1127219200, uint* %tmp.0
%tmp.2 = cast int %x to uint ; <uint> [#uses=1]
%tmp.3 = xor uint %tmp.2, 2147483648 ; <uint> [#uses=1]
%tmp.5 = getelementptr [2 x uint]* %buffer, int 0, int 1 ; <uint*> [#uses=1]
store uint %tmp.3, uint* %tmp.5
%tmp.9 = cast [2 x uint]* %buffer to double* ; <double*> [#uses=1]
%tmp.10 = load double* %tmp.9 ; <double> [#uses=1]
%tmp.13 = load double* cast (long* %signed_bias to double*) ; <double> [#uses=1]
%tmp.14 = sub double %tmp.10, %tmp.13 ; <double> [#uses=1]
%tmp.16 = cast double %tmp.14 to float ; <float> [#uses=1]
ret float %tmp.16
}
internal fastcc float %_Z2g4j(uint %x) {
entry:
%buffer = alloca [2 x uint] ; <[2 x uint]*> [#uses=3]
%tmp.0 = getelementptr [2 x uint]* %buffer, int 0, int 0 ; <uint*> [#uses=1]
store uint 1127219200, uint* %tmp.0
%tmp.1 = getelementptr [2 x uint]* %buffer, int 0, int 1 ; <uint*> [#uses=1]
store uint %x, uint* %tmp.1
%tmp.4 = cast [2 x uint]* %buffer to double* ; <double*> [#uses=1]
%tmp.5 = load double* %tmp.4 ; <double> [#uses=1]
%tmp.8 = load double* cast (long* %unsigned_bias to double*) ; <double> [#uses=1]
%tmp.9 = sub double %tmp.5, %tmp.8 ; <double> [#uses=1]
%tmp.11 = cast double %tmp.9 to float ; <float> [#uses=1]
ret float %tmp.11
}
PowerPC Code:
.machine ppc970
.const
.align 2
.CPIl1__Z2f1i_0: ; float 0x4330000080000000
.long 1501560836 ; float 4.5036e+15
.text
.align 2
.globl l1__Z2f1i
l1__Z2f1i:
.LBBl1__Z2f1i_0: ; entry
xoris r2, r3, 32768
stw r2, -4(r1)
lis r2, 17200
stw r2, -8(r1)
lfd f0, -8(r1)
lis r2, ha16(.CPIl1__Z2f1i_0)
lfs f1, lo16(.CPIl1__Z2f1i_0)(r2)
fsub f1, f0, f1
blr
.const
.align 2
.CPIl2__Z2f2j_0: ; float 0x4330000000000000
.long 1501560832 ; float 4.5036e+15
.text
.align 2
.globl l2__Z2f2j
l2__Z2f2j:
.LBBl2__Z2f2j_0: ; entry
stw r3, -4(r1)
lis r2, 17200
stw r2, -8(r1)
lfd f0, -8(r1)
lis r2, ha16(.CPIl2__Z2f2j_0)
lfs f1, lo16(.CPIl2__Z2f2j_0)(r2)
fsub f1, f0, f1
blr
.const
.align 2
.CPIl3__Z2f3i_0: ; float 0x4330000080000000
.long 1501560836 ; float 4.5036e+15
.text
.align 2
.globl l3__Z2f3i
l3__Z2f3i:
.LBBl3__Z2f3i_0: ; entry
xoris r2, r3, 32768
stw r2, -4(r1)
lis r2, 17200
stw r2, -8(r1)
lfd f0, -8(r1)
lis r2, ha16(.CPIl3__Z2f3i_0)
lfs f1, lo16(.CPIl3__Z2f3i_0)(r2)
fsub f0, f0, f1
frsp f1, f0
blr
.const
.align 2
.CPIl4__Z2f4j_0: ; float 0x4330000000000000
.long 1501560832 ; float 4.5036e+15
.text
.align 2
.globl l4__Z2f4j
l4__Z2f4j:
.LBBl4__Z2f4j_0: ; entry
stw r3, -4(r1)
lis r2, 17200
stw r2, -8(r1)
lfd f0, -8(r1)
lis r2, ha16(.CPIl4__Z2f4j_0)
lfs f1, lo16(.CPIl4__Z2f4j_0)(r2)
fsub f0, f0, f1
frsp f1, f0
blr
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22814 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 37bfbb47de5381704471af6178bfbba29260297c |
17-Aug-2005 |
Chris Lattner <sabre@nondot.org> |
add a new TargetConstant node
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22813 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| d5d0f9bd20d9df07d6b4d41b7e8ed6d33b6a649d |
16-Aug-2005 |
Chris Lattner <sabre@nondot.org> |
Eliminate the RegSDNode class, which 3 nodes (CopyFromReg/CopyToReg/ImplicitDef)
used to tack a register number onto the node.
Instead of doing this, make a new node, RegisterSDNode, which is a leaf
containing a register number. These three operations just become normal
DAG nodes now, instead of requiring special handling.
Note that with this change, it is no longer correct to make illegal
CopyFromReg/CopyToReg nodes. The legalizer will not touch them, and this
is bad, so don't do it. :)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22806 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
electionDAG.cpp
electionDAGISel.cpp
electionDAGPrinter.cpp
|
| 7cbd525ba85ebe440d15fa359ec940e404d14906 |
16-Aug-2005 |
Nate Begeman <natebegeman@mac.com> |
Implement BR_CC and BRTWOWAY_CC. This allows the removal of a rather nasty
fixme from the PowerPC backend. Emit slightly better code for legalizing
select_cc.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22805 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
electionDAG.cpp
|
| f3e133a35f5aa6ed32ca29aa3675eff349d61008 |
16-Aug-2005 |
Chris Lattner <sabre@nondot.org> |
Allow passing a dag into dump and getOperationName. If one is available
when printing a node, use it to render target operations with their
target instruction name instead of "<<unknown>>".
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22804 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| ad95d6ab201bad53ae155a06d49cc16cfbebe507 |
16-Aug-2005 |
Chris Lattner <sabre@nondot.org> |
Use a extant helper to do this.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22802 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGPrinter.cpp
|
| 149c58ce0b94e64faf3c4ccdbf894061cf7d66e1 |
16-Aug-2005 |
Chris Lattner <sabre@nondot.org> |
Add some methods for dag->dag isel.
Split RemoveNodeFromCSEMaps out of DeleteNodesIfDead to do it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22801 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
electionDAG.cpp
|
| 2d56e72f09337a1cab3ba199a9467c159296f3fa |
14-Aug-2005 |
Nate Begeman <natebegeman@mac.com> |
Fix last night's PPC32 regressions by
1. Not selecting the false value of a select_cc in the false arm, which
isn't legal for nested selects.
2. Actually returning the node we created and Legalized in the FP_TO_UINT
Expander.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22789 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| d2558e3e4af2930730e2314868afd09ba005e282 |
14-Aug-2005 |
Nate Begeman <natebegeman@mac.com> |
Teach the legalizer how to legalize FP_TO_UINT.
Teach the legalizer to promote FP_TO_UINT to FP_TO_SINT if the wider
FP_TO_UINT is also illegal. This allows us on PPC to codegen
unsigned short foo(float a) { return a; }
as:
_foo:
.LBB_foo_0: ; entry
fctiwz f0, f1
stfd f0, -8(r1)
lwz r2, -4(r1)
rlwinm r3, r2, 0, 16, 31
blr
instead of:
_foo:
.LBB_foo_0: ; entry
fctiwz f0, f1
stfd f0, -8(r1)
lwz r2, -4(r1)
lis r3, ha16(.CPI_foo_0)
lfs f0, lo16(.CPI_foo_0)(r3)
fcmpu cr0, f1, f0
blt .LBB_foo_2 ; entry
.LBB_foo_1: ; entry
fsubs f0, f1, f0
fctiwz f0, f0
stfd f0, -16(r1)
lwz r2, -12(r1)
xoris r2, r2, 32768
.LBB_foo_2: ; entry
rlwinm r3, r2, 0, 16, 31
blr
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22785 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| ff66368a5f83ed62cb7817efc4a16b78c449a4c0 |
13-Aug-2005 |
Nate Begeman <natebegeman@mac.com> |
Remove an unncessary argument to SimplifySelectCC and add an additional
assert when creating a select_cc node.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22780 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 32c392a3a5e397b5f1cc83aaedfab96368d11e8a |
13-Aug-2005 |
Nate Begeman <natebegeman@mac.com> |
Fix the fabs regression on x86 by abstracting the select_cc optimization
out into SimplifySelectCC. This allows both ISD::SELECT and ISD::SELECT_CC
to use the same set of simplifying folds.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22779 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 3e27b1f5c4bbbc5729a154b9b76b4231bb0ad9b9 |
13-Aug-2005 |
Chris Lattner <sabre@nondot.org> |
implement a couple of simple shift foldings.
e.g. (X & 7) >> 3 -> 0
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22774 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| e1fae4a3aeeb1c0f349f9b02a4d6b8fc0a6a9934 |
11-Aug-2005 |
Nate Begeman <natebegeman@mac.com> |
Add a select_cc optimization for recognizing abs(int). This speeds up an
integer MPEG encoding loop by a factor of two.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22758 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| e5d63829fd62d815a330c21ea316e6b4cf943562 |
11-Aug-2005 |
Nate Begeman <natebegeman@mac.com> |
Some SELECT_CC cleanups:
1. move assertions for node creation to getNode()
2. legalize the values returned in ExpandOp immediately
3. Move select_cc optimizations from SELECT's getNode() to SELECT_CC's,
allowing them to be cleaned up significantly.
This paves the way to pick up additional optimizations on SELECT_CC, such
as sum-of-absolute-differences.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22757 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
electionDAG.cpp
|
| 9373a81e53ce5f9f2c06c4209b8b886605aece08 |
10-Aug-2005 |
Nate Begeman <natebegeman@mac.com> |
Add new node, SELECT_CC. This node is for targets that don't natively
implement SELECT.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22755 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
electionDAG.cpp
|
| 7c6e452d4415abaeb562958bbae1ca1bc2eb6809 |
10-Aug-2005 |
Chris Lattner <sabre@nondot.org> |
Fix an oversight that may be causing PR617.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22753 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| bd8625b062c468ccd62b713993a45e8dd40e67a7 |
10-Aug-2005 |
Chris Lattner <sabre@nondot.org> |
Fix spelling, fix some broken canonicalizations by my last patch
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22734 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 079a27a0deca2501485da55701632cf9ebe4e8c4 |
09-Aug-2005 |
Chris Lattner <sabre@nondot.org> |
add cc nodes to the AllNodes list so they show up in Graphviz output
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22731 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 7cf7e3f33f25544d08492d47cc8a1cbba25dc8d7 |
09-Aug-2005 |
Chris Lattner <sabre@nondot.org> |
Eliminate the SetCCSDNode in favor of a CondCodeSDNode class. This pulls the
CC out of the SetCC operation, making SETCC a standard ternary operation and
CC's a standard DAG leaf. This will make it possible for other node to use
CC's as operands in the future...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22728 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
electionDAG.cpp
electionDAGISel.cpp
|
| bf3fa976ee85528712669c9513a4eed351fcb3bb |
07-Aug-2005 |
Chris Lattner <sabre@nondot.org> |
add a small simplification that can be exposed after promotion/expansion
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22691 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 82299e70977500209c951404e354510feffb8efa |
05-Aug-2005 |
Chris Lattner <sabre@nondot.org> |
Change FindEarliestCallSeqEnd (used by libcall insertion) to use a set to
avoid revisiting nodes more than once. This eliminates a source of
potentially exponential behavior. For a small function in 191.fma3d
(hexah_stress_divergence_), this speeds up isel from taking > 20mins to
taking 0.07s.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22680 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| c534395cb22202e66f27abe99dd9c153b4a68b14 |
05-Aug-2005 |
Chris Lattner <sabre@nondot.org> |
Fix a use-of-dangling-pointer bug, from the introduction of SrcValue's.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22679 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 2f4eca30d11d634ac2a26eed4d80f8bc9584a4b3 |
05-Aug-2005 |
Chris Lattner <sabre@nondot.org> |
Fix a latent bug in the libcall inserter that was exposed by Nate's patch
yesterday. This fixes whetstone and a bunch of programs in the External tests.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22678 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 2ac4fc032050ff1e0f06bd8e27126e979406effb |
04-Aug-2005 |
Nate Begeman <natebegeman@mac.com> |
Fix a fixme in LegalizeDAG
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22661 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| cd33eef1b2dc1e81ab57b4857cb63c47bb62a496 |
04-Aug-2005 |
Misha Brukman <brukman+llvm@gmail.com> |
* Unbreak release build
* Add comments to #endif pragmas for readability
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22647 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGPrinter.cpp
|
| 4c64dd7977bc676399df0d5d2bf8016a3242780e |
03-Aug-2005 |
Chris Lattner <sabre@nondot.org> |
Fix PR611, codegen'ing SREM of FP operands to fmod or fmodf instead of
the sequence used for integer ops
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22629 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
electionDAGPrinter.cpp
|
| 0561b3ff9fd08f9cda48551f2f91590ca5f60656 |
02-Aug-2005 |
Chris Lattner <sabre@nondot.org> |
Update to use the new MathExtras.h support for log2 computation.
Patch contributed by Jim Laskey!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22594 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| e21c305ed85b2be4a27784ba52471f6b68fdd255 |
01-Aug-2005 |
Chris Lattner <sabre@nondot.org> |
Fix casts from long to sbyte on ppc
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22570 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| d29b6aa608d69f19b57ebd2ae630b040b1c4951d |
30-Jul-2005 |
Jeff Cohen <jeffc@jolt-lang.org> |
Keep tabs and trailing spaces out.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22565 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| f20d183c2268553c738fefb014959ea924dd0555 |
30-Jul-2005 |
Chris Lattner <sabre@nondot.org> |
fix float->long conversions on x86
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22563 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| f1fa74ee0d30dfdb854f7d3f5ee67437cc82e250 |
30-Jul-2005 |
Chris Lattner <sabre@nondot.org> |
Allow targets to have custom expanders for FP_TO_*INT conversions where
both the src and dest values are legal
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22555 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 80a3e94653574c69ac805d9684a23a94ed3e4b5d |
29-Jul-2005 |
Chris Lattner <sabre@nondot.org> |
Allow targets to define custom expanders for FP_TO_*INT
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22548 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 1618bebcf6f9cd19c4e05de3bfffda28c246bb12 |
29-Jul-2005 |
Chris Lattner <sabre@nondot.org> |
allow a target to request that unknown FP_TO_*INT conversion be promoted to
a larger integer destination.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22547 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| fa9c801a6b42609dc2a934afb6535e3d51d61a3e |
29-Jul-2005 |
Chris Lattner <sabre@nondot.org> |
instead of having all conversions be handled by one case value, and then have
subcases inside, break things out earlier.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22546 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 00b16889ab461b7ecef1c91ade101186b7f1fce2 |
27-Jul-2005 |
Jeff Cohen <jeffc@jolt-lang.org> |
Eliminate all remaining tabs and trailing spaces.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22523 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
electionDAG.cpp
electionDAGISel.cpp
|
| 700a3c97e90dfdad049f460d4547bff6e48dd7e7 |
19-Jul-2005 |
Nate Begeman <natebegeman@mac.com> |
Remove unnecessary FP_EXTEND. This causes worse codegen for SSE.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22469 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| a0f5bf306c0e66ca5fc519fd3b0cb732d37d4a5e |
19-Jul-2005 |
Reid Spencer <rspencer@reidspencer.com> |
For: memory operations -> stores
This is the first incremental patch to implement this feature. It adds no
functionality to LLVM but setup up the information needed from targets in
order to implement the optimization correctly. Each target needs to specify
the maximum number of store operations for conversion of the llvm.memset,
llvm.memcpy, and llvm.memmove intrinsics into a sequence of store operations.
The limit needs to be chosen at the threshold of performance for such an
optimization (generally smallish). The target also needs to specify whether
the target can support unaligned stores for multi-byte store operations.
This helps ensure the optimization doesn't generate code that will trap on
an alignment errors.
More patches to follow.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22468 91177308-0d34-0410-b5e6-96231b3b80d8
argetLowering.cpp
|
| f4d32726e622c740b4befc803e604903eb1349df |
18-Jul-2005 |
Chris Lattner <sabre@nondot.org> |
The assertion was wrong: the code only worked for i64. While we're at it,
expand the code to work for all integer datatypes. This should unbreak
alpha.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22464 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 5a8441ea3fc145393d6274156bd05c4a006099ea |
16-Jul-2005 |
Nate Begeman <natebegeman@mac.com> |
Teach the legalizer how to promote SINT_TO_FP to a wider SINT_TO_FP that
the target natively supports. This eliminates some special-case code from
the x86 backend and generates better code as well.
For an i8 to f64 conversion, before & after:
_x87 before:
subl $2, %esp
movb 6(%esp), %al
movsbw %al, %ax
movw %ax, (%esp)
filds (%esp)
addl $2, %esp
ret
_x87 after:
subl $2, %esp
movsbw 6(%esp), %ax
movw %ax, (%esp)
filds (%esp)
addl $2, %esp
ret
_sse before:
subl $12, %esp
movb 16(%esp), %al
movsbl %al, %eax
cvtsi2sd %eax, %xmm0
addl $12, %esp
ret
_sse after:
subl $12, %esp
movsbl 16(%esp), %eax
cvtsi2sd %eax, %xmm0
addl $12, %esp
ret
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22452 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| cad063f1a8ecda4fd556a733dc5eaa8a96acb80d |
16-Jul-2005 |
Chris Lattner <sabre@nondot.org> |
Break the code for expanding UINT_TO_FP operations out into its own
SelectionDAGLegalize::ExpandLegalUINT_TO_FP method.
Add a new method, PromoteLegalUINT_TO_FP, which allows targets to request
that UINT_TO_FP operations be promoted to a larger input type. This is
useful for targets that have some UINT_TO_FP or SINT_TO_FP operations but
not all of them (like X86).
The same should be done with SINT_TO_FP, but this patch does not do that
yet.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22447 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 6e741f8842b5570e30f25912dbdaaa2edf36110c |
16-Jul-2005 |
Chris Lattner <sabre@nondot.org> |
You can't use config options without config.h
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22446 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGPrinter.cpp
|
| c5f44add43bf9ecb7f1f63a320e4440f8f0784c3 |
14-Jul-2005 |
Chris Lattner <sabre@nondot.org> |
Make this use the new autoconf support for finding the executables for
gv and Graphviz.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22434 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGPrinter.cpp
|
| e388b5ea2c599a1db72497bf2d2920895da28f47 |
14-Jul-2005 |
Chris Lattner <sabre@nondot.org> |
As discussed on IRC, this stuff is just for debugging.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22432 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGPrinter.cpp
|
| f1a2f15ed35c1cf987f6a1a703f855a3c61fdab6 |
14-Jul-2005 |
Chris Lattner <sabre@nondot.org> |
If the Graphviz program is available, use it to visualize dot graphs.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22429 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGPrinter.cpp
|
| c087a435109cdc943da094a21371f7d66d5b0e54 |
13-Jul-2005 |
Chris Lattner <sabre@nondot.org> |
Fix Alpha/2005-07-12-TwoMallocCalls.ll and PR593.
It is not safe to call LegalizeOp on something that has already been legalized.
Instead, just force another iteration of legalization.
This could affect all platforms but X86, as this codepath is dynamically
dead on X86 (ISD::MEMSET and friends are legal).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22419 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 6814f1522dd7cdeb4674a9ad199f482a2e7aaea1 |
13-Jul-2005 |
Chris Lattner <sabre@nondot.org> |
Fix test/Regression/CodeGen/Generic/2005-07-12-memcpy-i64-length.ll
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22417 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 5f056bf4b862a7c31388a68711dd3b3ed5de2be8 |
10-Jul-2005 |
Chris Lattner <sabre@nondot.org> |
Change *EXTLOAD to use an VTSDNode operand instead of being an MVTSDNode.
This is the last MVTSDNode.
This allows us to eliminate a bunch of special case code for handling
MVTSDNodes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22367 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
electionDAG.cpp
electionDAGPrinter.cpp
|
| 9fadb4c1c0a6d223aa468f9f72f8c2562dc66839 |
10-Jul-2005 |
Chris Lattner <sabre@nondot.org> |
Change TRUNCSTORE to use a VTSDNode operand instead of being an MVTSTDNode
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22366 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
electionDAG.cpp
|
| 15e4b01920d6a0ffbe35d3e5aa88a4b42970b6a7 |
10-Jul-2005 |
Chris Lattner <sabre@nondot.org> |
Introduce a new VTSDNode class with the ultimate goal of eliminating the
MVTSDNode class. This class is used to provide an operand to operators
that require an extra type. We start by converting FP_ROUND_INREG and
SIGN_EXTEND_INREG over to using it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22364 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
electionDAG.cpp
|
| e64e72b794cfa385372436b3c88460aeee0acbf6 |
05-Jul-2005 |
Chris Lattner <sabre@nondot.org> |
Make several cleanups to Andrews varargs change:
1. Pass Value*'s into lowering methods so that the proper pointers can be
added to load/stores from the valist
2. Intrinsics that return void should only return a token chain, not a token
chain/retval pair.
3. Rename LowerVAArgNext -> LowerVAArg, because VANext is long gone.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22338 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| f2eb1396b8fe7b5b1c4bd5f27903209cfa4d20ae |
05-Jul-2005 |
Andrew Lenharth <andrewl@lenharth.org> |
2 fixes:
1: Legalize operand in UINT_TO_FP expanision
2: SRA x, const i8 was not promoting the constant to shift amount type.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22337 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| c6bead211b608c51270e821f28bb50eed71be6c9 |
02-Jul-2005 |
Andrew Lenharth <andrewl@lenharth.org> |
I really didn't think this was necessary. But, Legalize wasn't running again
and legalizing the extload. Strange. Should fix most alpha regressions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22329 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 31559081a4285f4b7282e765aea4ec8a8e1d396c |
30-Jun-2005 |
Andrew Lenharth <andrewl@lenharth.org> |
oops
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22320 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 9d416f713e8b9e4f0c0c2b3f6f57ce2dd8993209 |
30-Jun-2005 |
Andrew Lenharth <andrewl@lenharth.org> |
FP EXTLOAD is not support on all archs, expand to LOAD and FP_EXTEND
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22319 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 06ef88472f7bac3512e224974e87a0a456471b82 |
29-Jun-2005 |
Andrew Lenharth <andrewl@lenharth.org> |
restore old srcValueNode behavior and try to to work around it
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22315 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
electionDAGISel.cpp
|
| 782ad62f334c732143047950dff4a1692538735d |
29-Jun-2005 |
Andrew Lenharth <andrewl@lenharth.org> |
tracking the instructions causing loads and stores provides more information than just the pointer being loaded or stored
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22311 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
electionDAGISel.cpp
|
| f4b3278aeba23efbeacf6be5c33273e2945be2f2 |
28-Jun-2005 |
Andrew Lenharth <andrewl@lenharth.org> |
Adapt the code for handling uint -> fp conversion for the 32 bit case to
handling it in the 64 bit case. The two code paths should probably be merged.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22302 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 213e557cef3e653e2d3a00b07b137c143128430a |
22-Jun-2005 |
Andrew Lenharth <andrewl@lenharth.org> |
If we support structs as va_list, we must pass pointers to them to va_copy
See last commit for LangRef, this implements it on all targets.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22273 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 558bc88a00930fce283b240b7c9555f649a18f1b |
18-Jun-2005 |
Andrew Lenharth <andrewl@lenharth.org> |
core changes for varargs
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22254 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 41aaf7016ebf205d8b02c857461f679a3e82f9d0 |
16-Jun-2005 |
Nate Begeman <natebegeman@mac.com> |
Fix bug 537 test 2, which checks to make sure that we fold A+(B-A) -> B for
integer types. Add a couple checks to not perform these kinds of transform
on floating point values.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22228 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| e5eb6f829c983dfe0da6634f5ea46a2bf16f359e |
15-May-2005 |
Chris Lattner <sabre@nondot.org> |
Add some simplifications for MULH[SU]. This allows us to compile this:
long %bar(long %X) {
%Y = mul long %X, 4294967297
ret long %Y
}
to this:
l1_bar:
mov %EAX, DWORD PTR [%ESP + 4]
mov %EDX, %EAX
add %EDX, DWORD PTR [%ESP + 8]
ret
instead of:
l1_bar:
mov %ECX, DWORD PTR [%ESP + 4]
mov %EDX, 1
mov %EAX, %ECX
mul %EDX
add %EDX, %ECX
add %EDX, DWORD PTR [%ESP + 8]
mov %EAX, %ECX
ret
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22044 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 1ca85d567c8860a8a7cf0730107f4ee701fa4fd0 |
14-May-2005 |
Chris Lattner <sabre@nondot.org> |
Fix construction of ioport intrinsics, fixing X86/io.llx and io-port.llx
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22026 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 2789bde57f4245f4418a2d8d54e7f372b71f0a7d |
14-May-2005 |
Chris Lattner <sabre@nondot.org> |
allow token chain at start or end of node
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22020 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 3e01136f9fc2e1db9207d278002e76e6175783e9 |
14-May-2005 |
Chris Lattner <sabre@nondot.org> |
remove special case hacks for readport/readio from the binary operator
codepath
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22019 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
electionDAG.cpp
|
| 385328ce416e2b98d7113a75d9413a56a2b10318 |
14-May-2005 |
Chris Lattner <sabre@nondot.org> |
Implement fixme's by memoizing nodes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22018 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| b7f7d514220693728b90dfc8293b964fadd58df2 |
14-May-2005 |
Chris Lattner <sabre@nondot.org> |
Turn this into a wrapper for a simpler version of getNode.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22016 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| adf6c2a0cb638e8b211200b57b927d16f6e1cfc4 |
14-May-2005 |
Chris Lattner <sabre@nondot.org> |
Eliminate special purpose hacks for dynamic_stack_alloc.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22015 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
electionDAG.cpp
electionDAGISel.cpp
|
| e89083a9300dc463e3b79eabe2b9913d85338d28 |
14-May-2005 |
Chris Lattner <sabre@nondot.org> |
Use the general mechanism for creating multi-value nodes instead of using
special case hacks.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22014 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
electionDAG.cpp
|
| 5fa4fa4e0fde8aebc55a05258d2a274f3c7e1df6 |
14-May-2005 |
Chris Lattner <sabre@nondot.org> |
Wrap long line, actually add node to the graph.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22011 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| d73cc5d0585e86bf6d350ab9fd9caf85bdfc8b52 |
14-May-2005 |
Chris Lattner <sabre@nondot.org> |
legalize target-specific operations
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22010 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 89c34637cb471609343c2e4f4b08a81779189aa7 |
14-May-2005 |
Chris Lattner <sabre@nondot.org> |
add a getNode() version that allows construction of any node type.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22009 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 50381b6c4180e9a2b983d4623da2e485cd768632 |
14-May-2005 |
Chris Lattner <sabre@nondot.org> |
LowerOperation takes a dag
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22004 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
electionDAGISel.cpp
|
| a88a260dbd874a3bdd3e47f4f15ab0d7c7803044 |
14-May-2005 |
Chris Lattner <sabre@nondot.org> |
Allow targets to have a custom int64->fp expander if desired
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22001 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| a8217e3000b5b01c4a95316aef078a9d02a9a119 |
14-May-2005 |
Chris Lattner <sabre@nondot.org> |
Align doubles on 8-byte boundaries if possible.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21993 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| adf6a965a321372c640845407195594835921eb4 |
13-May-2005 |
Chris Lattner <sabre@nondot.org> |
Add an isTailCall flag to LowerCallTo
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21958 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
electionDAGISel.cpp
|
| d71c04199c447de39a2cab240c2fb7f717973e20 |
13-May-2005 |
Chris Lattner <sabre@nondot.org> |
Handle TAILCALL node
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21957 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
electionDAG.cpp
|
| 405ef9e28d955c1b107c27bedfd4be8b9165af01 |
13-May-2005 |
Chris Lattner <sabre@nondot.org> |
Emit function entry code after lowering hte arguments.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21931 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 3aa7832c821c19a57aaf6ce87f16d8b49931e644 |
13-May-2005 |
Chris Lattner <sabre@nondot.org> |
Allow targets to emit code into the entry block of each function
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21930 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| eb516e7f0aa3223eab7967f4c0f8132d82efd841 |
13-May-2005 |
Chris Lattner <sabre@nondot.org> |
Fix a problem that nate reduced for me.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21923 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 9530ddcc605cb65d0a19bbfbfb8b73b09c4e4cfa |
13-May-2005 |
Chris Lattner <sabre@nondot.org> |
rename variables and functions to match renamed DAG nodes. Bonus feature:
I can actually remember which one is which now!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21922 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 66de05b606cf31f1f23ed0c4eb1f097738cd1506 |
13-May-2005 |
Chris Lattner <sabre@nondot.org> |
do not call expandop on the same value more than once. This fixes
X86/2004-02-22-Casts.llx
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21919 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| a364fa126a686035909d15a87c4dfd2abc60363c |
13-May-2005 |
Chris Lattner <sabre@nondot.org> |
fix a bad typeo
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21917 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 128b52d3d75f4b74367de43e891cd98b5a9b5483 |
13-May-2005 |
Chris Lattner <sabre@nondot.org> |
update comment
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21916 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 16cd04d26c53c6f81313cafb85f6c0e7a07cdff6 |
13-May-2005 |
Chris Lattner <sabre@nondot.org> |
rename the ADJCALLSTACKDOWN/ADJCALLSTACKUP nodes to be CALLSEQ_START/BEGIN.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21915 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
electionDAG.cpp
|
| 9092fa310c8b2b1645b0d448c4c34b1e8ddc131d |
12-May-2005 |
Chris Lattner <sabre@nondot.org> |
Pass calling convention to use into lower call to
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21900 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
electionDAGISel.cpp
|
| 3becf2026bec881a60cbbe0031d8c51f4d6d4e28 |
12-May-2005 |
Chris Lattner <sabre@nondot.org> |
fix expansion of ct[lt]z nodes
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21896 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 39a8f336305a492fc6d2625f39f08968185616d2 |
12-May-2005 |
Chris Lattner <sabre@nondot.org> |
Expand 64-bit ctlz/cttz nodes for 32-bit targets
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21895 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 383203b0036b8fdeef8119975fdbbd528b760adb |
12-May-2005 |
Chris Lattner <sabre@nondot.org> |
Fix uint->fp casts on PPC, allowing UnitTests/2005-05-12-Int64ToFP to
work on it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21894 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 45982dad53cd184fe8947a1b0206b0b16964f359 |
12-May-2005 |
Chris Lattner <sabre@nondot.org> |
Allow something to be legalized multiple times. This can be used to reduce
legalization iteration
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21892 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 13689e2009e71f7982d1313ed699e0e6a50157d0 |
12-May-2005 |
Chris Lattner <sabre@nondot.org> |
Oops, don't do this after we figure out where to insert the call chains.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21890 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 44d105b7faf5672a2af61a3f0fdfed0d437d5777 |
12-May-2005 |
Chris Lattner <sabre@nondot.org> |
Make sure to expand all nodes, avoiding unintentional node duplication.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21889 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 6980d8295f415caa752b45c745c25a9be0079a9a |
12-May-2005 |
Chris Lattner <sabre@nondot.org> |
handle a common case generated by the uint64 -> FP code path better
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21888 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| e131e5b81e5853f3c2a8c63651898ecd37eaf6f8 |
12-May-2005 |
Chris Lattner <sabre@nondot.org> |
add fixme
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21887 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| b9fa3bc8f39bf1e8df48b85eae4563032dd20bfc |
12-May-2005 |
Chris Lattner <sabre@nondot.org> |
Fix a problem where early legalization can cause token chain problems.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21885 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 88de6e77bfadea8962b017f372658204ab71448c |
12-May-2005 |
Chris Lattner <sabre@nondot.org> |
Make legalize a bit more efficient, and canonicalize sub X, C -> add X, -C
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21882 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
electionDAG.cpp
|
| d7c4a4a6c048d4174b8795598f50fd76c30731ed |
12-May-2005 |
Nate Begeman <natebegeman@mac.com> |
Necessary changes to codegen cttz efficiently on PowerPC
1. Teach LegalizeDAG how to better legalize CTTZ if the target doesn't have
CTPOP, but does have CTLZ
2. Teach PPC32 how to do sub x, const -> add x, -const for valid consts
3. Teach PPC32 how to do and (xor a, -1) b -> andc b, a
4. Teach PPC32 that ISD::CTLZ -> PPC::CNTLZW
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21880 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 0d67f0c80f0295aa44f826ec1402ea73d6b4bd22 |
11-May-2005 |
Chris Lattner <sabre@nondot.org> |
Fix the last remaining bug preventing us from switching the X86 BE over
from the simple isel to the pattern isel. This forces inserted libcalls
to serialize against other function calls, which was breaking
UnitTests/2005-05-12-Int64ToFP. Hopefully this will fix issues on other
targets as well.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21872 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 27e9b4146417a9bdbade90d0ecc32c9567694a87 |
11-May-2005 |
Chris Lattner <sabre@nondot.org> |
Do not memoize ADJCALLSTACKDOWN nodes, provide a method to hack on them.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21871 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 16ce0df92717cd1474029d87efe596d000dc2caa |
11-May-2005 |
Chris Lattner <sabre@nondot.org> |
wrap long line
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21870 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 5c33c9a166c2d68d64c68d8097598d09d9af6c20 |
11-May-2005 |
Chris Lattner <sabre@nondot.org> |
Make sure to legalize generated ctpop nodes, convert tabs to spaces
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21868 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 57ff7e5f6479b43828406a6723b7dde6f673f48c |
11-May-2005 |
Duraid Madina <duraid@octopus.com.au> |
expand count-leading/trailing-zeros; the test 2005-05-11-Popcount-ffs-fls.c
should now pass (the "LLVM" and "REF" results should be identical)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21866 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 18aa680a96c49cf9e28b52f5ab3f2c4f98793636 |
11-May-2005 |
Chris Lattner <sabre@nondot.org> |
Add some notes for expanding clz/ctz
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21862 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| e3ef0a8b9f79d77116e888ffe51730c8279b7363 |
11-May-2005 |
Chris Lattner <sabre@nondot.org> |
Simplify this code, use the proper shift amount
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21861 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 9b583b49103f21888ac3de3f7941a98a63a23aea |
11-May-2005 |
Chris Lattner <sabre@nondot.org> |
Legalize this correctly
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21859 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| edb1add9a093efa266c94b6d0a34c26f5b2d5d7b |
11-May-2005 |
Chris Lattner <sabre@nondot.org> |
implement expansion of ctpop nodes, implementing CodeGen/Generic/llvm-ct-intrinsics.ll
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21856 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 276260b16d8771f96afb919a8ee0811254f5c275 |
11-May-2005 |
Chris Lattner <sabre@nondot.org> |
Print bit count nodes correctly
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21855 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 19bb2283e6b3ce2bcb8bbbe76c61682caae3ddc7 |
10-May-2005 |
Jeff Cohen <jeffc@jolt-lang.org> |
Silence some VC++ warnings
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21838 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| ef311aa7cf26ae0cbb6e784d767801b9058dd24b |
10-May-2005 |
Chris Lattner <sabre@nondot.org> |
The semantics of cast X to bool are a comparison against zero, not a truncation!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21833 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 6d5b8e16462859333db9ad984f05ec2ed1f48f4a |
09-May-2005 |
Chris Lattner <sabre@nondot.org> |
legalize readio/writeio into a load/store if requested
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21827 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 52d08bd9d8a8dcc06148525c7fad6f2ebcad0a42 |
09-May-2005 |
Chris Lattner <sabre@nondot.org> |
legalize READPORT, WRITEPORT, READIO, WRITEIO, at least in the basic cases
where they are directly supported by the architecture. Wrap a bunch of
long lines :(
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21826 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| d0f6c1f52dddf11701406c31fd3e9448314a8366 |
09-May-2005 |
Chris Lattner <sabre@nondot.org> |
Add support for matching the READPORT, WRITEPORT, READIO, WRITEIO intrinsics
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21825 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 3c6910153c2913ea3e566bbbeb4070f15bfae2f4 |
09-May-2005 |
Chris Lattner <sabre@nondot.org> |
Add support for READPORT, WRITEPORT, READIO, WRITEIO
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21824 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 57aa5961a92b633e668038963fc655d74afe679d |
09-May-2005 |
Chris Lattner <sabre@nondot.org> |
Fold shifts into subsequent SHL's. These shifts often arise due to addrses
arithmetic lowering.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21818 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| fd414a27fdc85e45af00ed4329cb0e6508470dea |
09-May-2005 |
Chris Lattner <sabre@nondot.org> |
Don't use the load/store instruction as the source pointer, use the pointer
being stored/loaded through!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21806 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
electionDAGISel.cpp
|
| 0437cdd6dc204a77854a61bf19f33cd272224d10 |
09-May-2005 |
Chris Lattner <sabre@nondot.org> |
memoize all nodes, even null Value* nodes. Do not add two token chain outputs
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21805 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 369e6db9b6033bb60519b0ad84afeacc9ec9b416 |
09-May-2005 |
Chris Lattner <sabre@nondot.org> |
wrap long lines
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21804 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 2bf3c26b2bb783aada259f1c70be6dd0798f6126 |
09-May-2005 |
Chris Lattner <sabre@nondot.org> |
Print SrcValue nodes correctly
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21803 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
electionDAGPrinter.cpp
|
| 7ea0ade1b6a16b5836645b61da671715180ab039 |
05-May-2005 |
Chris Lattner <sabre@nondot.org> |
When hitting an unsupported intrinsic, actually print it
Lower debug info to noops.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21698 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| ded10bfb46aeacf02acec0018a0b970c1f932a32 |
05-May-2005 |
Andrew Lenharth <andrewl@lenharth.org> |
ctpop lowering in legalize
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21697 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| fecf095292991bdf9396fec474011446107f9813 |
04-May-2005 |
Andrew Lenharth <andrewl@lenharth.org> |
Make promoteOp work for CT*
Proof?
ubyte %bar(ubyte %x) {
entry:
%tmp.1 = call ubyte %llvm.ctlz( ubyte %x )
ret ubyte %tmp.1
}
==>
zapnot $16,1,$0
CTLZ $0,$0
subq $0,56,$0
zapnot $0,1,$0
ret $31,($26),1
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21691 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 691ef2ba066dda14ae4ac0ad645054fbc967785a |
03-May-2005 |
Andrew Lenharth <andrewl@lenharth.org> |
Implement count leading zeros (ctlz), count trailing zeros (cttz), and count
population (ctpop). Generic lowering is implemented, however only promotion
is implemented for SelectionDAG at the moment.
More coming soon.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21676 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
electionDAG.cpp
electionDAGISel.cpp
|
| f76e7dc8d8ac1855ef59698e82c757548ef4ca65 |
30-Apr-2005 |
Chris Lattner <sabre@nondot.org> |
Codegen and legalize sin/cos/llvm.sqrt as FSIN/FCOS/FSQRT calls. This patch
was contributed by Morten Ofstad, with some minor tweaks and bug fixes added
by me.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21636 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
electionDAGISel.cpp
|
| da6ba87d234a934409e8d8d5b131b7341ab4bf97 |
28-Apr-2005 |
Chris Lattner <sabre@nondot.org> |
Legalize FSQRT, FSIN, FCOS nodes, patch contributed by Morten Ofstad
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21606 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 7f64464ff100bcb7661b65c74c13dc88e83eb65b |
28-Apr-2005 |
Chris Lattner <sabre@nondot.org> |
Add FSQRT, FSIN, FCOS nodes, patch contributed by Morten Ofstad
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21605 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 2d86ea21dd76647cb054fd5d27df9e49efc672b6 |
27-Apr-2005 |
Andrew Lenharth <andrewl@lenharth.org> |
Implement Value* tracking for loads and stores in the selection DAG. This enables one to use alias analysis in the backends.
(TRUNK)Stores and (EXT|ZEXT|SEXT)Loads have an extra SDOperand which is a SrcValueSDNode which contains the Value*. Note that if the operation is introduced by the backend, it will still have the operand, but the value* will be null.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21599 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
electionDAG.cpp
electionDAGISel.cpp
|
| d36f979085048f0d24dbe4a5584acd89153940a8 |
26-Apr-2005 |
Chris Lattner <sabre@nondot.org> |
Fold (X > -1) | (Y > -1) --> (X&Y > -1)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21552 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 229ab2e7b24847ea0d248d3d8b3d83adc8e5f5fe |
25-Apr-2005 |
Chris Lattner <sabre@nondot.org> |
implement some more logical compares with constants, so that:
int foo1(int x, int y) {
int t1 = x >= 0;
int t2 = y >= 0;
return t1 & t2;
}
int foo2(int x, int y) {
int t1 = x == -1;
int t2 = y == -1;
return t1 & t2;
}
produces:
_foo1:
or r2, r4, r3
srwi r2, r2, 31
xori r3, r2, 1
blr
_foo2:
and r2, r4, r3
addic r2, r2, 1
li r2, 0
addze r3, r2
blr
instead of:
_foo1:
srwi r2, r4, 31
xori r2, r2, 1
srwi r3, r3, 31
xori r3, r3, 1
and r3, r2, r3
blr
_foo2:
addic r2, r4, 1
li r2, 0
addze r2, r2
addic r3, r3, 1
li r3, 0
addze r3, r3
and r3, r2, r3
blr
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21547 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 6ea927930433f5e22acd2316e34e7c7e48ac1a60 |
25-Apr-2005 |
Chris Lattner <sabre@nondot.org> |
Codegen x < 0 | y < 0 as (x|y) < 0. This allows us to compile this to:
_foo:
or r2, r4, r3
srwi r3, r2, 31
blr
instead of:
_foo:
srwi r2, r4, 31
srwi r3, r3, 31
or r3, r2, r3
blr
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21544 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| dedf2bd5a34dac25e4245f58bb902ced6b64edd9 |
22-Apr-2005 |
Misha Brukman <brukman+llvm@gmail.com> |
Convert tabs to spaces
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21439 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
electionDAGISel.cpp
electionDAGPrinter.cpp
|
| f976c856fcc5055f3fc7d9f070d72c2d027c1d9d |
22-Apr-2005 |
Misha Brukman <brukman+llvm@gmail.com> |
Remove trailing whitespace
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21422 91177308-0d34-0410-b5e6-96231b3b80d8
argetLowering.cpp
|
| edf128a7fa90f2b0b7ee24741a04a7ae1ecd6f7e |
22-Apr-2005 |
Misha Brukman <brukman+llvm@gmail.com> |
Remove trailing whitespace
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21420 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
electionDAG.cpp
electionDAGISel.cpp
electionDAGPrinter.cpp
|
| 588bbbffa1cf29201c72b8b3f04c6330f4bde2dd |
21-Apr-2005 |
Chris Lattner <sabre@nondot.org> |
Improve and elimination. On PPC, for:
bool %test(int %X) {
%Y = and int %X, 8
%Z = setne int %Y, 0
ret bool %Z
}
we now generate this:
rlwinm r2, r3, 0, 28, 28
srwi r3, r2, 3
instead of this:
rlwinm r2, r3, 0, 28, 28
srwi r2, r2, 3
rlwinm r3, r2, 0, 31, 31
I'll leave it to Nate to get it down to one instruction. :)
---------------------------------------------------------------------
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21391 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 1c2a9b95dc73c6fd11052e384ea5b10d011abb66 |
21-Apr-2005 |
Chris Lattner <sabre@nondot.org> |
Fold (x & 8) != 0 and (x & 8) == 8 into (x & 8) >> 3.
This turns this PPC code:
rlwinm r2, r3, 0, 28, 28
cmpwi cr7, r2, 8
mfcr r2
rlwinm r3, r2, 31, 31, 31
into this:
rlwinm r2, r3, 0, 28, 28
srwi r2, r2, 3
rlwinm r3, r2, 0, 31, 31
Next up, nuking the extra and.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21390 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| fda2b55e1b169044828c8f7b2cba073bfd455dd5 |
18-Apr-2005 |
Chris Lattner <sabre@nondot.org> |
Fold setcc of MVT::i1 operands into logical operations
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21319 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 4a44c8df1984ebcb253dda283bd2c117cbbb1929 |
18-Apr-2005 |
Chris Lattner <sabre@nondot.org> |
Another minor simplification: handle setcc (zero_extend x), c -> setcc(x, c')
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21318 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 7467c9b086d3917333ece77e9fc8624922d42ef1 |
18-Apr-2005 |
Chris Lattner <sabre@nondot.org> |
Another simple xform
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21317 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 706aa9685ad74e4825544064bf28aa5b42578812 |
18-Apr-2005 |
Chris Lattner <sabre@nondot.org> |
Fold:
// (X != 0) | (Y != 0) -> (X|Y != 0)
// (X == 0) & (Y == 0) -> (X|Y == 0)
Compiling this:
int %bar(int %a, int %b) {
entry:
%tmp.1 = setne int %a, 0
%tmp.2 = setne int %b, 0
%tmp.3 = or bool %tmp.1, %tmp.2
%retval = cast bool %tmp.3 to int
ret int %retval
}
to this:
_bar:
or r2, r3, r4
addic r3, r2, -1
subfe r3, r3, r2
blr
instead of:
_bar:
addic r2, r3, -1
subfe r2, r2, r3
addic r3, r4, -1
subfe r3, r3, r4
or r3, r2, r3
blr
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21316 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 36019aa5c66abfa0cd55a21004dfef79ab2a3cde |
18-Apr-2005 |
Chris Lattner <sabre@nondot.org> |
Make the AND elimination operation recursive and significantly more powerful,
eliminating an and for Nate's testcase:
int %bar(int %a, int %b) {
entry:
%tmp.1 = setne int %a, 0
%tmp.2 = setne int %b, 0
%tmp.3 = or bool %tmp.1, %tmp.2
%retval = cast bool %tmp.3 to int
ret int %retval
}
generating:
_bar:
addic r2, r3, -1
subfe r2, r2, r3
addic r3, r4, -1
subfe r3, r3, r4
or r3, r2, r3
blr
instead of:
_bar:
addic r2, r3, -1
subfe r2, r2, r3
addic r3, r4, -1
subfe r3, r3, r4
or r2, r2, r3
rlwinm r3, r2, 0, 31, 31
blr
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21315 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 72ea281d61c74abfa875d4d7ba614a993119df8a |
14-Apr-2005 |
Nate Begeman <natebegeman@mac.com> |
Add a couple missing transforms in getSetCC that were triggering assertions
in the PPC Pattern ISel
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21297 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| eea805e74ce49f98e03c87a20cf2e6a6ff1b7c52 |
13-Apr-2005 |
Nate Begeman <natebegeman@mac.com> |
Disbale the broken fold of shift + sz[ext] for now
Move the transform for select (a < 0) ? b : 0 into the dag from ppc isel
Enable the dag to fold and (setcc, 1) -> setcc for targets where setcc
always produces zero or one.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21291 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 97e001dec7d8972c2734ea63ca020d9136172ba0 |
13-Apr-2005 |
Chris Lattner <sabre@nondot.org> |
fix an infinite loop
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21289 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| fd8d389edef29f6442cb4e32ee4b7ffe1d0c71d7 |
13-Apr-2005 |
Chris Lattner <sabre@nondot.org> |
fix some serious miscompiles on ia64, alpha, and ppc
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21288 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 51679c430f1c02cea0717bb20d9b7eac84adf9b2 |
13-Apr-2005 |
Chris Lattner <sabre@nondot.org> |
avoid work when possible, perhaps fix the problem nate and andrew are seeing
with != 0 comparisons vanishing.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21287 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| e9c35e7309a8293852ba71d874fa4dc99e07e6fe |
13-Apr-2005 |
Chris Lattner <sabre@nondot.org> |
Implement expansion of unsigned i64 -> FP.
Note that this probably only works for little endian targets, but is enough
to get siod working :)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21280 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| ffe284c65137ac1d8e4421550bdc9979ed80e9ee |
13-Apr-2005 |
Chris Lattner <sabre@nondot.org> |
Make expansion of uint->fp cast assert out instead of infinitely recurse.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21275 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| e666fcfbdd1c2a8f47c4577ef4ff4a8280099e28 |
13-Apr-2005 |
Chris Lattner <sabre@nondot.org> |
add back the optimization that Nate added for shl X, (zext_inreg y)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21273 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 8a8dbfa57cb8bf6bf98a5cfc434dff4d9bdf5e0b |
13-Apr-2005 |
Chris Lattner <sabre@nondot.org> |
Oops, remove these too.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21272 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 23993561e24b2a6eaf0e036062522ab825c30d3f |
13-Apr-2005 |
Chris Lattner <sabre@nondot.org> |
Instead of making ZERO_EXTEND_INREG nodes, use the helper method in
SelectionDAG to do the job with AND. Don't legalize Z_E_I anymore as
it is gone
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21266 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 0f2287baa18fb1c6a7e8ba42ba5163c2845b8654 |
13-Apr-2005 |
Chris Lattner <sabre@nondot.org> |
Remove all foldings of ZERO_EXTEND_INREG, moving them to work for AND nodes
instead. OVerall, this increases the amount of folding we can do.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21265 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| db81ebab89796551eb74100f0c294fae2446d6be |
13-Apr-2005 |
Nate Begeman <natebegeman@mac.com> |
Fold shift x, [sz]ext(y) -> shift x, y
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21262 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| b882752bd04602249d391699dc7183de007f8964 |
13-Apr-2005 |
Nate Begeman <natebegeman@mac.com> |
Fold shift by size larger than type size to undef
Make llvm undef values generate ISD::UNDEF nodes
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21261 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
electionDAGISel.cpp
|
| 1c51c6ac13b5e68b099605021784c7f552dcce3c |
12-Apr-2005 |
Chris Lattner <sabre@nondot.org> |
promote extload i1 -> extload i8
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21258 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| fd1f1ee0baf9c808fdee14bdbfe76d4a5e66210d |
12-Apr-2005 |
Chris Lattner <sabre@nondot.org> |
Remove some redundant checks, add a couple of new ones. This allows us to
compile this:
int foo (unsigned long a, unsigned long long g) {
return a >= g;
}
To:
foo:
movl 8(%esp), %eax
cmpl %eax, 4(%esp)
setae %al
cmpl $0, 12(%esp)
sete %cl
andb %al, %cl
movzbl %cl, %eax
ret
instead of:
foo:
movl 8(%esp), %eax
cmpl %eax, 4(%esp)
setae %al
movzbw %al, %cx
movl 12(%esp), %edx
cmpl $0, %edx
sete %al
movzbw %al, %ax
cmpl $0, %edx
cmove %cx, %ax
movzbl %al, %eax
ret
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21244 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 5b95ed652fcfe578aa8af4e21318fca989164e21 |
12-Apr-2005 |
Chris Lattner <sabre@nondot.org> |
Emit comparisons against the sign bit better. Codegen this:
bool %test1(long %X) {
%A = setlt long %X, 0
ret bool %A
}
like this:
test1:
cmpl $0, 8(%esp)
setl %al
movzbl %al, %eax
ret
instead of:
test1:
movl 8(%esp), %ecx
cmpl $0, %ecx
setl %al
movzbw %al, %ax
cmpl $0, 4(%esp)
setb %dl
movzbw %dl, %dx
cmpl $0, %ecx
cmove %dx, %ax
movzbl %al, %eax
ret
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21243 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 08b698e38db5ab5db44c0472e2a7f4f780887629 |
12-Apr-2005 |
Chris Lattner <sabre@nondot.org> |
Emit long comparison against -1 better. Instead of this (x86):
test2:
movl 8(%esp), %eax
notl %eax
movl 4(%esp), %ecx
notl %ecx
orl %eax, %ecx
cmpl $0, %ecx
sete %al
movzbl %al, %eax
ret
or this (PPC):
_test2:
nor r2, r4, r4
nor r3, r3, r3
or r2, r2, r3
cntlzw r2, r2
srwi r3, r2, 5
blr
Emit this:
test2:
movl 8(%esp), %eax
andl 4(%esp), %eax
cmpl $-1, %eax
sete %al
movzbl %al, %eax
ret
or this:
_test2:
.LBB_test2_0: ;
and r2, r4, r3
cmpwi cr0, r2, -1
li r3, 1
li r2, 0
beq .LBB_test2_2 ;
.LBB_test2_1: ;
or r3, r2, r2
.LBB_test2_2: ;
blr
it seems like the PPC isel could do better for R32 == -1 case.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21242 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 3b2c1d95a27479a0d6ce2e6fcd1f81185568bb31 |
12-Apr-2005 |
Chris Lattner <sabre@nondot.org> |
canonicalize x <u 1 -> x == 0. On this testcase:
unsigned long long g;
unsigned long foo (unsigned long a) {
return (a >= g) ? 1 : 0;
}
It changes the ppc code from:
_foo:
.LBB_foo_0: ; entry
mflr r11
stw r11, 8(r1)
bl "L00000$pb"
"L00000$pb":
mflr r2
addis r2, r2, ha16(L_g$non_lazy_ptr-"L00000$pb")
lwz r2, lo16(L_g$non_lazy_ptr-"L00000$pb")(r2)
lwz r4, 0(r2)
lwz r2, 4(r2)
cmplw cr0, r3, r2
li r2, 1
li r3, 0
bge .LBB_foo_2 ; entry
.LBB_foo_1: ; entry
or r2, r3, r3
.LBB_foo_2: ; entry
cmplwi cr0, r4, 1
li r3, 1
li r5, 0
blt .LBB_foo_4 ; entry
.LBB_foo_3: ; entry
or r3, r5, r5
.LBB_foo_4: ; entry
cmpwi cr0, r4, 0
beq .LBB_foo_6 ; entry
.LBB_foo_5: ; entry
or r2, r3, r3
.LBB_foo_6: ; entry
rlwinm r3, r2, 0, 31, 31
lwz r11, 8(r1)
mtlr r11
blr
to:
_foo:
.LBB_foo_0: ; entry
mflr r11
stw r11, 8(r1)
bl "L00000$pb"
"L00000$pb":
mflr r2
addis r2, r2, ha16(L_g$non_lazy_ptr-"L00000$pb")
lwz r2, lo16(L_g$non_lazy_ptr-"L00000$pb")(r2)
lwz r4, 0(r2)
lwz r2, 4(r2)
cmplw cr0, r3, r2
li r2, 1
li r3, 0
bge .LBB_foo_2 ; entry
.LBB_foo_1: ; entry
or r2, r3, r3
.LBB_foo_2: ; entry
cntlzw r3, r4
srwi r3, r3, 5
cmpwi cr0, r4, 0
beq .LBB_foo_4 ; entry
.LBB_foo_3: ; entry
or r2, r3, r3
.LBB_foo_4: ; entry
rlwinm r3, r2, 0, 31, 31
lwz r11, 8(r1)
mtlr r11
blr
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21241 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| bd0781ed12dd817f760065e3ac2dcff12fb29440 |
11-Apr-2005 |
Chris Lattner <sabre@nondot.org> |
Teach the dag mechanism that this:
long long test2(unsigned A, unsigned B) {
return ((unsigned long long)A << 32) + B;
}
is equivalent to this:
long long test1(unsigned A, unsigned B) {
return ((unsigned long long)A << 32) | B;
}
Now they are both codegen'd to this on ppc:
_test2:
blr
or this on x86:
test2:
movl 4(%esp), %edx
movl 8(%esp), %eax
ret
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21231 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| ee27f57a6a4dd7fa9259b3604f563907da1f65ef |
11-Apr-2005 |
Chris Lattner <sabre@nondot.org> |
Fix expansion of shifts by exactly NVT bits on arch's (like X86) that have
masking shifts.
This fixes the miscompilation of this:
long long test1(unsigned A, unsigned B) {
return ((unsigned long long)A << 32) | B;
}
into this:
test1:
movl 4(%esp), %edx
movl %edx, %eax
orl 8(%esp), %eax
ret
allowing us to generate this instead:
test1:
movl 4(%esp), %edx
movl 8(%esp), %eax
ret
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21230 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| c7c16575fea9aeffe8a63ddabe7c3c25f81ed799 |
11-Apr-2005 |
Nate Begeman <natebegeman@mac.com> |
Fix libcall code to not pass a NULL Chain to LowerCallTo
Fix libcall code to not crash or assert looking for an ADJCALLSTACKUP node
when it is known that there is no ADJCALLSTACKDOWN to match.
Expand i64 multiply when ISD::MULHU is legal for the target.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21214 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 2bb6f412820cad829e1dd3ea4bd8a1b26c8c23b6 |
11-Apr-2005 |
Chris Lattner <sabre@nondot.org> |
Don't bother sign/zext_inreg'ing the result of an and operation if we know
the result does change as a result of the extend.
This improves codegen for Alpha on this testcase:
int %a(ushort* %i) {
%tmp.1 = load ushort* %i
%tmp.2 = cast ushort %tmp.1 to int
%tmp.4 = and int %tmp.2, 1
ret int %tmp.4
}
Generating:
a:
ldgp $29, 0($27)
ldwu $0,0($16)
and $0,1,$0
ret $31,($26),1
instead of:
a:
ldgp $29, 0($27)
ldwu $0,0($16)
and $0,1,$0
addl $0,0,$0
ret $31,($26),1
btw, alpha really should switch to livein/outs for args :)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21213 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 01ff7216dd7829d4094754086baf28aa2d7149ac |
11-Apr-2005 |
Chris Lattner <sabre@nondot.org> |
Teach legalize to deal with targets that don't support some SEXTLOAD/ZEXTLOADs
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21212 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 6841dec8c1c071b5a417fb4172633c68301be36c |
10-Apr-2005 |
Chris Lattner <sabre@nondot.org> |
don't zextload fp values!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21209 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 232ee95a09a583b7d66b90ee7ddf7fdb9c194a04 |
10-Apr-2005 |
Chris Lattner <sabre@nondot.org> |
Until we have a dag combiner, promote using zextload's instead of extloads.
This gives the optimizer a bit of information about the top-part of the
value.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21205 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 45278e37eb9823ceabdaab6b27dabf3b5dcdcede |
10-Apr-2005 |
Chris Lattner <sabre@nondot.org> |
Fold zext_inreg(zextload), likewise for sext's
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21204 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| edeecfcbd5ae3fe6d7e65107203a93ed196aaf1b |
10-Apr-2005 |
Chris Lattner <sabre@nondot.org> |
add a simple xform
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21203 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| dea29e25c32d2651e2efaff67bc30803ea24d991 |
10-Apr-2005 |
Chris Lattner <sabre@nondot.org> |
Fix a thinko. If the operand is promoted, pass the promoted value into
the new zero extend, not the original operand. This fixes cast bool -> long
on ppc.
Add an unrelated fixme
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21196 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
electionDAG.cpp
|
| a2daa8c78d8749d6b4743e8bbfe4d522cd13a669 |
09-Apr-2005 |
Chris Lattner <sabre@nondot.org> |
add a little peephole optimization. This allows us to codegen:
int a(short i) {
return i & 1;
}
as
_a:
andi. r3, r3, 1
blr
instead of:
_a:
rlwinm r2, r3, 0, 16, 31
andi. r3, r2, 1
blr
on ppc. It should also help the other risc targets.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21189 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 59723e96987bdbfbada75fdbf1742f6a28d90d7d |
09-Apr-2005 |
Chris Lattner <sabre@nondot.org> |
recognize some patterns as fabs operations, so that fabs at the source level
is deconstructed then reconstructed here. This catches 19 fabs's in 177.mesa
9 in 168.wupwise, 5 in 171.swim, 3 in 172.mgrid, and 14 in 173.applu out of
specfp2000.
This allows the X86 code generator to make MUCH better code than before for
each of these and saves one instr on ppc.
This depends on the previous CFE patch to expose these correctly.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21171 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| e7ccd4acd2ee9753e6d212efd522be5c7de154d7 |
09-Apr-2005 |
Chris Lattner <sabre@nondot.org> |
Emit BRCONDTWOWAY when possible.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21167 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 411e888c1b4155190c8cffe388631ee20693b309 |
09-Apr-2005 |
Chris Lattner <sabre@nondot.org> |
Legalize BRCONDTWOWAY into a BRCOND/BR pair if a target doesn't support it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21166 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| ef847df0870b9e3407bdc24ccb9db9ba2df817e6 |
09-Apr-2005 |
Chris Lattner <sabre@nondot.org> |
print and fold BRCONDTWOWAY correctly
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21165 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 485df9b84b5753154d3762b2a176b8b6684f716f |
09-Apr-2005 |
Chris Lattner <sabre@nondot.org> |
canonicalize a bunch of operations involving fneg
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21160 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 5a6bace3ab8db44e5412a773626fbb76fb316767 |
07-Apr-2005 |
Chris Lattner <sabre@nondot.org> |
If a target zero or sign extends the result of its setcc, allow folding of
this into sign/zero extension instructions later.
On PPC, for example, this testcase:
%G = external global sbyte
implementation
void %test(int %X, int %Y) {
%C = setlt int %X, %Y
%D = cast bool %C to sbyte
store sbyte %D, sbyte* %G
ret void
}
Now codegens to:
cmpw cr0, r3, r4
li r3, 1
li r4, 0
blt .LBB_test_2 ;
.LBB_test_1: ;
or r3, r4, r4
.LBB_test_2: ;
addis r2, r2, ha16(L_G$non_lazy_ptr-"L00000$pb")
lwz r2, lo16(L_G$non_lazy_ptr-"L00000$pb")(r2)
stb r3, 0(r2)
instead of:
cmpw cr0, r3, r4
li r3, 1
li r4, 0
blt .LBB_test_2 ;
.LBB_test_1: ;
or r3, r4, r4
.LBB_test_2: ;
*** rlwinm r3, r3, 0, 31, 31
addis r2, r2, ha16(L_G$non_lazy_ptr-"L00000$pb")
lwz r2, lo16(L_G$non_lazy_ptr-"L00000$pb")(r2)
stb r3, 0(r2)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21148 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 2467392c5931579e2354b9e64e8ecf6cc5192d13 |
07-Apr-2005 |
Chris Lattner <sabre@nondot.org> |
Remove somethign I had for testing
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21144 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 67255a1d1783c126c1cbd4982670a61bc63aacce |
07-Apr-2005 |
Chris Lattner <sabre@nondot.org> |
This patch does two things. First, it canonicalizes 'X >= C' -> 'X > C-1'
(likewise for <= >=u >=u).
Second, it implements a special case hack to turn 'X gtu SINTMAX' -> 'X lt 0'
On powerpc, for example, this changes this:
lis r2, 32767
ori r2, r2, 65535
cmplw cr0, r3, r2
bgt .LBB_test_2
into:
cmpwi cr0, r3, 0
blt .LBB_test_2
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21142 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 8e8bd656b3eeb69947719c3673f37756f1b2a466 |
07-Apr-2005 |
Chris Lattner <sabre@nondot.org> |
Fix a really scary bug that Nate found where we weren't deleting the right
elements auto of the autoCSE maps.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21128 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| f1fe32e337cf825a27a57bb3e9fb847bc91a26ce |
06-Apr-2005 |
Nate Begeman <natebegeman@mac.com> |
Teach ExpandShift how to handle shifts by a constant. This allows targets
like PowerPC to codegen long shifts in many fewer instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21122 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| c105e19864f2792c52bc6bb765d365308f38f461 |
06-Apr-2005 |
Nate Begeman <natebegeman@mac.com> |
Expand SREM and UREM for targets that claim not to have them, like PowerPC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21103 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 1867054643c20c3027421ab7711664b4d55fe4c6 |
06-Apr-2005 |
Nate Begeman <natebegeman@mac.com> |
Add MULHU and MULHS nodes for the high part of an (un)signed 32x32=64b
multiply.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21102 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 79e46acd35df36477029e9f534ab1a366a98df56 |
04-Apr-2005 |
Nate Begeman <natebegeman@mac.com> |
Handle expanding arguments to ISD::TRUNCATE. This happens on PowerPC when
you have something like i16 = truncate i64. This fixes Regression/C/casts
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21073 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 06098e0e9bd542f227aa3802768d1416e79e9f45 |
04-Apr-2005 |
Chris Lattner <sabre@nondot.org> |
Fix sign_extend and zero_extend of promoted value types to expanded value
types. This occurs when casting short to long on PPC for example.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21072 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| c0f18152d94bf65061fab4b80869998cfb0439e1 |
02-Apr-2005 |
Chris Lattner <sabre@nondot.org> |
transform fabs/fabsf calls into FABS nodes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21014 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 4af6e0d7836126630f579b0a34f054321187f00b |
02-Apr-2005 |
Chris Lattner <sabre@nondot.org> |
Expand fabs into fneg
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21013 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| b9fccc41933648647e3f7669612c683eb5de0d58 |
02-Apr-2005 |
Chris Lattner <sabre@nondot.org> |
Turn -0.0 - X -> fneg
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21011 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 2c8086f4b9916b2d02842be5e375276023225fba |
02-Apr-2005 |
Chris Lattner <sabre@nondot.org> |
Several changes mixed up here. First when legalizing a DAG with pcmarker,
dont' regen the whole dag if unneccesary. Second, fix and ugly bug with
the _PARTS nodes that caused legalize to produce multiples of them.
Finally, implement initial support for FABS and FNEG. Currently FNEG is
the only one to be trusted though.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21009 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| ff9fd0a99c00a5ec17b867365bd2c22fb4061363 |
02-Apr-2005 |
Chris Lattner <sabre@nondot.org> |
print fneg/fabs
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21008 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 5b359c6c4f052e41579ad7da9af37db4f54207d9 |
02-Apr-2005 |
Chris Lattner <sabre@nondot.org> |
fix some bugs in the implementation of SHL_PARTS and friends.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21004 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
electionDAG.cpp
|
| 4759982a2d4ab597fb69d4a1113d0f35e673a4e1 |
02-Apr-2005 |
Chris Lattner <sabre@nondot.org> |
Turn expanded shift operations into (e.g.) SHL_PARTS if the target supports it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21002 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 41be951a47d2141a3c6693c0b598509c889f3f37 |
02-Apr-2005 |
Chris Lattner <sabre@nondot.org> |
Print some new nodes
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21001 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| f4b457987fca50a1dc86e1a60dad2cff2b060945 |
02-Apr-2005 |
Chris Lattner <sabre@nondot.org> |
Fix a bug when inserting a libcall into a function with no other calls.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@20999 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| ea19cd51aaf87c5cc19e7cdc2c32ddbefcac7b8f |
02-Apr-2005 |
Nate Begeman <natebegeman@mac.com> |
Fix a warning about an unhandled switch case
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@20994 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| fc1b1dad88a256ab5ab16dd548ad82df8efa2ca9 |
02-Apr-2005 |
Nate Begeman <natebegeman@mac.com> |
Add ISD::UNDEF node
Teach the SelectionDAG code how to expand and promote it
Have PPC32 LowerCallTo generate ISD::UNDEF for int arg regs used up by fp
arguments, but not shadowing their value. This allows us to do the right
thing with both fixed and vararg floating point arguments.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@20988 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
electionDAG.cpp
|
| 95762124a1d781cc0f8cbc4c22e9c5c1358d7ea0 |
31-Mar-2005 |
Andrew Lenharth <andrewl@lenharth.org> |
PCMarker support for DAG and Alpha
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@20965 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
electionDAG.cpp
electionDAGISel.cpp
|
| a33ef4816d2c192e36e7c025d18c66e89ef9d311 |
30-Mar-2005 |
Chris Lattner <sabre@nondot.org> |
Instead of setting up the CFG edges at selectiondag construction time, set
them up after the code has been emitted. This allows targets to select one
mbb as multiple mbb's as needed.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@20937 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| f51d3bd6769d46e7cf7beaa283d1ca449629bd32 |
29-Mar-2005 |
Chris Lattner <sabre@nondot.org> |
Fix a bug that andrew noticed where we do not correctly sign/zero extend
returned integer values all of the way to 64-bits (we only did it to 32-bits
leaving the top bits undefined). This causes problems for targets like alpha
whose ABI's define the top bits too.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@20926 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| d4e50bb2e23b8f9ddde629a28dab3bcdaf0633e4 |
29-Mar-2005 |
Chris Lattner <sabre@nondot.org> |
implement legalization of build_pair for nate
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@20901 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 8e21e71b248365c69c0f666518c378b5819ce6fb |
26-Mar-2005 |
Nate Begeman <natebegeman@mac.com> |
Change interface to LowerCallTo to take a boolean isVarArg argument.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@20842 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
electionDAGISel.cpp
|
| e4d5c441e04bdc00ccf1804744af670655123b07 |
15-Mar-2005 |
Chris Lattner <sabre@nondot.org> |
This mega patch converts us from using Function::a{iterator|begin|end} to
using Function::arg_{iterator|begin|end}. Likewise Module::g* -> Module::global_*.
This patch is contributed by Gabor Greif, thanks!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@20597 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| ee639f1760ea3d22c46b141393eab611a4de2200 |
10-Mar-2005 |
Chris Lattner <sabre@nondot.org> |
Fix a bug where we would incorrectly do a sign ext instead of a zero ext
because we were checking the wrong thing. Thanks to andrew for pointing
this out!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@20554 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 14723c264d26c9387e27b0e7d5deaf225effe484 |
09-Mar-2005 |
Chris Lattner <sabre@nondot.org> |
constant fold FP_ROUND_INREG, ZERO_EXTEND_INREG, and SIGN_EXTEND_INREG
This allows the alpha backend to compile:
bool %test(uint %P) {
%c = seteq uint %P, 0
ret bool %c
}
into:
test:
ldgp $29, 0($27)
ZAP $16,240,$0
CMPEQ $0,0,$0
AND $0,1,$0
ret $31,($26),1
instead of:
test:
ldgp $29, 0($27)
ZAP $16,240,$0
ldiq $1,0
ZAP $1,240,$1
CMPEQ $0,$1,$0
AND $0,1,$0
ret $31,($26),1
... and fixes PR534.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@20534 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 84734ce8ef1a21eb347d4deca0bf32d59001f751 |
22-Feb-2005 |
Chris Lattner <sabre@nondot.org> |
Fix a bug in the 'store fpimm, ptr' -> 'store intimm, ptr' handling code.
Changing 'op' here caused us to not enter the store into a map, causing
reemission of the code!! In practice, a simple loop like this:
no_exit: ; preds = %no_exit, %entry
%indvar = phi uint [ %indvar.next, %no_exit ], [ 0, %entry ] ; <uint> [#uses=3]
%tmp.4 = getelementptr "complex long double"* %P, uint %indvar, uint 0 ; <double*> [#uses=1]
store double 0.000000e+00, double* %tmp.4
%indvar.next = add uint %indvar, 1 ; <uint> [#uses=2]
%exitcond = seteq uint %indvar.next, %N ; <bool> [#uses=1]
br bool %exitcond, label %return, label %no_exit
was being code gen'd to:
.LBBtest_1: # no_exit
movl %edx, %esi
shll $4, %esi
movl $0, 4(%eax,%esi)
movl $0, (%eax,%esi)
incl %edx
movl $0, (%eax,%esi)
movl $0, 4(%eax,%esi)
cmpl %ecx, %edx
jne .LBBtest_1 # no_exit
Note that we are doing 4 32-bit stores instead of 2. Now we generate:
.LBBtest_1: # no_exit
movl %edx, %esi
incl %esi
shll $4, %edx
movl $0, (%eax,%edx)
movl $0, 4(%eax,%edx)
cmpl %ecx, %esi
movl %esi, %edx
jne .LBBtest_1 # no_exit
This is much happier, though it would be even better if the increment of ESI
was scheduled after the compare :-/
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@20265 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| d3f03e4b50feb6abfa9fec8b0aa705d45134c59e |
17-Feb-2005 |
Misha Brukman <brukman+llvm@gmail.com> |
Fix compilation errors with VS 2005, patch by Aaron Gray.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@20231 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| d8658616cf8b6ad984974bb764dc9ee4b77499aa |
17-Feb-2005 |
Chris Lattner <sabre@nondot.org> |
Don't rely on doubles comparing identical to each other, which doesn't work
for 0.0 and -0.0.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@20230 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| aa781b34040f07db00fb4b59cb567e6ad9ef5861 |
17-Feb-2005 |
Chris Lattner <sabre@nondot.org> |
Don't sink argument loads into loops or other bad places. This disables folding of argument loads with instructions that are not in the entry block.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@20228 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 595dc5408ad809b9a9a417db275c43242e54b8dc |
04-Feb-2005 |
Chris Lattner <sabre@nondot.org> |
Fix a case where were incorrectly compiled cast from short to int on 64-bit
targets.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@20030 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 272455b404eabe70ce9e033ba19ec1b6cfe603a5 |
02-Feb-2005 |
Chris Lattner <sabre@nondot.org> |
Fix yet another memset issue.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19986 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| deb692e756cd3826e4ecc6eaec3397177c8b89ce |
01-Feb-2005 |
Chris Lattner <sabre@nondot.org> |
Fix some bugs andrew noticed legalizing memset for alpha
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19969 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 99939d39c9555ebecbcd24c1b607eae52804ea37 |
28-Jan-2005 |
Chris Lattner <sabre@nondot.org> |
Alpha doesn't have a native f32 extload instruction.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19880 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| e76ad6de40b5e4c0399257b0438914c8c85ceaa1 |
28-Jan-2005 |
Chris Lattner <sabre@nondot.org> |
implement legalization of truncates whose results and sources need to be
truncated, e.g. (truncate:i8 something:i16) on a 32 or 64-bit RISC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19879 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| e560521f1af300a10717ca5c73d42df9ffb1b121 |
28-Jan-2005 |
Chris Lattner <sabre@nondot.org> |
Get alpha working with memset/memcpy/memmove
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19878 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 13c184de29c09294ed63b01ac43e1b46c049278e |
28-Jan-2005 |
Chris Lattner <sabre@nondot.org> |
CopyFromReg produces two values. Make sure that we remember that both are
legalized, and actually return the correct result when we legalize the chain first.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19866 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| fed5577066aa13948745415316ebad1c2e72507e |
24-Jan-2005 |
Chris Lattner <sabre@nondot.org> |
Silence optimized warnings.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19797 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 9c32d3b798dc6caeebe6cea2effe80ca5e84e66e |
23-Jan-2005 |
Chris Lattner <sabre@nondot.org> |
Adjust to changes in SelectionDAG interfaces
The first half of correct chain insertion for libcalls. This is not enough
to fix Fhourstones yet though.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19781 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| b48da3953642d3d006edebd7fc6c1ca5bcfdb5cd |
23-Jan-2005 |
Chris Lattner <sabre@nondot.org> |
Remove the 3 HACK HACK HACKs I put in before, fixing them properly with
the new TLI that is available.
Implement support for handling out of range shifts. This allows us to
compile this code (a 64-bit rotate):
unsigned long long f3(unsigned long long x) {
return (x << 32) | (x >> (64-32));
}
into this:
f3:
mov %EDX, DWORD PTR [%ESP + 4]
mov %EAX, DWORD PTR [%ESP + 8]
ret
GCC produces this:
$ gcc t.c -masm=intel -O3 -S -o - -fomit-frame-pointer
..
f3:
push %ebx
mov %ebx, DWORD PTR [%esp+12]
mov %ecx, DWORD PTR [%esp+8]
mov %eax, %ebx
mov %edx, %ecx
pop %ebx
ret
The Simple ISEL produces (eww gross):
f3:
sub %ESP, 4
mov DWORD PTR [%ESP], %ESI
mov %EDX, DWORD PTR [%ESP + 8]
mov %ECX, DWORD PTR [%ESP + 12]
mov %EAX, 0
mov %ESI, 0
or %EAX, %ECX
or %EDX, %ESI
mov %ESI, DWORD PTR [%ESP]
add %ESP, 4
ret
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19780 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| ac9dc08c7f0ae60c125624d72c3022025d79ee9e |
23-Jan-2005 |
Chris Lattner <sabre@nondot.org> |
Adjust to changes in SelectionDAG interface.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19779 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 68cd65ea689907fb8a4aa80d72d182921e94607f |
23-Jan-2005 |
Chris Lattner <sabre@nondot.org> |
Get this to work for 64-bit systems.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19763 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 7cd50cf286c5f16ca633080b3d78ee4dd2094a9f |
22-Jan-2005 |
Chris Lattner <sabre@nondot.org> |
More bugfixes for IA64 shifts.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19739 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 27ff112948d059524e5f4ebe249a1da0b7c710e8 |
22-Jan-2005 |
Chris Lattner <sabre@nondot.org> |
Fix problems with non-x86 targets.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19738 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| a7306db5f7cb7376da77237ada0bd624f99fec6c |
22-Jan-2005 |
Chris Lattner <sabre@nondot.org> |
Add a nasty hack to fix Alpha/IA64 multiplies by a power of two.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19737 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 9bb86f46e134bf75d1dd76d9865156fb67eb24eb |
22-Jan-2005 |
Chris Lattner <sabre@nondot.org> |
Remove unneeded line.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19736 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 1e7ceaf0a0ff966725957f123bd6958f6884d674 |
22-Jan-2005 |
Chris Lattner <sabre@nondot.org> |
test commit
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19735 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| a93ec3ebfb2b6382c79e577cff4c05c204ed4544 |
21-Jan-2005 |
Chris Lattner <sabre@nondot.org> |
Unary token factor nodes are unneeded.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19727 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 77e77a6aa0ab25a812947aed477220dd11220a18 |
21-Jan-2005 |
Chris Lattner <sabre@nondot.org> |
Refactor libcall code a bit. Initial implementation of expanding int -> FP
operations for 64-bit integers.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19724 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| e5544f851a2a3f7b06339b132e60ad2f2d53e7b8 |
20-Jan-2005 |
Chris Lattner <sabre@nondot.org> |
Simplify the shift-expansion code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19721 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 84f6788044f9b1b47945e98ce23a6cf4d7d32579 |
20-Jan-2005 |
Chris Lattner <sabre@nondot.org> |
Expand add/sub into ADD_PARTS/SUB_PARTS instead of a non-existant libcall.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19715 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 17eee18f40c79cd6ed00985201d395f8da50c417 |
20-Jan-2005 |
Chris Lattner <sabre@nondot.org> |
implement add_parts/sub_parts.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19714 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 2c49f2795514a7c56b680ba0310d7eb0a8a43289 |
19-Jan-2005 |
Chris Lattner <sabre@nondot.org> |
Support targets that do not use i8 shift amounts.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19707 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 3d9dffc5863d0319aa9c5cb156045ae6778cba01 |
19-Jan-2005 |
Chris Lattner <sabre@nondot.org> |
Add support for targets that pass args in registers to calls.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19703 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 1e81b9e5112c40c23ecca9a64b6ab2ce97c8c6d4 |
19-Jan-2005 |
Chris Lattner <sabre@nondot.org> |
Fold single use token factor nodes into other token factor nodes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19701 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| ec39a45bdb1eca0cfe77be6a05cc43e16f2338eb |
19-Jan-2005 |
Chris Lattner <sabre@nondot.org> |
Realize the individual pieces of an expanded copytoreg/store/load are
independent of each other.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19700 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 39908e0ce0d8bd9de3c53271f0d27ab9d75816ad |
19-Jan-2005 |
Chris Lattner <sabre@nondot.org> |
Know some identities about tokenfactor nodes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19699 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 88218ef706ba6fffc3b3f3c894910eea0f59abb1 |
19-Jan-2005 |
Chris Lattner <sabre@nondot.org> |
Know some simple identities. This improves codegen for (1LL << N).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19698 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| e34b396ab7d28469bf3d9679a748b643d8e30458 |
19-Jan-2005 |
Chris Lattner <sabre@nondot.org> |
Implement a way of expanding shifts. This applies to targets that offer
select operations or to shifts that are by a constant. This automatically
implements (with no special code) all of the special cases for shift by 32,
shift by < 32 and shift by > 32.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19679 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| d6e496732b9cc2c4b4986d015c7dba9032aaa14c |
19-Jan-2005 |
Chris Lattner <sabre@nondot.org> |
Add a hook to find out how the target handles shift amounts that are out of
range. Either they are undefined (the default), they mask the shift amount
to the size of the register (X86, Alpha, etc), or they extend the shift (PPC).
This defaults to undefined, which is conservatively correct.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19677 91177308-0d34-0410-b5e6-96231b3b80d8
argetLowering.cpp
|
| d5d56825123665b60d4eada0a4ad7d0adc5cf3a3 |
18-Jan-2005 |
Chris Lattner <sabre@nondot.org> |
Zero is cheaper than sign extend.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19675 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 47e9223e06390897c3834f8c527001df392570ff |
18-Jan-2005 |
Chris Lattner <sabre@nondot.org> |
Fix some fixmes (promoting bools for select and brcond), fix promotion
of zero and sign extends.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19671 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 4a9b4f1943c6c56c749c8709ed28680408afc577 |
18-Jan-2005 |
Chris Lattner <sabre@nondot.org> |
Keep track of the retval type as well.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19670 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| ef5cd1d3cf7d0b20987a545fcd2d0af2bfe6c422 |
18-Jan-2005 |
Chris Lattner <sabre@nondot.org> |
Teach legalize to promote copy(from|to)reg, instead of making the isel pass
do it. This results in better code on X86 for floats (because if strict
precision is not required, we can elide some more expensive double -> float
conversions like the old isel did), and allows other targets to emit
CopyFromRegs that are not legal for arguments.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19668 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
electionDAGISel.cpp
|
| 82fbfb6984c1feb7d44a077ac2dc031f4a950005 |
18-Jan-2005 |
Chris Lattner <sabre@nondot.org> |
Teach legalize to promote SetCC results.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19657 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| f30b73b1c6b6ca8453dc61eb3777b4e4414d3839 |
18-Jan-2005 |
Chris Lattner <sabre@nondot.org> |
Allow setcc operations to have nonbool types.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19656 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
electionDAG.cpp
electionDAGISel.cpp
|
| 6e4e7652d8c671d83b6332d0189e93f2920c04ff |
18-Jan-2005 |
Chris Lattner <sabre@nondot.org> |
Fix the completely broken FP constant folds for setcc's.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19651 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| d3948116b81b11e82246c11389a9b4ce7e619fbb |
17-Jan-2005 |
Chris Lattner <sabre@nondot.org> |
Non-volatile loads can be freely reordered against each other. This fixes
X86/reg-pressure.ll again, and allows us to do nice things in other cases.
For example, we now codegen this sort of thing:
int %loadload(int *%X, int* %Y) {
%Z = load int* %Y
%Y = load int* %X ;; load between %Z and store
%Q = add int %Z, 1
store int %Q, int* %Y
ret int %Y
}
Into this:
loadload:
mov %EAX, DWORD PTR [%ESP + 4]
mov %EAX, DWORD PTR [%EAX]
mov %ECX, DWORD PTR [%ESP + 8]
inc DWORD PTR [%ECX]
ret
where we weren't able to form the 'inc [mem]' before. This also lets the
instruction selector emit loads in any order it wants to, which can be good
for register pressure as well.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19644 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| a651cf67b77cd477dd7da4baa8688af2ccd4f7f6 |
17-Jan-2005 |
Chris Lattner <sabre@nondot.org> |
Don't call SelectionDAG.getRoot() directly, go through a forwarding method.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19642 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 0afa8e348eab21d3e09ae3240544886d61879266 |
17-Jan-2005 |
Chris Lattner <sabre@nondot.org> |
Implement a target independent optimization to codegen arguments only into
the basic block that uses them if possible. This is a big win on X86, as it
lets us fold the argument loads into instructions and reduce register pressure
(by not loading all of the arguments in the entry block).
For this (contrived to show the optimization) testcase:
int %argtest(int %A, int %B) {
%X = sub int 12345, %A
br label %L
L:
%Y = add int %X, %B
ret int %Y
}
we used to produce:
argtest:
mov %ECX, DWORD PTR [%ESP + 4]
mov %EAX, 12345
sub %EAX, %ECX
mov %EDX, DWORD PTR [%ESP + 8]
.LBBargtest_1: # L
add %EAX, %EDX
ret
now we produce:
argtest:
mov %EAX, 12345
sub %EAX, DWORD PTR [%ESP + 4]
.LBBargtest_1: # L
add %EAX, DWORD PTR [%ESP + 8]
ret
This also fixes the FIXME in the code.
BTW, this occurs in real code. 164.gzip shrinks from 8623 to 8608 lines of
.s file. The stack frame in huft_build shrinks from 1644->1628 bytes,
inflate_codes shrinks from 116->108 bytes, and inflate_block from 2620->2612,
due to fewer spills.
Take that alkis. :-)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19639 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 068a81e9fca511b9a3b3a0f28a8988a57f994652 |
17-Jan-2005 |
Chris Lattner <sabre@nondot.org> |
Refactor code into a new method.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19635 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
electionDAGISel.cpp
|
| 714b69d0479e0fab36195e36da4578742ed4b63d |
17-Jan-2005 |
Chris Lattner <sabre@nondot.org> |
Shift and setcc types default to the pointer type.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19619 91177308-0d34-0410-b5e6-96231b3b80d8
argetLowering.cpp
|
| 8ac532c55eb7f8698466f25d1a8a01240c44ec7d |
16-Jan-2005 |
Chris Lattner <sabre@nondot.org> |
Implement legalize of call nodes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19617 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 55ba8fba750ee0a51a9d74fa33b7242d24a4ff35 |
16-Jan-2005 |
Chris Lattner <sabre@nondot.org> |
Revamp supported ops. Instead of just being supported or not, we now keep
track of how to deal with it, and provide the target with a hook that they
can use to legalize arbitrary operations in arbitrary ways.
Implement custom lowering for a couple of ops, implement promotion for select
operations (which x86 needs).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19613 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 171453a284b097f1ee89fb87ff495c3a6c7b6297 |
16-Jan-2005 |
Chris Lattner <sabre@nondot.org> |
add method stub
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19612 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 4b7899343eb492b70868fc73450b708834a3cf99 |
16-Jan-2005 |
Chris Lattner <sabre@nondot.org> |
Don't mash stuff together.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19611 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGPrinter.cpp
|
| cba82f9339566cef76ecb062980e40913e6ccc23 |
16-Jan-2005 |
Chris Lattner <sabre@nondot.org> |
Use enums, move virtual dtor out of line.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19610 91177308-0d34-0410-b5e6-96231b3b80d8
argetLowering.cpp
|
| f8161d83f0201a32a33a0c875eb43df81d8586ab |
16-Jan-2005 |
Chris Lattner <sabre@nondot.org> |
Implement some more missing promotions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19606 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 9467497ae2aef3534623ca20d01f49f3441ea154 |
16-Jan-2005 |
Chris Lattner <sabre@nondot.org> |
Clarify assertion.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19597 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 7636512f59e61429eae8839aa5c472c5e2f24b85 |
16-Jan-2005 |
Chris Lattner <sabre@nondot.org> |
Add assertions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19596 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| c8ea3c47103656a0924909f41651bf5d396c26cd |
16-Jan-2005 |
Chris Lattner <sabre@nondot.org> |
Add support for promoted registers being live across blocks.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19595 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| cfdfe4ce4afba6e6d2ef22bf07068ca6bf5bd75a |
16-Jan-2005 |
Chris Lattner <sabre@nondot.org> |
Set up identity transforms.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19584 91177308-0d34-0410-b5e6-96231b3b80d8
argetLowering.cpp
|
| 71c42a0190300a8903aaea80467b88f15f327ea9 |
16-Jan-2005 |
Chris Lattner <sabre@nondot.org> |
Move some information into the TargetLowering object.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19583 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 98e5c0e5e4c5be1b531d287d0a1373a62fe562e2 |
16-Jan-2005 |
Chris Lattner <sabre@nondot.org> |
Use the new TLI method to get this.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19582 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| bb97d81cc873e2c0914f2ece43832723cc936d24 |
16-Jan-2005 |
Chris Lattner <sabre@nondot.org> |
Move some information out of LegalizeDAG into the generic Target interface.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19581 91177308-0d34-0410-b5e6-96231b3b80d8
argetLowering.cpp
|
| 1713e73b8ac53f045150cb2a7d7ba9781dc35ef8 |
16-Jan-2005 |
Chris Lattner <sabre@nondot.org> |
legalize a bunch of operations that I missed.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19580 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| fb849800ea2040c188365c265421ad54fbdcf219 |
16-Jan-2005 |
Chris Lattner <sabre@nondot.org> |
Add support for targets that require promotions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19579 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| ff3e50cc39db6939b637165997283f59412387bb |
16-Jan-2005 |
Chris Lattner <sabre@nondot.org> |
Fix some serious bugs in promotion.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19578 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 950aa3ca2c60863510bee45ec1b9180f975b8e79 |
16-Jan-2005 |
Chris Lattner <sabre@nondot.org> |
Eliminate unneeded extensions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19577 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 8b6fa22e722e1de7522aae51d6cdd0f552d489da |
15-Jan-2005 |
Chris Lattner <sabre@nondot.org> |
Implement promotion of a whole bunch more operators. I think that this is
basically everything.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19576 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 8a389bb37603fa99a980475a4f5cdc27fa4014f1 |
15-Jan-2005 |
Chris Lattner <sabre@nondot.org> |
Print extra type for nodes with extra type info.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19575 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
electionDAGPrinter.cpp
|
| 45b8caf1c5a1fd8337038d64c6da8fba2d299fdf |
15-Jan-2005 |
Chris Lattner <sabre@nondot.org> |
Add support for legalizing FP_ROUND_INREG, SIGN_EXTEND_INREG, and
ZERO_EXTEND_INREG for targets that don't support them.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19573 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 4ea6924444d73a0b5f6207e05b4229b49a284f06 |
15-Jan-2005 |
Chris Lattner <sabre@nondot.org> |
Common code factored out.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19572 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 0f69b2910810b7c0971a739f18b37fae2a20eca5 |
15-Jan-2005 |
Chris Lattner <sabre@nondot.org> |
Add support for promoting ADD/MUL.
Add support for new SIGN_EXTEND_INREG, ZERO_EXTEND_INREG, and FP_ROUND_INREG operators.
Realize that if we do any promotions, we need to iterate SelectionDAG
construction.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19569 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 859157daee6a4b49e99921832e1dde065167b317 |
15-Jan-2005 |
Chris Lattner <sabre@nondot.org> |
Add new SIGN_EXTEND_INREG, ZERO_EXTEND_INREG, and FP_ROUND_INREG operators.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19568 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
electionDAGISel.cpp
|
| 03c8546ec57523970874917854a2fb77b1ff598e |
15-Jan-2005 |
Chris Lattner <sabre@nondot.org> |
Add intitial support for promoting some operators.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19565 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 69a52155d2eff066b49dbac385113002fd9dba14 |
14-Jan-2005 |
Chris Lattner <sabre@nondot.org> |
Adjust to CopyFromReg changes, implement deletion of truncating/extending
stores/loads.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19562 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
electionDAG.cpp
electionDAGISel.cpp
|
| 2ee743ff9be43c350075a2fa15d11a79bff36775 |
14-Jan-2005 |
Chris Lattner <sabre@nondot.org> |
Start implementing truncating stores and extending loads.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19559 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
electionDAG.cpp
|
| 18c2f13e0f9d0e5d6227cf6d1881e9ee3d1b6109 |
13-Jan-2005 |
Chris Lattner <sabre@nondot.org> |
Add new ImplicitDef node, rename CopyRegSDNode class to RegSDNode.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19535 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
electionDAG.cpp
electionDAGISel.cpp
electionDAGPrinter.cpp
|
| 5a6c6d98d561df671350a56c8031a3611f1c46fa |
13-Jan-2005 |
Chris Lattner <sabre@nondot.org> |
Don't forget the existing root.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19531 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| ddb870b065984007a0df645ad97c6ad6a6f12de0 |
13-Jan-2005 |
Chris Lattner <sabre@nondot.org> |
Codegen independent ops as being independent.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19528 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| a385e9b20fa7d37d3842ce15afd412f617d83a27 |
13-Jan-2005 |
Chris Lattner <sabre@nondot.org> |
Legalize new node, add assertion.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19527 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 282c5cae89986a5722ef59f6787108bdd668289d |
13-Jan-2005 |
Chris Lattner <sabre@nondot.org> |
Print new node.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19526 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 2f0ca79a7504a91b16156b199b6f07857f3782c6 |
12-Jan-2005 |
Chris Lattner <sabre@nondot.org> |
Do not fold (zero_ext (sign_ext V)) -> (sign_ext V), they are not the same.
This fixes llvm-test/SingleSource/Regression/C/casts.c
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19519 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 5c884562279927757cbe0ae718ab18af730ddb35 |
12-Jan-2005 |
Chris Lattner <sabre@nondot.org> |
New method
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19517 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 2dad454af674cb41a14a85ad6ce5c85c43959acd |
12-Jan-2005 |
Chris Lattner <sabre@nondot.org> |
Fix sign extend to long. When coming from sbyte, we used to generate:
movsbl 4(%esp), %eax
movl %eax, %edx
sarl $7, %edx
Now we generate:
movsbl 4(%esp), %eax
movl %eax, %edx
sarl $31, %edx
Which is right.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19515 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 3bfbf4ea990930d153e58e153f319408341a94fe |
12-Jan-2005 |
Reid Spencer <rspencer@reidspencer.com> |
Shut up warnings with GCC 3.4.3 about uninitialized variables.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19512 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 7944d9d9957db1efe085d9df3ea89826f50029b7 |
12-Jan-2005 |
Chris Lattner <sabre@nondot.org> |
Add an option to view the selection dags as they are generated.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19498 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| c871e1d56fa9e4c73f01419d4f1fef6d47f24d29 |
11-Jan-2005 |
Chris Lattner <sabre@nondot.org> |
Print the value types in the nodes of the graph
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19485 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGPrinter.cpp
|
| f1fdacae8c1bd9e5ff4619546b3a28e93fb75ab5 |
11-Jan-2005 |
Chris Lattner <sabre@nondot.org> |
add an assertion, avoid creating copyfromreg/copytoreg pairs that are the
same for PHI nodes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19484 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 7abf8201827be0c65272ca76d8afca0e46062be1 |
11-Jan-2005 |
Chris Lattner <sabre@nondot.org> |
Clear the whole array, always.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19482 91177308-0d34-0410-b5e6-96231b3b80d8
argetLowering.cpp
|
| 64da653ba916509757daa47424d2a8217d82ba76 |
11-Jan-2005 |
Chris Lattner <sabre@nondot.org> |
Squelch optimized warning.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19475 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| e1bd822ddb0099406d9f280535461033dfeeb190 |
11-Jan-2005 |
Chris Lattner <sabre@nondot.org> |
Teach legalize to lower MEMSET/MEMCPY/MEMMOVE operations if the target
does not support them.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19465 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 4c633e82f6041f452e451904ec0de670e7f143e4 |
11-Jan-2005 |
Chris Lattner <sabre@nondot.org> |
Print new operations.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19464 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 7041ee35adecb864e3e8df490aa73b0605fbfb5a |
11-Jan-2005 |
Chris Lattner <sabre@nondot.org> |
Turn memset/memcpy/memmove into the corresponding operations.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19463 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| a8d9cc870593d3e915ac9184dc0daf1783d4f8a4 |
11-Jan-2005 |
Chris Lattner <sabre@nondot.org> |
shift X, 0 -> X
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19453 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| e9c44cdf18b1235841a5d8bfeb07bee9f5699b9a |
11-Jan-2005 |
Chris Lattner <sabre@nondot.org> |
Print SelectionDAGs bottom up, include extra info in the node labels
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19447 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGPrinter.cpp
|
| fc08d9c789b6698fe5f5904d573bb03fcc52a32d |
11-Jan-2005 |
Chris Lattner <sabre@nondot.org> |
Add a marker for the graph root.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19445 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGPrinter.cpp
|
| e0646b86e3cdc35c5dd0e1c10b7ac564066e3bd6 |
11-Jan-2005 |
Chris Lattner <sabre@nondot.org> |
Put the operation name in each node, put the function name on the graph.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19444 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGPrinter.cpp
|
| d75f19fa42e6f6ee8f159aa8964baf8b0bbd2dee |
11-Jan-2005 |
Chris Lattner <sabre@nondot.org> |
Split out SDNode::getOperationName into its own method.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19443 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 66328480bb3eb6aa52e2c155657f3d19d4efea7a |
11-Jan-2005 |
Chris Lattner <sabre@nondot.org> |
Implement initial selectiondag printing support. This gets us a nice
graph with no labels! :)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19441 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGPrinter.cpp
|
| 6b7598b9955520af8942740acda96a99b005c839 |
10-Jan-2005 |
Chris Lattner <sabre@nondot.org> |
Lower to the correct functions. This fixes FreeBench/fourinarow
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19436 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 68dc3109420f38d639fb2e9fed6f1a29df60795b |
10-Jan-2005 |
Chris Lattner <sabre@nondot.org> |
Implement a couple of more simplifications. This lets us codegen:
int test2(int * P, int* Q, int A, int B) {
return P+A == P;
}
into:
test2:
movl 4(%esp), %eax
movl 12(%esp), %eax
shll $2, %eax
cmpl $0, %eax
sete %al
movzbl %al, %eax
ret
instead of:
test2:
movl 4(%esp), %eax
movl 12(%esp), %ecx
leal (%eax,%ecx,4), %ecx
cmpl %eax, %ecx
sete %al
movzbl %al, %eax
ret
ICC is producing worse code:
test2:
movl 4(%esp), %eax #8.5
movl 12(%esp), %edx #8.5
lea (%edx,%edx), %ecx #9.9
addl %ecx, %ecx #9.9
addl %eax, %ecx #9.9
cmpl %eax, %ecx #9.16
movl $0, %eax #9.16
sete %al #9.16
ret #9.16
as is GCC (looks like our old code):
test2:
movl 4(%esp), %edx
movl 12(%esp), %eax
leal (%edx,%eax,4), %ecx
cmpl %edx, %ecx
sete %al
movzbl %al, %eax
ret
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19430 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 87ae6ae41cde4548b55bcc19da36dc0ad7e021df |
10-Jan-2005 |
Chris Lattner <sabre@nondot.org> |
Fix incorrect constant folds, fixing Stepanov after the SHR patch.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19429 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 8136d1f8cb8c6d89460ab9750b6d91a157659831 |
10-Jan-2005 |
Chris Lattner <sabre@nondot.org> |
Constant fold shifts, turning this loop:
.LBB_Z5test0PdS__3: # no_exit.1
fldl data(,%eax,8)
fldl 24(%esp)
faddp %st(1)
fstl 24(%esp)
incl %eax
movl $16000, %ecx
sarl $3, %ecx
cmpl %eax, %ecx
fstpl 16(%esp)
#FP_REG_KILL
jg .LBB_Z5test0PdS__3 # no_exit.1
into:
.LBB_Z5test0PdS__3: # no_exit.1
fldl data(,%eax,8)
fldl 24(%esp)
faddp %st(1)
fstl 24(%esp)
incl %eax
cmpl $2000, %eax
fstpl 16(%esp)
#FP_REG_KILL
jl .LBB_Z5test0PdS__3 # no_exit.1
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19427 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 5cdcc58d51c792d329202bab97c34aefbc043b15 |
09-Jan-2005 |
Chris Lattner <sabre@nondot.org> |
Add some folds for == and != comparisons. This allows us to
codegen this loop in stepanov:
no_exit.i: ; preds = %entry, %no_exit.i, %then.i, %_Z5checkd.exit
%i.0.0 = phi int [ 0, %entry ], [ %i.0.0, %no_exit.i ], [ %inc.0, %_Z5checkd.exit ], [ %inc.012, %then.i ] ; <int> [#uses=3]
%indvar = phi uint [ %indvar.next, %no_exit.i ], [ 0, %entry ], [ 0, %then.i ], [ 0, %_Z5checkd.exit ] ; <uint> [#uses=3]
%result_addr.i.0 = phi double [ %tmp.4.i.i, %no_exit.i ], [ 0.000000e+00, %entry ], [ 0.000000e+00, %then.i ], [ 0.000000e+00, %_Z5checkd.exit ] ; <double> [#uses=1]
%first_addr.0.i.2.rec = cast uint %indvar to int ; <int> [#uses=1]
%first_addr.0.i.2 = getelementptr [2000 x double]* %data, int 0, uint %indvar ; <double*> [#uses=1]
%inc.i.rec = add int %first_addr.0.i.2.rec, 1 ; <int> [#uses=1]
%inc.i = getelementptr [2000 x double]* %data, int 0, int %inc.i.rec ; <double*> [#uses=1]
%tmp.3.i.i = load double* %first_addr.0.i.2 ; <double> [#uses=1]
%tmp.4.i.i = add double %result_addr.i.0, %tmp.3.i.i ; <double> [#uses=2]
%tmp.2.i = seteq double* %inc.i, getelementptr ([2000 x double]* %data, int 0, int 2000) ; <bool> [#uses=1]
%indvar.next = add uint %indvar, 1 ; <uint> [#uses=1]
br bool %tmp.2.i, label %_Z10accumulateIPddET0_T_S2_S1_.exit, label %no_exit.i
To this:
.LBB_Z4testIPddEvT_S1_T0__1: # no_exit.i
fldl data(,%eax,8)
fldl 16(%esp)
faddp %st(1)
fstpl 16(%esp)
incl %eax
movl %eax, %ecx
shll $3, %ecx
cmpl $16000, %ecx
#FP_REG_KILL
jne .LBB_Z4testIPddEvT_S1_T0__1 # no_exit.i
instead of this:
.LBB_Z4testIPddEvT_S1_T0__1: # no_exit.i
fldl data(,%eax,8)
fldl 16(%esp)
faddp %st(1)
fstpl 16(%esp)
incl %eax
leal data(,%eax,8), %ecx
leal data+16000, %edx
cmpl %edx, %ecx
#FP_REG_KILL
jne .LBB_Z4testIPddEvT_S1_T0__1 # no_exit.i
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19425 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| fd161e964aa02636c00364ae4d46bf4e384df096 |
09-Jan-2005 |
Jeff Cohen <jeffc@jolt-lang.org> |
Fix VC++ compilation error
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19423 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| ea946cdb1b16827a5f19a2593d054953e51b9fb6 |
09-Jan-2005 |
Chris Lattner <sabre@nondot.org> |
Print the DAG out more like a DAG in nested format.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19422 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 49d24716a4398fc249d2b5ac993ff97a421f0635 |
09-Jan-2005 |
Chris Lattner <sabre@nondot.org> |
Print out nodes sorted by their address to make it easier to find them in a list.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19421 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| abd21828752667fdff5a0c20d591f66de102b3c3 |
09-Jan-2005 |
Chris Lattner <sabre@nondot.org> |
Add a simple transformation. This allows us to compile one of the inner
loops in stepanov to this:
.LBB_Z5test0PdS__2: # no_exit.1
fldl data(,%eax,8)
fldl 24(%esp)
faddp %st(1)
fstl 24(%esp)
incl %eax
cmpl $2000, %eax
fstpl 16(%esp)
#FP_REG_KILL
jl .LBB_Z5test0PdS__2
instead of this:
.LBB_Z5test0PdS__2: # no_exit.1
fldl data(,%eax,8)
fldl 24(%esp)
faddp %st(1)
fstl 24(%esp)
incl %eax
movl $data, %ecx
movl %ecx, %edx
addl $16000, %edx
subl %ecx, %edx
movl %edx, %ecx
sarl $2, %ecx
shrl $29, %ecx
addl %ecx, %edx
sarl $3, %edx
cmpl %edx, %eax
fstpl 16(%esp)
#FP_REG_KILL
jl .LBB_Z5test0PdS__2
The old instruction selector produced:
.LBB_Z5test0PdS__2: # no_exit.1
fldl 24(%esp)
faddl data(,%eax,8)
fstl 24(%esp)
movl %eax, %ecx
incl %ecx
incl %eax
leal data+16000, %edx
movl $data, %edi
subl %edi, %edx
movl %edx, %edi
sarl $2, %edi
shrl $29, %edi
addl %edi, %edx
sarl $3, %edx
cmpl %edx, %ecx
fstpl 16(%esp)
#FP_REG_KILL
jl .LBB_Z5test0PdS__2 # no_exit.1
Which is even worse!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19419 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 38d6be5d49e61e4be9bb12ee3cedf2a4fcddb8f3 |
09-Jan-2005 |
Chris Lattner <sabre@nondot.org> |
Fix a bug legalizing call instructions (make sure to remember all result
values), and eliminate some switch statements.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19417 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 513e52ec4e20048a8f491498d219a2669283f3bd |
09-Jan-2005 |
Chris Lattner <sabre@nondot.org> |
Fix a minor bug legalizing dynamic_stackalloc. This allows us to compile
std::__pad<wchar_t, std::char_traits<wchar_t> >::_S_pad(std::ios_base&, wchar_t, wchar_t*, wchar_t const*, int, int, bool)
from libstdc++
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19416 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| fa404e8a76abfdafefb8806b35f596d288609496 |
09-Jan-2005 |
Chris Lattner <sabre@nondot.org> |
Teach legalize to deal with DYNAMIC_STACKALLOC (aka a dynamic llvm alloca)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19415 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| ee749d7488bd42df0f67e2d80048c63415943785 |
09-Jan-2005 |
Chris Lattner <sabre@nondot.org> |
Handle static alloca arguments to PHI nodes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19409 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 39ae3622791986a0232f7e4797b633f8fa9e54d2 |
09-Jan-2005 |
Chris Lattner <sabre@nondot.org> |
Use new interfaces to correctly lower varargs and return/frame address intrinsics.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19407 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| 64e14b1679fa3649b286402ea254d663ac43ef91 |
08-Jan-2005 |
Chris Lattner <sabre@nondot.org> |
Add support for llvm.setjmp and longjmp. Only 3 SingleSource/UnitTests fail now.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19404 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| e3304a3d24afc952d3cb415d1b504d973573c5c5 |
08-Jan-2005 |
Chris Lattner <sabre@nondot.org> |
Tighten up assertions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19397 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| f26bc8ef4827cf0023a7052b62b920b41813d473 |
08-Jan-2005 |
Chris Lattner <sabre@nondot.org> |
Silence VS warnings.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19384 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
electionDAGISel.cpp
|
| 4e6c74689944be1de80c99dc0688ec0bcbd743aa |
08-Jan-2005 |
Chris Lattner <sabre@nondot.org> |
Implement handling of most long operators through libcalls.
Fix a bug legalizing "ret (Val,Val)"
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19375 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| cf5734dddd66af9388a171b44996505ede47feed |
08-Jan-2005 |
Chris Lattner <sabre@nondot.org> |
Adjust to changes in LowerCAllTo interfaces
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19374 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| ae0aacb8331e1227abea6601e531a10d0e65fdca |
08-Jan-2005 |
Chris Lattner <sabre@nondot.org> |
Add support for FP->INT conversions and back.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19369 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
electionDAG.cpp
electionDAGISel.cpp
|
| 5d2c6c784bdc3d572a553ed7aa48dcf27a45b1a3 |
08-Jan-2005 |
Chris Lattner <sabre@nondot.org> |
Implement the 'store FPIMM, Ptr' -> 'store INTIMM, Ptr' optimization for
all targets.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19366 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 623f70dd4c5525888aca400c27832282913b539e |
08-Jan-2005 |
Chris Lattner <sabre@nondot.org> |
1ULL << 64 is undefined, don't do it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19365 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 7c68ec6b70c765edec1e850331c30a7b65c6ebda |
08-Jan-2005 |
Chris Lattner <sabre@nondot.org> |
Fix a pointer invalidation problem. This fixes Generic/badarg6.ll
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19361 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 5351e9b172962a4f51e6d3b12018dd2de34b2f97 |
07-Jan-2005 |
Chris Lattner <sabre@nondot.org> |
Fold conditional branches on constants away.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19360 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 4287d5e355c7dafcb8d674a236eabcccb895c892 |
07-Jan-2005 |
Chris Lattner <sabre@nondot.org> |
Fix a thinko in the reassociation code, fixing Generic/badlive.ll
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19359 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| b00a6425de1ef8668b63f29927c38da8a19ce904 |
07-Jan-2005 |
Chris Lattner <sabre@nondot.org> |
Add support for truncating integer casts from long.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19358 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 8afc48e44ad8868c1d41511db645e2ba1a4b894e |
07-Jan-2005 |
Chris Lattner <sabre@nondot.org> |
Fix a bug in load expansion legalization and ret legalization. This fixes
CodeGen/Generic/select.ll:castconst.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19357 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| c7af17923e3bb6053f529679ef0be5399d3519ed |
07-Jan-2005 |
Chris Lattner <sabre@nondot.org> |
Legalize unconditional branches too
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19356 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 7cc4777a263f6a52877d29201311fde5f6edb632 |
07-Jan-2005 |
Chris Lattner <sabre@nondot.org> |
Implement support for long GEP indices on 32-bit archs and support for
int GEP indices on 64-bit archs.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19354 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
electionDAGISel.cpp
|
| fd8c39b77331fbb6f994665b45eba1b2cc6ced6d |
07-Jan-2005 |
Chris Lattner <sabre@nondot.org> |
Simplify: truncate ({zero|sign}_extend (X))
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19353 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 03c0cf822e9a57109d1b4e6a2705d68852c93e1d |
07-Jan-2005 |
Chris Lattner <sabre@nondot.org> |
implement legalization of a bunch more operators.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19352 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| fad71ebe1ebdc8d59c26e4e45a7c7579a2ca58b7 |
07-Jan-2005 |
Chris Lattner <sabre@nondot.org> |
Fix another bug legalizing calls!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19350 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| f44fd88e9cdd7b47acb71ac78e3dccb91319c72d |
07-Jan-2005 |
Chris Lattner <sabre@nondot.org> |
Fix handling of dead PHI nodes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19349 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| ebda942efcb86634a6581aae76a0d0c92c4a232e |
07-Jan-2005 |
Chris Lattner <sabre@nondot.org> |
Fix a bug legalizing calls
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19348 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 62fd269c146d9023efe32644e44cd97b88631d4f |
07-Jan-2005 |
Chris Lattner <sabre@nondot.org> |
After legalizing a DAG, delete dead nodes to save space.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19346 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 0e12e6e0418564d4b2e83138fe2044be29a6f6d5 |
07-Jan-2005 |
Chris Lattner <sabre@nondot.org> |
Implement RemoveDeadNodes
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19345 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| c18ae4cb6a263cf31283c0ef51ace24350f8d72b |
07-Jan-2005 |
Chris Lattner <sabre@nondot.org> |
Teach legalize how to handle condbranches
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19339 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| 1c08c714bb3d07c3b39f06bfcbb4559fefca73f9 |
07-Jan-2005 |
Chris Lattner <sabre@nondot.org> |
Initial implementation of the SelectionDAGISel class. This contains most
of the code for lowering from LLVM code to a SelectionDAG.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19331 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAGISel.cpp
|
| b75c12de6792ca269e8099f317332c7d3f1528c2 |
07-Jan-2005 |
Chris Lattner <sabre@nondot.org> |
This file is obsolete
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19330 91177308-0d34-0410-b5e6-96231b3b80d8
AGBuilder.cpp
|
| 3e928bbd6153eb08641cbd0ad7d8487378a8b12a |
07-Jan-2005 |
Chris Lattner <sabre@nondot.org> |
Initial implementation of the DAG legalization. This still has a long way
to go, but it does work for some non-trivial cases now.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19329 91177308-0d34-0410-b5e6-96231b3b80d8
egalizeDAG.cpp
|
| c3aae25116e66c177579b0b79182b09340b19753 |
07-Jan-2005 |
Chris Lattner <sabre@nondot.org> |
Complete rewrite of the SelectionDAG class.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19327 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| 310968cbbb564c4141d4bd418a746e8103560222 |
07-Jan-2005 |
Chris Lattner <sabre@nondot.org> |
First draft of new Target interface
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19324 91177308-0d34-0410-b5e6-96231b3b80d8
argetLowering.cpp
|
| 6cb21d443eff9369e4f9035af28efd627e8f3909 |
28-Oct-2004 |
Reid Spencer <rspencer@reidspencer.com> |
Change Library Names Not To Conflict With Others When Installed
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@17286 91177308-0d34-0410-b5e6-96231b3b80d8
akefile
|
| cac731ecbe6a80e0c607ece2833525a92601db99 |
22-Oct-2004 |
Reid Spencer <rspencer@reidspencer.com> |
We won't use automake
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@17155 91177308-0d34-0410-b5e6-96231b3b80d8
akefile.am
akefile.in
|
| 86d341b204171d53a470c361ee58811bfc22bf1a |
19-Oct-2004 |
Reid Spencer <rspencer@reidspencer.com> |
Initial automake generated Makefile template
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@17136 91177308-0d34-0410-b5e6-96231b3b80d8
akefile.in
|
| d96cb6eaa0a878467d9594a12dfe3a55466706f0 |
13-Oct-2004 |
Reid Spencer <rspencer@reidspencer.com> |
Update to reflect changes in Makefile rules.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16950 91177308-0d34-0410-b5e6-96231b3b80d8
akefile.am
|
| 9f41a5fe8534ab5a76d2925f31a20782c135b7d2 |
10-Oct-2004 |
Reid Spencer <rspencer@reidspencer.com> |
Initial version of automake Makefile.am file.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16885 91177308-0d34-0410-b5e6-96231b3b80d8
akefile.am
|
| 6a134dedf6d3ac71670ad35de2387a54e40198f3 |
08-Oct-2004 |
Misha Brukman <brukman+llvm@gmail.com> |
Hyphenate target-(in)dependent for more tasty grammar goodness (tm)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16854 91177308-0d34-0410-b5e6-96231b3b80d8
AGBuilder.cpp
|
| 954da37bb492b519f5c31dc360f2a142567e08b4 |
04-Jul-2004 |
Reid Spencer <rspencer@reidspencer.com> |
Add #include <iostream> since Value.h does not #include it any more.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@14622 91177308-0d34-0410-b5e6-96231b3b80d8
AGBuilder.cpp
electionDAG.cpp
|
| f70c22b019494723d0e706f93d6542dfaa6e73a5 |
17-Jun-2004 |
Chris Lattner <sabre@nondot.org> |
Rename Type::PrimitiveID to TypeId and ::getPrimitiveID() to ::getTypeID()
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@14201 91177308-0d34-0410-b5e6-96231b3b80d8
electionDAG.cpp
|
| e25738cab63977282f8ebc26012142debfbd1d20 |
02-Jun-2004 |
Chris Lattner <sabre@nondot.org> |
Finegrainify namespacification
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@13948 91177308-0d34-0410-b5e6-96231b3b80d8
AGBuilder.cpp
electionDAG.cpp
|
| fd0f7b113120a7eed61c721aa74222fa85fdd571 |
02-Jun-2004 |
Chris Lattner <sabre@nondot.org> |
Fix a trivial but blatant bug
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@13947 91177308-0d34-0410-b5e6-96231b3b80d8
AGBuilder.cpp
|
| d0fde30ce850b78371fd1386338350591f9ff494 |
11-Nov-2003 |
Brian Gaeke <gaeke@uiuc.edu> |
Put all LLVM code into the llvm namespace, as per bug 109.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@9903 91177308-0d34-0410-b5e6-96231b3b80d8
AGBuilder.cpp
electionDAG.cpp
|
| e488e9360b1a865ba604330965edcf139e590b65 |
21-Oct-2003 |
John Criswell <criswell@uiuc.edu> |
Added LLVM copyright notice to Makefiles.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@9312 91177308-0d34-0410-b5e6-96231b3b80d8
akefile
|
| b576c94c15af9a440f69d9d03c2afead7971118c |
20-Oct-2003 |
John Criswell <criswell@uiuc.edu> |
Added LLVM project notice to the top of every C++ source file.
Header files will be on the way.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@9298 91177308-0d34-0410-b5e6-96231b3b80d8
AGBuilder.cpp
electionDAG.cpp
|
| 79ba7c1aee433775f77fb5892b0aa764b39d8511 |
15-Aug-2003 |
Chris Lattner <sabre@nondot.org> |
rename selection directory and library to SelectionDAG
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@7877 91177308-0d34-0410-b5e6-96231b3b80d8
akefile
|
| 7dc97ff18023935880082d84a0004ac111859357 |
15-Aug-2003 |
Chris Lattner <sabre@nondot.org> |
Add a bunch of new node types, etc
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@7875 91177308-0d34-0410-b5e6-96231b3b80d8
AGBuilder.cpp
electionDAG.cpp
|
| 78ec311bd5fcdf44ed64841a0f5df1124b3a9b17 |
11-Aug-2003 |
Chris Lattner <sabre@nondot.org> |
Initial checkin of SelectionDAG implementation. This is still rough and
unfinished
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@7717 91177308-0d34-0410-b5e6-96231b3b80d8
AGBuilder.cpp
akefile
electionDAG.cpp
|