| cd81d94322a39503e4a3e87b6ee03d4fcb3465fb |
21-Jul-2014 |
Stephen Hines <srhines@google.com> |
Update LLVM for rebase to r212749.
Includes a cherry-pick of:
r212948 - fixes a small issue with atomic calls
Change-Id: Ib97bd980b59f18142a69506400911a6009d9df18
smParser/SparcAsmParser.cpp
nstPrinter/SparcInstPrinter.cpp
CTargetDesc/SparcAsmBackend.cpp
CTargetDesc/SparcMCCodeEmitter.cpp
CTargetDesc/SparcMCExpr.cpp
CTargetDesc/SparcMCExpr.h
parcFrameLowering.cpp
parcFrameLowering.h
parcISelLowering.cpp
parcJITInfo.cpp
parcSelectionDAGInfo.cpp
parcSelectionDAGInfo.h
parcSubtarget.cpp
parcSubtarget.h
parcTargetMachine.cpp
parcTargetMachine.h
|
| dce4a407a24b04eebc6a376f8e62b41aaa7b071f |
29-May-2014 |
Stephen Hines <srhines@google.com> |
Update LLVM for 3.5 rebase (r209712).
Change-Id: I149556c940fb7dc92d075273c87ff584f400941f
smParser/LLVMBuild.txt
smParser/SparcAsmParser.cpp
elaySlotFiller.cpp
isassembler/LLVMBuild.txt
isassembler/SparcDisassembler.cpp
nstPrinter/SparcInstPrinter.cpp
nstPrinter/SparcInstPrinter.h
CTargetDesc/SparcAsmBackend.cpp
CTargetDesc/SparcMCAsmInfo.cpp
CTargetDesc/SparcMCAsmInfo.h
CTargetDesc/SparcMCCodeEmitter.cpp
CTargetDesc/SparcMCExpr.cpp
CTargetDesc/SparcMCExpr.h
CTargetDesc/SparcMCTargetDesc.cpp
parcAsmPrinter.cpp
parcCodeEmitter.cpp
parcFrameLowering.cpp
parcFrameLowering.h
parcISelDAGToDAG.cpp
parcISelLowering.cpp
parcISelLowering.h
parcInstr64Bit.td
parcInstrAliases.td
parcInstrInfo.cpp
parcInstrInfo.h
parcJITInfo.cpp
parcJITInfo.h
parcMCInstLower.cpp
parcRegisterInfo.cpp
parcRegisterInfo.h
parcSelectionDAGInfo.cpp
parcSubtarget.cpp
parcTargetMachine.cpp
parcTargetMachine.h
parcTargetObjectFile.cpp
parcTargetStreamer.h
|
| 36b56886974eae4f9c5ebc96befd3e7bfe5de338 |
24-Apr-2014 |
Stephen Hines <srhines@google.com> |
Update to LLVM 3.5a.
Change-Id: Ifadecab779f128e62e430c2b4f6ddd84953ed617
smParser/CMakeLists.txt
smParser/LLVMBuild.txt
smParser/Makefile
smParser/SparcAsmParser.cpp
MakeLists.txt
elaySlotFiller.cpp
isassembler/CMakeLists.txt
isassembler/LLVMBuild.txt
isassembler/Makefile
isassembler/SparcDisassembler.cpp
nstPrinter/CMakeLists.txt
nstPrinter/LLVMBuild.txt
nstPrinter/Makefile
nstPrinter/SparcInstPrinter.cpp
nstPrinter/SparcInstPrinter.h
LVMBuild.txt
CTargetDesc/CMakeLists.txt
CTargetDesc/LLVMBuild.txt
CTargetDesc/SparcAsmBackend.cpp
CTargetDesc/SparcBaseInfo.h
CTargetDesc/SparcELFObjectWriter.cpp
CTargetDesc/SparcFixupKinds.h
CTargetDesc/SparcMCAsmInfo.cpp
CTargetDesc/SparcMCAsmInfo.h
CTargetDesc/SparcMCCodeEmitter.cpp
CTargetDesc/SparcMCExpr.cpp
CTargetDesc/SparcMCExpr.h
CTargetDesc/SparcMCTargetDesc.cpp
CTargetDesc/SparcMCTargetDesc.h
CTargetDesc/SparcTargetStreamer.cpp
akefile
parc.h
parc.td
parcAsmPrinter.cpp
parcCallingConv.td
parcCodeEmitter.cpp
parcFrameLowering.cpp
parcISelLowering.cpp
parcISelLowering.h
parcInstr64Bit.td
parcInstrAliases.td
parcInstrFormats.td
parcInstrInfo.cpp
parcInstrInfo.td
parcInstrVIS.td
parcJITInfo.cpp
parcMCInstLower.cpp
parcRegisterInfo.cpp
parcRegisterInfo.td
parcRelocations.h
parcSubtarget.cpp
parcSubtarget.h
parcTargetMachine.cpp
parcTargetObjectFile.cpp
parcTargetObjectFile.h
parcTargetStreamer.h
argetInfo/CMakeLists.txt
argetInfo/LLVMBuild.txt
|
| 7d9c02dc620ea5f5cdf2dc0bd0f03d9370f845d3 |
09-Dec-2013 |
Bill Wendling <isanbard@gmail.com> |
Merging r196751:
------------------------------------------------------------------------
r196751 | venkatra | 2013-12-08 20:02:15 -0800 (Sun, 08 Dec 2013) | 3 lines
[Sparc]: Implement getSetCCResultType() in SparcTargetLowering so that umulo/smulo can be lowered on sparcv9 without an assertion error.
------------------------------------------------------------------------
git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_34@196766 91177308-0d34-0410-b5e6-96231b3b80d8
parcISelLowering.cpp
parcISelLowering.h
|
| 571a02f291b051b22d804f90257e2623cbacd7ec |
09-Dec-2013 |
Bill Wendling <isanbard@gmail.com> |
Merging r196755:
------------------------------------------------------------------------
r196755 | venkatra | 2013-12-08 21:13:25 -0800 (Sun, 08 Dec 2013) | 2 lines
[SPARCV9]: Adjust the resultant pointer of DYNAMIC_STACKALLOC with the stack BIAS on sparcV9.
------------------------------------------------------------------------
git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_34@196764 91177308-0d34-0410-b5e6-96231b3b80d8
parcISelLowering.cpp
|
| f9a98aeb5b5129c9eeb95978c7cf925e4a88e224 |
09-Dec-2013 |
Bill Wendling <isanbard@gmail.com> |
Merging r196735:
------------------------------------------------------------------------
r196735 | venkatra | 2013-12-08 14:06:07 -0800 (Sun, 08 Dec 2013) | 3 lines
[SparcV9]: Expand MULHU/MULHS:i64 and UMUL_LOHI/SMUL_LOHI:i64 on sparcv9.
This fixes PR18150.
------------------------------------------------------------------------
git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_34@196744 91177308-0d34-0410-b5e6-96231b3b80d8
parcISelLowering.cpp
|
| f914aab181e9deb5852dcc5b99fd70e0f5d9db98 |
01-Dec-2013 |
Bill Wendling <isanbard@gmail.com> |
Merging r195590:
------------------------------------------------------------------------
r195590 | chapuni | 2013-11-24 16:52:46 -0800 (Sun, 24 Nov 2013) | 1 line
SparcFrameLowering.cpp: Prune 'DL' [-Wunused-variable]
------------------------------------------------------------------------
git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_34@196003 91177308-0d34-0410-b5e6-96231b3b80d8
parcFrameLowering.cpp
|
| 3a1e76d62706f2773c23a684446b4c549c151669 |
27-Nov-2013 |
Bill Wendling <isanbard@gmail.com> |
Merging r195576:
------------------------------------------------------------------------
r195576 | venkatra | 2013-11-24 12:23:25 -0800 (Sun, 24 Nov 2013) | 2 lines
[Sparc] Emit large negative adjustments to SP/FP with sethi+xor instead of sethi+or. This generates correct code for both sparc32 and sparc64.
------------------------------------------------------------------------
git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_34@195870 91177308-0d34-0410-b5e6-96231b3b80d8
parc.h
parcFrameLowering.cpp
parcFrameLowering.h
parcRegisterInfo.cpp
|
| 1cefde83ffcfe869e86ef1976667f47856087dd3 |
27-Nov-2013 |
Bill Wendling <isanbard@gmail.com> |
Merging r195575:
------------------------------------------------------------------------
r195575 | venkatra | 2013-11-24 12:07:35 -0800 (Sun, 24 Nov 2013) | 2 lines
[Sparc]: Implement LEA pattern for sparcv9.
------------------------------------------------------------------------
git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_34@195869 91177308-0d34-0410-b5e6-96231b3b80d8
parcInstr64Bit.td
parcInstrInfo.td
|
| 8bb91f77cb1488c19cb4bdb17b4af5f093d233fd |
27-Nov-2013 |
Bill Wendling <isanbard@gmail.com> |
Merging r195574:
------------------------------------------------------------------------
r195574 | venkatra | 2013-11-24 10:41:49 -0800 (Sun, 24 Nov 2013) | 2 lines
[SparcV9]: Do not emit .register directives for global registers that are clobbered by calls but not used in the function itself.
------------------------------------------------------------------------
git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_34@195868 91177308-0d34-0410-b5e6-96231b3b80d8
parcAsmPrinter.cpp
|
| f63e418d2c299a540ac27ddfed69b2c4698bb3c3 |
27-Nov-2013 |
Bill Wendling <isanbard@gmail.com> |
Merging r195573:
------------------------------------------------------------------------
r195573 | venkatra | 2013-11-24 09:41:41 -0800 (Sun, 24 Nov 2013) | 2 lines
[SparcV9] Enable custom lowering of DYNAMIC_STACKALLOC in sparc64.
------------------------------------------------------------------------
git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_34@195867 91177308-0d34-0410-b5e6-96231b3b80d8
parcISelLowering.cpp
|
| 354362524a72b3fa43a6c09380b7ae3b2380cbba |
19-Nov-2013 |
Juergen Ributzka <juergen@apple.com> |
[weak vtables] Remove a bunch of weak vtables
This patch removes most of the trivial cases of weak vtables by pinning them to
a single object file. The memory leaks in this version have been fixed. Thanks
Alexey for pointing them out.
Differential Revision: http://llvm-reviews.chandlerc.com/D2068
Reviewed by Andy
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@195064 91177308-0d34-0410-b5e6-96231b3b80d8
parcInstrInfo.cpp
parcInstrInfo.h
|
| b21ab43cfc3fa0dacf5c95f04e58b6d804b59a16 |
18-Nov-2013 |
Alexey Samsonov <samsonov@google.com> |
Revert r194865 and r194874.
This change is incorrect. If you delete virtual destructor of both a base class
and a subclass, then the following code:
Base *foo = new Child();
delete foo;
will not cause the destructor for members of Child class. As a result, I observe
plently of memory leaks. Notable examples I investigated are:
ObjectBuffer and ObjectBufferStream, AttributeImpl and StringSAttributeImpl.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194997 91177308-0d34-0410-b5e6-96231b3b80d8
parcInstrInfo.cpp
parcInstrInfo.h
|
| 5a364c5561ec04e33a6f5d52c14f1bac6f247ea0 |
15-Nov-2013 |
Juergen Ributzka <juergen@apple.com> |
[weak vtables] Remove a bunch of weak vtables
This patch removes most of the trivial cases of weak vtables by pinning them to
a single object file.
Differential Revision: http://llvm-reviews.chandlerc.com/D2068
Reviewed by Andy
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194865 91177308-0d34-0410-b5e6-96231b3b80d8
parcInstrInfo.cpp
parcInstrInfo.h
|
| 3e94418e857d5e17b5d16dbc5abc8b5a8b4efac6 |
12-Nov-2013 |
Roman Divacky <rdivacky@freebsd.org> |
Expand rotate instructions on sparcv9 as well.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194500 91177308-0d34-0410-b5e6-96231b3b80d8
parcISelLowering.cpp
|
| fcd5e86396e121fef7ad11d41cc8bc0a541631b2 |
03-Nov-2013 |
Venkatraman Govindaraju <venkatra@cs.wisc.edu> |
[SparcV9] Handle i64 <-> float conversions in sparcv9 mode.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@193957 91177308-0d34-0410-b5e6-96231b3b80d8
parcISelLowering.cpp
parcISelLowering.h
parcInstr64Bit.td
parcInstrInfo.td
|
| 5e45051e0ee8917a88e84d799c5c90840d0c465b |
03-Nov-2013 |
Venkatraman Govindaraju <venkatra@cs.wisc.edu> |
[Sparc] Expand FP_TO_UINT, UINT_TO_FP for fp128.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@193947 91177308-0d34-0410-b5e6-96231b3b80d8
parcISelLowering.cpp
|
| 11cecbe1a070d461bb213a6037712f25e59a920a |
03-Nov-2013 |
Venkatraman Govindaraju <venkatra@cs.wisc.edu> |
[SparcV9] Add ctpop instruction for i64. Also, expand ctlz, cttz and bswap.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@193941 91177308-0d34-0410-b5e6-96231b3b80d8
parcISelLowering.cpp
parcInstr64Bit.td
|
| 1d6d49fbb104781cc3e9da9dcc3e36b6cbcd38b6 |
31-Oct-2013 |
Roman Divacky <rdivacky@freebsd.org> |
SparcV9 doesnt have rem instruction either.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@193789 91177308-0d34-0410-b5e6-96231b3b80d8
parcISelLowering.cpp
|
| ffc7dca885151ed42642c2d6733e8db75d276621 |
29-Oct-2013 |
Rafael Espindola <rafael.espindola@gmail.com> |
Add a helper getSymbol to AsmPrinter.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@193627 91177308-0d34-0410-b5e6-96231b3b80d8
parcAsmPrinter.cpp
|
| 06957f43f6051901590b318c10b1a0a5c7f898d4 |
16-Oct-2013 |
Rafael Espindola <rafael.espindola@gmail.com> |
Add a MCAsmInfoELF class and factor some code into it.
We had a MCAsmInfoCOFF, but no common class for all the ELF MCAsmInfos before.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192760 91177308-0d34-0410-b5e6-96231b3b80d8
CTargetDesc/SparcMCAsmInfo.cpp
CTargetDesc/SparcMCAsmInfo.h
|
| 3b73dea538d9c53e205d38bfbcf99dd64306874b |
09-Oct-2013 |
Venkatraman Govindaraju <venkatra@cs.wisc.edu> |
[Sparc] Disable tail call optimization for sparc64.
This patch fixes PR17506.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192294 91177308-0d34-0410-b5e6-96231b3b80d8
parcISelLowering.cpp
|
| 26c46ba11c9c614ee79ed7f5c505578187fb2971 |
08-Oct-2013 |
NAKAMURA Takumi <geek4civic@gmail.com> |
SparcJITInfo.cpp: Prune "default:" label to fix a warning. [-Wcovered-switch-default]
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192179 91177308-0d34-0410-b5e6-96231b3b80d8
parcJITInfo.cpp
|
| 35741ad5180ded4c272594dd52b96c1ccd20e33e |
08-Oct-2013 |
NAKAMURA Takumi <geek4civic@gmail.com> |
Prune trailing linefeeds.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192178 91177308-0d34-0410-b5e6-96231b3b80d8
parcJITInfo.cpp
|
| 38aceb871478893bfa87f94c2cb3a344a4c8c2df |
08-Oct-2013 |
Venkatraman Govindaraju <venkatra@cs.wisc.edu> |
[Sparc] Implement JIT for SPARC.
No new testcases. However, this patch makes all supported JIT testcases in
test/ExecutionEngine pass on Sparc.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192176 91177308-0d34-0410-b5e6-96231b3b80d8
MakeLists.txt
LVMBuild.txt
parc.h
parcCodeEmitter.cpp
parcISelLowering.cpp
parcInstrInfo.td
parcJITInfo.cpp
parcJITInfo.h
parcRelocations.h
parcTargetMachine.cpp
parcTargetMachine.h
argetInfo/SparcTargetInfo.cpp
|
| 3bd3419e86867ba88e7ece12c9184a01759ed917 |
08-Oct-2013 |
Venkatraman Govindaraju <venkatra@cs.wisc.edu> |
[Sparc] Do not hardcode nop in the delay slot of TLS_CALL. Use DelaySlotFiller to fill the delay slot instead.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192160 91177308-0d34-0410-b5e6-96231b3b80d8
elaySlotFiller.cpp
parcInstrInfo.td
|
| ef8c4ca252f1289ca8d0a1e6cfd96ca17fe3c5a8 |
07-Oct-2013 |
Rafael Espindola <rafael.espindola@gmail.com> |
Remove getEHExceptionRegister and getEHHandlerRegister.
They haven't been used for a long time. Patch by MathOnNapkins.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192099 91177308-0d34-0410-b5e6-96231b3b80d8
parcRegisterInfo.cpp
parcRegisterInfo.h
|
| 79c5e0c5ca85454da568dfafc0bedb84af6c2a68 |
06-Oct-2013 |
Venkatraman Govindaraju <venkatra@cs.wisc.edu> |
[Sparc] Do not emit nop after fcmp* instruction with V9.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192056 91177308-0d34-0410-b5e6-96231b3b80d8
elaySlotFiller.cpp
parcInstrInfo.td
|
| 20b10abf4e88ca532810fbf749b029ce582d6793 |
06-Oct-2013 |
Venkatraman Govindaraju <venkatra@cs.wisc.edu> |
[Sparc] Custom lower addc/adde/subc/sube on i64 in sparc64.
This is required because i64 is a legal type but addxcc/subxcc reads icc carry bit, which are 32 bit conditional codes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192054 91177308-0d34-0410-b5e6-96231b3b80d8
parcISelLowering.cpp
parcInstr64Bit.td
|
| bb0ec9840bf6fd06fed967d5e70bee1983971344 |
06-Oct-2013 |
Venkatraman Govindaraju <venkatra@cs.wisc.edu> |
[Sparc] Use addxcc/subxcc for adde/sube instead of addx/subx.
addx/subx does not modify conditional codes whereas addxcc/subxx does.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192053 91177308-0d34-0410-b5e6-96231b3b80d8
parcInstrInfo.td
|
| a8147756d681f100e58e88aae842aebf4f51693d |
05-Oct-2013 |
Venkatraman Govindaraju <venkatra@cs.wisc.edu> |
[Sparc] Use correct alignment while loading/storing fp128 values.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192023 91177308-0d34-0410-b5e6-96231b3b80d8
parcISelLowering.cpp
|
| b648122c5f4dfa651d46c10c39ddf4f2f8cf1170 |
05-Oct-2013 |
Venkatraman Govindaraju <venkatra@cs.wisc.edu> |
[Sparc] Respect hasHardQuad parameter correctly when lowering SINT_TO_FP with fp128 operand.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192015 91177308-0d34-0410-b5e6-96231b3b80d8
parcISelLowering.cpp
|
| 1c9524b6249ab01c71856e69c4f7071236cf54ed |
05-Oct-2013 |
Venkatraman Govindaraju <venkatra@cs.wisc.edu> |
[Sparc] Correct the floating point conditional code mapping in GetOppositeBranchCondition().
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192006 91177308-0d34-0410-b5e6-96231b3b80d8
parcInstrInfo.cpp
|
| 30ec8a3658b1f06bb94d392c55feb7f107517bf8 |
26-Sep-2013 |
Venkatraman Govindaraju <venkatra@cs.wisc.edu> |
[Sparc] Implements exception handling in SPARC with DwarfCFI.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191432 91177308-0d34-0410-b5e6-96231b3b80d8
CTargetDesc/SparcMCAsmInfo.cpp
parcFrameLowering.cpp
parcISelLowering.cpp
|
| ff96efee98f8a06e8fdf29d34843659932a83e95 |
22-Sep-2013 |
Venkatraman Govindaraju <venkatra@cs.wisc.edu> |
[Sparc] Use correct instruction pattern for CMPri.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191180 91177308-0d34-0410-b5e6-96231b3b80d8
parcInstrInfo.td
|
| 0821c72f11659964f76f4326874dd4037900ce14 |
22-Sep-2013 |
Venkatraman Govindaraju <venkatra@cs.wisc.edu> |
[Sparc] Make SPARC instructions' encoding well defined such that TableGen can automatically generate code emitter.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191168 91177308-0d34-0410-b5e6-96231b3b80d8
MakeLists.txt
akefile
parcInstrFormats.td
parcInstrInfo.td
|
| 69ae8f1abda2cfcbbb2ef895bbe23936d1beddf8 |
22-Sep-2013 |
Venkatraman Govindaraju <venkatra@cs.wisc.edu> |
[Sparc] Clean up MOVcc instructions so that TableGen can encode them correctly. No functionality change intended.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191167 91177308-0d34-0410-b5e6-96231b3b80d8
parcInstrFormats.td
parcInstrInfo.td
|
| a432a97b62617b8b74219ae60c6c6db5cc5ec7ab |
22-Sep-2013 |
Venkatraman Govindaraju <venkatra@cs.wisc.edu> |
[Sparc] Clean up branch instructions, so that TableGen can encode branch conditions as well. No functionality change intended.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191166 91177308-0d34-0410-b5e6-96231b3b80d8
parcInstr64Bit.td
parcInstrFormats.td
parcInstrInfo.td
|
| 3e84ad28d4d3ceee25771b1e30315c20b7608c39 |
22-Sep-2013 |
Tim Northover <tnorthover@apple.com> |
ISelDAG: spot chain cycles involving MachineNodes
Previously, the DAGISel function WalkChainUsers was spotting that it
had entered already-selected territory by whether a node was a
MachineNode (amongst other things). Since it's fairly common practice
to insert MachineNodes during ISelLowering, this was not the correct
check.
Looking around, it seems that other nodes get their NodeId set to -1
upon selection, so this makes sure the same thing happens to all
MachineNodes and uses that characteristic to determine whether we
should stop looking for a loop during selection.
This should fix PR15840.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191165 91177308-0d34-0410-b5e6-96231b3b80d8
parcISelDAGToDAG.cpp
|
| 7d052f272d3f9ad0acdebf6811e29d529f70c1e1 |
22-Sep-2013 |
Venkatraman Govindaraju <venkatra@cs.wisc.edu> |
[Sparc] Add support for TLS in sparc.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191164 91177308-0d34-0410-b5e6-96231b3b80d8
CTargetDesc/SparcBaseInfo.h
parcAsmPrinter.cpp
parcISelDAGToDAG.cpp
parcISelLowering.cpp
parcISelLowering.h
parcInstr64Bit.td
parcInstrInfo.td
|
| ecd4965c133d16fc9e5a6ac393c5194b67cd53ab |
22-Sep-2013 |
Venkatraman Govindaraju <venkatra@cs.wisc.edu> |
[SPARC] Make functions with GLOBAL_OFFSET_TABLE access as non-leaf functions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191160 91177308-0d34-0410-b5e6-96231b3b80d8
parcISelLowering.cpp
|
| c12c8d754dcf7793d924c01517c9f6f297fdf6b4 |
22-Sep-2013 |
Venkatraman Govindaraju <venkatra@cs.wisc.edu> |
[Sparc] Emit .register directive to declare the use of global registers %g2, %g4, %g6 and %g7.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191158 91177308-0d34-0410-b5e6-96231b3b80d8
parcAsmPrinter.cpp
|
| 20b5879e0ec5c926c3b636ad36d5b6cfb278f736 |
22-Sep-2013 |
Venkatraman Govindaraju <venkatra@cs.wisc.edu> |
[Sparc] Fix lowering FABS on fp128 (long double) on pre-v9 targets.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191154 91177308-0d34-0410-b5e6-96231b3b80d8
parcISelLowering.cpp
|
| 1b41835f02f77c04a93323f722cf158cc566acae |
05-Sep-2013 |
Venkatraman Govindaraju <venkatra@cs.wisc.edu> |
[Sparc] Correctly handle call to functions with ReturnsTwice attribute.
In sparc, setjmp stores only the registers %fp, %sp, %i7 and %o7. longjmp restores
the stack, and the callee-saved registers (all local/in registers: %i0-%i7, %l0-%l7)
using the stored %fp and register windows. However, this does not guarantee that the longjmp
will restore the registers, as they were when the setjmp was called. This is because these
registers may be clobbered after returning from setjmp, but before calling longjmp.
This patch prevents the registers %i0-%i5, %l0-l7 to live across the setjmp call using the register mask.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190033 91177308-0d34-0410-b5e6-96231b3b80d8
parcCallingConv.td
parcISelLowering.cpp
parcRegisterInfo.cpp
parcRegisterInfo.h
|
| bf34f346420dbcdb3f9376967bde701682471a79 |
04-Sep-2013 |
Venkatraman Govindaraju <venkatra@cs.wisc.edu> |
[Sparc] Fix an assertion failure while lowering fcmp on long double.
This assertion is triggered because an integer constant is created with wrong
type.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@189948 91177308-0d34-0410-b5e6-96231b3b80d8
parcISelLowering.cpp
|
| 75ddb2bb34f96c2bda48d0e86331fb52b55b8d03 |
03-Sep-2013 |
Venkatraman Govindaraju <venkatra@cs.wisc.edu> |
[Sparc] Add support for soft long double (fp128).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@189780 91177308-0d34-0410-b5e6-96231b3b80d8
parcISelLowering.cpp
parcISelLowering.h
parcInstrInfo.td
|
| 6ee0857bd74dd68e46e970a6bcf756ee03ed8e99 |
02-Sep-2013 |
Venkatraman Govindaraju <venkatra@cs.wisc.edu> |
[Sparc] Implement spill and load for long double(f128) registers.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@189768 91177308-0d34-0410-b5e6-96231b3b80d8
parcInstrInfo.cpp
parcRegisterInfo.cpp
|
| 2f17d0facf6a489a051c86c015453c2b102e5c37 |
25-Aug-2013 |
Venkatraman Govindaraju <venkatra@cs.wisc.edu> |
[Sparc] Add long double (f128) instructions to sparc backend.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@189198 91177308-0d34-0410-b5e6-96231b3b80d8
parc.td
parcISelLowering.cpp
parcInstrInfo.td
parcSubtarget.cpp
parcSubtarget.h
|
| 5ec8afa7cf9ae11def585fff043b0eabd735ac28 |
25-Aug-2013 |
Venkatraman Govindaraju <venkatra@cs.wisc.edu> |
[Sparc] Added V9's extra floating point registers and their aliases.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@189195 91177308-0d34-0410-b5e6-96231b3b80d8
parcRegisterInfo.cpp
parcRegisterInfo.td
|
| b58126124081a9bf8da1368441b00070ed2db232 |
23-Aug-2013 |
Jakob Stoklund Olesen <stoklund@2pi.dk> |
Use register masks on SPARC call instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@189085 91177308-0d34-0410-b5e6-96231b3b80d8
parcISelLowering.cpp
parcInstrInfo.td
|
| d93969c32a6bbae3326a1f485c4c85be1cb39406 |
23-Aug-2013 |
Jakob Stoklund Olesen <stoklund@2pi.dk> |
Add an OtherPreserved field to the CalleeSaved TableGen class.
This field specifies registers that are preserved across function calls,
but that should not be included in the generates SaveList array.
This can be used ot generate regmasks for architectures that save
registers through other means, like SPARC's register windows.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@189084 91177308-0d34-0410-b5e6-96231b3b80d8
parcCallingConv.td
parcRegisterInfo.cpp
parcRegisterInfo.h
|
| e3b29fbc5f4d7632a88b6f470a96cc6ac09e31ed |
20-Aug-2013 |
Venkatraman Govindaraju <venkatra@cs.wisc.edu> |
[Sparc] Use HWEncoding instead of unused Num field in Sparc register definitions. Also, correct the definitions of RETL and RET instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188738 91177308-0d34-0410-b5e6-96231b3b80d8
parcInstrInfo.td
parcRegisterInfo.td
|
| d8de58e24cf5874c0d6f903d15333406787ea944 |
10-Aug-2013 |
Venkatraman Govindaraju <venkatra@cs.wisc.edu> |
[Sparc] Enable xword directive in sparcv9.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188141 91177308-0d34-0410-b5e6-96231b3b80d8
CTargetDesc/SparcMCAsmInfo.cpp
|
| 8e1d64666f493e4994b26a390bec1290a5d94b96 |
06-Aug-2013 |
NAKAMURA Takumi <geek4civic@gmail.com> |
Target/*/CMakeLists.txt: Add the dependency to CommonTableGen explicitly for each corresponding CodeGen.
Without explicit dependencies, both per-file action and in-CommonTableGen action could run in parallel.
It races to emit *.inc files simultaneously.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187780 91177308-0d34-0410-b5e6-96231b3b80d8
MakeLists.txt
|
| 8717679c449db5555ec0ce2873bbbe53106f4c88 |
30-Jul-2013 |
Venkatraman Govindaraju <venkatra@cs.wisc.edu> |
[Sparc] Rewrite MBB's live-in registers for leaf functions. Also, add
register i7 as a live-in if current function's return address is taken.
This revision fixes PR16269.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187433 91177308-0d34-0410-b5e6-96231b3b80d8
parcFrameLowering.cpp
parcISelLowering.cpp
|
| 80cdaf35abc528ee00bd49486d455436ec049581 |
30-Jul-2013 |
Venkatraman Govindaraju <venkatra@cs.wisc.edu> |
[Sparc] Use call's debugloc for the unimp instruction.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187402 91177308-0d34-0410-b5e6-96231b3b80d8
elaySlotFiller.cpp
|
| a0ec3f9b7b826b9b40b80199923b664bad808cce |
14-Jul-2013 |
Craig Topper <craig.topper@gmail.com> |
Use SmallVectorImpl& instead of SmallVector to avoid repeating small vector size.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186274 91177308-0d34-0410-b5e6-96231b3b80d8
parcISelLowering.cpp
|
| eb4a55c949cc8ee32fdff3bc460f0c2788e247fd |
26-Jun-2013 |
Venkatraman Govindaraju <venkatra@cs.wisc.edu> |
[Sparc]: Add memory operands for the frame references in the storeRegToStackSlot
and loadRegFromStackSlot.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184935 91177308-0d34-0410-b5e6-96231b3b80d8
parcInstrInfo.cpp
|
| 5b3fca50a08865f0db55fc92ad1c037a04e12177 |
22-Jun-2013 |
Chad Rosier <mcrosier@apple.com> |
The getRegForInlineAsmConstraint function should only accept MVT value types.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184642 91177308-0d34-0410-b5e6-96231b3b80d8
parcISelLowering.cpp
parcISelLowering.h
|
| ba54bca472a15d0657e1b88776f7069042b60b4e |
19-Jun-2013 |
Bill Wendling <isanbard@gmail.com> |
Access the TargetLoweringInfo from the TargetMachine object instead of caching it. The TLI may change between functions. No functionality change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184360 91177308-0d34-0410-b5e6-96231b3b80d8
parcISelDAGToDAG.cpp
|
| 0187e7a9ba5c50b4559e0c2e0afceb6d5cd32190 |
16-Jun-2013 |
David Blaikie <dblaikie@gmail.com> |
DebugInfo: remove target-specific Frame Index handling for DBG_VALUE MachineInstrs
Frame index handling is now target-agnostic, so delete the target hooks
for creation & asm printing of target-specific addressing in DBG_VALUEs
and any related functions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184067 91177308-0d34-0410-b5e6-96231b3b80d8
parcAsmPrinter.cpp
parcInstrInfo.cpp
parcInstrInfo.h
|
| 1799921672835c49f6a29fc27d1840b7c36beabd |
08-Jun-2013 |
Venkatraman Govindaraju <venkatra@cs.wisc.edu> |
[Sparc] Delete FPMover Pass and remove Fp* Pseudo-instructions from Sparc backend.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183613 91177308-0d34-0410-b5e6-96231b3b80d8
MakeLists.txt
PMover.cpp
parc.h
parcISelLowering.cpp
parcInstrInfo.cpp
parcInstrInfo.td
parcTargetMachine.cpp
|
| ec2aaad01bff4ba2dd5cee0cd0bfe723db2619d0 |
08-Jun-2013 |
Jakob Stoklund Olesen <stoklund@2pi.dk> |
Remember the anyext patterns.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183589 91177308-0d34-0410-b5e6-96231b3b80d8
parcInstr64Bit.td
|
| 7de1d327f134286d8049adc7b06f92447b4bbecd |
08-Jun-2013 |
Jakob Stoklund Olesen <stoklund@2pi.dk> |
Add missing zextloadi1 to i64 patterns. PR16721.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183587 91177308-0d34-0410-b5e6-96231b3b80d8
parcInstr64Bit.td
|
| c1dcb8d654d4468d63224269ee3c92480bf2385b |
07-Jun-2013 |
Bill Wendling <isanbard@gmail.com> |
Don't cache the instruction and register info from the TargetMachine, because
the internals of TargetMachine could change.
No functionality change intended.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183565 91177308-0d34-0410-b5e6-96231b3b80d8
elaySlotFiller.cpp
parcInstrInfo.cpp
parcRegisterInfo.cpp
parcRegisterInfo.h
|
| 6ca5fd3f30081853cfcf7f83a310f94aac2c5e17 |
07-Jun-2013 |
Roman Divacky <rdivacky@freebsd.org> |
Fix a typo in asm string of BP* family of instructions. With this fix
I am able to compile/assemble/link/run /bin/echo from FreeBSD.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183537 91177308-0d34-0410-b5e6-96231b3b80d8
parcInstr64Bit.td
|
| 01021a8b93989a3c9e17dea540fe66809bf25403 |
07-Jun-2013 |
Venkatraman Govindaraju <venkatra@cs.wisc.edu> |
[Sparc]: Use cmp instruction instead of subcc to compare integers.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183463 91177308-0d34-0410-b5e6-96231b3b80d8
parcISelLowering.cpp
parcInstr64Bit.td
parcInstrInfo.td
|
| 6a2e7ac0b6647a409394e58b385e579ea62b5cba |
06-Jun-2013 |
Bill Wendling <isanbard@gmail.com> |
Cache the TargetLowering info object as a pointer.
Caching it as a pointer allows us to reset it if the TargetMachine object
changes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183361 91177308-0d34-0410-b5e6-96231b3b80d8
parcISelDAGToDAG.cpp
|
| 1e06bcbd633175d75d13aaa5695ca0633ba86068 |
04-Jun-2013 |
Venkatraman Govindaraju <venkatra@cs.wisc.edu> |
Sparc: No functionality change. Cleanup whitespaces, comment formatting etc.,
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183243 91177308-0d34-0410-b5e6-96231b3b80d8
elaySlotFiller.cpp
PMover.cpp
LVMBuild.txt
EADME.txt
parc.h
parc.td
parcAsmPrinter.cpp
parcCallingConv.td
parcFrameLowering.cpp
parcFrameLowering.h
parcISelLowering.cpp
parcInstrFormats.td
parcInstrInfo.cpp
parcInstrInfo.h
parcInstrInfo.td
parcRegisterInfo.cpp
parcRegisterInfo.td
parcSubtarget.cpp
parcSubtarget.h
|
| e7cbb792c95cb27a9704551579da19ebcaa06cdb |
03-Jun-2013 |
Venkatraman Govindaraju <venkatra@cs.wisc.edu> |
Sparc: Add support for indirect branch and blockaddress in Sparc backend.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183094 91177308-0d34-0410-b5e6-96231b3b80d8
parcAsmPrinter.cpp
parcISelLowering.cpp
parcISelLowering.h
parcInstrInfo.td
|
| 85cc972a06690507a2660fccb198319b0402105f |
03-Jun-2013 |
Venkatraman Govindaraju <venkatra@cs.wisc.edu> |
Sparc: When storing 0, use %g0 directly in the store instruction instead of
using two instructions (sethi and store).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183090 91177308-0d34-0410-b5e6-96231b3b80d8
parcInstr64Bit.td
parcInstrInfo.td
|
| 65ca7aa57d5e9b391f02a5686e7622deaac146f9 |
02-Jun-2013 |
Venkatraman Govindaraju <venkatra@cs.wisc.edu> |
Sparc: Combine add/or/sethi instruction with restore if possible.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183088 91177308-0d34-0410-b5e6-96231b3b80d8
elaySlotFiller.cpp
|
| dd48226b15510c57a9486aa2bbc38bd0eb2cbb40 |
02-Jun-2013 |
Venkatraman Govindaraju <venkatra@cs.wisc.edu> |
Sparc: Perform leaf procedure optimization by default
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183083 91177308-0d34-0410-b5e6-96231b3b80d8
parcFrameLowering.cpp
|
| a0b34d6c4ab05d0c04905e2aff0c9e6b879908ff |
01-Jun-2013 |
Venkatraman Govindaraju <venkatra@cs.wisc.edu> |
Sparc: Mark functions calling llvm.vastart and llvm.returnaddress intrinsics as non-leaf functions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183079 91177308-0d34-0410-b5e6-96231b3b80d8
parcISelLowering.cpp
|
| 72ad17c48c15562fe31c65f6daa09c83f42860c1 |
01-Jun-2013 |
Venkatraman Govindaraju <venkatra@cs.wisc.edu> |
[Sparc] Generate correct code for leaf functions with stack objects
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183067 91177308-0d34-0410-b5e6-96231b3b80d8
parcFrameLowering.cpp
parcRegisterInfo.cpp
parcSubtarget.cpp
parcSubtarget.h
|
| 23ed37a6b76e79272194fb46597f7280661b828f |
01-Jun-2013 |
Ahmed Bougacha <ahmed.bougacha@gmail.com> |
Make SubRegIndex size mandatory, following r183020.
This also makes TableGen able to compute sizes/offsets of synthesized
indices representing tuples.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183061 91177308-0d34-0410-b5e6-96231b3b80d8
parcRegisterInfo.td
|
| 6e0b2a0cb0d398f175a5294bf0ad5488c714e8c2 |
30-May-2013 |
Andrew Trick <atrick@apple.com> |
Order CALLSEQ_START and CALLSEQ_END nodes.
Fixes PR16146: gdb.base__call-ar-st.exp fails after
pre-RA-sched=source fixes.
Patch by Xiaoyi Guo!
This also fixes an unsupported dbg.value test case. Codegen was
previously incorrect but the test was passing by luck.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182885 91177308-0d34-0410-b5e6-96231b3b80d8
parcISelLowering.cpp
|
| d1c180e0305c5bedb2b4259c1d841e944d043880 |
29-May-2013 |
NAKAMURA Takumi <geek4civic@gmail.com> |
SparcFrameLowering.cpp: Mark verifyLeafProcRegUse() as UNUSED. [-Wunused-function]
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182850 91177308-0d34-0410-b5e6-96231b3b80d8
parcFrameLowering.cpp
|
| 530086925695f074b0e1e38a0d88ee6a4c91c54c |
29-May-2013 |
Venkatraman Govindaraju <venkatra@cs.wisc.edu> |
[Sparc] Add support for leaf functions in sparc backend.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182822 91177308-0d34-0410-b5e6-96231b3b80d8
elaySlotFiller.cpp
parcFrameLowering.cpp
parcFrameLowering.h
parcMachineFunctionInfo.h
parcRegisterInfo.cpp
parcRegisterInfo.td
|
| ac6d9bec671252dd1e596fa71180ff6b39d06b5d |
25-May-2013 |
Andrew Trick <atrick@apple.com> |
Track IR ordering of SelectionDAG nodes 2/4.
Change SelectionDAG::getXXXNode() interfaces as well as call sites of
these functions to pass in SDLoc instead of DebugLoc.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182703 91177308-0d34-0410-b5e6-96231b3b80d8
parcISelDAGToDAG.cpp
parcISelLowering.cpp
parcISelLowering.h
|
| 89f530ebbfa91d1583a72d86dc6ca2804f4f450d |
20-May-2013 |
Jakob Stoklund Olesen <stoklund@2pi.dk> |
Also expand 64-bit bitcasts.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182229 91177308-0d34-0410-b5e6-96231b3b80d8
parcISelLowering.cpp
|
| 5e5b78ca364ee61c6963070e5a5a346499ab6ee2 |
20-May-2013 |
Jakob Stoklund Olesen <stoklund@2pi.dk> |
Implement spill and fill of I64Regs.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182228 91177308-0d34-0410-b5e6-96231b3b80d8
parcInstrInfo.cpp
|
| 900622e099054da4a213074581d8501ac27e7ea7 |
20-May-2013 |
Jakob Stoklund Olesen <stoklund@2pi.dk> |
Mark i64 SETCC as expand so it is turned into a SELECT_CC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182227 91177308-0d34-0410-b5e6-96231b3b80d8
parcISelLowering.cpp
|
| 634123e98de9c87aa1275a5ccc6b69be97d0ca71 |
19-May-2013 |
Jakob Stoklund Olesen <stoklund@2pi.dk> |
Don't use %g0 to materialize 0 directly.
The wired physreg doesn't work on tied operands like on MOVXCC.
Add a README note to fix this later.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182225 91177308-0d34-0410-b5e6-96231b3b80d8
EADME.txt
parcInstr64Bit.td
|
| 60abcb786e8ff401e7d925d717e725d4a3d925b5 |
19-May-2013 |
Jakob Stoklund Olesen <stoklund@2pi.dk> |
Select i64 values with %icc conditions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182224 91177308-0d34-0410-b5e6-96231b3b80d8
parcInstr64Bit.td
|
| 51d46c36bc9e1611858c0d2a2675951c97fbfb2c |
19-May-2013 |
Jakob Stoklund Olesen <stoklund@2pi.dk> |
Add floating point selects on %xcc predicates.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182222 91177308-0d34-0410-b5e6-96231b3b80d8
parcInstr64Bit.td
|
| 89db6732fbd987a33751f4aff01b8e4b0a630d91 |
19-May-2013 |
Jakob Stoklund Olesen <stoklund@2pi.dk> |
Implement SPselectfcc for i64 operands.
Also clean up the arguments to all the MOVCC instructions so the
operands always are (true-val, false-val, cond-code).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182221 91177308-0d34-0410-b5e6-96231b3b80d8
parcInstr64Bit.td
parcInstrInfo.td
|
| 21886a495a5467aa241f325cdd3dd2532fa7dcde |
19-May-2013 |
Venkatraman Govindaraju <venkatra@cs.wisc.edu> |
[Sparc] Rearrange integer registers' allocation order so that register allocator will use I and G registers before using L and O registers.
Also, enable registers %g2-%g4 to be used in application and %g5 in 64 bit mode.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182219 91177308-0d34-0410-b5e6-96231b3b80d8
parcRegisterInfo.cpp
parcRegisterInfo.td
|
| 00ce0f6512a36ff18fcd223dfebc5469e3600652 |
19-May-2013 |
Jakob Stoklund Olesen <stoklund@2pi.dk> |
Handle i64 FrameIndex nodes in SPARC v9 mode.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182216 91177308-0d34-0410-b5e6-96231b3b80d8
parcInstrInfo.td
|
| a65d33760bae63b11569117597cf0fbd64f5c0eb |
17-May-2013 |
Venkatraman Govindaraju <venkatra@cs.wisc.edu> |
[Sparc] Implements hasReservedCallFrame and hasFP.
This is to generate correct framesetup code when the function
has variable sized allocas.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182108 91177308-0d34-0410-b5e6-96231b3b80d8
parcFrameLowering.cpp
parcFrameLowering.h
|
| d6b4caf291aa8c3cd4bcb5f3b55b72621b506278 |
17-May-2013 |
Venkatraman Govindaraju <venkatra@cs.wisc.edu> |
[Sparc] Prevent instructions that defines or uses %o7 to be in call's delay slot.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182063 91177308-0d34-0410-b5e6-96231b3b80d8
elaySlotFiller.cpp
|
| 4a971705bc6030dc2e4338b3cd5cffa2e0f88b7b |
13-May-2013 |
Rafael Espindola <rafael.espindola@gmail.com> |
Remove the MachineMove class.
It was just a less powerful and more confusing version of
MCCFIInstruction. A side effect is that, since MCCFIInstruction uses
dwarf register numbers, calls to getDwarfRegNum are pushed out, which
should allow further simplifications.
I left the MachineModuleInfo::addFrameMove interface unchanged since
this patch was already fairly big.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181680 91177308-0d34-0410-b5e6-96231b3b80d8
parcTargetMachine.cpp
|
| 6e53180db120b30f600ac31611a9dd47ef7f4921 |
10-May-2013 |
Rafael Espindola <rafael.espindola@gmail.com> |
Remove unused argument.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181618 91177308-0d34-0410-b5e6-96231b3b80d8
CTargetDesc/SparcMCAsmInfo.cpp
CTargetDesc/SparcMCAsmInfo.h
|
| ddb14ce76cbdf682d95765aa1e576fafeec180ae |
21-Apr-2013 |
Jakob Stoklund Olesen <stoklund@2pi.dk> |
Passing arguments to varags functions under the SPARC v9 ABI.
Arguments after the fixed arguments never use the floating point
registers.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179987 91177308-0d34-0410-b5e6-96231b3b80d8
parcISelLowering.cpp
|
| 2c6b5a8d33a650b9a5b838f6bc8887c8f195f944 |
21-Apr-2013 |
Jakob Stoklund Olesen <stoklund@2pi.dk> |
Fix the SETHIimm pattern for 64-bit code.
Don't ignore the high 32 bits of the immediate.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179985 91177308-0d34-0410-b5e6-96231b3b80d8
parcInstrInfo.td
|
| da8768b2dd31e99679fa898bbce33d6a8bbf9395 |
21-Apr-2013 |
Jakob Stoklund Olesen <stoklund@2pi.dk> |
Compile varargs functions for SPARCv9.
With a little help from the frontend, it looks like the standard va_*
intrinsics can do the job.
Also clean up an old bitcast hack in LowerVAARG that dealt with
unaligned double loads. Load SDNodes can specify an alignment now.
Still missing: Calling varargs functions with float arguments.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179961 91177308-0d34-0410-b5e6-96231b3b80d8
parcISelLowering.cpp
|
| 6265d5c91a18b2fb6499eb581c488315880c044d |
20-Apr-2013 |
Tim Northover <Tim.Northover@arm.com> |
Remove unused MEMBARRIER DAG node; it's been replaced by ATOMIC_FENCE.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179939 91177308-0d34-0410-b5e6-96231b3b80d8
parcISelLowering.cpp
|
| ad36608499429cc9dc67b95fed8732a294e6f02e |
16-Apr-2013 |
Jakob Stoklund Olesen <stoklund@2pi.dk> |
Add 64-bit multiply and divide instructions for SPARC v9.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179582 91177308-0d34-0410-b5e6-96231b3b80d8
parcISelDAGToDAG.cpp
parcInstr64Bit.td
|
| d9f88da7b329c54ccb0d2ebd3b3a4b0e4b1e2b06 |
14-Apr-2013 |
Jakob Stoklund Olesen <stoklund@2pi.dk> |
Use i32 for all SPARC shift amounts, even in 64-bit mode.
Test case by llvm-stress.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179477 91177308-0d34-0410-b5e6-96231b3b80d8
parcISelLowering.cpp
parcISelLowering.h
parcInstr64Bit.td
parcInstrFormats.td
|
| 618eda7a60bafff7741a988e27b98bf81d27cb89 |
14-Apr-2013 |
Jakob Stoklund Olesen <stoklund@2pi.dk> |
Add support for the abs64 SPARC v9 code model.
For when 16 TB just isn't enough.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179474 91177308-0d34-0410-b5e6-96231b3b80d8
parcISelLowering.cpp
|
| 87ce01739b058fd6d929cd8e609ceecf82f919a7 |
14-Apr-2013 |
Jakob Stoklund Olesen <stoklund@2pi.dk> |
Add support for the SPARC v9 abs44 code model.
This is the default model for non-PIC 64-bit code. It supports
text+data+bss linked anywhere in the low 16 TB of the address space.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179473 91177308-0d34-0410-b5e6-96231b3b80d8
parcISelLowering.cpp
|
| cab0abd03ded35006f594c2a7707753eefd88530 |
14-Apr-2013 |
Jakob Stoklund Olesen <stoklund@2pi.dk> |
Use target flags for printing SPARC asm operands.
64-bit code models need multiple relocations that can't be inferred from
the opcode like they can in 32-bit code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179472 91177308-0d34-0410-b5e6-96231b3b80d8
parcAsmPrinter.cpp
|
| 26932106562adbe3f186b8f32fd5057d9f373875 |
14-Apr-2013 |
Jakob Stoklund Olesen <stoklund@2pi.dk> |
Also put target flags on SPARC constant pool references.
Constant pool entries are accessed exactly the same way as global
variables.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179471 91177308-0d34-0410-b5e6-96231b3b80d8
parcISelLowering.cpp
parcISelLowering.h
|
| ef596e1a80a9790efbc905c57b4e06ba6addb95a |
14-Apr-2013 |
Jakob Stoklund Olesen <stoklund@2pi.dk> |
Fix patterns for 64-bit pointers.
This fixes the pic32 code model for SPARC v9.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179469 91177308-0d34-0410-b5e6-96231b3b80d8
parcInstrInfo.td
|
| 0ec587e26cd7e048b3150f89fa6d6245d5728cec |
14-Apr-2013 |
Jakob Stoklund Olesen <stoklund@2pi.dk> |
Add target flags to SPARC address operands.
SDNodes and MachineOperands get target flags representing the %hi() and
%lo() assembly annotations that eventually become relocations.
Also define flags to be used by the 64-bit code models.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179468 91177308-0d34-0410-b5e6-96231b3b80d8
CTargetDesc/SparcBaseInfo.h
parcISelLowering.cpp
parcISelLowering.h
|
| 41d59c61307002823c246c14589048266a6bf423 |
13-Apr-2013 |
Jakob Stoklund Olesen <stoklund@2pi.dk> |
Define SPARC code models.
Currently, only abs32 and pic32 are implemented. Add a test case for
abs32 with 64-bit code. 64-bit PIC code is currently broken.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179463 91177308-0d34-0410-b5e6-96231b3b80d8
CTargetDesc/SparcMCTargetDesc.cpp
parcISelLowering.cpp
|
| 41b585ca0e706a6d43ca185e88a609178e8629e7 |
13-Apr-2013 |
Jakob Stoklund Olesen <stoklund@2pi.dk> |
Use the correct types when matching ADDRri patterns from frame indexes.
It doesn't seem like anybody is checking types this late in isel, so no
test case.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179462 91177308-0d34-0410-b5e6-96231b3b80d8
parcISelDAGToDAG.cpp
|
| 1b133a478baaec072d937dd577c63094fdfcd4bb |
09-Apr-2013 |
Jakob Stoklund Olesen <stoklund@2pi.dk> |
Extract a function.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179086 91177308-0d34-0410-b5e6-96231b3b80d8
parcISelLowering.cpp
|
| 6ed9284c2bcfb81fa0303409c6bd4366bc1e822a |
09-Apr-2013 |
Jakob Stoklund Olesen <stoklund@2pi.dk> |
Compute correct frame sizes for SPARC v9 64-bit frames.
The save area is twice as big and there is no struct return slot. The
stack pointer is always 16-byte aligned (after adding the bias).
Also eliminate the stack adjustment instructions around calls when the
function has a reserved stack frame.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179083 91177308-0d34-0410-b5e6-96231b3b80d8
parcFrameLowering.cpp
parcFrameLowering.h
parcISelLowering.cpp
|
| 18fdb398ea94c7ddee40bec49f63491922c5b110 |
07-Apr-2013 |
Jakob Stoklund Olesen <stoklund@2pi.dk> |
Implement LowerCall_64 for the SPARC v9 64-bit ABI.
There is still no support for byval arguments (which I don't think are
needed) and varargs.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178993 91177308-0d34-0410-b5e6-96231b3b80d8
parcISelLowering.cpp
parcISelLowering.h
|
| 53d4bcf35e7bc362e9340085264c2f4acd3c912b |
07-Apr-2013 |
Jakob Stoklund Olesen <stoklund@2pi.dk> |
Implement LowerReturn_64 for SPARC v9.
Integer return values are sign or zero extended by the callee, and
structs up to 32 bytes in size can be returned in registers.
The CC_Sparc64 CallingConv definition is shared between
LowerFormalArguments_64 and LowerReturn_64. Function arguments and
return values are passed in the same registers.
The inreg flag is also used for return values. This is required to handle
C functions returning structs containing floats and ints:
struct ifp {
int i;
float f;
};
struct ifp f(void);
LLVM IR:
define inreg { i32, float } @f() {
...
ret { i32, float } %retval
}
The ABI requires that %retval.i is returned in the high bits of %i0
while %retval.f goes in %f1.
Without the inreg return value attribute, %retval.i would go in %i0 and
%retval.f would go in %f3 which is a more efficient way of returning
%multiple values, but it is not ABI compliant for returning C structs.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178966 91177308-0d34-0410-b5e6-96231b3b80d8
parcISelLowering.cpp
parcISelLowering.h
parcInstr64Bit.td
|
| 2b9355f2d9888d6a011353610b9ca24818de59a2 |
06-Apr-2013 |
Jakob Stoklund Olesen <stoklund@2pi.dk> |
SPARC v9 stack pointer bias.
64-bit SPARC v9 processes use biased stack and frame pointers, so the
current function's stack frame is located at %sp+BIAS .. %fp+BIAS where
BIAS = 2047.
This makes more local variables directly accessible via [%fp+simm13]
addressing.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178965 91177308-0d34-0410-b5e6-96231b3b80d8
parcRegisterInfo.cpp
parcSubtarget.h
|
| 1f25fe50236e5842b19198fbfe8a812be0b40cf5 |
06-Apr-2013 |
Jakob Stoklund Olesen <stoklund@2pi.dk> |
Complete formal arguments for the SPARC v9 64-bit ABI.
All arguments are formally assigned to stack positions and then promoted
to floating point and integer registers. Since there are more floating
point registers than integer registers, this can cause situations where
floating point arguments are assigned to registers after integer
arguments that where assigned to the stack.
Use the inreg flag to indicate 32-bit fragments of structs containing
both float and int members.
The three-way shadowing between stack, integer, and floating point
registers requires custom argument lowering. The good news is that
return values are passed in the exact same way, and we can share the
code.
Still missing:
- Update LowerReturn to handle structs returned in registers.
- LowerCall.
- Variadic functions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178958 91177308-0d34-0410-b5e6-96231b3b80d8
parcCallingConv.td
parcISelLowering.cpp
|
| 0e164884423e9f0f22670015a428946ebf178545 |
04-Apr-2013 |
Jakob Stoklund Olesen <stoklund@2pi.dk> |
Add SPARC v9 support for select on 64-bit compares.
This requires v9 cmov instructions using the %xcc flags instead of the
%icc flags.
Still missing:
- Select floats on %xcc flags.
- Select i64 on %fcc flags.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178737 91177308-0d34-0410-b5e6-96231b3b80d8
parcISelLowering.cpp
parcISelLowering.h
parcInstr64Bit.td
parcInstrInfo.td
|
| 8534e9998c53efae49e4555ba394f39808fb83e0 |
03-Apr-2013 |
Jakob Stoklund Olesen <stoklund@2pi.dk> |
Add 64-bit compare + branch for SPARC v9.
The same compare instruction is used for 32-bit and 64-bit compares. It
sets two different sets of flags: icc and xcc.
This patch adds a conditional branch instruction using the xcc flags for
64-bit compares.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178621 91177308-0d34-0410-b5e6-96231b3b80d8
parcISelLowering.cpp
parcISelLowering.h
parcInstr64Bit.td
parcInstrInfo.td
parcRegisterInfo.td
|
| 61ed5ddefe96cb6cb689fbcc74f95cfa00f493a1 |
02-Apr-2013 |
Jakob Stoklund Olesen <stoklund@2pi.dk> |
Add 64-bit load and store instructions.
There is only a few new instructions, the rest is handled with patterns.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178528 91177308-0d34-0410-b5e6-96231b3b80d8
parcInstr64Bit.td
|
| 73c5f80ec9913c9bd14955c0bd1dc8a62778f21a |
02-Apr-2013 |
Jakob Stoklund Olesen <stoklund@2pi.dk> |
Basic 64-bit ALU operations.
SPARC v9 extends all ALU instructions to 64 bits, so we simply need to
add patterns to use them for both i32 and i64 values.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178527 91177308-0d34-0410-b5e6-96231b3b80d8
parcInstr64Bit.td
|
| 39e75544dc2b695997218ce85f7ca5b465e9c154 |
02-Apr-2013 |
Jakob Stoklund Olesen <stoklund@2pi.dk> |
Materialize 64-bit immediates.
The last resort pattern produces 6 instructions, and there are still
opportunities for materializing some immediates in fewer instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178526 91177308-0d34-0410-b5e6-96231b3b80d8
parcInstr64Bit.td
|
| c3ff3f42ee9a9fb755b0eb0718a31d701b93b3e0 |
02-Apr-2013 |
Jakob Stoklund Olesen <stoklund@2pi.dk> |
Add 64-bit shift instructions.
SPARC v9 defines new 64-bit shift instructions. The 32-bit shift right
instructions are still usable as zero and sign extensions.
This adds new F3_Sr and F3_Si instruction formats that probably should
be used for the 32-bit shifts as well. They don't really encode an
simm13 field.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178525 91177308-0d34-0410-b5e6-96231b3b80d8
parcInstr64Bit.td
parcInstrFormats.td
parcInstrInfo.td
|
| a10fd6d3d1027b3903d27af701f876e36c1725c0 |
02-Apr-2013 |
Jakob Stoklund Olesen <stoklund@2pi.dk> |
Add predicates for distinguishing 32-bit and 64-bit modes.
The 'sparc' architecture produces 32-bit code while 'sparcv9' produces
64-bit code.
It is also possible to run 32-bit code using SPARC v9 instructions with:
llc -march=sparc -mattr=+v9
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178524 91177308-0d34-0410-b5e6-96231b3b80d8
parcInstrInfo.td
|
| f37812e906a3abbdb8353e2eb9e8223ff9036b68 |
02-Apr-2013 |
Jakob Stoklund Olesen <stoklund@2pi.dk> |
Add support for 64-bit calling convention.
This is far from complete, but it is enough to make it possible to write
test cases using i64 arguments.
Missing features:
- Floating point arguments.
- Receiving arguments on the stack.
- Calls.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178523 91177308-0d34-0410-b5e6-96231b3b80d8
parcCallingConv.td
parcISelLowering.cpp
parcISelLowering.h
|
| fcb25e60f514e4dbceecef73ac229c61d6202ed2 |
02-Apr-2013 |
Jakob Stoklund Olesen <stoklund@2pi.dk> |
Add an I64Regs register class for 64-bit registers.
We are going to use the same registers for 32-bit and 64-bit values, but
in two different register classes. The I64Regs register class has a
larger spill size and alignment.
The addition of an i64 register class confuses TableGen's type
inference, so it is necessary to clarify the type of some immediates and
the G0 register.
In 64-bit mode, pointers are i64 and should use the I64Regs register
class. Implement getPointerRegClass() to dynamically provide the pointer
register class depending on the subtarget. Use ptr_rc and iPTR for
memory operands.
Finally, add the i64 type to the IntRegs register class. This register
class is not used to hold i64 values, I64Regs is for that. The type is
required to appease TableGen's type checking in output patterns like this:
def : Pat<(add i64:$a, i64:$b), (ADDrr $a, $b)>;
SPARC v9 uses the same ADDrr instruction for i32 and i64 additions, and
TableGen doesn't know to check the type of register sub-classes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178522 91177308-0d34-0410-b5e6-96231b3b80d8
parcISelLowering.cpp
parcISelLowering.h
parcInstrInfo.td
parcRegisterInfo.cpp
parcRegisterInfo.h
parcRegisterInfo.td
|
| d28e30fcf44b22c897914343fce9061eb62d3b47 |
24-Mar-2013 |
Jakob Stoklund Olesen <stoklund@2pi.dk> |
Clean up Sparc patterns.
The types of register variables no longer need to be specified in output
patterns.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@177845 91177308-0d34-0410-b5e6-96231b3b80d8
parcInstrInfo.td
|
| 15a3c18623a05a8b9f2f4ea0b0c15965fda4fe6f |
24-Mar-2013 |
Jakob Stoklund Olesen <stoklund@2pi.dk> |
Give Sparc instruction patterns direct types instead of register classes.
Also update the documentation since Sparc is the nicest backend, and
used as an example in WritingAnLLVMBackend.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@177835 91177308-0d34-0410-b5e6-96231b3b80d8
parcInstrInfo.td
|
| edf03820f1d10bbefcb2821e1e0326cad114ed2e |
23-Mar-2013 |
Jakob Stoklund Olesen <stoklund@2pi.dk> |
Use direct types in Sparc def : Pat patterns.
The SelectionDAG graph has MVT type labels, not register classes, so
this makes it clearer what is happening.
This notation is also robust against adding more types to the IntRegs
register class.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@177829 91177308-0d34-0410-b5e6-96231b3b80d8
parcInstrInfo.td
|
| 3080d23fde4981835d8a7faf46c152441fadb11f |
14-Mar-2013 |
Hal Finkel <hfinkel@anl.gov> |
Provide the register scavenger to processFunctionBeforeFrameFinalized
Add the current PEI register scavenger as a parameter to the
processFunctionBeforeFrameFinalized callback.
This change is necessary in order to allow the PowerPC target code to
set the register scavenger frame index after the save-area offset
adjustments performed by processFunctionBeforeFrameFinalized. Only
after these adjustments have been made is it possible to estimate
the size of the stack frame.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@177108 91177308-0d34-0410-b5e6-96231b3b80d8
parcRegisterInfo.h
|
| 3853f74aba301ef08b699bac2fa8e53230714a58 |
07-Mar-2013 |
Benjamin Kramer <benny.kra@googlemail.com> |
ArrayRefize some code. No functionality change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176648 91177308-0d34-0410-b5e6-96231b3b80d8
parcISelLowering.cpp
|
| 700ed80d3da5e98e05ceb90e9bfb66058581a6db |
21-Feb-2013 |
Eli Bendersky <eliben@google.com> |
Move the eliminateCallFramePseudoInstr method from TargetRegisterInfo
to TargetFrameLowering, where it belongs. Incidentally, this allows us
to delete some duplicated (and slightly different!) code in TRI.
There are potentially other layering problems that can be cleaned up
as a result, or in a similar manner.
The refactoring was OK'd by Anton Korobeynikov on llvmdev.
Note: this touches the target interfaces, so out-of-tree targets may
be affected.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175788 91177308-0d34-0410-b5e6-96231b3b80d8
parcFrameLowering.cpp
parcFrameLowering.h
parcRegisterInfo.cpp
parcRegisterInfo.h
|
| 067e5a2a1a3ed35bce7dc9e9b2eedee501db53c9 |
05-Feb-2013 |
Jakob Stoklund Olesen <stoklund@2pi.dk> |
Move MRI liveouts to Sparc return instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174413 91177308-0d34-0410-b5e6-96231b3b80d8
parcISelLowering.cpp
parcInstrInfo.td
|
| 108fb3202af6f500073cdbb7be32c25d7a273a2e |
31-Jan-2013 |
Chad Rosier <mcrosier@apple.com> |
[PEI] Pass the frame index operand number to the eliminateFrameIndex function.
Each target implementation was needlessly recomputing the index.
Part of rdar://13076458
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174083 91177308-0d34-0410-b5e6-96231b3b80d8
parcRegisterInfo.cpp
parcRegisterInfo.h
|
| 8688a58c53b46d2dda9bf50dafd5195790a7ed58 |
29-Jan-2013 |
Evan Cheng <evan.cheng@apple.com> |
Teach SDISel to combine fsin / fcos into a fsincos node if the following
conditions are met:
1. They share the same operand and are in the same BB.
2. Both outputs are used.
3. The target has a native instruction that maps to ISD::FSINCOS node or
the target provides a sincos library call.
Implemented the generic optimization in sdisel and enabled it for
Mac OSX. Also added an additional optimization for x86_64 Mac OSX by
using an alternative entry point __sincos_stret which returns the two
results in xmm0 / xmm1.
rdar://13087969
PR13204
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@173755 91177308-0d34-0410-b5e6-96231b3b80d8
parcISelLowering.cpp
|
| e752feee5228bfa33acee35ef9c606ce12f0f173 |
23-Jan-2013 |
Eli Bendersky <eliben@google.com> |
Clean up assignment of CalleeSaveStackSlotSize: get rid of the default and explicitly set this in every target that needs to change it from the default.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@173270 91177308-0d34-0410-b5e6-96231b3b80d8
CTargetDesc/SparcMCAsmInfo.cpp
|
| aeef83c6afa1e18d1cf9d359cc678ca0ad556175 |
07-Jan-2013 |
Chandler Carruth <chandlerc@gmail.com> |
Switch TargetTransformInfo from an immutable analysis pass that requires
a TargetMachine to construct (and thus isn't always available), to an
analysis group that supports layered implementations much like
AliasAnalysis does. This is a pretty massive change, with a few parts
that I was unable to easily separate (sorry), so I'll walk through it.
The first step of this conversion was to make TargetTransformInfo an
analysis group, and to sink the nonce implementations in
ScalarTargetTransformInfo and VectorTargetTranformInfo into
a NoTargetTransformInfo pass. This allows other passes to add a hard
requirement on TTI, and assume they will always get at least on
implementation.
The TargetTransformInfo analysis group leverages the delegation chaining
trick that AliasAnalysis uses, where the base class for the analysis
group delegates to the previous analysis *pass*, allowing all but tho
NoFoo analysis passes to only implement the parts of the interfaces they
support. It also introduces a new trick where each pass in the group
retains a pointer to the top-most pass that has been initialized. This
allows passes to implement one API in terms of another API and benefit
when some other pass above them in the stack has more precise results
for the second API.
The second step of this conversion is to create a pass that implements
the TargetTransformInfo analysis using the target-independent
abstractions in the code generator. This replaces the
ScalarTargetTransformImpl and VectorTargetTransformImpl classes in
lib/Target with a single pass in lib/CodeGen called
BasicTargetTransformInfo. This class actually provides most of the TTI
functionality, basing it upon the TargetLowering abstraction and other
information in the target independent code generator.
The third step of the conversion adds support to all TargetMachines to
register custom analysis passes. This allows building those passes with
access to TargetLowering or other target-specific classes, and it also
allows each target to customize the set of analysis passes desired in
the pass manager. The baseline LLVMTargetMachine implements this
interface to add the BasicTTI pass to the pass manager, and all of the
tools that want to support target-aware TTI passes call this routine on
whatever target machine they end up with to add the appropriate passes.
The fourth step of the conversion created target-specific TTI analysis
passes for the X86 and ARM backends. These passes contain the custom
logic that was previously in their extensions of the
ScalarTargetTransformInfo and VectorTargetTransformInfo interfaces.
I separated them into their own file, as now all of the interface bits
are private and they just expose a function to create the pass itself.
Then I extended these target machines to set up a custom set of analysis
passes, first adding BasicTTI as a fallback, and then adding their
customized TTI implementations.
The fourth step required logic that was shared between the target
independent layer and the specific targets to move to a different
interface, as they no longer derive from each other. As a consequence,
a helper functions were added to TargetLowering representing the common
logic needed both in the target implementation and the codegen
implementation of the TTI pass. While technically this is the only
change that could have been committed separately, it would have been
a nightmare to extract.
The final step of the conversion was just to delete all the old
boilerplate. This got rid of the ScalarTargetTransformInfo and
VectorTargetTransformInfo classes, all of the support in all of the
targets for producing instances of them, and all of the support in the
tools for manually constructing a pass based around them.
Now that TTI is a relatively normal analysis group, two things become
straightforward. First, we can sink it into lib/Analysis which is a more
natural layer for it to live. Second, clients of this interface can
depend on it *always* being available which will simplify their code and
behavior. These (and other) simplifications will follow in subsequent
commits, this one is clearly big enough.
Finally, I'm very aware that much of the comments and documentation
needs to be updated. As soon as I had this working, and plausibly well
commented, I wanted to get it committed and in front of the build bots.
I'll be doing a few passes over documentation later if it sticks.
Commits to update DragonEgg and Clang will be made presently.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171681 91177308-0d34-0410-b5e6-96231b3b80d8
parcTargetMachine.cpp
parcTargetMachine.h
|
| 0b8c9a80f20772c3793201ab5b251d3520b9cea3 |
02-Jan-2013 |
Chandler Carruth <chandlerc@gmail.com> |
Move all of the header files which are involved in modelling the LLVM IR
into their new header subdirectory: include/llvm/IR. This matches the
directory structure of lib, and begins to correct a long standing point
of file layout clutter in LLVM.
There are still more header files to move here, but I wanted to handle
them in separate commits to make tracking what files make sense at each
layer easier.
The only really questionable files here are the target intrinsic
tablegen files. But that's a battle I'd rather not fight today.
I've updated both CMake and Makefile build systems (I think, and my
tests think, but I may have missed something).
I've also re-sorted the includes throughout the project. I'll be
committing updates to Clang, DragonEgg, and Polly momentarily.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171366 91177308-0d34-0410-b5e6-96231b3b80d8
parcFrameLowering.cpp
parcISelDAGToDAG.cpp
parcISelLowering.cpp
parcRegisterInfo.cpp
parcTargetMachine.h
argetInfo/SparcTargetInfo.cpp
|
| a1514e24cc24b050f53a12650e047799358833a1 |
04-Dec-2012 |
Chandler Carruth <chandlerc@gmail.com> |
Sort includes for all of the .h files under the 'lib' tree. These were
missed in the first pass because the script didn't yet handle include
guards.
Note that the script is now able to handle all of these headers without
manual edits. =]
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169224 91177308-0d34-0410-b5e6-96231b3b80d8
parcTargetMachine.h
|
| d04a8d4b33ff316ca4cf961e06c9e312eff8e64f |
03-Dec-2012 |
Chandler Carruth <chandlerc@gmail.com> |
Use the new script to sort the includes of every file under lib.
Sooooo many of these had incorrect or strange main module includes.
I have manually inspected all of these, and fixed the main module
include to be the nearest plausible thing I could find. If you own or
care about any of these source files, I encourage you to take some time
and check that these edits were sensible. I can't have broken anything
(I strictly added headers, and reordered them, never removed), but they
may not be the headers you'd really like to identify as containing the
API being implemented.
Many forward declarations and missing includes were added to a header
files to allow them to parse cleanly when included first. The main
module rule does in fact have its merits. =]
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169131 91177308-0d34-0410-b5e6-96231b3b80d8
elaySlotFiller.cpp
PMover.cpp
parcAsmPrinter.cpp
parcFrameLowering.cpp
parcISelDAGToDAG.cpp
parcISelLowering.cpp
parcInstrInfo.cpp
parcRegisterInfo.cpp
parcTargetMachine.cpp
|
| 270483466124fe1e19d5439e958fef63cebd43cd |
24-Oct-2012 |
Nadav Rotem <nrotem@apple.com> |
Implement a basic VectorTargetTransformInfo interface to be used by the loop and bb vectorizers for modeling the cost of instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166593 91177308-0d34-0410-b5e6-96231b3b80d8
parcTargetMachine.cpp
|
| cbd9a19b5d6ff93efa82c467508ede78b8af3bac |
19-Oct-2012 |
Nadav Rotem <nrotem@apple.com> |
Reapply the TargerTransformInfo changes, minus the changes to LSR and Lowerinvoke.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166248 91177308-0d34-0410-b5e6-96231b3b80d8
parcTargetMachine.cpp
parcTargetMachine.h
|
| 3b9a911efcf280950f878a050728450423875639 |
18-Oct-2012 |
Bob Wilson <bob.wilson@apple.com> |
Temporarily revert the TargetTransform changes.
The TargetTransform changes are breaking LTO bootstraps of clang. I am
working with Nadav to figure out the problem, but I am reverting it for now
to get our buildbots working.
This reverts svn commits: 165665 165669 165670 165786 165787 165997
and I have also reverted clang svn 165741
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166168 91177308-0d34-0410-b5e6-96231b3b80d8
parcTargetMachine.cpp
parcTargetMachine.h
|
| e3d0e86919730784faaddcb5d9b0257c39b0804b |
11-Oct-2012 |
Nadav Rotem <nrotem@apple.com> |
Add a new interface to allow IR-level passes to access codegen-specific information.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165665 91177308-0d34-0410-b5e6-96231b3b80d8
parcTargetMachine.cpp
parcTargetMachine.h
|
| 3574eca1b02600bac4e625297f4ecf745f4c4f32 |
08-Oct-2012 |
Micah Villmow <villmow@gmail.com> |
Move TargetData to DataLayout.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165402 91177308-0d34-0410-b5e6-96231b3b80d8
parcFrameLowering.cpp
parcISelLowering.cpp
parcTargetMachine.cpp
parcTargetMachine.h
|
| 02c63803e5ca3132478a984eae54ad2e3919cb4b |
24-Aug-2012 |
Jakob Stoklund Olesen <stoklund@2pi.dk> |
Add missing SDNP properties on the flushw node.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162515 91177308-0d34-0410-b5e6-96231b3b80d8
parcInstrInfo.td
|
| e76c903bd2233159910ee6ed236390955714e07d |
06-Aug-2012 |
Roman Divacky <rdivacky@freebsd.org> |
Remove empty overrides of processFunctionBeforeFrameFinalized().
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161328 91177308-0d34-0410-b5e6-96231b3b80d8
parcRegisterInfo.cpp
|
| 56cb2298663017eb77aa4f4dda8db7ecd1b58173 |
19-Jul-2012 |
Bill Wendling <isanbard@gmail.com> |
Remove tabs.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160477 91177308-0d34-0410-b5e6-96231b3b80d8
parcISelLowering.cpp
|
| 564fbf6aff8fb95646a1290078a37c2d4dbe629f |
02-Jul-2012 |
Bob Wilson <bob.wilson@apple.com> |
Add all codegen passes to the PassManager via TargetPassConfig.
This is a preliminary step toward having TargetPassConfig be able to
start and stop the compilation at specified passes for unit testing
and debugging. No functionality change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159567 91177308-0d34-0410-b5e6-96231b3b80d8
parcTargetMachine.cpp
|
| 0518fca843ff87d069ecb07fc00d306c1f587d58 |
26-Jun-2012 |
Jack Carter <jcarter@mips.com> |
There are a number of generic inline asm operand modifiers that
up to r158925 were handled as processor specific. Making them
generic and putting tests for these modifiers in the CodeGen/Generic
directory caused a number of targets to fail.
This commit addresses that problem by having the targets call
the generic routine for generic modifiers that they don't currently
have explicit code for.
For now only generic print operands 'c' and 'n' are supported.vi
Affected files:
test/CodeGen/Generic/asm-large-immediate.ll
lib/Target/PowerPC/PPCAsmPrinter.cpp
lib/Target/NVPTX/NVPTXAsmPrinter.cpp
lib/Target/ARM/ARMAsmPrinter.cpp
lib/Target/XCore/XCoreAsmPrinter.cpp
lib/Target/X86/X86AsmPrinter.cpp
lib/Target/Hexagon/HexagonAsmPrinter.cpp
lib/Target/CellSPU/SPUAsmPrinter.cpp
lib/Target/Sparc/SparcAsmPrinter.cpp
lib/Target/MBlaze/MBlazeAsmPrinter.cpp
lib/Target/Mips/MipsAsmPrinter.cpp
MSP430 isn't represented because it did not even run with
the long existing 'c' modifier and it was not apparent what
needs to be done to get it inline asm ready.
Contributer: Jack Carter
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159203 91177308-0d34-0410-b5e6-96231b3b80d8
parcAsmPrinter.cpp
|
| d5c407d2d01ff8797c29343e4da5f765fe52fb5f |
24-Jun-2012 |
NAKAMURA Takumi <geek4civic@gmail.com> |
llvm/lib: [CMake] Add explicit dependency to intrinsics_gen.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159112 91177308-0d34-0410-b5e6-96231b3b80d8
MakeLists.txt
|
| 95a9d937728ca9cf2bf44f86ff1184df318b3bd7 |
06-Jun-2012 |
Benjamin Kramer <benny.kra@googlemail.com> |
Round 2 of dead private variable removal.
LLVM is now -Wunused-private-field clean except for
- lib/MC/MCDisassembler/Disassembler.h. Not sure why it keeps all those unaccessible fields.
- gtest.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@158096 91177308-0d34-0410-b5e6-96231b3b80d8
parcFrameLowering.h
|
| f152fe8d487c46873bbdd4abab43200f783e978b |
01-Jun-2012 |
Jakob Stoklund Olesen <stoklund@2pi.dk> |
Switch some getAliasSet clients to MCRegAliasIterator.
MCRegAliasIterator can optionally visit the register itself, allowing
for simpler code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157837 91177308-0d34-0410-b5e6-96231b3b80d8
elaySlotFiller.cpp
|
| d2ea0e10cbd158c93fb870cdd03001b9cd1156b8 |
25-May-2012 |
Justin Holewinski <jholewinski@nvidia.com> |
Change interface for TargetLowering::LowerCallTo and TargetLowering::LowerCall
to pass around a struct instead of a large set of individual values. This
cleans up the interface and allows more information to be added to the struct
for future targets without requiring changes to each and every target.
NV_CONTRIB
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157479 91177308-0d34-0410-b5e6-96231b3b80d8
parcISelLowering.cpp
parcISelLowering.h
|
| ed277f3eeb830e7cb2c9313b4fb8e751f16a0621 |
04-May-2012 |
Jakob Stoklund Olesen <stoklund@2pi.dk> |
Initialize SparcInstrInfo before SparcTargetLowering.
The TargetLowering construction needs to use a valid TargetRegisterInfo
instance.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156146 91177308-0d34-0410-b5e6-96231b3b80d8
parcTargetMachine.cpp
parcTargetMachine.h
|
| 7c4ce30ea6a9d0410f306e805403dd224c3df65c |
01-May-2012 |
Bill Wendling <isanbard@gmail.com> |
Change the PassManager from a reference to a pointer.
The TargetPassManager's default constructor wants to initialize the PassManager
to 'null'. But it's illegal to bind a null reference to a null l-value. Make the
ivar a pointer instead.
PR12468
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155902 91177308-0d34-0410-b5e6-96231b3b80d8
parcTargetMachine.cpp
|
| c909950c384e8234a7b3c5a76b7f79e3f7012ceb |
20-Apr-2012 |
Craig Topper <craig.topper@gmail.com> |
Convert some uses of XXXRegisterClass to &XXXRegClass. No functional change since they are equivalent.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155186 91177308-0d34-0410-b5e6-96231b3b80d8
parcISelLowering.cpp
parcInstrInfo.cpp
|
| 26c8dcc692fb2addd475446cfff24d6a4e958bca |
04-Apr-2012 |
Rafael Espindola <rafael.espindola@gmail.com> |
Always compute all the bits in ComputeMaskedBits.
This allows us to keep passing reduced masks to SimplifyDemandedBits, but
know about all the bits if SimplifyDemandedBits fails. This allows instcombine
to simplify cases like the one in the included testcase.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154011 91177308-0d34-0410-b5e6-96231b3b80d8
parcISelLowering.cpp
parcISelLowering.h
|
| 4e02f23de24375294005f88b5254a3775d39fcb2 |
27-Mar-2012 |
Craig Topper <craig.topper@gmail.com> |
Prune some includes
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@153502 91177308-0d34-0410-b5e6-96231b3b80d8
CTargetDesc/SparcMCAsmInfo.h
|
| 63bd926a41f476399cb62948484511261842489f |
22-Mar-2012 |
Craig Topper <craig.topper@gmail.com> |
Remove some unnecessary forward declarations.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@153245 91177308-0d34-0410-b5e6-96231b3b80d8
CTargetDesc/SparcMCTargetDesc.h
|
| 79aa3417eb6f58d668aadfedf075240a41d35a26 |
17-Mar-2012 |
Craig Topper <craig.topper@gmail.com> |
Reorder includes in Target backends to following coding standards. Remove some superfluous forward declarations.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@152997 91177308-0d34-0410-b5e6-96231b3b80d8
parcISelLowering.h
parcInstrInfo.h
parcRegisterInfo.cpp
parcTargetMachine.cpp
|
| c5eaae4e9bc75b203b3a9922b480729bc4f340e2 |
11-Mar-2012 |
Craig Topper <craig.topper@gmail.com> |
Convert more static tables of registers used by calling convention to uint16_t to reduce space.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@152538 91177308-0d34-0410-b5e6-96231b3b80d8
parcISelLowering.cpp
|
| b78ca423844f19f4a838abb49b4b4fa7ae499707 |
11-Mar-2012 |
Craig Topper <craig.topper@gmail.com> |
Use uint16_t to store registers and opcode in static tables in the target specific backends.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@152537 91177308-0d34-0410-b5e6-96231b3b80d8
PMover.cpp
|
| e4fd907e72a599eddfa7a81eac4366b5b82523e3 |
04-Mar-2012 |
Craig Topper <craig.topper@gmail.com> |
Use uint16_t to store register overlaps to reduce static data.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@152001 91177308-0d34-0410-b5e6-96231b3b80d8
elaySlotFiller.cpp
|
| 015f228861ef9b337366f92f637d4e8d624bb006 |
04-Mar-2012 |
Craig Topper <craig.topper@gmail.com> |
Use uint16_t to store registers in callee saved register tables to reduce size of static data.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@151996 91177308-0d34-0410-b5e6-96231b3b80d8
parcRegisterInfo.cpp
parcRegisterInfo.h
|
| 4bfcd4acbc7d12aa55f8de9af84a38422f0f6d83 |
28-Feb-2012 |
Evan Cheng <evan.cheng@apple.com> |
Re-commit r151623 with fix. Only issue special no-return calls if it's a direct call.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@151645 91177308-0d34-0410-b5e6-96231b3b80d8
parcISelLowering.cpp
parcISelLowering.h
|
| 20bd5296cec8d8d597ab9db2aca7346a88e580c8 |
28-Feb-2012 |
Daniel Dunbar <daniel@zuster.org> |
Revert r151623 "Some ARM implementaions, e.g. A-series, does return stack prediction. ...", it is breaking the Clang build during the Compiler-RT part.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@151630 91177308-0d34-0410-b5e6-96231b3b80d8
parcISelLowering.cpp
parcISelLowering.h
|
| ec52aaa12f57896fc806e849fa21a61603050ac4 |
28-Feb-2012 |
Evan Cheng <evan.cheng@apple.com> |
Some ARM implementaions, e.g. A-series, does return stack prediction. That is,
the processor keeps a return addresses stack (RAS) which stores the address
and the instruction execution state of the instruction after a function-call
type branch instruction.
Calling a "noreturn" function with normal call instructions (e.g. bl) can
corrupt RAS and causes 100% return misprediction so LLVM should use a
unconditional branch instead. i.e.
mov lr, pc
b _foo
The "mov lr, pc" is issued in order to get proper backtrace.
rdar://8979299
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@151623 91177308-0d34-0410-b5e6-96231b3b80d8
parcISelLowering.cpp
parcISelLowering.h
|
| b0934ab7d811e23bf530371976b8b35f3242169c |
19-Feb-2012 |
Ahmed Charles <ace2001ac@gmail.com> |
Remove dead code. Improve llvm_unreachable text. Simplify some control flow.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150918 91177308-0d34-0410-b5e6-96231b3b80d8
parcISelDAGToDAG.cpp
|
| 31d157ae1ac2cd9c787dc3c1d28e64c682803844 |
18-Feb-2012 |
Jia Liu <proljc@gmail.com> |
Emacs-tag and some comment fix for all ARM, CellSPU, Hexagon, MBlaze, MSP430, PPC, PTX, Sparc, X86, XCore.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150878 91177308-0d34-0410-b5e6-96231b3b80d8
CTargetDesc/SparcMCAsmInfo.h
CTargetDesc/SparcMCTargetDesc.cpp
parc.td
parcCallingConv.td
parcFrameLowering.cpp
parcFrameLowering.h
parcInstrFormats.td
parcInstrInfo.cpp
parcInstrInfo.h
parcInstrInfo.td
parcMachineFunctionInfo.cpp
parcRegisterInfo.cpp
parcRegisterInfo.h
parcRegisterInfo.td
parcSubtarget.cpp
parcSubtarget.h
|
| bc2198133a1836598b54b943420748e75d5dea94 |
07-Feb-2012 |
Craig Topper <craig.topper@gmail.com> |
Convert assert(0) to llvm_unreachable
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@149961 91177308-0d34-0410-b5e6-96231b3b80d8
parcAsmPrinter.cpp
|
| 655b8de7b2ab773a977e0c524307e71354d8af29 |
05-Feb-2012 |
Craig Topper <craig.topper@gmail.com> |
Convert assert(0) to llvm_unreachable
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@149814 91177308-0d34-0410-b5e6-96231b3b80d8
CTargetDesc/SparcMCTargetDesc.cpp
|
| 061efcfb3e79899493d857f49e50d09f29037e0a |
04-Feb-2012 |
Andrew Trick <atrick@apple.com> |
TargetPassConfig: confine the MC configuration to TargetMachine.
Passes prior to instructon selection are now split into separate configurable stages.
Header dependencies are simplified.
The bulk of this diff is simply removal of the silly DisableVerify flags.
Sorry for the target header churn. Attempting to stabilize them.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@149754 91177308-0d34-0410-b5e6-96231b3b80d8
parcTargetMachine.cpp
parcTargetMachine.h
|
| 843ee2e6a46b2b2d74a84c2eea68dec35cb359cc |
03-Feb-2012 |
Andrew Trick <atrick@apple.com> |
Added TargetPassConfig. The first little step toward configuring codegen passes.
Allows command line overrides to be centralized in LLVMTargetMachine.cpp.
LLVMTargetMachine can intercept common passes and give precedence to command line overrides.
Allows adding "internal" target configuration options without touching TargetOptions.
Encapsulates the PassManager.
Provides a good point to initialize all CodeGen passes so that Pass ID's can be used in APIs.
Allows modifying the target configuration hooks without rebuilding the world.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@149672 91177308-0d34-0410-b5e6-96231b3b80d8
parcTargetMachine.cpp
parcTargetMachine.h
|
| 4d6ccb5f68cd7c6418a209f1fa4dbade569e4493 |
20-Jan-2012 |
David Blaikie <dblaikie@gmail.com> |
More dead code removal (using -Wunreachable-code)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148578 91177308-0d34-0410-b5e6-96231b3b80d8
parcRegisterInfo.cpp
|
| 31867660cb81ea2b1d1a6ffa7d09c91acb754a8b |
18-Jan-2012 |
Jakob Stoklund Olesen <stoklund@2pi.dk> |
Add a CoveredBySubRegs property to Register descriptions.
When set, this bit indicates that a register is completely defined by
the value of its sub-registers.
Use the CoveredBySubRegs property to infer which super-registers are
call-preserved given a list of callee-saved registers. For example, the
ARM registers D8-D15 are callee-saved. This now automatically implies
that Q4-Q7 are call-preserved.
Conversely, Win64 callees save XMM6-XMM15, but the corresponding
YMM6-YMM15 registers are not call-preserved because they are not fully
defined by their sub-registers.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148363 91177308-0d34-0410-b5e6-96231b3b80d8
parcRegisterInfo.td
|
| e4ad58272970ecd850d233862f40a72d15649639 |
10-Jan-2012 |
Benjamin Kramer <benny.kra@googlemail.com> |
Fix some leftover control reaches end of non-void function warnings.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147874 91177308-0d34-0410-b5e6-96231b3b80d8
parc.h
parcInstrInfo.cpp
|
| 2bd335470f8939782f3df7f6180282d3825d4f09 |
10-Jan-2012 |
David Blaikie <dblaikie@gmail.com> |
Remove unnecessary default cases in switches that cover all enum values.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147855 91177308-0d34-0410-b5e6-96231b3b80d8
parc.h
parcInstrInfo.cpp
|
| f321e1075eabae96f62b1f2570d9dee5d10b8200 |
07-Jan-2012 |
Benjamin Kramer <benny.kra@googlemail.com> |
Remove VectorExtras. This unused helper was written for a type of API that is discouraged now.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147738 91177308-0d34-0410-b5e6-96231b3b80d8
parcISelLowering.cpp
|
| 55caf9c60a6593b232db80eb961cbffb6e15a724 |
25-Dec-2011 |
Venkatraman Govindaraju <venkatra@cs.wisc.edu> |
Sparc: Implement emitFrameIndexDebugValue and getDebugValue Location hooks.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147269 91177308-0d34-0410-b5e6-96231b3b80d8
parcAsmPrinter.cpp
parcInstrInfo.cpp
parcInstrInfo.h
|
| cfb75fba735edd44841eb21c72c3a9736a7d9af2 |
20-Dec-2011 |
Chandler Carruth <chandlerc@gmail.com> |
Fix up the CMake build for the new files added in r146960, they're
likely to stay either way that discussion ends up resolving itself.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146966 91177308-0d34-0410-b5e6-96231b3b80d8
MakeLists.txt
|
| 2d24e2a396a1d211baaeedf32148a3b657240170 |
20-Dec-2011 |
David Blaikie <dblaikie@gmail.com> |
Unweaken vtables as per http://llvm.org/docs/CodingStandards.html#ll_virtual_anch
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146960 91177308-0d34-0410-b5e6-96231b3b80d8
CTargetDesc/SparcMCAsmInfo.cpp
CTargetDesc/SparcMCAsmInfo.h
parcMachineFunctionInfo.cpp
parcMachineFunctionInfo.h
parcSubtarget.cpp
parcSubtarget.h
parcTargetMachine.cpp
parcTargetMachine.h
|
| 63974b2144c87c962effdc0508c27643c8ad98b6 |
13-Dec-2011 |
Chandler Carruth <chandlerc@gmail.com> |
Initial CodeGen support for CTTZ/CTLZ where a zero input produces an
undefined result. This adds new ISD nodes for the new semantics,
selecting them when the LLVM intrinsic indicates that the undef behavior
is desired. The new nodes expand trivially to the old nodes, so targets
don't actually need to do anything to support these new nodes besides
indicating that they should be expanded. I've done this for all the
operand types that I could figure out for all the targets. Owners of
various targets, please review and let me know if any of these are
incorrect.
Note that the expand behavior is *conservatively correct*, and exactly
matches LLVM's current behavior with these operations. Ideally this
patch will not change behavior in any way. For example the regtest suite
finds the exact same instruction sequences coming out of the code
generator. That's why there are no new tests here -- all of this is
being exercised by the existing test suite.
Thanks to Duncan Sands for reviewing the various bits of this patch and
helping me get the wrinkles ironed out with expanding for each target.
Also thanks to Chris for clarifying through all the discussions that
this is indeed the approach he was looking for. That said, there are
likely still rough spots. Further review much appreciated.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146466 91177308-0d34-0410-b5e6-96231b3b80d8
parcISelLowering.cpp
|
| b0c594fd422417e1e290da166b566c7bee74644b |
12-Dec-2011 |
Daniel Dunbar <daniel@zuster.org> |
LLVMBuild: Introduce a common section which currently has a list of the
subdirectories to traverse into.
- Originally I wanted to avoid this and just autoscan, but this has one key
flaw in that new subdirectories can not automatically trigger a rerun of the
llvm-build tool. This is particularly a pain when switching back and forth
between trees where one has added a subdirectory, as the dependencies will
tend to be wrong. This will also eliminates FIXME implicitly.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146436 91177308-0d34-0410-b5e6-96231b3b80d8
LVMBuild.txt
|
| 4ab406d7fc06b1272d02cd8be46f0c5ebe51a3da |
12-Dec-2011 |
Daniel Dunbar <daniel@zuster.org> |
LLVMBuild: Remove trailing newline, which irked me.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146409 91177308-0d34-0410-b5e6-96231b3b80d8
LVMBuild.txt
CTargetDesc/LLVMBuild.txt
argetInfo/LLVMBuild.txt
|
| 5a96b3dad2f634c9081c8b2b6c2575441dc5a2bd |
07-Dec-2011 |
Evan Cheng <evan.cheng@apple.com> |
Add bundle aware API for querying instruction properties and switch the code
generator to it. For non-bundle instructions, these behave exactly the same
as the MC layer API.
For properties like mayLoad / mayStore, look into the bundle and if any of the
bundled instructions has the property it would return true.
For properties like isPredicable, only return true if *all* of the bundled
instructions have the property.
For properties like canFoldAsLoad, isCompare, conservatively return false for
bundles.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146026 91177308-0d34-0410-b5e6-96231b3b80d8
elaySlotFiller.cpp
parcAsmPrinter.cpp
parcInstrInfo.cpp
|
| 80b1ae92922202c197078038c4229045cb1e295f |
03-Dec-2011 |
Venkatraman Govindaraju <venkatra@cs.wisc.edu> |
Sparc CodeGen: Fix AnalyzeBranch for PR 10282. Removing addSuccessor() since
AnalyzeBranch doesn't change the successor, just the order.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145779 91177308-0d34-0410-b5e6-96231b3b80d8
parcInstrInfo.cpp
|
| 8a8d479214745c82ef00f08d4e4f1c173b5f9ce2 |
02-Dec-2011 |
Nick Lewycky <nicholas@mxc.ca> |
Move global variables in TargetMachine into new TargetOptions class. As an API
change, now you need a TargetOptions object to create a TargetMachine. Clang
patch to follow.
One small functionality change in PTX. PTX had commented out the machine
verifier parts in their copy of printAndVerify. That now calls the version in
LLVMTargetMachine. Users of PTX who need verification disabled should rely on
not passing the command-line flag to enable it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145714 91177308-0d34-0410-b5e6-96231b3b80d8
parcTargetMachine.cpp
parcTargetMachine.h
|
| d782bae970e888572f0458ac05369bbd7752f05a |
29-Nov-2011 |
Daniel Dunbar <daniel@zuster.org> |
build/CMake: Finish removal of add_llvm_library_dependencies.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145420 91177308-0d34-0410-b5e6-96231b3b80d8
MakeLists.txt
CTargetDesc/CMakeLists.txt
argetInfo/CMakeLists.txt
|
| b95fc31aa2e5a0a0b9ee1909d1cb949577c5aa16 |
16-Nov-2011 |
Evan Cheng <evan.cheng@apple.com> |
Sink codegen optimization level into MCCodeGenInfo along side relocation model
and code model. This eliminates the need to pass OptLevel flag all over the
place and makes it possible for any codegen pass to use this information.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144788 91177308-0d34-0410-b5e6-96231b3b80d8
CTargetDesc/SparcMCTargetDesc.cpp
parcTargetMachine.cpp
parcTargetMachine.h
|
| b8ebca83f4dff04ba21cc97673003f0bd35a2e49 |
12-Nov-2011 |
Daniel Dunbar <daniel@zuster.org> |
build: Attempt to rectify inconsistencies between CMake and LLVMBuild versions of explicit dependencies.
- The hope is that we have a tool/test to verify these are accurate (and tight) soon.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144444 91177308-0d34-0410-b5e6-96231b3b80d8
argetInfo/LLVMBuild.txt
|
| 5ed5506f18fcc0a277c863f7a21b39f58e892ca5 |
11-Nov-2011 |
Daniel Dunbar <daniel@zuster.org> |
LLVMBuild: Add explicit information on whether targets define an assembly printer, assembly parser, or disassembler.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144344 91177308-0d34-0410-b5e6-96231b3b80d8
LVMBuild.txt
|
| affc6cf9d2b2b74532ce82027ac4524d1e29a658 |
10-Nov-2011 |
Daniel Dunbar <daniel@zuster.org> |
llvm-build: Add --native-target and --enable-targets options, and add logic to
handle defining the "magic" target related components (like native,
nativecodegen, and engine).
- We still require these components to be in the project (currently in
lib/Target) so that we have a place to document them and hopefully make it
more obvious that they are "magic".
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144253 91177308-0d34-0410-b5e6-96231b3b80d8
LVMBuild.txt
|
| c352caf168094c83f05a8010ca14c2e643dbf618 |
10-Nov-2011 |
Daniel Dunbar <daniel@zuster.org> |
llvm-build: Add an explicit component type to represent targets.
- Gives us a place to hang target specific metadata (like whether the target has a JIT).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144250 91177308-0d34-0410-b5e6-96231b3b80d8
LVMBuild.txt
|
| d752e0f7e64585839cb3a458ef52456eaebbea3c |
08-Nov-2011 |
Pete Cooper <peter_cooper@apple.com> |
Added invariant field to the DAG.getLoad method and changed all calls.
When this field is true it means that the load is from constant (runt-time or compile-time) and so can be hoisted from loops or moved around other memory accesses
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144100 91177308-0d34-0410-b5e6-96231b3b80d8
parcISelLowering.cpp
|
| 590853667345d6fb191764b9d0bd2ff13589e3a3 |
06-Nov-2011 |
Benjamin Kramer <benny.kra@googlemail.com> |
Replace (Lower|Upper)caseString in favor of StringRef's newest methods.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@143891 91177308-0d34-0410-b5e6-96231b3b80d8
parcAsmPrinter.cpp
|
| b0d9ce567f5aee3af94c290d7cd52b1582c27b4f |
04-Nov-2011 |
Daniel Dunbar <daniel@zuster.org> |
build/cmake: Use tblgen macro directly instead of llvm_tablegen, which just
added a layer of indirection with no value (not even conciseness).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@143727 91177308-0d34-0410-b5e6-96231b3b80d8
MakeLists.txt
|
| a3a2dfd4a2a8265a9a0c962cb776e2e6ba123956 |
03-Nov-2011 |
Daniel Dunbar <daniel@zuster.org> |
build: Add initial cut at LLVMBuild.txt files.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@143634 91177308-0d34-0410-b5e6-96231b3b80d8
LVMBuild.txt
CTargetDesc/LLVMBuild.txt
argetInfo/LLVMBuild.txt
|
| de8f33c199f3bf2049b0b732169f2bd8717469c6 |
06-Oct-2011 |
Peter Collingbourne <peter@pcc.me.uk> |
Build system infrastructure for multiple tblgens.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141266 91177308-0d34-0410-b5e6-96231b3b80d8
MakeLists.txt
|
| 3e74d6fdd248e20a280f1dff3da9a6c689c2c4c3 |
24-Aug-2011 |
Evan Cheng <evan.cheng@apple.com> |
Move TargetRegistry and TargetSelect from Target to Support where they belong.
These are strictly utilities for registering targets and components.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138450 91177308-0d34-0410-b5e6-96231b3b80d8
CTargetDesc/SparcMCTargetDesc.cpp
parcAsmPrinter.cpp
parcInstrInfo.cpp
parcSubtarget.cpp
parcTargetMachine.cpp
argetInfo/SparcTargetInfo.cpp
|
| 7801136b95d1fbe515b9655b73ada39b05a33559 |
23-Aug-2011 |
Evan Cheng <evan.cheng@apple.com> |
Some refactoring so TargetRegistry.h no longer has to include any files
from MC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138367 91177308-0d34-0410-b5e6-96231b3b80d8
CTargetDesc/SparcMCTargetDesc.cpp
|
| 81fd0ba8ab153b8344527a461545dbd87642ed83 |
01-Aug-2011 |
Chandler Carruth <chandlerc@gmail.com> |
Actually finish switching to the new system for Target sublibrary
TableGen deps introduced in r136023. This completes the fixing that
dgregor started in r136621. Sorry for missing these the first time
around.
This should fix some of the random race-condition failures people are
still seeing with CMake.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136643 91177308-0d34-0410-b5e6-96231b3b80d8
argetInfo/CMakeLists.txt
|
| ac03e736c77bcf7e8deb515fc16a7e55d343dc8d |
29-Jul-2011 |
Chandler Carruth <chandlerc@gmail.com> |
Rewrite the CMake build to use explicit dependencies between libraries,
specified in the same file that the library itself is created. This is
more idiomatic for CMake builds, and also allows us to correctly specify
dependencies that are missed due to bugs in the GenLibDeps perl script,
or change from compiler to compiler. On Linux, this returns CMake to
a place where it can relably rebuild several targets of LLVM.
I have tried not to change the dependencies from the ones in the current
auto-generated file. The only places I've really diverged are in places
where I was seeing link failures, and added a dependency. The goal of
this patch is not to start changing the dependencies, merely to move
them into the correct location, and an explicit form that we can control
and change when necessary.
This also removes a serialization point in the build because we don't
have to scan all the libraries before we begin building various tools.
We no longer have a step of the build that regenerates a file inside the
source tree. A few other associated cleanups fall out of this.
This isn't really finished yet though. After talking to dgregor he urged
switching to a single CMake macro to construct libraries with both
sources and dependencies in the arguments. Migrating from the two macros
to that style will be a follow-up patch.
Also, llvm-config is still generated with GenLibDeps.pl, which means it
still has slightly buggy dependencies. The internal CMake
'llvm-config-like' macro uses the correct explicitly specified
dependencies however. A future patch will switch llvm-config generation
(when using CMake) to be based on these deps as well.
This may well break Windows. I'm getting a machine set up now to dig
into any failures there. If anyone can chime in with problems they see
or ideas of how to solve them for Windows, much appreciated.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136433 91177308-0d34-0410-b5e6-96231b3b80d8
MakeLists.txt
CTargetDesc/CMakeLists.txt
argetInfo/CMakeLists.txt
|
| 14648468011c92a4210f8118721d58c25043daf8 |
28-Jul-2011 |
Eli Friedman <eli.friedman@gmail.com> |
Code generation for 'fence' instruction.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136283 91177308-0d34-0410-b5e6-96231b3b80d8
parcISelLowering.cpp
|
| b35552d440581265a982d7523c33e7466437bfb0 |
26-Jul-2011 |
Chandler Carruth <chandlerc@gmail.com> |
Clean up a pile of hacks in our CMake build relating to TableGen.
The first problem to fix is to stop creating synthetic *Table_gen
targets next to all of the LLVM libraries. These had no real effect as
CMake specifies that add_custom_command(OUTPUT ...) directives (what the
'tablegen(...)' stuff expands to) are implicitly added as dependencies
to all the rules in that CMakeLists.txt.
These synthetic rules started to cause problems as we started more and
more heavily using tablegen files from *subdirectories* of the one where
they were generated. Within those directories, the set of tablegen
outputs was still available and so these synthetic rules added them as
dependencies of those subdirectories. However, they were no longer
properly associated with the custom command to generate them. Most of
the time this "just worked" because something would get to the parent
directory first, and run tablegen there. Once run, the files existed and
the build proceeded happily. However, as more and more subdirectories
have started using this, the probability of this failing to happen has
increased. Recently with the MC refactorings, it became quite common for
me when touching a large enough number of targets.
To add insult to injury, several of the backends *tried* to fix this by
adding explicit dependencies back to the parent directory's tablegen
rules, but those dependencies didn't work as expected -- they weren't
forming a linear chain, they were adding another thread in the race.
This patch removes these synthetic rules completely, and adds a much
simpler function to declare explicitly that a collection of tablegen'ed
files are referenced by other libraries. From that, we can add explicit
dependencies from the smaller libraries (such as every architectures
Desc library) on this and correctly form a linear sequence. All of the
backends are updated to use it, sometimes replacing the existing attempt
at adding a dependency, sometimes adding a previously missing dependency
edge.
Please let me know if this causes any problems, but it fixes a rather
persistent and problematic source of build flakiness on our end.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136023 91177308-0d34-0410-b5e6-96231b3b80d8
MakeLists.txt
CTargetDesc/CMakeLists.txt
|
| 7f8dff65717b1e4090ba4a648f9ec4f037a66c1e |
23-Jul-2011 |
Evan Cheng <evan.cheng@apple.com> |
createXXXMCCodeGenInfo should be static.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135826 91177308-0d34-0410-b5e6-96231b3b80d8
CTargetDesc/SparcMCTargetDesc.cpp
|
| e78085a3c03de648a481e9751c3094c517bd7123 |
22-Jul-2011 |
Evan Cheng <evan.cheng@apple.com> |
Combine all MC initialization routines into one. e.g. InitializeX86MCAsmInfo,
InitializeX86MCInstrInfo, etc. are combined into InitializeX86TargetMC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135812 91177308-0d34-0410-b5e6-96231b3b80d8
CTargetDesc/SparcMCTargetDesc.cpp
|
| 34ad6db8b958fdc0d38e122edf753b5326e69b03 |
20-Jul-2011 |
Evan Cheng <evan.cheng@apple.com> |
- Move CodeModel from a TargetMachine global option to MCCodeGenInfo.
- Introduce JITDefault code model. This tells targets to set different default
code model for JIT. This eliminates the ugly hack in TargetMachine where
code model is changed after construction.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135580 91177308-0d34-0410-b5e6-96231b3b80d8
CTargetDesc/SparcMCTargetDesc.cpp
parcTargetMachine.cpp
parcTargetMachine.h
|
| 439661395fd2a2a832dba01c65bc88718528313c |
19-Jul-2011 |
Evan Cheng <evan.cheng@apple.com> |
Introduce MCCodeGenInfo, which keeps information that can affect codegen
(including compilation, assembly). Move relocation model Reloc::Model from
TargetMachine to MCCodeGenInfo so it's accessible even without TargetMachine.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135468 91177308-0d34-0410-b5e6-96231b3b80d8
CTargetDesc/SparcMCTargetDesc.cpp
parcTargetMachine.cpp
parcTargetMachine.h
|
| 2d28617de2b0b731c08d1af9e830f31e14ac75b4 |
19-Jul-2011 |
Evan Cheng <evan.cheng@apple.com> |
Move getInitialFrameState from TargetFrameInfo to MCAsmInfo (suggestions for
better location welcome).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135438 91177308-0d34-0410-b5e6-96231b3b80d8
parcRegisterInfo.cpp
|
| 0e6a052331f674dd70e28af41f654a7874405eab |
18-Jul-2011 |
Evan Cheng <evan.cheng@apple.com> |
Sink getDwarfRegNum, getLLVMRegNum, getSEHRegNum from TargetRegisterInfo down
to MCRegisterInfo. Also initialize the mapping at construction time.
This patch eliminate TargetRegisterInfo from TargetAsmInfo. It's another step
towards fixing the layering violation.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135424 91177308-0d34-0410-b5e6-96231b3b80d8
CTargetDesc/SparcMCTargetDesc.cpp
parcRegisterInfo.cpp
parcRegisterInfo.h
|
| db125cfaf57cc83e7dd7453de2d509bc8efd0e5e |
18-Jul-2011 |
Chris Lattner <sabre@nondot.org> |
land David Blaikie's patch to de-constify Type, with a few tweaks.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135375 91177308-0d34-0410-b5e6-96231b3b80d8
parcISelLowering.cpp
|
| 1be0e271a07925b928ba89848934f1ea6f1854e2 |
15-Jul-2011 |
Evan Cheng <evan.cheng@apple.com> |
Move some parts of TargetAsmInfo down to MCAsmInfo. This is not the greatest
solution but it is a small step towards removing the horror that is
TargetAsmInfo.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135237 91177308-0d34-0410-b5e6-96231b3b80d8
CTargetDesc/SparcMCAsmInfo.cpp
|
| 1abf2cb59b8d63415780a03329307c0997b2670c |
15-Jul-2011 |
Evan Cheng <evan.cheng@apple.com> |
Rename createAsmInfo to createMCAsmInfo and move registration code to MCTargetDesc to prepare for next round of changes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135219 91177308-0d34-0410-b5e6-96231b3b80d8
MakeLists.txt
CTargetDesc/CMakeLists.txt
CTargetDesc/SparcMCAsmInfo.cpp
CTargetDesc/SparcMCAsmInfo.h
CTargetDesc/SparcMCTargetDesc.cpp
parcMCAsmInfo.cpp
parcMCAsmInfo.h
parcTargetMachine.cpp
|
| c60f9b752381baa6c4b80c0739034660f1748c84 |
14-Jul-2011 |
Evan Cheng <evan.cheng@apple.com> |
Next round of MC refactoring. This patch factor MC table instantiations, MC
registeration and creation code into XXXMCDesc libraries.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135184 91177308-0d34-0410-b5e6-96231b3b80d8
MakeLists.txt
CTargetDesc/CMakeLists.txt
CTargetDesc/Makefile
CTargetDesc/SparcMCTargetDesc.cpp
CTargetDesc/SparcMCTargetDesc.h
akefile
parc.h
parcInstrInfo.cpp
parcRegisterInfo.cpp
parcSubtarget.cpp
|
| 59ee62d2418df8db499eca1ae17f5900dc2dcbba |
11-Jul-2011 |
Evan Cheng <evan.cheng@apple.com> |
- Eliminate MCCodeEmitter's dependency on TargetMachine. It now uses MCInstrInfo
and MCSubtargetInfo.
- Added methods to update subtarget features (used when targets automatically
detect subtarget features or switch modes).
- Teach X86Subtarget to update MCSubtargetInfo features bits since the
MCSubtargetInfo layer can be shared with other modules.
- These fixes .code 16 / .code 32 support since mode switch is updated in
MCSubtargetInfo so MC code emitter can do the right thing.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134884 91177308-0d34-0410-b5e6-96231b3b80d8
parcInstrInfo.cpp
parcSubtarget.cpp
|
| ffc0e73046f737d75e0a62b3a83ef19bcef111e3 |
09-Jul-2011 |
Evan Cheng <evan.cheng@apple.com> |
Change createAsmParser to take a MCSubtargetInfo instead of triple,
CPU, and feature string. Parsing some asm directives can change
subtarget state (e.g. .code 16) and it must be reflected in other
modules (e.g. MCCodeEmitter). That is, the MCSubtargetInfo instance
must be shared.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134795 91177308-0d34-0410-b5e6-96231b3b80d8
parcSubtarget.cpp
|
| 33390848a7eca75301d04a59b89b516d83e19ee0 |
08-Jul-2011 |
Cameron Zwarich <zwarich@apple.com> |
Add an intrinsic and codegen support for fused multiply-accumulate. The intent
is to use this for architectures that have a native FMA instruction.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134742 91177308-0d34-0410-b5e6-96231b3b80d8
parcISelLowering.cpp
|
| ebdeeab812beec0385b445f3d4c41a114e0d972f |
08-Jul-2011 |
Evan Cheng <evan.cheng@apple.com> |
Eliminate asm parser's dependency on TargetMachine:
- Each target asm parser now creates its own MCSubtatgetInfo (if needed).
- Changed AssemblerPredicate to take subtarget features which tablegen uses
to generate asm matcher subtarget feature queries. e.g.
"ModeThumb,FeatureThumb2" is translated to
"(Bits & ModeThumb) != 0 && (Bits & FeatureThumb2) != 0".
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134678 91177308-0d34-0410-b5e6-96231b3b80d8
parcSubtarget.cpp
parcTargetMachine.cpp
|
| 0ddff1b5359433faf2eb1c4ff5320ddcbd42f52f |
07-Jul-2011 |
Evan Cheng <evan.cheng@apple.com> |
Compute feature bits at time of MCSubtargetInfo initialization.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134606 91177308-0d34-0410-b5e6-96231b3b80d8
parcSubtarget.cpp
parcSubtarget.h
|
| 385e930d55f3ecd3c9538823dfa5896a12461845 |
02-Jul-2011 |
Evan Cheng <evan.cheng@apple.com> |
Rename XXXGenSubtarget.inc to XXXGenSubtargetInfo.inc for consistency.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134281 91177308-0d34-0410-b5e6-96231b3b80d8
MakeLists.txt
akefile
parcSubtarget.cpp
parcSubtarget.h
|
| 5b1b4489cf3a0f56f8be0673fc5cc380a32d277b |
01-Jul-2011 |
Evan Cheng <evan.cheng@apple.com> |
Rename TargetSubtarget to TargetSubtargetInfo for consistency.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134259 91177308-0d34-0410-b5e6-96231b3b80d8
parcSubtarget.cpp
parcSubtarget.h
|
| 94214703d97d8d9dfca88174ffc7e94820a85e62 |
01-Jul-2011 |
Evan Cheng <evan.cheng@apple.com> |
- Added MCSubtargetInfo to capture subtarget features and scheduling
itineraries.
- Refactor TargetSubtarget to be based on MCSubtargetInfo.
- Change tablegen generated subtarget info to initialize MCSubtargetInfo
and hide more details from targets.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134257 91177308-0d34-0410-b5e6-96231b3b80d8
parcSubtarget.cpp
parcSubtarget.h
|
| 4db3cffe94a5285239cc0056f939c6b74a5ca0b6 |
01-Jul-2011 |
Evan Cheng <evan.cheng@apple.com> |
Hide the call to InitMCInstrInfo into tblgen generated ctor.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134244 91177308-0d34-0410-b5e6-96231b3b80d8
parcInstrInfo.cpp
parcInstrInfo.h
|
| 276365dd4bc0c2160f91fd8062ae1fc90c86c324 |
30-Jun-2011 |
Evan Cheng <evan.cheng@apple.com> |
Fix the ridiculous SubtargetFeatures API where it implicitly expects CPU name to
be the first encoded as the first feature. It then uses the CPU name to look up
features / scheduling itineray even though clients know full well the CPU name
being used to query these properties.
The fix is to just have the clients explictly pass the CPU name!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134127 91177308-0d34-0410-b5e6-96231b3b80d8
parcSubtarget.cpp
parcSubtarget.h
parcTargetMachine.cpp
parcTargetMachine.h
|
| 158bf50787f1881fbdb6f62761d15aae0d3862f6 |
29-Jun-2011 |
Eric Christopher <echristo@apple.com> |
Remove getRegClassForInlineAsmConstraint from sparc.
Part of rdar://9643582
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134083 91177308-0d34-0410-b5e6-96231b3b80d8
parcISelLowering.cpp
parcISelLowering.h
|
| d5b03f252c0db6b49a242abab63d7c5a260fceae |
28-Jun-2011 |
Evan Cheng <evan.cheng@apple.com> |
Move CallFrameSetupOpcode and CallFrameDestroyOpcode to TargetInstrInfo.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134030 91177308-0d34-0410-b5e6-96231b3b80d8
parcInstrInfo.cpp
parcRegisterInfo.cpp
|
| 6844f7bcdec8c2691c8d1067d90e4a02cf658c27 |
28-Jun-2011 |
Evan Cheng <evan.cheng@apple.com> |
Hide more details in tablegen generated MCRegisterInfo ctor function.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134027 91177308-0d34-0410-b5e6-96231b3b80d8
parcRegisterInfo.cpp
|
| 22fee2dff4c43b551aefa44a96ca74fcade6bfac |
28-Jun-2011 |
Evan Cheng <evan.cheng@apple.com> |
Merge XXXGenRegisterNames.inc into XXXGenRegisterInfo.inc
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134024 91177308-0d34-0410-b5e6-96231b3b80d8
MakeLists.txt
akefile
parc.h
parcInstrInfo.cpp
|
| e837dead3c8dc3445ef6a0e2322179c57e264a13 |
28-Jun-2011 |
Evan Cheng <evan.cheng@apple.com> |
- Rename TargetInstrDesc, TargetOperandInfo to MCInstrDesc and MCOperandInfo and
sink them into MC layer.
- Added MCInstrInfo, which captures the tablegen generated static data. Chang
TargetInstrInfo so it's based off MCInstrInfo.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134021 91177308-0d34-0410-b5e6-96231b3b80d8
elaySlotFiller.cpp
|
| 73f50d9bc3bd46cc0abeba9bb0d46977ba1aea42 |
27-Jun-2011 |
Evan Cheng <evan.cheng@apple.com> |
Merge XXXGenRegisterDesc.inc XXXGenRegisterNames.inc XXXGenRegisterInfo.h.inc
into XXXGenRegisterInfo.inc.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133922 91177308-0d34-0410-b5e6-96231b3b80d8
MakeLists.txt
akefile
parc.h
parcRegisterInfo.cpp
parcRegisterInfo.h
|
| a347f85dbeee37a7f2bb68df1a7d4cdfbb7b576d |
24-Jun-2011 |
Evan Cheng <evan.cheng@apple.com> |
Starting to refactor Target to separate out code that's needed to fully describe
target machine from those that are only needed by codegen. The goal is to
sink the essential target description into MC layer so we can start building
MC based tools without needing to link in the entire codegen.
First step is to refactor TargetRegisterInfo. This patch added a base class
MCRegisterInfo which TargetRegisterInfo is derived from. Changed TableGen to
separate register description from the rest of the stuff.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133782 91177308-0d34-0410-b5e6-96231b3b80d8
MakeLists.txt
akefile
parcRegisterInfo.cpp
|
| f28987b76e758b5f2fcc2c5d2c8e073df54ca91e |
16-Jun-2011 |
Jakob Stoklund Olesen <stoklund@2pi.dk> |
Use set operations instead of plain lists to enumerate register classes.
This simplifies many of the target description files since it is common
for register classes to be related or contain sequences of numbered
registers.
I have verified that this doesn't change the files generated by TableGen
for ARM and X86. It alters the allocation order of MBlaze GPR and Mips
FGR32 registers, but I believe the change is benign.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133105 91177308-0d34-0410-b5e6-96231b3b80d8
parcRegisterInfo.td
|
| 2a9d1ca9c244aeac98044a5fc9a081ff3df7b2ff |
09-Jun-2011 |
Jakob Stoklund Olesen <stoklund@2pi.dk> |
Remove custom allocation order boilerplate that is no longer needed.
The register allocators automatically filter out reserved registers and
place the callee saved registers last in the allocation order, so custom
methods are no longer necessary just for that.
Some targets still use custom allocation orders:
ARM/Thumb: The high registers are removed from GPR in thumb mode. The
NEON allocation orders prefer to use non-VFP2 registers first.
X86: The GR8 classes omit AH-DH in x86-64 mode to avoid REX trouble.
SystemZ: Some of the allocation orders are omitting R12 aliases without
explanation. I don't understand this target well enough to fix that. It
looks like all the boilerplate could be removed by reserving the right
registers.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132781 91177308-0d34-0410-b5e6-96231b3b80d8
parcRegisterInfo.cpp
parcRegisterInfo.td
|
| 471e4224809f51652c71f319532697a879a75a0d |
09-Jun-2011 |
Eric Christopher <echristo@apple.com> |
Add a parameter to CCState so that it can access the MachineFunction.
No functional change.
Part of PR6965
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132763 91177308-0d34-0410-b5e6-96231b3b80d8
parcISelLowering.cpp
|
| 6e032942cf58d1c41f88609a1cec74eb74940ecd |
30-May-2011 |
Rafael Espindola <rafael.espindola@gmail.com> |
Use the dwarf->llvm mapping to print register names in the cfi
directives.
Fixes PR9826.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132317 91177308-0d34-0410-b5e6-96231b3b80d8
parcRegisterInfo.cpp
parcRegisterInfo.h
|
| 03dc1868d15f6113e93827e7812d817a3ec2ec3a |
29-May-2011 |
Rafael Espindola <rafael.espindola@gmail.com> |
Fix to match the dwarf register numbers that gdb uses.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132278 91177308-0d34-0410-b5e6-96231b3b80d8
parcRegisterInfo.td
|
| fc5d305597ea6336d75bd7f3b741e8d57d6a5105 |
06-May-2011 |
Eli Friedman <eli.friedman@gmail.com> |
Make the logic for determining function alignment more explicit. No functionality change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131012 91177308-0d34-0410-b5e6-96231b3b80d8
parcISelLowering.cpp
parcISelLowering.h
|
| d2189bf12af59fa59aef375ce05d4ba9122ca287 |
03-May-2011 |
Benjamin Kramer <benny.kra@googlemail.com> |
Remove unused variables caught by GCC's -Wunused-but-set-variable.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130755 91177308-0d34-0410-b5e6-96231b3b80d8
parcISelLowering.cpp
|
| 7a2bdde0a0eebcd2125055e0eacaca040f0b766c |
15-Apr-2011 |
Chris Lattner <sabre@nondot.org> |
Fix a ton of comment typos found by codespell. Patch by
Luis Felipe Strano Moraes!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129558 91177308-0d34-0410-b5e6-96231b3b80d8
parcISelLowering.cpp
|
| 68e6beeccc0b9ac2e8d3687a8a5b7d4b172edca1 |
22-Feb-2011 |
Devang Patel <dpatel@apple.com> |
Revert r124611 - "Keep track of incoming argument's location while emitting LiveIns."
In other words, do not keep track of argument's location. The debugger (gdb) is not prepared to see line table entries for arguments. For the debugger, "second" line table entry marks beginning of function body.
This requires some coordination with debugger to get this working.
- The debugger needs to be aware of prolog_end attribute attached with line table entries.
- The compiler needs to accurately mark prolog_end in line table entries (at -O0 and at -O1+)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@126155 91177308-0d34-0410-b5e6-96231b3b80d8
parcISelLowering.cpp
|
| 58269b973256bf2436cac0f047aa277fe4bc01dd |
21-Feb-2011 |
Venkatraman Govindaraju <venkatra@cs.wisc.edu> |
Generate correct Sparc32 ABI compliant code for functions that return a struct.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@126108 91177308-0d34-0410-b5e6-96231b3b80d8
elaySlotFiller.cpp
parcISelLowering.cpp
parcISelLowering.h
parcInstrInfo.td
|
| 00d78f1348a5980a276bed8f9be09ce2412a6a12 |
20-Feb-2011 |
Oscar Fuentes <ofv@wanadoo.es> |
Use explicit add_subdirectory's for LLVM target sublibraries instead
of testing for its presence at cmake time.
This way the build automatically regenerates the makefiles when a svn
update brings in a new sublibrary.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@126068 91177308-0d34-0410-b5e6-96231b3b80d8
MakeLists.txt
|
| a901129169194881a78b7fd8953e09f55b846d10 |
16-Feb-2011 |
Stuart Hastings <stuart@apple.com> |
Swap VT and DebugLoc operands of getExtLoad() for consistency with
other getNode() methods. Radar 9002173.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@125665 91177308-0d34-0410-b5e6-96231b3b80d8
parcISelLowering.cpp
|
| cc5bd4a56140f8c7381afa686f28b361fd540436 |
12-Feb-2011 |
Venkatraman Govindaraju <venkatra@cs.wisc.edu> |
Prevent IMPLICIT_DEF/KILL to become a delay filler instruction in SPARC backend.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@125444 91177308-0d34-0410-b5e6-96231b3b80d8
elaySlotFiller.cpp
|
| e9a7ea68653689966417443b8ac2528c1d9d3ccf |
31-Jan-2011 |
Devang Patel <dpatel@apple.com> |
Keep track of incoming argument's location while emitting LiveIns.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@124611 91177308-0d34-0410-b5e6-96231b3b80d8
parcISelLowering.cpp
|
| 8184e289db45acd0bd8bbf7087f7a1274ef55f15 |
22-Jan-2011 |
Venkatraman Govindaraju <venkatra@cs.wisc.edu> |
Pass sret arguments through the stack instead of through registers in Sparc backend. It makes the code generated more compliant with the sparc32 ABI.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@124030 91177308-0d34-0410-b5e6-96231b3b80d8
parcCallingConv.td
parcISelLowering.cpp
parcMachineFunctionInfo.h
|
| e105a3901fecce76e789566ecbfbc87a5b4ce899 |
22-Jan-2011 |
Venkatraman Govindaraju <venkatra@cs.wisc.edu> |
Added ICC, FCC as uses of movcc instruction to generate correct code when -mattr=v9 is used.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@124027 91177308-0d34-0410-b5e6-96231b3b80d8
parcInstrInfo.td
|
| fc3faa75cbadd8a1020941ec85adfda1d2f49688 |
21-Jan-2011 |
Venkatraman Govindaraju <venkatra@cs.wisc.edu> |
Sparc backend:
Rename FLUSH to FLUSHW.
Output "ta 3" instead of a "flushw" instruction if v8 instruction set is used.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123997 91177308-0d34-0410-b5e6-96231b3b80d8
parcISelLowering.cpp
parcISelLowering.h
parcInstrInfo.td
|
| 46713296e0da8f413b94b9c2b82b079e6e3bd6e2 |
21-Jan-2011 |
Venkatraman Govindaraju <venkatra@cs.wisc.edu> |
Implement support for byval arguments in Sparc backend.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123974 91177308-0d34-0410-b5e6-96231b3b80d8
parcISelLowering.cpp
|
| 71e39dac0ce9676dd3d0a92164167e18499d40fa |
20-Jan-2011 |
Venkatraman Govindaraju <venkatra@cs.wisc.edu> |
Sparc backend: Implements a delay slot filler that attempt to fill delay slots
with useful instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123884 91177308-0d34-0410-b5e6-96231b3b80d8
elaySlotFiller.cpp
parcInstrInfo.td
|
| 687ae9606bb983659700b133963f48c9a06aec03 |
18-Jan-2011 |
Venkatraman Govindaraju <venkatra@cs.wisc.edu> |
SPARC backend: Modified LowerCall and LowerFormalArguments so that they use CallingConv assignments.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123749 91177308-0d34-0410-b5e6-96231b3b80d8
parcCallingConv.td
parcISelLowering.cpp
|
| c1a62834a2ad33a80ca2b1f3a549f4f7806cd320 |
16-Jan-2011 |
Venkatraman Govindaraju <venkatra@cs.wisc.edu> |
Implement AnalyzeBranch in Sparc Backend.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123561 91177308-0d34-0410-b5e6-96231b3b80d8
parcInstrInfo.cpp
parcInstrInfo.h
|
| 4f28c1c71450c711e96aa283de53739d8b4504cd |
13-Jan-2011 |
Jakob Stoklund Olesen <stoklund@2pi.dk> |
Teach frame lowering to ignore debug values after the terminators.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123399 91177308-0d34-0410-b5e6-96231b3b80d8
parcFrameLowering.cpp
|
| 860b64cb1efba110bf81bcc243a6fbaae4c655a4 |
12-Jan-2011 |
Venkatraman Govindaraju <venkatra@cs.wisc.edu> |
Implement RETURNADDR and FRAMEADDR lowering in SPARC backend.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123310 91177308-0d34-0410-b5e6-96231b3b80d8
parcISelLowering.cpp
parcISelLowering.h
parcInstrInfo.td
|
| c178308b23f796b6f5c15c8b3f742cc7b3336d6b |
12-Jan-2011 |
Venkatraman Govindaraju <venkatra@cs.wisc.edu> |
Remove SPARC backend getpcx instruction's Uses. Also, insert an assert to
ensure %o7 is not assigned as the destination of getpcx instruction.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123304 91177308-0d34-0410-b5e6-96231b3b80d8
parcAsmPrinter.cpp
parcInstrInfo.td
|
| 7d29ffbe5b091fae03afd264d8c8b0090c7a45f4 |
12-Jan-2011 |
Venkatraman Govindaraju <venkatra@cs.wisc.edu> |
Fix SPARC backend call instruction so that arguments passed through registers
are correctly marked as used instead of passing all possible argument registers
as used.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123301 91177308-0d34-0410-b5e6-96231b3b80d8
parcISelLowering.cpp
parcInstrInfo.td
|
| f27df33b02a85a030aaa4476aee7d1e8fe5921b2 |
11-Jan-2011 |
Venkatraman Govindaraju <venkatra@cs.wisc.edu> |
SPARC backend: correct ICC/FCC uses for ADDX and SELECT_CC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123281 91177308-0d34-0410-b5e6-96231b3b80d8
parcInstrInfo.td
|
| 7af6fad0a73f33a6782166676d48073ce8565c47 |
10-Jan-2011 |
Anton Korobeynikov <asl@math.spbu.ru> |
Update CMake stuff
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123171 91177308-0d34-0410-b5e6-96231b3b80d8
MakeLists.txt
|
| 16c29b5f285f375be53dabaa73e3e91107485fe4 |
10-Jan-2011 |
Anton Korobeynikov <asl@math.spbu.ru> |
Rename TargetFrameInfo into TargetFrameLowering. Also, put couple of FIXMEs and fixes here and there.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123170 91177308-0d34-0410-b5e6-96231b3b80d8
parcFrameInfo.cpp
parcFrameInfo.h
parcFrameLowering.cpp
parcFrameLowering.h
parcTargetMachine.cpp
parcTargetMachine.h
|
| 12db7b68b683371a6ae464e76b4c850fa0199eeb |
29-Dec-2010 |
Venkatraman Govindaraju <venkatra@cs.wisc.edu> |
SPARC backend fix: correctly passing arguments through stack
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122626 91177308-0d34-0410-b5e6-96231b3b80d8
parcISelLowering.cpp
|
| f661277a9b26590648aca585c0572f200470290d |
28-Dec-2010 |
Venkatraman Govindaraju <venkatra@cs.wisc.edu> |
Multiple SPARC backend fixes: added Y register; updated select_cc, subx, subxcc defs/uses;
and fixed CustomInserter.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122607 91177308-0d34-0410-b5e6-96231b3b80d8
parcISelLowering.cpp
parcInstrInfo.td
parcRegisterInfo.td
|
| 036609bd7d42ed1f57865969e059eb7d1eb6c392 |
23-Dec-2010 |
Chris Lattner <sabre@nondot.org> |
Flag -> Glue, the ongoing saga
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122513 91177308-0d34-0410-b5e6-96231b3b80d8
parcInstrInfo.td
|
| f1b4eafbfec976f939ec0ea3e8acf91cef5363e3 |
21-Dec-2010 |
Chris Lattner <sabre@nondot.org> |
rename MVT::Flag to MVT::Glue. "Flag" is a terrible name for
something that just glues two nodes together, even if it is
sometimes used for flags.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122310 91177308-0d34-0410-b5e6-96231b3b80d8
parcISelDAGToDAG.cpp
parcISelLowering.cpp
|
| bf17cfa3f904e488e898ac2e3af706fd1a892f08 |
23-Nov-2010 |
Wesley Peck <peckw@wesleypeck.com> |
Renaming ISD::BIT_CONVERT to ISD::BITCAST to better reflect the LLVM IR concept.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119990 91177308-0d34-0410-b5e6-96231b3b80d8
parcISelLowering.cpp
|
| d0c38176690e9602a93a20a43f1bd084564a8116 |
18-Nov-2010 |
Anton Korobeynikov <asl@math.spbu.ru> |
Move hasFP() and few related hooks to TargetFrameInfo.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119740 91177308-0d34-0410-b5e6-96231b3b80d8
parcFrameInfo.h
parcRegisterInfo.cpp
parcRegisterInfo.h
|
| a460e4a1427260bd46171e674d0a4c41cdd6313f |
15-Nov-2010 |
Anton Korobeynikov <asl@math.spbu.ru> |
Attempt to unbreak cmake-based builds
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119098 91177308-0d34-0410-b5e6-96231b3b80d8
MakeLists.txt
|
| 33464912237efaa0ed7060829e66b59055bdd48b |
15-Nov-2010 |
Anton Korobeynikov <asl@math.spbu.ru> |
First step of huge frame-related refactoring: move emit{Prologue,Epilogue} out of TargetRegisterInfo to TargetFrameInfo, which is definitely much better suitable place
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119097 91177308-0d34-0410-b5e6-96231b3b80d8
parcFrameInfo.cpp
parcFrameInfo.h
parcRegisterInfo.cpp
parcRegisterInfo.h
parcTargetMachine.cpp
parcTargetMachine.h
|
| 1139691e3aadff751c035f38f835d436ec6cf10a |
14-Nov-2010 |
Chris Lattner <sabre@nondot.org> |
move all the target's asmprinters into the main target. The piece
that should be split out is the InstPrinter (if a target is mc'ized).
This change makes all the targets be consistent.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119056 91177308-0d34-0410-b5e6-96231b3b80d8
smPrinter/CMakeLists.txt
smPrinter/Makefile
smPrinter/SparcAsmPrinter.cpp
MakeLists.txt
akefile
parcAsmPrinter.cpp
|
| 1440e8b918d7116c3587cb95f4f7ac7a0a0b65ad |
03-Nov-2010 |
Duncan Sands <baldrick@free.fr> |
Inside the calling convention logic LocVT is always a simple
value type, so there is no point in passing it around using
an EVT. Use the simpler MVT everywhere. Rather than trying
to propagate this information maximally in all the code that
using the calling convention stuff, I chose to do a mainly
low impact change instead.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118167 91177308-0d34-0410-b5e6-96231b3b80d8
parcISelLowering.cpp
|
| 3609eb0de2f786ca6917d0388c37c23873dbd247 |
29-Sep-2010 |
Oscar Fuentes <ofv@wanadoo.es> |
Removed a bunch of unnecessary target_link_libraries.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114999 91177308-0d34-0410-b5e6-96231b3b80d8
MakeLists.txt
|
| 52a261b3c1391c5fec399ddeb3fc6ee9541e8790 |
21-Sep-2010 |
Chris Lattner <sabre@nondot.org> |
fix a long standing wart: all the ComplexPattern's were being
passed the root of the match, even though only a few patterns
actually needed this (one in X86, several in ARM [which should
be refactored anyway], and some in CellSPU that I don't feel
like detangling). Instead of requiring all ComplexPatterns to
take the dead root, have targets opt into getting the root by
putting SDNPWantRoot on the ComplexPattern.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114471 91177308-0d34-0410-b5e6-96231b3b80d8
parcISelDAGToDAG.cpp
|
| 6229d0acb8f395552131a7015a5d1e7b2bae2111 |
21-Sep-2010 |
Chris Lattner <sabre@nondot.org> |
update a bunch of code to use the MachinePointerInfo version of getStore.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114461 91177308-0d34-0410-b5e6-96231b3b80d8
parcISelLowering.cpp
|
| 3d6ccfba314ed38e4506dae2781a060e9a3e07ac |
21-Sep-2010 |
Chris Lattner <sabre@nondot.org> |
propagate MachinePointerInfo through various uses of the old
SelectionDAG::getExtLoad overload, and eliminate it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114446 91177308-0d34-0410-b5e6-96231b3b80d8
parcISelLowering.cpp
|
| d1c24ed81c43635d00ff099844a9d0614021a72b |
21-Sep-2010 |
Chris Lattner <sabre@nondot.org> |
convert the targets off the non-MachinePointerInfo of getLoad.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114410 91177308-0d34-0410-b5e6-96231b3b80d8
parcISelLowering.cpp
|
| fcb4a8ead3cd8d9540d5eaa448af5d14a0ee341a |
27-Aug-2010 |
Jim Grosbach <grosbach@apple.com> |
Simplify eliminateFrameIndex() interface back down now that PEI doesn't need
to try to re-use scavenged frame index reference registers. rdar://8277890
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112241 91177308-0d34-0410-b5e6-96231b3b80d8
parcRegisterInfo.cpp
parcRegisterInfo.h
|
| 4bb862d179486008406ec5025f925bac5493ad0d |
17-Aug-2010 |
Jakob Stoklund Olesen <stoklund@2pi.dk> |
Don't call Predicate_* methods directly from Sparc target.
Modernize predicates a bit.
The Predicate_* methods are not used by TableGen any longer. They are only
emitted for the sake of legacy code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@111263 91177308-0d34-0410-b5e6-96231b3b80d8
parcISelDAGToDAG.cpp
parcInstrInfo.td
|
| 23e70ebf352ff4938210711464c68b5a6e46e61c |
17-Aug-2010 |
Chris Lattner <sabre@nondot.org> |
fix emacs language spec's, patch by Edmund Grimley-Evans!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@111241 91177308-0d34-0410-b5e6-96231b3b80d8
parc.td
|
| 90c579de5a383cee278acc3f7e7b9d0a656e6a35 |
06-Aug-2010 |
Owen Anderson <resistor@mac.com> |
Reapply r110396, with fixes to appease the Linux buildbot gods.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@110460 91177308-0d34-0410-b5e6-96231b3b80d8
elaySlotFiller.cpp
PMover.cpp
|
| 1f74590e9d1b9cf0f1f81a156efea73f76546e05 |
06-Aug-2010 |
Owen Anderson <resistor@mac.com> |
Revert r110396 to fix buildbots.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@110410 91177308-0d34-0410-b5e6-96231b3b80d8
elaySlotFiller.cpp
PMover.cpp
|
| 9ccaf53ada99c63737547c0235baeb8454b04e80 |
06-Aug-2010 |
Owen Anderson <resistor@mac.com> |
Don't use PassInfo* as a type identifier for passes. Instead, use the address of the static
ID member as the sole unique type identifier. Clean up APIs related to this change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@110396 91177308-0d34-0410-b5e6-96231b3b80d8
elaySlotFiller.cpp
PMover.cpp
|
| 78e6e009223a38739797629ca2d217acf86dda93 |
17-Jul-2010 |
Jakob Stoklund Olesen <stoklund@2pi.dk> |
Remove the isMoveInstr() hook.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108567 91177308-0d34-0410-b5e6-96231b3b80d8
parcInstrInfo.cpp
parcInstrInfo.h
|
| 38e59891ee4417a9be2f8146ce0ba3269e38ac21 |
15-Jul-2010 |
Benjamin Kramer <benny.kra@googlemail.com> |
Don't pass StringRef by reference.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108366 91177308-0d34-0410-b5e6-96231b3b80d8
parcMCAsmInfo.cpp
parcMCAsmInfo.h
|
| 600f171486708734e2b9c9c617528cfc51c16850 |
11-Jul-2010 |
Jakob Stoklund Olesen <stoklund@2pi.dk> |
RISC architectures get their memory operand folding for free.
The only folding these load/store architectures can do is converting COPY into a
load or store, and the target independent part of foldMemoryOperand already
knows how to do that.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108099 91177308-0d34-0410-b5e6-96231b3b80d8
parcInstrInfo.cpp
parcInstrInfo.h
|
| 8e18a1a5cf4423dba9b8c53f2699299c514a9dc2 |
11-Jul-2010 |
Jakob Stoklund Olesen <stoklund@2pi.dk> |
Replace copyRegToReg with copyPhysReg for Sparc.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108086 91177308-0d34-0410-b5e6-96231b3b80d8
parcInstrInfo.cpp
parcInstrInfo.h
|
| bcc8017c738e92d9c1af221b11c4916cb524184e |
08-Jul-2010 |
Evan Cheng <evan.cheng@apple.com> |
Move getExtLoad() and (some) getLoad() DebugLoc argument after EVT argument for consistency sake.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107820 91177308-0d34-0410-b5e6-96231b3b80d8
parcISelLowering.cpp
|
| c9403659a98bf6487ab6fbf40b81628b5695c02e |
07-Jul-2010 |
Dan Gohman <gohman@apple.com> |
Split the SDValue out of OutputArg so that SelectionDAG-independent
code can do calling-convention queries. This obviates OutputArgReg.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107786 91177308-0d34-0410-b5e6-96231b3b80d8
parcISelLowering.cpp
parcISelLowering.h
|
| 0d881dabc1a4e1aefad6dd38de166d8358285638 |
07-Jul-2010 |
Devang Patel <dpatel@apple.com> |
Propagate debug loc.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107710 91177308-0d34-0410-b5e6-96231b3b80d8
parcISelLowering.cpp
|
| 14152b480d09c7ca912af7c06d00b0ff3912e4f5 |
06-Jul-2010 |
Dan Gohman <gohman@apple.com> |
Reapply r107655 with fixes; insert the pseudo instruction into
the block before calling the expansion hook. And don't
put EFLAGS in a mbb's live-in list twice.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107691 91177308-0d34-0410-b5e6-96231b3b80d8
parcISelLowering.cpp
|
| 258c58cc6257cf61c9bdbb9c4cea67ba2691adf0 |
06-Jul-2010 |
Dan Gohman <gohman@apple.com> |
Revert r107655.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107668 91177308-0d34-0410-b5e6-96231b3b80d8
parcISelLowering.cpp
|
| b81c771c0d9ab5a980caf3383932b051eafd1a39 |
06-Jul-2010 |
Dan Gohman <gohman@apple.com> |
Fix a bunch of custom-inserter functions to handle the case where
the pseudo instruction is not at the end of the block.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107655 91177308-0d34-0410-b5e6-96231b3b80d8
parcISelLowering.cpp
|
| ed2ae136d29dd36122d2476801e7d7a86e8301e3 |
03-Jul-2010 |
Evan Cheng <evan.cheng@apple.com> |
Remove isSS argument from CreateFixedObject. Fixed objects cannot be spill slots so it's always false.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107550 91177308-0d34-0410-b5e6-96231b3b80d8
parcISelLowering.cpp
|
| c63a404d56320c25b9510b6b0fb3eda70d619b11 |
21-Jun-2010 |
Eric Christopher <echristo@apple.com> |
Remove isTwoAddress from Sparc.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106466 91177308-0d34-0410-b5e6-96231b3b80d8
parcInstrInfo.td
|
| e368b460a206fafa0d31d5d059b1779b94f7df8c |
18-Jun-2010 |
Dan Gohman <gohman@apple.com> |
Eliminate unnecessary uses of getZExtValue().
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106279 91177308-0d34-0410-b5e6-96231b3b80d8
parcISelLowering.cpp
|
| 3bf912593301152b65accb9d9c37a95172f1df5a |
18-Jun-2010 |
Stuart Hastings <stuart@apple.com> |
Add a DebugLoc parameter to TargetInstrInfo::InsertBranch(). This
addresses a longstanding deficiency noted in many FIXMEs scattered
across all the targets.
This effectively moves the problem up one level, replacing eleven
FIXMEs in the targets with eight FIXMEs in CodeGen, plus one path
through FastISel where we actually supply a DebugLoc, fixing Radar
7421831.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106243 91177308-0d34-0410-b5e6-96231b3b80d8
parcInstrInfo.cpp
parcInstrInfo.h
|
| 6f07bd6ae8c2b11e78f351d7751d1e9b32f38a75 |
02-Jun-2010 |
Rafael Espindola <rafael.espindola@gmail.com> |
cleanup
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105322 91177308-0d34-0410-b5e6-96231b3b80d8
parcRegisterInfo.cpp
parcRegisterInfo.h
|
| ca561ffcf320e9dbfafcac5efcee81471f3259c3 |
26-May-2010 |
Jakob Stoklund Olesen <stoklund@2pi.dk> |
Replace the SubRegSet tablegen class with a less error-prone mechanism.
A Register with subregisters must also provide SubRegIndices for adressing the
subregisters. TableGen automatically inherits indices for sub-subregisters to
minimize typing.
CompositeIndices may be specified for the weirder cases such as the XMM sub_sd
index that returns the same register, and ARM NEON Q registers where both D
subregs have ssub_0 and ssub_1 sub-subregs.
It is now required that all subregisters are named by an index, and a future
patch will also require inherited subregisters to be named. This is necessary to
allow composite subregister indices to be reduced to a single index.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104704 91177308-0d34-0410-b5e6-96231b3b80d8
parcRegisterInfo.td
|
| b555609e73f5091bf8180c0875fb1fa6c5ad0e7a |
26-May-2010 |
Jakob Stoklund Olesen <stoklund@2pi.dk> |
Revert "Replace the SubRegSet tablegen class with a less error-prone mechanism."
This reverts commit 104654.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104660 91177308-0d34-0410-b5e6-96231b3b80d8
parcRegisterInfo.td
|
| 6a45d681e53a99b4c4f63e0b1664626a596a8151 |
26-May-2010 |
Jakob Stoklund Olesen <stoklund@2pi.dk> |
Replace the SubRegSet tablegen class with a less error-prone mechanism.
A Register with subregisters must also provide SubRegIndices for adressing the
subregisters. TableGen automatically inherits indices for sub-subregisters to
minimize typing.
CompositeIndices may be specified for the weirder cases such as the XMM sub_sd
index that returns the same register, and ARM NEON Q registers where both D
subregs have ssub_0 and ssub_1 sub-subregs.
It is now required that all subregisters are named by an index, and a future
patch will also require inherited subregisters to be named. This is necessary to
allow composite subregister indices to be reduced to a single index.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104654 91177308-0d34-0410-b5e6-96231b3b80d8
parcRegisterInfo.td
|
| ff7a562751604a9fe13efc75bd59622244b54d35 |
11-May-2010 |
Dan Gohman <gohman@apple.com> |
Implement a bunch more TargetSelectionDAGInfo infrastructure.
Move EmitTargetCodeForMemcpy, EmitTargetCodeForMemset, and
EmitTargetCodeForMemmove out of TargetLowering and into
SelectionDAGInfo to exercise this.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103481 91177308-0d34-0410-b5e6-96231b3b80d8
parcSelectionDAGInfo.cpp
parcSelectionDAGInfo.h
parcTargetMachine.cpp
parcTargetMachine.h
|
| 34dcc6fadca0a1117cdbd0e9b35c991a55b6e556 |
06-May-2010 |
Dan Gohman <gohman@apple.com> |
Add a DebugLoc argument to TargetInstrInfo::copyRegToReg, so that it
doesn't have to guess.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103194 91177308-0d34-0410-b5e6-96231b3b80d8
parcInstrInfo.cpp
parcInstrInfo.h
|
| 746ad69e088176819981b4b2c5ac8dcd49f5e60e |
06-May-2010 |
Evan Cheng <evan.cheng@apple.com> |
Add argument TargetRegisterInfo to loadRegFromStackSlot and storeRegToStackSlot.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103193 91177308-0d34-0410-b5e6-96231b3b80d8
parcInstrInfo.cpp
parcInstrInfo.h
|
| af1d8ca44a18f304f207e209b3bdb94b590f86ff |
01-May-2010 |
Dan Gohman <gohman@apple.com> |
Get rid of the EdgeMapping map. Instead, just check for BasicBlock
changes before doing phi lowering for switches.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@102809 91177308-0d34-0410-b5e6-96231b3b80d8
parcISelLowering.cpp
parcISelLowering.h
|
| 1f65453d0a26d12a224f1380c71238f7b2d26e95 |
20-Apr-2010 |
Dan Gohman <gohman@apple.com> |
Delete an unnecessary reference to SelectionDAGISel::BB.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101824 91177308-0d34-0410-b5e6-96231b3b80d8
parcISelDAGToDAG.cpp
|
| d858e90f039f5fcdc2fa93035e911a5a9505cc50 |
17-Apr-2010 |
Dan Gohman <gohman@apple.com> |
Use const qualifiers with TargetLowering. This eliminates several
const_casts, and it reinforces the design of the Target classes being
immutable.
SelectionDAGISel::IsLegalToFold is now a static member function, because
PIC16 uses it in an unconventional way. There is more room for API
cleanup here.
And PIC16's AsmPrinter no longer uses TargetLowering.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101635 91177308-0d34-0410-b5e6-96231b3b80d8
parcISelDAGToDAG.cpp
parcISelLowering.cpp
parcISelLowering.h
parcTargetMachine.h
|
| 1e93df6f0b5ee6e36d7ec18e6035f0f5a53e5ec6 |
17-Apr-2010 |
Dan Gohman <gohman@apple.com> |
Move per-function state out of TargetLowering subclasses and into
MachineFunctionInfo subclasses.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101634 91177308-0d34-0410-b5e6-96231b3b80d8
parcISelLowering.cpp
parcISelLowering.h
parcMachineFunctionInfo.h
|
| 53c5e42ab9c1a2cce7ad19bb0b4dffe33c9473e6 |
17-Apr-2010 |
Dan Gohman <gohman@apple.com> |
Add skeleton target-specific SelectionDAGInfo files.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101564 91177308-0d34-0410-b5e6-96231b3b80d8
MakeLists.txt
parcSelectionDAGInfo.cpp
parcSelectionDAGInfo.h
|
| 46510a73e977273ec67747eb34cbdb43f815e451 |
15-Apr-2010 |
Dan Gohman <gohman@apple.com> |
Add const qualifiers to CodeGen's use of LLVM IR constructs.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101334 91177308-0d34-0410-b5e6-96231b3b80d8
parcISelLowering.cpp
|
| e3a601b648e4cbb916e33f969a1b9d3d40b36734 |
08-Apr-2010 |
Chris Lattner <sabre@nondot.org> |
add newlines at end of files.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100706 91177308-0d34-0410-b5e6-96231b3b80d8
smPrinter/CMakeLists.txt
|
| fddb7667ca4d8fe83f96b388295849281ddaa5b4 |
05-Apr-2010 |
Jakob Stoklund Olesen <stoklund@2pi.dk> |
Replace TSFlagsFields and TSFlagsShifts with a simpler TSFlags field.
When a target instruction wants to set target-specific flags, it should simply
set bits in the TSFlags bit vector defined in the Instruction TableGen class.
This works well because TableGen resolves member references late:
class I : Instruction {
AddrMode AM = AddrModeNone;
let TSFlags{3-0} = AM.Value;
}
let AM = AddrMode4 in
def ADD : I;
TSFlags gets the expected bits from AddrMode4 in this example.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100384 91177308-0d34-0410-b5e6-96231b3b80d8
parc.td
|
| 3d2251361171b1a41bdb2ac71882e69d48617f49 |
05-Apr-2010 |
Chris Lattner <sabre@nondot.org> |
eliminate the magic AbsoluteDebugSectionOffsets MAI hook,
which is really a property of the section being referenced.
Add a predicate to MCSection to replace it.
Yay for reduction in magic.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100367 91177308-0d34-0410-b5e6-96231b3b80d8
parcMCAsmInfo.cpp
|
| b23569aff0a6d2b231cb93cc4acd0ac060ba560f |
04-Apr-2010 |
Chris Lattner <sabre@nondot.org> |
Momentous day: remove the "O" member from AsmPrinter. Now all
"asm printering" happens through MCStreamer. This also
Streamerizes PIC16 debug info, which escaped my attention.
This removes a leak from LLVMTargetMachine of the 'legacy'
output stream.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100327 91177308-0d34-0410-b5e6-96231b3b80d8
smPrinter/SparcAsmPrinter.cpp
|
| 7ad07c46362500f7291a92742569e94fd3538dfd |
04-Apr-2010 |
Chris Lattner <sabre@nondot.org> |
convert the non-MCInstPrinter'ized EmitInstruction
implementations to use EmitRawText instead of writing
directly to "O".
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100318 91177308-0d34-0410-b5e6-96231b3b80d8
smPrinter/SparcAsmPrinter.cpp
|
| c75c028a15a13786eee585aa634b4faf694dd00a |
04-Apr-2010 |
Chris Lattner <sabre@nondot.org> |
fix PrintAsmOperand and PrintAsmMemoryOperand to pass down
raw_ostream to print to.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100313 91177308-0d34-0410-b5e6-96231b3b80d8
smPrinter/SparcAsmPrinter.cpp
|
| 35c33bd772b3cfb34fdc6b5c9171f955454d0043 |
04-Apr-2010 |
Chris Lattner <sabre@nondot.org> |
change a ton of code to not implicitly use the "O" raw_ostream
member of AsmPrinter. Instead, pass it in explicitly.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100306 91177308-0d34-0410-b5e6-96231b3b80d8
smPrinter/SparcAsmPrinter.cpp
|
| c7f3ace20c325521c68335a1689645b43b06ddf0 |
02-Apr-2010 |
Chris Lattner <sabre@nondot.org> |
use DebugLoc default ctor instead of DebugLoc::getUnknownLoc()
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100214 91177308-0d34-0410-b5e6-96231b3b80d8
elaySlotFiller.cpp
parcInstrInfo.cpp
parcRegisterInfo.cpp
|
| de3e05fe33e3bc3bb1368418d7ca940ecc04b5f2 |
19-Mar-2010 |
Chris Lattner <sabre@nondot.org> |
tidy up
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98901 91177308-0d34-0410-b5e6-96231b3b80d8
parcInstrInfo.td
|
| 1b2eb0e8a6aaf034675b17be6d853cb1c666200f |
13-Mar-2010 |
Chris Lattner <sabre@nondot.org> |
eliminate the now-unneeded context argument of MBB::getSymbol()
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98451 91177308-0d34-0410-b5e6-96231b3b80d8
smPrinter/SparcAsmPrinter.cpp
|
| 11d53c129fc9c2a4510605ec0a1696f58750af52 |
13-Mar-2010 |
Chris Lattner <sabre@nondot.org> |
rearrange MCContext ownership. Before LLVMTargetMachine created it
and passing off ownership to AsmPrinter. Now MachineModuleInfo
creates it and owns it by value. This allows us to use MCSymbols
more consistently throughout the rest of the code generator, and
simplifies a bit of code. This also allows MachineFunction to
keep an MCContext reference handy, and cleans up the TargetRegistry
interfaces for AsmPrinters.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98450 91177308-0d34-0410-b5e6-96231b3b80d8
smPrinter/SparcAsmPrinter.cpp
|
| 150ae119761df40ca12f5d975a667778a7d011d7 |
12-Mar-2010 |
Jeffrey Yasskin <jyasskin@google.com> |
Fix LLVM build when the user specifies CPPFLAGS on the make command line.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98394 91177308-0d34-0410-b5e6-96231b3b80d8
smPrinter/Makefile
|
| d62f1b4168d4327c119642d28c26c836ae6717ab |
12-Mar-2010 |
Chris Lattner <sabre@nondot.org> |
inline GetGlobalValueSymbol into the rest its callers and
remove it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98390 91177308-0d34-0410-b5e6-96231b3b80d8
smPrinter/SparcAsmPrinter.cpp
|
| dff4b4c5a7cc894d3b4b6c6e779ea8f47fa50630 |
09-Mar-2010 |
Jim Grosbach <grosbach@apple.com> |
Change the Value argument to eliminateFrameIndex to a type-tagged value. This
is preparatory to having PEI's scavenged frame index value reuse logic
properly distinguish types of frame values (e.g., whether the value is
stack-pointer relative or frame-pointer relative).
No functionality change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98086 91177308-0d34-0410-b5e6-96231b3b80d8
parcRegisterInfo.cpp
parcRegisterInfo.h
|
| eea3f7e4eeab2840b81d6c84ffdcca1477fbe265 |
06-Mar-2010 |
Chris Lattner <sabre@nondot.org> |
clean this up.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97870 91177308-0d34-0410-b5e6-96231b3b80d8
smPrinter/SparcAsmPrinter.cpp
|
| 7c306da505e2d7f64e160890b274a47fa0740962 |
02-Mar-2010 |
Chris Lattner <sabre@nondot.org> |
Sink InstructionSelect() out of each target into SDISel, and rename it
DoInstructionSelection. Inline "SelectRoot" into it from DAGISelHeader.
Sink some other stuff out of DAGISelHeader into SDISel.
Eliminate the various 'Indent' stuff from various targets, which dates
to when isel was recursive.
17 files changed, 114 insertions(+), 430 deletions(-)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97555 91177308-0d34-0410-b5e6-96231b3b80d8
parcISelDAGToDAG.cpp
|
| ce931c65eee7c89cabb479dbd0a0e1bd9d034668 |
01-Mar-2010 |
Dan Gohman <gohman@apple.com> |
Add explicit keywords.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97460 91177308-0d34-0410-b5e6-96231b3b80d8
parcMachineFunctionInfo.h
|
| 1ac1c1ee5d2cbb9658356eddddc6d5ba7c622e5c |
01-Mar-2010 |
Nathan Keynes <nkeynes@deadcoderemoval.net> |
Add JIT support to the TODO list (test commit)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97443 91177308-0d34-0410-b5e6-96231b3b80d8
EADME.txt
|
| f3047cdbd4b729015fd6b0f64cfc5a861a6f6a2c |
17-Feb-2010 |
Chris Lattner <sabre@nondot.org> |
"Fix and issue in SparcAsmPrinter where multiple identical .LLGETPCHn symbols could be emitted in the same file (it was uniqued by block number, but not by function number). " Patch by Nathan Keynes!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96495 91177308-0d34-0410-b5e6-96231b3b80d8
smPrinter/SparcAsmPrinter.cpp
|
| 0a3f39985b3827a02a7ce1ca5e310b68820fd26d |
17-Feb-2010 |
Chris Lattner <sabre@nondot.org> |
move isOnlyReachableByFallthrough out of MachineBasicBlock into AsmPrinter,
and add a sparc implementation that knows about delay slots. Patch by
Nathan Keynes!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96492 91177308-0d34-0410-b5e6-96231b3b80d8
smPrinter/SparcAsmPrinter.cpp
|
| 362dd0bef5437f85586c046bc53287b6fbe9c099 |
15-Feb-2010 |
Anton Korobeynikov <asl@math.spbu.ru> |
Move TLOF implementations to libCodegen to resolve layering violation.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96288 91177308-0d34-0410-b5e6-96231b3b80d8
parcISelLowering.cpp
|
| 54a7aa84294e31140a023e0c721703a647fe227b |
15-Feb-2010 |
David Greene <greened@obbligato.org> |
Remove an assumption of default arguments. This is in anticipation of a
change to SelectionDAG build APIs.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96237 91177308-0d34-0410-b5e6-96231b3b80d8
parcISelLowering.cpp
|
| 8e089a9e4d6b7aa2b3968c38644f926f60a7c670 |
10-Feb-2010 |
Chris Lattner <sabre@nondot.org> |
print all the newlines at the end of instructions with
OutStreamer.AddBlankLine instead of textually.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95734 91177308-0d34-0410-b5e6-96231b3b80d8
smPrinter/SparcAsmPrinter.cpp
|
| 87c06d617917f4a388fbe9db81198e13cde3e431 |
04-Feb-2010 |
Chris Lattner <sabre@nondot.org> |
add support for the sparcv9-*-* target triple to turn on
64-bit sparc codegen. Patch by Nathan Keynes!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95293 91177308-0d34-0410-b5e6-96231b3b80d8
smPrinter/SparcAsmPrinter.cpp
parc.h
parcSubtarget.cpp
parcSubtarget.h
parcTargetMachine.cpp
parcTargetMachine.h
argetInfo/SparcTargetInfo.cpp
|
| d1ff72b8a797304f146e4293db8c814231ea8cb3 |
03-Feb-2010 |
Chris Lattner <sabre@nondot.org> |
rejigger the world so that EmitInstruction prints the \n at
the end of the instruction instead of expecting the caller to
do it. This currently causes the asm-verbose instruction
comments to be on the next line.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95178 91177308-0d34-0410-b5e6-96231b3b80d8
smPrinter/SparcAsmPrinter.cpp
|
| 022d9e1cef7586a80a96446ae8691a37def9bbf4 |
03-Feb-2010 |
Evan Cheng <evan.cheng@apple.com> |
Revert 95130.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95160 91177308-0d34-0410-b5e6-96231b3b80d8
parcISelLowering.cpp
parcISelLowering.h
|
| 56591ab218639d8a6e4c756ca37adaf20215c3b6 |
03-Feb-2010 |
Chris Lattner <sabre@nondot.org> |
refactor code so that LLVMTargetMachine creates the asmstreamer and
mccontext instead of having AsmPrinter do it. This allows other
types of MCStreamer's to be passed in.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95155 91177308-0d34-0410-b5e6-96231b3b80d8
smPrinter/SparcAsmPrinter.cpp
|
| 942619695f4bd77934c09a1cae0fb39ae59edac3 |
02-Feb-2010 |
Evan Cheng <evan.cheng@apple.com> |
Pass callsite return type to TargetLowering::LowerCall and use that to check sibcall eligibility.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95130 91177308-0d34-0410-b5e6-96231b3b80d8
parcISelLowering.cpp
parcISelLowering.h
|
| 745ec06ad2fa533e9ef47ce572c3a03547376224 |
28-Jan-2010 |
Chris Lattner <sabre@nondot.org> |
Switch MSP430, SPU, Sparc, and SystemZ to use EmitFunctionBody().
Diffstat:
6 files changed, 30 insertions(+), 284 deletions(-)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@94727 91177308-0d34-0410-b5e6-96231b3b80d8
smPrinter/SparcAsmPrinter.cpp
|
| d3b31a73e8b58e837510fd429f0f4cb2b8c1a0c2 |
27-Jan-2010 |
Chris Lattner <sabre@nondot.org> |
use existing basic block numbers instead of recomputing
a new set of them.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@94631 91177308-0d34-0410-b5e6-96231b3b80d8
smPrinter/SparcAsmPrinter.cpp
|
| 4129ccdb7048ac9bc671c4f47e86e9144235000d |
27-Jan-2010 |
Chris Lattner <sabre@nondot.org> |
Switch MSP430, CellSPU, SystemZ, Darwin/PPC, Alpha, and Sparc to
EmitFunctionHeader:
7 files changed, 16 insertions(+), 210 deletions(-)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@94630 91177308-0d34-0410-b5e6-96231b3b80d8
smPrinter/SparcAsmPrinter.cpp
|
| 0c439eb2c8397996cbccaf2798e598052d9982c8 |
27-Jan-2010 |
Evan Cheng <evan.cheng@apple.com> |
Eliminate target hook IsEligibleForTailCallOptimization.
Target independent isel should always pass along the "tail call" property. Change
target hook LowerCall's parameter "isTailCall" into a refernce. If the target
decides it's impossible to honor the tail call request, it should set isTailCall
to false to make target independent isel happy.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@94626 91177308-0d34-0410-b5e6-96231b3b80d8
parcISelLowering.cpp
parcISelLowering.h
|
| cee63322eaccc2f1067bdf5eab506e440f867da1 |
26-Jan-2010 |
Chris Lattner <sabre@nondot.org> |
Eliminate SetDirective, and replace it with HasSetDirective.
Default HasSetDirective to true, since most targets have it.
The targets that claim to not have it probably do, or it is
spelled differently. These include Blackfin, Mips, Alpha, and
PIC16. All of these except pic16 are normal ELF targets, so
they almost certainly have it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@94585 91177308-0d34-0410-b5e6-96231b3b80d8
parcMCAsmInfo.cpp
|
| f71cb015c1386ff8adc9ef0aa03fc0f0fc4a6e3e |
26-Jan-2010 |
Chris Lattner <sabre@nondot.org> |
add a new MachineBasicBlock::getSymbol method, replacing
the AsmPrinter::GetMBBSymbol.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@94515 91177308-0d34-0410-b5e6-96231b3b80d8
smPrinter/SparcAsmPrinter.cpp
|
| 1e459c446786f46ed865183f1c6adb17e2e8fcea |
26-Jan-2010 |
Chris Lattner <sabre@nondot.org> |
don't bother setting the AsmPrinter::MF ivar, now that
AsmPrinter::SetupMachineFunction sets it. Note that systemz
and msp430 didn't. Yay for reduced inconsistency! :)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@94510 91177308-0d34-0410-b5e6-96231b3b80d8
smPrinter/SparcAsmPrinter.cpp
|
| 6c23b1f6febe4ef70ef3b5e95dee4e8e3ae401fb |
25-Jan-2010 |
Chris Lattner <sabre@nondot.org> |
don't set value to its default.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@94411 91177308-0d34-0410-b5e6-96231b3b80d8
parcMCAsmInfo.cpp
|
| 43b5f9312d56be400af031f7487a99b75b7b0f97 |
24-Jan-2010 |
Chris Lattner <sabre@nondot.org> |
make -fno-rtti the default unless a directory builds with REQUIRES_RTTI.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@94378 91177308-0d34-0410-b5e6-96231b3b80d8
smPrinter/Makefile
akefile
argetInfo/Makefile
|
| e73a31f667ad2fe03e25c97ac45b58c30d7f07c3 |
22-Jan-2010 |
Chris Lattner <sabre@nondot.org> |
Stop building RTTI information for *most* llvm libraries. Notable
missing ones are libsupport, libsystem and libvmcore. libvmcore is
currently blocked on bugpoint, which uses EH. Once it stops using
EH, we can switch it off.
This #if 0's out 3 unit tests, because gtest requires RTTI information.
Suggestions welcome on how to fix this.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@94164 91177308-0d34-0410-b5e6-96231b3b80d8
smPrinter/Makefile
akefile
argetInfo/Makefile
|
| 8eeba35babf3114966fc4e6e8522057e46b610db |
20-Jan-2010 |
Chris Lattner <sabre@nondot.org> |
revert 93934, removing the MCAsmInfo endianness bit. I can't
stomache MCAsmInfo having this, and I found a better solution to
this layering issue.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@93985 91177308-0d34-0410-b5e6-96231b3b80d8
parcMCAsmInfo.cpp
|
| c7b8814bb4f2e6052060d6118d3bc3b66f5c5b0b |
19-Jan-2010 |
Chris Lattner <sabre@nondot.org> |
give MCAsmInfo a 'has little endian' bit. This is unfortunate, but
I really want clients of the streamer to be able to say "emit this
64-bit integer" and have it get broken down right by the streamer.
I may change this in the future, we'll see how it works out.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@93934 91177308-0d34-0410-b5e6-96231b3b80d8
parcMCAsmInfo.cpp
|
| 74bfe21b50c14c15f55ce3bd5857d65b588fae3c |
19-Jan-2010 |
Chris Lattner <sabre@nondot.org> |
Now that we have everything nicely factored (e.g. asmprinter is not
doing global variable classification anymore) and hookized, sink almost
all target targets global variable emission code into AsmPrinter and out
of each target.
Some notes:
1. PIC16 does completely custom and crazy stuff, so it is not changed.
2. XCore has some custom handling for extra directives. I'll look at it next.
3. This switches linux/ppc to use .globl instead of .global. If .globl is
actually wrong, let me know and I'll fix it.
4. This makes linux/ppc get a lot of random cases right which were obviously
wrong before, it is probably now a bit healthier.
5. Blackfin will probably start getting .comm and other things that it didn't
before. If this is undesirable, it should explicitly opt out of these
things by clearing the relevant fields of MCAsmInfo.
This leads to a nice diffstat:
14 files changed, 127 insertions(+), 830 deletions(-)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@93858 91177308-0d34-0410-b5e6-96231b3b80d8
smPrinter/SparcAsmPrinter.cpp
|
| 074f837bbb6e21f8df290af60fe226dfaf3bdf35 |
19-Jan-2010 |
Chris Lattner <sabre@nondot.org> |
use %object like other elf targets, gas accepts either.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@93857 91177308-0d34-0410-b5e6-96231b3b80d8
smPrinter/SparcAsmPrinter.cpp
|
| 10b318bcb39218d2ed525e4862c854bc8d1baf63 |
17-Jan-2010 |
Chris Lattner <sabre@nondot.org> |
now that MCSymbol::print doesn't use it's MAI argument, we can
remove it and change all the code that prints MCSymbols to use
<< instead, which is much simpler and cleaner.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@93695 91177308-0d34-0410-b5e6-96231b3b80d8
smPrinter/SparcAsmPrinter.cpp
|
| 9c09363637c43ce7c28898993c32b9a63ded5b46 |
16-Jan-2010 |
Chris Lattner <sabre@nondot.org> |
switch more stuff onto MCSymbols
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@93608 91177308-0d34-0410-b5e6-96231b3b80d8
smPrinter/SparcAsmPrinter.cpp
|
| 4fb69f40bee04a415a92bca2a8ed4a8e72cf980d |
16-Jan-2010 |
Chris Lattner <sabre@nondot.org> |
switch X86 target off CurFunctionName and MCIze more.
Note that the code wasn't calling DecorateCygMingName
when emitting the ".ascii -export" stuff at the end of
file for DLLExported functions. I don't know if it should
or not, but I'm preserving behavior.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@93603 91177308-0d34-0410-b5e6-96231b3b80d8
smPrinter/SparcAsmPrinter.cpp
|
| 12164414dd3daa6974985eeb2e89bfb93cf07641 |
16-Jan-2010 |
Chris Lattner <sabre@nondot.org> |
MCize a bunch more stuff, eliminating a lot of uses of the mangler
and CurrentFnName.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@93594 91177308-0d34-0410-b5e6-96231b3b80d8
smPrinter/SparcAsmPrinter.cpp
|
| 6b04edee11c2bb35a48b1c42f867b4ba8cdfff97 |
16-Jan-2010 |
Chris Lattner <sabre@nondot.org> |
add a AsmPrinter::GetGlobalValueSymbol and GetExternalSymbolSymbol
helper method, use it to simplify some code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@93575 91177308-0d34-0410-b5e6-96231b3b80d8
smPrinter/SparcAsmPrinter.cpp
|
| eeb3a00b84b7767d236ec8cf0619b9217fc247b9 |
05-Jan-2010 |
Dan Gohman <gohman@apple.com> |
Change SelectCode's argument from SDValue to SDNode *, to make it more
clear what information these functions are actually using.
This is also a micro-optimization, as passing a SDNode * around is
simpler than passing a { SDNode *, int } by value or reference.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@92564 91177308-0d34-0410-b5e6-96231b3b80d8
parcISelDAGToDAG.cpp
|
| 735afe14eea8049bf69210ce8a3512e391fc643f |
24-Nov-2009 |
Dan Gohman <gohman@apple.com> |
Remove ISD::DEBUG_LOC and ISD::DBG_LABEL, which are no longer used.
Note that "hasDotLocAndDotFile"-style debug info was already broken;
people wanting this functionality should implement it in the
AsmPrinter/DwarfWriter code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89711 91177308-0d34-0410-b5e6-96231b3b80d8
parcISelLowering.cpp
|
| bef8888a9197655512f156e50b10799da7240252 |
21-Nov-2009 |
Devang Patel <dpatel@apple.com> |
We are not using DBG_STOPPOINT anymore.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89536 91177308-0d34-0410-b5e6-96231b3b80d8
parcISelLowering.cpp
|
| 1924aabf996be9335fab34e7ee4fa2aa5911389c |
13-Nov-2009 |
David Greene <greened@obbligato.org> |
Move DebugInfo checks into EmitComments and remove them from
target-specific AsmPrinters. Not all comments need DebugInfo.
Re-enable the line numbers comment test.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@88697 91177308-0d34-0410-b5e6-96231b3b80d8
smPrinter/SparcAsmPrinter.cpp
|
| b9c2fd964ee7dd7823ac71db8443055e4d0f1c15 |
12-Nov-2009 |
David Greene <greened@obbligato.org> |
Make the MachineFunction argument of getFrameRegister const.
This also fixes a build error.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@87027 91177308-0d34-0410-b5e6-96231b3b80d8
parcRegisterInfo.cpp
parcRegisterInfo.h
|
| 3f2bf85d14759cc4b28a86805f566ac805a54d00 |
12-Nov-2009 |
David Greene <greened@obbligato.org> |
Add a bool flag to StackObjects telling whether they reference spill
slots. The AsmPrinter will use this information to determine whether to
print a spill/reload comment.
Remove default argument values. It's too easy to pass a wrong argument
value when multiple arguments have default values. Make everything
explicit to trap bugs early.
Update all targets to adhere to the new interfaces..
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@87022 91177308-0d34-0410-b5e6-96231b3b80d8
parcISelLowering.cpp
|
| adaace8aa8df16f1fa2b097f32ded38a49d89208 |
11-Nov-2009 |
Dan Gohman <gohman@apple.com> |
Set isBarrier = 1 on return instructions, as they are control barriers.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86851 91177308-0d34-0410-b5e6-96231b3b80d8
parcInstrInfo.td
|
| 59a9178fbedb88427c8ff9e5fa7a8f2038f80a2e |
07-Nov-2009 |
Chris Lattner <sabre@nondot.org> |
indicate what the native integer types for the target are.
Please verify.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86397 91177308-0d34-0410-b5e6-96231b3b80d8
parcTargetMachine.cpp
|
| 73bb251cd7a535fb93bb3a52eda61555fb253f41 |
05-Nov-2009 |
Dan Gohman <gohman@apple.com> |
Remove uninteresting and confusing debug output.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86149 91177308-0d34-0410-b5e6-96231b3b80d8
parcISelDAGToDAG.cpp
|
| 533297b58da8c74bec65551e1aface9801fc2259 |
29-Oct-2009 |
Dan Gohman <gohman@apple.com> |
Rename usesCustomDAGSchedInserter to usesCustomInserter, and update a
bunch of associated comments, because it doesn't have anything to do
with DAGs or scheduling. This is another step in decoupling MachineInstr
emitting from scheduling.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85517 91177308-0d34-0410-b5e6-96231b3b80d8
parcInstrInfo.td
|
| 6726b6d75a8b679068a58cb954ba97cf9d1690ba |
25-Oct-2009 |
Nick Lewycky <nicholas@mxc.ca> |
Remove VISIBILITY_HIDDEN from class/struct found inside anonymous namespaces.
Chris claims we should never have visibility_hidden inside any .cpp file but
that's still not true even after this commit.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85042 91177308-0d34-0410-b5e6-96231b3b80d8
smPrinter/SparcAsmPrinter.cpp
|
| b58f498f7502e7e1833decbbbb4df771367c7341 |
07-Oct-2009 |
Jim Grosbach <grosbach@apple.com> |
Add register-reuse to frame-index register scavenging. When a target uses
a virtual register to eliminate a frame index, it can return that register
and the constant stored there to PEI to track. When scavenging to allocate
for those registers, PEI then tracks the last-used register and value, and
if it is still available and matches the value for the next index, reuses
the existing value rather and removes the re-materialization instructions.
Fancier tracking and adjustment of scavenger allocations to keep more
values live for longer is possible, but not yet implemented and would likely
be better done via a different, less special-purpose, approach to the
problem.
eliminateFrameIndex() is modified so the target implementations can return
the registers they wish to be tracked for reuse.
ARM Thumb1 implements and utilizes the new mechanism. All other targets are
simply modified to adjust for the changed eliminateFrameIndex() prototype.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83467 91177308-0d34-0410-b5e6-96231b3b80d8
parcRegisterInfo.cpp
parcRegisterInfo.h
|
| e3cc3f3c84abfdf8eb3bd19dfa806ceea49f15d6 |
06-Oct-2009 |
Dan Gohman <gohman@apple.com> |
Instead of printing unnecessary basic block labels as labels in
verbose-asm mode, print comments instead. This eliminates a non-comment
difference between verbose-asm mode and non-verbose-asm mode.
Also, factor out the relevant code out of all the targets and into
target-independent code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83392 91177308-0d34-0410-b5e6-96231b3b80d8
smPrinter/SparcAsmPrinter.cpp
|
| af0e2726835e096e32c30c1b88cc7a6232a6ef69 |
06-Oct-2009 |
Devang Patel <dpatel@apple.com> |
Update processDebugLoc() so that it can be used to process debug info before and after printing an instruction.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83363 91177308-0d34-0410-b5e6-96231b3b80d8
smPrinter/SparcAsmPrinter.cpp
|
| b0fdedb3fd123a47e7deca75d1e6f7d64218b07a |
01-Oct-2009 |
Devang Patel <dpatel@apple.com> |
Use MachineInstr as an processDebugLoc() argument.
This will allow processDebugLoc() to handle scopes for DWARF debug info.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83183 91177308-0d34-0410-b5e6-96231b3b80d8
smPrinter/SparcAsmPrinter.cpp
|
| 602b0c8c17f458d2c80f2deb3c8e554d516ee316 |
25-Sep-2009 |
Dan Gohman <gohman@apple.com> |
Rename getTargetNode to getMachineNode, for consistency with the
naming scheme used in SelectionDAG, where there are multiple kinds
of "target" nodes, but "machine" nodes are nodes which represent
a MachineInstr.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@82790 91177308-0d34-0410-b5e6-96231b3b80d8
parcISelDAGToDAG.cpp
|
| ce31910eae5bd4896fa6c27798e7b26885691d3b |
19-Sep-2009 |
Evan Cheng <evan.cheng@apple.com> |
Fix PR4926. When target hook EmitInstrWithCustomInserter() insert new basic blocks and update CFG, it should also inform sdisel of the changes so the phi source operands will come from the right basic blocks.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@82311 91177308-0d34-0410-b5e6-96231b3b80d8
parcISelLowering.cpp
|
| fb2e752e4175920d0531f2afc93a23d0cdf4db14 |
18-Sep-2009 |
Evan Cheng <evan.cheng@apple.com> |
Enhance EmitInstrWithCustomInserter() so target can specify CFG changes that sdisel will use to properly complete phi nodes.
Not functionality change yet.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@82273 91177308-0d34-0410-b5e6-96231b3b80d8
parcISelLowering.cpp
parcISelLowering.h
|
| ea7fd966985ebb7063c8a003d8d344e91644eb86 |
15-Sep-2009 |
Chris Lattner <sabre@nondot.org> |
add missing file
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@81881 91177308-0d34-0410-b5e6-96231b3b80d8
parcMachineFunctionInfo.h
|
| db486a6d5311944f61b92db9f6074944dbbdb242 |
15-Sep-2009 |
Chris Lattner <sabre@nondot.org> |
several major improvements to the sparc backend: support for weak linkage
and PIC codegen. Patch by Venkatraman Govindaraju!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@81877 91177308-0d34-0410-b5e6-96231b3b80d8
smPrinter/SparcAsmPrinter.cpp
parcISelDAGToDAG.cpp
parcISelLowering.cpp
parcISelLowering.h
parcInstrInfo.cpp
parcInstrInfo.h
parcInstrInfo.td
parcRegisterInfo.td
|
| f5382ab5180c4051737367ed9cacbab697be29de |
13-Sep-2009 |
Daniel Dunbar <daniel@zuster.org> |
Remove unused variables.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@81718 91177308-0d34-0410-b5e6-96231b3b80d8
smPrinter/SparcAsmPrinter.cpp
|
| 762ccea600158bb317dcccdff3303e942426cb71 |
13-Sep-2009 |
Chris Lattner <sabre@nondot.org> |
remove all but one reference to TargetRegisterDesc::AsmName.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@81714 91177308-0d34-0410-b5e6-96231b3b80d8
smPrinter/SparcAsmPrinter.cpp
|
| d95148f073c31924f275a34296da52a7cdefad91 |
13-Sep-2009 |
Chris Lattner <sabre@nondot.org> |
the tblgen produced 'getRegisterName' method does not access
the object, make it static instead of const.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@81711 91177308-0d34-0410-b5e6-96231b3b80d8
smPrinter/SparcAsmPrinter.cpp
|
| 05af2616d0df19638e799d3e7afadea26d96a4ba |
13-Sep-2009 |
Chris Lattner <sabre@nondot.org> |
make tblgen produce a function that returns the name for a physreg.
Nothing is using this info yet.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@81707 91177308-0d34-0410-b5e6-96231b3b80d8
smPrinter/SparcAsmPrinter.cpp
|
| 70a54c07a0807bf89d1a8b4414e53298c376eb61 |
13-Sep-2009 |
Chris Lattner <sabre@nondot.org> |
replace printBasicBlockLabel with EmitBasicBlockStart,
now that printBasicBlockLabel is only used for starting
a MBB. This allows elimination of a bunch of arguments.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@81684 91177308-0d34-0410-b5e6-96231b3b80d8
smPrinter/SparcAsmPrinter.cpp
|
| 325d3dcfe4d5efc91db0f59b20a72a11dea024ed |
13-Sep-2009 |
Chris Lattner <sabre@nondot.org> |
convert some uses of printBasicBlockLabel to use GetMBBSymbol
instead.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@81677 91177308-0d34-0410-b5e6-96231b3b80d8
smPrinter/SparcAsmPrinter.cpp
|
| c5ea263a23f4f15587e35c9cb07cf72a9fba7613 |
10-Sep-2009 |
Chris Lattner <sabre@nondot.org> |
remove DebugLoc from MCInst and eliminate "Comment printing" from
the MCInst path of the asmprinter. Instead, pull comment printing
out of the autogenerated asmprinter into each target that uses the
autogenerated asmprinter. This causes code duplication into each
target, but in a way that will be easier to clean up later when more
asmprinter stuff is commonized into the base AsmPrinter class.
This also fixes an xcore strangeness where it inserted two tabs
before every instruction.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@81396 91177308-0d34-0410-b5e6-96231b3b80d8
smPrinter/SparcAsmPrinter.cpp
|
| 634cca377a8254cfe8a5afe99ef2e6c6db7f0c6b |
09-Sep-2009 |
Chris Lattner <sabre@nondot.org> |
hoist the call to processDebugLoc out of the generated
asm printer into the "printInstruction" routine. This
fixes a problem where the experimental asmprinter would
drop debug labels in some cases, and fixes issues on ppc/xcore
where pseudo instructions like "mr" didn't get debug locs properly.
It is annoying that this moves the call from one place into each
target, but a future set of more invasive refactorings will fix
that problem.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@81377 91177308-0d34-0410-b5e6-96231b3b80d8
smPrinter/SparcAsmPrinter.cpp
|
| 930e4d96e8718abcb56212676c35e6f7ea0ab605 |
08-Sep-2009 |
Richard Pennington <rich@pennware.com> |
Add source debug information to the Sparc code generator.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@81215 91177308-0d34-0410-b5e6-96231b3b80d8
smPrinter/SparcAsmPrinter.cpp
parcMCAsmInfo.cpp
parcRegisterInfo.cpp
|
| 65c3c8f323198b99b88b109654194540cf9b3fa5 |
02-Sep-2009 |
Sandeep Patel <deeppatel1987@gmail.com> |
Retype from unsigned to CallingConv::ID accordingly. Approved by Bob Wilson.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@80773 91177308-0d34-0410-b5e6-96231b3b80d8
parcISelLowering.cpp
parcISelLowering.h
|
| b4f770b68a2f1890e17f634b695d19bb7d07168d |
31-Aug-2009 |
Benjamin Kramer <benny.kra@googlemail.com> |
Normalize makefile comments and sort cmake file lists.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@80584 91177308-0d34-0410-b5e6-96231b3b80d8
smPrinter/Makefile
MakeLists.txt
|
| eb2aa096bb8aba742b87a99d561185bb3f8863c5 |
26-Aug-2009 |
Venkatraman Govindaraju <venkatra@cs.wisc.edu> |
Generate section for bss and enable weak symbols
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@80121 91177308-0d34-0410-b5e6-96231b3b80d8
parcMCAsmInfo.cpp
|
| 765e08d4d5dc3111f547d71da89f58e4e03d295f |
26-Aug-2009 |
Venkatraman Govindaraju <venkatra@cs.wisc.edu> |
test commit
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@80070 91177308-0d34-0410-b5e6-96231b3b80d8
parcInstrInfo.td
|
| 705e07f578e2b3af47ddab610feb4e7f2d3063a5 |
23-Aug-2009 |
Chris Lattner <sabre@nondot.org> |
remove various std::ostream version of printing methods from
MachineInstr and MachineOperand. This required eliminating a
bunch of stuff that was using DOUT, I hope that bill doesn't
mind me stealing his fun. ;-)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79813 91177308-0d34-0410-b5e6-96231b3b80d8
PMover.cpp
|
| f682f3d019794d4402b73701a06a4bb117f5d5e7 |
23-Aug-2009 |
Benjamin Kramer <benny.kra@googlemail.com> |
Forgot to update some CMakeLists.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79780 91177308-0d34-0410-b5e6-96231b3b80d8
MakeLists.txt
|
| 33adcfb4d217f5f23d9bde8ba02b8e48f9605fc5 |
22-Aug-2009 |
Chris Lattner <sabre@nondot.org> |
rename TAI -> MAI, being careful not to make MAILJMP instructions :)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79777 91177308-0d34-0410-b5e6-96231b3b80d8
smPrinter/SparcAsmPrinter.cpp
|
| af76e592c7f9deff0e55c13dbb4a34f07f1c7f64 |
22-Aug-2009 |
Chris Lattner <sabre@nondot.org> |
Rename TargetAsmInfo (and its subclasses) to MCAsmInfo.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79763 91177308-0d34-0410-b5e6-96231b3b80d8
smPrinter/SparcAsmPrinter.cpp
parcMCAsmInfo.cpp
parcMCAsmInfo.h
parcTargetAsmInfo.cpp
parcTargetAsmInfo.h
parcTargetMachine.cpp
|
| 24f20e083280d979e8fa1bc88959ae9e8339ee99 |
22-Aug-2009 |
Devang Patel <dpatel@apple.com> |
Record variable debug info at ISel time directly.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79742 91177308-0d34-0410-b5e6-96231b3b80d8
parcISelLowering.cpp
|
| 6c2f9e14fdf14d8c1c687c6bd9918183fa7f8a7f |
19-Aug-2009 |
Chris Lattner <sabre@nondot.org> |
eliminate AsmPrinter::SwitchToSection and just have clients
talk to the MCStreamer directly instead.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79405 91177308-0d34-0410-b5e6-96231b3b80d8
smPrinter/SparcAsmPrinter.cpp
|
| a7ac47cee1a0b3f4c798ecaa22ecf9d1be9c07e6 |
12-Aug-2009 |
Chris Lattner <sabre@nondot.org> |
Change TargetAsmInfo to be constructed via TargetRegistry from a Target+Triple
pair instead of from a virtual method on TargetMachine. This cuts the final
ties of TargetAsmInfo to TargetMachine, meaning that MC can now use
TargetAsmInfo.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78802 91177308-0d34-0410-b5e6-96231b3b80d8
parcTargetAsmInfo.cpp
parcTargetAsmInfo.h
parcTargetMachine.cpp
parcTargetMachine.h
|
| 825b72b0571821bf2d378749f69d6c4cfb52d2f9 |
11-Aug-2009 |
Owen Anderson <resistor@mac.com> |
Split EVT into MVT and EVT, the former representing _just_ a primitive type, while
the latter is capable of representing either a primitive or an extended type.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78713 91177308-0d34-0410-b5e6-96231b3b80d8
parcISelDAGToDAG.cpp
parcISelLowering.cpp
parcInstrInfo.td
|
| 0a31d2f6456069adba19b8aeca66c68b633c38b4 |
11-Aug-2009 |
Chris Lattner <sabre@nondot.org> |
pass the TargetTriple down from each target ctor to the
LLVMTargetMachine ctor. It is currently unused.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78711 91177308-0d34-0410-b5e6-96231b3b80d8
parcTargetMachine.cpp
|
| e50ed30282bb5b4a9ed952580523f2dda16215ac |
11-Aug-2009 |
Owen Anderson <resistor@mac.com> |
Rename MVT to EVT, in preparation for splitting SimpleValueType out into its own struct type.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78610 91177308-0d34-0410-b5e6-96231b3b80d8
parcISelDAGToDAG.cpp
parcISelLowering.cpp
parcISelLowering.h
parcInstrInfo.td
|
| 5277b22687d3513dd29d5a9c8510cac740f933f6 |
08-Aug-2009 |
Chris Lattner <sabre@nondot.org> |
eliminate TargetLoweringObjectFileSparc in favor of a TAI hook.
A TAI hook is appropriate in this case because this is just an
asm syntax issue, not a semantic difference. TLOF should model
the semantics of the section.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78498 91177308-0d34-0410-b5e6-96231b3b80d8
parcISelLowering.cpp
parcTargetAsmInfo.cpp
|
| 41aefdcdd1c1631041834d53ffada106a5cfaf02 |
08-Aug-2009 |
Chris Lattner <sabre@nondot.org> |
make printInstruction return void since its result is omitted. Make the
error condition get trapped with an assert.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78449 91177308-0d34-0410-b5e6-96231b3b80d8
smPrinter/SparcAsmPrinter.cpp
|
| 7db949df789383acce98ef072f08794fdd5bd04e |
07-Aug-2009 |
Dan Gohman <gohman@apple.com> |
Fix a bunch of namespace pollution.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78363 91177308-0d34-0410-b5e6-96231b3b80d8
parcISelLowering.cpp
|
| bccdcb1857f400206ed07984dc04e229c6013cc6 |
05-Aug-2009 |
Devang Patel <dpatel@apple.com> |
Remove dead code. MDNode and MDString are not Constant anymore.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78207 91177308-0d34-0410-b5e6-96231b3b80d8
smPrinter/SparcAsmPrinter.cpp
|
| 98ca4f2a325f72374a477f9deba7d09e8999c29b |
05-Aug-2009 |
Dan Gohman <gohman@apple.com> |
Major calling convention code refactoring.
Instead of awkwardly encoding calling-convention information with ISD::CALL,
ISD::FORMAL_ARGUMENTS, ISD::RET, and ISD::ARG_FLAGS nodes, TargetLowering
provides three virtual functions for targets to override:
LowerFormalArguments, LowerCall, and LowerRet, which replace the custom
lowering done on the special nodes. They provide the same information, but
in a more immediately usable format.
This also reworks much of the target-independent tail call logic. The
decision of whether or not to perform a tail call is now cleanly split
between target-independent portions, and the target dependent portion
in IsEligibleForTailCallOptimization.
This also synchronizes all in-tree targets, to help enable future
refactoring and feature work.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78142 91177308-0d34-0410-b5e6-96231b3b80d8
parcISelLowering.cpp
parcISelLowering.h
parcInstrInfo.td
|
| e28039cfd1a9c43b5fa9274bf19372d96f58f460 |
03-Aug-2009 |
Daniel Dunbar <daniel@zuster.org> |
Move most targets TargetMachine constructor to only taking a target triple.
- The C, C++, MSIL, and Mips backends still need the module.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77927 91177308-0d34-0410-b5e6-96231b3b80d8
parcTargetMachine.cpp
parcTargetMachine.h
|
| 3be03406c9c3b2075d5ae416499af2f15f703d6f |
03-Aug-2009 |
Daniel Dunbar <daniel@zuster.org> |
Normalize Subtarget constructors to take a target triple string instead of
Module*.
Also, dropped uses of TargetMachine where unnecessary. The only target which
still takes a TargetMachine& is Mips, I would appreciate it if someone would
normalize this to match other targets.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77918 91177308-0d34-0410-b5e6-96231b3b80d8
parcSubtarget.cpp
parcSubtarget.h
parcTargetMachine.cpp
|
| ba8e7401fb1cc27445a2fef6600335a93879a36d |
02-Aug-2009 |
Chris Lattner <sabre@nondot.org> |
eliminate TargetMAchine argument to sparc TAI
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77864 91177308-0d34-0410-b5e6-96231b3b80d8
parcTargetAsmInfo.cpp
parcTargetAsmInfo.h
parcTargetMachine.cpp
|
| 8d4a0a328a89d1f3c7ad83048e04ace53b6ba781 |
02-Aug-2009 |
Chris Lattner <sabre@nondot.org> |
remove TargetAsmInfo::TM, which is now dead. The basic TAI class now
no longer depends on TM!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77863 91177308-0d34-0410-b5e6-96231b3b80d8
parcTargetAsmInfo.cpp
parcTargetAsmInfo.h
|
| b80610cd13e7accf6db0924c75d0914bf566922b |
02-Aug-2009 |
Chris Lattner <sabre@nondot.org> |
REmove dead fields of TAI.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77820 91177308-0d34-0410-b5e6-96231b3b80d8
parcTargetAsmInfo.cpp
|
| d5f02f65afb532c7a27c88dc0e690b33c228caab |
31-Jul-2009 |
Daniel Dunbar <daniel@zuster.org> |
Normalize target registration code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77692 91177308-0d34-0410-b5e6-96231b3b80d8
argetInfo/SparcTargetInfo.cpp
|
| e53a600f065075731d0aeb9dc8f4f3d75f5a05f8 |
29-Jul-2009 |
Chris Lattner <sabre@nondot.org> |
pass the mangler down into the various SectionForGlobal methods.
No functionality change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77432 91177308-0d34-0410-b5e6-96231b3b80d8
smPrinter/SparcAsmPrinter.cpp
|
| 0a9f7b9c3ebe7d0ec033462e1a7c9101279956f9 |
28-Jul-2009 |
Devang Patel <dpatel@apple.com> |
Rename MDNode.h header. It defines MDnode and other metadata classes.
New name is Metadata.h.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77370 91177308-0d34-0410-b5e6-96231b3b80d8
smPrinter/SparcAsmPrinter.cpp
|
| f0144127b98425d214e59e4a1a4b342b78e3642b |
28-Jul-2009 |
Chris Lattner <sabre@nondot.org> |
Rip all of the global variable lowering logic out of TargetAsmInfo. Since
it is highly specific to the object file that will be generated in the end,
this introduces a new TargetLoweringObjectFile interface that is implemented
for each of ELF/MachO/COFF/Alpha/PIC16 and XCore.
Though still is still a brutal and ugly refactoring, this is a major step
towards goodness.
This patch also:
1. fixes a bunch of dangling pointer problems in the PIC16 backend.
2. disables the TargetLowering copy ctor which PIC16 was accidentally using.
3. gets us closer to xcore having its own crazy target section flags and
pic16 not having to shadow sections with its own objects.
4. fixes wierdness where ELF targets would set CStringSection but not
CStringSection_. Factor the code better.
5. fixes some bugs in string lowering on ELF targets.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77294 91177308-0d34-0410-b5e6-96231b3b80d8
smPrinter/SparcAsmPrinter.cpp
parcISelLowering.cpp
parcTargetAsmInfo.cpp
parcTargetAsmInfo.h
|
| e346694a81cbead3289d11057111fba46aa30aae |
27-Jul-2009 |
Chris Lattner <sabre@nondot.org> |
Eliminate getNamed/getUnnamedSection, adding a new and unified getOrCreateSection
instead.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77186 91177308-0d34-0410-b5e6-96231b3b80d8
parcTargetAsmInfo.cpp
|
| 5fe575ff4fdefc1b003a009b1b9282526a26c237 |
27-Jul-2009 |
Chris Lattner <sabre@nondot.org> |
Eliminate SectionFlags, just embed a SectionKind into Section
instead and drive things based off of that.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77184 91177308-0d34-0410-b5e6-96231b3b80d8
parcTargetAsmInfo.cpp
parcTargetAsmInfo.h
|
| 0fcf4dc6d367216ff51501af282e33e93da8586f |
26-Jul-2009 |
Chris Lattner <sabre@nondot.org> |
untangle a TargetAsmInfo hack where ELFTargetAsmInfo would create a
'unnamed' bss section, but some impls would want a named one. Since
they don't have consistent behavior, just make each target do their
own thing, instead of doing something "sortof common" then having
targets change immutable objects later.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77165 91177308-0d34-0410-b5e6-96231b3b80d8
parcTargetAsmInfo.cpp
parcTargetAsmInfo.h
|
| f40761d5229322c08701049f89aa10f7f7b8b743 |
26-Jul-2009 |
Chris Lattner <sabre@nondot.org> |
remove a densemap from TargetAsmInfo that was uniquing the targetflags strings,
just use a smallstring instead.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77144 91177308-0d34-0410-b5e6-96231b3b80d8
parcTargetAsmInfo.cpp
parcTargetAsmInfo.h
|
| 8977d087c693fd581db82bcff134d12da0f48bd3 |
26-Jul-2009 |
Daniel Dunbar <daniel@zuster.org> |
Factor commonality in triple match routines into helper template for registering
classes, and migrate existing targets over.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77126 91177308-0d34-0410-b5e6-96231b3b80d8
argetInfo/SparcTargetInfo.cpp
|
| fa27ff296d3694a68e7abb3b6b7629588def3e58 |
26-Jul-2009 |
Daniel Dunbar <daniel@zuster.org> |
Kill Target specific ModuleMatchQuality stuff.
- This was overkill and inconsistently implemented.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77114 91177308-0d34-0410-b5e6-96231b3b80d8
argetInfo/SparcTargetInfo.cpp
|
| b4fc419d83bc4afc8ce5a204dd226d5ae58f5896 |
25-Jul-2009 |
Chris Lattner <sabre@nondot.org> |
this is (unfortunately) several changes mixed together:
1. Spell SectionFlags::Writeable as "Writable".
2. Add predicates for deriving SectionFlags from SectionKinds.
3. Sink ELF-specific getSectionPrefixForUniqueGlobal impl into
ELFTargetAsmInfo.
4. Fix SectionFlagsForGlobal to know that BSS/ThreadBSS has the
BSS bit set (the real fix for PR4619).
5. Fix isSuitableForBSS to not put globals with explicit sections
set in BSS (which was the reason #4 wasn't fixed earlier).
6. Remove my previous hack for PR4619.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77085 91177308-0d34-0410-b5e6-96231b3b80d8
parcTargetAsmInfo.cpp
|
| d6fd377f3333922c4e928019cdfa124ff7f4dd2e |
25-Jul-2009 |
Daniel Dunbar <daniel@zuster.org> |
Simplify JIT target selection.
- Instead of requiring targets to define a JIT quality match function, we just
have them specify if they support a JIT.
- Target selection for the JIT just gets the host triple and looks for the best
target which matches the triple and has a JIT.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77060 91177308-0d34-0410-b5e6-96231b3b80d8
argetInfo/SparcTargetInfo.cpp
|
| 0c795d61878156817cedbac51ec2921f2634c1a5 |
25-Jul-2009 |
Daniel Dunbar <daniel@zuster.org> |
Add new helpers for registering targets.
- Less boilerplate == good.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77052 91177308-0d34-0410-b5e6-96231b3b80d8
smPrinter/SparcAsmPrinter.cpp
parc.h
parcTargetMachine.cpp
|
| 23ed52752bb40a9085c9d36bbc6603972c3e0080 |
24-Jul-2009 |
Eli Friedman <eli.friedman@gmail.com> |
Remove unused member functions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76960 91177308-0d34-0410-b5e6-96231b3b80d8
parcInstrInfo.cpp
parcInstrInfo.h
|
| e922c0201916e0b980ab3cfe91e1413e68d55647 |
22-Jul-2009 |
Owen Anderson <resistor@mac.com> |
Get rid of the Pass+Context magic.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76702 91177308-0d34-0410-b5e6-96231b3b80d8
parcISelLowering.cpp
|
| 40bbebde9d250b875a47a688d0c6552834ada48f |
21-Jul-2009 |
Chris Lattner <sabre@nondot.org> |
make AsmPrinter::doFinalization iterate over the global variables
and call PrintGlobalVariable, allowing elimination and simplification
of various targets.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76604 91177308-0d34-0410-b5e6-96231b3b80d8
smPrinter/SparcAsmPrinter.cpp
|
| d3ffc0617402f3111f55bbb86d2fb121669fe680 |
21-Jul-2009 |
Chris Lattner <sabre@nondot.org> |
fix Sparc, SystemZ, and MSP430 to not override AsmPrinter::doInitialization.
This eliminates redundancy setting up the mangler and adds support to them
for module-level inline asm and a .file directive.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76592 91177308-0d34-0410-b5e6-96231b3b80d8
smPrinter/SparcAsmPrinter.cpp
|
| 90f8b7073dd472afb21bc33be0f24391e7a4505b |
21-Jul-2009 |
Chris Lattner <sabre@nondot.org> |
Rename LessPrivateGlobalPrefix -> LinkerPrivateGlobalPrefix to match the
LLVM IR concept.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76590 91177308-0d34-0410-b5e6-96231b3b80d8
smPrinter/SparcAsmPrinter.cpp
|
| 4cef584860acbde1d71157564e0d5f6f935b38a6 |
20-Jul-2009 |
Bill Wendling <isanbard@gmail.com> |
Pass in the unfortunately named "LessPrivatePrefix" for the
"LinkerPrivatePrefix". It seems to have been used in only one place before I
started this "linker_private" business. I'm thinking that a rename is in
order...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76479 91177308-0d34-0410-b5e6-96231b3b80d8
smPrinter/SparcAsmPrinter.cpp
|
| 3d10a5a75794356a0a568ce283713adc3a963200 |
20-Jul-2009 |
Bill Wendling <isanbard@gmail.com> |
Add plumbing for the `linker_private' linkage type. This type is meant for
"private" symbols which the assember shouldn't strip, but which the linker may
remove after evaluation. This is mostly useful for Objective-C metadata.
This is plumbing, so we don't have a use of it yet. More to come, etc.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76385 91177308-0d34-0410-b5e6-96231b3b80d8
smPrinter/SparcAsmPrinter.cpp
|
| a786c7b90cfacf1c36c975ad35c3b793c232e3d8 |
19-Jul-2009 |
Eli Friedman <eli.friedman@gmail.com> |
Don't override LowerArguments in the SPARC backend. In addition to
being more consistent with other backends, this makes the SPARC backend
deal with functions with arguments with illegal types correctly, which
fixes some tests in test/CodeGen/Generic.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76375 91177308-0d34-0410-b5e6-96231b3b80d8
parcISelLowering.cpp
parcISelLowering.h
|
| b384c85877d9fd3e9f3ae8d1b68c7c610bc5a1f4 |
19-Jul-2009 |
Daniel Dunbar <daniel@zuster.org> |
Add dependencies from TargetInfo onto .td generation.
- Shouldn't really be necessary, but currently .inc files get included into
some main target headers.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76349 91177308-0d34-0410-b5e6-96231b3b80d8
argetInfo/CMakeLists.txt
|
| 4cb1e13769856716261a4d315f8202bd918502c3 |
19-Jul-2009 |
Daniel Dunbar <daniel@zuster.org> |
Put Target definitions inside Target specific header, and llvm namespace.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76344 91177308-0d34-0410-b5e6-96231b3b80d8
smPrinter/SparcAsmPrinter.cpp
parc.h
parcTargetMachine.cpp
argetInfo/SparcTargetInfo.cpp
|
| 5d77cad60bd82dfa2d00f78e26443d667922efbf |
16-Jul-2009 |
Daniel Dunbar <daniel@zuster.org> |
Lift addAssemblyEmitter into LLVMTargetMachine.
- No functionality change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75859 91177308-0d34-0410-b5e6-96231b3b80d8
parcTargetMachine.cpp
parcTargetMachine.h
|
| f05522974b3c1b9dc2644831364e19d5132e751b |
16-Jul-2009 |
Daniel Dunbar <daniel@zuster.org> |
Remove old style hacks to register AsmPrinter into TargetMachine.
- No intended functionality change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75843 91177308-0d34-0410-b5e6-96231b3b80d8
smPrinter/SparcAsmPrinter.cpp
parcTargetMachine.cpp
parcTargetMachine.h
|
| 51b198af83cb0080c2709b04c129a3d774c07765 |
15-Jul-2009 |
Daniel Dunbar <daniel@zuster.org> |
Reapply TargetRegistry refactoring commits.
--- Reverse-merging r75799 into '.':
U test/Analysis/PointerTracking
U include/llvm/Target/TargetMachineRegistry.h
U include/llvm/Target/TargetMachine.h
U include/llvm/Target/TargetRegistry.h
U include/llvm/Target/TargetSelect.h
U tools/lto/LTOCodeGenerator.cpp
U tools/lto/LTOModule.cpp
U tools/llc/llc.cpp
U lib/Target/PowerPC/PPCTargetMachine.h
U lib/Target/PowerPC/AsmPrinter/PPCAsmPrinter.cpp
U lib/Target/PowerPC/PPCTargetMachine.cpp
U lib/Target/PowerPC/PPC.h
U lib/Target/ARM/ARMTargetMachine.cpp
U lib/Target/ARM/AsmPrinter/ARMAsmPrinter.cpp
U lib/Target/ARM/ARMTargetMachine.h
U lib/Target/ARM/ARM.h
U lib/Target/XCore/XCoreTargetMachine.cpp
U lib/Target/XCore/XCoreTargetMachine.h
U lib/Target/PIC16/PIC16TargetMachine.cpp
U lib/Target/PIC16/PIC16TargetMachine.h
U lib/Target/Alpha/AsmPrinter/AlphaAsmPrinter.cpp
U lib/Target/Alpha/AlphaTargetMachine.cpp
U lib/Target/Alpha/AlphaTargetMachine.h
U lib/Target/X86/X86TargetMachine.h
U lib/Target/X86/X86.h
U lib/Target/X86/AsmPrinter/X86ATTAsmPrinter.h
U lib/Target/X86/AsmPrinter/X86AsmPrinter.cpp
U lib/Target/X86/AsmPrinter/X86IntelAsmPrinter.h
U lib/Target/X86/X86TargetMachine.cpp
U lib/Target/MSP430/MSP430TargetMachine.cpp
U lib/Target/MSP430/MSP430TargetMachine.h
U lib/Target/CppBackend/CPPTargetMachine.h
U lib/Target/CppBackend/CPPBackend.cpp
U lib/Target/CBackend/CTargetMachine.h
U lib/Target/CBackend/CBackend.cpp
U lib/Target/TargetMachine.cpp
U lib/Target/IA64/IA64TargetMachine.cpp
U lib/Target/IA64/AsmPrinter/IA64AsmPrinter.cpp
U lib/Target/IA64/IA64TargetMachine.h
U lib/Target/IA64/IA64.h
U lib/Target/MSIL/MSILWriter.cpp
U lib/Target/CellSPU/SPUTargetMachine.h
U lib/Target/CellSPU/SPU.h
U lib/Target/CellSPU/AsmPrinter/SPUAsmPrinter.cpp
U lib/Target/CellSPU/SPUTargetMachine.cpp
U lib/Target/Mips/AsmPrinter/MipsAsmPrinter.cpp
U lib/Target/Mips/MipsTargetMachine.cpp
U lib/Target/Mips/MipsTargetMachine.h
U lib/Target/Mips/Mips.h
U lib/Target/Sparc/AsmPrinter/SparcAsmPrinter.cpp
U lib/Target/Sparc/SparcTargetMachine.cpp
U lib/Target/Sparc/SparcTargetMachine.h
U lib/ExecutionEngine/JIT/TargetSelect.cpp
U lib/Support/TargetRegistry.cpp
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75820 91177308-0d34-0410-b5e6-96231b3b80d8
smPrinter/SparcAsmPrinter.cpp
parcTargetMachine.cpp
parcTargetMachine.h
|
| 2286f8dc4cec0625f7d7a14e2570926cf8599646 |
15-Jul-2009 |
Stuart Hastings <stuart@apple.com> |
Revert 75762, 75763, 75766..75769, 75772..75775, 75778, 75780, 75782 to repair broken LLVM-GCC build.
Will revert 75770 in the llvm-gcc trunk.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75799 91177308-0d34-0410-b5e6-96231b3b80d8
smPrinter/SparcAsmPrinter.cpp
parcTargetMachine.cpp
parcTargetMachine.h
|
| 6c05796294a7a0693d96c0c87194b9d5ddf55a94 |
15-Jul-2009 |
Daniel Dunbar <daniel@zuster.org> |
Kill off old (TargetMachine level, not Target level) match quality functions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75780 91177308-0d34-0410-b5e6-96231b3b80d8
parcTargetMachine.cpp
parcTargetMachine.h
|
| 03f4bc5d6cf777c8aa559c299ef7f85126872881 |
15-Jul-2009 |
Daniel Dunbar <daniel@zuster.org> |
Provide TargetMachine implementations with reference to Target they were created
from.
- This commit is almost entirely propogating the reference through the
TargetMachine subclasses' constructor calls.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75778 91177308-0d34-0410-b5e6-96231b3b80d8
parcTargetMachine.cpp
parcTargetMachine.h
|
| 4246790aa84a530b0378d917023584c2c7adb4a9 |
15-Jul-2009 |
Daniel Dunbar <daniel@zuster.org> |
Register Target's TargetMachine and AsmPrinter in the new registry.
- This abuses TargetMachineRegistry's constructor for now, this will get
cleaned up in time.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75762 91177308-0d34-0410-b5e6-96231b3b80d8
smPrinter/SparcAsmPrinter.cpp
parcTargetMachine.cpp
|
| c984df8602a8b2450cbdb6ff55fd49ba709a391e |
15-Jul-2009 |
Daniel Dunbar <daniel@zuster.org> |
Add TargetInfo libraries for all targets.
- Intended to match current TargetMachine implementations.
- No facilities for linking these in yet.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75751 91177308-0d34-0410-b5e6-96231b3b80d8
akefile
argetInfo/CMakeLists.txt
argetInfo/Makefile
argetInfo/SparcTargetInfo.cpp
|
| 71847813bc419f7a0667468136a07429c6d9f164 |
14-Jul-2009 |
David Greene <greened@obbligato.org> |
Have asm printers use formatted_raw_ostream directly to avoid a
dynamic_cast<>.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75670 91177308-0d34-0410-b5e6-96231b3b80d8
smPrinter/SparcAsmPrinter.cpp
parc.h
parcTargetMachine.cpp
parcTargetMachine.h
|
| b8158acc23f5f0bf235fb1c6a8182a38ec9b00b2 |
14-Jul-2009 |
Chris Lattner <sabre@nondot.org> |
Reapply my previous asmprinter changes now with more testing and two
additional bug fixes:
1. The bug that everyone hit was a problem in the asmprinter where it
would remove $stub but keep the L prefix on a name when emitting the
indirect symbol. This is easy to fix by keeping the name of the stub
and the name of the symbol in a StringMap instead of just keeping a
StringSet and trying to reconstruct it late.
2. There was a problem printing the personality function. The current
logic to print out the personality function from the DWARF information
is a bit of a cesspool right now that duplicates a bunch of other
logic in the asm printer. The short version of it is that it depends
on emitting both the L and _ prefix for symbols (at least on darwin)
and until I can untangle it, it is best to switch the mangler back to
emitting both prefixes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75646 91177308-0d34-0410-b5e6-96231b3b80d8
smPrinter/SparcAsmPrinter.cpp
|
| c23197a26f34f559ea9797de51e187087c039c42 |
14-Jul-2009 |
Torok Edwin <edwintorok@gmail.com> |
llvm_unreachable->llvm_unreachable(0), LLVM_UNREACHABLE->llvm_unreachable.
This adds location info for all llvm_unreachable calls (which is a macro now) in
!NDEBUG builds.
In NDEBUG builds location info and the message is off (it only prints
"UREACHABLE executed").
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75640 91177308-0d34-0410-b5e6-96231b3b80d8
smPrinter/SparcAsmPrinter.cpp
PMover.cpp
parc.h
parcISelLowering.cpp
parcInstrInfo.cpp
parcRegisterInfo.cpp
|
| 192957d376923cefc993c1b5c04127c42f1008ec |
14-Jul-2009 |
Daniel Dunbar <daniel@zuster.org> |
Revert r75615, which depended on 75610.
--- Reverse-merging r75615 into '.':
U lib/Target/XCore/XCoreAsmPrinter.cpp
U lib/Target/PIC16/PIC16AsmPrinter.cpp
U lib/Target/X86/AsmPrinter/X86IntelAsmPrinter.cpp
U lib/Target/MSP430/MSP430AsmPrinter.cpp
U lib/Target/IA64/AsmPrinter/IA64AsmPrinter.cpp
U lib/Target/CellSPU/AsmPrinter/SPUAsmPrinter.cpp
U lib/Target/ARM/AsmPrinter/ARMAsmPrinter.cpp
U lib/Target/PowerPC/AsmPrinter/PPCAsmPrinter.cpp
U lib/Target/Alpha/AsmPrinter/AlphaAsmPrinter.cpp
U lib/Target/MSIL/MSILWriter.cpp
U lib/Target/Sparc/AsmPrinter/SparcAsmPrinter.cpp
U lib/Target/Mips/AsmPrinter/MipsAsmPrinter.cpp
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75637 91177308-0d34-0410-b5e6-96231b3b80d8
smPrinter/SparcAsmPrinter.cpp
|
| b09d2ccc0f23107fc1047694ce266a9cf5e0a3c2 |
14-Jul-2009 |
Chris Lattner <sabre@nondot.org> |
Rename getValueName -> getMangledName.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75615 91177308-0d34-0410-b5e6-96231b3b80d8
smPrinter/SparcAsmPrinter.cpp
|
| c25e7581b9b8088910da31702d4ca21c4734c6d7 |
11-Jul-2009 |
Torok Edwin <edwintorok@gmail.com> |
assert(0) -> LLVM_UNREACHABLE.
Make llvm_unreachable take an optional string, thus moving the cerr<< out of
line.
LLVM_UNREACHABLE is now a simple wrapper that makes the message go away for
NDEBUG builds.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75379 91177308-0d34-0410-b5e6-96231b3b80d8
PMover.cpp
parc.h
parcISelLowering.cpp
parcInstrInfo.cpp
parcRegisterInfo.cpp
|
| d1474d09cbe5fdeec8ba0d6c6b52f316f3422532 |
09-Jul-2009 |
Owen Anderson <resistor@mac.com> |
Thread LLVMContext through MVT and related parts of SDISel.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75153 91177308-0d34-0410-b5e6-96231b3b80d8
parcISelLowering.cpp
|
| dac237e18209b697a8ba122d0ddd9cad4dfba1f8 |
08-Jul-2009 |
Torok Edwin <edwintorok@gmail.com> |
Implement changes from Chris's feedback.
Finish converting lib/Target.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75043 91177308-0d34-0410-b5e6-96231b3b80d8
smPrinter/SparcAsmPrinter.cpp
parcISelDAGToDAG.cpp
|
| 804e0fea4033e3b91dbc8198cef30de30f141bb5 |
08-Jul-2009 |
Torok Edwin <edwintorok@gmail.com> |
Convert more abort() calls to llvm_report_error().
Also remove trailing semicolon.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75027 91177308-0d34-0410-b5e6-96231b3b80d8
smPrinter/SparcAsmPrinter.cpp
|
| 033080cf6a6f6ca94f20c410204405471c19c535 |
02-Jul-2009 |
Douglas Gregor <dgregor@apple.com> |
CMake build fixes, from Xerxes Ranby
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74720 91177308-0d34-0410-b5e6-96231b3b80d8
MakeLists.txt
|
| b4202b84d7e54efe5e144885c7da63e6cc465f80 |
01-Jul-2009 |
Bill Wendling <isanbard@gmail.com> |
Update comments to make it clear that the function alignment is the Log2 of the
bytes and not bytes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74624 91177308-0d34-0410-b5e6-96231b3b80d8
parcISelLowering.cpp
parcISelLowering.h
|
| 2578ba26e72e36dde64be0f52a2788480aad3378 |
01-Jul-2009 |
Evan Cheng <evan.cheng@apple.com> |
Handle IMPLICIT_DEF with isUndef operand marker, part 2. This patch moves the code to annotate machineoperands to LiveIntervalAnalysis. It also add markers for implicit_def that define physical registers. The rest, is just a lot of details.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74580 91177308-0d34-0410-b5e6-96231b3b80d8
parcInstrInfo.cpp
|
| 5bcc8bd0c60cfe583ee47852950aad9e532c932e |
01-Jul-2009 |
Daniel Dunbar <daniel@zuster.org> |
Remove unused AsmPrinter OptLevel argument, and propogate.
- This more or less amounts to a revert of r65379. I'm curious to know what
happened that caused this variable to become unused.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74579 91177308-0d34-0410-b5e6-96231b3b80d8
smPrinter/SparcAsmPrinter.cpp
parc.h
parcTargetMachine.cpp
parcTargetMachine.h
|
| 20c568f366be211323eeaf0e45ef053278ec9ddc |
01-Jul-2009 |
Bill Wendling <isanbard@gmail.com> |
Add an "alignment" field to the MachineFunction object. It makes more sense to
have the alignment be calculated up front, and have the back-ends obey whatever
alignment is decided upon.
This allows for future work that would allow for precise no-op placement and the
like.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74564 91177308-0d34-0410-b5e6-96231b3b80d8
smPrinter/SparcAsmPrinter.cpp
parcISelLowering.cpp
parcISelLowering.h
|
| 2af72d455bbfea03d81dc812d660cd6278118d49 |
26-Jun-2009 |
Owen Anderson <resistor@mac.com> |
Privatize some data.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74332 91177308-0d34-0410-b5e6-96231b3b80d8
smPrinter/SparcAsmPrinter.cpp
|
| 0f05d22a31bf76a1e066592a567217b73fcc4d7d |
26-Jun-2009 |
Devang Patel <dpatel@apple.com> |
Let's ignore MDStrings also!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74255 91177308-0d34-0410-b5e6-96231b3b80d8
smPrinter/SparcAsmPrinter.cpp
|
| 4b73893d82866fc6889e550bedda0e4d76ad930a |
25-Jun-2009 |
Douglas Gregor <dgregor@apple.com> |
Add missing dependencies to the CMake build system.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74161 91177308-0d34-0410-b5e6-96231b3b80d8
smPrinter/CMakeLists.txt
|
| e4c0c0fab8caadd8159f6bdd6fa03e66d4b4af9c |
25-Jun-2009 |
Devang Patel <dpatel@apple.com> |
No need to code gen MDNodes
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74150 91177308-0d34-0410-b5e6-96231b3b80d8
smPrinter/SparcAsmPrinter.cpp
|
| a96751fc8ff1cc9a225ffbba73de53e2b9e1ae35 |
24-Jun-2009 |
Bob Wilson <bob.wilson@apple.com> |
Provide InitializeAllTargets and InitializeNativeTarget functions in the
C bindings. Change all the backend "Initialize" functions to have C linkage.
Change the "llvm/Config/Targets.def" header to use C-style comments to avoid
compile warnings.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74026 91177308-0d34-0410-b5e6-96231b3b80d8
smPrinter/SparcAsmPrinter.cpp
parcTargetMachine.cpp
|
| 7e9e36a23e07dfb0d7ceda3e76450073c0534f35 |
23-Jun-2009 |
Douglas Gregor <dgregor@apple.com> |
Eliminate object-relinking support from CMake. Fixes PR 4429 and
cleans up the CMake-based build system a bit. Started by a patch from
Xerxes Rånby.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73969 91177308-0d34-0410-b5e6-96231b3b80d8
smPrinter/CMakeLists.txt
|
| 225503a5b5de954788ad1e4bc9c69211de334c05 |
19-Jun-2009 |
Chris Lattner <sabre@nondot.org> |
fix the sparc codegen to not depend on the sparc asmprinter.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73767 91177308-0d34-0410-b5e6-96231b3b80d8
smPrinter/SparcAsmPrinter.cpp
parcTargetMachine.cpp
parcTargetMachine.h
|
| 1555a23335400143f2b54a66aedc4b5cbbb79f8d |
16-Jun-2009 |
Douglas Gregor <dgregor@apple.com> |
Introduce new headers whose inclusion forces linking and
initialization of all targets (InitializeAllTargets.h) or assembler
printers (InitializeAllAsmPrinters.h). This is a step toward the
elimination of relinked object files, so that we can build normal
archives.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73543 91177308-0d34-0410-b5e6-96231b3b80d8
smPrinter/SparcAsmPrinter.cpp
parcTargetMachine.cpp
|
| 41a024385f1220eadc48b48cb4c044a5fbc1b361 |
23-May-2009 |
Anton Korobeynikov <asl@math.spbu.ru> |
Propagate CPU string out of SubtargetFeatures
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72335 91177308-0d34-0410-b5e6-96231b3b80d8
parcSubtarget.h
|
| 587daedce2d6c2b2d380b6a5843a6f8b6cfc79e4 |
13-May-2009 |
Bill Wendling <isanbard@gmail.com> |
Change MachineInstrBuilder::addReg() to take a flag instead of a list of
booleans. This gives a better indication of what the "addReg()" is
doing. Remembering what all of those booleans mean isn't easy, especially if you
aren't spending all of your time in that code.
I took Jakob's suggestion and made it illegal to pass in "true" for the
flag. This should hopefully prevent any unintended misuse of this (by reverting
to the old way of using addReg()).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@71722 91177308-0d34-0410-b5e6-96231b3b80d8
parcInstrInfo.cpp
|
| 777d2306b36816a53bc1ae1244c0dc7d998ae691 |
09-May-2009 |
Duncan Sands <baldrick@free.fr> |
Rename PaddedSize to AllocSize, in the hope that this
will make it more obvious what it represents, and stop
it being confused with the StoreSize.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@71349 91177308-0d34-0410-b5e6-96231b3b80d8
smPrinter/SparcAsmPrinter.cpp
|
| 98a366d547772010e94609e4584489b3e5ce0043 |
30-Apr-2009 |
Bill Wendling <isanbard@gmail.com> |
Instead of passing in an unsigned value for the optimization level, use an enum,
which better identifies what the optimization is doing. And is more flexible for
future uses.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70440 91177308-0d34-0410-b5e6-96231b3b80d8
smPrinter/SparcAsmPrinter.cpp
parc.h
parcTargetMachine.cpp
parcTargetMachine.h
|
| be8cc2a3dedeb7685f07e68cdc4b9502eb97eb2b |
29-Apr-2009 |
Bill Wendling <isanbard@gmail.com> |
Second attempt:
Massive check in. This changes the "-fast" flag to "-O#" in llc. If you want to
use the old behavior, the flag is -O0. This change allows for finer-grained
control over which optimizations are run at different -O levels.
Most of this work was pretty mechanical. The majority of the fixes came from
verifying that a "fast" variable wasn't used anymore. The JIT still uses a
"Fast" flag. I'll change the JIT with a follow-up patch.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70343 91177308-0d34-0410-b5e6-96231b3b80d8
smPrinter/SparcAsmPrinter.cpp
parc.h
parcTargetMachine.cpp
parcTargetMachine.h
|
| c69d56f1154342a57c9bdd4c17a10333e3520127 |
28-Apr-2009 |
Bill Wendling <isanbard@gmail.com> |
r70270 isn't ready yet. Back this out. Sorry for the noise.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70275 91177308-0d34-0410-b5e6-96231b3b80d8
smPrinter/SparcAsmPrinter.cpp
parc.h
parcTargetMachine.cpp
parcTargetMachine.h
|
| 2e9d5f912a9841d3685ba0241abe1131943fed29 |
28-Apr-2009 |
Bill Wendling <isanbard@gmail.com> |
Massive check in. This changes the "-fast" flag to "-O#" in llc. If you want to
use the old behavior, the flag is -O0. This change allows for finer-grained
control over which optimizations are run at different -O levels.
Most of this work was pretty mechanical. The majority of the fixes came from
verifying that a "fast" variable wasn't used anymore. The JIT still uses a
"Fast" flag. I'm not 100% sure if it's necessary to change it there...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70270 91177308-0d34-0410-b5e6-96231b3b80d8
smPrinter/SparcAsmPrinter.cpp
parc.h
parcTargetMachine.cpp
parcTargetMachine.h
|
| 42bf74be1402df7409efbea089310d4c276fde37 |
25-Mar-2009 |
Evan Cheng <evan.cheng@apple.com> |
CodeGen still defaults to non-verbose asm, but llc now overrides it and default to verbose.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@67668 91177308-0d34-0410-b5e6-96231b3b80d8
smPrinter/SparcAsmPrinter.cpp
parc.h
parcTargetMachine.cpp
parcTargetMachine.h
|
| 4dc2b39bf89d7c87868008ef8a0f807e0419aca6 |
11-Mar-2009 |
Duncan Sands <baldrick@free.fr> |
It makes no sense to have a ODR version of common
linkage, so remove it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@66690 91177308-0d34-0410-b5e6-96231b3b80d8
smPrinter/SparcAsmPrinter.cpp
|
| 667d4b8de6dea70195ff12ef39a4deebffa2f5c7 |
07-Mar-2009 |
Duncan Sands <baldrick@free.fr> |
Introduce new linkage types linkonce_odr, weak_odr, common_odr
and extern_weak_odr. These are the same as the non-odr versions,
except that they indicate that the global will only be overridden
by an *equivalent* global. In C, a function with weak linkage can
be overridden by a function which behaves completely differently.
This means that IP passes have to skip weak functions, since any
deductions made from the function definition might be wrong, since
the definition could be replaced by something completely different
at link time. This is not allowed in C++, thanks to the ODR
(One-Definition-Rule): if a function is replaced by another at
link-time, then the new function must be the same as the original
function. If a language knows that a function or other global can
only be overridden by an equivalent global, it can give it the
weak_odr linkage type, and the optimizers will understand that it
is alright to make deductions based on the function body. The
code generators on the other hand map weak and weak_odr linkage
to the same thing.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@66339 91177308-0d34-0410-b5e6-96231b3b80d8
smPrinter/SparcAsmPrinter.cpp
|
| 57f0db833dc30404f1f5d28b23df326e520698ec |
24-Feb-2009 |
Bill Wendling <isanbard@gmail.com> |
Overhaul my earlier submission due to feedback. It's a large patch, but most of
them are generic changes.
- Use the "fast" flag that's already being passed into the asm printers instead
of shoving it into the DwarfWriter.
- Instead of calling "MI->getParent()->getParent()" for every MI, set the
machine function when calling "runOnMachineFunction" in the asm printers.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@65379 91177308-0d34-0410-b5e6-96231b3b80d8
smPrinter/SparcAsmPrinter.cpp
parc.h
parcTargetMachine.cpp
|
| ef4cfc749a61d0d0252196c957697436ba7ec068 |
23-Feb-2009 |
Bill Wendling <isanbard@gmail.com> |
Propagate debug loc info through prologue/epilogue.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@65298 91177308-0d34-0410-b5e6-96231b3b80d8
parcRegisterInfo.cpp
|
| cb819f13d785ff6efcacfbd7d0fa9f3f67e5494d |
19-Feb-2009 |
Bill Wendling <isanbard@gmail.com> |
Put code that generates debug labels into TableGen so that it can be used by
everyone.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@64978 91177308-0d34-0410-b5e6-96231b3b80d8
smPrinter/SparcAsmPrinter.cpp
|
| 38deef9ce58b33dba34515f23fb7dbde02164c77 |
18-Feb-2009 |
Dan Gohman <gohman@apple.com> |
Add explicit keywords.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@64915 91177308-0d34-0410-b5e6-96231b3b80d8
PMover.cpp
|
| 97357614b5957cc167c261d3be54713802715d9a |
18-Feb-2009 |
Dan Gohman <gohman@apple.com> |
Factor out the code to add a MachineOperand to a MachineInstrBuilder.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@64891 91177308-0d34-0410-b5e6-96231b3b80d8
parcInstrInfo.cpp
|
| d552eee4a05789e80ef3298df473edb888471302 |
13-Feb-2009 |
Dale Johannesen <dalej@apple.com> |
Remove non-DebugLoc versions of buildMI from Sparc.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@64435 91177308-0d34-0410-b5e6-96231b3b80d8
elaySlotFiller.cpp
PMover.cpp
parcISelLowering.cpp
parcInstrInfo.cpp
parcRegisterInfo.cpp
|
| 21b5541814d57d0a31f353948e4e933dbb1af6a4 |
13-Feb-2009 |
Dale Johannesen <dalej@apple.com> |
Eliminate a couple of non-DebugLoc BuildMI variants.
Modify callers.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@64409 91177308-0d34-0410-b5e6-96231b3b80d8
parcInstrInfo.cpp
|
| d1c321a89ab999b9bb602b0f398ecd4c2022262c |
12-Feb-2009 |
Bill Wendling <isanbard@gmail.com> |
Move debug loc info along when the spiller creates new instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@64342 91177308-0d34-0410-b5e6-96231b3b80d8
parcInstrInfo.cpp
|
| 6f38cb61a94b3abab70f0ee463bdcf55d86d334e |
07-Feb-2009 |
Dale Johannesen <dalej@apple.com> |
Use getDebugLoc forwarder instead of getNode()->getDebugLoc.
No functional change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@64026 91177308-0d34-0410-b5e6-96231b3b80d8
parcISelLowering.cpp
|
| 1fdbc1dd4e9cb42c79a30e8dc308c322e923cc52 |
07-Feb-2009 |
Dan Gohman <gohman@apple.com> |
Constify TargetInstrInfo::EmitInstrWithCustomInserter, allowing
ScheduleDAG's TLI member to use const.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@64018 91177308-0d34-0410-b5e6-96231b3b80d8
parcISelLowering.cpp
parcISelLowering.h
|
| b300d2aa3ef08b5074449e2c05804717f488f4e4 |
07-Feb-2009 |
Dale Johannesen <dalej@apple.com> |
Get rid of the last non-DebugLoc versions of getNode!
Many targets build placeholder nodes for special operands, e.g.
GlobalBaseReg on X86 and PPC for the PIC base. There's no
sensible way to associate debug info with these. I've left
them built with getNode calls with explicit DebugLoc::getUnknownLoc operands.
I'm not too happy about this but don't see a good improvement;
I considered adding a getPseudoOperand or something, but it
seems to me that'll just make it harder to read.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63992 91177308-0d34-0410-b5e6-96231b3b80d8
parcISelLowering.cpp
|
| e8d7230f480654cdb8ff1c3d0a38e1e9ab0bd55f |
07-Feb-2009 |
Dale Johannesen <dalej@apple.com> |
Remove more non-DebugLoc getNode variants. Use
getCALLSEQ_{END,START} to permit passing no DebugLoc
there. UNDEF doesn't logically have DebugLoc; add
getUNDEF to encapsulate this.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63978 91177308-0d34-0410-b5e6-96231b3b80d8
parcISelLowering.cpp
|
| de06470330260f5937e7ca558f5f5b3e171f2ee5 |
06-Feb-2009 |
Dale Johannesen <dalej@apple.com> |
Remove more non-DebugLoc versions of getNode.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63969 91177308-0d34-0410-b5e6-96231b3b80d8
parcISelLowering.cpp
|
| f5f5dce897269885754fc79adeb809194da52942 |
06-Feb-2009 |
Dale Johannesen <dalej@apple.com> |
Eliminate remaining non-DebugLoc version of getTargetNode.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63951 91177308-0d34-0410-b5e6-96231b3b80d8
parcISelDAGToDAG.cpp
|
| 3484c09e0da3c05c8a78946e090c7610208d937b |
05-Feb-2009 |
Dale Johannesen <dalej@apple.com> |
Remove a non-DebugLoc version of getNode.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63889 91177308-0d34-0410-b5e6-96231b3b80d8
parcISelLowering.cpp
|
| a05dca4f9e051fad19fe9b5f6cce2715c1e5d505 |
05-Feb-2009 |
Dale Johannesen <dalej@apple.com> |
Remove non-DebugLoc forms of CopyToReg and CopyFromReg.
Adjust callers.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63789 91177308-0d34-0410-b5e6-96231b3b80d8
parcISelLowering.cpp
|
| 33c960f523f2308482d5b2816af46a7ec90a6d3d |
04-Feb-2009 |
Dale Johannesen <dalej@apple.com> |
Remove non-DebugLoc versions of getLoad and getStore.
Adjust the many callers of those versions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63767 91177308-0d34-0410-b5e6-96231b3b80d8
parcISelLowering.cpp
|
| 39355f9fea790c5a1b12ef0fdcfeac3f533232ea |
04-Feb-2009 |
Dale Johannesen <dalej@apple.com> |
Remove non-DebugLoc forms of the exotic forms
of Lod and Sto; patch uses.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63716 91177308-0d34-0410-b5e6-96231b3b80d8
parcISelLowering.cpp
|
| 7d2ad624fa749a6d3edac0d94e9c107989c16304 |
31-Jan-2009 |
Dale Johannesen <dalej@apple.com> |
Make LowerCallTo and LowerArguments take a DebugLoc
argument. Adjust all callers and overloaded versions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63444 91177308-0d34-0410-b5e6-96231b3b80d8
parcISelLowering.cpp
parcISelLowering.h
|
| 04ee5a1d9267e5e6fab8f088095fcb83c3c5cbd1 |
20-Jan-2009 |
Evan Cheng <evan.cheng@apple.com> |
Change TargetInstrInfo::isMoveInstr to return source and destination sub-register indices as well.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62600 91177308-0d34-0410-b5e6-96231b3b80d8
parcInstrInfo.cpp
parcInstrInfo.h
|
| bb46f52027416598a662dc1c58f48d9d56b1a65b |
15-Jan-2009 |
Rafael Espindola <rafael.espindola@gmail.com> |
Add the private linkage.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62279 91177308-0d34-0410-b5e6-96231b3b80d8
smPrinter/SparcAsmPrinter.cpp
|
| 79ce276083ced01256a0eb7d80731e4948ca6e87 |
15-Jan-2009 |
Dan Gohman <gohman@apple.com> |
Move a few containers out of ScheduleDAGInstrs::BuildSchedGraph
and into the ScheduleDAGInstrs class, so that they don't get
destructed and re-constructed for each block. This fixes a
compile-time hot spot in the post-pass scheduler.
To help facilitate this, tidy and do some minor reorganization
in the scheduler constructor functions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62275 91177308-0d34-0410-b5e6-96231b3b80d8
parcISelDAGToDAG.cpp
|
| ceb4d1aecb9deffe59b3dcdc9a783ffde8477be9 |
12-Jan-2009 |
Duncan Sands <baldrick@free.fr> |
Rename getABITypeSize to getTypePaddedSize, as
suggested by Chris.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62099 91177308-0d34-0410-b5e6-96231b3b80d8
smPrinter/SparcAsmPrinter.cpp
|
| 9b8f542e2746b28721b3ec603c3aaaa10ea708fc |
09-Jan-2009 |
Misha Brukman <brukman+llvm@gmail.com> |
Removed trailing whitespace from Makefiles.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61991 91177308-0d34-0410-b5e6-96231b3b80d8
smPrinter/Makefile
akefile
|
| d68a07650cdb2e18f18f362ba533459aa10e01b6 |
05-Jan-2009 |
Dan Gohman <gohman@apple.com> |
Tidy up #includes, deleting a bunch of unnecessary #includes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61715 91177308-0d34-0410-b5e6-96231b3b80d8
parc.h
parcInstrInfo.cpp
|
| 8c0f244c3ed90a3f702bac09334cac2d3236aecb |
12-Dec-2008 |
Duncan Sands <baldrick@free.fr> |
Don't make use of an illegal type (i64) when
lowering f64 function arguments.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60944 91177308-0d34-0410-b5e6-96231b3b80d8
parcISelLowering.cpp
|
| c54baa2d43730f1804acfb4f4e738fba72f966bd |
03-Dec-2008 |
Dan Gohman <gohman@apple.com> |
Split foldMemoryOperand into public non-virtual and protected virtual
parts, and add target-independent code to add/preserve
MachineMemOperands.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60488 91177308-0d34-0410-b5e6-96231b3b80d8
parcInstrInfo.cpp
parcInstrInfo.h
|
| aaffa05d0a652dd3eae76a941d02d6b0469fa821 |
01-Dec-2008 |
Duncan Sands <baldrick@free.fr> |
There are no longer any places that require a
MERGE_VALUES node with only one operand, so get
rid of special code that only existed to handle
that possibility.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60349 91177308-0d34-0410-b5e6-96231b3b80d8
parcISelLowering.cpp
|
| 027fdbe3ba6762b9867c6f891d64f76b7d6a4557 |
24-Nov-2008 |
Evan Cheng <evan.cheng@apple.com> |
Move target independent td files from lib/Target/ to include/llvm/Target so they can be distributed along with the header files.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59953 91177308-0d34-0410-b5e6-96231b3b80d8
parc.td
|
| cbad42cfd1cc93a41ff26ea2e8895bfbc09f54f2 |
18-Nov-2008 |
Dan Gohman <gohman@apple.com> |
Add more const qualifiers. This fixes build breakage from r59540.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59542 91177308-0d34-0410-b5e6-96231b3b80d8
parcInstrInfo.cpp
parcInstrInfo.h
|
| 92adc19be95347225f713db8cc1b5e22ac08bb5e |
15-Nov-2008 |
Oscar Fuentes <ofv@wanadoo.es> |
Adds extern "C" ints to the .cpp files that use RegisterTarget, as
well as 2 files that use "Registrator"s. These are to be used by the
MSVC builds, as the Win32 linker does not include libs that are
otherwise unreferenced, even if global constructors in the lib have
side-effects.
Patch by Scott Graham!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59378 91177308-0d34-0410-b5e6-96231b3b80d8
parcTargetMachine.cpp
|
| 2ae80d8ab17a0d15950bbab8f3bbb03fd1edb19b |
11-Nov-2008 |
Oscar Fuentes <ofv@wanadoo.es> |
CMake: corrected split of Alpha and Sparc AsmPrinters.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59050 91177308-0d34-0410-b5e6-96231b3b80d8
MakeLists.txt
|
| 3bd86aac994d5d68797c98b53b3ef892df1e99f6 |
11-Nov-2008 |
Anton Korobeynikov <asl@math.spbu.ru> |
Separate sparc asmprinter. This should unbreak the native build
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59047 91177308-0d34-0410-b5e6-96231b3b80d8
smPrinter/CMakeLists.txt
smPrinter/Makefile
smPrinter/SparcAsmPrinter.cpp
akefile
parcAsmPrinter.cpp
|
| 8be6bbe5bfd50945ac6c5542e0f54a0924a5db8d |
05-Nov-2008 |
Dan Gohman <gohman@apple.com> |
Eliminate the ISel priority queue, which used the topological order for a
priority function. Instead, just iterate over the AllNodes list, which is
already in topological order. This eliminates a fair amount of bookkeeping,
and speeds up the isel phase by about 15% on many testcases.
The impact on most targets is that AddToISelQueue calls can be simply removed.
In the x86 target, there are two additional notable changes.
The rule-bending AND+SHIFT optimization in MatchAddress that creates new
pre-isel nodes during isel is now a little more verbose, but more robust.
Instead of either creating an invalid DAG or creating an invalid topological
sort, as it has historically done, it can now just insert the new nodes into
the node list at a position where they will be consistent with the topological
ordering.
Also, the address-matching code has logic that checked to see if a node was
"already selected". However, when a node is selected, it has all its uses
taken away via ReplaceAllUsesWith or equivalent, so it won't recieve any
further visits from MatchAddress. This code is now removed.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@58748 91177308-0d34-0410-b5e6-96231b3b80d8
parcISelDAGToDAG.cpp
|
| 8ad4c00c00233acb8a3395098e2b575cc34de46b |
27-Oct-2008 |
David Greene <greened@obbligato.org> |
Have TableGen emit setSubgraphColor calls under control of a -gen-debug
flag. Then in a debugger developers can set breakpoints at these calls
to see waht is about to be selected and what the resulting subgraph
looks like. This really helps when debugging instruction selection.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@58278 91177308-0d34-0410-b5e6-96231b3b80d8
parcISelDAGToDAG.cpp
|
| 6520e20e4fb31f2e65e25c38b372b19d33a83df4 |
18-Oct-2008 |
Dan Gohman <gohman@apple.com> |
Teach DAGCombine to fold constant offsets into GlobalAddress nodes,
and add a TargetLowering hook for it to use to determine when this
is legal (i.e. not in PIC mode, etc.)
This allows instruction selection to emit folded constant offsets
in more cases, such as the included testcase, eliminating the need
for explicit arithmetic instructions.
This eliminates the need for the C++ code in X86ISelDAGToDAG.cpp
that attempted to achieve the same effect, but wasn't as effective.
Also, fix handling of offsets in GlobalAddressSDNodes in several
places, including changing GlobalAddressSDNode's offset from
int to int64_t.
The Mips, Alpha, Sparc, and CellSPU targets appear to be
unaware of GlobalAddress offsets currently, so set the hook to
false on those targets.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57748 91177308-0d34-0410-b5e6-96231b3b80d8
parcISelLowering.cpp
parcISelLowering.h
|
| 8e8b8a223c2b0e69f44c0639f846260c8011668f |
16-Oct-2008 |
Dan Gohman <gohman@apple.com> |
Const-ify several TargetInstrInfo methods.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57622 91177308-0d34-0410-b5e6-96231b3b80d8
parcInstrInfo.cpp
parcInstrInfo.h
|
| 0329466b6b4927f4e6f5d144891fef06a027fec5 |
14-Oct-2008 |
Evan Cheng <evan.cheng@apple.com> |
Rename LoadX to LoadExt.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57526 91177308-0d34-0410-b5e6-96231b3b80d8
parcISelLowering.cpp
|
| b8cab9227a0f6ffbdaae33e3c64268e265008a6a |
14-Oct-2008 |
Dan Gohman <gohman@apple.com> |
Fix command-line option printing to print two spaces where needed,
instead of requiring all "short description" strings to begin with
two spaces. This makes these strings less mysterious, and it fixes
some cases where short description strings mistakenly did not
begin with two spaces.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57521 91177308-0d34-0410-b5e6-96231b3b80d8
parcTargetMachine.cpp
|
| e563bbc312f8b11ecfe12b8187176f667df1dff3 |
12-Oct-2008 |
Chris Lattner <sabre@nondot.org> |
Change CALLSEQ_BEGIN and CALLSEQ_END to take TargetConstant's as
parameters instead of raw Constants. This prevents the constants from
being selected by the isel pass, fixing PR2735.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57385 91177308-0d34-0410-b5e6-96231b3b80d8
parcISelLowering.cpp
parcInstrInfo.td
|
| 875314bb529c9208e9e8dedec90f1e4a966442e9 |
10-Oct-2008 |
Anton Korobeynikov <asl@math.spbu.ru> |
Fix a thinko and unbreak sparc default CC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57368 91177308-0d34-0410-b5e6-96231b3b80d8
parcCallingConv.td
|
| df75bbae949ab834f3ee4697ea2c13d0ee9f28b2 |
10-Oct-2008 |
Anton Korobeynikov <asl@math.spbu.ru> |
Extend set of return registers on sparc until someone will implement MRV support there. At least, this will allow libgcc compile, however we are not ABI-compatible with stuff compiled with native gcc.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57364 91177308-0d34-0410-b5e6-96231b3b80d8
parcCallingConv.td
|
| 4cf5e2eb6cbbe5e51b18921bd85056aaf4dc1c37 |
10-Oct-2008 |
Anton Korobeynikov <asl@math.spbu.ru> |
Ignore extra 'r' modifier for now
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57363 91177308-0d34-0410-b5e6-96231b3b80d8
parcAsmPrinter.cpp
|
| 4b58b6a5b41e76d73d25beb7483a877ec38ea8c9 |
10-Oct-2008 |
Anton Korobeynikov <asl@math.spbu.ru> |
Use expand for smul_lohi for now
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57362 91177308-0d34-0410-b5e6-96231b3b80d8
parcISelLowering.cpp
|
| 0eefda1335f5e86f95dbb58352321a43237e1089 |
10-Oct-2008 |
Anton Korobeynikov <asl@math.spbu.ru> |
Add rudimentary support for 'r' register operand
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57359 91177308-0d34-0410-b5e6-96231b3b80d8
parcISelLowering.cpp
parcISelLowering.h
|
| 53835708e1540299eefdbbb70be2ebb1847dd3eb |
10-Oct-2008 |
Anton Korobeynikov <asl@math.spbu.ru> |
Cleanup
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57358 91177308-0d34-0410-b5e6-96231b3b80d8
parcISelLowering.cpp
|
| f369330c2d25b37d2590720e45d11a1d47950ce6 |
10-Oct-2008 |
Anton Korobeynikov <asl@math.spbu.ru> |
Add rudimentary asmprinter support for printing inline asm operands for sparc.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57346 91177308-0d34-0410-b5e6-96231b3b80d8
parcAsmPrinter.cpp
|
| 2fcfd83cb4b10c072186949ee39326f236c9f1b3 |
10-Oct-2008 |
Anton Korobeynikov <asl@math.spbu.ru> |
Add dummy 'm' inline asm constraint handler for Sparc. I'm not sure, whether it is correct, however :)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57345 91177308-0d34-0410-b5e6-96231b3b80d8
parcISelDAGToDAG.cpp
|
| a43e51d0fea8b1a6148934633012351a0432a4a6 |
10-Oct-2008 |
Anton Korobeynikov <asl@math.spbu.ru> |
Cleanup
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57344 91177308-0d34-0410-b5e6-96231b3b80d8
parcISelDAGToDAG.cpp
|
| da8ac5fd9130b70b61be61e4819faa8d842d708f |
03-Oct-2008 |
Dan Gohman <gohman@apple.com> |
Avoid creating two TargetLowering objects for each target.
Instead, just create one, and make sure everything that needs
it can access it. Previously most of the SelectionDAGISel
subclasses all had their own TargetLowering object, which was
redundant with the TargetLowering object in the TargetMachine
subclasses, except on Sparc, where SparcTargetMachine
didn't have a TargetLowering object. Change Sparc to work
more like the other targets here.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57016 91177308-0d34-0410-b5e6-96231b3b80d8
parc.h
parcISelDAGToDAG.cpp
parcTargetMachine.cpp
parcTargetMachine.h
|
| d735b8019b0f297d7c14b55adcd887af24d8e602 |
03-Oct-2008 |
Dan Gohman <gohman@apple.com> |
Switch the MachineOperand accessors back to the short names like
isReg, etc., from isRegister, etc.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57006 91177308-0d34-0410-b5e6-96231b3b80d8
parcAsmPrinter.cpp
parcInstrInfo.cpp
parcRegisterInfo.cpp
|
| 5df3186f598163258fabf3448d9372843804d1ab |
29-Sep-2008 |
Duncan Sands <baldrick@free.fr> |
Rename isWeakForLinker to mayBeOverridden. Use it
instead of hasWeakLinkage in a bunch of optimization
passes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56782 91177308-0d34-0410-b5e6-96231b3b80d8
parcAsmPrinter.cpp
|
| e1ad087fcbb51ed66e450d010f849b5792b4b6fc |
26-Sep-2008 |
Oscar Fuentes <ofv@wanadoo.es> |
CMake: Builds all targets.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56641 91177308-0d34-0410-b5e6-96231b3b80d8
MakeLists.txt
|
| c25e1ea5e9aa54952b6736a9579e25a5c2d8139f |
25-Sep-2008 |
Anton Korobeynikov <asl@math.spbu.ru> |
Move actual section printing stuff to AsmPrinter from TAI reducing heap traffic.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56573 91177308-0d34-0410-b5e6-96231b3b80d8
parcAsmPrinter.cpp
|
| 0c8e80607bc3296a4775f05c02f0d11df8e5cb04 |
25-Sep-2008 |
Anton Korobeynikov <asl@math.spbu.ru> |
Drop obsolete hook and change all usage to new interface
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56572 91177308-0d34-0410-b5e6-96231b3b80d8
parcAsmPrinter.cpp
|
| 0ba2bcfcc3149a25d08aa8aa00fb6c34a4e25bdd |
23-Sep-2008 |
Dan Gohman <gohman@apple.com> |
Fix these enums' starting values to reflect the way that
instruction opcodes are now numbered. No functionality change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56497 91177308-0d34-0410-b5e6-96231b3b80d8
parcISelLowering.h
|
| 0bb41608e94adfe9884bc188457c4f6ae47ea43c |
22-Sep-2008 |
Dale Johannesen <dalej@apple.com> |
Make log, log2, log10, exp, exp2 use Expand by
default.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56471 91177308-0d34-0410-b5e6-96231b3b80d8
parcISelLowering.cpp
|
| 056292fd738924f3f7703725d8f630983794b5a5 |
16-Sep-2008 |
Bill Wendling <isanbard@gmail.com> |
Reverting r56249. On further investigation, this functionality isn't needed.
Apologies for the thrashing.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56251 91177308-0d34-0410-b5e6-96231b3b80d8
parcISelDAGToDAG.cpp
parcISelLowering.cpp
|
| 9468a9b6beed640eca64274c8dcc5aed3b94450b |
16-Sep-2008 |
Bill Wendling <isanbard@gmail.com> |
- Change "ExternalSymbolSDNode" to "SymbolSDNode".
- Add linkage to SymbolSDNode (default to external).
- Change ISD::ExternalSymbol to ISD::Symbol.
- Change ISD::TargetExternalSymbol to ISD::TargetSymbol
These changes pave the way to allowing SymbolSDNodes with non-external linkage.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56249 91177308-0d34-0410-b5e6-96231b3b80d8
parcISelDAGToDAG.cpp
parcISelLowering.cpp
|
| 014278e6a11fa0767853b831e5bf51b95bf541c5 |
13-Sep-2008 |
Dan Gohman <gohman@apple.com> |
Remove isImm(), isReg(), and friends, in favor of
isImmediate(), isRegister(), and friends, to avoid confusion
about having two different names with the same meaning. I'm
not attached to the longer names, and would be ok with
changing to the shorter names if others prefer it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56189 91177308-0d34-0410-b5e6-96231b3b80d8
parcInstrInfo.cpp
|
| 095cc29f321382e1f7d295e262a28197f92c5491 |
13-Sep-2008 |
Dan Gohman <gohman@apple.com> |
Define CallSDNode, an SDNode subclass for use with ISD::CALL.
Currently it just holds the calling convention and flags
for isVarArgs and isTailCall.
And it has several utility methods, which eliminate magic
5+2*i and similar index computations in several places.
CallSDNodes are not CSE'd. Teach UpdateNodeOperands to handle
nodes that are not CSE'd gracefully.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56183 91177308-0d34-0410-b5e6-96231b3b80d8
parcISelLowering.cpp
|
| f5aeb1a8e4cf272c7348376d185ef8d8267653e0 |
12-Sep-2008 |
Dan Gohman <gohman@apple.com> |
Rename ConstantSDNode::getValue to getZExtValue, for consistency
with ConstantInt. This led to fixing a bug in TargetLowering.cpp
using getValue instead of getAPIntValue.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56159 91177308-0d34-0410-b5e6-96231b3b80d8
parcISelDAGToDAG.cpp
parcISelLowering.cpp
parcInstrInfo.td
|
| ae73dc1448d25b02cabc7c64c86c64371453dda8 |
04-Sep-2008 |
Dan Gohman <gohman@apple.com> |
Tidy up several unbeseeming casts from pointer to intptr_t.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55779 91177308-0d34-0410-b5e6-96231b3b80d8
elaySlotFiller.cpp
PMover.cpp
|
| 7794f2a3a7778bdbc9bdd861db1fe914450e0470 |
04-Sep-2008 |
Dale Johannesen <dalej@apple.com> |
Add intrinsics for log, log2, log10, exp, exp2.
No functional change (and no FE change to generate them).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55753 91177308-0d34-0410-b5e6-96231b3b80d8
parcISelLowering.cpp
|
| ba36cb5242eb02b12b277f82b9efe497f7da4d7f |
28-Aug-2008 |
Gabor Greif <ggreif@gmail.com> |
erect abstraction boundaries for accessing SDValue members, rename Val -> Node to reflect semantics
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55504 91177308-0d34-0410-b5e6-96231b3b80d8
parcISelDAGToDAG.cpp
parcISelLowering.cpp
|
| 940f83e772ca2007d62faffc83094bd7e8da6401 |
26-Aug-2008 |
Owen Anderson <resistor@mac.com> |
Make TargetInstrInfo::copyRegToReg return a bool indicating whether the copy requested
was inserted or not. This allows bitcast in fast isel to properly handle the case
where an appropriate reg-to-reg copy is not available.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55375 91177308-0d34-0410-b5e6-96231b3b80d8
parcInstrInfo.cpp
parcInstrInfo.h
|
| f350b277f32d7d47f86c0e54f4aec4d470500618 |
23-Aug-2008 |
Dan Gohman <gohman@apple.com> |
Move the point at which FastISel taps into the SelectionDAGISel
process up to a higher level. This allows FastISel to leverage
more of SelectionDAGISel's infastructure, such as updating Machine
PHI nodes.
Also, implement transitioning from SDISel back to FastISel in
the middle of a block, so it's now possible to go back and
forth. This allows FastISel to hand individual CallInsts and other
complicated things off to SDISel to handle, while handling the rest
of the block itself.
To help support this, reorganize the SelectionDAG class so that it
is allocated once and reused throughout a function, instead of
being completely reallocated for each block.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55219 91177308-0d34-0410-b5e6-96231b3b80d8
parcISelDAGToDAG.cpp
|
| ad3460c3c968e33c5b9a07104b9fe5a5c27ff55b |
21-Aug-2008 |
Dan Gohman <gohman@apple.com> |
Simplify SelectRoot's interface, and factor out some common code
from all targets.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55124 91177308-0d34-0410-b5e6-96231b3b80d8
parcISelDAGToDAG.cpp
|
| cb3718832375a581c5ea23f15918f3ea447a446c |
21-Aug-2008 |
Owen Anderson <resistor@mac.com> |
Use raw_ostream throughout the AsmPrinter.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55092 91177308-0d34-0410-b5e6-96231b3b80d8
parc.h
parcAsmPrinter.cpp
parcTargetMachine.cpp
parcTargetMachine.h
|
| 328da65bd14045d3e229cbc5549835cebf6ff703 |
16-Aug-2008 |
Anton Korobeynikov <asl@math.spbu.ru> |
Add interface for section override. Use this for Sparc, since it should use named BSS section.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54844 91177308-0d34-0410-b5e6-96231b3b80d8
parcTargetAsmInfo.cpp
|
| d0c1e29aecdaaa67ffabbaf2dd255809e6df4978 |
16-Aug-2008 |
Anton Korobeynikov <asl@math.spbu.ru> |
Reduce heap trashing due to std::string construction / concatenation via caching of section flags string representations
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54842 91177308-0d34-0410-b5e6-96231b3b80d8
parcTargetAsmInfo.cpp
parcTargetAsmInfo.h
|
| 44eb65cf58e3ab9b5621ce72256d1621a18aeed7 |
15-Aug-2008 |
Owen Anderson <resistor@mac.com> |
Convert uses of std::vector in TargetInstrInfo to SmallVector. This change had to be propoagated down into all the targets and up into all clients of this API.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54802 91177308-0d34-0410-b5e6-96231b3b80d8
parcInstrInfo.cpp
parcInstrInfo.h
|
| cbdf30af797115fed613cec7739c4ae0cd52abb1 |
08-Aug-2008 |
Anton Korobeynikov <asl@math.spbu.ru> |
Properly print flags on Sparc
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54543 91177308-0d34-0410-b5e6-96231b3b80d8
parcTargetAsmInfo.cpp
|
| 25c6a087dd8974c1ec1e37733f78bd9f1db351c4 |
08-Aug-2008 |
Anton Korobeynikov <asl@math.spbu.ru> |
Use mergeable strings sections on sparc
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54541 91177308-0d34-0410-b5e6-96231b3b80d8
parcTargetAsmInfo.cpp
|
| f5b6a47bb57fb5ffc734416d4d5d993e1a06273b |
08-Aug-2008 |
Anton Korobeynikov <asl@math.spbu.ru> |
Handle visibility printing with all generality. Remove bunch of duplicate code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54540 91177308-0d34-0410-b5e6-96231b3b80d8
parcAsmPrinter.cpp
|
| fcd99bb42817eb9a12f871b04b3b892429afe169 |
07-Aug-2008 |
Anton Korobeynikov <asl@math.spbu.ru> |
Use EmitAlignment consistently
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54456 91177308-0d34-0410-b5e6-96231b3b80d8
parcAsmPrinter.cpp
|
| 2a166e9739986486980e4aa65fdfc54dfa62fe9d |
07-Aug-2008 |
Anton Korobeynikov <asl@math.spbu.ru> |
Cleanup
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54455 91177308-0d34-0410-b5e6-96231b3b80d8
parcAsmPrinter.cpp
|
| 5b794b98cebbc3982b87780657e0d280c2bcdd04 |
07-Aug-2008 |
Anton Korobeynikov <asl@math.spbu.ru> |
Switch Sparc to new section handling stuff. Refactor printing of module-level GVs significantly.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54450 91177308-0d34-0410-b5e6-96231b3b80d8
parcAsmPrinter.cpp
parcTargetAsmInfo.cpp
parcTargetAsmInfo.h
parcTargetMachine.cpp
|
| e594fd473ef5b484268935f3e80da3cd3331149f |
03-Aug-2008 |
Chris Lattner <sabre@nondot.org> |
Emit saveri with the correct operand order, patch by Richard Pennington!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54313 91177308-0d34-0410-b5e6-96231b3b80d8
parcRegisterInfo.cpp
|
| 475871a144eb604ddaf37503397ba0941442e5fb |
27-Jul-2008 |
Dan Gohman <gohman@apple.com> |
Rename SDOperand to SDValue.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54128 91177308-0d34-0410-b5e6-96231b3b80d8
parcISelDAGToDAG.cpp
parcISelLowering.cpp
parcISelLowering.h
|
| e8be6c63915e0389f1eef6b53c64300d13b2ce99 |
17-Jul-2008 |
Dan Gohman <gohman@apple.com> |
Add a new function, ReplaceAllUsesOfValuesWith, which handles bulk
replacement of multiple values. This is slightly more efficient
than doing multiple ReplaceAllUsesOfValueWith calls, and theoretically
could be optimized even further. However, an important property of this
new function is that it handles the case where the source value set and
destination value set overlap. This makes it feasible for isel to use
SelectNodeTo in many very common cases, which is advantageous because
SelectNodeTo avoids a temporary node and it doesn't require CSEMap
updates for users of values that don't change position.
Revamp MorphNodeTo, which is what does all the work of SelectNodeTo, to
handle operand lists more efficiently, and to correctly handle a number
of corner cases to which its new wider use exposes it.
This commit also includes a change to the encoding of post-isel opcodes
in SDNodes; now instead of being sandwiched between the target-independent
pre-isel opcodes and the target-dependent pre-isel opcodes, post-isel
opcodes are now represented as negative values. This makes it possible
to test if an opcode is pre-isel or post-isel without having to know
the size of the current target's post-isel instruction set.
These changes speed up llc overall by 3% and reduce memory usage by 10%
on the InstructionCombining.cpp testcase with -fast and -regalloc=local.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53728 91177308-0d34-0410-b5e6-96231b3b80d8
parcISelDAGToDAG.cpp
|
| c007848b5aa0883715b3cf0ded82f7bff750896b |
10-Jul-2008 |
Owen Anderson <resistor@mac.com> |
Fix the build by adding a #include.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53388 91177308-0d34-0410-b5e6-96231b3b80d8
parcAsmPrinter.cpp
|
| 8e5f2c6f65841542e2a7092553fe42a00048e4c7 |
08-Jul-2008 |
Dan Gohman <gohman@apple.com> |
Pool-allocation for MachineInstrs, MachineBasicBlocks, and
MachineMemOperands. The pools are owned by MachineFunctions.
This drastically reduces the number of calls to malloc/free made
during the "Emit" phase of scheduling, as well as later phases
in CodeGen. Combined with other changes, this speeds up the
"instruction selection" phase of CodeGen by 10% in some cases.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53212 91177308-0d34-0410-b5e6-96231b3b80d8
parcISelLowering.cpp
parcInstrInfo.cpp
|
| 1002c0203450620594a85454c6a095ca94b87cb2 |
07-Jul-2008 |
Dan Gohman <gohman@apple.com> |
Add explicit keywords.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53179 91177308-0d34-0410-b5e6-96231b3b80d8
parcISelDAGToDAG.cpp
|
| 9f1c8317a4676945b4961ddb9827ef2412551620 |
03-Jul-2008 |
Evan Cheng <evan.cheng@apple.com> |
- Remove calls to copyKillDeadInfo which is an N^2 function. Instead, propagate kill / dead markers as new instructions are constructed in foldMemoryOperand, convertToThressAddress, etc.
- Also remove LiveVariables::instructionChanged, etc. Replace all calls with cheaper calls which update VarInfo kill list.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53097 91177308-0d34-0410-b5e6-96231b3b80d8
parcInstrInfo.cpp
|
| 4bdcb61af33399d4e01fdf3c47ca1f1f5356e370 |
02-Jul-2008 |
Duncan Sands <baldrick@free.fr> |
Add a new getMergeValues method that does not need
to be passed the list of value types, and use this
where appropriate. Inappropriate places are where
the value type list is already known and may be
long, in which case the existing method is more
efficient.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53035 91177308-0d34-0410-b5e6-96231b3b80d8
parcISelLowering.cpp
|
| 4406604047423576e36657c7ede266ca42e79642 |
01-Jul-2008 |
Dan Gohman <gohman@apple.com> |
Split ISD::LABEL into ISD::DBG_LABEL and ISD::EH_LABEL, eliminating
the need for a flavor operand, and add a new SDNode subclass,
LabelSDNode, for use with them to eliminate the need for a label id
operand.
Change instruction selection to let these label nodes through
unmodified instead of creating copies of them. Teach the MachineInstr
emitter how to emit a MachineInstr directly from an ISD label node.
This avoids the need for allocating SDNodes for the label id and
flavor value, as well as SDNodes for each of the post-isel label,
label id, and label flavor.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52943 91177308-0d34-0410-b5e6-96231b3b80d8
parcISelLowering.cpp
|
| 7f460203b0c5350e9b2c592f438e40f7a7de6e45 |
30-Jun-2008 |
Dan Gohman <gohman@apple.com> |
Rename ISD::LOCATION to ISD::DBG_STOPPOINT to better reflect its
purpose, and give it a custom SDNode subclass so that it doesn't
need to have line number, column number, filename string, and
directory string, all existing as individual SDNodes to be the
operands.
This was the only user of ISD::STRING, StringSDNode, etc., so
remove those and some associated code.
This makes stop-points considerably easier to read in
-view-legalize-dags output, and reduces overhead (creating new
nodes and copying std::strings into them) on code containing
debugging information.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52924 91177308-0d34-0410-b5e6-96231b3b80d8
parcISelLowering.cpp
|
| db8d56b825efeb576d67b9dbe39d736d93306222 |
30-Jun-2008 |
Evan Cheng <evan.cheng@apple.com> |
Split scheduling from instruction selection.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52923 91177308-0d34-0410-b5e6-96231b3b80d8
parcISelDAGToDAG.cpp
|
| a44b674a42b6ca57128c4eb5a358298ed3bb1406 |
30-Jun-2008 |
Dan Gohman <gohman@apple.com> |
Replace some std::vectors that showed up in heap profiling with
SmallVectors. Change the signature of TargetLowering::LowerArguments
to avoid returning a vector by value, and update the two targets
which still use this directly, Sparc and IA64, accordingly.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52917 91177308-0d34-0410-b5e6-96231b3b80d8
parcISelLowering.cpp
parcISelLowering.h
|
| f9516208e57364ab1e7d8748af1f59a2ea5fb572 |
30-Jun-2008 |
Duncan Sands <baldrick@free.fr> |
Revert the SelectionDAG optimization that makes
it impossible to create a MERGE_VALUES node with
only one result: sometimes it is useful to be able
to create a node with only one result out of one of
the results of a node with more than one result, for
example because the new node will eventually be used
to replace a one-result node using ReplaceAllUsesWith,
cf X86TargetLowering::ExpandFP_TO_SINT. On the other
hand, most users of MERGE_VALUES don't need this and
for them the optimization was valuable. So add a new
utility method getMergeValues for creating MERGE_VALUES
nodes which by default performs the optimization.
Change almost everywhere to use getMergeValues (and
tidy some stuff up at the same time).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52893 91177308-0d34-0410-b5e6-96231b3b80d8
parcISelLowering.cpp
|
| 0011dc4738fbe624d44197ef9496517fd093eaa4 |
21-Jun-2008 |
Dan Gohman <gohman@apple.com> |
Use MachineBasicBlock::transferSuccessors.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52594 91177308-0d34-0410-b5e6-96231b3b80d8
parcISelLowering.cpp
|
| 83ec4b6711980242ef3c55a4fa36b2d7a39c1bfb |
06-Jun-2008 |
Duncan Sands <baldrick@free.fr> |
Wrap MVT::ValueType in a struct to get type safety
and better control the abstraction. Rename the type
to MVT. To update out-of-tree patches, the main
thing to do is to rename MVT::ValueType to MVT, and
rewrite expressions like MVT::getSizeInBits(VT) in
the form VT.getSizeInBits(). Use VT.getSimpleVT()
to extract a MVT::SimpleValueType for use in switch
statements (you will get an assert failure if VT is
an extended value type - these shouldn't exist after
type legalization).
This results in a small speedup of codegen and no
new testsuite failures (x86-64 linux).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52044 91177308-0d34-0410-b5e6-96231b3b80d8
parcISelLowering.cpp
|
| aafce77b17d340aace52bcd49d1944109d82f14a |
14-May-2008 |
Dale Johannesen <dalej@apple.com> |
Add CommonLinkage; currently tentative definitions
are represented as "weak", but there are subtle differences
in some cases on Darwin, so we need both. The intent
is that "common" will behave identically to "weak" unless
somebody changes their target to do something else.
No functional change as yet.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@51118 91177308-0d34-0410-b5e6-96231b3b80d8
parcAsmPrinter.cpp
|
| c9f5f3f64f896d0a8c8fa35a1dd98bc57b8960f6 |
14-May-2008 |
Dan Gohman <gohman@apple.com> |
Change target-specific classes to use more precise static types.
This eliminates the need for several awkward casts, including
the last dynamic_cast under lib/Target.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@51091 91177308-0d34-0410-b5e6-96231b3b80d8
parcInstrInfo.h
parcTargetMachine.h
|
| 844731a7f1909f55935e3514c9e713a62d67662e |
13-May-2008 |
Dan Gohman <gohman@apple.com> |
Clean up the use of static and anonymous namespaces. This turned up
several things that were neither in an anonymous namespace nor static
but not intended to be global.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@51017 91177308-0d34-0410-b5e6-96231b3b80d8
parcTargetMachine.cpp
|
| 707e0184233f27e0e9f9aee0309f2daab8cfe7f8 |
12-Apr-2008 |
Dan Gohman <gohman@apple.com> |
Drop ISD::MEMSET, ISD::MEMMOVE, and ISD::MEMCPY, which are not Legal
on any current target and aren't optimized in DAGCombiner. Instead
of using intermediate nodes, expand the operations, choosing between
simple loads/stores, target-specific code, and library calls,
immediately.
Previously, the code to emit optimized code for these operations
was only used at initial SelectionDAG construction time; now it is
used at all times. This fixes some cases where rep;movs was being
used for small copies where simple loads/stores would be better.
This also cleans up code that checks for alignments less than 4;
let the targets make that decision instead of doing it in
target-independent code. This allows x86 to use rep;movs in
low-alignment cases.
Also, this fixes a bug that resulted in the use of rep;stos for
memsets of 0 with non-constant memory size when the alignment was
at least 4. It's better to use the library in this case, which
can be significantly faster when the size is large.
This also preserves more SourceValue information when memory
intrinsics are lowered into simple loads/stores.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@49572 91177308-0d34-0410-b5e6-96231b3b80d8
parcISelLowering.cpp
|
| ca1267c02b025cc719190b05f9e1a5d174a9caf7 |
31-Mar-2008 |
Evan Cheng <evan.cheng@apple.com> |
Move reMaterialize() from TargetRegisterInfo to TargetInstrInfo.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48995 91177308-0d34-0410-b5e6-96231b3b80d8
parcRegisterInfo.cpp
parcRegisterInfo.h
|
| 950a4c40b823cd4f09dc71be635229246dfd6cac |
25-Mar-2008 |
Dan Gohman <gohman@apple.com> |
Add explicit keywords.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48801 91177308-0d34-0410-b5e6-96231b3b80d8
parcInstrInfo.h
|
| 315123fb6a93f26f3660b7cb297ad378ec14c92d |
17-Mar-2008 |
Chris Lattner <sabre@nondot.org> |
Check in some #ifdef'd out code switching call argument
lowering over to SparcCallingConv.td. We can't make the switch
yet because we can't say to pass f64 registers in 2 x i32 registers
with the td file yet.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48449 91177308-0d34-0410-b5e6-96231b3b80d8
parcCallingConv.td
parcISelLowering.cpp
|
| b26bc75213563f594416fae906010ded242eaf3e |
17-Mar-2008 |
Chris Lattner <sabre@nondot.org> |
remove dead code
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48445 91177308-0d34-0410-b5e6-96231b3b80d8
parcISelLowering.cpp
|
| 98949a6d2c42e386f36b5fd94cb97008a51b610f |
17-Mar-2008 |
Chris Lattner <sabre@nondot.org> |
Switch sparc from using LowerCallTo to using LowerOperation(CALL) like
other targets. Use autogenerated calling conv to lower result of
calls.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48444 91177308-0d34-0410-b5e6-96231b3b80d8
parcISelLowering.cpp
parcISelLowering.h
|
| 5a65b928302494ad2b3051980ce956e8f9e95023 |
17-Mar-2008 |
Chris Lattner <sabre@nondot.org> |
Start moving sparc to use SparcCallingConv.td, switching over
return lowering first. This fixes a bug where the top and bottom
of i64 values were returned in the wrong registers before.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48443 91177308-0d34-0410-b5e6-96231b3b80d8
akefile
parc.td
parcCallingConv.td
parcISelLowering.cpp
|
| d23405e6f04135cabcad4d9bd7aa6e4f187bed3a |
17-Mar-2008 |
Chris Lattner <sabre@nondot.org> |
split sparc lowering out into SparcISelLowering.{cpp|h} to follow
best practices.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48442 91177308-0d34-0410-b5e6-96231b3b80d8
parcISelDAGToDAG.cpp
parcISelLowering.cpp
parcISelLowering.h
|
| 601fe38b1e73ccf6d4020fda3ae1d68d44f47f0c |
17-Mar-2008 |
Chris Lattner <sabre@nondot.org> |
refactor the LowerOperation code out to individual functions for
each lowering, which is 'best practice'.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48441 91177308-0d34-0410-b5e6-96231b3b80d8
parcISelDAGToDAG.cpp
|
| da47e6e0d003c873da960361549e57ee4617c301 |
15-Mar-2008 |
Evan Cheng <evan.cheng@apple.com> |
Replace all target specific implicit def instructions with a target independent one: TargetInstrInfo::IMPLICIT_DEF.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48380 91177308-0d34-0410-b5e6-96231b3b80d8
parcInstrInfo.td
|
| 704df9fcbddd8bd6f358bef688ef51f8540dce4d |
14-Mar-2008 |
Dan Gohman <gohman@apple.com> |
Use SDTNone instead of duplicating it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48346 91177308-0d34-0410-b5e6-96231b3b80d8
parcInstrInfo.td
|
| bfae83139dcb4fffd50b939e1b1224b0126f04d4 |
11-Mar-2008 |
Dan Gohman <gohman@apple.com> |
Use PassManagerBase instead of FunctionPassManager for functions
that merely add passes. This allows them to be used with either
FunctionPassManager or PassManager, or even with a custom new
kind of pass manager.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48256 91177308-0d34-0410-b5e6-96231b3b80d8
parcTargetMachine.cpp
parcTargetMachine.h
|
| d2cde68855125b6815b1575f29cd96927614b0cd |
10-Mar-2008 |
Evan Cheng <evan.cheng@apple.com> |
Default ISD::PREFETCH to expand.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48169 91177308-0d34-0410-b5e6-96231b3b80d8
parcISelDAGToDAG.cpp
|
| 27b7db549e4c5bff4579d209304de5628513edeb |
08-Mar-2008 |
Evan Cheng <evan.cheng@apple.com> |
Implement x86 support for @llvm.prefetch. It corresponds to prefetcht{0|1|2} and prefetchnta instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48042 91177308-0d34-0410-b5e6-96231b3b80d8
parcISelDAGToDAG.cpp
|
| 6baaf915982cd420c4ce81123547314633234520 |
28-Feb-2008 |
Chris Lattner <sabre@nondot.org> |
Sparc backend doesn't support debug info yet, mark the nodes as expand. This fixes a crash on
test/DebugInfo/funccall.ll
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47709 91177308-0d34-0410-b5e6-96231b3b80d8
parcISelDAGToDAG.cpp
|
| a4b521598aff90b925ea397ddd36d479c99dd9f7 |
28-Feb-2008 |
Chris Lattner <sabre@nondot.org> |
Fix CodeGen/Generic/storetrunc-fp.ll on sparc, PR2105
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47707 91177308-0d34-0410-b5e6-96231b3b80d8
parcISelDAGToDAG.cpp
|
| 61273d55e9ce068fef5dfcddb65e5ad9c1f4772e |
28-Feb-2008 |
Chris Lattner <sabre@nondot.org> |
fix CodeGen/Generic/2008-01-25-dag-combine-mul.ll on sparc, PR2105
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47706 91177308-0d34-0410-b5e6-96231b3b80d8
EADME.txt
parcISelDAGToDAG.cpp
|
| fb8075d03f5c87bd57dcc9c5f2304f6b13c55aad |
28-Feb-2008 |
Evan Cheng <evan.cheng@apple.com> |
Add a quick and dirty "loop aligner pass". x86 uses it to align its loops to 16-byte boundaries.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47703 91177308-0d34-0410-b5e6-96231b3b80d8
parcAsmPrinter.cpp
|
| 6ef781f3ce0d0311004adba9d1e7dbd7950918dd |
27-Feb-2008 |
Bill Wendling <isanbard@gmail.com> |
Final de-tabification.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47663 91177308-0d34-0410-b5e6-96231b3b80d8
parcInstrInfo.td
|
| 74ab84c31ef64538a1b56e1f282e49303412ad17 |
26-Feb-2008 |
Bill Wendling <isanbard@gmail.com> |
Change "Name" to "AsmName" in the target register info. Gee, a refactoring tool
would have been a Godsend here!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47625 91177308-0d34-0410-b5e6-96231b3b80d8
parcAsmPrinter.cpp
|
| ae9f3a3b7c915f725aef5a7250e88eaeddda03c6 |
20-Feb-2008 |
Anton Korobeynikov <asl@math.spbu.ru> |
Unbreak build with gcc 4.3: provide missed includes and silence most annoying warnings.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47367 91177308-0d34-0410-b5e6-96231b3b80d8
parcAsmPrinter.cpp
|
| d497d9fab6e90499c703f3e672ec001dbfa074f9 |
16-Feb-2008 |
Andrew Lenharth <andrewl@lenharth.org> |
I cannot find a libgcc function for this builtin. Therefor expanding it to a noop (which is how it use to be treated). If someone who knows the x86 backend better than me could tell me how to get a lock prefix on an instruction, that would be nice to complete x86 support.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47213 91177308-0d34-0410-b5e6-96231b3b80d8
parcISelDAGToDAG.cpp
|
| 00fee65fd21f9615d1a604b8b7d42cd16a3f6b47 |
14-Feb-2008 |
Duncan Sands <baldrick@free.fr> |
In TargetLowering::LowerCallTo, don't assert that
the return value is zero-extended if it isn't
sign-extended. It may also be any-extended.
Also, if a floating point value was returned
in a larger floating point type, pass 1 as the
second operand to FP_ROUND, which tells it
that all the precision is in the original type.
I think this is right but I could be wrong.
Finally, when doing libcalls, set isZExt on
a parameter if it is "unsigned". Currently
isSExt is set when signed, and nothing is
set otherwise. This should be right for all
calls to standard library routines.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47122 91177308-0d34-0410-b5e6-96231b3b80d8
parcISelDAGToDAG.cpp
|
| e179584f9b740cf3a36bde70f8cab40de59b8081 |
14-Feb-2008 |
Nate Begeman <natebegeman@mac.com> |
Change how FP immediates are handled.
1) ConstantFP is now expand by default
2) ConstantFP is not turned into TargetConstantFP during Legalize
if it is legal.
This allows ConstantFP to be handled like Constant, allowing for
targets that can encode FP immediates as MachineOperands.
As a bonus, fix up Itanium FP constants, which now correctly match,
and match more constants! Hooray.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47121 91177308-0d34-0410-b5e6-96231b3b80d8
parcISelDAGToDAG.cpp
|
| 977a76fbb6ea1b87dfd7fbbe2ae2afb63e982ff3 |
13-Feb-2008 |
Dan Gohman <gohman@apple.com> |
Simplify some logic in ComputeMaskedBits. And change ComputeMaskedBits
to pass the mask APInt by value, not by reference.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47096 91177308-0d34-0410-b5e6-96231b3b80d8
parcISelDAGToDAG.cpp
|
| fd29e0eb060ea8b4d490860329234d2ae5f5952e |
13-Feb-2008 |
Dan Gohman <gohman@apple.com> |
Convert SelectionDAG::ComputeMaskedBits to use APInt instead of uint64_t.
Add an overload that supports the uint64_t interface for use by clients
that haven't been updated yet.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47039 91177308-0d34-0410-b5e6-96231b3b80d8
parcISelDAGToDAG.cpp
|
| 6f0d024a534af18d9e60b3ea757376cd8a3a980e |
10-Feb-2008 |
Dan Gohman <gohman@apple.com> |
Rename MRegisterInfo to TargetRegisterInfo.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46930 91177308-0d34-0410-b5e6-96231b3b80d8
parcAsmPrinter.cpp
parcInstrInfo.h
parcRegisterInfo.cpp
parcRegisterInfo.h
parcTargetMachine.h
|
| 5fd79d0560570fed977788a86fa038b898564dfa |
08-Feb-2008 |
Evan Cheng <evan.cheng@apple.com> |
It's not always safe to fold movsd into xorpd, etc. Check the alignment of the load address first to make sure it's 16 byte aligned.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46893 91177308-0d34-0410-b5e6-96231b3b80d8
parcInstrInfo.cpp
parcInstrInfo.h
|
| 69de1932b350d7cdfc0ed1f4198d6f78c7822a02 |
06-Feb-2008 |
Dan Gohman <gohman@apple.com> |
Re-apply the memory operand changes, with a fix for the static
initializer problem, a minor tweak to the way the
DAGISelEmitter finds load/store nodes, and a renaming of the
new PseudoSourceValue objects.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46827 91177308-0d34-0410-b5e6-96231b3b80d8
parcISelDAGToDAG.cpp
|
| 4e3f5a4e9c13f216856515e6f000881f2c850736 |
05-Feb-2008 |
Evan Cheng <evan.cheng@apple.com> |
Dwarf requires variable entries to be in the source order. Right now, since we are recording variable information at isel time this means parameters would appear in the reverse order. The short term fix is to issue recordVariable() at asm printing time instead.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46724 91177308-0d34-0410-b5e6-96231b3b80d8
parcISelDAGToDAG.cpp
|
| 3d62d780abbe0c2dd8edd7dd37a27365b2032d73 |
03-Feb-2008 |
Chris Lattner <sabre@nondot.org> |
explicitly include Compiler.h instead of getting it from tblgen in the middle of a class.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46676 91177308-0d34-0410-b5e6-96231b3b80d8
parcISelDAGToDAG.cpp
|
| 4eecdeb3faf5df864790175da5d58301b751ec11 |
02-Feb-2008 |
Evan Cheng <evan.cheng@apple.com> |
Get rid of the annoying blank lines before labels.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46667 91177308-0d34-0410-b5e6-96231b3b80d8
parcAsmPrinter.cpp
|
| a844bdeab31ef04221e7ef59a8467893584cc14d |
02-Feb-2008 |
Evan Cheng <evan.cheng@apple.com> |
SDIsel processes llvm.dbg.declare by recording the variable debug information descriptor and its corresponding stack frame index in MachineModuleInfo. This only works if the local variable is "homed" in the stack frame. It does not work for byval parameter, etc.
Added ISD::DECLARE node type to represent llvm.dbg.declare intrinsic. Now the intrinsic calls are lowered into a SDNode and lives on through out the codegen passes.
For now, since all the debugging information recording is done at isel time, when a ISD::DECLARE node is selected, it has the side effect of also recording the variable. This is a short term solution that should be fixed in time.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46659 91177308-0d34-0410-b5e6-96231b3b80d8
parcISelDAGToDAG.cpp
|
| 334dc1f58d617dcff969a2e107febaae42bbc883 |
31-Jan-2008 |
Evan Cheng <evan.cheng@apple.com> |
Revert 46556 and 46585. Dan please fix the PseudoSourceValue problem and re-commit.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46623 91177308-0d34-0410-b5e6-96231b3b80d8
parcISelDAGToDAG.cpp
|
| c6c391daddbafa722d9ca87d18f204e9a6e617a3 |
31-Jan-2008 |
Dan Gohman <gohman@apple.com> |
Create a new class, MemOperand, for describing memory references
in the backend. Introduce a new SDNode type, MemOperandSDNode, for
holding a MemOperand in the SelectionDAG IR, and add a MemOperand
list to MachineInstr, and code to manage them. Remove the offset
field from SrcValueSDNode; uses of SrcValueSDNode that were using
it are all all using MemOperandSDNode now.
Also, begin updating some getLoad and getStore calls to use the
PseudoSourceValue objects.
Most of this was written by Florian Brander, some
reorganization and updating to TOT by me.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46585 91177308-0d34-0410-b5e6-96231b3b80d8
parcISelDAGToDAG.cpp
|
| ff9b373e8f5006c629af81e2619778b4c4f5249e |
30-Jan-2008 |
Evan Cheng <evan.cheng@apple.com> |
Even though InsertAtEndOfBasicBlock is an ugly hack it still deserves a proper name. Rename it to EmitInstrWithCustomInserter since it does not necessarily insert
instruction at the end.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46562 91177308-0d34-0410-b5e6-96231b3b80d8
parcISelDAGToDAG.cpp
|
| d102593b425da27fa96359300ff0e3d547d0ac8d |
29-Jan-2008 |
Duncan Sands <baldrick@free.fr> |
Use getPreferredAlignmentLog or getPreferredAlignment
to get the alignment of global variables, rather than
using hand-made versions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46495 91177308-0d34-0410-b5e6-96231b3b80d8
parcAsmPrinter.cpp
|
| f9c98e650d2795b8edfae8e1560c221029df218b |
23-Jan-2008 |
Duncan Sands <baldrick@free.fr> |
The last pieces needed for loading arbitrary
precision integers. This won't actually work
(and most of the code is dead) unless the new
legalization machinery is turned on. While
there, I rationalized the handling of i1, and
removed some bogus (and unused) sextload patterns.
For i1, this could result in microscopically
better code for some architectures (not X86).
It might also result in worse code if annotating
with AssertZExt nodes turns out to be more harmful
than helpful.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46280 91177308-0d34-0410-b5e6-96231b3b80d8
parcISelDAGToDAG.cpp
|
| ddf89566a93081cb230bb9406a72ab2d3eada4a7 |
17-Jan-2008 |
Chris Lattner <sabre@nondot.org> |
This commit changes:
1. Legalize now always promotes truncstore of i1 to i8.
2. Remove patterns and gunk related to truncstore i1 from targets.
3. Rename the StoreXAction stuff to TruncStoreAction in TLI.
4. Make the TLI TruncStoreAction table a 2d table to handle from/to conversions.
5. Mark a wide variety of invalid truncstores as such in various targets, e.g.
X86 currently doesn't support truncstore of any of its integer types.
6. Add legalize support for truncstores with invalid value input types.
7. Add a dag combine transform to turn store(truncate) into truncstore when
safe.
The later allows us to compile CodeGen/X86/storetrunc-fp.ll to:
_foo:
fldt 20(%esp)
fldt 4(%esp)
faddp %st(1)
movl 36(%esp), %eax
fstps (%eax)
ret
instead of:
_foo:
subl $4, %esp
fldt 24(%esp)
fldt 8(%esp)
faddp %st(1)
fstps (%esp)
movl 40(%esp), %eax
movss (%esp), %xmm0
movss %xmm0, (%eax)
addl $4, %esp
ret
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46140 91177308-0d34-0410-b5e6-96231b3b80d8
parcInstrInfo.td
|
| 5080f4d9919d39b367891dc51e739c571a66036c |
11-Jan-2008 |
Chris Lattner <sabre@nondot.org> |
rename MachineInstr::setInstrDescriptor -> setDesc
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45871 91177308-0d34-0410-b5e6-96231b3b80d8
PMover.cpp
|
| 9c5525f4fa177e20077710c980f08e2f8de06e39 |
07-Jan-2008 |
Duncan Sands <baldrick@free.fr> |
Add missing newline at EOF.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45712 91177308-0d34-0410-b5e6-96231b3b80d8
parcInstrInfo.cpp
|
| 749c6f6b5ed301c84aac562e414486549d7b98eb |
07-Jan-2008 |
Chris Lattner <sabre@nondot.org> |
rename TargetInstrDescriptor -> TargetInstrDesc.
Make MachineInstr::getDesc return a reference instead
of a pointer, since it can never be null.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45695 91177308-0d34-0410-b5e6-96231b3b80d8
elaySlotFiller.cpp
|
| 69244300b8a0112efb44b6273ecea4ca6264b8cf |
07-Jan-2008 |
Chris Lattner <sabre@nondot.org> |
Rename MachineInstr::getInstrDescriptor -> getDesc(), which reflects
that it is cheap and efficient to get.
Move a variety of predicates from TargetInstrInfo into
TargetInstrDescriptor, which makes it much easier to query a predicate
when you don't have TII around. Now you can use MI->getDesc()->isBranch()
instead of going through TII, and this is much more efficient anyway. Not
all of the predicates have been moved over yet.
Update old code that used MI->getInstrDescriptor()->Flags to use the
new predicates in many places.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45674 91177308-0d34-0410-b5e6-96231b3b80d8
elaySlotFiller.cpp
|
| 43dbe05279b753aabda571d9c83eaeb36987001a |
07-Jan-2008 |
Owen Anderson <resistor@mac.com> |
Move even more functionality from MRegisterInfo into TargetInstrInfo.
Some day I'll get it all moved over...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45672 91177308-0d34-0410-b5e6-96231b3b80d8
parcInstrInfo.cpp
parcInstrInfo.h
parcRegisterInfo.cpp
parcRegisterInfo.h
|
| f6372aa1cc568df19da7c5023e83c75aa9404a07 |
01-Jan-2008 |
Owen Anderson <resistor@mac.com> |
Move some more instruction creation methods from RegisterInfo into InstrInfo.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45484 91177308-0d34-0410-b5e6-96231b3b80d8
parcInstrInfo.cpp
parcInstrInfo.h
parcRegisterInfo.cpp
parcRegisterInfo.h
|
| 641055225092833197efe8e5bce01d50bcf1daae |
01-Jan-2008 |
Chris Lattner <sabre@nondot.org> |
Fix a problem where lib/Target/TargetInstrInfo.h would include and use
a header file from libcodegen. This violates a layering order: codegen
depends on target, not the other way around. The fix to this is to
split TII into two classes, TII and TargetInstrInfoImpl, which defines
stuff that depends on libcodegen. It is defined in libcodegen, where
the base is not.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45475 91177308-0d34-0410-b5e6-96231b3b80d8
parcInstrInfo.cpp
parcInstrInfo.h
|
| d10fd9791c20fd8368fa0ce94b626b769c6c8ba0 |
31-Dec-2007 |
Owen Anderson <resistor@mac.com> |
Move copyRegToReg from MRegisterInfo to TargetInstrInfo. This is part of the
Machine-level API cleanup instigated by Chris.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45470 91177308-0d34-0410-b5e6-96231b3b80d8
parcInstrInfo.cpp
parcInstrInfo.h
parcRegisterInfo.cpp
|
| 84bc5427d6883f73cfeae3da640acd011d35c006 |
31-Dec-2007 |
Chris Lattner <sabre@nondot.org> |
Rename SSARegMap -> MachineRegisterInfo in keeping with the idea
that "machine" classes are used to represent the current state of
the code being compiled. Given this expanded name, we can start
moving other stuff into it. For now, move the UsedPhysRegs and
LiveIn/LoveOuts vectors from MachineFunction into it.
Update all the clients to match.
This also reduces some needless #includes, such as MachineModuleInfo
from MachineFunction.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45467 91177308-0d34-0410-b5e6-96231b3b80d8
parcISelDAGToDAG.cpp
|
| 8aa797aa51cd4ea1ec6f46f4891a6897944b75b2 |
31-Dec-2007 |
Chris Lattner <sabre@nondot.org> |
Add new shorter predicates for testing machine operands for various types:
e.g. MO.isMBB() instead of MO.isMachineBasicBlock(). I don't plan on
switching everything over, so new clients should just start using the
shorter names.
Remove old long accessors, switching everything over to use the short
accessor: getMachineBasicBlock() -> getMBB(),
getConstantPoolIndex() -> getIndex(), setMachineBasicBlock -> setMBB(), etc.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45464 91177308-0d34-0410-b5e6-96231b3b80d8
parcAsmPrinter.cpp
parcInstrInfo.cpp
parcRegisterInfo.cpp
|
| 9a1ceaedc282f0cae31f2723f4d6c00c7b88fe90 |
30-Dec-2007 |
Chris Lattner <sabre@nondot.org> |
Use MachineOperand::getImm instead of MachineOperand::getImmedValue. Likewise setImmedValue -> setImm
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45453 91177308-0d34-0410-b5e6-96231b3b80d8
parcAsmPrinter.cpp
parcISelDAGToDAG.cpp
parcInstrInfo.cpp
parcRegisterInfo.cpp
|
| 4ee451de366474b9c228b4e5fa573795a715216d |
29-Dec-2007 |
Chris Lattner <sabre@nondot.org> |
Remove attribution from file headers, per discussion on llvmdev.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45418 91177308-0d34-0410-b5e6-96231b3b80d8
elaySlotFiller.cpp
PMover.cpp
parc.h
parc.td
parcAsmPrinter.cpp
parcISelDAGToDAG.cpp
parcInstrFormats.td
parcInstrInfo.cpp
parcInstrInfo.h
parcInstrInfo.td
parcRegisterInfo.cpp
parcRegisterInfo.h
parcRegisterInfo.td
parcSubtarget.cpp
parcSubtarget.h
parcTargetAsmInfo.cpp
parcTargetAsmInfo.h
parcTargetMachine.cpp
parcTargetMachine.h
|
| fc643c5e88c596f217750dd91fcc66488dfed73d |
29-Dec-2007 |
Chris Lattner <sabre@nondot.org> |
remove attribution from lib Makefiles.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45415 91177308-0d34-0410-b5e6-96231b3b80d8
akefile
|
| 6e141fd04897e5eb4925bb6351297170ebd8a756 |
13-Dec-2007 |
Evan Cheng <evan.cheng@apple.com> |
Implicit def instructions, e.g. X86::IMPLICIT_DEF_GR32, are always re-materializable and they should not be spilled.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@44960 91177308-0d34-0410-b5e6-96231b3b80d8
parcInstrInfo.td
|
| d64b5c82b97ad1b74eb9fd2f23257a7899b0c307 |
05-Dec-2007 |
Evan Cheng <evan.cheng@apple.com> |
Add a argument to storeRegToStackSlot and storeRegToAddr to specify whether
the stored register is killed.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@44600 91177308-0d34-0410-b5e6-96231b3b80d8
parcRegisterInfo.cpp
parcRegisterInfo.h
|
| aee4af68ae2016afc5b4ec0c430e539c5810a766 |
02-Dec-2007 |
Evan Cheng <evan.cheng@apple.com> |
Remove redundant foldMemoryOperand variants and other code clean up.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@44517 91177308-0d34-0410-b5e6-96231b3b80d8
parcRegisterInfo.cpp
parcRegisterInfo.h
|
| e62f97c094dba44e4c259d20135167fa91912eea |
01-Dec-2007 |
Evan Cheng <evan.cheng@apple.com> |
Allow some reloads to be folded in multi-use cases. Specifically testl r, r -> cmpl [mem], 0.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@44479 91177308-0d34-0410-b5e6-96231b3b80d8
parcRegisterInfo.h
|
| b97aec663b1591e71c9ddee6dbb327d1b827eda5 |
13-Nov-2007 |
Dale Johannesen <dalej@apple.com> |
Add parameter to getDwarfRegNum to permit targets
to use different mappings for EH and debug info;
no functional change yet.
Fix warning in X86CodeEmitter.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@44056 91177308-0d34-0410-b5e6-96231b3b80d8
parcRegisterInfo.cpp
parcRegisterInfo.h
|
| c69107ca11282a905c252d1b62091951087f13dc |
13-Nov-2007 |
Bill Wendling <isanbard@gmail.com> |
Unifacalize the CALLSEQ{START,END} stuff.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@44045 91177308-0d34-0410-b5e6-96231b3b80d8
parcInstrInfo.td
|
| 0f8d9c04d9feef86cee35cf5fecfb348a6b3de50 |
13-Nov-2007 |
Bill Wendling <isanbard@gmail.com> |
Unify CALLSEQ_{START,END}. They take 4 parameters: the chain, two stack
adjustment fields, and an optional flag. If there is a "dynamic_stackalloc" in
the code, make sure that it's bracketed by CALLSEQ_START and CALLSEQ_END. If
not, then there is the potential for the stack to be changed while the stack's
being used by another instruction (like a call).
This can only result in tears...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@44037 91177308-0d34-0410-b5e6-96231b3b80d8
parcISelDAGToDAG.cpp
parcInstrInfo.td
|
| f191c80cd79ee35e47b5a4feed98d687782dfe85 |
11-Nov-2007 |
Anton Korobeynikov <asl@math.spbu.ru> |
Use TableGen to emit information for dwarf register numbers.
This makes DwarfRegNum to accept list of numbers instead.
Added three different "flavours", but only slightly tested on x86-32/linux.
Please check another subtargets if possible,
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43997 91177308-0d34-0410-b5e6-96231b3b80d8
parcRegisterInfo.cpp
parcRegisterInfo.h
parcRegisterInfo.td
|
| ca0ed744852a7d9625572fbb793f65e81225a3e8 |
05-Nov-2007 |
Duncan Sands <baldrick@free.fr> |
Eliminate the remaining uses of getTypeSize. This
should only effect x86 when using long double. Now
12/16 bytes are output for long double globals (the
exact amount depends on the alignment). This brings
globals in line with the rest of LLVM: the space
reserved for an object is now always the ABI size.
One tricky point is that only 10 bytes should be
output for long double if it is a field in a packed
struct, which is the reason for the additional
argument to EmitGlobalConstant.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43688 91177308-0d34-0410-b5e6-96231b3b80d8
parcAsmPrinter.cpp
|
| f0a0cddbcda344a90b7217b744c78dccec71851c |
19-Oct-2007 |
Evan Cheng <evan.cheng@apple.com> |
- Added getOpcodeAfterMemoryUnfold(). It doesn't unfold an instruction, but only returns the opcode of the instruction post unfolding.
- Fix some copy+paste bugs.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43153 91177308-0d34-0410-b5e6-96231b3b80d8
parcRegisterInfo.cpp
parcRegisterInfo.h
|
| 58184e6878fdab651bc7c9a59dab2687ca82ede2 |
18-Oct-2007 |
Evan Cheng <evan.cheng@apple.com> |
Use SmallVectorImpl instead of SmallVector with hardcoded size in MRegister public interface.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43150 91177308-0d34-0410-b5e6-96231b3b80d8
parcRegisterInfo.cpp
parcRegisterInfo.h
|
| 347d39f1fd8ad825a7ec5b8a3dce816723a56d42 |
14-Oct-2007 |
Evan Cheng <evan.cheng@apple.com> |
Revert 42908 for now.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42960 91177308-0d34-0410-b5e6-96231b3b80d8
parcAsmPrinter.cpp
|
| 8ddde0a151c5297ae5694a4b9201b2d3fe56b196 |
12-Oct-2007 |
Dan Gohman <gohman@apple.com> |
Change the names used for internal labels to use the current
function symbol name instead of a codegen-assigned function
number.
Thanks Evan! :-)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42908 91177308-0d34-0410-b5e6-96231b3b80d8
parcAsmPrinter.cpp
|
| f96e4de403453e57aea75bcac1ed99af686d33c4 |
12-Oct-2007 |
Dan Gohman <gohman@apple.com> |
Set ISD::FPOW to Expand.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42881 91177308-0d34-0410-b5e6-96231b3b80d8
parcISelDAGToDAG.cpp
|
| 85d0aaa291f6984a29a3753d427a5f1be7ab7bd2 |
10-Oct-2007 |
Chris Lattner <sabre@nondot.org> |
Fix CodeGen/Generic/BasicInstrs.llx on sparc by marking divrem
illegal. Thanks to gabor for pointing this out!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42832 91177308-0d34-0410-b5e6-96231b3b80d8
parcISelDAGToDAG.cpp
|
| 66f0f640820b61cf9db814b6d187bae9faf7279c |
05-Oct-2007 |
Evan Cheng <evan.cheng@apple.com> |
- Added a few target hooks to generate load / store instructions from / to any
address (not just from / to frameindexes).
- Added target hooks to unfold load / store instructions / SDNodes into separate
load, data processing, store instructions / SDNodes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42621 91177308-0d34-0410-b5e6-96231b3b80d8
parcRegisterInfo.cpp
parcRegisterInfo.h
|
| 9efce638d307b2c71bd7f0258d47501661434c27 |
26-Sep-2007 |
Evan Cheng <evan.cheng@apple.com> |
Allow copyRegToReg to emit cross register classes copies.
Tested with "make check"!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42346 91177308-0d34-0410-b5e6-96231b3b80d8
parcRegisterInfo.cpp
parcRegisterInfo.h
|
| 677ccc6e8b912e1a39259952b125954820062541 |
25-Sep-2007 |
Dan Gohman <gohman@apple.com> |
More explicit keywords.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42316 91177308-0d34-0410-b5e6-96231b3b80d8
parcTargetAsmInfo.h
|
| 071a279e94e30d51aff3b46a4651d686982488a0 |
11-Sep-2007 |
Evan Cheng <evan.cheng@apple.com> |
Remove (somewhat confusing) Imp<> helper, use let Defs = [], Uses = [] instead.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41863 91177308-0d34-0410-b5e6-96231b3b80d8
parcInstrInfo.td
|
| f7331b3dd72409e644833ecaf62a0f6db03c97ee |
11-Sep-2007 |
Duncan Sands <baldrick@free.fr> |
Fold the adjust_trampoline intrinsic into
init_trampoline. There is now only one
trampoline intrinsic.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41841 91177308-0d34-0410-b5e6-96231b3b80d8
parcISelDAGToDAG.cpp
|
| 718cb665ca6ce2bc4d8e8479f46a45db91b49f86 |
07-Sep-2007 |
Owen Anderson <resistor@mac.com> |
Add lengthof and endof templates that hide a lot of sizeof computations.
Patch by Sterling Stein!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41758 91177308-0d34-0410-b5e6-96231b3b80d8
parcInstrInfo.cpp
|
| 35b35c5c320a71e4611fe2101452da685f8eeda0 |
30-Aug-2007 |
Evan Cheng <evan.cheng@apple.com> |
Add a variant of foldMemoryOperand to fold any load / store, not just load / store from / to stack slots.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41597 91177308-0d34-0410-b5e6-96231b3b80d8
parcRegisterInfo.h
|
| 8c1e6a119a68b258365677a9ee5176af3525a26f |
03-Aug-2007 |
Dale Johannesen <dalej@apple.com> |
long double patch 2 of N. Handle it in TargetData.
(I've tried to get the info right for all targets,
but I'm not expert on all of them - check yours.)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@40792 91177308-0d34-0410-b5e6-96231b3b80d8
parcTargetMachine.cpp
|
| 36397f50343639ce9a25996f2d790c656791ab92 |
27-Jul-2007 |
Duncan Sands <baldrick@free.fr> |
Support for trampolines, except for X86 codegen which is
still under discussion.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@40549 91177308-0d34-0410-b5e6-96231b3b80d8
parcISelDAGToDAG.cpp
|
| b8275a3f6f6497889653cb2452d82a46f92b4926 |
25-Jul-2007 |
Dan Gohman <gohman@apple.com> |
Don't ignore the return value of AsmPrinter::doInitialization and
AsmPrinter::doFinalization.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@40487 91177308-0d34-0410-b5e6-96231b3b80d8
parcAsmPrinter.cpp
|
| ffbaccae029ac238972e3814967260f029b6058a |
21-Jul-2007 |
Evan Cheng <evan.cheng@apple.com> |
No more noResults.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@40132 91177308-0d34-0410-b5e6-96231b3b80d8
parcInstrInfo.td
|
| 64d80e3387f328d21cd9cc06464b5de7861e3f27 |
19-Jul-2007 |
Evan Cheng <evan.cheng@apple.com> |
Change instruction description to split OperandList into OutOperandList and
InOperandList. This gives one piece of important information: # of results
produced by an instruction.
An example of the change:
def ADD32rr : I<0x01, MRMDestReg, (ops GR32:$dst, GR32:$src1, GR32:$src2),
"add{l} {$src2, $dst|$dst, $src2}",
[(set GR32:$dst, (add GR32:$src1, GR32:$src2))]>;
=>
def ADD32rr : I<0x01, MRMDestReg, (outs GR32:$dst), (ins GR32:$src1, GR32:$src2),
"add{l} {$src2, $dst|$dst, $src2}",
[(set GR32:$dst, (add GR32:$src1, GR32:$src2))]>;
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@40033 91177308-0d34-0410-b5e6-96231b3b80d8
parcInstrFormats.td
parcInstrInfo.td
|
| 2365f51ed03afe6993bae962fdc2e5a956a64cd5 |
14-Jul-2007 |
Anton Korobeynikov <asl@math.spbu.ru> |
Long live the exception handling!
This patch fills the last necessary bits to enable exceptions
handling in LLVM. Currently only on x86-32/linux.
In fact, this patch adds necessary intrinsics (and their lowering) which
represent really weird target-specific gcc builtins used inside unwinder.
After corresponding llvm-gcc patch will land (easy) exceptions should be
more or less workable. However, exceptions handling support should not be
thought as 'finished': I expect many small and not so small glitches
everywhere.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@39855 91177308-0d34-0410-b5e6-96231b3b80d8
parcRegisterInfo.cpp
parcRegisterInfo.h
|
| 03494d7c8ff981a7466da89fd6798313b2fb222e |
14-Jul-2007 |
Evan Cheng <evan.cheng@apple.com> |
Fix for PR1540: Specify F0, F1 are sub-registers of D0, etc.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@39843 91177308-0d34-0410-b5e6-96231b3b80d8
parcRegisterInfo.td
|
| 8dc4b59b857fdffe79dca0a3a8516ddf942d5466 |
13-Jul-2007 |
Chris Lattner <sabre@nondot.org> |
Fix CodeGen/Generic/print-arith-fp.ll on sparc (PR1551)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@39813 91177308-0d34-0410-b5e6-96231b3b80d8
parcISelDAGToDAG.cpp
|
| 75ce010f7b6a47d9656e546b5db4a9cd77ba1dee |
11-Jul-2007 |
Lauro Ramos Venancio <lauro.venancio@gmail.com> |
Assert when TLS is not implemented.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@39737 91177308-0d34-0410-b5e6-96231b3b80d8
parcISelDAGToDAG.cpp
|
| 082ced939152e141d6e6e82dc56ecba13078ae18 |
11-Jul-2007 |
Chris Lattner <sabre@nondot.org> |
Fix an oversight: for modules with no other identifying target info,
the sparc backend should be preferred when running on sparcs.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@39142 91177308-0d34-0410-b5e6-96231b3b80d8
parcTargetMachine.cpp
|
| 87bdba6d6a1684373c94df0363a3b620de6dab6c |
09-Jul-2007 |
Chris Lattner <sabre@nondot.org> |
The various "getModuleMatchQuality" implementations should return
zero if they see a target triple they don't understand.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@38463 91177308-0d34-0410-b5e6-96231b3b80d8
parcTargetMachine.cpp
|
| e644ef7b098460ce831220c780cbe25eaef3fb28 |
29-Jun-2007 |
John Criswell <criswell@uiuc.edu> |
Convert .cvsignore files
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37801 91177308-0d34-0410-b5e6-96231b3b80d8
cvsignore
|
| ea859be53ca13a1547c4675549946b74dc3c6f41 |
22-Jun-2007 |
Dan Gohman <gohman@apple.com> |
Move ComputeMaskedBits, MaskedValueIsZero, and ComputeNumSignBits from
TargetLowering to SelectionDAG so that they have more convenient
access to the current DAG, in preparation for the ValueType routines
being changed from standalone functions to members of SelectionDAG for
the pre-legalize vector type changes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37704 91177308-0d34-0410-b5e6-96231b3b80d8
parcISelDAGToDAG.cpp
|
| 6ae3626a4fda14e6250ac8d8ff487efb8952cdf7 |
18-May-2007 |
Evan Cheng <evan.cheng@apple.com> |
RemoveBranch() and InsertBranch() now returns number of instructions deleted / inserted.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37193 91177308-0d34-0410-b5e6-96231b3b80d8
parcInstrInfo.cpp
parcInstrInfo.h
|
| 1997473cf72957d0e70322e2fe6fe2ab141c58a6 |
03-May-2007 |
Devang Patel <dpatel@apple.com> |
Drop 'const'
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36662 91177308-0d34-0410-b5e6-96231b3b80d8
elaySlotFiller.cpp
PMover.cpp
|
| 3e15bf33e024b9df9e89351a165acfdb1dde51ed |
02-May-2007 |
Devang Patel <dpatel@apple.com> |
Use 'static const char' instead of 'static const int'.
Due to darwin gcc bug, one version of darwin linker coalesces
static const int, which defauts PassID based pass identification.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36652 91177308-0d34-0410-b5e6-96231b3b80d8
elaySlotFiller.cpp
PMover.cpp
|
| 794fd75c67a2cdc128d67342c6d88a504d186896 |
01-May-2007 |
Devang Patel <dpatel@apple.com> |
Do not use typeinfo to identify pass in pass manager.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36632 91177308-0d34-0410-b5e6-96231b3b80d8
elaySlotFiller.cpp
PMover.cpp
|
| 97de9138217d6f76f25100df272ec1a3c4d31aad |
01-May-2007 |
Evan Cheng <evan.cheng@apple.com> |
eliminateFrameIndex() change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36626 91177308-0d34-0410-b5e6-96231b3b80d8
parcRegisterInfo.cpp
parcRegisterInfo.h
|
| bf2c8b3c96f5c885095a10b0fcb29438f92d73c2 |
20-Mar-2007 |
Evan Cheng <evan.cheng@apple.com> |
Added MRegisterInfo hook to re-materialize an instruction.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35205 91177308-0d34-0410-b5e6-96231b3b80d8
parcRegisterInfo.cpp
parcRegisterInfo.h
|
| d0b82b301d700217a716526f9329bb031e0d6578 |
07-Mar-2007 |
Anton Korobeynikov <asl@math.spbu.ru> |
Refactoring of formal parameter flags. Enable properly use of
zext/sext/aext stuff.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35008 91177308-0d34-0410-b5e6-96231b3b80d8
parcISelDAGToDAG.cpp
|
| 5e6df4647e15c50daea9a8a4e7f4f417a266335c |
28-Feb-2007 |
Evan Cheng <evan.cheng@apple.com> |
PEI now passes a RegScavenger ptr to eliminateFrameIndex.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34707 91177308-0d34-0410-b5e6-96231b3b80d8
parcRegisterInfo.cpp
parcRegisterInfo.h
|
| 0fa1b6d1b1ce5437c30585baddcba20e691d31e0 |
23-Feb-2007 |
Evan Cheng <evan.cheng@apple.com> |
By default, spills kills the register being stored.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34515 91177308-0d34-0410-b5e6-96231b3b80d8
parcRegisterInfo.cpp
|
| 2ad9f17fee5d6395cd8db81668853e6dbf94060b |
22-Feb-2007 |
Jim Laskey <jlaskey@mac.com> |
Simplify lowering and selection of exception ops.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34488 91177308-0d34-0410-b5e6-96231b3b80d8
parcISelDAGToDAG.cpp
|
| 62819f31440fe1b1415473a89b8683b5b690d5fa |
21-Feb-2007 |
Jim Laskey <jlaskey@mac.com> |
Support to provide exception and selector registers.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34482 91177308-0d34-0410-b5e6-96231b3b80d8
parcISelDAGToDAG.cpp
parcRegisterInfo.cpp
parcRegisterInfo.h
|
| b371f457b0ea4a652a9f526ba4375c80ae542252 |
19-Feb-2007 |
Evan Cheng <evan.cheng@apple.com> |
Re-apply my liveintervalanalysis changes. Now with PR1207 fixes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34428 91177308-0d34-0410-b5e6-96231b3b80d8
parcRegisterInfo.cpp
parcRegisterInfo.h
|
| a284cbf667e11660840dc7bae3ee9eeaa3c7cbd2 |
19-Feb-2007 |
Reid Spencer <rspencer@reidspencer.com> |
For PR1207:
Revert patches that caused the problem. Evan, please investigate and reapply
when you've discovered the problem.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34399 91177308-0d34-0410-b5e6-96231b3b80d8
parcRegisterInfo.cpp
parcRegisterInfo.h
|
| eceada67286f0d8081c23aedd242f4deeffa85ad |
17-Feb-2007 |
Evan Cheng <evan.cheng@apple.com> |
Added getReservedRegs().
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34376 91177308-0d34-0410-b5e6-96231b3b80d8
parcRegisterInfo.cpp
parcRegisterInfo.h
|
| d2b7cec527a0efa552628378ebca7a8ca63bb45d |
14-Feb-2007 |
Chris Lattner <sabre@nondot.org> |
Generalize TargetData strings, to support more interesting forms of data.
Patch by Scott Michel.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34266 91177308-0d34-0410-b5e6-96231b3b80d8
parcAsmPrinter.cpp
|
| bcc5f36765e8111c13873a0c0dc874c92385d808 |
29-Jan-2007 |
Nate Begeman <natebegeman@mac.com> |
Finish off bug 680, allowing targets to custom lower frame and return
address nodes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33636 91177308-0d34-0410-b5e6-96231b3b80d8
parcISelDAGToDAG.cpp
|
| 1ee29257428960fede862fcfdbe80d5d007927e9 |
26-Jan-2007 |
Jim Laskey <jlaskey@mac.com> |
Make LABEL a builtin opcode.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33537 91177308-0d34-0410-b5e6-96231b3b80d8
parcISelDAGToDAG.cpp
|
| dc77540d9506dc151d79b94bae88bd841880ef37 |
23-Jan-2007 |
Evan Cheng <evan.cheng@apple.com> |
hasFP() is now a virtual method of MRegisterInfo.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33455 91177308-0d34-0410-b5e6-96231b3b80d8
parcRegisterInfo.cpp
parcRegisterInfo.h
|
| 58092e35a3368e130438cbc793c8f9dce2e4fe0f |
20-Jan-2007 |
Chris Lattner <sabre@nondot.org> |
Teach TargetData to handle 'preferred' alignment for each target, and use
these alignment amounts to align scalars when we can. Patch by Scott Michel!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33409 91177308-0d34-0410-b5e6-96231b3b80d8
parcAsmPrinter.cpp
|
| c2b861da18c54a4252fecba866341e1513fa18cc |
02-Jan-2007 |
Evan Cheng <evan.cheng@apple.com> |
Fix naming inconsistency.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32823 91177308-0d34-0410-b5e6-96231b3b80d8
parcRegisterInfo.cpp
parcRegisterInfo.h
|
| 47857812e29324a9d1560796a05b53d3a9217fd9 |
31-Dec-2006 |
Reid Spencer <rspencer@reidspencer.com> |
For PR950:
Three changes:
1. Convert signed integer types to signless versions.
2. Implement the @sext and @zext parameter attributes. Previously the
type of an function parameter was used to determine whether it should
be sign extended or zero extended before the call. This information is
now communicated via the function type's parameter attributes.
3. The interface to LowerCallTo had to be changed in order to accommodate
the parameter attribute information. Although it would have been
convenient to pass in the FunctionType itself, there isn't always one
present in the caller. Consequently, a signedness indication for the
result type and for each parameter was provided for in the interface
to this method. All implementations were changed to make the adjustment
necessary.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32788 91177308-0d34-0410-b5e6-96231b3b80d8
parcISelDAGToDAG.cpp
|
| 95b2c7da5e83670881270c1cd231a240be0556d9 |
19-Dec-2006 |
Chris Lattner <sabre@nondot.org> |
eliminate static ctors for Statistic objects.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32703 91177308-0d34-0410-b5e6-96231b3b80d8
elaySlotFiller.cpp
PMover.cpp
parcAsmPrinter.cpp
|
| f5da13367f88f06e3b585dc2263ab6e9ca6c4bf8 |
07-Dec-2006 |
Bill Wendling <isanbard@gmail.com> |
What should be the last unnecessary <iostream>s in the library.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32333 91177308-0d34-0410-b5e6-96231b3b80d8
PMover.cpp
parcAsmPrinter.cpp
parcISelDAGToDAG.cpp
parcRegisterInfo.cpp
parcTargetMachine.cpp
|
| ac0b6ae358944ae8b2b5a11dc08f52c3ed89f2da |
06-Dec-2006 |
Chris Lattner <sabre@nondot.org> |
Detemplatize the Statistic class. The only type it is instantiated with
is 'unsigned'.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32279 91177308-0d34-0410-b5e6-96231b3b80d8
elaySlotFiller.cpp
PMover.cpp
parcAsmPrinter.cpp
|
| d17aa4b1f17f6d3fcd9079aef239ff16cfb5907f |
06-Dec-2006 |
Chris Lattner <sabre@nondot.org> |
These asm printers shouldn't use assembly/writer.h
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32262 91177308-0d34-0410-b5e6-96231b3b80d8
parcAsmPrinter.cpp
|
| 12a447898a3c68c1a9489f71b82650b46244d00a |
30-Nov-2006 |
Evan Cheng <evan.cheng@apple.com> |
MachineInstr::setOpcode -> MachineInstr::setInstrDescriptor
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32034 91177308-0d34-0410-b5e6-96231b3b80d8
PMover.cpp
|
| c0f64ffab93d11fb27a3b8a0707b77400918a20e |
28-Nov-2006 |
Evan Cheng <evan.cheng@apple.com> |
Change MachineInstr ctor's to take a TargetInstrDescriptor reference instead
of opcode and number of operands.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31947 91177308-0d34-0410-b5e6-96231b3b80d8
elaySlotFiller.cpp
PMover.cpp
parcISelDAGToDAG.cpp
parcInstrInfo.cpp
parcRegisterInfo.cpp
parcRegisterInfo.h
|
| 6ce7dc2a97260eea5fba414332796464912b9359 |
15-Nov-2006 |
Evan Cheng <evan.cheng@apple.com> |
Properly transfer kill / dead info.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31765 91177308-0d34-0410-b5e6-96231b3b80d8
parcRegisterInfo.cpp
|
| 7ce45783531cfa81bfd7be561ea7e4738e8c6ca8 |
14-Nov-2006 |
Evan Cheng <evan.cheng@apple.com> |
Matches MachineInstr changes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31712 91177308-0d34-0410-b5e6-96231b3b80d8
parcInstrInfo.cpp
parcRegisterInfo.cpp
parcRegisterInfo.h
|
| 0d53826f3653a789cf1491c3c40a1f4a993992b6 |
08-Nov-2006 |
Evan Cheng <evan.cheng@apple.com> |
Match tblegen changes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31571 91177308-0d34-0410-b5e6-96231b3b80d8
parcISelDAGToDAG.cpp
|
| 56fe5276ef0f64015b2fa9377fe8c81a00047533 |
04-Nov-2006 |
Chris Lattner <sabre@nondot.org> |
remove redundant/dead vars
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31434 91177308-0d34-0410-b5e6-96231b3b80d8
parcInstrInfo.td
|
| 9c5d4de8375f5111765519ac762427b2b8255df6 |
03-Nov-2006 |
Chris Lattner <sabre@nondot.org> |
silence warnings
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31392 91177308-0d34-0410-b5e6-96231b3b80d8
parc.h
|
| 3ed469ccd7b028a030b550d84b7336d146f5d8fa |
02-Nov-2006 |
Reid Spencer <rspencer@reidspencer.com> |
For PR786:
Turn on -Wunused and -Wno-unused-parameter. Clean up most of the resulting
fall out by removing unused variables. Remaining warnings have to do with
unused functions (I didn't want to delete code without review) and unused
variables in generated code. Maintainers should clean up the remaining
issues when they see them. All changes pass DejaGnu tests and Olden.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31380 91177308-0d34-0410-b5e6-96231b3b80d8
parcAsmPrinter.cpp
|
| c35497fc2a8b984dbacede5b75b7be74c6756948 |
30-Oct-2006 |
Evan Cheng <evan.cheng@apple.com> |
All targets expand BR_JT for now.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31294 91177308-0d34-0410-b5e6-96231b3b80d8
parcISelDAGToDAG.cpp
|
| ae2650a9cff478febe7d35d322dc3911b19ac30c |
28-Oct-2006 |
Chris Lattner <sabre@nondot.org> |
don't dist internal readme
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31247 91177308-0d34-0410-b5e6-96231b3b80d8
akefile
|
| 3d7d39ab1549f5ab7a929ec18a3e6481862cf247 |
24-Oct-2006 |
Rafael Espindola <rafael.espindola@gmail.com> |
fix warning about missing newline at end of file
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31162 91177308-0d34-0410-b5e6-96231b3b80d8
parcInstrInfo.cpp
|
| e87146ace88464be4ea4f8869830642c40178f1f |
24-Oct-2006 |
Chris Lattner <sabre@nondot.org> |
implement uncond branch insertion for sparc to fix regressions from last night
due to branchfolding
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31157 91177308-0d34-0410-b5e6-96231b3b80d8
parcInstrInfo.cpp
parcInstrInfo.h
|
| 8b2794aeff151be8cdbd44786c1d0f94f8f2e427 |
13-Oct-2006 |
Evan Cheng <evan.cheng@apple.com> |
Merge ISD::TRUNCSTORE to ISD::STORE. Switch to using StoreSDNode.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30945 91177308-0d34-0410-b5e6-96231b3b80d8
parcISelDAGToDAG.cpp
parcInstrInfo.td
|
| 740c2e079929d1204edc0712cc49dc267076025b |
12-Oct-2006 |
Chris Lattner <sabre@nondot.org> |
adjcallstackup/down clobbers the stack pointer
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30909 91177308-0d34-0410-b5e6-96231b3b80d8
parcInstrInfo.td
|
| af9db75943c11eebd642c1645d3c3f4003fe37e3 |
11-Oct-2006 |
Evan Cheng <evan.cheng@apple.com> |
Add properties to ComplexPattern.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30891 91177308-0d34-0410-b5e6-96231b3b80d8
parcInstrInfo.td
|
| 466685d41a9ea4905b9486fea38e83802e46f196 |
09-Oct-2006 |
Evan Cheng <evan.cheng@apple.com> |
Reflects ISD::LOAD / ISD::LOADX / LoadSDNode changes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30844 91177308-0d34-0410-b5e6-96231b3b80d8
parcISelDAGToDAG.cpp
parcInstrInfo.td
|
| 786225adf09e606c795ef68a1f789c12f37869f2 |
06-Oct-2006 |
Evan Cheng <evan.cheng@apple.com> |
Make use of getStore().
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30759 91177308-0d34-0410-b5e6-96231b3b80d8
parcISelDAGToDAG.cpp
|
| 29bd9e12d4fbd667c56225872b15ca490440da46 |
05-Oct-2006 |
Chris Lattner <sabre@nondot.org> |
Use getSectionForFunction
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30739 91177308-0d34-0410-b5e6-96231b3b80d8
parcAsmPrinter.cpp
|
| c548428c5d7328592f4db6f6cd815af18b3152a3 |
04-Oct-2006 |
Evan Cheng <evan.cheng@apple.com> |
Combine ISD::EXTLOAD, ISD::SEXTLOAD, ISD::ZEXTLOAD into ISD::LOADX. Add an
extra operand to LOADX to specify the exact value extension type.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30714 91177308-0d34-0410-b5e6-96231b3b80d8
parcISelDAGToDAG.cpp
|
| b74ed07bfd3af42331b1964c24c39912610a08f4 |
14-Sep-2006 |
Anton Korobeynikov <asl@math.spbu.ru> |
Adding dllimport, dllexport and external weak linkage types.
DLL* linkages got full (I hope) codegeneration support in C & both x86
assembler backends.
External weak linkage added for future use, we don't provide any
codegeneration, etc. support for it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30374 91177308-0d34-0410-b5e6-96231b3b80d8
parcAsmPrinter.cpp
|
| c356a572e34131bf767f35e3fecefae36fab744a |
12-Sep-2006 |
Evan Cheng <evan.cheng@apple.com> |
Reflects MachineConstantPoolEntry changes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30279 91177308-0d34-0410-b5e6-96231b3b80d8
parcISelDAGToDAG.cpp
|
| fde1b3bb2f15b74c713d98a79fcddaff1ac00dd1 |
08-Sep-2006 |
Jim Laskey <jlaskey@mac.com> |
1. Remove condition on delete.
2. Protect and outline createTargetAsmInfo.
3. Misc. kruft.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30169 91177308-0d34-0410-b5e6-96231b3b80d8
parcTargetMachine.cpp
parcTargetMachine.h
|
| a0f3d17daac73c9c71aad497b298cbe82848f726 |
08-Sep-2006 |
Jim Laskey <jlaskey@mac.com> |
Make target asm info a property of the target machine.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30162 91177308-0d34-0410-b5e6-96231b3b80d8
parcAsmPrinter.cpp
parcTargetMachine.h
|
| 8e8de8f7765a08ab3aa4f48b302cf19ccb9740e2 |
08-Sep-2006 |
Jim Laskey <jlaskey@mac.com> |
Break out target asm info into separate files.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30161 91177308-0d34-0410-b5e6-96231b3b80d8
parcTargetAsmInfo.cpp
parcTargetAsmInfo.h
|
| 563321a2582851c653d0863e8e0bba3d483734f9 |
06-Sep-2006 |
Jim Laskey <jlaskey@mac.com> |
Separate target specific asm properties from the asm printers.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30126 91177308-0d34-0410-b5e6-96231b3b80d8
parcAsmPrinter.cpp
|
| 09e460662a8d7328da1b938d5581a6ef3740b51d |
05-Sep-2006 |
Chris Lattner <sabre@nondot.org> |
Completely eliminate def&use operands. Now a register operand is EITHER a
def operand or a use operand.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30109 91177308-0d34-0410-b5e6-96231b3b80d8
parcRegisterInfo.cpp
|
| 1911fd4f85aebcd4d7b8f27313c5a363eebf49cb |
04-Sep-2006 |
Chris Lattner <sabre@nondot.org> |
Completely rearchitect the interface between targets and the pass manager.
This pass:
1. Splits TargetMachine into TargetMachine (generic targets, can be implemented
any way, like the CBE) and LLVMTargetMachine (subclass of TM that is used by
things using libcodegen and other support).
2. Instead of having each target fully populate the passmgr for file or JIT
output, move all this to common code, and give targets hooks they can
implement.
3. Commonalize the target population stuff between file emission and JIT
emission.
4. All (native code) codegen stuff now happens in a FunctionPassManager, which
paves the way for "fast -O0" stuff in the CFE later, and now LLC could
lazily stream .bc files from disk to use less memory.
5. There are now many fewer #includes and the targets don't depend on the
scalar xforms or libanalysis anymore (but codegen does).
6. Changing common code generator pass ordering stuff no longer requires
touching all targets.
7. The JIT now has the option of "-fast" codegen or normal optimized codegen,
which is now orthogonal to the fact that JIT'ing is being done.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30081 91177308-0d34-0410-b5e6-96231b3b80d8
parcTargetMachine.cpp
parcTargetMachine.h
|
| c4fa386471cb1ff9d1f2acc24e2d0682e5a17b1b |
03-Sep-2006 |
Chris Lattner <sabre@nondot.org> |
Simplify target construction.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30070 91177308-0d34-0410-b5e6-96231b3b80d8
parcTargetMachine.cpp
|
| aca36b932958a7e4a27786dd76e37259fbaa67e0 |
02-Sep-2006 |
Chris Lattner <sabre@nondot.org> |
Use a couple of multiclass patterns to factor some integer ops.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30039 91177308-0d34-0410-b5e6-96231b3b80d8
parcInstrFormats.td
parcInstrInfo.td
|
| 1662239a5eb745de7b683b034ea199cb984328f2 |
02-Sep-2006 |
Chris Lattner <sabre@nondot.org> |
remove a bunch of comments
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30038 91177308-0d34-0410-b5e6-96231b3b80d8
parcInstrInfo.td
|
| 95514bae7309ffacfc0a79b267159dcfde2b7720 |
26-Aug-2006 |
Evan Cheng <evan.cheng@apple.com> |
SelectNodeTo now returns a SDNode*.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29901 91177308-0d34-0410-b5e6-96231b3b80d8
parcISelDAGToDAG.cpp
|
| 9ade218533429146731213eacb7e12060e65ff58 |
26-Aug-2006 |
Evan Cheng <evan.cheng@apple.com> |
Select() no longer require Result operand by reference.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29898 91177308-0d34-0410-b5e6-96231b3b80d8
parcISelDAGToDAG.cpp
|
| 6da2f3268d12a9e64f2635dbb94b63e1c4142f59 |
26-Aug-2006 |
Evan Cheng <evan.cheng@apple.com> |
Match tblgen changes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29895 91177308-0d34-0410-b5e6-96231b3b80d8
parcISelDAGToDAG.cpp
|
| 5ea64fd9eb0027ad20a66ea29211eef79d8842a0 |
18-Aug-2006 |
Chris Lattner <sabre@nondot.org> |
Constify some methods. Patch provided by Anton Vayvod, thanks!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29756 91177308-0d34-0410-b5e6-96231b3b80d8
parcRegisterInfo.td
|
| 23329f5e0366af7cd9a96572ed8d6322696e5846 |
16-Aug-2006 |
Evan Cheng <evan.cheng@apple.com> |
SelectNodeTo() may return a SDOperand that is different from the input.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29726 91177308-0d34-0410-b5e6-96231b3b80d8
parcISelDAGToDAG.cpp
|
| 64a752f7c7cf160f2887d0a16d5922359832c9c2 |
11-Aug-2006 |
Evan Cheng <evan.cheng@apple.com> |
Match tablegen changes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29604 91177308-0d34-0410-b5e6-96231b3b80d8
parcISelDAGToDAG.cpp
|
| bb7b844bec6c53ac29ac4c50d7b3963e7f193efb |
11-Aug-2006 |
Evan Cheng <evan.cheng@apple.com> |
CALLSEQ_* produces chain even if that's not needed.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29603 91177308-0d34-0410-b5e6-96231b3b80d8
parcInstrInfo.td
|
| bd564bfc63163e31f320c3da9749db70992dc35e |
08-Aug-2006 |
Chris Lattner <sabre@nondot.org> |
Start eliminating temporary vectors used to create DAG nodes. Instead, pass
in the start of an array and a count of operands where applicable. In many
cases, the number of operands is known, so this static array can be allocated
on the stack, avoiding the heap. In many other cases, a SmallVector can be
used, which has the same benefit in the common cases.
I updated a lot of code calling getNode that takes a vector, but ran out of
time. The rest of the code should be updated, and these methods should be
removed.
We should also do the same thing to eliminate the methods that take a
vector of MVT::ValueTypes.
It would be extra nice to convert the dagiselemitter to avoid creating vectors
for operands when calling getTargetNode.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29566 91177308-0d34-0410-b5e6-96231b3b80d8
parcISelDAGToDAG.cpp
|
| 2ef88a09b71f458ad415b35a1fb431c3d15d7eb1 |
08-Aug-2006 |
Evan Cheng <evan.cheng@apple.com> |
Match tablegen isel changes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29549 91177308-0d34-0410-b5e6-96231b3b80d8
parcISelDAGToDAG.cpp
|
| 2641cad180e94c0d26630d4ed455352f19be3d3e |
28-Jul-2006 |
Evan Cheng <evan.cheng@apple.com> |
Remove InFlightSet hack. No longer needed.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29373 91177308-0d34-0410-b5e6-96231b3b80d8
parcISelDAGToDAG.cpp
|
| 1790d44d0dbe3412e012be5e43b89e67064bdb86 |
16-Jun-2006 |
Chris Lattner <sabre@nondot.org> |
Don't pass target name into TargetData anymore, it is never used or needed.
Remove explicit casts to std::string now that there is no overload resolution
issues in the TargetData ctors.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28830 91177308-0d34-0410-b5e6-96231b3b80d8
parcTargetMachine.cpp
|
| a7dc4a59cbb19cfb5dbc0f9ca500f26dddfbb7f6 |
15-Jun-2006 |
Evan Cheng <evan.cheng@apple.com> |
Type of extract_element index operand should be iPTR.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28797 91177308-0d34-0410-b5e6-96231b3b80d8
parcISelDAGToDAG.cpp
|
| 6848be1a27e08a89dcd4dd69f746471a608012cd |
27-May-2006 |
Evan Cheng <evan.cheng@apple.com> |
Change RET node to include signness information of the return values. i.e.
RET chain, value1, sign1, value2, sign2, ...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28510 91177308-0d34-0410-b5e6-96231b3b80d8
parcISelDAGToDAG.cpp
|
| 8b5fbc5cd460a9b03fd930527ced29932a7ccefc |
26-May-2006 |
Chris Lattner <sabre@nondot.org> |
Add support for the missing FP condition codes
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28482 91177308-0d34-0410-b5e6-96231b3b80d8
parcISelDAGToDAG.cpp
|
| 6a3d5a62f09d4093468525a07a0143cae0e9df41 |
25-May-2006 |
Evan Cheng <evan.cheng@apple.com> |
Assert if InflightSet is not cleared after instruction selecting a BB.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28459 91177308-0d34-0410-b5e6-96231b3b80d8
parcISelDAGToDAG.cpp
|
| afe358e7d46da9d29ba02fbbf81bdfb4ac4a4520 |
24-May-2006 |
Evan Cheng <evan.cheng@apple.com> |
Clear HandleMap and ReplaceMap after instruction selection. Or it may cause
non-deterministic behavior.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28454 91177308-0d34-0410-b5e6-96231b3b80d8
parcISelDAGToDAG.cpp
|
| d74ea2bbd8bb630331f35ead42d385249bd42af8 |
24-May-2006 |
Chris Lattner <sabre@nondot.org> |
Patches to make the LLVM sources more -pedantic clean. Patch provided
by Anton Korobeynikov! This is a step towards closing PR786.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28447 91177308-0d34-0410-b5e6-96231b3b80d8
parc.h
parcISelDAGToDAG.cpp
parcInstrInfo.h
parcSubtarget.cpp
|
| 8f7f4cc1aea1f4490669ab695c5a5f896f02a422 |
20-May-2006 |
Owen Anderson <resistor@mac.com> |
Sparc is big-endian.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28415 91177308-0d34-0410-b5e6-96231b3b80d8
parcTargetMachine.cpp
|
| d988b32abad0634df07c18629e899f256935fde7 |
20-May-2006 |
Owen Anderson <resistor@mac.com> |
Make all of the TargetMachine subclasses use the new string TargetData methods.
This is part of the on-going work on PR 761.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28414 91177308-0d34-0410-b5e6-96231b3b80d8
parcTargetMachine.cpp
|
| 0f3ac8d8d4ce23eb2ae6f9d850f389250874eea5 |
18-May-2006 |
Evan Cheng <evan.cheng@apple.com> |
getCalleeSaveRegs and getCalleeSaveRegClasses are no long TableGen'd.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28378 91177308-0d34-0410-b5e6-96231b3b80d8
parc.td
parcRegisterInfo.cpp
parcRegisterInfo.h
|
| c01d497255f0d344163178c5f827e8b73f6f04d6 |
17-May-2006 |
Evan Cheng <evan.cheng@apple.com> |
Remove PointerType from class Target
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28368 91177308-0d34-0410-b5e6-96231b3b80d8
parc.td
|
| 27aaa398ee3755f20ef7d185f80e6b40e4544e64 |
12-May-2006 |
Chris Lattner <sabre@nondot.org> |
Remove dead variable.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28247 91177308-0d34-0410-b5e6-96231b3b80d8
parcISelDAGToDAG.cpp
|
| 07000c6f01d8f57170f2d4c77a86d934bdc5c696 |
12-May-2006 |
Owen Anderson <resistor@mac.com> |
Refactor a bunch of includes so that TargetMachine.h doesn't have to include
TargetData.h. This should make recompiles a bit faster with my current
TargetData tinkering.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28238 91177308-0d34-0410-b5e6-96231b3b80d8
parcAsmPrinter.cpp
parcTargetMachine.h
|
| 4632d7a57008564c4b0f8246e85bd813a200d2c6 |
09-May-2006 |
Chris Lattner <sabre@nondot.org> |
Split SwitchSection into SwitchTo{Text|Data}Section methods.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28184 91177308-0d34-0410-b5e6-96231b3b80d8
parcAsmPrinter.cpp
|
| 4c15e3394671a87fbbbf21362079d11a4221654c |
09-May-2006 |
Chris Lattner <sabre@nondot.org> |
Some notes and thoughts to myself
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28182 91177308-0d34-0410-b5e6-96231b3b80d8
parcInstrInfo.td
|
| 2d90ac7ca6117d3b160dde8a4f322c1079a6ffce |
04-May-2006 |
Chris Lattner <sabre@nondot.org> |
Rename MO_VirtualRegister -> MO_Register. Clean up immediate handling.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28104 91177308-0d34-0410-b5e6-96231b3b80d8
parcAsmPrinter.cpp
|
| e53f4a055f74bded20d6129b4724ddd17fd199f6 |
04-May-2006 |
Chris Lattner <sabre@nondot.org> |
Move some methods out of MachineInstr into MachineOperand
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28102 91177308-0d34-0410-b5e6-96231b3b80d8
PMover.cpp
parcRegisterInfo.cpp
|
| 63b3d7113d93fda622c4954c6b1d046ce029044e |
04-May-2006 |
Chris Lattner <sabre@nondot.org> |
There shalt be only one "immediate" operand type!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28099 91177308-0d34-0410-b5e6-96231b3b80d8
parcAsmPrinter.cpp
parcRegisterInfo.cpp
|
| ea50fabfd4e5fad25a25b312f64a9b2a53363586 |
04-May-2006 |
Chris Lattner <sabre@nondot.org> |
Remove a bunch more SparcV9 specific stuff
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28093 91177308-0d34-0410-b5e6-96231b3b80d8
parcAsmPrinter.cpp
|
| 10f3597c4e0c13ecf0272b7ca0be741a91ade48c |
04-May-2006 |
Chris Lattner <sabre@nondot.org> |
Remove some more unused stuff from MachineInstr that was leftover from V9.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28091 91177308-0d34-0410-b5e6-96231b3b80d8
parcAsmPrinter.cpp
|
| a69571c7991813c93cba64e88eced6899ce93d81 |
03-May-2006 |
Owen Anderson <resistor@mac.com> |
Refactor TargetMachine, pushing handling of TargetData into the target-specific subclasses. This has one caller-visible change: getTargetData() now returns a pointer instead of a reference.
This fixes PR 759.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28074 91177308-0d34-0410-b5e6-96231b3b80d8
parcAsmPrinter.cpp
parcTargetMachine.cpp
parcTargetMachine.h
|
| cdf38c4edb892c356cfaa3c09c57728bc8d6bfd0 |
02-May-2006 |
Nate Begeman <natebegeman@mac.com> |
Extend printBasicBlockLabel a bit so that it can be used to print all
basic block labels, consolidating the code to do so in one place for each
target.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28050 91177308-0d34-0410-b5e6-96231b3b80d8
parcAsmPrinter.cpp
|
| 37efe6764568a3829fee26aba532283131d1a104 |
22-Apr-2006 |
Nate Begeman <natebegeman@mac.com> |
JumpTable support! What this represents is working asm and jit support for
x86 and ppc for 100% dense switch statements when relocations are non-PIC.
This support will be extended and enhanced in the coming days to support
PIC, and less dense forms of jump tables.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27947 91177308-0d34-0410-b5e6-96231b3b80d8
parcAsmPrinter.cpp
parcISelDAGToDAG.cpp
|
| 3758552428737f2467cc58ae81a064789637b4aa |
13-Apr-2006 |
Reid Spencer <rspencer@reidspencer.com> |
Add the README files to the distribution.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27651 91177308-0d34-0410-b5e6-96231b3b80d8
akefile
|
| 957e1674e797c8880114fb27a3aa1c32f9967329 |
08-Apr-2006 |
Nate Begeman <natebegeman@mac.com> |
Disable switch lowering for targets based on the selection dag isel,
letting the code generator handle them directly.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27539 91177308-0d34-0410-b5e6-96231b3b80d8
parcTargetMachine.cpp
|
| 4188699f80c233a20b6ddc61570a8a8c1804cb85 |
07-Apr-2006 |
Jim Laskey <jlaskey@mac.com> |
Foundation for call frame information.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27491 91177308-0d34-0410-b5e6-96231b3b80d8
parcRegisterInfo.cpp
parcRegisterInfo.h
|
| a99791886d5d4af2b900cd8cc1c9ed1677b6f0f4 |
28-Mar-2006 |
Jim Laskey <jlaskey@mac.com> |
Expose base register for DwarfWriter. Refactor code accordingly.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27225 91177308-0d34-0410-b5e6-96231b3b80d8
parcRegisterInfo.cpp
parcRegisterInfo.h
|
| 414e682bac7c7fb618aef6bb0caf8ae501f7a2ed |
27-Mar-2006 |
Jim Laskey <jlaskey@mac.com> |
Translate llvm target registers to dwarf register numbers properly.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27180 91177308-0d34-0410-b5e6-96231b3b80d8
parcRegisterInfo.cpp
|
| f15485a8d0dff5f720b7ad27346129ac5c3ec503 |
27-Mar-2006 |
Nate Begeman <natebegeman@mac.com> |
SelectionDAGISel can now natively handle Switch instructions, in the same
manner that the LowerSwitch LLVM to LLVM pass does: emitting a binary
search tree of basic blocks. The new approach has several advantages:
it is faster, it generates significantly smaller code in many cases, and
it paves the way for implementing dense switch tables as a jump table by
handling switches directly in the instruction selector.
This functionality is currently only enabled on x86, but should be safe for
every target. In anticipation of making it the default, the cfg is now
properly updated in the x86, ppc, and sparc select lowering code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27156 91177308-0d34-0410-b5e6-96231b3b80d8
parcISelDAGToDAG.cpp
|
| 420736dc85c01702bb7bc40495f8a4be5e5f8a6c |
25-Mar-2006 |
Chris Lattner <sabre@nondot.org> |
#include Intrinsics.h into all dag isels
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27109 91177308-0d34-0410-b5e6-96231b3b80d8
parcISelDAGToDAG.cpp
|
| ff70fe61ed4caaaa59a68f127102b348fb5f9355 |
24-Mar-2006 |
Jim Laskey <jlaskey@mac.com> |
D'oh - should be even numbered.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27088 91177308-0d34-0410-b5e6-96231b3b80d8
parcRegisterInfo.td
|
| 47622e37215429c20d8278ff57496d840811cc13 |
24-Mar-2006 |
Jim Laskey <jlaskey@mac.com> |
Add dwarf register numbering to register data.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27081 91177308-0d34-0410-b5e6-96231b3b80d8
parcRegisterInfo.td
|
| f1d78e83356a412e525c30ac90dabf090a8cfc99 |
23-Mar-2006 |
Jim Laskey <jlaskey@mac.com> |
Add support to locate local variables in frames (early version.)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26994 91177308-0d34-0410-b5e6-96231b3b80d8
parcRegisterInfo.cpp
parcRegisterInfo.h
|
| bc641b9d8b5ecafe0137c1a49f4777608981d81b |
23-Mar-2006 |
Chris Lattner <sabre@nondot.org> |
Eliminate IntrinsicLowering from TargetMachine.
Make the CBE and V9 backends create their own, since they're the only ones that use it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26974 91177308-0d34-0410-b5e6-96231b3b80d8
parcTargetMachine.cpp
parcTargetMachine.h
|
| 81e8097377529dc3b666f33bb525c49cfbac3f51 |
17-Mar-2006 |
Nate Begeman <natebegeman@mac.com> |
Remove BRTWOWAY*
Make the PPC backend not dependent on BRTWOWAY_CC and make the branch
selector smarter about the code it generates, fixing a case in the
readme.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26814 91177308-0d34-0410-b5e6-96231b3b80d8
parcISelDAGToDAG.cpp
|
| 04f96748574d447ea7bc6344a56f7e652d14f4f9 |
09-Mar-2006 |
Chris Lattner <sabre@nondot.org> |
Add support for 'special' llvm globals like debug info and static ctors/dtors.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26628 91177308-0d34-0410-b5e6-96231b3b80d8
parcAsmPrinter.cpp
|
| 9601a86a644fa036168ff173d3539550b2e9206e |
05-Mar-2006 |
Chris Lattner <sabre@nondot.org> |
Copysign needs to be expanded everywhere. Note that Alpha and IA64 should
implement copysign as a native op if they have it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26541 91177308-0d34-0410-b5e6-96231b3b80d8
parcISelDAGToDAG.cpp
|
| a34544d96c2e84fa84827e92e193f79353c64df0 |
27-Feb-2006 |
Chris Lattner <sabre@nondot.org> |
Don't print constant initializers, they may span lines now.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26403 91177308-0d34-0410-b5e6-96231b3b80d8
parcAsmPrinter.cpp
|
| 2deb87f201b5cf06edff12b9d9a03adc658ec416 |
21-Feb-2006 |
Chris Lattner <sabre@nondot.org> |
The HasNoV9 hack isn't needed here, now that tblgen knows that CustomDAGSchedInserter
instructions are expensive.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26298 91177308-0d34-0410-b5e6-96231b3b80d8
parcInstrInfo.td
|
| 551bf3f80058a026b6a128dffd5530019e1df1b9 |
17-Feb-2006 |
Nate Begeman <natebegeman@mac.com> |
kill ADD_PARTS & SUB_PARTS and replace them with fancy new ADDC, ADDE, SUBC
and SUBE nodes that actually expose what's going on and allow for
significant simplifications in the targets.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26255 91177308-0d34-0410-b5e6-96231b3b80d8
parcISelDAGToDAG.cpp
parcInstrInfo.td
|
| 368e18d56a87308045d341e85584597bfe7426e9 |
16-Feb-2006 |
Nate Begeman <natebegeman@mac.com> |
Rework the SelectionDAG-based implementations of SimplifyDemandedBits
and ComputeMaskedBits to match the new improved versions in instcombine.
Tested against all of multisource/benchmarks on ppc.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26238 91177308-0d34-0410-b5e6-96231b3b80d8
parcISelDAGToDAG.cpp
|
| 45090476be69a3f860e83f2c0fe2a2df7e1b4c89 |
15-Feb-2006 |
Chris Lattner <sabre@nondot.org> |
Sparc actually *DOES* have a directive for emitting zeros. In fact, it requires
it, because this:
.bss
X:
.byte 0
results in the assembler warning: "initialization in bss segment". Annoying.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26204 91177308-0d34-0410-b5e6-96231b3b80d8
parcAsmPrinter.cpp
|
| 6fa1f57c66dc3cb762fffd99ec86c29d0cdc103e |
15-Feb-2006 |
Chris Lattner <sabre@nondot.org> |
Fix SingleSource/Regression/C/2004-08-12-InlinerAndAllocas.c on Sparc.
The ABI specifies that there is a register save area at the bottom of the
stack, which means the actual used pointer needs to be an offset from
the subtracted value.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26202 91177308-0d34-0410-b5e6-96231b3b80d8
parcISelDAGToDAG.cpp
|
| 94dd29216cfcc2719be1cb8b7baa8cc19434e3ce |
13-Feb-2006 |
Chris Lattner <sabre@nondot.org> |
Switch targets over to using SelectionDAG::getCALLSEQ_START to create
CALLSEQ_START nodes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26143 91177308-0d34-0410-b5e6-96231b3b80d8
parcISelDAGToDAG.cpp
|
| ad7a3e62085f776ec87e857e769e210a89a0d544 |
10-Feb-2006 |
Chris Lattner <sabre@nondot.org> |
Use the auto-generated call matcher. Remove a broken impl of the frameaddr/returnaddr
intrinsics.
Autogen frameindex matcher
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26107 91177308-0d34-0410-b5e6-96231b3b80d8
parcAsmPrinter.cpp
parcISelDAGToDAG.cpp
parcInstrInfo.td
|
| f613fcb74161d63dd8c4f5fc1dc0d7527a18f43e |
10-Feb-2006 |
Chris Lattner <sabre@nondot.org> |
Update to new-style flags usage, simplifying the .td file
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26106 91177308-0d34-0410-b5e6-96231b3b80d8
parcInstrInfo.td
parcRegisterInfo.td
|
| f26276661984b6ea77acf1105a4a18cb128d329d |
09-Feb-2006 |
Chris Lattner <sabre@nondot.org> |
Done
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26091 91177308-0d34-0410-b5e6-96231b3b80d8
EADME.txt
|
| 3ab48ed72fabdc41d0f36b88a08671ab8868bb1c |
09-Feb-2006 |
Chris Lattner <sabre@nondot.org> |
Enable LSR by default for SPARC: it is a clear win.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26090 91177308-0d34-0410-b5e6-96231b3b80d8
parcTargetMachine.cpp
|
| 7e9b26fc73425ae215fbc9c8010cb53059a93b3a |
09-Feb-2006 |
Evan Cheng <evan.cheng@apple.com> |
Match getTargetNode() changes (now return SDNode* instead of SDOperand).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26085 91177308-0d34-0410-b5e6-96231b3b80d8
parcISelDAGToDAG.cpp
|
| 9413678f91f4789902b69c4dc18b7205e95b0224 |
09-Feb-2006 |
Chris Lattner <sabre@nondot.org> |
add an option to turn on LSR.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26080 91177308-0d34-0410-b5e6-96231b3b80d8
parcInstrInfo.td
parcTargetMachine.cpp
|
| 3029f920519e0871a5aad5d7c592281093953733 |
09-Feb-2006 |
Chris Lattner <sabre@nondot.org> |
Adjust to MachineConstantPool interface change: instead of keeping a
value/alignment pair for each constant, keep a value/offset pair.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26078 91177308-0d34-0410-b5e6-96231b3b80d8
parcISelDAGToDAG.cpp
|
| 34167215a8da717b21e44f1b834dc34d15279bf1 |
09-Feb-2006 |
Evan Cheng <evan.cheng@apple.com> |
Change Select() from
SDOperand Select(SDOperand N);
to
void Select(SDOperand &Result, SDOperand N);
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26067 91177308-0d34-0410-b5e6-96231b3b80d8
parcISelDAGToDAG.cpp
|
| c26017a4ae14ec63bc99831dd3edbb0362f56d06 |
05-Feb-2006 |
Chris Lattner <sabre@nondot.org> |
Fix the Sparc backend with Evan's recent tblgen changes
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26009 91177308-0d34-0410-b5e6-96231b3b80d8
parcISelDAGToDAG.cpp
|
| 900c826bc720e7b2349663392f5c8cb76aae4a01 |
05-Feb-2006 |
Evan Cheng <evan.cheng@apple.com> |
Use SelectRoot() as the entry to any tblgen based isel.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25998 91177308-0d34-0410-b5e6-96231b3b80d8
parcISelDAGToDAG.cpp
|
| e7c839ed5ae54563eee4934c420325c462c4d656 |
05-Feb-2006 |
Chris Lattner <sabre@nondot.org> |
remove V8 reference
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25991 91177308-0d34-0410-b5e6-96231b3b80d8
EADME.txt
|
| 7c90f73a1b06040d971a3dd95a491031ae6238d5 |
05-Feb-2006 |
Chris Lattner <sabre@nondot.org> |
Rename SPARC V8 target to be the LLVM SPARC target.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25985 91177308-0d34-0410-b5e6-96231b3b80d8
elaySlotFiller.cpp
PMover.cpp
akefile
parc.h
parc.td
parcAsmPrinter.cpp
parcISelDAGToDAG.cpp
parcInstrFormats.td
parcInstrInfo.cpp
parcInstrInfo.h
parcInstrInfo.td
parcRegisterInfo.cpp
parcRegisterInfo.h
parcRegisterInfo.td
parcSubtarget.cpp
parcSubtarget.h
parcTargetMachine.cpp
parcTargetMachine.h
|
| c275dfa72751dc22507c33488a639bda9874e274 |
04-Feb-2006 |
Chris Lattner <sabre@nondot.org> |
Custom lower VAARG for the case when we are doing vaarg(double). In this
case, the double being loaded may not be 8-byte aligned, so we have to use
our standard bit_convert game.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25967 91177308-0d34-0410-b5e6-96231b3b80d8
parcISelDAGToDAG.cpp
|
| c4b612ba2a5d9ea400b5a585efba494726e372b3 |
04-Feb-2006 |
Chris Lattner <sabre@nondot.org> |
Fix a nasty typo that broke functions with big stack frames.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25966 91177308-0d34-0410-b5e6-96231b3b80d8
parcRegisterInfo.cpp
|
| 329a515fe758b36bd443279b0c4ee690517159b3 |
04-Feb-2006 |
Chris Lattner <sabre@nondot.org> |
fix a bug in my last checkin
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25965 91177308-0d34-0410-b5e6-96231b3b80d8
parcInstrInfo.cpp
|
| 0d913eaaed3202231e8a332b12153c4b7a5f43c5 |
04-Feb-2006 |
Chris Lattner <sabre@nondot.org> |
add a note
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25962 91177308-0d34-0410-b5e6-96231b3b80d8
EADME.txt
|
| 69d39091fe2af94d1ceebca526eabede98831a65 |
04-Feb-2006 |
Chris Lattner <sabre@nondot.org> |
Two changes:
1. Treat FMOVD as a copy instruction, to help with coallescing in V9 mode
2. When in V9 mode, insert FMOVD instead of FpMOVD instructions, as we don't
ever rewrite FpMOVD instructions into FMOVS instructions, thus we just end
up with commented out copies!
This should fix a bunch of failures in V9 mode on sparc.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25961 91177308-0d34-0410-b5e6-96231b3b80d8
parcInstrInfo.cpp
parcInstrInfo.h
parcRegisterInfo.cpp
parcRegisterInfo.h
parcTargetMachine.cpp
|
| 6184f9ca5eff6f7f55264d447638b7a27b806c9c |
03-Feb-2006 |
Chris Lattner <sabre@nondot.org> |
Teach sparc to fold loads/stores into copies.
Remove the dead getRegClassForType method
minor formating changes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25936 91177308-0d34-0410-b5e6-96231b3b80d8
parcRegisterInfo.cpp
parcRegisterInfo.h
|
| 5ccc7225db0cb4d738045ade8e8c38d5345ac08a |
03-Feb-2006 |
Chris Lattner <sabre@nondot.org> |
Implement isLoadFromStackSlot and isStoreToStackSlot
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25932 91177308-0d34-0410-b5e6-96231b3b80d8
parcInstrInfo.cpp
parcInstrInfo.h
|
| c8c0bb00a31381a8a2f838f53d72d230e9c77134 |
02-Feb-2006 |
Chris Lattner <sabre@nondot.org> |
%fcc is not an alias for %fcc0
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25906 91177308-0d34-0410-b5e6-96231b3b80d8
parcInstrInfo.td
|
| 4032cf049d702545d7498d6b10e1d241037e2030 |
02-Feb-2006 |
Chris Lattner <sabre@nondot.org> |
correct an opcode
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25905 91177308-0d34-0410-b5e6-96231b3b80d8
parcInstrInfo.td
|
| b8973bd8f50d7321635e1e07b81a880a0828d185 |
31-Jan-2006 |
Evan Cheng <evan.cheng@apple.com> |
Allow the specification of explicit alignments for constant pool entries.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25855 91177308-0d34-0410-b5e6-96231b3b80d8
parcISelDAGToDAG.cpp
|
| c03468bafab3a20fdaa1c05d6c7f2ae1264fc3ea |
31-Jan-2006 |
Chris Lattner <sabre@nondot.org> |
add a missing break that caused a lot of failures last night :(
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25851 91177308-0d34-0410-b5e6-96231b3b80d8
parcISelDAGToDAG.cpp
|
| a34b898bc0506d317b6db45eff43b75dee2c5405 |
31-Jan-2006 |
Chris Lattner <sabre@nondot.org> |
okay, one more
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25847 91177308-0d34-0410-b5e6-96231b3b80d8
EADME.txt
|
| fabec5bcb5248f34e88076a350990978191515bd |
31-Jan-2006 |
Chris Lattner <sabre@nondot.org> |
another note
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25846 91177308-0d34-0410-b5e6-96231b3b80d8
EADME.txt
|
| 76e7a441cf04798eb183a375870c45bcaeacd9ae |
31-Jan-2006 |
Chris Lattner <sabre@nondot.org> |
More notes
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25845 91177308-0d34-0410-b5e6-96231b3b80d8
EADME.txt
|
| a45b4925e19e6f70b37b27280e41cafd8a0095a3 |
31-Jan-2006 |
Chris Lattner <sabre@nondot.org> |
another one
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25844 91177308-0d34-0410-b5e6-96231b3b80d8
EADME.txt
|
| 302601c3436c3345822e319f7e2cd00099a65296 |
31-Jan-2006 |
Chris Lattner <sabre@nondot.org> |
add a note
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25843 91177308-0d34-0410-b5e6-96231b3b80d8
EADME.txt
|
| af370f7c0c9dc10eb93efcdfe1016ba2f86c047b |
31-Jan-2006 |
Chris Lattner <sabre@nondot.org> |
add conditional moves of float and double values on int/fp condition codes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25842 91177308-0d34-0410-b5e6-96231b3b80d8
parcInstrInfo.td
|
| 7a4d2913ea04b708c191595ad6f1841abd36b077 |
31-Jan-2006 |
Chris Lattner <sabre@nondot.org> |
treat conditional branches the same way as conditional moves (giving them
an operand that contains the condcode), making things significantly simpler.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25840 91177308-0d34-0410-b5e6-96231b3b80d8
parc.h
parcISelDAGToDAG.cpp
parcInstrInfo.td
|
| 6788faa06ad77fbfb57db7bcf8bc6a79389775a6 |
31-Jan-2006 |
Chris Lattner <sabre@nondot.org> |
compactify all of the integer conditional moves into one instruction that takes
a CC as an operand. Much smaller, much happier.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25839 91177308-0d34-0410-b5e6-96231b3b80d8
parc.h
parcAsmPrinter.cpp
parcISelDAGToDAG.cpp
parcInstrInfo.td
|
| 97f91027e662a140b2927c8b84b8f1563a102434 |
31-Jan-2006 |
Chris Lattner <sabre@nondot.org> |
Add immediate forms of integer cmovs
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25838 91177308-0d34-0410-b5e6-96231b3b80d8
parcInstrInfo.td
|
| 749d6fadf8ac410bb4083a3467ea9f0429c30455 |
31-Jan-2006 |
Chris Lattner <sabre@nondot.org> |
Shrinkify
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25837 91177308-0d34-0410-b5e6-96231b3b80d8
parcInstrInfo.td
|
| 6dc83c777db605209aaa707bb23bd49dc8770228 |
31-Jan-2006 |
Chris Lattner <sabre@nondot.org> |
Add the full complement of conditional moves of integer registers.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25834 91177308-0d34-0410-b5e6-96231b3b80d8
parcInstrInfo.td
|
| 86638b94c113fdf98459bf862fd85e121fe77c7d |
31-Jan-2006 |
Chris Lattner <sabre@nondot.org> |
Compile this:
void %X(int %A) {
%C = setlt int %A, 123 ; <bool> [#uses=1]
br bool %C, label %T, label %F
T: ; preds = %0
call int %main( int 0 ) ; <int>:0 [#uses=0]
ret void
F: ; preds = %0
ret void
}
to this:
X:
save -96, %o6, %o6
subcc %i0, 122, %l0
bg .LBBX_2 ! F
nop
...
not this:
X:
save -96, %o6, %o6
sethi 0, %l0
or %g0, 1, %l1
subcc %i0, 122, %l2
bg .LBBX_4 !
nop
.LBBX_3: !
or %g0, %l0, %l1
.LBBX_4: !
subcc %l1, 0, %l0
bne .LBBX_2 ! F
nop
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25833 91177308-0d34-0410-b5e6-96231b3b80d8
parcISelDAGToDAG.cpp
|
| b716343851c2e38a6df423c8efba998f577521e5 |
31-Jan-2006 |
Chris Lattner <sabre@nondot.org> |
I don't see why this optimization isn't safe, but it isn't, so disable it
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25829 91177308-0d34-0410-b5e6-96231b3b80d8
parcISelDAGToDAG.cpp
|
| 2adc05cf5b786d0c82b45b708e01ced8cbf015d9 |
30-Jan-2006 |
Chris Lattner <sabre@nondot.org> |
Fix FP constants, and the SparcV8/2006-01-22-BitConvertLegalize.ll failure from last night
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25819 91177308-0d34-0410-b5e6-96231b3b80d8
parcISelDAGToDAG.cpp
|
| 3772bcb33347f9e3615f3854c82323fa53e5765f |
30-Jan-2006 |
Chris Lattner <sabre@nondot.org> |
Revamp the ICC/FCC reading instructions to be parameterized in terms of the
SPARC condition codes, not in terms of the DAG condcodes. This allows us to
write nice clean patterns for cmovs/branches.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25815 91177308-0d34-0410-b5e6-96231b3b80d8
parcISelDAGToDAG.cpp
parcInstrInfo.td
|
| 9072c05cd8b1739244d8c669fb92c3415d01dccc |
30-Jan-2006 |
Chris Lattner <sabre@nondot.org> |
Compile:
uint %test(uint %X) {
%Y = call uint %llvm.ctpop.i32(uint %X)
ret uint %Y
}
to:
test:
save -96, %o6, %o6
sll %i0, 0, %l0
popc %l0, %i0
restore %g0, %g0, %g0
retl
nop
instead of to 40 logical ops. Note the shift-by-zero that clears the top
part of the 64-bit V9 register.
Testcase here: CodeGen/SparcV8/ctpop.ll
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25814 91177308-0d34-0410-b5e6-96231b3b80d8
parcISelDAGToDAG.cpp
parcInstrInfo.td
|
| 5295de7c41058e7e89cbdc255f86e8c623566f5a |
30-Jan-2006 |
Chris Lattner <sabre@nondot.org> |
If the target has V9 instructions, this pass is a noop, don't bother
running it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25811 91177308-0d34-0410-b5e6-96231b3b80d8
PMover.cpp
|
| b34d3fd4cf8f7882afd320b83f564146875d5116 |
30-Jan-2006 |
Chris Lattner <sabre@nondot.org> |
When in v9 mode, emit fabsd/fnegd/fmovd
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25810 91177308-0d34-0410-b5e6-96231b3b80d8
parcInstrInfo.td
|
| 76afdc9a80cf078aebd0ec62dba0bfafe498b1dc |
30-Jan-2006 |
Chris Lattner <sabre@nondot.org> |
First step towards V9 instructions in the V8 backend, two conditional move
patterns. This allows emission of this code:
t1:
save -96, %o6, %o6
subcc %i0, %i1, %l0
move %icc, %i0, %i2
or %g0, %i2, %i0
restore %g0, %g0, %g0
retl
nop
instead of this:
t1:
save -96, %o6, %o6
subcc %i0, %i1, %l0
be .LBBt1_2 !
nop
.LBBt1_1: !
or %g0, %i2, %i0
.LBBt1_2: !
restore %g0, %g0, %g0
retl
nop
for this:
int %t1(int %a, int %b, int %c) {
%tmp.2 = seteq int %a, %b
%tmp3 = select bool %tmp.2, int %a, int %c
ret int %tmp3
}
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25809 91177308-0d34-0410-b5e6-96231b3b80d8
EADME.txt
parcISelDAGToDAG.cpp
parcInstrInfo.td
|
| 6f63001214215287b9bfe6cc066ab7caf83acb62 |
30-Jan-2006 |
Chris Lattner <sabre@nondot.org> |
Two changes:
1. Default to having V9 instructions, instead of just V8.
2. unless -enable-sparc-v9-insts is passed, disable V9 (for use with llcbeta)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25807 91177308-0d34-0410-b5e6-96231b3b80d8
parcSubtarget.cpp
|
| dea9528f7ffd838c333fa018ab7d2fa069db91dd |
30-Jan-2006 |
Chris Lattner <sabre@nondot.org> |
When lowering SELECT_CC, see if the input is a lowered SETCC. If so, fold
the two operations together. This allows us to compile this:
void %two(int %a, int* %b) {
%tmp.2 = seteq int %a, 0
%tmp.0.0 = select bool %tmp.2, int 10, int 20
store int %tmp.0.0, int* %b
ret void
}
into:
two:
save -96, %o6, %o6
or %g0, 20, %l0
or %g0, 10, %l1
subcc %i0, 0, %l2
be .LBBtwo_2 ! entry
nop
.LBBtwo_1: ! entry
or %g0, %l0, %l1
.LBBtwo_2: ! entry
st %l1, [%i1]
restore %g0, %g0, %g0
retl
nop
instead of:
two:
save -96, %o6, %o6
sethi 0, %l0
or %g0, 1, %l1
or %g0, 20, %l2
or %g0, 10, %l3
subcc %i0, 0, %l4
be .LBBtwo_2 ! entry
nop
.LBBtwo_1: ! entry
or %g0, %l0, %l1
.LBBtwo_2: ! entry
subcc %l1, 0, %l0
bne .LBBtwo_4 ! entry
nop
.LBBtwo_3: ! entry
or %g0, %l2, %l3
.LBBtwo_4: ! entry
st %l3, [%i1]
restore %g0, %g0, %g0
retl
nop
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25806 91177308-0d34-0410-b5e6-96231b3b80d8
parcISelDAGToDAG.cpp
|
| c6fd6cd65c88ef1f11da43c11be0152cb69013a7 |
30-Jan-2006 |
Chris Lattner <sabre@nondot.org> |
Move MaskedValueIsZero from the DAGCombiner to the TargetLowering interface,making isMaskedValueZeroForTargetNode simpler, and useable from other partsof the compiler.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25803 91177308-0d34-0410-b5e6-96231b3b80d8
parcISelDAGToDAG.cpp
|
| 4a397e0e9411cb32db242487c633c849e5794ed8 |
30-Jan-2006 |
Chris Lattner <sabre@nondot.org> |
Implement isMaskedValueZeroForTargetNode for the various v8 selectcc nodes,
allowing redundant and's to be eliminated by the dag combiner.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25800 91177308-0d34-0410-b5e6-96231b3b80d8
parcISelDAGToDAG.cpp
|
| 44ea7b1a6cc96121f9a558902742e19fa876d847 |
28-Jan-2006 |
Chris Lattner <sabre@nondot.org> |
Use V8ISD::CALL instead of ISD::CALL
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25716 91177308-0d34-0410-b5e6-96231b3b80d8
parcISelDAGToDAG.cpp
parcInstrInfo.td
|
| 184cc4ac60dc853fac3baa5e96d5f662d311b2fb |
27-Jan-2006 |
Chris Lattner <sabre@nondot.org> |
initialize member vars
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25712 91177308-0d34-0410-b5e6-96231b3b80d8
parcSubtarget.cpp
|
| ee625573b5b39b91441fc6ea23f3ba415abdc71f |
27-Jan-2006 |
Nate Begeman <natebegeman@mac.com> |
Remove TLI.LowerReturnTo, and just let targets custom lower ISD::RET for
the same functionality. This addresses another piece of bug 680. Next,
on to fixing Alpha VAARG, which I broke last time.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25696 91177308-0d34-0410-b5e6-96231b3b80d8
parcISelDAGToDAG.cpp
|
| 19c95507443ebd4f1cee80917d540c8bd27f8fe1 |
27-Jan-2006 |
Evan Cheng <evan.cheng@apple.com> |
Subtarget feature can now set any variable to any value
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25678 91177308-0d34-0410-b5e6-96231b3b80d8
parc.td
|
| cedc6f4b30c1fd5f7ad1df0b65b870e6f107e8ff |
27-Jan-2006 |
Chris Lattner <sabre@nondot.org> |
PHI and INLINEASM are now built-in instructions provided by Target.td
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25674 91177308-0d34-0410-b5e6-96231b3b80d8
parc.td
parcInstrInfo.td
|
| 4dcfaac2e390fdd0e8a562aeccb666178bd8664c |
26-Jan-2006 |
Chris Lattner <sabre@nondot.org> |
Rest of subtarget support, remove references to ppc
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25642 91177308-0d34-0410-b5e6-96231b3b80d8
parc.td
parcISelDAGToDAG.cpp
parcSubtarget.cpp
parcSubtarget.h
|
| 0d170a7969e7e36ad00afe596f2937f0c74d2b49 |
26-Jan-2006 |
Chris Lattner <sabre@nondot.org> |
Add trivial subtarget support
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25641 91177308-0d34-0410-b5e6-96231b3b80d8
akefile
parc.td
parcSubtarget.cpp
parcSubtarget.h
parcTargetMachine.cpp
parcTargetMachine.h
|
| 0577a22c678bd5e31047e6b8038c6917202271ee |
25-Jan-2006 |
Evan Cheng <evan.cheng@apple.com> |
Set SchedulingForLatency to be the default scheduling preference for all.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25607 91177308-0d34-0410-b5e6-96231b3b80d8
parcISelDAGToDAG.cpp
|
| acc398c195a697795bff3245943d104eb19192b9 |
25-Jan-2006 |
Nate Begeman <natebegeman@mac.com> |
First part of bug 680:
Remove TLI.LowerVA* and replace it with SDNodes that are lowered the same
way as everything else.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25606 91177308-0d34-0410-b5e6-96231b3b80d8
parcISelDAGToDAG.cpp
|
| 7558b0e80c058c148ef9f45220bbbe6bc8a146dd |
25-Jan-2006 |
Evan Cheng <evan.cheng@apple.com> |
Default scheduling preference is SchedulingForLatency.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25603 91177308-0d34-0410-b5e6-96231b3b80d8
parcISelDAGToDAG.cpp
|
| bb978c7e98371cd253d6af4a2ba0b8cacdbd0aff |
23-Jan-2006 |
Chris Lattner <sabre@nondot.org> |
remove the V8 simple isel
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25534 91177308-0d34-0410-b5e6-96231b3b80d8
parc.h
parcTargetMachine.cpp
parcV8ISelSimple.cpp
|
| 2c2c6c61f100bc7c3df873b11203fcea1b5e18fe |
23-Jan-2006 |
Chris Lattner <sabre@nondot.org> |
Add explicit #includes of <iostream>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25515 91177308-0d34-0410-b5e6-96231b3b80d8
PMover.cpp
parcAsmPrinter.cpp
|
| 86a5484079abc8a20f24066aaf3f5efcccebb673 |
22-Jan-2006 |
Chris Lattner <sabre@nondot.org> |
Add explicit #includes of <iostream>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25509 91177308-0d34-0410-b5e6-96231b3b80d8
parcV8ISelSimple.cpp
|
| 46030a6b0ae6aabea0ab5b0a458fa121eeecaaa3 |
19-Jan-2006 |
Chris Lattner <sabre@nondot.org> |
implement support for f32 arguments past the first 6 words
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25450 91177308-0d34-0410-b5e6-96231b3b80d8
parcISelDAGToDAG.cpp
|
| 99cf50937d55381fbcdb506e61fb46ade774e7ee |
16-Jan-2006 |
Chris Lattner <sabre@nondot.org> |
Silly Sparc is big endian. If we have to load args out of incoming stack slots
that are smaller than an int, make sure to adjust the frame pointer to take
this into consideration.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25351 91177308-0d34-0410-b5e6-96231b3b80d8
parcISelDAGToDAG.cpp
|
| f7511b494310141fd0d9668025172df1c626964d |
15-Jan-2006 |
Chris Lattner <sabre@nondot.org> |
Make sure that bool,byte and short arguments are the right type when loaded
from memory.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25346 91177308-0d34-0410-b5e6-96231b3b80d8
parcISelDAGToDAG.cpp
|
| 7f9975a793c575c3e4081e2b0dc3c950681cd316 |
15-Jan-2006 |
Chris Lattner <sabre@nondot.org> |
Disable a broken optimization
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25340 91177308-0d34-0410-b5e6-96231b3b80d8
parcISelDAGToDAG.cpp
|
| 4fca01731a86dbbd758eaf94e4c7edfa36d38db7 |
15-Jan-2006 |
Chris Lattner <sabre@nondot.org> |
Don't print a label for the first MBB in a function.
Compile this:
%_2E_str_8 = external global [75 x sbyte]
implementation ; Functions:
declare int %printf(sbyte*, ...)
void %test()
%tmp.101 = call int (sbyte*, ...)* %printf( sbyte* getelementptr ([75 x sbyte]* %_2E_str_8, int 0, int 0) ) ; <int> [#uses=0]
unreachable
}
to this:
main_endif_2E_8:
save -96, %o6, %o6
sethi %hi(_2E_str_8), %l0
add %l0, %lo(_2E_str_8), %o0
call printf
nop
instead of this:
main_endif_2E_8:
save -96, %o6, %o6
sethi %hi(_2E_str_8), %l0
or %g0, %lo(_2E_str_8), %l1 ;; extra instruction
add %l1, %l0, %o0
call printf
nop
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25335 91177308-0d34-0410-b5e6-96231b3b80d8
parcAsmPrinter.cpp
parcInstrInfo.td
|
| 934ea49a5581e02586edd313c59ce65914f3a59f |
15-Jan-2006 |
Chris Lattner <sabre@nondot.org> |
Have legalize take care of DYNAMIC_STACKALLOC for us, implement llvm.stacksave/stackrestore.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25332 91177308-0d34-0410-b5e6-96231b3b80d8
parcISelDAGToDAG.cpp
|
| bce8887ceef02a51b34814519f6c49492648eb00 |
15-Jan-2006 |
Chris Lattner <sabre@nondot.org> |
Implement DYNAMIC_STACKALLOC for V8
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25330 91177308-0d34-0410-b5e6-96231b3b80d8
parcISelDAGToDAG.cpp
|
| 7c419078876ca16ec82d4ddc5301f8fdaf0fe39e |
15-Jan-2006 |
Chris Lattner <sabre@nondot.org> |
reorder passes
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25326 91177308-0d34-0410-b5e6-96231b3b80d8
parcTargetMachine.cpp
|
| d88fc03602947b5baa35c8b09fe8bcfa2b4a03c1 |
14-Jan-2006 |
Nate Begeman <natebegeman@mac.com> |
bswap implementation
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25312 91177308-0d34-0410-b5e6-96231b3b80d8
parcISelDAGToDAG.cpp
|
| b99329e8a0ec3b5a0004dd649e3546939f5c31e7 |
13-Jan-2006 |
Chris Lattner <sabre@nondot.org> |
expand unsupported stacksave/stackrestore nodes
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25272 91177308-0d34-0410-b5e6-96231b3b80d8
parcISelDAGToDAG.cpp
|
| 4bb91024ac2dcdff363488617ffcfb3b5c99fc49 |
12-Jan-2006 |
Chris Lattner <sabre@nondot.org> |
Fix branches on FP compares
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25249 91177308-0d34-0410-b5e6-96231b3b80d8
parcISelDAGToDAG.cpp
parcInstrInfo.td
|
| 138d322e966dc1f2641b35c73cb1d66379c4d20e |
12-Jan-2006 |
Chris Lattner <sabre@nondot.org> |
fix a bug in my previous checkin
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25244 91177308-0d34-0410-b5e6-96231b3b80d8
parcISelDAGToDAG.cpp
|
| 72878a463b4551e016a96cd8d0a5ffa1f73bf432 |
12-Jan-2006 |
Chris Lattner <sabre@nondot.org> |
Give V8ISD nodes symbolic names in dumps
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25243 91177308-0d34-0410-b5e6-96231b3b80d8
parcISelDAGToDAG.cpp
|
| b3c77152c85c0ec67afcf77a096008706498d4f6 |
12-Jan-2006 |
Chris Lattner <sabre@nondot.org> |
invert the sense of this switch and its name
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25234 91177308-0d34-0410-b5e6-96231b3b80d8
parcTargetMachine.cpp
|
| 35ef913ec21de0f4f1b39c811b4335438717a9b8 |
11-Jan-2006 |
Nate Begeman <natebegeman@mac.com> |
Add bswap, rotl, and rotr nodes
Add dag combiner code to recognize rotl, rotr
Add ppc code to match rotl
Targets should add rotl/rotr patterns if they have them
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25222 91177308-0d34-0410-b5e6-96231b3b80d8
parcISelDAGToDAG.cpp
|
| 7ec6a6e96eeacfa2c4d9d14df6254951f35539d3 |
11-Jan-2006 |
Chris Lattner <sabre@nondot.org> |
This is no longer needed
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25219 91177308-0d34-0410-b5e6-96231b3b80d8
parcISelDAGToDAG.cpp
|
| b9169ceb23367c177c26113dcc589d3f5c584182 |
11-Jan-2006 |
Chris Lattner <sabre@nondot.org> |
Use Evan's outflag stuff to implement V8cmpicc. This allows us to write a
pattern for SUBCCrr, and makes it trivial to add support for SUBCCri, eliminating
an instruction in the common "setcc X, imm" case.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25212 91177308-0d34-0410-b5e6-96231b3b80d8
parcISelDAGToDAG.cpp
parcInstrInfo.td
|
| 3fbb726141c3c824b65a87df01a75e573d797db2 |
11-Jan-2006 |
Chris Lattner <sabre@nondot.org> |
Fix a bug in i32->f64 conversion lowering
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25211 91177308-0d34-0410-b5e6-96231b3b80d8
parcISelDAGToDAG.cpp
|
| 1b8af84a8448b7803695f86785944fb3d0b75eb1 |
11-Jan-2006 |
Chris Lattner <sabre@nondot.org> |
Unbreak ret void :-/
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25210 91177308-0d34-0410-b5e6-96231b3b80d8
parcInstrInfo.td
|
| bda559e1158497706a7a44bffc0ca307dd9cad28 |
11-Jan-2006 |
Chris Lattner <sabre@nondot.org> |
Write this pattern in canonical form, allowing more patterns to match.
This implements Regression/CodeGen/SparcV8/xnor.ll
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25209 91177308-0d34-0410-b5e6-96231b3b80d8
parcInstrInfo.td
|
| 6da8d99f70826552b3a4e7bd5d1376881574b4b1 |
09-Jan-2006 |
Evan Cheng <evan.cheng@apple.com> |
New DAG node properties SNDPInFlag, SNDPOutFlag, and SNDPOptInFlag to replace
hasInFlag, hasOutFlag.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25155 91177308-0d34-0410-b5e6-96231b3b80d8
parcInstrInfo.td
parcRegisterInfo.cpp
|
| cb83374bd99e403d70aa4aed95c701a0981dcc15 |
06-Jan-2006 |
Chris Lattner <sabre@nondot.org> |
silence a bogus gcc warning
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25129 91177308-0d34-0410-b5e6-96231b3b80d8
parcISelDAGToDAG.cpp
|
| e0bce71c42a021d897b51425dab16841a0ebc5bd |
05-Jan-2006 |
Jim Laskey <jlaskey@mac.com> |
Had expand logic backward.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25105 91177308-0d34-0410-b5e6-96231b3b80d8
parcISelDAGToDAG.cpp
|
| abf6d1784b2d4bbcb7d20ab64881f77d755059f6 |
05-Jan-2006 |
Jim Laskey <jlaskey@mac.com> |
Added initial support for DEBUG_LABEL allowing debug specific labels to be
inserted in the code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25104 91177308-0d34-0410-b5e6-96231b3b80d8
parcISelDAGToDAG.cpp
|
| 941334f0b01d2019212c12b386f1201ca9cecddd |
05-Jan-2006 |
Evan Cheng <evan.cheng@apple.com> |
Remove some dead code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25102 91177308-0d34-0410-b5e6-96231b3b80d8
parcISelDAGToDAG.cpp
|
| 2b4ea795a23ff9d900b9e1f26c92975ef78db1b6 |
26-Dec-2005 |
Evan Cheng <evan.cheng@apple.com> |
Added field noResults to Instruction.
Currently tblgen cannot tell which operands in the operand list are results so
it assumes the first one is a result. This is bad. Ideally we would fix this
by separating results from inputs, e.g. (res R32:$dst),
(ops R32:$src1, R32:$src2). But that's a more distruptive change. Adding
'let noResults = 1' is the workaround to tell tblgen that the instruction does
not produces a result. It works for now since tblgen does not support
instructions which produce multiple results.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25017 91177308-0d34-0410-b5e6-96231b3b80d8
parcInstrInfo.td
|
| 171049d10f71fdeffdfd9592243d7af40db86c71 |
23-Dec-2005 |
Evan Cheng <evan.cheng@apple.com> |
* Removed the use of FLAG. Now use hasFlagIn and hasFlagOut instead.
* Added a pseudo instruction (for each target) that represent "return void".
This is a workaround for lack of optional flag operand (return void is not
lowered so it does not have a flag operand.)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24997 91177308-0d34-0410-b5e6-96231b3b80d8
parcInstrInfo.td
parcRegisterInfo.cpp
|
| 2170cef7070dbb972caa72e68603e8452f2dee97 |
23-Dec-2005 |
Chris Lattner <sabre@nondot.org> |
not a good idea
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24991 91177308-0d34-0410-b5e6-96231b3b80d8
EADME.txt
|
| 330ea126679589c1f6e7f8e55cb5376eff2e3113 |
23-Dec-2005 |
Chris Lattner <sabre@nondot.org> |
fix something-o
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24987 91177308-0d34-0410-b5e6-96231b3b80d8
parcISelDAGToDAG.cpp
|
| 74fa64b07205b1865bbbc77f33dfb09fdb24f142 |
23-Dec-2005 |
Chris Lattner <sabre@nondot.org> |
implement vaarg. Varargs now should work.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24986 91177308-0d34-0410-b5e6-96231b3b80d8
parcISelDAGToDAG.cpp
|
| c4769bb5290de162a62a1ed461131c5187c13356 |
23-Dec-2005 |
Chris Lattner <sabre@nondot.org> |
implement vastart. The dag isel compiles this:
void test3(va_list Y);
void test2(int F, ...) {
va_list X;
va_start(X, F);
test3(X);
}
into this:
test2:
save -104, %o6, %o6
st %i5, [%i6+88]
st %i4, [%i6+84]
st %i3, [%i6+80]
st %i2, [%i6+76]
st %i1, [%i6+72]
add %i6, 72, %o0
st %o0, [%i6+-4]
call test3
nop
restore %g0, %g0, %g0
retl
nop
The simple isel emits:
test2:
save -96, %o6, %o6
st %i0, [%i6+68]
st %i1, [%i6+72]
st %i2, [%i6+76]
st %i3, [%i6+80]
st %i4, [%i6+84]
st %i5, [%i6+88]
or %g0, 1, %l0
or %g0, 4, %l1
umul %l0, %l1, %l0
add %l0, 7, %l0
and %l0, -8, %l0
sub %o6, %l0, %o6
add %o6, 96, %l0
add %i6, 72, %l1
st %l1, [%l0]
ld [%l0], %o0
call test3
nop
restore %g0, %g0, %g0
retl
nop
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24985 91177308-0d34-0410-b5e6-96231b3b80d8
parcISelDAGToDAG.cpp
|
| e6ee868a8d877b5b4be367d575b03388ee231e91 |
23-Dec-2005 |
Chris Lattner <sabre@nondot.org> |
remove benchmark list, remove issues addressed by the dag-dag isel
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24984 91177308-0d34-0410-b5e6-96231b3b80d8
EADME.txt
|
| 53e884587bd4b56c14dc39600eb655e77ae7b905 |
23-Dec-2005 |
Chris Lattner <sabre@nondot.org> |
make sure bit_converts are expanded
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24978 91177308-0d34-0410-b5e6-96231b3b80d8
parcISelDAGToDAG.cpp
|
| 3cb7187d5f217dc7ecfff36357b0dd754fd0ae3b |
23-Dec-2005 |
Chris Lattner <sabre@nondot.org> |
fix the int<->fp instructions, which apparently take a single float register
to represent the int part (because it's always 32-bits)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24976 91177308-0d34-0410-b5e6-96231b3b80d8
parcISelDAGToDAG.cpp
parcInstrInfo.td
|
| a01874fc89d1f8e5e5013f86b9624110b434b966 |
23-Dec-2005 |
Chris Lattner <sabre@nondot.org> |
Use BIT_CONVERT to simplify this code
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24975 91177308-0d34-0410-b5e6-96231b3b80d8
parcISelDAGToDAG.cpp
|
| a01c0ccb63c9c585141c925ae408d83f445350f6 |
22-Dec-2005 |
Chris Lattner <sabre@nondot.org> |
clean up .td file by using evan's new FLAG thing
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24967 91177308-0d34-0410-b5e6-96231b3b80d8
parcInstrInfo.td
|
| e81aecbae69d4b3bd24523ec87673632d3b0beec |
21-Dec-2005 |
Jim Laskey <jlaskey@mac.com> |
Disengage DEBUG_LOC from non-PPC targets.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24919 91177308-0d34-0410-b5e6-96231b3b80d8
parcISelDAGToDAG.cpp
|
| 7669a51c347db563a8583c4a4466e3bbb30bdb44 |
21-Dec-2005 |
Chris Lattner <sabre@nondot.org> |
remove dead code
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24896 91177308-0d34-0410-b5e6-96231b3b80d8
parcISelDAGToDAG.cpp
|
| aca0901dd3f02f83d13c2f818d0141d644d8e5b0 |
20-Dec-2005 |
Chris Lattner <sabre@nondot.org> |
Run lower-switch after lower-invoke.
Only run lower-allocations and lower-select for the simple isel
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24881 91177308-0d34-0410-b5e6-96231b3b80d8
parcTargetMachine.cpp
|
| 85e42b45ac05223882f24c17bff66b89daa0d6fc |
20-Dec-2005 |
Chris Lattner <sabre@nondot.org> |
Reserve G1 for frame offset stuff and use it to handle large stack frames.
For example, instead of emitting this:
test:
save -40112, %o6, %o6 ;; imm too large
add %i6, -40016, %o0 ;; imm too large
call caller
nop
restore %g0, %g0, %g0
retl
nop
emit this:
test:
sethi 4194264, %g1
or %g1, 848, %g1
save %o6, %g1, %o6
sethi 4194264, %g1
add %g1, %i6, %g1
add %i1, 944, %o0
call caller
nop
restore %g0, %g0, %g0
retl
nop
which doesn't cause the assembler to barf.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24880 91177308-0d34-0410-b5e6-96231b3b80d8
parcRegisterInfo.cpp
parcRegisterInfo.td
|
| 7c423b4df11d64593c450df9f645a27e509aae14 |
19-Dec-2005 |
Chris Lattner <sabre@nondot.org> |
Fix pifft by correcting the case when a i64/f64 straddles O5 and memory:
we were storing into [FP+88] instead of [FP+92].
Improve codegen by emitting [FP+92], instead of emitting a copy of FP into
another GPR which wouldn't be coallesced because FP isn't register allocated.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24859 91177308-0d34-0410-b5e6-96231b3b80d8
parcISelDAGToDAG.cpp
|
| 43875e63f323ee01a08e0f2709213f2f84ff66c7 |
19-Dec-2005 |
Chris Lattner <sabre@nondot.org> |
don't emit 'add %o6, 0, %o6' instructions
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24857 91177308-0d34-0410-b5e6-96231b3b80d8
parcRegisterInfo.cpp
|
| eb0966693bf11411d659282b4e05788859159a4d |
19-Dec-2005 |
Chris Lattner <sabre@nondot.org> |
Fix calls to functions returning i64
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24856 91177308-0d34-0410-b5e6-96231b3b80d8
parcISelDAGToDAG.cpp
|
| bcfdec73d1e9d4b6f398a9a13b7795c01a89f0f2 |
19-Dec-2005 |
Chris Lattner <sabre@nondot.org> |
Correct bool truncstore operand order
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24855 91177308-0d34-0410-b5e6-96231b3b80d8
parcInstrInfo.td
|
| e2d97f8399d1d1072a926f9911f3d82f7730358d |
19-Dec-2005 |
Chris Lattner <sabre@nondot.org> |
add the other bool zextload as well
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24854 91177308-0d34-0410-b5e6-96231b3b80d8
parcInstrInfo.td
|
| a1251f24b5399bb8a0aabe778f8d0188a870d3c4 |
19-Dec-2005 |
Chris Lattner <sabre@nondot.org> |
implement zextload bool
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24853 91177308-0d34-0410-b5e6-96231b3b80d8
parcInstrInfo.td
|
| 61772c20ee51c7d244320f2b0b5a4d91f19de6b0 |
19-Dec-2005 |
Chris Lattner <sabre@nondot.org> |
mark some unsupported ops as unsupported
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24852 91177308-0d34-0410-b5e6-96231b3b80d8
parcISelDAGToDAG.cpp
|
| 96d5bb79d49b4ec67aa9a44af2d7f41bcfbab1d3 |
19-Dec-2005 |
Chris Lattner <sabre@nondot.org> |
Fix syntax for indirect calls. This fixes Olden/mst
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24850 91177308-0d34-0410-b5e6-96231b3b80d8
parcInstrInfo.td
|
| 6554beffe46033f654400d13c0ed6f7b602d8bf1 |
19-Dec-2005 |
Chris Lattner <sabre@nondot.org> |
Keep stack frames 8-byte aligned. This fixes olden/voronoi
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24849 91177308-0d34-0410-b5e6-96231b3b80d8
parcISelDAGToDAG.cpp
|
| 97561fc2eb1cdccf482ea0f55b86f86b1def22e3 |
19-Dec-2005 |
Chris Lattner <sabre@nondot.org> |
apparently rdy isn't actually a psuedo instruction. Use rd %y
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24848 91177308-0d34-0410-b5e6-96231b3b80d8
parcInstrInfo.td
|
| beecfd2b2dc94b2b164f40c4443cc0506f228ed7 |
19-Dec-2005 |
Chris Lattner <sabre@nondot.org> |
add fneg/fabs support for doubles
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24847 91177308-0d34-0410-b5e6-96231b3b80d8
PMover.cpp
parcInstrInfo.td
|
| da5a7fd8d4bcf61e92e30ab2907ba01d30c0755a |
19-Dec-2005 |
Chris Lattner <sabre@nondot.org> |
Various cleanups to this pass, no functionality change
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24846 91177308-0d34-0410-b5e6-96231b3b80d8
PMover.cpp
|
| f53d0bfbfd501d752fe313725083d1f295e30ba7 |
19-Dec-2005 |
Chris Lattner <sabre@nondot.org> |
add bool truncstores
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24845 91177308-0d34-0410-b5e6-96231b3b80d8
parcInstrInfo.td
|
| 8ba0423660fd8d5c9397bb6142ee56f5aec73716 |
19-Dec-2005 |
Chris Lattner <sabre@nondot.org> |
Elimiante SP and FP, which weren't members of the IntRegs register class
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24844 91177308-0d34-0410-b5e6-96231b3b80d8
parcISelDAGToDAG.cpp
parcRegisterInfo.cpp
parcRegisterInfo.td
parcV8ISelSimple.cpp
|
| 379e6c03695c635608b5dc17402b93a8f7475b13 |
19-Dec-2005 |
Chris Lattner <sabre@nondot.org> |
The sun assembler only supports .xword in V9 mode.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24842 91177308-0d34-0410-b5e6-96231b3b80d8
parcAsmPrinter.cpp
|
| 7a48e5018b10d2b4c123913b40df904bd5c66043 |
19-Dec-2005 |
Chris Lattner <sabre@nondot.org> |
Configure the asmwriter to allow constant pools to be printed correctly
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24841 91177308-0d34-0410-b5e6-96231b3b80d8
parcAsmPrinter.cpp
parcInstrInfo.td
|
| b04c5c8eb2f0574c473036f1e66086a771663300 |
19-Dec-2005 |
Chris Lattner <sabre@nondot.org> |
add support for integer extloads
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24840 91177308-0d34-0410-b5e6-96231b3b80d8
parcInstrInfo.td
|
| 20ad53ffd770a4012dcb3be7ee1a393d30337c4e |
19-Dec-2005 |
Chris Lattner <sabre@nondot.org> |
Add support for undef
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24839 91177308-0d34-0410-b5e6-96231b3b80d8
parcInstrInfo.td
parcV8ISelSimple.cpp
|
| 311f8c21d0acd3276b6a77f08c5e60ad391bd388 |
19-Dec-2005 |
Chris Lattner <sabre@nondot.org> |
Add support for calls to external symbols
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24838 91177308-0d34-0410-b5e6-96231b3b80d8
parcISelDAGToDAG.cpp
|
| e90ac3a3e7959143d7c92c50061b2c16e4124d9f |
19-Dec-2005 |
Chris Lattner <sabre@nondot.org> |
we have no memcpy
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24837 91177308-0d34-0410-b5e6-96231b3b80d8
parcISelDAGToDAG.cpp
|
| b4d899e21ccb4414f671efd54b3f87dbcd751aae |
18-Dec-2005 |
Chris Lattner <sabre@nondot.org> |
Fix a crash on a call with no arguments
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24836 91177308-0d34-0410-b5e6-96231b3b80d8
parcISelDAGToDAG.cpp
|
| dab05f0e194ac06c2c733f18a698b707dfa99ec3 |
18-Dec-2005 |
Chris Lattner <sabre@nondot.org> |
Change return lowering so that we can autogen the matching code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24832 91177308-0d34-0410-b5e6-96231b3b80d8
parcISelDAGToDAG.cpp
parcInstrInfo.td
|
| 2db3ff66f1183fa65bd5102ad255a798f76cb3b2 |
18-Dec-2005 |
Chris Lattner <sabre@nondot.org> |
Implement Calls for V8. This would be completely autogenerated except for
a small bug in tblgen. When that is fixed, we can remove the ISD::Call case
in Select.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24830 91177308-0d34-0410-b5e6-96231b3b80d8
parcISelDAGToDAG.cpp
parcInstrInfo.td
|
| 384e5efc0e0b23a0d6c51f991a1b382be0414a8c |
18-Dec-2005 |
Chris Lattner <sabre@nondot.org> |
Implement the full V8 ABI for incoming arguments.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24825 91177308-0d34-0410-b5e6-96231b3b80d8
parcISelDAGToDAG.cpp
parcV8ISelSimple.cpp
|
| eee99bd459ab17a498d076f27de313398b9d3d4d |
18-Dec-2005 |
Chris Lattner <sabre@nondot.org> |
Push ops list, asm string, and pattern all the way up to InstV8. Move the
InstV8 class to the InstrFormats file where it belongs.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24824 91177308-0d34-0410-b5e6-96231b3b80d8
parcInstrFormats.td
parcInstrInfo.td
|
| 3308449afc6f1b8b8536e544e53bc6751c91b4e3 |
18-Dec-2005 |
Chris Lattner <sabre@nondot.org> |
Give V8 select_cc, in the spirit of the PPC backend
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24823 91177308-0d34-0410-b5e6-96231b3b80d8
parcISelDAGToDAG.cpp
parcInstrInfo.td
|
| 98f853698c5a68d06934c1b7560f3ab53261d311 |
18-Dec-2005 |
Chris Lattner <sabre@nondot.org> |
remove some unused instructions
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24822 91177308-0d34-0410-b5e6-96231b3b80d8
parcInstrInfo.td
|
| 065c896b7ae10f7b34ad6c289ee157f490d6b1ea |
18-Dec-2005 |
Chris Lattner <sabre@nondot.org> |
V8 doesn't have FP extload
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24821 91177308-0d34-0410-b5e6-96231b3b80d8
parcISelDAGToDAG.cpp
|
| d5aae0528132a130e2d8069c3deebe7e6a362759 |
18-Dec-2005 |
Chris Lattner <sabre@nondot.org> |
simplifications, fix typo
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24820 91177308-0d34-0410-b5e6-96231b3b80d8
parcISelDAGToDAG.cpp
|
| 8fa54dc70239dc08cc3c93cb7513e0625be50eb4 |
18-Dec-2005 |
Chris Lattner <sabre@nondot.org> |
Add frameindex support
Add support for copying (e.g. returning) doubles
Add support for F<->I instructions
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24818 91177308-0d34-0410-b5e6-96231b3b80d8
parcISelDAGToDAG.cpp
parcInstrInfo.td
|
| abfc2a73637a73ac6a9d2404ba1936c0fb6e64de |
18-Dec-2005 |
Chris Lattner <sabre@nondot.org> |
Tighten up some checks
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24817 91177308-0d34-0410-b5e6-96231b3b80d8
parcInstrInfo.cpp
|
| 76acc872b3c63c26a83c2832ece6fa9b04786f24 |
18-Dec-2005 |
Chris Lattner <sabre@nondot.org> |
Add constant pool support, including folding into addresses.
Pretty print addresses a bit, to not print [%r1+%g0]: just print [%r1]
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24813 91177308-0d34-0410-b5e6-96231b3b80d8
parcAsmPrinter.cpp
parcISelDAGToDAG.cpp
parcInstrInfo.td
|
| e1389ad43afa6b4f7449013fec7ad37fe8ca2bbd |
18-Dec-2005 |
Chris Lattner <sabre@nondot.org> |
Teach the addressing mode stuff to fold "%lo" into 'ri' addressing modes,
allowing us to compile this:
to this:
%G1 = external global int
%G2 = external global int
void %test() {
%X = load int* %G1
store int %X, int* %G2
ret void
}
test:
save -96, %sp, %sp
sethi %hi(G1), %l0
ld [%l0+%lo(G1)], %l0
sethi %hi(G2), %l1
st %l0, [%l1+%lo(G2)]
restore %g0, %g0, %g0
retl
nop
instead of this:
test:
save -96, %sp, %sp
sethi %hi(G1), %l0
or %g0, %lo(G1), %l1
ld [%l1+%l0], %l0
sethi %hi(G2), %l1
or %g0, %lo(G2), %l2
st %l0, [%l2+%l1]
restore %g0, %g0, %g0
retl
nop
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24812 91177308-0d34-0410-b5e6-96231b3b80d8
parcAsmPrinter.cpp
parcISelDAGToDAG.cpp
|
| e357246c6b2f71fda64764b85e32d2004f5dd603 |
18-Dec-2005 |
Chris Lattner <sabre@nondot.org> |
Add initial support for global variables, and fix a bug in addr mode selection
where we didn't select the operands.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24811 91177308-0d34-0410-b5e6-96231b3b80d8
parcISelDAGToDAG.cpp
parcInstrInfo.td
|
| 04dd673aea8676443bf8cf8875b0e80bfa1309a5 |
18-Dec-2005 |
Chris Lattner <sabre@nondot.org> |
Claiming that branch targets are registers is not very wholesome. Change them
to be basic blocks. Also, add uncond branches.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24810 91177308-0d34-0410-b5e6-96231b3b80d8
parcInstrInfo.td
|
| 456b9400dc7aecc6875f521fd4bc87d25c32865b |
18-Dec-2005 |
Chris Lattner <sabre@nondot.org> |
Add unordered comparisons
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24809 91177308-0d34-0410-b5e6-96231b3b80d8
parcInstrInfo.td
|
| 5b2dfc7cc15d95678a1830485cc85a36e2190ce8 |
18-Dec-2005 |
Chris Lattner <sabre@nondot.org> |
Add patterns to the rest of the int condbranches and some of the fp branches
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24808 91177308-0d34-0410-b5e6-96231b3b80d8
parcInstrInfo.td
|
| 4d55aca87aeac108980005912d8ea8733d6226e1 |
18-Dec-2005 |
Chris Lattner <sabre@nondot.org> |
Add initial conditional branch support. This doesn't actually work yet due
to a bug in the scheduler.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24807 91177308-0d34-0410-b5e6-96231b3b80d8
parcISelDAGToDAG.cpp
parcInstrFormats.td
parcInstrInfo.td
parcRegisterInfo.td
|
| 38abcb500fbb868514d83152cc178ecf2d7ba6e4 |
18-Dec-2005 |
Chris Lattner <sabre@nondot.org> |
Eliminate CMPri, which is a synonym for SUBCCri
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24805 91177308-0d34-0410-b5e6-96231b3b80d8
parcInstrInfo.td
parcV8ISelSimple.cpp
|
| 294974bd576c381d66af6e73159d0574af81d405 |
18-Dec-2005 |
Chris Lattner <sabre@nondot.org> |
add fneg,fabs,fsqrt instructions
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24803 91177308-0d34-0410-b5e6-96231b3b80d8
EADME.txt
parcInstrInfo.td
|
| b4d5172af93533e3325b647dd257810b236337aa |
18-Dec-2005 |
Chris Lattner <sabre@nondot.org> |
Add patterns for fround/fextend and the funny fsmuld instruction
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24802 91177308-0d34-0410-b5e6-96231b3b80d8
parcInstrInfo.td
|
| 10c6aed73c79861c31e79402d2161821806efe6f |
18-Dec-2005 |
Chris Lattner <sabre@nondot.org> |
Add FP +,-,*,/
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24801 91177308-0d34-0410-b5e6-96231b3b80d8
parcInstrInfo.td
|
| 558bfe0cf5392d7f8d48647ed1d88fd0f530c4c3 |
18-Dec-2005 |
Chris Lattner <sabre@nondot.org> |
Give patterns to F3_3 instructions
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24800 91177308-0d34-0410-b5e6-96231b3b80d8
parcInstrFormats.td
parcInstrInfo.td
|
| d19fc65345c773af2e82a6e5227e4b020aab7d4c |
17-Dec-2005 |
Chris Lattner <sabre@nondot.org> |
Implement 64-bit add/sub, make sure to receive and return 64-bit args with
the right halves in the right regs
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24799 91177308-0d34-0410-b5e6-96231b3b80d8
parcISelDAGToDAG.cpp
|
| 7087e57872f68978945be227aafd17d6d43ae03e |
17-Dec-2005 |
Chris Lattner <sabre@nondot.org> |
implement div and rem
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24798 91177308-0d34-0410-b5e6-96231b3b80d8
parcISelDAGToDAG.cpp
|
| ee3d5fba54c658382926cbd40ef471245b61b19c |
17-Dec-2005 |
Chris Lattner <sabre@nondot.org> |
implement MULHU/MULHS for 64-bit multiplies
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24797 91177308-0d34-0410-b5e6-96231b3b80d8
parcISelDAGToDAG.cpp
|
| 37949f5c2b48c128e31361f638fdd44c966ee4d0 |
17-Dec-2005 |
Chris Lattner <sabre@nondot.org> |
Add patterns for multiply, simplify Y register handling stuff, add RDY instruction
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24796 91177308-0d34-0410-b5e6-96231b3b80d8
parcInstrInfo.td
parcRegisterInfo.td
parcV8ISelSimple.cpp
|
| 9034b883a463b37dbc4766ff7243dac3a27d0b11 |
17-Dec-2005 |
Chris Lattner <sabre@nondot.org> |
Make the addressing modes smarter
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24795 91177308-0d34-0410-b5e6-96231b3b80d8
parcISelDAGToDAG.cpp
parcInstrInfo.td
|
| 87a63f812c824116bef0aaa5a034bd7adf77eae8 |
17-Dec-2005 |
Chris Lattner <sabre@nondot.org> |
remove some unused instructions
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24794 91177308-0d34-0410-b5e6-96231b3b80d8
parcInstrInfo.td
|
| 2cfdbb27165ee24b28a84f1a7cd3196b7afd2a5e |
17-Dec-2005 |
Chris Lattner <sabre@nondot.org> |
add andn/orn/xorn patterns. This allows us to compile this:
long %test(ubyte, short, long %X, long %Y) {
%A = xor long %X, -1
%B = and long %Y, %A
ret long %B
}
to this:
test:
save -96, %sp, %sp
andn %i4, %i2, %i0
andn %i5, %i3, %i1
restore %g0, %g0, %g0
retl
nop
instead of this:
test:
save -96, %sp, %sp
xor %i2, -1, %l0
xor %i3, -1, %l1
and %i4, %l0, %i0
and %i5, %l1, %i1
restore %g0, %g0, %g0
retl
nop
The simpleisel emits: :(
test:
save -96, %sp, %sp
or %g0, -1, %l0
or %g0, -1, %l0
or %g0, -1, %l0
or %g0, -1, %l1
xor %i2, %l0, %l0
xor %i3, %l1, %l1
and %i4, %l0, %i0
and %i5, %l1, %i1
restore %g0, %g0, %g0
retl
nop
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24793 91177308-0d34-0410-b5e6-96231b3b80d8
parcInstrInfo.td
|
| 217aabf89ee0316bb4bbcc460bdc24900fe50a02 |
17-Dec-2005 |
Chris Lattner <sabre@nondot.org> |
Add support for 64-bit arguments
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24792 91177308-0d34-0410-b5e6-96231b3b80d8
parcISelDAGToDAG.cpp
|
| 9a60ff654a0c633b284ef59981716fd189cb78c0 |
17-Dec-2005 |
Chris Lattner <sabre@nondot.org> |
Sparc doesn't have sext_inreg
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24791 91177308-0d34-0410-b5e6-96231b3b80d8
parcISelDAGToDAG.cpp
|
| 53ec2035eb686c25013d47405fd0b178b60d59c8 |
17-Dec-2005 |
Chris Lattner <sabre@nondot.org> |
add patterns for FP stores
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24790 91177308-0d34-0410-b5e6-96231b3b80d8
parcInstrInfo.td
|
| d55e1ca5ef96821d8c96da6f0d79e3f96d810cdd |
17-Dec-2005 |
Chris Lattner <sabre@nondot.org> |
Add [reg+reg] integer stores
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24789 91177308-0d34-0410-b5e6-96231b3b80d8
parcInstrInfo.td
|
| d30a63063617d3ef6907ed4a5a2bbf9fa22b7d7c |
17-Dec-2005 |
Chris Lattner <sabre@nondot.org> |
Add store patterns
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24788 91177308-0d34-0410-b5e6-96231b3b80d8
parcInstrInfo.td
|
| b575baf57d49bc53883544b4585e25ae4585ab3f |
17-Dec-2005 |
Chris Lattner <sabre@nondot.org> |
add fp load patterns, switch rest of loads and stores to use addrmodes
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24786 91177308-0d34-0410-b5e6-96231b3b80d8
parcInstrInfo.td
|
| 1963783fab96e91cfcba59a4fa08d132040f0a7a |
17-Dec-2005 |
Chris Lattner <sabre@nondot.org> |
Add integer load[r+r] forms.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24785 91177308-0d34-0410-b5e6-96231b3b80d8
parcInstrInfo.td
|
| 331355cf7da6613ff86732550ccc1d32ee1dce61 |
17-Dec-2005 |
Chris Lattner <sabre@nondot.org> |
Rename load/store instructions to include an RI suffix
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24784 91177308-0d34-0410-b5e6-96231b3b80d8
parcRegisterInfo.cpp
parcV8ISelSimple.cpp
|
| 84e2abf116c236d9493995e65259f1352a925239 |
17-Dec-2005 |
Chris Lattner <sabre@nondot.org> |
Add patterns for the rest of the loads. Add 'ri' suffixes to the load and store insts
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24783 91177308-0d34-0410-b5e6-96231b3b80d8
parcInstrInfo.td
|
| bc83fd96721eda272d90eafcb3a2a31ef9a2c366 |
17-Dec-2005 |
Chris Lattner <sabre@nondot.org> |
Add basic addressing mode support and one load.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24782 91177308-0d34-0410-b5e6-96231b3b80d8
parcAsmPrinter.cpp
parcISelDAGToDAG.cpp
parcInstrInfo.td
|
| b71f9f8488f665ef042097eca28aeddb85e6c2ee |
17-Dec-2005 |
Chris Lattner <sabre@nondot.org> |
Use a combination of sethi and or to build arbitrary immediates.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24780 91177308-0d34-0410-b5e6-96231b3b80d8
parcInstrInfo.td
|
| 57dd3bc46049c528858cdd02f76149d9525199fa |
17-Dec-2005 |
Chris Lattner <sabre@nondot.org> |
Use sethi to build large immediates with zeros at the bottom
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24779 91177308-0d34-0410-b5e6-96231b3b80d8
parcInstrFormats.td
parcInstrInfo.td
|
| d2cd46676c697137be7b57c04e3615ba2cdc00b2 |
17-Dec-2005 |
Chris Lattner <sabre@nondot.org> |
Add shift and small immediate support
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24778 91177308-0d34-0410-b5e6-96231b3b80d8
parcInstrInfo.td
|
| f83cee6ac196faf14944948034f3163023a315cd |
17-Dec-2005 |
Chris Lattner <sabre@nondot.org> |
Add some basic reg-reg instructions
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24777 91177308-0d34-0410-b5e6-96231b3b80d8
parcInstrInfo.td
|
| e33a3ff942d33edfb619867c84b1d4589d3a582d |
17-Dec-2005 |
Chris Lattner <sabre@nondot.org> |
Add empty patterns to all F3_1 instructions
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24776 91177308-0d34-0410-b5e6-96231b3b80d8
parcInstrFormats.td
parcInstrInfo.td
|
| 7b0902dcf8352ef93e35cc9cf264dbe4d2a198de |
17-Dec-2005 |
Chris Lattner <sabre@nondot.org> |
Add some simple integer patterns. This allows us to compile this:
int %test(int %A) {
%B = add int %A, 1
%C = xor int %B, 123
ret int %C
}
into this:
test:
save -96, %sp, %sp
add %i0, 1, %l0
xor %l0, 123, %i0
restore %g0, %g0, %g0
retl
nop
for example. I guess it would make sense to add reg/reg versions too.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24774 91177308-0d34-0410-b5e6-96231b3b80d8
parcInstrInfo.td
|
| 4b4863188fe226c00d961ec611f2eb1ee8aac4c0 |
17-Dec-2005 |
Chris Lattner <sabre@nondot.org> |
Implement ret with operand, giving us this:
int %test(int %A) {
ret int %A
}
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24773 91177308-0d34-0410-b5e6-96231b3b80d8
parcISelDAGToDAG.cpp
|
| bc3d362d5bae59eb45ce275d8c4d9372847369dc |
17-Dec-2005 |
Chris Lattner <sabre@nondot.org> |
Add a pattern for 'ret'. This now compiles:
void %test() { ret void }
:)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24772 91177308-0d34-0410-b5e6-96231b3b80d8
parcInstrInfo.td
|
| f3bf50d2c80da2d45b22e5c2458048c860754736 |
17-Dec-2005 |
Chris Lattner <sabre@nondot.org> |
Add empty patterns for F3_2 instructions
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24771 91177308-0d34-0410-b5e6-96231b3b80d8
parcInstrFormats.td
parcInstrInfo.td
|
| a01b75758c740a3aba3458713b190f8ecadbe8e6 |
17-Dec-2005 |
Chris Lattner <sabre@nondot.org> |
Implement LowerArguments, at least for the first 6 integer args
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24770 91177308-0d34-0410-b5e6-96231b3b80d8
parcISelDAGToDAG.cpp
|
| 6c18b10ad4873ad7e1b1c1d589bcf844c46f4120 |
17-Dec-2005 |
Chris Lattner <sabre@nondot.org> |
Add the framework for a dag-dag isel
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24769 91177308-0d34-0410-b5e6-96231b3b80d8
akefile
parc.h
parcISelDAGToDAG.cpp
parcTargetMachine.cpp
|
| 576e46fc67a388961fe6db41cbd64adb223361e2 |
17-Dec-2005 |
Chris Lattner <sabre@nondot.org> |
asmprinter done, added crucial missing step
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24767 91177308-0d34-0410-b5e6-96231b3b80d8
EADME.txt
|
| 967abf37c52ce7abc866d59ccf180574b0e30e06 |
17-Dec-2005 |
Chris Lattner <sabre@nondot.org> |
Use the AsmPrinter for global variable init printing. This eliminates a
bunch of code and causes V8 to start using the fancy .asciz directive that
the sun assembler supports.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24766 91177308-0d34-0410-b5e6-96231b3b80d8
parcAsmPrinter.cpp
|
| b5e9eb6089676ba807da70348079fb6e8df3e40e |
17-Dec-2005 |
Chris Lattner <sabre@nondot.org> |
Switch constant pool printing over to use the Shared AsmPrinter version
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24765 91177308-0d34-0410-b5e6-96231b3b80d8
parcAsmPrinter.cpp
|
| 1dbed16fec1de205a7e69cc5c63798ec18e17f4c |
17-Dec-2005 |
Chris Lattner <sabre@nondot.org> |
Use the shared AsmPrinter code for some basic stuff. No functionality
change except for fewer .section directives emitted
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24764 91177308-0d34-0410-b5e6-96231b3b80d8
parcAsmPrinter.cpp
|
| 0d8fcd3218ed93e338a2e7b845f358f1c6f74d58 |
17-Dec-2005 |
Chris Lattner <sabre@nondot.org> |
Convert the remaining instructions over, branches and calls. Fix a couple
minor bugs
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24762 91177308-0d34-0410-b5e6-96231b3b80d8
EADME.txt
parcAsmPrinter.cpp
parcInstrFormats.td
parcInstrInfo.td
|
| dc6938ac23f49c35ac551b6f5541e926a357de1b |
17-Dec-2005 |
Chris Lattner <sabre@nondot.org> |
convert FP instructions to use an asmstring and operand list, allowing FP
programs to work on V8 again
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24761 91177308-0d34-0410-b5e6-96231b3b80d8
parcInstrFormats.td
parcInstrInfo.td
|
| 0647bf69653df8f8f15e938341fe6e63daf5c3b6 |
16-Dec-2005 |
Chris Lattner <sabre@nondot.org> |
add some notes
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24745 91177308-0d34-0410-b5e6-96231b3b80d8
EADME.txt
|
| 13e1501c91e3e56740a59eb7dab173c1d0cf5765 |
16-Dec-2005 |
Chris Lattner <sabre@nondot.org> |
Add a couple more instrs
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24744 91177308-0d34-0410-b5e6-96231b3b80d8
parcInstrFormats.td
parcInstrInfo.td
|
| 3c1c514fae69792a75c93ae1e91da42b7940137f |
16-Dec-2005 |
Chris Lattner <sabre@nondot.org> |
remove some dead code
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24743 91177308-0d34-0410-b5e6-96231b3b80d8
parcAsmPrinter.cpp
|
| 17392e026a2f1fa9b62e38c44a447874055892bc |
16-Dec-2005 |
Chris Lattner <sabre@nondot.org> |
asmprint pseudo instrs
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24742 91177308-0d34-0410-b5e6-96231b3b80d8
parcAsmPrinter.cpp
parcInstrInfo.td
|
| d4f2ab5e0059f8398a7882d6c6be50341641b97b |
16-Dec-2005 |
Chris Lattner <sabre@nondot.org> |
Autogenerate asmprinter for F3_2 instructions
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24741 91177308-0d34-0410-b5e6-96231b3b80d8
parcAsmPrinter.cpp
parcInstrFormats.td
parcInstrInfo.td
|
| 1c4f4356032195f05c715b113b4ee5e2d4909915 |
16-Dec-2005 |
Chris Lattner <sabre@nondot.org> |
Switch F3_1 instructions over to use AsmStrings
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24740 91177308-0d34-0410-b5e6-96231b3b80d8
parcAsmPrinter.cpp
parcInstrFormats.td
parcInstrInfo.td
|
| 994b735de8f4bb9b79a967beb80442558625fcb0 |
16-Dec-2005 |
Chris Lattner <sabre@nondot.org> |
Plug in basic hooks for an autogenerated asm printer to fill in.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24739 91177308-0d34-0410-b5e6-96231b3b80d8
akefile
parcAsmPrinter.cpp
|
| 96b84beb77d5209d2d5db4db9a6dc07461de2f7e |
16-Dec-2005 |
Chris Lattner <sabre@nondot.org> |
Add operand info for F3_[12] instructions, getting V8 back to basic functionality.
With this, Regression/CodeGen/SparcV8/basictest.ll now passes. Lets hear it
for regression tests :)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24738 91177308-0d34-0410-b5e6-96231b3b80d8
parcInstrFormats.td
parcInstrInfo.td
|
| 03a83c90da38a3a3cf14f2003c730f0764e7b9cf |
16-Dec-2005 |
Chris Lattner <sabre@nondot.org> |
Remove JIT support, which doesn't work.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24736 91177308-0d34-0410-b5e6-96231b3b80d8
akefile
parcTargetMachine.cpp
parcTargetMachine.h
parcV8CodeEmitter.cpp
parcV8JITInfo.h
|
| 3ff57516839433131dd537ed2708a3e23f88ae77 |
16-Dec-2005 |
Chris Lattner <sabre@nondot.org> |
add some simple operand info
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24735 91177308-0d34-0410-b5e6-96231b3b80d8
parcInstrInfo.td
|
| 6510b22cec7de4f0acc9965ec24c3668a6a8a87e |
01-Dec-2005 |
Nate Begeman <natebegeman@mac.com> |
Support multiple ValueTypes per RegisterClass, needed for upcoming vector
work. This change has no effect on generated code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24563 91177308-0d34-0410-b5e6-96231b3b80d8
parcRegisterInfo.td
|
| ce8eb0c16b7197eaa886f90c1ef9ab9bbf1957c4 |
08-Nov-2005 |
Chris Lattner <sabre@nondot.org> |
Add a new option to indicate we want the code generator to emit code quickly,not spending tons of time microoptimizing it. This is useful for an -O0style of build.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24233 91177308-0d34-0410-b5e6-96231b3b80d8
parcTargetMachine.cpp
parcTargetMachine.h
|
| 72fe0af68fd6cd0d38f1a8710f0f6768c0684b60 |
29-Oct-2005 |
Chris Lattner <sabre@nondot.org> |
remove reference to this pass
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24088 91177308-0d34-0410-b5e6-96231b3b80d8
parcTargetMachine.cpp
|
| 08a6b3cf7ed105c49502716f835f0d8cd8be05b0 |
24-Oct-2005 |
Chris Lattner <sabre@nondot.org> |
do not wrap this whole file in namespace llvm
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23962 91177308-0d34-0410-b5e6-96231b3b80d8
parcV8CodeEmitter.cpp
|
| 02d608bd5f48ed6b65d3df5772d3d9e07dce1b11 |
24-Oct-2005 |
Chris Lattner <sabre@nondot.org> |
Make this build with GCC 4.1, patch contributed by Vladimir A. Merzliakov!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23956 91177308-0d34-0410-b5e6-96231b3b80d8
parcV8CodeEmitter.cpp
|
| 5ef4d8dd6da50a38f2908aec3ad0e4bb1d0d4eae |
22-Oct-2005 |
Chris Lattner <sabre@nondot.org> |
This file is entirely ifdef'd out
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23882 91177308-0d34-0410-b5e6-96231b3b80d8
parcV8ISelPattern.cpp
|
| f5c6e6b7452a4aba6d3067896c3d95c4f9457c87 |
05-Oct-2005 |
Chris Lattner <sabre@nondot.org> |
silence some warnings
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23637 91177308-0d34-0410-b5e6-96231b3b80d8
PMover.cpp
|
| 97d5e6461a28790fa341d9e3b58f043db549dc6a |
30-Sep-2005 |
Chris Lattner <sabre@nondot.org> |
Pass extra regclasses into spilling code
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23537 91177308-0d34-0410-b5e6-96231b3b80d8
parcRegisterInfo.cpp
parcRegisterInfo.h
|
| 8c4469840ebed11a87c76cab13a658f728560f1b |
13-Sep-2005 |
Chris Lattner <sabre@nondot.org> |
This has been moved to the target-indep code
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23333 91177308-0d34-0410-b5e6-96231b3b80d8
parcV8ISelPattern.cpp
|
| 8c65344a151381d4554a97454404d8e53c4c00cc |
08-Sep-2005 |
Chris Lattner <sabre@nondot.org> |
ignore generated files
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23263 91177308-0d34-0410-b5e6-96231b3b80d8
cvsignore
|
| b1e1180ca0b32f37aa74d7ad703eeaf91e66c8fa |
01-Sep-2005 |
Jim Laskey <jlaskey@mac.com> |
1. Use SubtargetFeatures in llc/lli.
2. Propagate feature "string" to all targets.
3. Implement use of SubtargetFeatures in PowerPCTargetSubtarget.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23192 91177308-0d34-0410-b5e6-96231b3b80d8
parcTargetMachine.cpp
parcTargetMachine.h
|
| ecbce617ca5ca4c8f881c56297b9aac931d91744 |
19-Aug-2005 |
Chris Lattner <sabre@nondot.org> |
Split RegisterClass 'Methods' into MethodProtos and MethodBodies
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22929 91177308-0d34-0410-b5e6-96231b3b80d8
parcRegisterInfo.td
|
| e7af178ccf52506f69c53131f558c37cef90ce77 |
19-Aug-2005 |
Chris Lattner <sabre@nondot.org> |
Fix code that assumes the register info will be dumped into a target
namespace instead of the reg class namespace. Update getRegClassForType()
to use modified names due to tblgen change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22923 91177308-0d34-0410-b5e6-96231b3b80d8
parcRegisterInfo.cpp
|
| 28e728d75a7a5b798f6814652a6dd97732b236ea |
19-Aug-2005 |
Chris Lattner <sabre@nondot.org> |
put reg classes in namespaces
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22922 91177308-0d34-0410-b5e6-96231b3b80d8
parcRegisterInfo.td
|
| b8df7c22131368abd3e7d6e0e4b0fc6ee74f8427 |
17-Aug-2005 |
Jim Laskey <jlaskey@mac.com> |
Promote dependency for MathExtras.h out of Constants.h.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22839 91177308-0d34-0410-b5e6-96231b3b80d8
parcAsmPrinter.cpp
|
| cb6682fa44e13262bdef7dd22b4ba90f8c2e7b97 |
17-Aug-2005 |
Jim Laskey <jlaskey@mac.com> |
Culling out use of unions for converting FP to bits and vice versa.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22838 91177308-0d34-0410-b5e6-96231b3b80d8
parcAsmPrinter.cpp
|
| 7cbd525ba85ebe440d15fa359ec940e404d14906 |
16-Aug-2005 |
Nate Begeman <natebegeman@mac.com> |
Implement BR_CC and BRTWOWAY_CC. This allows the removal of a rather nasty
fixme from the PowerPC backend. Emit slightly better code for legalizing
select_cc.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22805 91177308-0d34-0410-b5e6-96231b3b80d8
parcV8ISelPattern.cpp
|
| 00b16889ab461b7ecef1c91ade101186b7f1fce2 |
27-Jul-2005 |
Jeff Cohen <jeffc@jolt-lang.org> |
Eliminate all remaining tabs and trailing spaces.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22523 91177308-0d34-0410-b5e6-96231b3b80d8
PMover.cpp
parcV8ISelPattern.cpp
|
| bce81ae51ececbd03ffdb17d56c4a1206edfc52e |
10-Jul-2005 |
Chris Lattner <sabre@nondot.org> |
Change *EXTLOAD to use an VTSDNode operand instead of being an MVTSDNode.
This is the last MVTSDNode.
This allows us to eliminate a bunch of special case code for handling
MVTSDNodes.
Also, remove some uses of dyn_cast that should really be cast (which is
cheaper in a release build).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22368 91177308-0d34-0410-b5e6-96231b3b80d8
parcV8ISelPattern.cpp
|
| 9fadb4c1c0a6d223aa468f9f72f8c2562dc66839 |
10-Jul-2005 |
Chris Lattner <sabre@nondot.org> |
Change TRUNCSTORE to use a VTSDNode operand instead of being an MVTSTDNode
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22366 91177308-0d34-0410-b5e6-96231b3b80d8
parcV8ISelPattern.cpp
|
| e014f89f3dfdd7a825536c188f585fec41692d50 |
28-Jun-2005 |
Andrew Lenharth <andrewl@lenharth.org> |
some call work
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22303 91177308-0d34-0410-b5e6-96231b3b80d8
parcV8ISelPattern.cpp
|
| 0431c96cec9576611f06c513d6adcab0f950c18c |
25-Jun-2005 |
Chris Lattner <sabre@nondot.org> |
Refactor the addPassesToEmitAssembly interface into a addPassesToEmitFile
interface.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22282 91177308-0d34-0410-b5e6-96231b3b80d8
parcTargetMachine.cpp
parcTargetMachine.h
|
| 558bc88a00930fce283b240b7c9555f649a18f1b |
18-Jun-2005 |
Andrew Lenharth <andrewl@lenharth.org> |
core changes for varargs
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22254 91177308-0d34-0410-b5e6-96231b3b80d8
parcV8ISelSimple.cpp
|
| 72b16d820cf49026a00c732abcbc039b5fb8673f |
17-Jun-2005 |
Andrew Lenharth <andrewl@lenharth.org> |
A start at a Sparc V8 Pattern ISel. Anyone want to implement the calling
convention? ;)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22247 91177308-0d34-0410-b5e6-96231b3b80d8
parcV8ISelPattern.cpp
|
| 29eeea5082eae754c047ab6a45a36618d31bf908 |
18-May-2005 |
Misha Brukman <brukman+llvm@gmail.com> |
Wrap long lines
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22125 91177308-0d34-0410-b5e6-96231b3b80d8
PMover.cpp
|
| 27177f8c16d4033cb70310afd41ba16395a49efe |
22-Apr-2005 |
Misha Brukman <brukman+llvm@gmail.com> |
Convert tabs to spaces
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21457 91177308-0d34-0410-b5e6-96231b3b80d8
parcAsmPrinter.cpp
parcTargetMachine.cpp
parcV8ISelSimple.cpp
|
| b5f662fa0314f7e7e690aae8ebff7136cc3a5ab0 |
22-Apr-2005 |
Misha Brukman <brukman+llvm@gmail.com> |
Remove trailing whitespace
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21425 91177308-0d34-0410-b5e6-96231b3b80d8
elaySlotFiller.cpp
PMover.cpp
parc.h
parcAsmPrinter.cpp
parcInstrInfo.cpp
parcInstrInfo.h
parcRegisterInfo.cpp
parcRegisterInfo.h
parcTargetMachine.cpp
parcTargetMachine.h
parcV8CodeEmitter.cpp
parcV8ISelSimple.cpp
parcV8JITInfo.h
|
| e4d5c441e04bdc00ccf1804744af670655123b07 |
15-Mar-2005 |
Chris Lattner <sabre@nondot.org> |
This mega patch converts us from using Function::a{iterator|begin|end} to
using Function::arg_{iterator|begin|end}. Likewise Module::g* -> Module::global_*.
This patch is contributed by Gabor Greif, thanks!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@20597 91177308-0d34-0410-b5e6-96231b3b80d8
parcAsmPrinter.cpp
parcV8ISelSimple.cpp
|
| e7f96c515efb92e477217ab97cf1a617901daf79 |
01-Jan-2005 |
Chris Lattner <sabre@nondot.org> |
Substantially improve the code generated by non-folded setcc instructions.
In particular, instead of compiling this:
bool %test(int %A, int %B) {
%C = setlt int %A, %B
ret bool %C
}
to this:
test:
save %sp, -96, %sp
subcc %i0, %i1, %g0
bl .LBBtest_1 !
nop
ba .LBBtest_2 !
nop
.LBBtest_1: !
or %g0, 1, %i0
ba .LBBtest_3 !
nop
.LBBtest_2: !
or %g0, 0, %i0
ba .LBBtest_3 !
nop
.LBBtest_3: !
restore %g0, %g0, %g0
retl
nop
We now compile it to this:
test:
save %sp, -96, %sp
subcc %i0, %i1, %g0
or %g0, 1, %i0
bl .LBBtest_2 !
nop
.LBBtest_1: !
or %g0, %g0, %i0
.LBBtest_2: !
restore %g0, %g0, %g0
retl
nop
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19213 91177308-0d34-0410-b5e6-96231b3b80d8
parcV8ISelSimple.cpp
|
| 84c556e92a359d919b06450ac4f11cb7c0e1f616 |
17-Dec-2004 |
Chris Lattner <sabre@nondot.org> |
Remove unused #include
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19021 91177308-0d34-0410-b5e6-96231b3b80d8
parcV8ISelSimple.cpp
|
| 5761805d277f0dc6707b086602c76fd8ae4d2935 |
14-Dec-2004 |
Brian Gaeke <gaeke@uiuc.edu> |
The mystery of Olden/tsp solved, and more opportunities for speedup.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@18932 91177308-0d34-0410-b5e6-96231b3b80d8
EADME.txt
|
| 6b260e2638dac0e6d5264ca505bbcb19026ef6dd |
14-Dec-2004 |
Brian Gaeke <gaeke@uiuc.edu> |
Get rid of shifts by zero in most cases.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@18931 91177308-0d34-0410-b5e6-96231b3b80d8
EADME.txt
parcV8ISelSimple.cpp
|
| e171d5c812c308eb93ea611cae5c480279a82fbc |
13-Dec-2004 |
Chris Lattner <sabre@nondot.org> |
Add some notes
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@18911 91177308-0d34-0410-b5e6-96231b3b80d8
EADME.txt
|
| a04d959f0ce1343d34e7eff1ab9f228123235199 |
13-Dec-2004 |
Brian Gaeke <gaeke@uiuc.edu> |
Add V8 SPEC status.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@18844 91177308-0d34-0410-b5e6-96231b3b80d8
EADME.txt
|
| 3ea78c4276dfbf5a078292ad8fd8dc952c4ff8b9 |
12-Dec-2004 |
Chris Lattner <sabre@nondot.org> |
Use the target triple to pick this target.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@18830 91177308-0d34-0410-b5e6-96231b3b80d8
parcTargetMachine.cpp
|
| 367c137f6a4b105fcd859bf665f8fdd3bb0e7f43 |
12-Dec-2004 |
Brian Gaeke <gaeke@uiuc.edu> |
Complete the list of MultiSource failures.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@18826 91177308-0d34-0410-b5e6-96231b3b80d8
EADME.txt
|
| 326f378a8fb9e81bf41804a5a66bfdb5f76b67f3 |
12-Dec-2004 |
Brian Gaeke <gaeke@uiuc.edu> |
hbd should be working now.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@18824 91177308-0d34-0410-b5e6-96231b3b80d8
EADME.txt
|
| f731be0dd58a0abc049523dfec325b541d0b4f1b |
12-Dec-2004 |
Brian Gaeke <gaeke@uiuc.edu> |
Finally enable the setcc-branch folding code.
Also, fix a bug where ubyte 255 would sometimes be output as -1. This
was afflicting hbd.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@18823 91177308-0d34-0410-b5e6-96231b3b80d8
parcV8ISelSimple.cpp
|
| 81cf150b5d3fa565eb661ba6878a8b0c32d2e048 |
12-Dec-2004 |
Brian Gaeke <gaeke@uiuc.edu> |
Add (currently disabled) code for canFoldSetCC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@18820 91177308-0d34-0410-b5e6-96231b3b80d8
parcV8ISelSimple.cpp
|
| 6a8c46cde3bb3a982a8a928ebae8d21d0aba32a1 |
12-Dec-2004 |
Brian Gaeke <gaeke@uiuc.edu> |
Add stubs for setcc-branch folding support.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@18818 91177308-0d34-0410-b5e6-96231b3b80d8
parcV8ISelSimple.cpp
|
| 74be3a579403d27df14571a8c7ba7fe7ad28745a |
11-Dec-2004 |
Brian Gaeke <gaeke@uiuc.edu> |
Print llvm code one function at a time.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@18805 91177308-0d34-0410-b5e6-96231b3b80d8
parcTargetMachine.cpp
|
| b3a86a6d49234475a7f697648a0fb23e51cf64a2 |
11-Dec-2004 |
Brian Gaeke <gaeke@uiuc.edu> |
JIT should print LLVM each function before selecting instructions for it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@18803 91177308-0d34-0410-b5e6-96231b3b80d8
parcTargetMachine.cpp
|
| 56c5d7369bc06aa7555cc5436aeef4f3ae565fa4 |
11-Dec-2004 |
Brian Gaeke <gaeke@uiuc.edu> |
Bools are *also* not ints. Sigh. Furthermore, most of the TargetMachine
ctor parameters can be defaulted.
Print the transformed llvm code input to the instruction selector
when -print-machineinstrs is on, just like V9.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@18794 91177308-0d34-0410-b5e6-96231b3b80d8
parcTargetMachine.cpp
|
| 4658ba13a816f54f9a5e36fc6ae6456ed1b8e62d |
11-Dec-2004 |
Brian Gaeke <gaeke@uiuc.edu> |
Look for many more moves to fold (previously, we only
*or g0, x add g0, x recognized * as a move)
or x, g0 add x, g0
or 0, x add 0, x
or x, 0 add x, 0
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@18793 91177308-0d34-0410-b5e6-96231b3b80d8
parcInstrInfo.cpp
|
| 4f70b63ebcae70c8b875244f8976baa2097adcc2 |
11-Dec-2004 |
Brian Gaeke <gaeke@uiuc.edu> |
Make GEPs not suck so much:
* Don't emit the Index * ElementSize multiply if Index is a constant.
* Use a shift, not a multiply, if ElementSize is 1/2/4/8.
* If ElementSize fits in the immediate field of SMUL, then put it there.
Fix a bug where struct offsets might be truncated (ConstantSInt::get is
now used instead of ConstantInt::get).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@18792 91177308-0d34-0410-b5e6-96231b3b80d8
parcV8ISelSimple.cpp
|
| 9d6ffb47b4f4c8a51ed100a90af9488ce6cc0778 |
11-Dec-2004 |
Brian Gaeke <gaeke@uiuc.edu> |
Update lists of failing benchmarks, including info on which
ones are failing in cbe.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@18791 91177308-0d34-0410-b5e6-96231b3b80d8
EADME.txt
|
| 5aefa8a6fec1cdf2e8be74195df8d3739ce73c14 |
10-Dec-2004 |
Brian Gaeke <gaeke@uiuc.edu> |
Move -lowerselect later in the chain; some select instructions were
slipping through into the instruction selector, which can't deal with
them yet.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@18758 91177308-0d34-0410-b5e6-96231b3b80d8
parcTargetMachine.cpp
|
| c2e5f3635aa0cd9d10ca4315eec0ed7f161d55f5 |
10-Dec-2004 |
Brian Gaeke <gaeke@uiuc.edu> |
Add the rest of the multiply instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@18757 91177308-0d34-0410-b5e6-96231b3b80d8
parcInstrInfo.td
|
| 1f42181f9917caeb5f441d66dbe7cf84aa94cd22 |
10-Dec-2004 |
Brian Gaeke <gaeke@uiuc.edu> |
Support binary operations with immediates for <= cInt.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@18756 91177308-0d34-0410-b5e6-96231b3b80d8
parcV8ISelSimple.cpp
|
| 2b314430f7b961eede0d9a982f017bedde213c8a |
10-Dec-2004 |
Brian Gaeke <gaeke@uiuc.edu> |
Update lists of failing benchmarks (except C++...something is the
matter with my sparcv8 libstdc++.a) and to-do list.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@18755 91177308-0d34-0410-b5e6-96231b3b80d8
EADME.txt
|
| 57600548c7f83684567bf6eaefa8df0e9a758668 |
10-Dec-2004 |
Brian Gaeke <gaeke@uiuc.edu> |
Adjust paths: Sparc/V8 --> SparcV8
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@18737 91177308-0d34-0410-b5e6-96231b3b80d8
akefile
parc.td
|
| 8fe429d0c2777b5108e22bbdbc3465d1977710cf |
10-Dec-2004 |
Brian Gaeke <gaeke@uiuc.edu> |
Make this file self-contained.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@18736 91177308-0d34-0410-b5e6-96231b3b80d8
parcRegisterInfo.td
|
| 09d8d67066c30907b162426bae9c387f68032238 |
10-Dec-2004 |
Brian Gaeke <gaeke@uiuc.edu> |
Update list of failing MultiSource benchmarks. It works out to +5 -5, but I
think some of these might be the CFE's fault; a rebuild should come soon.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@18735 91177308-0d34-0410-b5e6-96231b3b80d8
EADME.txt
|
| 8ee6a2fb16c5e559d09dd6ef0b2a8816528f8e0a |
10-Dec-2004 |
Brian Gaeke <gaeke@uiuc.edu> |
When FpMOVDs appeared in pairs, we were mistakenly skipping over the latter of
each pair. I think this fixes that.
One of these days, I swear I'm going to get the hang of C++ iterators.
Really.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@18734 91177308-0d34-0410-b5e6-96231b3b80d8
PMover.cpp
|
| 3616f91b71d43d731a7dcff7861eeb61a5b0538d |
09-Dec-2004 |
Brian Gaeke <gaeke@uiuc.edu> |
We're continuing to make progress on MultiSource.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@18714 91177308-0d34-0410-b5e6-96231b3b80d8
EADME.txt
|
| 20503bd958871db6d1bc6215a823ca925c11b9dd |
09-Dec-2004 |
Brian Gaeke <gaeke@uiuc.edu> |
Bytes and shorts are aligned differently from words.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@18713 91177308-0d34-0410-b5e6-96231b3b80d8
parcTargetMachine.cpp
|
| 3bf960ccacf7e226bc9ae66cb77b4098d058e71f |
09-Dec-2004 |
Brian Gaeke <gaeke@uiuc.edu> |
Fix asm-printing directives (how did we not see this before...apparently,
everything was an int!)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@18712 91177308-0d34-0410-b5e6-96231b3b80d8
parcAsmPrinter.cpp
|
| 1d656455829c491aba63b7101e0a5207370aefb9 |
03-Dec-2004 |
Brian Gaeke <gaeke@uiuc.edu> |
This code rotted - change it to call abort() until someone wants
to rewrite this to use relocations.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@18453 91177308-0d34-0410-b5e6-96231b3b80d8
parcV8CodeEmitter.cpp
|
| cb7a76283b00522b4955f7f21e7842c084791fba |
30-Nov-2004 |
Brian Gaeke <gaeke@uiuc.edu> |
Update list of failing benchmarks.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@18384 91177308-0d34-0410-b5e6-96231b3b80d8
EADME.txt
|
| 9e0b9028c7c7d9a1cac45778107b18162be927fd |
30-Nov-2004 |
Brian Gaeke <gaeke@uiuc.edu> |
If we're about to emit something like:
%f0 = fmovs %f0
%f1 = fmovs %f1
then just delete the FpMOVD pseudo-instruction instead. Also, add
statistics and debug printouts.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@18383 91177308-0d34-0410-b5e6-96231b3b80d8
PMover.cpp
|
| e4ed742588d6063c4cc778a57102f8c37e35d3b5 |
24-Nov-2004 |
Brian Gaeke <gaeke@uiuc.edu> |
Update list of failing benchmarks.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@18202 91177308-0d34-0410-b5e6-96231b3b80d8
EADME.txt
|
| 31e575901f146b9e114b77341760657322b9a20f |
24-Nov-2004 |
Brian Gaeke <gaeke@uiuc.edu> |
Fix bug in emitGEPOperation with large struct-member offsets.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@18201 91177308-0d34-0410-b5e6-96231b3b80d8
parcV8ISelSimple.cpp
|
| 88108b8cfa4911e95fc65484accb3676fa99010e |
23-Nov-2004 |
Brian Gaeke <gaeke@uiuc.edu> |
Support shr long/ulong.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@18173 91177308-0d34-0410-b5e6-96231b3b80d8
parcV8ISelSimple.cpp
|
| 4dd043f090b66b28ab621b5707c30e0641f04168 |
23-Nov-2004 |
Brian Gaeke <gaeke@uiuc.edu> |
Support printing ConstantAggregateZeros.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@18172 91177308-0d34-0410-b5e6-96231b3b80d8
parcAsmPrinter.cpp
|
| 8a0c4fd0c6a2044fbace7e176e9617c2aa89a4a0 |
23-Nov-2004 |
Brian Gaeke <gaeke@uiuc.edu> |
Update failing SingleSource test-case list.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@18171 91177308-0d34-0410-b5e6-96231b3b80d8
EADME.txt
|
| fbe558c9937110109bc1eadc268c198511a841af |
23-Nov-2004 |
Brian Gaeke <gaeke@uiuc.edu> |
pseudocode for 64-bit lshr.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@18154 91177308-0d34-0410-b5e6-96231b3b80d8
parcV8ISelSimple.cpp
|
| 2041d0ca123d0c07bb34832aaccdb9c4cb804884 |
23-Nov-2004 |
Brian Gaeke <gaeke@uiuc.edu> |
Add more known-failing tests.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@18149 91177308-0d34-0410-b5e6-96231b3b80d8
EADME.txt
|
| 82a4795850d694b010b3dac0f48d9468496aa243 |
23-Nov-2004 |
Brian Gaeke <gaeke@uiuc.edu> |
Add the rest of the logical instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@18148 91177308-0d34-0410-b5e6-96231b3b80d8
parcInstrInfo.td
|
| 9ffcf9fdddf6e11ed59a70d440408d305a42436d |
22-Nov-2004 |
Brian Gaeke <gaeke@uiuc.edu> |
Add stub method for long shift codegen.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@18100 91177308-0d34-0410-b5e6-96231b3b80d8
parcV8ISelSimple.cpp
|
| 6f0b77221cb9bd82a7ac8b4551f69fab6a03eceb |
22-Nov-2004 |
Brian Gaeke <gaeke@uiuc.edu> |
Update to-do list.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@18099 91177308-0d34-0410-b5e6-96231b3b80d8
EADME.txt
|
| c7b4f1033f4fa37ef3b0d68bc730979ca908f04f |
21-Nov-2004 |
Brian Gaeke <gaeke@uiuc.edu> |
Implement setcc on longs.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@18088 91177308-0d34-0410-b5e6-96231b3b80d8
parcV8ISelSimple.cpp
|
| 4351857d78c6604b1f5dd7a83be2a8cc869ae423 |
21-Nov-2004 |
Brian Gaeke <gaeke@uiuc.edu> |
Add all the rest of the ADD and SUB variants, some of which are important for
64-bit support.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@18087 91177308-0d34-0410-b5e6-96231b3b80d8
parcInstrInfo.td
|
| 5f91de2b386d46c49893a5c9a0efc2e94b288119 |
21-Nov-2004 |
Brian Gaeke <gaeke@uiuc.edu> |
Support add, sub, mul, div, rem on longs/ulongs (latter 3 by emitting libcalls).
Add a big comment containing my notes on how to do setcc for longs/ulongs.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@18086 91177308-0d34-0410-b5e6-96231b3b80d8
parcV8ISelSimple.cpp
|
| b10fc0343ff7bb6bc42f8313fca9cfed9a19b412 |
21-Nov-2004 |
Brian Gaeke <gaeke@uiuc.edu> |
Update to-do list.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@18085 91177308-0d34-0410-b5e6-96231b3b80d8
EADME.txt
|
| 79fe8334111f47c28100cd6729b66910ffbb40bf |
21-Nov-2004 |
Brian Gaeke <gaeke@uiuc.edu> |
Fix extraStack calculation -- I think in fact it might be getting a bit *too*
much stack, but that's better than not enough, which leads to miscompilations.
Fix FP vaarg.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@18079 91177308-0d34-0410-b5e6-96231b3b80d8
parcV8ISelSimple.cpp
|
| e1e2899e96a4e813c35c4e4ca6b399c52e39b339 |
21-Nov-2004 |
Brian Gaeke <gaeke@uiuc.edu> |
Update list of failing benchmarks & to-do list.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@18078 91177308-0d34-0410-b5e6-96231b3b80d8
EADME.txt
|
| b95cbee93077979052e10771031ec209dd24294e |
20-Nov-2004 |
Brian Gaeke <gaeke@uiuc.edu> |
Support most cases of vaarg (except double).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@18055 91177308-0d34-0410-b5e6-96231b3b80d8
parcV8ISelSimple.cpp
|
| 087f0858ef9086402f0863e8f9bf8ea257e2f48d |
20-Nov-2004 |
Brian Gaeke <gaeke@uiuc.edu> |
Update failing test cases & to-do list.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@18054 91177308-0d34-0410-b5e6-96231b3b80d8
EADME.txt
|
| e6e7e3aaddd810bcb2ddc526ccc21ac20bb6a004 |
20-Nov-2004 |
Brian Gaeke <gaeke@uiuc.edu> |
Implement vacopy and vanext.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@18031 91177308-0d34-0410-b5e6-96231b3b80d8
parcV8ISelSimple.cpp
|
| 1dc555c0d3a4abc2d0b6fe15ba2070b3ac884143 |
20-Nov-2004 |
Misha Brukman <brukman+llvm@gmail.com> |
Revert the patch that adds Function* for each 64-bit libc div/mul/rem that we
want to do; instead, we can use MachineInstr::addExternalSymbol(char*, bool) and
thus we don't have to modify the Module as we are code generating for it
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@18025 91177308-0d34-0410-b5e6-96231b3b80d8
parcV8ISelSimple.cpp
|
| d42b167e6126a8276d8590fa7ee93784cca297be |
20-Nov-2004 |
Misha Brukman <brukman+llvm@gmail.com> |
Fix grammar
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@18023 91177308-0d34-0410-b5e6-96231b3b80d8
EADME.txt
|
| d159aafc26585073f244e7db63be148e434b4eaa |
19-Nov-2004 |
Misha Brukman <brukman+llvm@gmail.com> |
Add protoypes for 64-bit long/ulong div, mul, and rem functions
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@18019 91177308-0d34-0410-b5e6-96231b3b80d8
parcV8ISelSimple.cpp
|
| c11c44f55bade30416126f9be1591f17a3958c18 |
19-Nov-2004 |
Misha Brukman <brukman+llvm@gmail.com> |
Handle GhostLinkage case for completeness (should not be seen by the asm writer)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@18015 91177308-0d34-0410-b5e6-96231b3b80d8
parcAsmPrinter.cpp
|
| b6c409a13d5219c05e3ffd25f87e8500518aaf43 |
19-Nov-2004 |
Brian Gaeke <gaeke@uiuc.edu> |
Add VANext and VAArg stubs.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@18012 91177308-0d34-0410-b5e6-96231b3b80d8
parcV8ISelSimple.cpp
|
| d90282db12db037fa2c0fbe855563225fe568a0a |
19-Nov-2004 |
Brian Gaeke <gaeke@uiuc.edu> |
Implement va_start.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@18011 91177308-0d34-0410-b5e6-96231b3b80d8
parcV8ISelSimple.cpp
|
| 4e459c465e861b5c97a1ccf96331a85df9ed0fef |
19-Nov-2004 |
Brian Gaeke <gaeke@uiuc.edu> |
First part of varargs support: getting all varargs which could possibly
be in registers into memory.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@18006 91177308-0d34-0410-b5e6-96231b3b80d8
parcV8ISelSimple.cpp
|
| 2f95ed65e032f66016c55149b2178d61d400c15c |
19-Nov-2004 |
Brian Gaeke <gaeke@uiuc.edu> |
va_end can safely be codegen'd to nothing on v8.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@18004 91177308-0d34-0410-b5e6-96231b3b80d8
parcV8ISelSimple.cpp
|
| 9e672a2d1ba82c6038823ad2463ce561643b8a60 |
19-Nov-2004 |
Brian Gaeke <gaeke@uiuc.edu> |
A very sorry stub implementation of varargs intrinsics...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@18003 91177308-0d34-0410-b5e6-96231b3b80d8
parcV8ISelSimple.cpp
|
| 507bc71820fc4dcb2dc9ddf7372d8dca7ca5b8b1 |
19-Nov-2004 |
Brian Gaeke <gaeke@uiuc.edu> |
Update list of expected test failures.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@18002 91177308-0d34-0410-b5e6-96231b3b80d8
EADME.txt
|
| a54df2503bbc4fee3d4d028a66891f5bf1af6bd3 |
19-Nov-2004 |
Brian Gaeke <gaeke@uiuc.edu> |
Fix bug in casting to long/ulong.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@18001 91177308-0d34-0410-b5e6-96231b3b80d8
parcV8ISelSimple.cpp
|
| 7c0afe04ab82962ebd78a203ee17a5545170ea7b |
18-Nov-2004 |
Brian Gaeke <gaeke@uiuc.edu> |
Rewrite LoadArgumentsToVirtualRegs, making it match almost exactly how
visitCallInst works. Support cast of byte/short/int to long.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@17949 91177308-0d34-0410-b5e6-96231b3b80d8
parcV8ISelSimple.cpp
|
| 7ba2a43866674075578053aeb79ef945b047f7a2 |
18-Nov-2004 |
Brian Gaeke <gaeke@uiuc.edu> |
Update current expected failures list - expand it to include all of
SingleSource. Update to-do list (open-coding refers to binary operations on
longs, not to passing them into functions, which we already support.)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@17948 91177308-0d34-0410-b5e6-96231b3b80d8
EADME.txt
|
| 4b92ed6d584aaa34eab7a3ef60d277617adb9aca |
18-Nov-2004 |
Brian Gaeke <gaeke@uiuc.edu> |
Allocate fewer registers and tighten up alignment restrictions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@17929 91177308-0d34-0410-b5e6-96231b3b80d8
parcRegisterInfo.td
parcTargetMachine.cpp
|
| c935cf111cfc80cac641e3b0ba463afd49f484b0 |
17-Nov-2004 |
Brian Gaeke <gaeke@uiuc.edu> |
Update to-do list.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@17927 91177308-0d34-0410-b5e6-96231b3b80d8
EADME.txt
|
| b662963d3bb72b47215606633c0f51745b824a5d |
17-Nov-2004 |
Brian Gaeke <gaeke@uiuc.edu> |
Update list of failing SingleSource Benchmarks
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@17926 91177308-0d34-0410-b5e6-96231b3b80d8
EADME.txt
|
| b3e0017763051820eb2487adfd021b473e463a77 |
17-Nov-2004 |
Brian Gaeke <gaeke@uiuc.edu> |
We were (somehow) getting the wrong branch opcode for setcc float instrs.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@17925 91177308-0d34-0410-b5e6-96231b3b80d8
parcV8ISelSimple.cpp
|
| 4cda59134110277607ce4c80e7372e0a8db40142 |
16-Nov-2004 |
Brian Gaeke <gaeke@uiuc.edu> |
Update list of failing benchmarks
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@17895 91177308-0d34-0410-b5e6-96231b3b80d8
EADME.txt
|
| b354b7148eadcd5d30ceac80a2ddc1bbdfffbaef |
16-Nov-2004 |
Brian Gaeke <gaeke@uiuc.edu> |
Correct the implicit-defs information for indirect and direct calls.
You can't have implicit defs that overlap explicit defs, or implicit
defs that alias one another.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@17894 91177308-0d34-0410-b5e6-96231b3b80d8
parcInstrInfo.td
|
| 766d6f3b596e46eec4f96b403200205f682c023a |
15-Nov-2004 |
Brian Gaeke <gaeke@uiuc.edu> |
Update list of failing Benchmarks.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@17823 91177308-0d34-0410-b5e6-96231b3b80d8
EADME.txt
|
| f28688e5273d674f5f4ff1c133ce6512d289ead1 |
15-Nov-2004 |
Brian Gaeke <gaeke@uiuc.edu> |
Expand Defs to encompass all the possibly-call-clobbered regs.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@17822 91177308-0d34-0410-b5e6-96231b3b80d8
parcInstrInfo.td
|
| da9b3668c2fcc154d6bd2718ee5a5f70b8d0c8fa |
14-Nov-2004 |
Brian Gaeke <gaeke@uiuc.edu> |
Fix problem with insertion point for ADJCALLSTACKDOWN.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@17733 91177308-0d34-0410-b5e6-96231b3b80d8
parcV8ISelSimple.cpp
|
| 5179e41d6e6fc6fa23674677a4b026fcc4f3e949 |
14-Nov-2004 |
Brian Gaeke <gaeke@uiuc.edu> |
Update lists of failing unit tests.
Exclude bigfib, so that we effectively exclude all C++ benchmarks.
Update to-do list: mention va_start.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@17732 91177308-0d34-0410-b5e6-96231b3b80d8
EADME.txt
|
| 04fe7477b17fc5d2afc89fab2bfbb8d9cabadfcb |
14-Nov-2004 |
Brian Gaeke <gaeke@uiuc.edu> |
Fix NotTest - round up extraStack to the nearest doubleword, if it is
not zero.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@17728 91177308-0d34-0410-b5e6-96231b3b80d8
EADME.txt
parcV8ISelSimple.cpp
|
| b31a828533c954d9f5298509e39d8c884c7cabf5 |
14-Nov-2004 |
Brian Gaeke <gaeke@uiuc.edu> |
Update failing Benchmarks; point out that I'm skipping Shootout-C++.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@17725 91177308-0d34-0410-b5e6-96231b3b80d8
EADME.txt
|
| 1c745818ffd80384fe3bd7c38c3d5324b640d819 |
14-Nov-2004 |
Brian Gaeke <gaeke@uiuc.edu> |
Update expected UnitTests failures.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@17723 91177308-0d34-0410-b5e6-96231b3b80d8
EADME.txt
|
| 24b90c364766629e68c07b84c8e65c93790d4e43 |
14-Nov-2004 |
Brian Gaeke <gaeke@uiuc.edu> |
Rewrite outgoing arg handling to handle more weird corner cases.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@17722 91177308-0d34-0410-b5e6-96231b3b80d8
parcV8ISelSimple.cpp
|
| 54799c2a516520c3f669c46439f8f6b250ac0274 |
14-Nov-2004 |
Brian Gaeke <gaeke@uiuc.edu> |
Support UndefValue emission.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@17721 91177308-0d34-0410-b5e6-96231b3b80d8
parcAsmPrinter.cpp
|
| 6931fd61c0695ca8a1d1170562b47f852e9ea70c |
04-Nov-2004 |
Brian Gaeke <gaeke@uiuc.edu> |
Handle "call" operands of type long/ulong passed in registers.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@17464 91177308-0d34-0410-b5e6-96231b3b80d8
parcV8ISelSimple.cpp
|
| b982c42e65afa44b8a88d9ad3d7321bc129823cc |
29-Oct-2004 |
Brian Gaeke <gaeke@uiuc.edu> |
Change name of target lib to conform to new naming scheme.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@17347 91177308-0d34-0410-b5e6-96231b3b80d8
akefile
|
| b13fac70ca881d70ae93e1b321a7fd78f65d3391 |
29-Oct-2004 |
Brian Gaeke <gaeke@uiuc.edu> |
Remove dependency on MRegisterInfo::getRegClass
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@17346 91177308-0d34-0410-b5e6-96231b3b80d8
parcRegisterInfo.cpp
|
| 6b9ae58c52effb37877c0325ec0f6c26f4e20a1f |
23-Oct-2004 |
Misha Brukman <brukman+llvm@gmail.com> |
Adjust rules for building .inc files due to Reid's changes of Makefile.rules
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@17169 91177308-0d34-0410-b5e6-96231b3b80d8
akefile
|
| d8e6e7f5635af63df4d52e511ad1957964c601aa |
19-Oct-2004 |
Misha Brukman <brukman+llvm@gmail.com> |
* Add baseline structural JIT code, but disable the JIT to allow llvm-gcc builds
- Support added for functions, basic blocks, constant pool, constants,
registers, and some basic support for globals, all untested
* Turn assert()s into abort()s so that unimplemented functions fail in release
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@17143 91177308-0d34-0410-b5e6-96231b3b80d8
parcV8CodeEmitter.cpp
|
| d14d5b422371c1e10ed1866cd6e0c7ac33738a79 |
17-Oct-2004 |
Chris Lattner <sabre@nondot.org> |
Add support for unreachable and undef
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@17074 91177308-0d34-0410-b5e6-96231b3b80d8
parcV8ISelSimple.cpp
|
| d36047dbdb830c3ec659681c99f0348001b57653 |
15-Oct-2004 |
Misha Brukman <brukman+llvm@gmail.com> |
The field is called `imm22', not simply `imm'
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@17003 91177308-0d34-0410-b5e6-96231b3b80d8
parcInstrInfo.td
|
| 3df04c58fcaccb8bd792cf2794921ab7a4bb8dc7 |
15-Oct-2004 |
Misha Brukman <brukman+llvm@gmail.com> |
Synthetic instructions RET and RETL need to have all 3 parameters specified
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@17002 91177308-0d34-0410-b5e6-96231b3b80d8
parcInstrInfo.td
|
| 45a68268a40310dac90d751d40c74c5e81e15a01 |
15-Oct-2004 |
Misha Brukman <brukman+llvm@gmail.com> |
Class F2_1 already inherits the imm22 field from class F2
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@17001 91177308-0d34-0410-b5e6-96231b3b80d8
parcInstrFormats.td
|
| 009d3f400cf0538be8369d17b76092817261585f |
14-Oct-2004 |
Misha Brukman <brukman+llvm@gmail.com> |
Generate the SparcV8 code emitter from .td files
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@17000 91177308-0d34-0410-b5e6-96231b3b80d8
akefile
|
| 17187e936a37171260b81b838a411db128fb1690 |
14-Oct-2004 |
Misha Brukman <brukman+llvm@gmail.com> |
* In the F3_1 class, default asi to 0 because it's not currently used
* In the F3_3 class, remove mention of asi because it's not part of the format
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16999 91177308-0d34-0410-b5e6-96231b3b80d8
parcInstrFormats.td
|
| 59e12ed78962266a9529e58560aeb57330c67d38 |
14-Oct-2004 |
Brian Gaeke <gaeke@uiuc.edu> |
Add FSTOI, FDTOI (fp to integer cast) instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16996 91177308-0d34-0410-b5e6-96231b3b80d8
parcInstrInfo.td
|
| 8b6c1ff677fbd47f8d09d3bae37a388a6ae527c2 |
14-Oct-2004 |
Brian Gaeke <gaeke@uiuc.edu> |
Rewrite emitCastOperation, refactoring parts of it into emitIntegerCast, and
adding emitFPToIntegerCast.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16995 91177308-0d34-0410-b5e6-96231b3b80d8
parcV8ISelSimple.cpp
|
| 941833a37c630c688da81b8e10576e0331623038 |
14-Oct-2004 |
Brian Gaeke <gaeke@uiuc.edu> |
Add list of libc procedures we'll use, at some point.
Update list of currently failing tests.
ADJCALLSTACK* support is done.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16994 91177308-0d34-0410-b5e6-96231b3b80d8
EADME.txt
|
| 299b39d35634712993f98c732224078dba2bdac4 |
10-Oct-2004 |
Brian Gaeke <gaeke@uiuc.edu> |
Fix assertion failure when calling or returning from a function which
returns 'bool' type.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16884 91177308-0d34-0410-b5e6-96231b3b80d8
parcV8ISelSimple.cpp
|
| 85c08351cec796d541c18435c6e6c0edec343e93 |
10-Oct-2004 |
Brian Gaeke <gaeke@uiuc.edu> |
Implement eliminateCallFramePseudoInstr().
Wrap a long comment line.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16883 91177308-0d34-0410-b5e6-96231b3b80d8
parcRegisterInfo.cpp
|
| 9f0cecd4385d778c20859ad18ee43389e1337b33 |
10-Oct-2004 |
Brian Gaeke <gaeke@uiuc.edu> |
Model calls as *both* using *and* killing O0..O5, because callees use the
argument values passed in (so they're not dead until *after* the call),
and callees are free to modify those registers.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16882 91177308-0d34-0410-b5e6-96231b3b80d8
parcInstrInfo.td
|
| 50094edf960af0a259ba6931d0144f06dabec6c0 |
10-Oct-2004 |
Brian Gaeke <gaeke@uiuc.edu> |
Fix whitespace and wrap some long lines.
Deal with allocating stack space for outgoing args and copying them into the
correct stack slots (at least, we can copy <=32-bit int args).
We now correctly generate ADJCALLSTACK* instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16881 91177308-0d34-0410-b5e6-96231b3b80d8
parcV8ISelSimple.cpp
|
| 03203b423f7d4ee86a6040ba042e4a18fe965090 |
09-Oct-2004 |
Brian Gaeke <gaeke@uiuc.edu> |
update according to tonight's info
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16866 91177308-0d34-0410-b5e6-96231b3b80d8
EADME.txt
|
| 0e2d466ce9b5e1b2d35f53993cd5d1ba64e4b45d |
09-Oct-2004 |
Brian Gaeke <gaeke@uiuc.edu> |
Implement getModuleMatchQuality and getJITMatchQuality so that v8 will be the
default 32/BE target on sparc hosts, and ppc will continue to be the default
on other hosts.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16865 91177308-0d34-0410-b5e6-96231b3b80d8
parcTargetMachine.cpp
parcTargetMachine.h
|
| 6672f86a4d9fe3c84c82aafbe8d4f6a43f3c2218 |
30-Sep-2004 |
Brian Gaeke <gaeke@uiuc.edu> |
I think this will handle double args.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16618 91177308-0d34-0410-b5e6-96231b3b80d8
parcV8ISelSimple.cpp
|
| d7bf501cc732f8ddcc30a6bd68d2fdbfe0f2145f |
30-Sep-2004 |
Brian Gaeke <gaeke@uiuc.edu> |
Mark the instructions that have delay slots with the hasDelaySlot flag.
Add some comments.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16611 91177308-0d34-0410-b5e6-96231b3b80d8
parcInstrInfo.td
|
| 870248b16491c9a9a604494b4e7aa94035af2158 |
30-Sep-2004 |
Brian Gaeke <gaeke@uiuc.edu> |
Use TargetMachine::hasDelaySlot() instead of our old switch statement
to find instrs that have delay slots.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16610 91177308-0d34-0410-b5e6-96231b3b80d8
elaySlotFiller.cpp
|
| 49dd15402ba7f2fe4e741ad63283003eb69560dd |
29-Sep-2004 |
Brian Gaeke <gaeke@uiuc.edu> |
Update list of shootout programs that should be working.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16595 91177308-0d34-0410-b5e6-96231b3b80d8
EADME.txt
|
| 374b36d5cf56e070ed7a557314616fc48711d8ea |
29-Sep-2004 |
Brian Gaeke <gaeke@uiuc.edu> |
Tell the target description that calls clobber registers O0...O5.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16594 91177308-0d34-0410-b5e6-96231b3b80d8
parcInstrInfo.td
|
| 22ad67dd68d381f9b324b7fef13f15a80c71e9ef |
29-Sep-2004 |
Brian Gaeke <gaeke@uiuc.edu> |
FITOD is spelled "fitod", not "fitos". Ouch.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16591 91177308-0d34-0410-b5e6-96231b3b80d8
parcInstrInfo.td
|
| 6fdd9e1f3566ec9cc7a66c0ca2cd742057ac95f0 |
29-Sep-2004 |
Brian Gaeke <gaeke@uiuc.edu> |
Don't use .quad to output double constants. The assembler must have a bug or
something, because the wrong bit patterns get output.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16590 91177308-0d34-0410-b5e6-96231b3b80d8
parcAsmPrinter.cpp
|
| 9ed920437aa57886d7c9d98089955e464c3a75e0 |
29-Sep-2004 |
Brian Gaeke <gaeke@uiuc.edu> |
Recognize FpMOVD as a move.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16586 91177308-0d34-0410-b5e6-96231b3b80d8
parcInstrInfo.cpp
|
| a771347336c92d8e35d28e01dedea87bed34a753 |
29-Sep-2004 |
Brian Gaeke <gaeke@uiuc.edu> |
add results
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16579 91177308-0d34-0410-b5e6-96231b3b80d8
EADME.txt
|
| 1df468ea9bb3887021946ed9e49ef26064628f9d |
29-Sep-2004 |
Brian Gaeke <gaeke@uiuc.edu> |
Simplify copyConstantToRegister() for longs, using a pair of recursive calls.
Copy constant-pool entries' addresses into registers before loading out of them,
to avoid errors from the assembler.
Handle loading call args past the 6th one off the stack.
Add IMPLICIT_DEF pseudo-instrs for double and long arguments passed in register
pairs.
Use FpMOVD to copy doubles around instead of the horrible store-load thing we
were doing before.
Handle 'ret double' and 'ret long'.
Fix a bug in handling 'and/or/xor long'.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16577 91177308-0d34-0410-b5e6-96231b3b80d8
parcV8ISelSimple.cpp
|
| 9b8ed0e04aa2c2f18e39a4556006e08174c2eda1 |
29-Sep-2004 |
Brian Gaeke <gaeke@uiuc.edu> |
Fix bug recognizing moves: isMoveInstr should only treat ORs with %g0 as
moves, not all ORs.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16576 91177308-0d34-0410-b5e6-96231b3b80d8
parcInstrInfo.cpp
|
| bcf2ad296f014456ae7e54c68dcc83a5c8853d5f |
29-Sep-2004 |
Brian Gaeke <gaeke@uiuc.edu> |
Use FpMOVD pseudo-instruction to move doubles around.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16575 91177308-0d34-0410-b5e6-96231b3b80d8
parcRegisterInfo.cpp
|
| a036b539293faa39f373ac1f2ff6fdebad5290e3 |
29-Sep-2004 |
Brian Gaeke <gaeke@uiuc.edu> |
Add new FpMOVD pseudo-instruction, used to move doubles around.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16574 91177308-0d34-0410-b5e6-96231b3b80d8
parcInstrInfo.td
|
| 8a9acd1e316db2af9a2570e78fc96248713e4a8d |
29-Sep-2004 |
Brian Gaeke <gaeke@uiuc.edu> |
Fix double and long alignment.
Call the FPMover pass after register allocation.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16573 91177308-0d34-0410-b5e6-96231b3b80d8
parcTargetMachine.cpp
|
| b27df44b62949df6d6d302afe006d7a08785f1da |
29-Sep-2004 |
Brian Gaeke <gaeke@uiuc.edu> |
Put quotes around argument to .section directive.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16572 91177308-0d34-0410-b5e6-96231b3b80d8
parcAsmPrinter.cpp
|
| 1162ed290055d0f9005fdd8587034b86312afb12 |
29-Sep-2004 |
Brian Gaeke <gaeke@uiuc.edu> |
Add createSparcV8FPMoverPass().
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16571 91177308-0d34-0410-b5e6-96231b3b80d8
parc.h
|
| 15b2838035e5668ba4b756319204de7dec9a51d8 |
29-Sep-2004 |
Brian Gaeke <gaeke@uiuc.edu> |
Pass which converts FpMOVD (double move pseudoinstructions) to pairs
of FMOVS instrs.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16570 91177308-0d34-0410-b5e6-96231b3b80d8
PMover.cpp
|
| f90a656a9fbbbf451d0022420e99aee6d3810e93 |
27-Sep-2004 |
Misha Brukman <brukman+llvm@gmail.com> |
SparcV8 int regs are not only 32-bits in width, but they are 32-bit aligned!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16526 91177308-0d34-0410-b5e6-96231b3b80d8
parcRegisterInfo.td
|
| c6e743049983dca1c6904610fa3cb78bda39d67c |
26-Sep-2004 |
Misha Brukman <brukman+llvm@gmail.com> |
Fix the copy-pasto that Brian noticed: V8 int regs are 32-bits wide, not 64.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16518 91177308-0d34-0410-b5e6-96231b3b80d8
parcRegisterInfo.td
|
| c95759c2f53fbc90334952491ec9c8739e565218 |
22-Sep-2004 |
Misha Brukman <brukman+llvm@gmail.com> |
Use the V8/V9 shared register file description
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16485 91177308-0d34-0410-b5e6-96231b3b80d8
parcRegisterInfo.td
|
| c42077d37194a1872dc402522d4d7a0e81f83047 |
22-Sep-2004 |
Misha Brukman <brukman+llvm@gmail.com> |
Combine the F2 and F3 instruction classes into one file for simplicity
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16484 91177308-0d34-0410-b5e6-96231b3b80d8
parcInstrFormats.td
parcInstrInfo.td
parcV8InstrInfo_F2.td
parcV8InstrInfo_F3.td
|
| 31b5edd2e996cbf28db7630a38d1a24dc13ec9a4 |
22-Sep-2004 |
Misha Brukman <brukman+llvm@gmail.com> |
Fix file header path
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16483 91177308-0d34-0410-b5e6-96231b3b80d8
akefile
|
| 981eefd5f78a6039dd081ebd3b4b48f15fa43aa6 |
22-Sep-2004 |
Misha Brukman <brukman+llvm@gmail.com> |
Prettify formatting of the file, adjust paths to making V8 a subdir of Sparc
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16482 91177308-0d34-0410-b5e6-96231b3b80d8
parc.td
|
| 2ec09e713e5cf665f1410340d4772b57b489160a |
22-Sep-2004 |
Misha Brukman <brukman+llvm@gmail.com> |
V8 is now a subdirectory of Sparc; adjust paths accordingly
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16481 91177308-0d34-0410-b5e6-96231b3b80d8
akefile
|
| 1002013ed383e1083a5b63698ab215a2fd0f5d99 |
13-Sep-2004 |
Chris Lattner <sabre@nondot.org> |
Changes to make this work with Jason's patch. I checked this by hand, but
would appreciate if others would also look at this to make sure I didn't
botch something obvious
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16312 91177308-0d34-0410-b5e6-96231b3b80d8
parcRegisterInfo.td
|
| bcb5562a5e67f6f21b4bf82c8f3338a82a7d358c |
10-Sep-2004 |
Misha Brukman <brukman+llvm@gmail.com> |
Renamed file to SparcV8ISelSimple.cpp
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16267 91177308-0d34-0410-b5e6-96231b3b80d8
nstSelectSimple.cpp
|
| f539ffe1b6a94354a93328b46311ab6976d090b9 |
08-Sep-2004 |
Brian Gaeke <gaeke@uiuc.edu> |
This file does not need <iostream>, I think.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16245 91177308-0d34-0410-b5e6-96231b3b80d8
nstSelectSimple.cpp
parcV8ISelSimple.cpp
|
| 74dfcf12000fcec60e1854f7bb78d481347a0a4b |
02-Sep-2004 |
Brian Gaeke <gaeke@uiuc.edu> |
Back to compiling land for v8
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16138 91177308-0d34-0410-b5e6-96231b3b80d8
elaySlotFiller.cpp
nstSelectSimple.cpp
parcAsmPrinter.cpp
parcRegisterInfo.cpp
parcV8ISelSimple.cpp
|
| 0e362770d03a10ed49f75b75aa5673bc9026e3da |
21-Aug-2004 |
Chris Lattner <sabre@nondot.org> |
Convert bytes to bits in alignment
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15971 91177308-0d34-0410-b5e6-96231b3b80d8
parcRegisterInfo.td
|
| 105a56ac6b43ac38a5e2a692ed04bba6f7b7b677 |
16-Aug-2004 |
Chris Lattner <sabre@nondot.org> |
V8 never used the instrselectorgenerator
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15791 91177308-0d34-0410-b5e6-96231b3b80d8
akefile
|
| 01d0efba3982e98e2dc7bc534406fbf9fd1af137 |
16-Aug-2004 |
Chris Lattner <sabre@nondot.org> |
Code insertion methods now return void instead of an int.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15780 91177308-0d34-0410-b5e6-96231b3b80d8
parcRegisterInfo.cpp
parcRegisterInfo.h
|
| 57f1b67c347b9ba1f8a1cdc3a55362d4f2aa8653 |
15-Aug-2004 |
Chris Lattner <sabre@nondot.org> |
These methods no longer take a TargetRegisterClass* operand.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15774 91177308-0d34-0410-b5e6-96231b3b80d8
parcRegisterInfo.cpp
parcRegisterInfo.h
|
| b8ce4c4118e07e53c091294001807f9d1d819200 |
15-Aug-2004 |
Chris Lattner <sabre@nondot.org> |
Update to no longer take MF as an argument
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15748 91177308-0d34-0410-b5e6-96231b3b80d8
parcRegisterInfo.cpp
parcRegisterInfo.h
|
| 812402019264506bea49749b23d0ead1be9fde7c |
09-Aug-2004 |
Misha Brukman <brukman+llvm@gmail.com> |
Remove ClassPrefix variable as it's no longer used.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15586 91177308-0d34-0410-b5e6-96231b3b80d8
parcInstrInfo.td
|
| 0b9bbd2244e5f518361cb0f73279b5ccb8e6ee25 |
09-Aug-2004 |
Misha Brukman <brukman+llvm@gmail.com> |
The (future) SparcV8 JIT would do well to have a class prefix.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15583 91177308-0d34-0410-b5e6-96231b3b80d8
parcInstrInfo.td
|
| 406e8cbb439a315ef106f35cd4d4e6040d407cf4 |
06-Aug-2004 |
Brian Gaeke <gaeke@uiuc.edu> |
Update the To-Do list according to my notes + assertions
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15535 91177308-0d34-0410-b5e6-96231b3b80d8
EADME.txt
|
| cdf70128606e5271dd20ffaf8a1261bdd69b1c53 |
04-Aug-2004 |
Chris Lattner <sabre@nondot.org> |
getValues is gone
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15494 91177308-0d34-0410-b5e6-96231b3b80d8
parcAsmPrinter.cpp
|
| 0f6eab32d0b8880cde65a755e33e2c3a0b7d4ff6 |
31-Jul-2004 |
Chris Lattner <sabre@nondot.org> |
I'm pretty sure that ba is branch always, which is a barrier. Brg should
check this :)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15357 91177308-0d34-0410-b5e6-96231b3b80d8
parcInstrInfo.td
|
| 1d6dc974631a8920a4e5a801a6c7cd4753ae8a8e |
25-Jul-2004 |
Chris Lattner <sabre@nondot.org> |
I think that V8 should coallesce registers, don't you?
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15192 91177308-0d34-0410-b5e6-96231b3b80d8
parcInstrInfo.cpp
parcInstrInfo.h
|
| 7330248482817762c810c0b20165f8f1b59af283 |
18-Jul-2004 |
Chris Lattner <sabre@nondot.org> |
CPR fixes
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@14960 91177308-0d34-0410-b5e6-96231b3b80d8
nstSelectSimple.cpp
parcAsmPrinter.cpp
parcV8ISelSimple.cpp
|
| 7c4676f341a1abfe555e78fb2aac0a2d7cbe85cf |
16-Jul-2004 |
Brian Gaeke <gaeke@uiuc.edu> |
Add a class for pseudo-instructions. Use it.
Add IMPLICIT_USE and IMPLICIT_DEF, a la X86.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@14884 91177308-0d34-0410-b5e6-96231b3b80d8
parcInstrInfo.td
|
| 7d7ac63366956473c8b3ef790447f576315e4c21 |
16-Jul-2004 |
Brian Gaeke <gaeke@uiuc.edu> |
Add what will eventually be the TSFlags. Big switch(opcode) statements are bad.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@14883 91177308-0d34-0410-b5e6-96231b3b80d8
parcInstrInfo.h
|
| d303a2058cdfac5f11ae65762d68577f34e9abdb |
16-Jul-2004 |
Brian Gaeke <gaeke@uiuc.edu> |
Add special handling for pseudo-instructions (print them as comments).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@14882 91177308-0d34-0410-b5e6-96231b3b80d8
parcAsmPrinter.cpp
|
| 22b5cd8ac755359a6ba0b9492d376d5ca46ede12 |
16-Jul-2004 |
Brian Gaeke <gaeke@uiuc.edu> |
Add to-do list.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@14881 91177308-0d34-0410-b5e6-96231b3b80d8
EADME.txt
|
| 812c488f0a2d9d0fb39c3eb1a2446214d5de7efc |
16-Jul-2004 |
Brian Gaeke <gaeke@uiuc.edu> |
Do IMPLICIT_DEFs on incoming args' hard regs, to avoid confusing the regalloc.
Support single-fp incoming args.
Support single-fp outgoing args ('call' operands).
Support double-fp return values.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@14880 91177308-0d34-0410-b5e6-96231b3b80d8
nstSelectSimple.cpp
parcV8ISelSimple.cpp
|
| 0cf0c3746995e8b95fc055cdf8e7210200cb942d |
11-Jul-2004 |
Chris Lattner <sabre@nondot.org> |
Delete the allocate*TargetMachine function, which is now dead .
The shared command line options are now in a header that makes sense.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@14756 91177308-0d34-0410-b5e6-96231b3b80d8
parcTargetMachine.cpp
|
| 71d24aab2d52986cc8203d0c268adb88b0001bc4 |
11-Jul-2004 |
Chris Lattner <sabre@nondot.org> |
Make these format a bit nicer
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@14747 91177308-0d34-0410-b5e6-96231b3b80d8
parcTargetMachine.cpp
|
| d36c970a11633414e56ac1e03010dafa4a63b9c4 |
11-Jul-2004 |
Chris Lattner <sabre@nondot.org> |
Auto-registrate target
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@14745 91177308-0d34-0410-b5e6-96231b3b80d8
parcTargetMachine.cpp
|
| 3a0858957aac2ed442340dbe936c8e63d3b142a2 |
08-Jul-2004 |
Brian Gaeke <gaeke@uiuc.edu> |
Support setcc on fp values.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@14687 91177308-0d34-0410-b5e6-96231b3b80d8
nstSelectSimple.cpp
parcV8ISelSimple.cpp
|
| 4185d03dc5290550f0bad33764f3971ec9a74132 |
08-Jul-2004 |
Brian Gaeke <gaeke@uiuc.edu> |
Add floating-point branches and compares. Compares don't complete
until the next cycle, and there's no interlock, so they effectively
have a delay slot.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@14686 91177308-0d34-0410-b5e6-96231b3b80d8
elaySlotFiller.cpp
parcInstrInfo.td
|
| 7e540fe2b6343b1481f492ed599a0261dc1bd413 |
08-Jul-2004 |
Brian Gaeke <gaeke@uiuc.edu> |
Fix bug where SwitchSection would fail to change to ".bss" successfully.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@14685 91177308-0d34-0410-b5e6-96231b3b80d8
parcAsmPrinter.cpp
|
| ccdd70a5c0ac13020a5843b962b5a4bcc9a6559c |
08-Jul-2004 |
Brian Gaeke <gaeke@uiuc.edu> |
Fix bug involving bool arguments to binary operators.
Fix typo in comment.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@14684 91177308-0d34-0410-b5e6-96231b3b80d8
nstSelectSimple.cpp
parcV8ISelSimple.cpp
|
| 2a9f539168e0488911e1f408f18b1970bbb489eb |
08-Jul-2004 |
Brian Gaeke <gaeke@uiuc.edu> |
Fix bug in copying long constants to register pairs. We were getting
the top and bottom halves backwards...how embarrassing.
Support 'cast long to long' and other similar no-op casts to long.
Support 'ret long'.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@14683 91177308-0d34-0410-b5e6-96231b3b80d8
nstSelectSimple.cpp
parcV8ISelSimple.cpp
|
| f9a75460eee24c82a8d38e29d73ffc27cf360b05 |
08-Jul-2004 |
Brian Gaeke <gaeke@uiuc.edu> |
Support 'ret float'
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@14681 91177308-0d34-0410-b5e6-96231b3b80d8
nstSelectSimple.cpp
parcV8ISelSimple.cpp
|
| 38343f6cfe505139118efa65b2ecabb7b5a59ff1 |
04-Jul-2004 |
Chris Lattner <sabre@nondot.org> |
Add #includes
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@14625 91177308-0d34-0410-b5e6-96231b3b80d8
nstSelectSimple.cpp
parcRegisterInfo.cpp
parcTargetMachine.cpp
parcV8ISelSimple.cpp
|
| a9a582fbb6f0c9e24bebda73f0a13e560f2d3c5e |
02-Jul-2004 |
Chris Lattner <sabre@nondot.org> |
Fix potential problems with unreachable basic blocks.
Also, while noone's looking, add support for constant expressions. Wait,
I said not to look!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@14566 91177308-0d34-0410-b5e6-96231b3b80d8
parcTargetMachine.cpp
|
| d2d5df207a60f4ad74fcf5f9485b92e84d3da9bf |
01-Jul-2004 |
Misha Brukman <brukman+llvm@gmail.com> |
Fix indentation to be 2 spaces.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@14512 91177308-0d34-0410-b5e6-96231b3b80d8
nstSelectSimple.cpp
parcV8ISelSimple.cpp
|
| ea091264144add21bbd29791a914ed30e44ff1c1 |
30-Jun-2004 |
Misha Brukman <brukman+llvm@gmail.com> |
visitSetCondInst() takes a parameter of type `SetCondInst'
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@14508 91177308-0d34-0410-b5e6-96231b3b80d8
nstSelectSimple.cpp
parcV8ISelSimple.cpp
|
| 6bd555176318e802bfe987ab7d7f34eee45d1423 |
28-Jun-2004 |
Brian Gaeke <gaeke@uiuc.edu> |
Allow saving and restoring of double and float registers.
Allow copying of float registers.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@14445 91177308-0d34-0410-b5e6-96231b3b80d8
parcRegisterInfo.cpp
|
| c53105c749faa681b9471bf99a762ed17b35264d |
28-Jun-2004 |
Brian Gaeke <gaeke@uiuc.edu> |
Add FITOS, FITOD, and F{ADD,SUB,MUL,DIV}{S,D}.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@14444 91177308-0d34-0410-b5e6-96231b3b80d8
parcInstrInfo.td
|
| 8a0ae9e9ca918808d29379b92e245944eff70dd7 |
28-Jun-2004 |
Brian Gaeke <gaeke@uiuc.edu> |
Support printing constant pool indices.
If we see an "unknown operand", abort so it's easier to fix it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@14441 91177308-0d34-0410-b5e6-96231b3b80d8
parcAsmPrinter.cpp
|
| ec3227fe394c72838d3fabdc365d8520b6595890 |
28-Jun-2004 |
Brian Gaeke <gaeke@uiuc.edu> |
Trim whitespace.
Support cast of ints (and narrower) to float and double.
Support cast double to double (using load and store).
Abort if we see a CallInst or SetCondInst with long/fp args, instead
of producing bad code.
Support add, sub, mul, div of float and double.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@14440 91177308-0d34-0410-b5e6-96231b3b80d8
nstSelectSimple.cpp
parcV8ISelSimple.cpp
|
| f54ef97abc23a14609dd3e8aea477dcce5b1b7b3 |
25-Jun-2004 |
Misha Brukman <brukman+llvm@gmail.com> |
* LowercaseString moved to StringExtras.h
* Wrap long line to 80 cols
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@14382 91177308-0d34-0410-b5e6-96231b3b80d8
parcAsmPrinter.cpp
|
| 57ff2e3ee711c8d6ab908c6f03d5806b34d910f0 |
24-Jun-2004 |
Brian Gaeke <gaeke@uiuc.edu> |
Add FSTOD and FDTOS conversion instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@14372 91177308-0d34-0410-b5e6-96231b3b80d8
parcInstrInfo.td
|
| 495a0974f4943019da8fdc1df48ca3f0272646c8 |
24-Jun-2004 |
Brian Gaeke <gaeke@uiuc.edu> |
Support cast float to float, cast double to float, and cast float to double.
(It's not yet clear how to copy doubles from register to register.)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@14371 91177308-0d34-0410-b5e6-96231b3b80d8
nstSelectSimple.cpp
parcV8ISelSimple.cpp
|
| 60c73e4f238bc1b32e7d5f986e7c6b0d4dada72d |
24-Jun-2004 |
Brian Gaeke <gaeke@uiuc.edu> |
Make the double-fp pseudo registers be "NamedRegs".
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@14366 91177308-0d34-0410-b5e6-96231b3b80d8
parcRegisterInfo.td
|
| 13dc433df3cc0a6fa101d56ae61deea49be578b1 |
24-Jun-2004 |
Brian Gaeke <gaeke@uiuc.edu> |
Fix a dyn_cast in copyConstantToRegister which should have been a cast.
Compactify the code that emits copies of constant ints into registers.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@14365 91177308-0d34-0410-b5e6-96231b3b80d8
nstSelectSimple.cpp
parcV8ISelSimple.cpp
|
| be81e82afcaa3e1b80ae26d7ec07f0dbccbccc58 |
24-Jun-2004 |
Brian Gaeke <gaeke@uiuc.edu> |
The long integer pseudo-regs are history. So long, we hardly knew ye.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@14364 91177308-0d34-0410-b5e6-96231b3b80d8
parcRegisterInfo.cpp
parcRegisterInfo.td
|
| c7fd0f46754c6fe04cd3fc6ea73273e4b6df6c00 |
24-Jun-2004 |
Brian Gaeke <gaeke@uiuc.edu> |
Use correct add*Imm form in more BuildMI calls.
Fix bug in emitGEPOperation where we weren't passing MBB, IP to getReg.
(hey, wouldn't a constant expression lowering pass be cool? huh huhuhuh)
Fix bug in emitGEPOperation where we might try to OR a constant into a
register which was too big to fit in the immediate field.
Support and, or, xor of longs.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@14363 91177308-0d34-0410-b5e6-96231b3b80d8
nstSelectSimple.cpp
parcV8ISelSimple.cpp
|
| af0492ea52fd322c4282ff637252fdba2d2159f8 |
24-Jun-2004 |
Brian Gaeke <gaeke@uiuc.edu> |
Rename the load and store opcodes. The non-fp ones only have one
variant worth worrying about; the fp ones have two.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@14362 91177308-0d34-0410-b5e6-96231b3b80d8
parcAsmPrinter.cpp
parcRegisterInfo.cpp
|
| e7f9e0b539f5bbd728cd806d25b7050109ae55dd |
24-Jun-2004 |
Brian Gaeke <gaeke@uiuc.edu> |
Rename the load and store opcodes. The non-fp ones only have one
variant worth worrying about; the fp ones have two.
Add fp stores.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@14361 91177308-0d34-0410-b5e6-96231b3b80d8
parcInstrInfo.td
|
| 447330345376ff4879936c2c3eee1153993553ef |
24-Jun-2004 |
Brian Gaeke <gaeke@uiuc.edu> |
Rename the load and store opcodes. The non-fp ones only have one
variant worth worrying about; the fp ones have two.
Stub out the case analysis of int-to-fp casts (no code yet).
I think the number of operands passed to BuildMI for loads was wrong.
Support load and store of float and double.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@14360 91177308-0d34-0410-b5e6-96231b3b80d8
nstSelectSimple.cpp
parcV8ISelSimple.cpp
|
| 7548a540f74be48b3d900134e7220155aab1703a |
24-Jun-2004 |
Brian Gaeke <gaeke@uiuc.edu> |
Strange as it may sound, we'll not use LDD/STD to store longs. For reasons of
representational consistency, we want to address the halves of each 64-bit value
separately.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@14356 91177308-0d34-0410-b5e6-96231b3b80d8
nstSelectSimple.cpp
parcV8ISelSimple.cpp
|
| 00e514ea6af096a966f9437e7c8ed7794b6c4f93 |
24-Jun-2004 |
Brian Gaeke <gaeke@uiuc.edu> |
Support constant cast expressions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@14355 91177308-0d34-0410-b5e6-96231b3b80d8
nstSelectSimple.cpp
parcV8ISelSimple.cpp
|
| f54d912e32d19037391a59fc37336486b280187d |
22-Jun-2004 |
Brian Gaeke <gaeke@uiuc.edu> |
Add pseudo-registers and register class for 64-bit integer values.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@14332 91177308-0d34-0410-b5e6-96231b3b80d8
parcRegisterInfo.cpp
parcRegisterInfo.td
|
| 0280aa9795a528b7a6f6c31b1b95a2ba04e13730 |
21-Jun-2004 |
Misha Brukman <brukman+llvm@gmail.com> |
Order #includes as per style guide.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@14305 91177308-0d34-0410-b5e6-96231b3b80d8
parcTargetMachine.cpp
|
| 30483737486d00e5c1c37f51138419aa08d8b5e3 |
20-Jun-2004 |
Chris Lattner <sabre@nondot.org> |
Move the IntrinsicLowering header into the CodeGen directory, as per PR346
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@14266 91177308-0d34-0410-b5e6-96231b3b80d8
nstSelectSimple.cpp
parcV8ISelSimple.cpp
|
| 9d2427c07437a4ad473ff79a4746e08b9e4b87b3 |
18-Jun-2004 |
Brian Gaeke <gaeke@uiuc.edu> |
.zero doesn't work in the Solaris assembler.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@14231 91177308-0d34-0410-b5e6-96231b3b80d8
parcAsmPrinter.cpp
|
| a3c57624c0dbe7c054c42174e98c3811dd7222cf |
18-Jun-2004 |
Brian Gaeke <gaeke@uiuc.edu> |
Get rid of selects the easy way
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@14230 91177308-0d34-0410-b5e6-96231b3b80d8
parcTargetMachine.cpp
|
| cfaf22445cb3293af4503df06fc2ce6ede284652 |
18-Jun-2004 |
Brian Gaeke <gaeke@uiuc.edu> |
Make visitAllocaInst() look more like its X86 counterpart.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@14229 91177308-0d34-0410-b5e6-96231b3b80d8
nstSelectSimple.cpp
parcV8ISelSimple.cpp
|
| 4f217fdd10df91b8beefb1c86591597b43b769f6 |
18-Jun-2004 |
Brian Gaeke <gaeke@uiuc.edu> |
Mess around with allocation order. In particular, I think we ought to be
using the local & in regs first because they are not clobbered by calls.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@14228 91177308-0d34-0410-b5e6-96231b3b80d8
parcRegisterInfo.td
|
| fbaae01269b580ca12d7b5ae131986dd001041fe |
18-Jun-2004 |
Brian Gaeke <gaeke@uiuc.edu> |
JMPL has a delay slot.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@14227 91177308-0d34-0410-b5e6-96231b3b80d8
elaySlotFiller.cpp
|
| 0735920173891af2b868cce5b7aa98abd2420ff8 |
18-Jun-2004 |
Brian Gaeke <gaeke@uiuc.edu> |
Clean up the commented-out F3_3 stuff.
Replace it with a working class for FP instrs.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@14226 91177308-0d34-0410-b5e6-96231b3b80d8
parcV8InstrInfo_F3.td
|
| f89cc655ab27bab517751f010c15fbe2ae1051d8 |
18-Jun-2004 |
Brian Gaeke <gaeke@uiuc.edu> |
Fix jmpl.
Add some FP moves.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@14225 91177308-0d34-0410-b5e6-96231b3b80d8
parcInstrInfo.td
|
| ceb224148e8425334e46fed686f911bbc99b5c98 |
18-Jun-2004 |
Brian Gaeke <gaeke@uiuc.edu> |
Support printing base+offset pairs where the offset is a register.
Use this for printing the jmpl indirect-call instruction.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@14224 91177308-0d34-0410-b5e6-96231b3b80d8
parcAsmPrinter.cpp
|
| 9d67ea0b611e39e3e58e98222c0dcc51cee412d7 |
18-Jun-2004 |
Brian Gaeke <gaeke@uiuc.edu> |
Support intrinsic calls (although no particular intrinsics are supported yet).
Support indirect calls.
Support returning a float value.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@14223 91177308-0d34-0410-b5e6-96231b3b80d8
nstSelectSimple.cpp
parcV8ISelSimple.cpp
|
| 562d5b0f6ddd341b5755829c636be82eaf31625c |
18-Jun-2004 |
Brian Gaeke <gaeke@uiuc.edu> |
Add load instructions for floating-point registers.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@14217 91177308-0d34-0410-b5e6-96231b3b80d8
parcInstrInfo.td
|
| c93a75223d715374f94603f66f2c35eaacb3168f |
18-Jun-2004 |
Brian Gaeke <gaeke@uiuc.edu> |
Support alloca instructions.
Support copying floating-point constants to registers.
Add assertion to visitCallInst to abort if we hit a NULL calledFunction, for now.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@14216 91177308-0d34-0410-b5e6-96231b3b80d8
nstSelectSimple.cpp
parcV8ISelSimple.cpp
|
| 6713d988a45d06f6f774af3ff2116bf9745040cd |
18-Jun-2004 |
Brian Gaeke <gaeke@uiuc.edu> |
Make storeRegToStackSlot slightly shorter.
Make copyRegToReg return 1 instead of -1.
Edit a comment in emitPrologue().
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@14211 91177308-0d34-0410-b5e6-96231b3b80d8
parcRegisterInfo.cpp
|
| 070bb4a8da5dcedcdf225aca857711bb4f754fa1 |
18-Jun-2004 |
Brian Gaeke <gaeke@uiuc.edu> |
Set the isBranch and isTerminator flags on branch instructions correctly.
Add a FIXME about the (currently unused) JMPL instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@14210 91177308-0d34-0410-b5e6-96231b3b80d8
parcInstrInfo.td
|
| 8308d04dbcbd6e709ed49a7035203eabfd1ebb44 |
18-Jun-2004 |
Brian Gaeke <gaeke@uiuc.edu> |
Emit stores correctly; don't fail an assertion.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@14209 91177308-0d34-0410-b5e6-96231b3b80d8
parcAsmPrinter.cpp
|
| 6c868a4c17b6a540161d2f1cba2b9529cbb772ce |
18-Jun-2004 |
Brian Gaeke <gaeke@uiuc.edu> |
Support generating machine instructions for Phi nodes (based on x86, but with
modifications for 1 LLVM BB --> many MBBs).
Fix store operand order: make it always be Base, Offset, SrcReg (think
"[ Base + Offset ] = SrcReg").
Rewrite visitBranchInst() to be even dumber (but working) -- give up on
the branch fallthrough trick, for the time being.
Make visitSetCondInst() work.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@14208 91177308-0d34-0410-b5e6-96231b3b80d8
nstSelectSimple.cpp
parcV8ISelSimple.cpp
|
| fc7fa3121162e2b50b308fbc2945c1082450b107 |
18-Jun-2004 |
Brian Gaeke <gaeke@uiuc.edu> |
Recognize more branches.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@14207 91177308-0d34-0410-b5e6-96231b3b80d8
elaySlotFiller.cpp
|
| 09c130981456e54305c0d05f7842aa15164d0950 |
17-Jun-2004 |
Brian Gaeke <gaeke@uiuc.edu> |
Use addGlobalAddress and addMBB for call & branch targets instead of addPCDisp.
Abort if we see a PCRelativeDisp MachineOperand, to be safe. This matches
the X86 backend.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@14202 91177308-0d34-0410-b5e6-96231b3b80d8
nstSelectSimple.cpp
parcAsmPrinter.cpp
parcV8ISelSimple.cpp
|
| f70c22b019494723d0e706f93d6542dfaa6e73a5 |
17-Jun-2004 |
Chris Lattner <sabre@nondot.org> |
Rename Type::PrimitiveID to TypeId and ::getPrimitiveID() to ::getTypeID()
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@14201 91177308-0d34-0410-b5e6-96231b3b80d8
nstSelectSimple.cpp
parcAsmPrinter.cpp
parcRegisterInfo.cpp
parcV8ISelSimple.cpp
|
| d6a10537457cea6f8fabc0bd7a3cd89d5ab593ae |
15-Jun-2004 |
Brian Gaeke <gaeke@uiuc.edu> |
Fix thinko in visitor... ShiftInsts should currently be delegated
to visitBinaryOperator.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@14182 91177308-0d34-0410-b5e6-96231b3b80d8
nstSelectSimple.cpp
parcV8ISelSimple.cpp
|
| f405280acb887d418cb63b8d330b16e6c0c4e3a4 |
15-Jun-2004 |
Brian Gaeke <gaeke@uiuc.edu> |
I think we'll use the standard lowering passes for now.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@14179 91177308-0d34-0410-b5e6-96231b3b80d8
parcTargetMachine.cpp
|
| e14e338724c694b1600357aff3bdec6a852df42a |
15-Jun-2004 |
Brian Gaeke <gaeke@uiuc.edu> |
Fix bug generating code for void call instructions: don't call
getReg() on void value.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@14178 91177308-0d34-0410-b5e6-96231b3b80d8
nstSelectSimple.cpp
parcV8ISelSimple.cpp
|
| 5eb64744d006f7350e26470975eea5696e247b92 |
15-Jun-2004 |
Brian Gaeke <gaeke@uiuc.edu> |
Squash a warning from the Solaris assembler by aligning the stack
on a double-word boundary instead of a single-word boundary.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@14177 91177308-0d34-0410-b5e6-96231b3b80d8
parcRegisterInfo.cpp
|
| 446ae11d7c1a6a2a3ce5080bab60123f4dfe63e1 |
15-Jun-2004 |
Brian Gaeke <gaeke@uiuc.edu> |
Allow special-casing of operand printing based on opcode. Print
non-register, non-immed. arguments to SETHI and OR using %hi() and
%lo() respectively.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@14176 91177308-0d34-0410-b5e6-96231b3b80d8
parcAsmPrinter.cpp
|
| 9df92825e12afa744385a50a8a829f2eb5d1a6a1 |
15-Jun-2004 |
Brian Gaeke <gaeke@uiuc.edu> |
Support constant GEP expressions.
Support copying long constants to register pairs.
Support copying ConstantPointerNulls and ConstantPointerRefs to registers.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@14175 91177308-0d34-0410-b5e6-96231b3b80d8
nstSelectSimple.cpp
parcV8ISelSimple.cpp
|
| 143e0ea43d042f1fe1bbe7130aa981a1a0d04386 |
02-Jun-2004 |
Chris Lattner <sabre@nondot.org> |
Adjust to new TM interfaces
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@13949 91177308-0d34-0410-b5e6-96231b3b80d8
parcAsmPrinter.cpp
parcTargetMachine.h
|
| 429022bf830f25c1199a47aab5ffd9a0b3f17a1d |
08-May-2004 |
Brian Gaeke <gaeke@uiuc.edu> |
Add support for widening integral casts.
Flesh out the SetCC support... which currently ends in a little bit
of unfinished code (which is probably completely hilarious) for
generating the condition value splitting the basic block up into 4
blocks, like this (clearly a better API is needed for this!):
BB
cond. branch
/ / R1=1 R2=0
\ /
\ /
R=phi(R1,R2)
Other minor edits.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@13423 91177308-0d34-0410-b5e6-96231b3b80d8
nstSelectSimple.cpp
parcV8ISelSimple.cpp
|
| 59dbff714cc44993a16522de15e89c56c604449d |
08-May-2004 |
Brian Gaeke <gaeke@uiuc.edu> |
Add a bunch more branches
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@13422 91177308-0d34-0410-b5e6-96231b3b80d8
parcInstrInfo.td
|
| 9f56482a43cf6d65adc849b11721770536309bf4 |
08-May-2004 |
Brian Gaeke <gaeke@uiuc.edu> |
Flesh out GEP support
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@13421 91177308-0d34-0410-b5e6-96231b3b80d8
nstSelectSimple.cpp
parcV8ISelSimple.cpp
|
| 6b1d2fa1d1cae181707d05b26c5e2e02c77eaa06 |
08-May-2004 |
Brian Gaeke <gaeke@uiuc.edu> |
Add ADD with immediate
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@13420 91177308-0d34-0410-b5e6-96231b3b80d8
parcInstrInfo.td
|
| c3e970122a942dc46b0be1fb1d0ca757a711911d |
08-May-2004 |
Brian Gaeke <gaeke@uiuc.edu> |
Add forms of CMP, SUBCC, and a few branches, and some comments.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@13419 91177308-0d34-0410-b5e6-96231b3b80d8
parcInstrInfo.td
|
| 532e60c403a15b174c8aab874b198d21514ac408 |
08-May-2004 |
Brian Gaeke <gaeke@uiuc.edu> |
Add stub support for GEPs.
Add support for branches (based loosely on X86/InstSelectSimple).
Add support for not visiting phi nodes in the first pass.
Add support for loading bools.
Flesh out support for stores.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@13418 91177308-0d34-0410-b5e6-96231b3b80d8
nstSelectSimple.cpp
parcV8ISelSimple.cpp
|
| e302a7eb433b43434e021b90c477fdd281c2ccd5 |
07-May-2004 |
Brian Gaeke <gaeke@uiuc.edu> |
Add support for copying bool constants to registers.
Disable the code that copies long constants to registers - it looks fishy.
Implement some simple casts: integral, smaller than longs, and equal-width
or narrowing only.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@13413 91177308-0d34-0410-b5e6-96231b3b80d8
nstSelectSimple.cpp
parcV8ISelSimple.cpp
|
| ef8e48aae06d464e2f7b6c7d2b38e1eb2eca704b |
13-Apr-2004 |
Brian Gaeke <gaeke@uiuc.edu> |
I don't think we have to have 4 extra allocated (but unused) bytes on the stack.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12905 91177308-0d34-0410-b5e6-96231b3b80d8
parcRegisterInfo.cpp
parcTargetMachine.cpp
|
| 3d11e8a6d383ad625e0878e1fe21891c3b448ee0 |
13-Apr-2004 |
Brian Gaeke <gaeke@uiuc.edu> |
I started working on casts, but I don't have anything compilable yet.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12903 91177308-0d34-0410-b5e6-96231b3b80d8
nstSelectSimple.cpp
parcV8ISelSimple.cpp
|
| 8005ed3bd7c9190e3e1bb474317b9fc4639e716a |
07-Apr-2004 |
Brian Gaeke <gaeke@uiuc.edu> |
Don't print [%reg + 0], just print [%reg]
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12759 91177308-0d34-0410-b5e6-96231b3b80d8
parcAsmPrinter.cpp
|
| f3334ebbe3b707ed14c1736ff86d2e5ac26298f7 |
07-Apr-2004 |
Brian Gaeke <gaeke@uiuc.edu> |
First version of code to handle loads. Stub function for handling stores.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12758 91177308-0d34-0410-b5e6-96231b3b80d8
nstSelectSimple.cpp
parcV8ISelSimple.cpp
|
| 562cb16381ede505e1a76efc5aaab22b35cb808d |
07-Apr-2004 |
Brian Gaeke <gaeke@uiuc.edu> |
Support loading arguments from %I0...%I5 into virtual registers in
function prologues, and fix an off-by-one in visitCallInst that was
putting call args into the wrong registers.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12757 91177308-0d34-0410-b5e6-96231b3b80d8
nstSelectSimple.cpp
parcV8ISelSimple.cpp
|
| d54c38b2f46208d79e0da536c38c9ae65cba0f96 |
07-Apr-2004 |
Brian Gaeke <gaeke@uiuc.edu> |
It's setting up the call args right now, but on the callee side, it's
trying to get incoming args off the stack, instead of the %i0...%i6 regs,
which is wrong.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12756 91177308-0d34-0410-b5e6-96231b3b80d8
nstSelectSimple.cpp
parcV8ISelSimple.cpp
|
| 4d0cda4d5c43fffdcfcd331a6f7d74428c217639 |
07-Apr-2004 |
Chris Lattner <sabre@nondot.org> |
This is a start on handling setcc instructions. As the comment notes, we
have no good way of handling this until the code generator is improved.
We should probably just emit V9 instructions in the meantime.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12745 91177308-0d34-0410-b5e6-96231b3b80d8
nstSelectSimple.cpp
parcV8ISelSimple.cpp
|
| 6179047661ae9d2291ef58147934a2630591b126 |
07-Apr-2004 |
Chris Lattner <sabre@nondot.org> |
andd subcc instructions which is used to create the 'cmp' pseudo instruction
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12744 91177308-0d34-0410-b5e6-96231b3b80d8
parcInstrInfo.td
|
| 0d538bbec2ebf84d615f3a3188c5f3b708646fb2 |
07-Apr-2004 |
Chris Lattner <sabre@nondot.org> |
Avoid emitting an extra copy on each 32-bit operation
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12743 91177308-0d34-0410-b5e6-96231b3b80d8
nstSelectSimple.cpp
parcV8ISelSimple.cpp
|
| 88ddd4a07de81a14a6c768fe5ac4c6a7481f838d |
07-Apr-2004 |
Brian Gaeke <gaeke@uiuc.edu> |
Make generation of stack-slot loads and copies less ugly.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12742 91177308-0d34-0410-b5e6-96231b3b80d8
parcRegisterInfo.cpp
|
| fa4bb09cf042dc0f30297082f55bc37f35c0f5f5 |
07-Apr-2004 |
Brian Gaeke <gaeke@uiuc.edu> |
Fix bug in printing loads.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12741 91177308-0d34-0410-b5e6-96231b3b80d8
parcAsmPrinter.cpp
|
| 4be7ca5721ce045492d53652aa9229326c51a5b0 |
07-Apr-2004 |
Chris Lattner <sabre@nondot.org> |
Add support for shift instructions, wrap some long lines
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12740 91177308-0d34-0410-b5e6-96231b3b80d8
nstSelectSimple.cpp
parcV8ISelSimple.cpp
|
| a562efce355618a02a23ebd3e26d277b26d4e8d5 |
07-Apr-2004 |
Chris Lattner <sabre@nondot.org> |
Fix encoding of existing shift instructions, add rr shifts
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12739 91177308-0d34-0410-b5e6-96231b3b80d8
parcInstrInfo.td
|
| 22ede709f6e62c495fe8af97dc8e81e82d5faeed |
07-Apr-2004 |
Chris Lattner <sabre@nondot.org> |
Add a bunch more instructions
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12737 91177308-0d34-0410-b5e6-96231b3b80d8
nstSelectSimple.cpp
parcInstrInfo.td
parcV8ISelSimple.cpp
|
| f97b31e9cfb528e56603b123eb2a5426b400bd96 |
07-Apr-2004 |
Chris Lattner <sabre@nondot.org> |
Merge my changes with brians
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12736 91177308-0d34-0410-b5e6-96231b3b80d8
parcRegisterInfo.td
|
| 0f51cc1759e2162485b5f9ee57b3b5bc8f5c6759 |
07-Apr-2004 |
Brian Gaeke <gaeke@uiuc.edu> |
Add in some things I forgot, which Chris helpfully reminded me of...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12735 91177308-0d34-0410-b5e6-96231b3b80d8
elaySlotFiller.cpp
|
| 59e04e4889eb3af3a679ddd13f4e3048dfb354d2 |
07-Apr-2004 |
Brian Gaeke <gaeke@uiuc.edu> |
Add support for the "Y" register, used by MUL & DIV.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12734 91177308-0d34-0410-b5e6-96231b3b80d8
parcRegisterInfo.td
|
| e88c9dc860dd636e38abdb4aab6e4fc8fff1cc27 |
07-Apr-2004 |
Brian Gaeke <gaeke@uiuc.edu> |
Add UDIV, SDIV, and a few variants of WR.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12733 91177308-0d34-0410-b5e6-96231b3b80d8
parcInstrInfo.td
|
| 2d4fa8faace6fec748f2a00b33ad7982df00e145 |
07-Apr-2004 |
Brian Gaeke <gaeke@uiuc.edu> |
Preliminary support for getting 64-bit integer constants into registers.
Preliminary support for division. It's gross because you have to initialize
the "Y" register, which is the top 32 bits of the thing you're dividing.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12732 91177308-0d34-0410-b5e6-96231b3b80d8
nstSelectSimple.cpp
parcV8ISelSimple.cpp
|
| ff8282604a6a872536c188e5daff9a9b37b7d105 |
07-Apr-2004 |
Brian Gaeke <gaeke@uiuc.edu> |
Prune unnecessary #includes
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12731 91177308-0d34-0410-b5e6-96231b3b80d8
elaySlotFiller.cpp
|
| 20117102c2e10fa2c0fa74965894e28751a3df34 |
07-Apr-2004 |
Brian Gaeke <gaeke@uiuc.edu> |
Simple delay slot filler pass.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12730 91177308-0d34-0410-b5e6-96231b3b80d8
elaySlotFiller.cpp
|
| 86a8790826c253dd56e10902abdcd7f87c2cbdaa |
07-Apr-2004 |
Brian Gaeke <gaeke@uiuc.edu> |
Add references to delay slot filler pass.
Fill in addPassesToJITCompile method.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12729 91177308-0d34-0410-b5e6-96231b3b80d8
parc.h
parcTargetMachine.cpp
|
| 3a8ad62d4ffa9de99f8835fe9592d4d6ef0a2730 |
07-Apr-2004 |
Brian Gaeke <gaeke@uiuc.edu> |
First attempt at handling frame index elimination.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12728 91177308-0d34-0410-b5e6-96231b3b80d8
parcRegisterInfo.cpp
|
| 1c38175d6b7978768645fac271db435bef337a13 |
07-Apr-2004 |
Brian Gaeke <gaeke@uiuc.edu> |
First attempt at special-casing printing of [%reg + offset] for
ld/st instructions - doesn't seem to work yet, but I think it's
just a typo or something somewhere.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12727 91177308-0d34-0410-b5e6-96231b3b80d8
parcAsmPrinter.cpp
|
| 856e4fc59ee13c84150dbef4e46795ca7883504e |
07-Apr-2004 |
Brian Gaeke <gaeke@uiuc.edu> |
Delete reference to "the Mach-O Runtime ABI".
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12726 91177308-0d34-0410-b5e6-96231b3b80d8
parc.td
|
| ea8494bb89f5170b62e492585588fdb5f1ba64be |
07-Apr-2004 |
Brian Gaeke <gaeke@uiuc.edu> |
Deal with call return values.
Don't put NOPs in delay slots at all. We'll have a fix-up pass later.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12725 91177308-0d34-0410-b5e6-96231b3b80d8
nstSelectSimple.cpp
parcV8ISelSimple.cpp
|
| 6c5526e56ec558f6308e33437b5f90d1c67768ed |
02-Apr-2004 |
Brian Gaeke <gaeke@uiuc.edu> |
Add support for many of the MRegisterInfo callbacks.
Eliminating call-frame pseudo instrs and frame indices are still stubs.
Flesh out the emitPrologue method based on better ABI knowledge.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12632 91177308-0d34-0410-b5e6-96231b3b80d8
parcRegisterInfo.cpp
|
| 8542e08d15208d73c5146d6858d67b26effaf4ef |
02-Apr-2004 |
Brian Gaeke <gaeke@uiuc.edu> |
Add load, store, and NOP instructions.
Fix up comments.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12631 91177308-0d34-0410-b5e6-96231b3b80d8
parcInstrInfo.td
|
| a778ca555aa49cf60222eb0e170b8ef4b02e6259 |
02-Apr-2004 |
Brian Gaeke <gaeke@uiuc.edu> |
Add support for printing pc-relative displacements of functions (as used in
the CALL instruction).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12630 91177308-0d34-0410-b5e6-96231b3b80d8
parcAsmPrinter.cpp
|
| f7e44ef8d54653cdfd8dfe39adfc5eabdf91cca2 |
02-Apr-2004 |
Brian Gaeke <gaeke@uiuc.edu> |
Add support for call instructions (0-ary only for now).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12629 91177308-0d34-0410-b5e6-96231b3b80d8
nstSelectSimple.cpp
parcV8ISelSimple.cpp
|
| 54cc3c2135bcab1a57d792d9026f72e6937934ca |
16-Mar-2004 |
Brian Gaeke <gaeke@uiuc.edu> |
The .type directive on Solaris uses the # character instead of @.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12454 91177308-0d34-0410-b5e6-96231b3b80d8
parcAsmPrinter.cpp
|
| 6d339f9000055a59249cedea3ff22e497cc6bb60 |
16-Mar-2004 |
Brian Gaeke <gaeke@uiuc.edu> |
Fix bug in zero-extending of shorts.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12453 91177308-0d34-0410-b5e6-96231b3b80d8
nstSelectSimple.cpp
parcV8ISelSimple.cpp
|
| 032f80fbf1c3eb270cbbf551f73468513fd175e1 |
16-Mar-2004 |
Brian Gaeke <gaeke@uiuc.edu> |
Add UMULrr and SMULrr instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12452 91177308-0d34-0410-b5e6-96231b3b80d8
parcInstrInfo.td
|
| 79db7405f78fa009efc5a530addc9dda0894aa3e |
16-Mar-2004 |
Brian Gaeke <gaeke@uiuc.edu> |
Use ! for comment char; it works in both Solaris as and GAS.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12451 91177308-0d34-0410-b5e6-96231b3b80d8
parcAsmPrinter.cpp
|
| f57e364f656030597179ce24b8fffa221bfcb949 |
16-Mar-2004 |
Brian Gaeke <gaeke@uiuc.edu> |
Make getClass more robust by adding cLong.
Add handling for Mul instruction.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12450 91177308-0d34-0410-b5e6-96231b3b80d8
nstSelectSimple.cpp
parcV8ISelSimple.cpp
|
| cf47198a49a4d493a64e9f3c9aecbbbe6112f005 |
09-Mar-2004 |
Brian Gaeke <gaeke@uiuc.edu> |
Hmm, who left this sitting around in my tree
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12255 91177308-0d34-0410-b5e6-96231b3b80d8
nstSelectSimple.cpp
parcV8ISelSimple.cpp
|
| 9b3c70261419bca20fa26e939116696a02f4e975 |
08-Mar-2004 |
Chris Lattner <sabre@nondot.org> |
Avoid allocating special registers a bit more robustly
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12207 91177308-0d34-0410-b5e6-96231b3b80d8
parcRegisterInfo.td
|
| 08f64c3321e9103d7a9a29baf0158cfced4cadc1 |
06-Mar-2004 |
Brian Gaeke <gaeke@uiuc.edu> |
Support return values of basic integer types.
Emit RETL instruction to return instead of funny JMPL.
Fix indentation.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12186 91177308-0d34-0410-b5e6-96231b3b80d8
nstSelectSimple.cpp
parcV8ISelSimple.cpp
|
| a8056fabebbc23c080b7cda81ca8f74eedc1a585 |
06-Mar-2004 |
Brian Gaeke <gaeke@uiuc.edu> |
Sort stanzas into Sparc V8 book page number order.
Add RET, RETL. Rename SAVE, RESTORE & JMPL for consistency.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12185 91177308-0d34-0410-b5e6-96231b3b80d8
parcInstrInfo.td
|
| bda4a3c61aea14228dfab3d9ce956f870188eb8d |
06-Mar-2004 |
Brian Gaeke <gaeke@uiuc.edu> |
Hack it so we do not try to allocate values to G0.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12184 91177308-0d34-0410-b5e6-96231b3b80d8
parcRegisterInfo.td
|
| d69b3c58d3e6f2edc52bfe431522cd1db8db4652 |
06-Mar-2004 |
Brian Gaeke <gaeke@uiuc.edu> |
Make prolog align stack properly. Make epilog not touch any registers.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12183 91177308-0d34-0410-b5e6-96231b3b80d8
parcRegisterInfo.cpp
|
| a8b00cafc4b79f3ef05fdd1cdfc0d58f10740e69 |
06-Mar-2004 |
Brian Gaeke <gaeke@uiuc.edu> |
Emit register names in lowercase, as required by the assembler.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12182 91177308-0d34-0410-b5e6-96231b3b80d8
parcAsmPrinter.cpp
|
| a98e0514175868cc4c6b5c31d02f36de8b973c8d |
06-Mar-2004 |
Brian Gaeke <gaeke@uiuc.edu> |
Teach getRegClassForType where to find FP registers
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12180 91177308-0d34-0410-b5e6-96231b3b80d8
parcRegisterInfo.cpp
|
| 62aa28aef392ccde76888dbb444c567d3f95ef8a |
05-Mar-2004 |
Brian Gaeke <gaeke@uiuc.edu> |
Asm output is looking a lot better; not correct for all operands yet though.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12143 91177308-0d34-0410-b5e6-96231b3b80d8
parcAsmPrinter.cpp
|
| 7a3ae1fbada713dc6b079debf2a5ad5ba32157f7 |
04-Mar-2004 |
Brian Gaeke <gaeke@uiuc.edu> |
Support -print-machineinstrs
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12124 91177308-0d34-0410-b5e6-96231b3b80d8
parcTargetMachine.cpp
|
| 4acfd039f92fea3b02227020e4e28f2e5db2d92e |
04-Mar-2004 |
Brian Gaeke <gaeke@uiuc.edu> |
Asm printer support, based on x86 - only prints mnemonics for now
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12113 91177308-0d34-0410-b5e6-96231b3b80d8
parc.h
parcAsmPrinter.cpp
parcTargetMachine.cpp
|
| da69e7d9b3b6510eb4b0429e4ef4b563399fe7ca |
04-Mar-2004 |
Brian Gaeke <gaeke@uiuc.edu> |
Double-FP pseudo-registers.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12112 91177308-0d34-0410-b5e6-96231b3b80d8
parcRegisterInfo.td
|
| 775158d62abbe2548875b46dcbecf8b234930dd4 |
04-Mar-2004 |
Brian Gaeke <gaeke@uiuc.edu> |
Subtract instructions; minor cleanups
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12111 91177308-0d34-0410-b5e6-96231b3b80d8
nstSelectSimple.cpp
parcInstrInfo.td
parcV8ISelSimple.cpp
|
| e7173b7e8ec1ac1bc4843dad84b0d84c3ad3e720 |
04-Mar-2004 |
Brian Gaeke <gaeke@uiuc.edu> |
Floating point regs
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12110 91177308-0d34-0410-b5e6-96231b3b80d8
parcRegisterInfo.td
|
| e806173ab6f571f48e8b056fbd355ccef4371a23 |
04-Mar-2004 |
Brian Gaeke <gaeke@uiuc.edu> |
Simple copyConstantToReg support, SETHIi and ORri
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12107 91177308-0d34-0410-b5e6-96231b3b80d8
nstSelectSimple.cpp
parcInstrInfo.td
parcV8ISelSimple.cpp
|
| bc1d27aa6e80022d507ce4811566b4af4257ee45 |
04-Mar-2004 |
Brian Gaeke <gaeke@uiuc.edu> |
Support add - note, still missing important copyConstantToRegister stuff
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12106 91177308-0d34-0410-b5e6-96231b3b80d8
nstSelectSimple.cpp
parcInstrInfo.td
parcV8ISelSimple.cpp
|
| 05b15fb075307d55a61694ebcb19bbc9b13aa9f8 |
01-Mar-2004 |
Brian Gaeke <gaeke@uiuc.edu> |
TargetCacheInfo has been removed; its only uses were to propagate a constant
(16) into certain areas of the SPARC V9 back-end. I'm fairly sure the US IIIi's
dcache has 32-byte lines, so I'm not sure where the 16 came from. However, in
the interest of not breaking things any more than they already are, I'm going
to leave the constant alone.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12043 91177308-0d34-0410-b5e6-96231b3b80d8
parcTargetMachine.h
|
| dce363d5ecf0f6add5541c853eb33214d910812f |
29-Feb-2004 |
Chris Lattner <sabre@nondot.org> |
Adjust to change in TII ctor arguments
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11987 91177308-0d34-0410-b5e6-96231b3b80d8
parcInstrInfo.cpp
|
| 1ddf475b6a3d748427546ab8f65a712c8eea3a0f |
29-Feb-2004 |
Chris Lattner <sabre@nondot.org> |
These two virtual methods are never called.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11984 91177308-0d34-0410-b5e6-96231b3b80d8
parcInstrInfo.cpp
parcInstrInfo.h
|
| e1274de2c9ce7d208cd989b3f749724f38c54caf |
29-Feb-2004 |
Chris Lattner <sabre@nondot.org> |
Implement initial prolog/epilog code insertion methods.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11979 91177308-0d34-0410-b5e6-96231b3b80d8
parcRegisterInfo.cpp
parcRegisterInfo.td
|
| 1c809c594b8339fff4746c08e34914fffc3242e4 |
29-Feb-2004 |
Chris Lattner <sabre@nondot.org> |
Add an instruction selector capable of selecting 'ret void'
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11973 91177308-0d34-0410-b5e6-96231b3b80d8
nstSelectSimple.cpp
parc.h
parcRegisterInfo.td
parcTargetMachine.cpp
parcV8ISelSimple.cpp
|
| 9ff6ba1ea1692a3bbef8ffd6ad6a4a724d4b9667 |
28-Feb-2004 |
Chris Lattner <sabre@nondot.org> |
Change this so that LLC actually tries to run the code generator, though it will
immediately abort due to lack of an instruction selector. :)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11963 91177308-0d34-0410-b5e6-96231b3b80d8
parcTargetMachine.cpp
|
| 8d8a6bc7a36ccf517354c325aa5ca9a127776d0f |
28-Feb-2004 |
Chris Lattner <sabre@nondot.org> |
Finegrainify namespacification
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11958 91177308-0d34-0410-b5e6-96231b3b80d8
parcTargetMachine.cpp
|
| a85d46eea8f7eba8be2e9724c099abda68dbb20a |
28-Feb-2004 |
Chris Lattner <sabre@nondot.org> |
Tab completion is our friend.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11957 91177308-0d34-0410-b5e6-96231b3b80d8
parc.td
parcInstrInfo.td
parcRegisterInfo.td
parcV8InstrInfo_F2.td
parcV8InstrInfo_F3.td
parcV8Instrs.td
parcV8Instrs_F2.td
parcV8Instrs_F3.td
parcV8Reg.td
|
| 83ba99ac46a2e4189d71146246abca8c845ffd68 |
28-Feb-2004 |
Chris Lattner <sabre@nondot.org> |
Clean up rules
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11956 91177308-0d34-0410-b5e6-96231b3b80d8
akefile
|
| 275f6459ab5fca1a0b56920291d9cba4aae5d3b5 |
28-Feb-2004 |
Chris Lattner <sabre@nondot.org> |
Bring this directory into "it actually compiles" land
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11955 91177308-0d34-0410-b5e6-96231b3b80d8
parcRegisterInfo.cpp
parcV8Instrs.td
parcV8Instrs_F2.td
parcV8Instrs_F3.td
|
| f13bd49d6af464306330e2c1147cc197c9eb0da2 |
28-Feb-2004 |
Chris Lattner <sabre@nondot.org> |
Fix multiple inclusion problem
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11954 91177308-0d34-0410-b5e6-96231b3b80d8
parcV8Instrs.td
|
| 23e6c1ff454a5d3d148ca3816562d7da49ac9c85 |
26-Feb-2004 |
Misha Brukman <brukman+llvm@gmail.com> |
Instructions to call and return from functions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11858 91177308-0d34-0410-b5e6-96231b3b80d8
parcV8Instrs.td
|
| 757df0282652a9623891baf00d83e03964bb38b1 |
25-Feb-2004 |
Misha Brukman <brukman+llvm@gmail.com> |
SparcV8 regs are really 32-bit, not 64! Thanks, Chris.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11835 91177308-0d34-0410-b5e6-96231b3b80d8
parcV8Reg.td
|
| e07c2aa67cad10d6793c649639fece58dcea6d20 |
25-Feb-2004 |
Misha Brukman <brukman+llvm@gmail.com> |
Clean up the tablegen descriptions for SparcV8.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11834 91177308-0d34-0410-b5e6-96231b3b80d8
parc.td
parcV8Instrs.td
|
| 5914bf6ef594ed14b1473e63afdf5fd1c6e0a6a7 |
25-Feb-2004 |
Misha Brukman <brukman+llvm@gmail.com> |
Fix the SparcV8 register definitions that were imported from PPC template.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11833 91177308-0d34-0410-b5e6-96231b3b80d8
parcV8Reg.td
|
| 3dff82298818d2760c0b53b45214bff5dea9fb4a |
25-Feb-2004 |
Misha Brukman <brukman+llvm@gmail.com> |
SparcV8 has different types of instructions, but F1 is only used for CALL.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11832 91177308-0d34-0410-b5e6-96231b3b80d8
parcV8Instrs_F2.td
parcV8Instrs_F3.td
|
| e785e531f4495068ee46cabd926939eec15a565a |
25-Feb-2004 |
Brian Gaeke <gaeke@uiuc.edu> |
SparcV8 skeleton
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11828 91177308-0d34-0410-b5e6-96231b3b80d8
akefile
EADME.txt
parc.h
parc.td
parcInstrInfo.cpp
parcInstrInfo.h
parcRegisterInfo.cpp
parcRegisterInfo.h
parcTargetMachine.cpp
parcTargetMachine.h
parcV8CodeEmitter.cpp
parcV8Instrs.td
parcV8JITInfo.h
parcV8Reg.td
|